2 use ieee.std_logic_1164.all;
4 -- this address decoder inserts dummy setup time on write.
5 entity address_decoder is
6 generic (abus_size : integer := 16; dbus_size : integer := 8);
8 addr : in std_logic_vector (abus_size - 1 downto 0);
9 rom_ce_n : out std_logic;
10 ram_ce_n : out std_logic;
11 ppu_ce_n : out std_logic;
12 apu_ce_n : out std_logic
18 -- * 0x0000 - 0x07FF RAM
19 -- * 0x0800 - 0x1FFF mirror RAM
20 -- * 0x2000 - 0x2007 I/O PPU
21 -- * 0x4000 - 0x401F I/O APU
22 -- * 0x6000 - 0x7FFF battery backup ram
23 -- * 0x8000 - 0xFFFF PRG-ROM
26 architecture rtl of address_decoder is
30 rom_ce_n <= not addr(15);
33 when (addr(15) = '0' and addr(14) = '0' and addr(13) = '1') else
37 when (addr(15) = '0' and addr(14) = '1' and addr(13) = '0') else
40 -- ram range : 0 - 0x2000.
41 -- 0x2000 is 0010_0000_0000_0000
43 when ((addr(15) or addr(14) or addr(13)) = '0') else
50 -----------------------------------------------------
51 -----------------------------------------------------
52 ---------- VRAM / CHR ROM Address Decoder -----------
53 -----------------------------------------------------
54 -----------------------------------------------------
57 use ieee.std_logic_1164.all;
59 entity v_address_decoder is
60 generic (abus_size : integer := 14; dbus_size : integer := 8);
62 v_addr : in std_logic_vector (13 downto 0);
63 nt_v_mirror : in std_logic;
64 pt_ce_n : out std_logic;
65 nt0_ce_n : out std_logic;
66 nt1_ce_n : out std_logic
68 end v_address_decoder;
70 -- Address Size Description
71 -- $0000-$0FFF $1000 Pattern Table 0 [lower CHR bank]
72 -- $1000-$1FFF $1000 Pattern Table 1 [upper CHR bank]
73 -- $2000-$23FF $0400 Name Table #0
74 -- $2400-$27FF $0400 Name Table #1
75 -- $2800-$2BFF $0400 Name Table #2
76 -- $2C00-$2FFF $0400 Name Table #3
77 -- $3000-$3EFF $0F00 Mirrors of $2000-$2FFF
78 -- $3F00-$3F1F $0020 Palette RAM indexes [not RGB values]
79 -- $3F20-$3FFF $0080 Mirrors of $3F00-$3F1F
81 architecture rtl of v_address_decoder is
86 pt_ce_n <= '0' when (v_addr(13) = '0') else
90 nt0_ce_n <= '1' when (v_addr(13) = '0') else
91 '1' when (v_addr(13 downto 8) = "111111") else
92 '0' when (((v_addr(11) or v_addr(10)) = '0')
93 or (nt_v_mirror = '1' and v_addr(11) = '1' and v_addr(10) = '0')
94 or (nt_v_mirror = '0' and v_addr(11) = '0' and v_addr(10) = '1')) else
98 nt1_ce_n <= '1' when (v_addr(13) = '0') else
99 '1' when (v_addr(13 downto 8) = "111111") else
100 '0' when (((v_addr(11) and v_addr(10)) = '1')
101 or (nt_v_mirror = '1' and v_addr(11) = '0' and v_addr(10) = '1')
102 or (nt_v_mirror = '0' and v_addr(11) = '1' and v_addr(10) = '0')) else