2 use ieee.std_logic_1164.all;
3 use ieee.std_logic_unsigned.conv_integer;
4 use ieee.std_logic_arith.conv_std_logic_vector;
9 generic (abus_size : integer := 15; dbus_size : integer := 8);
10 port ( ce_n : in std_logic; --active low.
11 addr : in std_logic_vector (abus_size - 1 downto 0);
12 data : out std_logic_vector (dbus_size - 1 downto 0)
16 architecture rtl of prg_rom is
19 subtype rom_data is std_logic_vector (dbus_size -1 downto 0);
20 type rom_array is array (0 to 2**abus_size - 1) of rom_data;
23 constant ROM_TACE : time := 100 ns; --output enable access time
24 constant ROM_TOH : time := 10 ns; --output hold time
26 --function is called only once at the array initialize.
27 function rom_fill return rom_array is
28 type binary_file is file of character;
29 FILE nes_file : binary_file OPEN read_mode IS "rom-file.nes" ;
30 variable read_data : character;
32 variable out_line : line;
33 variable ret : rom_array;
35 --skip first 16 bit data(NES cardridge header part.)
37 read(nes_file, read_data);
40 for i in ret'range loop
41 read(nes_file, read_data);
43 conv_std_logic_vector(character'pos(read_data), 8);
45 write(out_line, string'("file load success."));
46 writeline(output, out_line);
50 --itinialize with the rom_fill function.
51 constant p_rom : rom_array := rom_fill;
55 p : process (ce_n, addr)
58 data <= p_rom(conv_integer(addr));
60 data <= (others => 'Z');