de1_nes/simulation/modelsim/de1_nes_run_msim_gate_vhdl.do

   1 transcript on\r
   2 if {[file exists gate_work]} {\r
   3         vdel -lib gate_work -all\r
   4 }\r
   5 vlib gate_work\r
   6 vmap work gate_work\r
   7 \r
   8 vcom -93 -work work {de1_nes.vho}\r
   9 \r
  10 vcom -93 -work work {../../testbench_motones_sim.vhd}\r
  11 \r
  12 vsim -t 1ps +transport_int_delays +transport_path_delays -sdftyp /sim_board=de1_nes_vhd.sdo -L cycloneii -L gate_work -L work testbench_motones_sim\r
  13 \r
  14 #add wave *\r
  15 \r
  16 \r
  17 add wave -divider cpu\r
  18 add wave -label rst_n       sim:/testbench_motones_sim/sim_board/rst_n\r
  19 add wave -label nmi         sim:/testbench_motones_sim/sim_board/dbg_nmi\r
  20 add wave -label cpu_clk       sim:/testbench_motones_sim/sim_board/dbg_cpu_clk\r
  21 \r
  22 \r
  23 add wave -label r_nw       sim:/testbench_motones_sim/sim_board/dbg_r_nw\r
  24 add wave -label addr       -radix hex sim:/testbench_motones_sim/sim_board/dbg_addr\r
  25 add wave -label d_io       -radix hex sim:/testbench_motones_sim/sim_board/dbg_d_io\r
  26 \r
  27 #add wave -label instruction -radix hex sim:/testbench_motones_sim/sim_board/dbg_instruction\r
  28 #add wave -label exec_cycle -radix hex sim:/testbench_motones_sim/sim_board/dbg_exec_cycle\r
  29 #add wave -label ea_carry   -radix decimal -unsigned  sim:/testbench_motones_sim/sim_board/dbg_ea_carry     \r
  30 #\r
  31 #add wave -divider regs\r
  32 #add wave -label pcl  -radix hex sim:/testbench_motones_sim/sim_board/dbg_ppu_ctrl\r
  33 #add wave -label pch  -radix hex sim:/testbench_motones_sim/sim_board/dbg_ppu_mask\r
  34 #add wave -label int_d_bus -radix hex sim:/testbench_motones_sim/sim_board/dbg_int_d_bus\r
  35 #add wave -label acc    -radix hex sim:/testbench_motones_sim/sim_board/dbg_acc\r
  36 #add wave -label sp     -radix hex sim:/testbench_motones_sim/sim_board/dbg_sp\r
  37 #add wave -label x      -radix hex sim:/testbench_motones_sim/sim_board/dbg_x\r
  38 #add wave -label y      -radix hex sim:/testbench_motones_sim/sim_board/dbg_y\r
  39 #add wave -label status -radix hex sim:/testbench_motones_sim/sim_board/dbg_status\r
  40 \r
  41 \r
  42 add wave -divider ppu\r
  43 add wave -label ppu_clk    sim:/testbench_motones_sim/sim_board/dbg_ppu_clk\r
  44 add wave -label ppu_ce_n          sim:/testbench_motones_sim/sim_board/dbg_ppu_ce_n\r
  45 add wave -label ppu_ctrl  -radix hex sim:/testbench_motones_sim/sim_board/dbg_ppu_ctrl\r
  46 add wave -label ppu_mask  -radix hex sim:/testbench_motones_sim/sim_board/dbg_ppu_mask\r
  47 add wave -label ppu_status   -radix hex sim:/testbench_motones_sim/sim_board/dbg_ppu_status\r
  48 add wave -label ppu_addr -radix hex sim:/testbench_motones_sim/sim_board/dbg_ppu_addr\r
  49 add wave -label ppu_data -radix hex sim:/testbench_motones_sim/sim_board/dbg_ppu_data\r
  50 #add wave -label ppu_scrl_x -radix decimal -unsigned  sim:/testbench_motones_sim/sim_board/dbg_ppu_scrl_x\r
  51 #add wave -label ppu_scrl_y -radix decimal -unsigned  sim:/testbench_motones_sim/sim_board/dbg_ppu_scrl_y\r
  52 \r
  53 \r
  54 add wave -divider vga_pos\r
  55 add wave -label emu_ppu_clk     sim:/testbench_motones_sim/sim_board/dbg_emu_ppu_clk\r
  56 add wave -label nes_x           -radix decimal -unsigned  {sim:/testbench_motones_sim/sim_board/dbg_exec_cycle(0) & \r
  57                                                            sim:/testbench_motones_sim/sim_board/dbg_instruction(7 downto 0)}\r
  58 add wave -label nes_y           -radix decimal -unsigned  {sim:/testbench_motones_sim/sim_board/dbg_exec_cycle(4) & \r
  59                                                            sim:/testbench_motones_sim/sim_board/dbg_status(7 downto 0)}\r
  60 #add wave -label dbg_disp_nt     -radix hex sim:/testbench_motones_sim/sim_board/dbg_disp_nt\r
  61 #add wave -label dbg_disp_attr   -radix hex sim:/testbench_motones_sim/sim_board/dbg_disp_attr\r
  62 #add wave -label dbg_disp_ptn_h  -radix hex sim:/testbench_motones_sim/sim_board/dbg_disp_ptn_h\r
  63 #add wave -label dbg_disp_ptn_l  -radix hex sim:/testbench_motones_sim/sim_board/dbg_disp_ptn_l\r
  64 \r
  65 add wave -divider vram\r
  66 add wave -label ale sim:/testbench_motones_sim/sim_board/dbg_ppu_scrl_x(0)\r
  67 add wave -label rd_n sim:/testbench_motones_sim/sim_board/dbg_ppu_scrl_x(1)\r
  68 add wave -label wr_n sim:/testbench_motones_sim/sim_board/dbg_ppu_scrl_x(2)\r
  69 \r
  70 add wave  -radix hex -label v_addr  {sim:/testbench_motones_sim/sim_board/dbg_vram_a(13 downto 8) & \r
  71                                      sim:/testbench_motones_sim/sim_board/dbg_vram_ad(7 downto 0)}\r
  72 add wave  -radix hex -label vram_ad sim:/testbench_motones_sim/sim_board/dbg_vram_ad\r
  73 \r
  74 add wave -divider oam\r
  75 add wave  -radix hex -label p_oam_addr {sim:/testbench_motones_sim/sim_board/dbg_disp_ptn_l (7 downto 0)}\r
  76 add wave  -radix hex -label p_oam_data {sim:/testbench_motones_sim/sim_board/dbg_disp_ptn_l (15 downto 8)}\r
  77 add wave  -radix hex -label s_oam_addr {sim:/testbench_motones_sim/sim_board/dbg_int_d_bus (4 downto 0)}\r
  78 add wave  -radix hex -label s_oam_data sim:/testbench_motones_sim/sim_board/dbg_ppu_scrl_y\r
  79 \r
  80 add wave -divider vga_out\r
  81 add wave -label h_sync_n    sim:/testbench_motones_sim/sim_board/v_sync_n\r
  82 add wave -label v_sync_n    sim:/testbench_motones_sim/sim_board/h_sync_n\r
  83 add wave -label r           -radix hex sim:/testbench_motones_sim/sim_board/r\r
  84 add wave -label g           -radix hex sim:/testbench_motones_sim/sim_board/g\r
  85 add wave -label b           -radix hex sim:/testbench_motones_sim/sim_board/b\r
  86 \r
  87 \r
  88 view structure\r
  89 view signals\r
  90 #run -all\r
  91 run 30 us\r
  92 wave zoom full\r
  93 \r
  94 #wave zoom range 3339700 ps 5138320 ps\r
  95 ##wave addcursor 907923400 ps\r
  96 \r
  97 run 50 us\r