disas/nanomips.cpp

   1 /*
   2  *  Source file for nanoMIPS disassembler component of QEMU
   3  *
   4  *  Copyright (C) 2018  Wave Computing, Inc.
   5  *  Copyright (C) 2018  Matthew Fortune <matthew.fortune@mips.com>
   6  *  Copyright (C) 2018  Aleksandar Markovic <amarkovic@wavecomp.com>
   7  *
   8  *  This program is free software: you can redistribute it and/or modify
   9  *  it under the terms of the GNU General Public License as published by
  10  *  the Free Software Foundation, either version 2 of the License, or
  11  *  (at your option) any later version.
  12  *
  13  *  This program is distributed in the hope that it will be useful,
  14  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  *  GNU General Public License for more details.
  17  *
  18  *  You should have received a copy of the GNU General Public License
  19  *  along with this program.  If not, see <https://www.gnu.org/licenses/>.
  20  *
  21  */
  22
  23 extern "C" {
  24 #include "qemu/osdep.h"
  25 #include "disas/bfd.h"
  26 }
  27
  28 #include <cstring>
  29 #include <stdexcept>
  30 #include <sstream>
  31 #include <stdio.h>
  32 #include <stdarg.h>
  33
  34 #include "nanomips.h"
  35
  36 #define IMGASSERTONCE(test)
  37
  38
  39 int nanomips_dis(char *buf,
  40                  unsigned address,
  41                  unsigned short one,
  42                  unsigned short two,
  43                  unsigned short three)
  44 {
  45     std::string disasm;
  46     uint16 bits[3] = {one, two, three};
  47
  48     NMD::TABLE_ENTRY_TYPE type;
  49     NMD d(address, NMD::ALL_ATTRIBUTES);
  50     int size = d.Disassemble(bits, disasm, type);
  51
  52     strcpy(buf, disasm.c_str());
  53     return size;
  54 }
  55
  56 int print_insn_nanomips(bfd_vma memaddr, struct disassemble_info *info)
  57 {
  58     int status;
  59     bfd_byte buffer[2];
  60     uint16_t insn1 = 0, insn2 = 0, insn3 = 0;
  61     char buf[200];
  62
  63     info->bytes_per_chunk = 2;
  64     info->display_endian = info->endian;
  65     info->insn_info_valid = 1;
  66     info->branch_delay_insns = 0;
  67     info->data_size = 0;
  68     info->insn_type = dis_nonbranch;
  69     info->target = 0;
  70     info->target2 = 0;
  71
  72     status = (*info->read_memory_func)(memaddr, buffer, 2, info);
  73     if (status != 0) {
  74         (*info->memory_error_func)(status, memaddr, info);
  75         return -1;
  76     }
  77
  78     if (info->endian == BFD_ENDIAN_BIG) {
  79         insn1 = bfd_getb16(buffer);
  80     } else {
  81         insn1 = bfd_getl16(buffer);
  82     }
  83     (*info->fprintf_func)(info->stream, "%04x ", insn1);
  84
  85     /* Handle 32-bit opcodes.  */
  86     if ((insn1 & 0x1000) == 0) {
  87         status = (*info->read_memory_func)(memaddr + 2, buffer, 2, info);
  88         if (status != 0) {
  89             (*info->memory_error_func)(status, memaddr + 2, info);
  90             return -1;
  91         }
  92
  93         if (info->endian == BFD_ENDIAN_BIG) {
  94             insn2 = bfd_getb16(buffer);
  95         } else {
  96             insn2 = bfd_getl16(buffer);
  97         }
  98         (*info->fprintf_func)(info->stream, "%04x ", insn2);
  99     } else {
 100         (*info->fprintf_func)(info->stream, "     ");
 101     }
 102     /* Handle 48-bit opcodes.  */
 103     if ((insn1 >> 10) == 0x18) {
 104         status = (*info->read_memory_func)(memaddr + 4, buffer, 2, info);
 105         if (status != 0) {
 106             (*info->memory_error_func)(status, memaddr + 4, info);
 107             return -1;
 108         }
 109
 110         if (info->endian == BFD_ENDIAN_BIG) {
 111             insn3 = bfd_getb16(buffer);
 112         } else {
 113             insn3 = bfd_getl16(buffer);
 114         }
 115         (*info->fprintf_func)(info->stream, "%04x ", insn3);
 116     } else {
 117         (*info->fprintf_func)(info->stream, "     ");
 118     }
 119
 120     int length = nanomips_dis(buf, memaddr, insn1, insn2, insn3);
 121
 122     /* FIXME: Should probably use a hash table on the major opcode here.  */
 123
 124     (*info->fprintf_func) (info->stream, "%s", buf);
 125     if (length > 0) {
 126         return length / 8;
 127     }
 128
 129     info->insn_type = dis_noninsn;
 130
 131     return insn3 ? 6 : insn2 ? 4 : 2;
 132 }
 133
 134
 135 namespace img
 136 {
 137     address addr32(address a)
 138     {
 139         return a;
 140     }
 141
 142     std::string format(const char *format, ...)
 143     {
 144         char buffer[256];
 145         va_list args;
 146         va_start(args, format);
 147         int err = vsprintf(buffer, format, args);
 148         if (err < 0) {
 149             perror(buffer);
 150         }
 151         va_end(args);
 152         return buffer;
 153     }
 154
 155     std::string format(const char *format,
 156                        std::string s)
 157     {
 158         char buffer[256];
 159
 160         sprintf(buffer, format, s.c_str());
 161
 162         return buffer;
 163     }
 164
 165     std::string format(const char *format,
 166                        std::string s1,
 167                        std::string s2)
 168     {
 169         char buffer[256];
 170
 171         sprintf(buffer, format, s1.c_str(), s2.c_str());
 172
 173         return buffer;
 174     }
 175
 176     std::string format(const char *format,
 177                        std::string s1,
 178                        std::string s2,
 179                        std::string s3)
 180     {
 181         char buffer[256];
 182
 183         sprintf(buffer, format, s1.c_str(), s2.c_str(), s3.c_str());
 184
 185         return buffer;
 186     }
 187
 188     std::string format(const char *format,
 189                        std::string s1,
 190                        std::string s2,
 191                        std::string s3,
 192                        std::string s4)
 193     {
 194         char buffer[256];
 195
 196         sprintf(buffer, format, s1.c_str(), s2.c_str(), s3.c_str(),
 197                                 s4.c_str());
 198
 199         return buffer;
 200     }
 201
 202     std::string format(const char *format,
 203                        std::string s1,
 204                        std::string s2,
 205                        std::string s3,
 206                        std::string s4,
 207                        std::string s5)
 208     {
 209         char buffer[256];
 210
 211         sprintf(buffer, format, s1.c_str(), s2.c_str(), s3.c_str(),
 212                                 s4.c_str(), s5.c_str());
 213
 214         return buffer;
 215     }
 216
 217     std::string format(const char *format,
 218                        uint64 d,
 219                        std::string s2)
 220     {
 221         char buffer[256];
 222
 223         sprintf(buffer, format, d, s2.c_str());
 224
 225         return buffer;
 226     }
 227
 228     std::string format(const char *format,
 229                        std::string s1,
 230                        uint64 d,
 231                        std::string s2)
 232     {
 233         char buffer[256];
 234
 235         sprintf(buffer, format, s1.c_str(), d, s2.c_str());
 236
 237         return buffer;
 238     }
 239
 240     std::string format(const char *format,
 241                        std::string s1,
 242                        std::string s2,
 243                        uint64 d)
 244     {
 245         char buffer[256];
 246
 247         sprintf(buffer, format, s1.c_str(), s2.c_str(), d);
 248
 249         return buffer;
 250     }
 251
 252     char as_char(int c)
 253     {
 254         return static_cast<char>(c);
 255     }
 256 };
 257
 258
 259 std::string to_string(img::address a)
 260 {
 261     char buffer[256];
 262     sprintf(buffer, "0x%" PRIx64, a);
 263     return buffer;
 264 }
 265
 266
 267 uint64 extract_bits(uint64 data, uint32 bit_offset, uint32 bit_size)
 268 {
 269     return (data << (64 - (bit_size + bit_offset))) >> (64 - bit_size);
 270 }
 271
 272
 273 int64 sign_extend(int64 data, int msb)
 274 {
 275     uint64 shift = 63 - msb;
 276     return (data << shift) >> shift;
 277 }
 278
 279
 280 uint64 NMD::renumber_registers(uint64 index, uint64 *register_list,
 281                                size_t register_list_size)
 282 {
 283     if (index < register_list_size) {
 284         return register_list[index];
 285     }
 286
 287     throw std::runtime_error(img::format(
 288                    "Invalid register mapping index %" PRIu64
 289                    ", size of list = %zu",
 290                    index, register_list_size));
 291 }
 292
 293
 294 /*
 295  * these functions should be decode functions but the json does not have
 296  * decode sections so they are based on the encode, the equivalent decode
 297  * functions need writing eventually.
 298  */
 299 uint64 NMD::decode_gpr_gpr3(uint64 d)
 300 {
 301     static uint64 register_list[] = { 16, 17, 18, 19,  4,  5,  6,  7 };
 302     return renumber_registers(d, register_list,
 303                sizeof(register_list) / sizeof(register_list[0]));
 304 }
 305
 306
 307 uint64 NMD::encode_gpr3_store(uint64 d)
 308 {
 309     static uint64 register_list[] = {  0, 17, 18, 19,  4,  5,  6,  7 };
 310     return renumber_registers(d, register_list,
 311                sizeof(register_list) / sizeof(register_list[0]));
 312 }
 313
 314
 315 uint64 NMD::encode_rd1_from_rd(uint64 d)
 316 {
 317     static uint64 register_list[] = {  4,  5 };
 318     return renumber_registers(d, register_list,
 319                sizeof(register_list) / sizeof(register_list[0]));
 320 }
 321
 322
 323 uint64 NMD::encode_gpr4_zero(uint64 d)
 324 {
 325     static uint64 register_list[] = {  8,  9, 10,  0,  4,  5,  6,  7,
 326                                       16, 17, 18, 19, 20, 21, 22, 23 };
 327     return renumber_registers(d, register_list,
 328                sizeof(register_list) / sizeof(register_list[0]));
 329 }
 330
 331
 332 uint64 NMD::encode_gpr4(uint64 d)
 333 {
 334     static uint64 register_list[] = {  8,  9, 10, 11,  4,  5,  6,  7,
 335                                       16, 17, 18, 19, 20, 21, 22, 23 };
 336     return renumber_registers(d, register_list,
 337                sizeof(register_list) / sizeof(register_list[0]));
 338 }
 339
 340
 341 uint64 NMD::encode_rd2_reg1(uint64 d)
 342 {
 343     static uint64 register_list[] = {  4,  5,  6,  7 };
 344     return renumber_registers(d, register_list,
 345                sizeof(register_list) / sizeof(register_list[0]));
 346 }
 347
 348
 349 uint64 NMD::encode_rd2_reg2(uint64 d)
 350 {
 351     static uint64 register_list[] = {  5,  6,  7,  8 };
 352     return renumber_registers(d, register_list,
 353                sizeof(register_list) / sizeof(register_list[0]));
 354 }
 355
 356
 357 uint64 NMD::copy(uint64 d)
 358 {
 359     return d;
 360 }
 361
 362
 363 int64 NMD::copy(int64 d)
 364 {
 365     return d;
 366 }
 367
 368
 369 int64 NMD::neg_copy(uint64 d)
 370 {
 371     return 0ll - d;
 372 }
 373
 374
 375 int64 NMD::neg_copy(int64 d)
 376 {
 377     return -d;
 378 }
 379
 380
 381 /* strange wrapper around  gpr3 */
 382 uint64 NMD::encode_rs3_and_check_rs3_ge_rt3(uint64 d)
 383 {
 384 return decode_gpr_gpr3(d);
 385 }
 386
 387
 388 /* strange wrapper around  gpr3 */
 389 uint64 NMD::encode_rs3_and_check_rs3_lt_rt3(uint64 d)
 390 {
 391     return decode_gpr_gpr3(d);
 392 }
 393
 394
 395 /* nop - done by extraction function */
 396 uint64 NMD::encode_s_from_address(uint64 d)
 397 {
 398     return d;
 399 }
 400
 401
 402 /* nop - done by extraction function */
 403 uint64 NMD::encode_u_from_address(uint64 d)
 404 {
 405     return d;
 406 }
 407
 408
 409 /* nop - done by extraction function */
 410 uint64 NMD::encode_s_from_s_hi(uint64 d)
 411 {
 412     return d;
 413 }
 414
 415
 416 uint64 NMD::encode_count3_from_count(uint64 d)
 417 {
 418     IMGASSERTONCE(d < 8);
 419     return d == 0ull ? 8ull : d;
 420 }
 421
 422
 423 uint64 NMD::encode_shift3_from_shift(uint64 d)
 424 {
 425     IMGASSERTONCE(d < 8);
 426     return d == 0ull ? 8ull : d;
 427 }
 428
 429
 430 /* special value for load literal */
 431 int64 NMD::encode_eu_from_s_li16(uint64 d)
 432 {
 433     IMGASSERTONCE(d < 128);
 434     return d == 127 ? -1 : (int64)d;
 435 }
 436
 437
 438 uint64 NMD::encode_msbd_from_size(uint64 d)
 439 {
 440     IMGASSERTONCE(d < 32);
 441     return d + 1;
 442 }
 443
 444
 445 uint64 NMD::encode_eu_from_u_andi16(uint64 d)
 446 {
 447     IMGASSERTONCE(d < 16);
 448     if (d == 12) {
 449         return 0x00ffull;
 450     }
 451     if (d == 13) {
 452         return 0xffffull;
 453     }
 454     return d;
 455 }
 456
 457
 458 uint64 NMD::encode_msbd_from_pos_and_size(uint64 d)
 459 {
 460     IMGASSERTONCE(0);
 461     return d;
 462 }
 463
 464
 465 /* save16 / restore16   ???? */
 466 uint64 NMD::encode_rt1_from_rt(uint64 d)
 467 {
 468     return d ? 31 : 30;
 469 }
 470
 471
 472 /* ? */
 473 uint64 NMD::encode_lsb_from_pos_and_size(uint64 d)
 474 {
 475     return d;
 476 }
 477
 478
 479 std::string NMD::save_restore_list(uint64 rt, uint64 count, uint64 gp)
 480 {
 481     std::string str;
 482
 483     for (uint64 counter = 0; counter != count; counter++) {
 484         bool use_gp = gp && (counter == count - 1);
 485         uint64 this_rt = use_gp ? 28 : ((rt & 0x10) | (rt + counter)) & 0x1f;
 486         str += img::format(",%s", GPR(this_rt));
 487     }
 488
 489     return str;
 490 }
 491
 492
 493 std::string NMD::GPR(uint64 reg)
 494 {
 495     static const char *gpr_reg[32] = {
 496         "zero", "at",   "v0",   "v1",   "a0",   "a1",   "a2",   "a3",
 497         "a4",   "a5",   "a6",   "a7",   "r12",  "r13",  "r14",  "r15",
 498         "s0",   "s1",   "s2",   "s3",   "s4",   "s5",   "s6",   "s7",
 499         "r24",  "r25",  "k0",   "k1",   "gp",   "sp",   "fp",   "ra"
 500     };
 501
 502     if (reg < 32) {
 503         return gpr_reg[reg];
 504     }
 505
 506     throw std::runtime_error(img::format("Invalid GPR register index %" PRIu64,
 507                                          reg));
 508 }
 509
 510
 511 std::string NMD::FPR(uint64 reg)
 512 {
 513     static const char *fpr_reg[32] = {
 514         "f0",  "f1",  "f2",  "f3",  "f4",  "f5",  "f6",  "f7",
 515         "f8",  "f9",  "f10", "f11", "f12", "f13", "f14", "f15",
 516         "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
 517         "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31"
 518     };
 519
 520     if (reg < 32) {
 521         return fpr_reg[reg];
 522     }
 523
 524     throw std::runtime_error(img::format("Invalid FPR register index %" PRIu64,
 525                                          reg));
 526 }
 527
 528
 529 std::string NMD::AC(uint64 reg)
 530 {
 531     static const char *ac_reg[4] = {
 532         "ac0",  "ac1",  "ac2",  "ac3"
 533     };
 534
 535     if (reg < 4) {
 536         return ac_reg[reg];
 537     }
 538
 539     throw std::runtime_error(img::format("Invalid AC register index %" PRIu64,
 540                                          reg));
 541 }
 542
 543
 544 std::string NMD::IMMEDIATE(uint64 value)
 545 {
 546     return img::format("0x%" PRIx64, value);
 547 }
 548
 549
 550 std::string NMD::IMMEDIATE(int64 value)
 551 {
 552     return img::format("%" PRId64, value);
 553 }
 554
 555
 556 std::string NMD::CPR(uint64 reg)
 557 {
 558     /* needs more work */
 559     return img::format("CP%" PRIu64, reg);
 560 }
 561
 562
 563 std::string NMD::ADDRESS(uint64 value, int instruction_size)
 564 {
 565     /* token for string replace */
 566     /* const char TOKEN_REPLACE = (char)0xa2; */
 567     img::address address = m_pc + value + instruction_size;
 568     /* symbol replacement */
 569     /* return img::as_char(TOKEN_REPLACE) + to_string(address); */
 570     return to_string(address);
 571 }
 572
 573
 574 uint64 NMD::extract_op_code_value(const uint16 * data, int size)
 575 {
 576     switch (size) {
 577     case 16:
 578         return data[0];
 579     case 32:
 580         return ((uint64)data[0] << 16) | data[1];
 581     case 48:
 582         return ((uint64)data[0] << 32) | ((uint64)data[1] << 16) | data[2];
 583     default:
 584         return data[0];
 585     }
 586 }
 587
 588
 589 int NMD::Disassemble(const uint16 * data, std::string & dis,
 590                      NMD::TABLE_ENTRY_TYPE & type)
 591 {
 592     return Disassemble(data, dis, type, MAJOR, 2);
 593 }
 594
 595
 596 /*
 597  * Recurse through tables until the instruction is found then return
 598  * the string and size
 599  *
 600  * inputs:
 601  *      pointer to a word stream,
 602  *      disassember table and size
 603  * returns:
 604  *      instruction size    - negative is error
 605  *      disassembly string  - on error will constain error string
 606  */
 607 int NMD::Disassemble(const uint16 * data, std::string & dis,
 608                      NMD::TABLE_ENTRY_TYPE & type, const Pool *table,
 609                      int table_size)
 610 {
 611     try
 612     {
 613         for (int i = 0; i < table_size; i++) {
 614             uint64 op_code = extract_op_code_value(data,
 615                                  table[i].instructions_size);
 616             if ((op_code & table[i].mask) == table[i].value) {
 617                 /* possible match */
 618                 conditional_function cond = table[i].condition;
 619                 if ((cond == 0) || (this->*cond)(op_code)) {
 620                     try
 621                     {
 622                         if (table[i].type == pool) {
 623                             return Disassemble(data, dis, type,
 624                                                table[i].next_table,
 625                                                table[i].next_table_size);
 626                         } else if ((table[i].type == instruction) ||
 627                                    (table[i].type == call_instruction) ||
 628                                    (table[i].type == branch_instruction) ||
 629                                    (table[i].type == return_instruction)) {
 630                             if ((table[i].attributes != 0) &&
 631                                 (m_requested_instruction_categories &
 632                                  table[i].attributes) == 0) {
 633                                 /*
 634                                  * failed due to instruction having
 635                                  * an ASE attribute and the requested version
 636                                  * not having that attribute
 637                                  */
 638                                 dis = "ASE attribute missmatch";
 639                                 return -5;
 640                             }
 641                             disassembly_function dis_fn = table[i].disassembly;
 642                             if (dis_fn == 0) {
 643                                 dis = "disassembler failure - bad table entry";
 644                                 return -6;
 645                             }
 646                             type = table[i].type;
 647                             dis = (this->*dis_fn)(op_code);
 648                             return table[i].instructions_size;
 649                         } else {
 650                             dis = "reserved instruction";
 651                             return -2;
 652                         }
 653                     }
 654                     catch (std::runtime_error & e)
 655                     {
 656                         dis = e.what();
 657                         return -3;          /* runtime error */
 658                     }
 659                 }
 660             }
 661         }
 662     }
 663     catch (std::exception & e)
 664     {
 665         dis = e.what();
 666         return -4;          /* runtime error */
 667     }
 668
 669     dis = "failed to disassemble";
 670     return -1;      /* failed to disassemble        */
 671 }
 672
 673
 674 uint64 NMD::extract_code_18_to_0(uint64 instruction)
 675 {
 676     uint64 value = 0;
 677     value |= extract_bits(instruction, 0, 19);
 678     return value;
 679 }
 680
 681
 682 uint64 NMD::extract_shift3_2_1_0(uint64 instruction)
 683 {
 684     uint64 value = 0;
 685     value |= extract_bits(instruction, 0, 3);
 686     return value;
 687 }
 688
 689
 690 uint64 NMD::extract_u_11_10_9_8_7_6_5_4_3__s3(uint64 instruction)
 691 {
 692     uint64 value = 0;
 693     value |= extract_bits(instruction, 3, 9) << 3;
 694     return value;
 695 }
 696
 697
 698 uint64 NMD::extract_count_3_2_1_0(uint64 instruction)
 699 {
 700     uint64 value = 0;
 701     value |= extract_bits(instruction, 0, 4);
 702     return value;
 703 }
 704
 705
 706 uint64 NMD::extract_rtz3_9_8_7(uint64 instruction)
 707 {
 708     uint64 value = 0;
 709     value |= extract_bits(instruction, 7, 3);
 710     return value;
 711 }
 712
 713
 714 uint64 NMD::extract_u_17_to_1__s1(uint64 instruction)
 715 {
 716     uint64 value = 0;
 717     value |= extract_bits(instruction, 1, 17) << 1;
 718     return value;
 719 }
 720
 721
 722 int64 NMD::extract_s__se9_20_19_18_17_16_15_14_13_12_11(uint64 instruction)
 723 {
 724     int64 value = 0;
 725     value |= extract_bits(instruction, 11, 10);
 726     value = sign_extend(value, 9);
 727     return value;
 728 }
 729
 730
 731 int64 NMD::extract_s__se11_0_10_9_8_7_6_5_4_3_2_1_0_s1(uint64 instruction)
 732 {
 733     int64 value = 0;
 734     value |= extract_bits(instruction, 0, 1) << 11;
 735     value |= extract_bits(instruction, 1, 10) << 1;
 736     value = sign_extend(value, 11);
 737     return value;
 738 }
 739
 740
 741 uint64 NMD::extract_u_10(uint64 instruction)
 742 {
 743     uint64 value = 0;
 744     value |= extract_bits(instruction, 10, 1);
 745     return value;
 746 }
 747
 748
 749 uint64 NMD::extract_rtz4_27_26_25_23_22_21(uint64 instruction)
 750 {
 751     uint64 value = 0;
 752     value |= extract_bits(instruction, 21, 3);
 753     value |= extract_bits(instruction, 25, 1) << 3;
 754     return value;
 755 }
 756
 757
 758 uint64 NMD::extract_sa_15_14_13_12_11(uint64 instruction)
 759 {
 760     uint64 value = 0;
 761     value |= extract_bits(instruction, 11, 5);
 762     return value;
 763 }
 764
 765
 766 uint64 NMD::extract_shift_4_3_2_1_0(uint64 instruction)
 767 {
 768     uint64 value = 0;
 769     value |= extract_bits(instruction, 0, 5);
 770     return value;
 771 }
 772
 773
 774 uint64 NMD::extract_shiftx_10_9_8_7__s1(uint64 instruction)
 775 {
 776     uint64 value = 0;
 777     value |= extract_bits(instruction, 7, 4) << 1;
 778     return value;
 779 }
 780
 781
 782 uint64 NMD::extract_hint_25_24_23_22_21(uint64 instruction)
 783 {
 784     uint64 value = 0;
 785     value |= extract_bits(instruction, 21, 5);
 786     return value;
 787 }
 788
 789
 790 uint64 NMD::extract_count3_14_13_12(uint64 instruction)
 791 {
 792     uint64 value = 0;
 793     value |= extract_bits(instruction, 12, 3);
 794     return value;
 795 }
 796
 797
 798 int64 NMD::extract_s__se31_0_11_to_2_20_to_12_s12(uint64 instruction)
 799 {
 800     int64 value = 0;
 801     value |= extract_bits(instruction, 0, 1) << 31;
 802     value |= extract_bits(instruction, 2, 10) << 21;
 803     value |= extract_bits(instruction, 12, 9) << 12;
 804     value = sign_extend(value, 31);
 805     return value;
 806 }
 807
 808
 809 int64 NMD::extract_s__se7_0_6_5_4_3_2_1_s1(uint64 instruction)
 810 {
 811     int64 value = 0;
 812     value |= extract_bits(instruction, 0, 1) << 7;
 813     value |= extract_bits(instruction, 1, 6) << 1;
 814     value = sign_extend(value, 7);
 815     return value;
 816 }
 817
 818
 819 uint64 NMD::extract_u2_10_9(uint64 instruction)
 820 {
 821     uint64 value = 0;
 822     value |= extract_bits(instruction, 9, 2);
 823     return value;
 824 }
 825
 826
 827 uint64 NMD::extract_code_25_24_23_22_21_20_19_18_17_16(uint64 instruction)
 828 {
 829     uint64 value = 0;
 830     value |= extract_bits(instruction, 16, 10);
 831     return value;
 832 }
 833
 834
 835 uint64 NMD::extract_rs_20_19_18_17_16(uint64 instruction)
 836 {
 837     uint64 value = 0;
 838     value |= extract_bits(instruction, 16, 5);
 839     return value;
 840 }
 841
 842
 843 uint64 NMD::extract_u_2_1__s1(uint64 instruction)
 844 {
 845     uint64 value = 0;
 846     value |= extract_bits(instruction, 1, 2) << 1;
 847     return value;
 848 }
 849
 850
 851 uint64 NMD::extract_stripe_6(uint64 instruction)
 852 {
 853     uint64 value = 0;
 854     value |= extract_bits(instruction, 6, 1);
 855     return value;
 856 }
 857
 858
 859 uint64 NMD::extract_ac_13_12(uint64 instruction)
 860 {
 861     uint64 value = 0;
 862     value |= extract_bits(instruction, 14, 2);
 863     return value;
 864 }
 865
 866
 867 uint64 NMD::extract_shift_20_19_18_17_16(uint64 instruction)
 868 {
 869     uint64 value = 0;
 870     value |= extract_bits(instruction, 16, 5);
 871     return value;
 872 }
 873
 874
 875 uint64 NMD::extract_rdl_25_24(uint64 instruction)
 876 {
 877     uint64 value = 0;
 878     value |= extract_bits(instruction, 24, 1);
 879     return value;
 880 }
 881
 882
 883 int64 NMD::extract_s__se10_0_9_8_7_6_5_4_3_2_1_s1(uint64 instruction)
 884 {
 885     int64 value = 0;
 886     value |= extract_bits(instruction, 0, 1) << 10;
 887     value |= extract_bits(instruction, 1, 9) << 1;
 888     value = sign_extend(value, 10);
 889     return value;
 890 }
 891
 892
 893 uint64 NMD::extract_eu_6_5_4_3_2_1_0(uint64 instruction)
 894 {
 895     uint64 value = 0;
 896     value |= extract_bits(instruction, 0, 7);
 897     return value;
 898 }
 899
 900
 901 uint64 NMD::extract_shift_5_4_3_2_1_0(uint64 instruction)
 902 {
 903     uint64 value = 0;
 904     value |= extract_bits(instruction, 0, 6);
 905     return value;
 906 }
 907
 908
 909 uint64 NMD::extract_count_19_18_17_16(uint64 instruction)
 910 {
 911     uint64 value = 0;
 912     value |= extract_bits(instruction, 16, 4);
 913     return value;
 914 }
 915
 916
 917 uint64 NMD::extract_code_2_1_0(uint64 instruction)
 918 {
 919     uint64 value = 0;
 920     value |= extract_bits(instruction, 0, 3);
 921     return value;
 922 }
 923
 924
 925 uint64 NMD::extract_u_11_10_9_8_7_6_5_4_3_2_1_0(uint64 instruction)
 926 {
 927     uint64 value = 0;
 928     value |= extract_bits(instruction, 0, 12);
 929     return value;
 930 }
 931
 932
 933 uint64 NMD::extract_rs_4_3_2_1_0(uint64 instruction)
 934 {
 935     uint64 value = 0;
 936     value |= extract_bits(instruction, 0, 5);
 937     return value;
 938 }
 939
 940
 941 uint64 NMD::extract_u_20_to_3__s3(uint64 instruction)
 942 {
 943     uint64 value = 0;
 944     value |= extract_bits(instruction, 3, 18) << 3;
 945     return value;
 946 }
 947
 948
 949 uint64 NMD::extract_u_3_2_1_0__s2(uint64 instruction)
 950 {
 951     uint64 value = 0;
 952     value |= extract_bits(instruction, 0, 4) << 2;
 953     return value;
 954 }
 955
 956
 957 uint64 NMD::extract_cofun_25_24_23(uint64 instruction)
 958 {
 959     uint64 value = 0;
 960     value |= extract_bits(instruction, 3, 23);
 961     return value;
 962 }
 963
 964
 965 uint64 NMD::extract_u_2_1_0__s2(uint64 instruction)
 966 {
 967     uint64 value = 0;
 968     value |= extract_bits(instruction, 0, 3) << 2;
 969     return value;
 970 }
 971
 972
 973 uint64 NMD::extract_rd3_3_2_1(uint64 instruction)
 974 {
 975     uint64 value = 0;
 976     value |= extract_bits(instruction, 1, 3);
 977     return value;
 978 }
 979
 980
 981 uint64 NMD::extract_sa_15_14_13_12(uint64 instruction)
 982 {
 983     uint64 value = 0;
 984     value |= extract_bits(instruction, 12, 4);
 985     return value;
 986 }
 987
 988
 989 uint64 NMD::extract_rt_25_24_23_22_21(uint64 instruction)
 990 {
 991     uint64 value = 0;
 992     value |= extract_bits(instruction, 21, 5);
 993     return value;
 994 }
 995
 996
 997 uint64 NMD::extract_ru_7_6_5_4_3(uint64 instruction)
 998 {
 999     uint64 value = 0;
1000     value |= extract_bits(instruction, 3, 5);
1001     return value;
1002 }
1003
1004
1005 uint64 NMD::extract_u_17_to_0(uint64 instruction)
1006 {
1007     uint64 value = 0;
1008     value |= extract_bits(instruction, 0, 18);
1009     return value;
1010 }
1011
1012
1013 uint64 NMD::extract_rsz4_4_2_1_0(uint64 instruction)
1014 {
1015     uint64 value = 0;
1016     value |= extract_bits(instruction, 0, 3);
1017     value |= extract_bits(instruction, 4, 1) << 3;
1018     return value;
1019 }
1020
1021
1022 int64 NMD::extract_s__se21_0_20_to_1_s1(uint64 instruction)
1023 {
1024     int64 value = 0;
1025     value |= extract_bits(instruction, 0, 1) << 21;
1026     value |= extract_bits(instruction, 1, 20) << 1;
1027     value = sign_extend(value, 21);
1028     return value;
1029 }
1030
1031
1032 uint64 NMD::extract_op_25_to_3(uint64 instruction)
1033 {
1034     uint64 value = 0;
1035     value |= extract_bits(instruction, 3, 23);
1036     return value;
1037 }
1038
1039
1040 uint64 NMD::extract_rs4_4_2_1_0(uint64 instruction)
1041 {
1042     uint64 value = 0;
1043     value |= extract_bits(instruction, 0, 3);
1044     value |= extract_bits(instruction, 4, 1) << 3;
1045     return value;
1046 }
1047
1048
1049 uint64 NMD::extract_bit_23_22_21(uint64 instruction)
1050 {
1051     uint64 value = 0;
1052     value |= extract_bits(instruction, 21, 3);
1053     return value;
1054 }
1055
1056
1057 uint64 NMD::extract_rt_41_40_39_38_37(uint64 instruction)
1058 {
1059     uint64 value = 0;
1060     value |= extract_bits(instruction, 37, 5);
1061     return value;
1062 }
1063
1064
1065 int64 NMD::extract_shift__se5_21_20_19_18_17_16(uint64 instruction)
1066 {
1067     int64 value = 0;
1068     value |= extract_bits(instruction, 16, 6);
1069     value = sign_extend(value, 5);
1070     return value;
1071 }
1072
1073
1074 uint64 NMD::extract_rd2_3_8(uint64 instruction)
1075 {
1076     uint64 value = 0;
1077     value |= extract_bits(instruction, 3, 1) << 1;
1078     value |= extract_bits(instruction, 8, 1);
1079     return value;
1080 }
1081
1082
1083 uint64 NMD::extract_code_17_to_0(uint64 instruction)
1084 {
1085     uint64 value = 0;
1086     value |= extract_bits(instruction, 0, 18);
1087     return value;
1088 }
1089
1090
1091 uint64 NMD::extract_size_20_19_18_17_16(uint64 instruction)
1092 {
1093     uint64 value = 0;
1094     value |= extract_bits(instruction, 16, 5);
1095     return value;
1096 }
1097
1098
1099 int64 NMD::extract_s__se8_15_7_6_5_4_3_2_s2(uint64 instruction)
1100 {
1101     int64 value = 0;
1102     value |= extract_bits(instruction, 2, 6) << 2;
1103     value |= extract_bits(instruction, 15, 1) << 8;
1104     value = sign_extend(value, 8);
1105     return value;
1106 }
1107
1108
1109 uint64 NMD::extract_u_15_to_0(uint64 instruction)
1110 {
1111     uint64 value = 0;
1112     value |= extract_bits(instruction, 0, 16);
1113     return value;
1114 }
1115
1116
1117 uint64 NMD::extract_fs_20_19_18_17_16(uint64 instruction)
1118 {
1119     uint64 value = 0;
1120     value |= extract_bits(instruction, 16, 5);
1121     return value;
1122 }
1123
1124
1125 int64 NMD::extract_s__se8_15_7_6_5_4_3_2_1_0(uint64 instruction)
1126 {
1127     int64 value = 0;
1128     value |= extract_bits(instruction, 0, 8);
1129     value |= extract_bits(instruction, 15, 1) << 8;
1130     value = sign_extend(value, 8);
1131     return value;
1132 }
1133
1134
1135 uint64 NMD::extract_stype_20_19_18_17_16(uint64 instruction)
1136 {
1137     uint64 value = 0;
1138     value |= extract_bits(instruction, 16, 5);
1139     return value;
1140 }
1141
1142
1143 uint64 NMD::extract_rtl_11(uint64 instruction)
1144 {
1145     uint64 value = 0;
1146     value |= extract_bits(instruction, 9, 1);
1147     return value;
1148 }
1149
1150
1151 uint64 NMD::extract_hs_20_19_18_17_16(uint64 instruction)
1152 {
1153     uint64 value = 0;
1154     value |= extract_bits(instruction, 16, 5);
1155     return value;
1156 }
1157
1158
1159 uint64 NMD::extract_sel_13_12_11(uint64 instruction)
1160 {
1161     uint64 value = 0;
1162     value |= extract_bits(instruction, 11, 3);
1163     return value;
1164 }
1165
1166
1167 uint64 NMD::extract_lsb_4_3_2_1_0(uint64 instruction)
1168 {
1169     uint64 value = 0;
1170     value |= extract_bits(instruction, 0, 5);
1171     return value;
1172 }
1173
1174
1175 uint64 NMD::extract_gp_2(uint64 instruction)
1176 {
1177     uint64 value = 0;
1178     value |= extract_bits(instruction, 2, 1);
1179     return value;
1180 }
1181
1182
1183 uint64 NMD::extract_rt3_9_8_7(uint64 instruction)
1184 {
1185     uint64 value = 0;
1186     value |= extract_bits(instruction, 7, 3);
1187     return value;
1188 }
1189
1190
1191 uint64 NMD::extract_ft_25_24_23_22_21(uint64 instruction)
1192 {
1193     uint64 value = 0;
1194     value |= extract_bits(instruction, 21, 5);
1195     return value;
1196 }
1197
1198
1199 uint64 NMD::extract_u_17_16_15_14_13_12_11(uint64 instruction)
1200 {
1201     uint64 value = 0;
1202     value |= extract_bits(instruction, 11, 7);
1203     return value;
1204 }
1205
1206
1207 uint64 NMD::extract_cs_20_19_18_17_16(uint64 instruction)
1208 {
1209     uint64 value = 0;
1210     value |= extract_bits(instruction, 16, 5);
1211     return value;
1212 }
1213
1214
1215 uint64 NMD::extract_rt4_9_7_6_5(uint64 instruction)
1216 {
1217     uint64 value = 0;
1218     value |= extract_bits(instruction, 5, 3);
1219     value |= extract_bits(instruction, 9, 1) << 3;
1220     return value;
1221 }
1222
1223
1224 uint64 NMD::extract_msbt_10_9_8_7_6(uint64 instruction)
1225 {
1226     uint64 value = 0;
1227     value |= extract_bits(instruction, 6, 5);
1228     return value;
1229 }
1230
1231
1232 uint64 NMD::extract_u_5_4_3_2_1_0__s2(uint64 instruction)
1233 {
1234     uint64 value = 0;
1235     value |= extract_bits(instruction, 0, 6) << 2;
1236     return value;
1237 }
1238
1239
1240 uint64 NMD::extract_sa_15_14_13(uint64 instruction)
1241 {
1242     uint64 value = 0;
1243     value |= extract_bits(instruction, 13, 3);
1244     return value;
1245 }
1246
1247
1248 int64 NMD::extract_s__se14_0_13_to_1_s1(uint64 instruction)
1249 {
1250     int64 value = 0;
1251     value |= extract_bits(instruction, 0, 1) << 14;
1252     value |= extract_bits(instruction, 1, 13) << 1;
1253     value = sign_extend(value, 14);
1254     return value;
1255 }
1256
1257
1258 uint64 NMD::extract_rs3_6_5_4(uint64 instruction)
1259 {
1260     uint64 value = 0;
1261     value |= extract_bits(instruction, 4, 3);
1262     return value;
1263 }
1264
1265
1266 uint64 NMD::extract_u_31_to_0__s32(uint64 instruction)
1267 {
1268     uint64 value = 0;
1269     value |= extract_bits(instruction, 0, 32) << 32;
1270     return value;
1271 }
1272
1273
1274 uint64 NMD::extract_shift_10_9_8_7_6(uint64 instruction)
1275 {
1276     uint64 value = 0;
1277     value |= extract_bits(instruction, 6, 5);
1278     return value;
1279 }
1280
1281
1282 uint64 NMD::extract_cs_25_24_23_22_21(uint64 instruction)
1283 {
1284     uint64 value = 0;
1285     value |= extract_bits(instruction, 21, 5);
1286     return value;
1287 }
1288
1289
1290 uint64 NMD::extract_shiftx_11_10_9_8_7_6(uint64 instruction)
1291 {
1292     uint64 value = 0;
1293     value |= extract_bits(instruction, 6, 6);
1294     return value;
1295 }
1296
1297
1298 uint64 NMD::extract_rt_9_8_7_6_5(uint64 instruction)
1299 {
1300     uint64 value = 0;
1301     value |= extract_bits(instruction, 5, 5);
1302     return value;
1303 }
1304
1305
1306 uint64 NMD::extract_op_25_24_23_22_21(uint64 instruction)
1307 {
1308     uint64 value = 0;
1309     value |= extract_bits(instruction, 21, 5);
1310     return value;
1311 }
1312
1313
1314 uint64 NMD::extract_u_6_5_4_3_2_1_0__s2(uint64 instruction)
1315 {
1316     uint64 value = 0;
1317     value |= extract_bits(instruction, 0, 7) << 2;
1318     return value;
1319 }
1320
1321
1322 uint64 NMD::extract_bit_16_15_14_13_12_11(uint64 instruction)
1323 {
1324     uint64 value = 0;
1325     value |= extract_bits(instruction, 11, 6);
1326     return value;
1327 }
1328
1329
1330 uint64 NMD::extract_mask_20_19_18_17_16_15_14(uint64 instruction)
1331 {
1332     uint64 value = 0;
1333     value |= extract_bits(instruction, 14, 7);
1334     return value;
1335 }
1336
1337
1338 uint64 NMD::extract_eu_3_2_1_0(uint64 instruction)
1339 {
1340     uint64 value = 0;
1341     value |= extract_bits(instruction, 0, 4);
1342     return value;
1343 }
1344
1345
1346 uint64 NMD::extract_u_7_6_5_4__s4(uint64 instruction)
1347 {
1348     uint64 value = 0;
1349     value |= extract_bits(instruction, 4, 4) << 4;
1350     return value;
1351 }
1352
1353
1354 int64 NMD::extract_s__se8_15_7_6_5_4_3_s3(uint64 instruction)
1355 {
1356     int64 value = 0;
1357     value |= extract_bits(instruction, 3, 5) << 3;
1358     value |= extract_bits(instruction, 15, 1) << 8;
1359     value = sign_extend(value, 8);
1360     return value;
1361 }
1362
1363
1364 uint64 NMD::extract_ft_15_14_13_12_11(uint64 instruction)
1365 {
1366     uint64 value = 0;
1367     value |= extract_bits(instruction, 11, 5);
1368     return value;
1369 }
1370
1371
1372 int64 NMD::extract_s__se31_15_to_0_31_to_16(uint64 instruction)
1373 {
1374     int64 value = 0;
1375     value |= extract_bits(instruction, 0, 16) << 16;
1376     value |= extract_bits(instruction, 16, 16);
1377     value = sign_extend(value, 31);
1378     return value;
1379 }
1380
1381
1382 uint64 NMD::extract_u_20_19_18_17_16_15_14_13(uint64 instruction)
1383 {
1384     uint64 value = 0;
1385     value |= extract_bits(instruction, 13, 8);
1386     return value;
1387 }
1388
1389
1390 uint64 NMD::extract_u_17_to_2__s2(uint64 instruction)
1391 {
1392     uint64 value = 0;
1393     value |= extract_bits(instruction, 2, 16) << 2;
1394     return value;
1395 }
1396
1397
1398 uint64 NMD::extract_rd_15_14_13_12_11(uint64 instruction)
1399 {
1400     uint64 value = 0;
1401     value |= extract_bits(instruction, 11, 5);
1402     return value;
1403 }
1404
1405
1406 uint64 NMD::extract_c0s_20_19_18_17_16(uint64 instruction)
1407 {
1408     uint64 value = 0;
1409     value |= extract_bits(instruction, 16, 5);
1410     return value;
1411 }
1412
1413
1414 uint64 NMD::extract_code_1_0(uint64 instruction)
1415 {
1416     uint64 value = 0;
1417     value |= extract_bits(instruction, 0, 2);
1418     return value;
1419 }
1420
1421
1422 int64 NMD::extract_s__se25_0_24_to_1_s1(uint64 instruction)
1423 {
1424     int64 value = 0;
1425     value |= extract_bits(instruction, 0, 1) << 25;
1426     value |= extract_bits(instruction, 1, 24) << 1;
1427     value = sign_extend(value, 25);
1428     return value;
1429 }
1430
1431
1432 uint64 NMD::extract_u_1_0(uint64 instruction)
1433 {
1434     uint64 value = 0;
1435     value |= extract_bits(instruction, 0, 2);
1436     return value;
1437 }
1438
1439
1440 uint64 NMD::extract_u_3_8__s2(uint64 instruction)
1441 {
1442     uint64 value = 0;
1443     value |= extract_bits(instruction, 3, 1) << 3;
1444     value |= extract_bits(instruction, 8, 1) << 2;
1445     return value;
1446 }
1447
1448
1449 uint64 NMD::extract_fd_15_14_13_12_11(uint64 instruction)
1450 {
1451     uint64 value = 0;
1452     value |= extract_bits(instruction, 11, 5);
1453     return value;
1454 }
1455
1456
1457 uint64 NMD::extract_u_4_3_2_1_0__s2(uint64 instruction)
1458 {
1459     uint64 value = 0;
1460     value |= extract_bits(instruction, 0, 5) << 2;
1461     return value;
1462 }
1463
1464
1465 uint64 NMD::extract_rtz4_9_7_6_5(uint64 instruction)
1466 {
1467     uint64 value = 0;
1468     value |= extract_bits(instruction, 5, 3);
1469     value |= extract_bits(instruction, 9, 1) << 3;
1470     return value;
1471 }
1472
1473
1474 uint64 NMD::extract_sel_15_14_13_12_11(uint64 instruction)
1475 {
1476     uint64 value = 0;
1477     value |= extract_bits(instruction, 11, 5);
1478     return value;
1479 }
1480
1481
1482 uint64 NMD::extract_ct_25_24_23_22_21(uint64 instruction)
1483 {
1484     uint64 value = 0;
1485     value |= extract_bits(instruction, 21, 5);
1486     return value;
1487 }
1488
1489
1490 uint64 NMD::extract_u_20_to_2__s2(uint64 instruction)
1491 {
1492     uint64 value = 0;
1493     value |= extract_bits(instruction, 2, 19) << 2;
1494     return value;
1495 }
1496
1497
1498 int64 NMD::extract_s__se3_4_2_1_0(uint64 instruction)
1499 {
1500     int64 value = 0;
1501     value |= extract_bits(instruction, 0, 3);
1502     value |= extract_bits(instruction, 4, 1) << 3;
1503     value = sign_extend(value, 3);
1504     return value;
1505 }
1506
1507
1508 uint64 NMD::extract_u_3_2_1_0__s1(uint64 instruction)
1509 {
1510     uint64 value = 0;
1511     value |= extract_bits(instruction, 0, 4) << 1;
1512     return value;
1513 }
1514
1515
1516
1517 bool NMD::ADDIU_32__cond(uint64 instruction)
1518 {
1519     uint64 rt = extract_rt_25_24_23_22_21(instruction);
1520     return rt != 0;
1521 }
1522
1523
1524 bool NMD::ADDIU_RS5__cond(uint64 instruction)
1525 {
1526     uint64 rt = extract_rt_9_8_7_6_5(instruction);
1527     return rt != 0;
1528 }
1529
1530
1531 bool NMD::BALRSC_cond(uint64 instruction)
1532 {
1533     uint64 rt = extract_rt_25_24_23_22_21(instruction);
1534     return rt != 0;
1535 }
1536
1537
1538 bool NMD::BEQC_16__cond(uint64 instruction)
1539 {
1540     uint64 rs3 = extract_rs3_6_5_4(instruction);
1541     uint64 rt3 = extract_rt3_9_8_7(instruction);
1542     uint64 u = extract_u_3_2_1_0__s1(instruction);
1543     return rs3 < rt3 && u != 0;
1544 }
1545
1546
1547 bool NMD::BNEC_16__cond(uint64 instruction)
1548 {
1549     uint64 rs3 = extract_rs3_6_5_4(instruction);
1550     uint64 rt3 = extract_rt3_9_8_7(instruction);
1551     uint64 u = extract_u_3_2_1_0__s1(instruction);
1552     return rs3 >= rt3 && u != 0;
1553 }
1554
1555
1556 bool NMD::MOVE_cond(uint64 instruction)
1557 {
1558     uint64 rt = extract_rt_9_8_7_6_5(instruction);
1559     return rt != 0;
1560 }
1561
1562
1563 bool NMD::P16_BR1_cond(uint64 instruction)
1564 {
1565     uint64 u = extract_u_3_2_1_0__s1(instruction);
1566     return u != 0;
1567 }
1568
1569
1570 bool NMD::PREF_S9__cond(uint64 instruction)
1571 {
1572     uint64 hint = extract_hint_25_24_23_22_21(instruction);
1573     return hint != 31;
1574 }
1575
1576
1577 bool NMD::PREFE_cond(uint64 instruction)
1578 {
1579     uint64 hint = extract_hint_25_24_23_22_21(instruction);
1580     return hint != 31;
1581 }
1582
1583
1584 bool NMD::SLTU_cond(uint64 instruction)
1585 {
1586     uint64 rd = extract_rd_15_14_13_12_11(instruction);
1587     return rd != 0;
1588 }
1589
1590
1591
1592 /*
1593  * ABS.D fd, fs - Floating Point Absolute Value
1594  *
1595  *   3         2         1
1596  *  10987654321098765432109876543210
1597  *  010001     00000          000101
1598  *    fmt -----
1599  *               fs -----
1600  *                    fd -----
1601  */
1602 std::string NMD::ABS_D(uint64 instruction)
1603 {
1604     uint64 fd_value = extract_ft_25_24_23_22_21(instruction);
1605     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
1606
1607     std::string fs = FPR(copy(fs_value));
1608     std::string fd = FPR(copy(fd_value));
1609
1610     return img::format("ABS.D %s, %s", fd, fs);
1611 }
1612
1613
1614 /*
1615  * ABS.S fd, fs - Floating Point Absolute Value
1616  *
1617  *   3         2         1
1618  *  10987654321098765432109876543210
1619  *  010001     00000          000101
1620  *    fmt -----
1621  *               fd -----
1622  *                    fs -----
1623  */
1624 std::string NMD::ABS_S(uint64 instruction)
1625 {
1626     uint64 fd_value = extract_ft_25_24_23_22_21(instruction);
1627     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
1628
1629     std::string fs = FPR(copy(fs_value));
1630     std::string fd = FPR(copy(fd_value));
1631
1632     return img::format("ABS.S %s, %s", fd, fs);
1633 }
1634
1635
1636 /*
1637  * ABSQ_S.PH rt, rs - Find Absolute Value of Two Fractional Halfwords
1638  *
1639  *   3         2         1
1640  *  10987654321098765432109876543210
1641  *  001000          0001000100111111
1642  *     rt -----
1643  *          rs -----
1644  */
1645 std::string NMD::ABSQ_S_PH(uint64 instruction)
1646 {
1647     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
1648     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
1649
1650     std::string rt = GPR(copy(rt_value));
1651     std::string rs = GPR(copy(rs_value));
1652
1653     return img::format("ABSQ_S.PH %s, %s", rt, rs);
1654 }
1655
1656
1657 /*
1658  * ABSQ_S.QB rt, rs - Find Absolute Value of Four Fractional Byte Values
1659  *
1660  *   3         2         1
1661  *  10987654321098765432109876543210
1662  *  001000          0000000100111111
1663  *     rt -----
1664  *          rs -----
1665  */
1666 std::string NMD::ABSQ_S_QB(uint64 instruction)
1667 {
1668     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
1669     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
1670
1671     std::string rt = GPR(copy(rt_value));
1672     std::string rs = GPR(copy(rs_value));
1673
1674     return img::format("ABSQ_S.QB %s, %s", rt, rs);
1675 }
1676
1677
1678 /*
1679  *
1680  *
1681  *   3         2         1
1682  *  10987654321098765432109876543210
1683  *  001000          0010000100111111
1684  *     rt -----
1685  *          rs -----
1686  */
1687 std::string NMD::ABSQ_S_W(uint64 instruction)
1688 {
1689     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
1690     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
1691
1692     std::string rt = GPR(copy(rt_value));
1693     std::string rs = GPR(copy(rs_value));
1694
1695     return img::format("ABSQ_S.W %s, %s", rt, rs);
1696 }
1697
1698
1699 /*
1700  *
1701  *
1702  *   3         2         1
1703  *  10987654321098765432109876543210
1704  *  001000          0010000100111111
1705  *     rt -----
1706  *          rs -----
1707  */
1708 std::string NMD::ACLR(uint64 instruction)
1709 {
1710     uint64 bit_value = extract_bit_23_22_21(instruction);
1711     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
1712     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
1713
1714     std::string bit = IMMEDIATE(copy(bit_value));
1715     std::string s = IMMEDIATE(copy(s_value));
1716     std::string rs = GPR(copy(rs_value));
1717
1718     return img::format("ACLR %s, %s(%s)", bit, s, rs);
1719 }
1720
1721
1722 /*
1723  *
1724  *
1725  *   3         2         1
1726  *  10987654321098765432109876543210
1727  *  001000          0010000100111111
1728  *     rt -----
1729  *          rs -----
1730  */
1731 std::string NMD::ADD(uint64 instruction)
1732 {
1733     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
1734     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
1735     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
1736
1737     std::string rd = GPR(copy(rd_value));
1738     std::string rs = GPR(copy(rs_value));
1739     std::string rt = GPR(copy(rt_value));
1740
1741     return img::format("ADD %s, %s, %s", rd, rs, rt);
1742 }
1743
1744
1745 /*
1746  * ADD.D fd, fs, ft - Floating Point Add
1747  *
1748  *   3         2         1
1749  *  10987654321098765432109876543210
1750  *  010001                    000101
1751  *    fmt -----
1752  *          ft -----
1753  *               fs -----
1754  *                    fd -----
1755  */
1756 std::string NMD::ADD_D(uint64 instruction)
1757 {
1758     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
1759     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
1760     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
1761
1762     std::string ft = FPR(copy(ft_value));
1763     std::string fs = FPR(copy(fs_value));
1764     std::string fd = FPR(copy(fd_value));
1765
1766     return img::format("ADD.D %s, %s, %s", fd, fs, ft);
1767 }
1768
1769
1770 /*
1771  * ADD.S fd, fs, ft - Floating Point Add
1772  *
1773  *   3         2         1
1774  *  10987654321098765432109876543210
1775  *  010001                    000101
1776  *    fmt -----
1777  *          ft -----
1778  *               fs -----
1779  *                    fd -----
1780  */
1781 std::string NMD::ADD_S(uint64 instruction)
1782 {
1783     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
1784     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
1785     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
1786
1787     std::string ft = FPR(copy(ft_value));
1788     std::string fs = FPR(copy(fs_value));
1789     std::string fd = FPR(copy(fd_value));
1790
1791     return img::format("ADD.S %s, %s, %s", fd, fs, ft);
1792 }
1793
1794
1795 /*
1796  *
1797  *
1798  *   3         2         1
1799  *  10987654321098765432109876543210
1800  *  001000          0010000100111111
1801  *     rt -----
1802  *          rs -----
1803  */
1804 std::string NMD::ADDIU_32_(uint64 instruction)
1805 {
1806     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
1807     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
1808     uint64 u_value = extract_u_15_to_0(instruction);
1809
1810     std::string rt = GPR(copy(rt_value));
1811     std::string rs = GPR(copy(rs_value));
1812     std::string u = IMMEDIATE(copy(u_value));
1813
1814     return img::format("ADDIU %s, %s, %s", rt, rs, u);
1815 }
1816
1817
1818 /*
1819  *
1820  *
1821  *   3         2         1
1822  *  10987654321098765432109876543210
1823  *  001000          0010000100111111
1824  *     rt -----
1825  *          rs -----
1826  */
1827 std::string NMD::ADDIU_48_(uint64 instruction)
1828 {
1829     uint64 rt_value = extract_rt_41_40_39_38_37(instruction);
1830     int64 s_value = extract_s__se31_15_to_0_31_to_16(instruction);
1831
1832     std::string rt = GPR(copy(rt_value));
1833     std::string s = IMMEDIATE(copy(s_value));
1834
1835     return img::format("ADDIU %s, %s", rt, s);
1836 }
1837
1838
1839 /*
1840  *
1841  *
1842  *   3         2         1
1843  *  10987654321098765432109876543210
1844  *  001000          0010000100111111
1845  *     rt -----
1846  *          rs -----
1847  */
1848 std::string NMD::ADDIU_GP48_(uint64 instruction)
1849 {
1850     uint64 rt_value = extract_rt_41_40_39_38_37(instruction);
1851     int64 s_value = extract_s__se31_15_to_0_31_to_16(instruction);
1852
1853     std::string rt = GPR(copy(rt_value));
1854     std::string s = IMMEDIATE(copy(s_value));
1855
1856     return img::format("ADDIU %s, $%d, %s", rt, 28, s);
1857 }
1858
1859
1860 /*
1861  *
1862  *
1863  *   3         2         1
1864  *  10987654321098765432109876543210
1865  *  001000          0010000100111111
1866  *     rt -----
1867  *          rs -----
1868  */
1869 std::string NMD::ADDIU_GP_B_(uint64 instruction)
1870 {
1871     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
1872     uint64 u_value = extract_u_17_to_0(instruction);
1873
1874     std::string rt = GPR(copy(rt_value));
1875     std::string u = IMMEDIATE(copy(u_value));
1876
1877     return img::format("ADDIU %s, $%d, %s", rt, 28, u);
1878 }
1879
1880
1881 /*
1882  *
1883  *
1884  *   3         2         1
1885  *  10987654321098765432109876543210
1886  *  001000          0010000100111111
1887  *     rt -----
1888  *          rs -----
1889  */
1890 std::string NMD::ADDIU_GP_W_(uint64 instruction)
1891 {
1892     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
1893     uint64 u_value = extract_u_20_to_2__s2(instruction);
1894
1895     std::string rt = GPR(copy(rt_value));
1896     std::string u = IMMEDIATE(copy(u_value));
1897
1898     return img::format("ADDIU %s, $%d, %s", rt, 28, u);
1899 }
1900
1901
1902 /*
1903  *
1904  *
1905  *   3         2         1
1906  *  10987654321098765432109876543210
1907  *  001000          0010000100111111
1908  *     rt -----
1909  *          rs -----
1910  */
1911 std::string NMD::ADDIU_NEG_(uint64 instruction)
1912 {
1913     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
1914     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
1915     uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
1916
1917     std::string rt = GPR(copy(rt_value));
1918     std::string rs = GPR(copy(rs_value));
1919     std::string u = IMMEDIATE(neg_copy(u_value));
1920
1921     return img::format("ADDIU %s, %s, %s", rt, rs, u);
1922 }
1923
1924
1925 /*
1926  *
1927  *
1928  *   3         2         1
1929  *  10987654321098765432109876543210
1930  *  001000          0010000100111111
1931  *     rt -----
1932  *          rs -----
1933  */
1934 std::string NMD::ADDIU_R1_SP_(uint64 instruction)
1935 {
1936     uint64 u_value = extract_u_5_4_3_2_1_0__s2(instruction);
1937     uint64 rt3_value = extract_rt3_9_8_7(instruction);
1938
1939     std::string rt3 = GPR(decode_gpr_gpr3(rt3_value));
1940     std::string u = IMMEDIATE(copy(u_value));
1941
1942     return img::format("ADDIU %s, $%d, %s", rt3, 29, u);
1943 }
1944
1945
1946 /*
1947  *
1948  *
1949  *   3         2         1
1950  *  10987654321098765432109876543210
1951  *  001000          0010000100111111
1952  *     rt -----
1953  *          rs -----
1954  */
1955 std::string NMD::ADDIU_R2_(uint64 instruction)
1956 {
1957     uint64 rt3_value = extract_rt3_9_8_7(instruction);
1958     uint64 rs3_value = extract_rs3_6_5_4(instruction);
1959     uint64 u_value = extract_u_2_1_0__s2(instruction);
1960
1961     std::string rt3 = GPR(decode_gpr_gpr3(rt3_value));
1962     std::string rs3 = GPR(decode_gpr_gpr3(rs3_value));
1963     std::string u = IMMEDIATE(copy(u_value));
1964
1965     return img::format("ADDIU %s, %s, %s", rt3, rs3, u);
1966 }
1967
1968
1969 /*
1970  * ADDIU[RS5] rt, s5 - Add Signed Word and Set Carry Bit
1971  *
1972  *  5432109876543210
1973  *  100100      1
1974  *     rt -----
1975  *           s - ---
1976  */
1977 std::string NMD::ADDIU_RS5_(uint64 instruction)
1978 {
1979     uint64 rt_value = extract_rt_9_8_7_6_5(instruction);
1980     int64 s_value = extract_s__se3_4_2_1_0(instruction);
1981
1982     std::string rt = GPR(copy(rt_value));
1983     std::string s = IMMEDIATE(copy(s_value));
1984
1985     return img::format("ADDIU %s, %s", rt, s);
1986 }
1987
1988
1989 /*
1990  *
1991  *
1992  *   3         2         1
1993  *  10987654321098765432109876543210
1994  *  001000               x1110000101
1995  *     rt -----
1996  *          rs -----
1997  *               rd -----
1998  */
1999 std::string NMD::ADDIUPC_32_(uint64 instruction)
2000 {
2001     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
2002     int64 s_value = extract_s__se21_0_20_to_1_s1(instruction);
2003
2004     std::string rt = GPR(copy(rt_value));
2005     std::string s = ADDRESS(encode_s_from_address(s_value), 4);
2006
2007     return img::format("ADDIUPC %s, %s", rt, s);
2008 }
2009
2010
2011 /*
2012  *
2013  *
2014  *   3         2         1
2015  *  10987654321098765432109876543210
2016  *  001000               x1110000101
2017  *     rt -----
2018  *          rs -----
2019  *               rd -----
2020  */
2021 std::string NMD::ADDIUPC_48_(uint64 instruction)
2022 {
2023     uint64 rt_value = extract_rt_41_40_39_38_37(instruction);
2024     int64 s_value = extract_s__se31_15_to_0_31_to_16(instruction);
2025
2026     std::string rt = GPR(copy(rt_value));
2027     std::string s = ADDRESS(encode_s_from_address(s_value), 6);
2028
2029     return img::format("ADDIUPC %s, %s", rt, s);
2030 }
2031
2032
2033 /*
2034  * ADDQ.PH rd, rt, rs - Add Fractional Halfword Vectors
2035  *
2036  *   3         2         1
2037  *  10987654321098765432109876543210
2038  *  001000               00000001101
2039  *     rt -----
2040  *          rs -----
2041  *               rd -----
2042  */
2043 std::string NMD::ADDQ_PH(uint64 instruction)
2044 {
2045     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
2046     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
2047     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
2048
2049     std::string rd = GPR(copy(rd_value));
2050     std::string rs = GPR(copy(rs_value));
2051     std::string rt = GPR(copy(rt_value));
2052
2053     return img::format("ADDQ.PH %s, %s, %s", rd, rs, rt);
2054 }
2055
2056
2057 /*
2058  * ADDQ_S.PH rd, rt, rs - Add Fractional Halfword Vectors
2059  *
2060  *   3         2         1
2061  *  10987654321098765432109876543210
2062  *  001000               10000001101
2063  *     rt -----
2064  *          rs -----
2065  *               rd -----
2066  */
2067 std::string NMD::ADDQ_S_PH(uint64 instruction)
2068 {
2069     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
2070     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
2071     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
2072
2073     std::string rd = GPR(copy(rd_value));
2074     std::string rs = GPR(copy(rs_value));
2075     std::string rt = GPR(copy(rt_value));
2076
2077     return img::format("ADDQ_S.PH %s, %s, %s", rd, rs, rt);
2078 }
2079
2080
2081 /*
2082  * ADDQ_S.W rd, rt, rs - Add Fractional Words
2083  *
2084  *   3         2         1
2085  *  10987654321098765432109876543210
2086  *  001000               x1100000101
2087  *     rt -----
2088  *          rs -----
2089  *               rd -----
2090  */
2091 std::string NMD::ADDQ_S_W(uint64 instruction)
2092 {
2093     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
2094     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
2095     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
2096
2097     std::string rd = GPR(copy(rd_value));
2098     std::string rs = GPR(copy(rs_value));
2099     std::string rt = GPR(copy(rt_value));
2100
2101     return img::format("ADDQ_S.W %s, %s, %s", rd, rs, rt);
2102 }
2103
2104
2105 /*
2106  * ADDQH.PH rd, rt, rs - Add Fractional Halfword Vectors And Shift Right
2107  *                       to Halve Results
2108  *
2109  *   3         2         1
2110  *  10987654321098765432109876543210
2111  *  001000               00001001101
2112  *     rt -----
2113  *          rs -----
2114  *               rd -----
2115  */
2116 std::string NMD::ADDQH_PH(uint64 instruction)
2117 {
2118     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
2119     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
2120     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
2121
2122     std::string rd = GPR(copy(rd_value));
2123     std::string rs = GPR(copy(rs_value));
2124     std::string rt = GPR(copy(rt_value));
2125
2126     return img::format("ADDQH.PH %s, %s, %s", rd, rs, rt);
2127 }
2128
2129
2130 /*
2131  * ADDQH_R.PH rd, rt, rs - Add Fractional Halfword Vectors And Shift Right
2132  *                         to Halve Results
2133  *
2134  *   3         2         1
2135  *  10987654321098765432109876543210
2136  *  001000               10001001101
2137  *     rt -----
2138  *          rs -----
2139  *               rd -----
2140  */
2141 std::string NMD::ADDQH_R_PH(uint64 instruction)
2142 {
2143     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
2144     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
2145     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
2146
2147     std::string rd = GPR(copy(rd_value));
2148     std::string rs = GPR(copy(rs_value));
2149     std::string rt = GPR(copy(rt_value));
2150
2151     return img::format("ADDQH_R.PH %s, %s, %s", rd, rs, rt);
2152 }
2153
2154
2155 /*
2156  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
2157  *
2158  *   3         2         1
2159  *  10987654321098765432109876543210
2160  *  001000               00010001101
2161  *     rt -----
2162  *          rs -----
2163  *               rd -----
2164  */
2165 std::string NMD::ADDQH_R_W(uint64 instruction)
2166 {
2167     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
2168     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
2169     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
2170
2171     std::string rd = GPR(copy(rd_value));
2172     std::string rs = GPR(copy(rs_value));
2173     std::string rt = GPR(copy(rt_value));
2174
2175     return img::format("ADDQH_R.W %s, %s, %s", rd, rs, rt);
2176 }
2177
2178
2179 /*
2180  * ADDQH.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
2181  *
2182  *   3         2         1
2183  *  10987654321098765432109876543210
2184  *  001000               10010001101
2185  *     rt -----
2186  *          rs -----
2187  *               rd -----
2188  */
2189 std::string NMD::ADDQH_W(uint64 instruction)
2190 {
2191     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
2192     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
2193     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
2194
2195     std::string rd = GPR(copy(rd_value));
2196     std::string rs = GPR(copy(rs_value));
2197     std::string rt = GPR(copy(rt_value));
2198
2199     return img::format("ADDQH.W %s, %s, %s", rd, rs, rt);
2200 }
2201
2202
2203 /*
2204  * ADDSC rd, rt, rs - Add Signed Word and Set Carry Bit
2205  *
2206  *   3         2         1
2207  *  10987654321098765432109876543210
2208  *  001000               x1110000101
2209  *     rt -----
2210  *          rs -----
2211  *               rd -----
2212  */
2213 std::string NMD::ADDSC(uint64 instruction)
2214 {
2215     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
2216     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
2217     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
2218
2219     std::string rd = GPR(copy(rd_value));
2220     std::string rs = GPR(copy(rs_value));
2221     std::string rt = GPR(copy(rt_value));
2222
2223     return img::format("ADDSC %s, %s, %s", rd, rs, rt);
2224 }
2225
2226
2227 /*
2228  * ADDU[16] rd3, rs3, rt3 -
2229  *
2230  *  5432109876543210
2231  *  101100         0
2232  *    rt3 ---
2233  *       rs3 ---
2234  *          rd3 ---
2235  */
2236 std::string NMD::ADDU_16_(uint64 instruction)
2237 {
2238     uint64 rt3_value = extract_rt3_9_8_7(instruction);
2239     uint64 rs3_value = extract_rs3_6_5_4(instruction);
2240     uint64 rd3_value = extract_rd3_3_2_1(instruction);
2241
2242     std::string rt3 = GPR(decode_gpr_gpr3(rt3_value));
2243     std::string rs3 = GPR(decode_gpr_gpr3(rs3_value));
2244     std::string rd3 = GPR(decode_gpr_gpr3(rd3_value));
2245
2246     return img::format("ADDU %s, %s, %s", rd3, rs3, rt3);
2247 }
2248
2249
2250 /*
2251  *
2252  *
2253  *   3         2         1
2254  *  10987654321098765432109876543210
2255  *  001000               x1110000101
2256  *     rt -----
2257  *          rs -----
2258  *               rd -----
2259  */
2260 std::string NMD::ADDU_32_(uint64 instruction)
2261 {
2262     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
2263     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
2264     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
2265
2266     std::string rd = GPR(copy(rd_value));
2267     std::string rs = GPR(copy(rs_value));
2268     std::string rt = GPR(copy(rt_value));
2269
2270     return img::format("ADDU %s, %s, %s", rd, rs, rt);
2271 }
2272
2273
2274 /*
2275  *
2276  *
2277  *   3         2         1
2278  *  10987654321098765432109876543210
2279  *  001000               x1110000101
2280  *     rt -----
2281  *          rs -----
2282  *               rd -----
2283  */
2284 std::string NMD::ADDU_4X4_(uint64 instruction)
2285 {
2286     uint64 rt4_value = extract_rt4_9_7_6_5(instruction);
2287     uint64 rs4_value = extract_rs4_4_2_1_0(instruction);
2288
2289     std::string rs4 = GPR(encode_gpr4(rs4_value));
2290     std::string rt4 = GPR(encode_gpr4(rt4_value));
2291
2292     return img::format("ADDU %s, %s", rs4, rt4);
2293 }
2294
2295
2296 /*
2297  * ADDU.PH rd, rt, rs - Unsigned Add Integer Halfwords
2298  *
2299  *   3         2         1
2300  *  10987654321098765432109876543210
2301  *  001000               00100001101
2302  *     rt -----
2303  *          rs -----
2304  *               rd -----
2305  */
2306 std::string NMD::ADDU_PH(uint64 instruction)
2307 {
2308     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
2309     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
2310     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
2311
2312     std::string rd = GPR(copy(rd_value));
2313     std::string rs = GPR(copy(rs_value));
2314     std::string rt = GPR(copy(rt_value));
2315
2316     return img::format("ADDU.PH %s, %s, %s", rd, rs, rt);
2317 }
2318
2319
2320 /*
2321  * ADDU.QB rd, rt, rs - Unsigned Add Quad Byte Vectors
2322  *
2323  *   3         2         1
2324  *  10987654321098765432109876543210
2325  *  001000               00011001101
2326  *     rt -----
2327  *          rs -----
2328  *               rd -----
2329  */
2330 std::string NMD::ADDU_QB(uint64 instruction)
2331 {
2332     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
2333     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
2334     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
2335
2336     std::string rd = GPR(copy(rd_value));
2337     std::string rs = GPR(copy(rs_value));
2338     std::string rt = GPR(copy(rt_value));
2339
2340     return img::format("ADDU.QB %s, %s, %s", rd, rs, rt);
2341 }
2342
2343
2344 /*
2345  * ADDU_S.PH rd, rt, rs - Unsigned Add Integer Halfwords
2346  *
2347  *   3         2         1
2348  *  10987654321098765432109876543210
2349  *  001000               10100001101
2350  *     rt -----
2351  *          rs -----
2352  *               rd -----
2353  */
2354 std::string NMD::ADDU_S_PH(uint64 instruction)
2355 {
2356     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
2357     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
2358     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
2359
2360     std::string rd = GPR(copy(rd_value));
2361     std::string rs = GPR(copy(rs_value));
2362     std::string rt = GPR(copy(rt_value));
2363
2364     return img::format("ADDU_S.PH %s, %s, %s", rd, rs, rt);
2365 }
2366
2367
2368 /*
2369  * ADDU_S.QB rd, rt, rs - Unsigned Add Quad Byte Vectors
2370  *
2371  *   3         2         1
2372  *  10987654321098765432109876543210
2373  *  001000               10011001101
2374  *     rt -----
2375  *          rs -----
2376  *               rd -----
2377  */
2378 std::string NMD::ADDU_S_QB(uint64 instruction)
2379 {
2380     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
2381     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
2382     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
2383
2384     std::string rd = GPR(copy(rd_value));
2385     std::string rs = GPR(copy(rs_value));
2386     std::string rt = GPR(copy(rt_value));
2387
2388     return img::format("ADDU_S.QB %s, %s, %s", rd, rs, rt);
2389 }
2390
2391
2392 /*
2393  * ADDUH.QB rd, rt, rs - Unsigned Add Vector Quad-Bytes And Right Shift
2394  *                       to Halve Results
2395  *
2396  *   3         2         1
2397  *  10987654321098765432109876543210
2398  *  001000               00101001101
2399  *     rt -----
2400  *          rs -----
2401  *               rd -----
2402  */
2403 std::string NMD::ADDUH_QB(uint64 instruction)
2404 {
2405     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
2406     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
2407     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
2408
2409     std::string rd = GPR(copy(rd_value));
2410     std::string rs = GPR(copy(rs_value));
2411     std::string rt = GPR(copy(rt_value));
2412
2413     return img::format("ADDUH.QB %s, %s, %s", rd, rs, rt);
2414 }
2415
2416
2417 /*
2418  * ADDUH_R.QB rd, rt, rs - Unsigned Add Vector Quad-Bytes And Right Shift
2419  *                         to Halve Results
2420  *
2421  *   3         2         1
2422  *  10987654321098765432109876543210
2423  *  001000               10101001101
2424  *     rt -----
2425  *          rs -----
2426  *               rd -----
2427  */
2428 std::string NMD::ADDUH_R_QB(uint64 instruction)
2429 {
2430     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
2431     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
2432     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
2433
2434     std::string rd = GPR(copy(rd_value));
2435     std::string rs = GPR(copy(rs_value));
2436     std::string rt = GPR(copy(rt_value));
2437
2438     return img::format("ADDUH_R.QB %s, %s, %s", rd, rs, rt);
2439 }
2440
2441 /*
2442  * ADDWC rd, rt, rs - Add Word with Carry Bit
2443  *
2444  *   3         2         1
2445  *  10987654321098765432109876543210
2446  *  001000               x1111000101
2447  *     rt -----
2448  *          rs -----
2449  *               rd -----
2450  */
2451 std::string NMD::ADDWC(uint64 instruction)
2452 {
2453     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
2454     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
2455     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
2456
2457     std::string rd = GPR(copy(rd_value));
2458     std::string rs = GPR(copy(rs_value));
2459     std::string rt = GPR(copy(rt_value));
2460
2461     return img::format("ADDWC %s, %s, %s", rd, rs, rt);
2462 }
2463
2464
2465 /*
2466  *
2467  *
2468  *   3         2         1
2469  *  10987654321098765432109876543210
2470  *  001000               x1110000101
2471  *     rt -----
2472  *          rs -----
2473  *               rd -----
2474  */
2475 std::string NMD::ALUIPC(uint64 instruction)
2476 {
2477     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
2478     int64 s_value = extract_s__se31_0_11_to_2_20_to_12_s12(instruction);
2479
2480     std::string rt = GPR(copy(rt_value));
2481     std::string s = ADDRESS(encode_s_from_address(s_value), 4);
2482
2483     return img::format("ALUIPC %s, %%pcrel_hi(%s)", rt, s);
2484 }
2485
2486
2487 /*
2488  * AND[16] rt3, rs3 -
2489  *
2490  *  5432109876543210
2491  *  101100
2492  *    rt3 ---
2493  *       rs3 ---
2494  *           eu ----
2495  */
2496 std::string NMD::AND_16_(uint64 instruction)
2497 {
2498     uint64 rt3_value = extract_rt3_9_8_7(instruction);
2499     uint64 rs3_value = extract_rs3_6_5_4(instruction);
2500
2501     std::string rt3 = GPR(decode_gpr_gpr3(rt3_value));
2502     std::string rs3 = GPR(decode_gpr_gpr3(rs3_value));
2503
2504     return img::format("AND %s, %s", rs3, rt3);
2505 }
2506
2507
2508 /*
2509  *
2510  *
2511  *   3         2         1
2512  *  10987654321098765432109876543210
2513  *  001000               x1110000101
2514  *     rt -----
2515  *          rs -----
2516  *               rd -----
2517  */
2518 std::string NMD::AND_32_(uint64 instruction)
2519 {
2520     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
2521     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
2522     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
2523
2524     std::string rd = GPR(copy(rd_value));
2525     std::string rs = GPR(copy(rs_value));
2526     std::string rt = GPR(copy(rt_value));
2527
2528     return img::format("AND %s, %s, %s", rd, rs, rt);
2529 }
2530
2531
2532 /*
2533  * ANDI rt, rs, u -
2534  *
2535  *  5432109876543210
2536  *  101100
2537  *    rt3 ---
2538  *       rs3 ---
2539  *           eu ----
2540  */
2541 std::string NMD::ANDI_16_(uint64 instruction)
2542 {
2543     uint64 rt3_value = extract_rt3_9_8_7(instruction);
2544     uint64 rs3_value = extract_rs3_6_5_4(instruction);
2545     uint64 eu_value = extract_eu_3_2_1_0(instruction);
2546
2547     std::string rt3 = GPR(decode_gpr_gpr3(rt3_value));
2548     std::string rs3 = GPR(decode_gpr_gpr3(rs3_value));
2549     std::string eu = IMMEDIATE(encode_eu_from_u_andi16(eu_value));
2550
2551     return img::format("ANDI %s, %s, %s", rt3, rs3, eu);
2552 }
2553
2554
2555 /*
2556  *
2557  *
2558  *   3         2         1
2559  *  10987654321098765432109876543210
2560  *  001000               x1110000101
2561  *     rt -----
2562  *          rs -----
2563  *               rd -----
2564  */
2565 std::string NMD::ANDI_32_(uint64 instruction)
2566 {
2567     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
2568     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
2569     uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
2570
2571     std::string rt = GPR(copy(rt_value));
2572     std::string rs = GPR(copy(rs_value));
2573     std::string u = IMMEDIATE(copy(u_value));
2574
2575     return img::format("ANDI %s, %s, %s", rt, rs, u);
2576 }
2577
2578
2579 /*
2580  *
2581  *
2582  *   3         2         1
2583  *  10987654321098765432109876543210
2584  *  001000               x1110000101
2585  *     rt -----
2586  *          rs -----
2587  *               rd -----
2588  */
2589 std::string NMD::APPEND(uint64 instruction)
2590 {
2591     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
2592     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
2593     uint64 sa_value = extract_sa_15_14_13_12_11(instruction);
2594
2595     std::string rt = GPR(copy(rt_value));
2596     std::string rs = GPR(copy(rs_value));
2597     std::string sa = IMMEDIATE(copy(sa_value));
2598
2599     return img::format("APPEND %s, %s, %s", rt, rs, sa);
2600 }
2601
2602
2603 /*
2604  *
2605  *
2606  *   3         2         1
2607  *  10987654321098765432109876543210
2608  *  001000               x1110000101
2609  *     rt -----
2610  *          rs -----
2611  *               rd -----
2612  */
2613 std::string NMD::ASET(uint64 instruction)
2614 {
2615     uint64 bit_value = extract_bit_23_22_21(instruction);
2616     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
2617     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
2618
2619     std::string bit = IMMEDIATE(copy(bit_value));
2620     std::string s = IMMEDIATE(copy(s_value));
2621     std::string rs = GPR(copy(rs_value));
2622
2623     return img::format("ASET %s, %s(%s)", bit, s, rs);
2624 }
2625
2626
2627 /*
2628  *
2629  *
2630  *   3         2         1
2631  *  10987654321098765432109876543210
2632  *  001000               x1110000101
2633  *     rt -----
2634  *          rs -----
2635  *               rd -----
2636  */
2637 std::string NMD::BALC_16_(uint64 instruction)
2638 {
2639     int64 s_value = extract_s__se10_0_9_8_7_6_5_4_3_2_1_s1(instruction);
2640
2641     std::string s = ADDRESS(encode_s_from_address(s_value), 2);
2642
2643     return img::format("BALC %s", s);
2644 }
2645
2646
2647 /*
2648  *
2649  *
2650  *   3         2         1
2651  *  10987654321098765432109876543210
2652  *  001000               x1110000101
2653  *     rt -----
2654  *          rs -----
2655  *               rd -----
2656  */
2657 std::string NMD::BALC_32_(uint64 instruction)
2658 {
2659     int64 s_value = extract_s__se25_0_24_to_1_s1(instruction);
2660
2661     std::string s = ADDRESS(encode_s_from_address(s_value), 4);
2662
2663     return img::format("BALC %s", s);
2664 }
2665
2666
2667 /*
2668  *
2669  *
2670  *   3         2         1
2671  *  10987654321098765432109876543210
2672  *  001000               x1110000101
2673  *     rt -----
2674  *          rs -----
2675  *               rd -----
2676  */
2677 std::string NMD::BALRSC(uint64 instruction)
2678 {
2679     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
2680     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
2681
2682     std::string rt = GPR(copy(rt_value));
2683     std::string rs = GPR(copy(rs_value));
2684
2685     return img::format("BALRSC %s, %s", rt, rs);
2686 }
2687
2688
2689 /*
2690  *
2691  *
2692  *   3         2         1
2693  *  10987654321098765432109876543210
2694  *  001000               x1110000101
2695  *     rt -----
2696  *          rs -----
2697  *               rd -----
2698  */
2699 std::string NMD::BBEQZC(uint64 instruction)
2700 {
2701     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
2702     uint64 bit_value = extract_bit_16_15_14_13_12_11(instruction);
2703     int64 s_value = extract_s__se11_0_10_9_8_7_6_5_4_3_2_1_0_s1(instruction);
2704
2705     std::string rt = GPR(copy(rt_value));
2706     std::string bit = IMMEDIATE(copy(bit_value));
2707     std::string s = ADDRESS(encode_s_from_address(s_value), 4);
2708
2709     return img::format("BBEQZC %s, %s, %s", rt, bit, s);
2710 }
2711
2712
2713 /*
2714  *
2715  *
2716  *   3         2         1
2717  *  10987654321098765432109876543210
2718  *  001000               x1110000101
2719  *     rt -----
2720  *          rs -----
2721  *               rd -----
2722  */
2723 std::string NMD::BBNEZC(uint64 instruction)
2724 {
2725     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
2726     uint64 bit_value = extract_bit_16_15_14_13_12_11(instruction);
2727     int64 s_value = extract_s__se11_0_10_9_8_7_6_5_4_3_2_1_0_s1(instruction);
2728
2729     std::string rt = GPR(copy(rt_value));
2730     std::string bit = IMMEDIATE(copy(bit_value));
2731     std::string s = ADDRESS(encode_s_from_address(s_value), 4);
2732
2733     return img::format("BBNEZC %s, %s, %s", rt, bit, s);
2734 }
2735
2736
2737 /*
2738  *
2739  *
2740  *   3         2         1
2741  *  10987654321098765432109876543210
2742  *  001000               x1110000101
2743  *     rt -----
2744  *          rs -----
2745  *               rd -----
2746  */
2747 std::string NMD::BC_16_(uint64 instruction)
2748 {
2749     int64 s_value = extract_s__se10_0_9_8_7_6_5_4_3_2_1_s1(instruction);
2750
2751     std::string s = ADDRESS(encode_s_from_address(s_value), 2);
2752
2753     return img::format("BC %s", s);
2754 }
2755
2756
2757 /*
2758  *
2759  *
2760  *   3         2         1
2761  *  10987654321098765432109876543210
2762  *  001000               x1110000101
2763  *     rt -----
2764  *          rs -----
2765  *               rd -----
2766  */
2767 std::string NMD::BC_32_(uint64 instruction)
2768 {
2769     int64 s_value = extract_s__se25_0_24_to_1_s1(instruction);
2770
2771     std::string s = ADDRESS(encode_s_from_address(s_value), 4);
2772
2773     return img::format("BC %s", s);
2774 }
2775
2776
2777 /*
2778  *
2779  *
2780  *   3         2         1
2781  *  10987654321098765432109876543210
2782  *  001000               x1110000101
2783  *     rt -----
2784  *          rs -----
2785  *               rd -----
2786  */
2787 std::string NMD::BC1EQZC(uint64 instruction)
2788 {
2789     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
2790     int64 s_value = extract_s__se14_0_13_to_1_s1(instruction);
2791
2792     std::string ft = FPR(copy(ft_value));
2793     std::string s = ADDRESS(encode_s_from_address(s_value), 4);
2794
2795     return img::format("BC1EQZC %s, %s", ft, s);
2796 }
2797
2798
2799 /*
2800  *
2801  *
2802  *   3         2         1
2803  *  10987654321098765432109876543210
2804  *  001000               x1110000101
2805  *     rt -----
2806  *          rs -----
2807  *               rd -----
2808  */
2809 std::string NMD::BC1NEZC(uint64 instruction)
2810 {
2811     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
2812     int64 s_value = extract_s__se14_0_13_to_1_s1(instruction);
2813
2814     std::string ft = FPR(copy(ft_value));
2815     std::string s = ADDRESS(encode_s_from_address(s_value), 4);
2816
2817     return img::format("BC1NEZC %s, %s", ft, s);
2818 }
2819
2820
2821 /*
2822  *
2823  *
2824  *   3         2         1
2825  *  10987654321098765432109876543210
2826  *  001000               x1110000101
2827  *     rt -----
2828  *          rs -----
2829  *               rd -----
2830  */
2831 std::string NMD::BC2EQZC(uint64 instruction)
2832 {
2833     uint64 ct_value = extract_ct_25_24_23_22_21(instruction);
2834     int64 s_value = extract_s__se14_0_13_to_1_s1(instruction);
2835
2836     std::string ct = CPR(copy(ct_value));
2837     std::string s = ADDRESS(encode_s_from_address(s_value), 4);
2838
2839     return img::format("BC2EQZC %s, %s", ct, s);
2840 }
2841
2842
2843 /*
2844  *
2845  *
2846  *   3         2         1
2847  *  10987654321098765432109876543210
2848  *  001000               x1110000101
2849  *     rt -----
2850  *          rs -----
2851  *               rd -----
2852  */
2853 std::string NMD::BC2NEZC(uint64 instruction)
2854 {
2855     uint64 ct_value = extract_ct_25_24_23_22_21(instruction);
2856     int64 s_value = extract_s__se14_0_13_to_1_s1(instruction);
2857
2858     std::string ct = CPR(copy(ct_value));
2859     std::string s = ADDRESS(encode_s_from_address(s_value), 4);
2860
2861     return img::format("BC2NEZC %s, %s", ct, s);
2862 }
2863
2864
2865 /*
2866  *
2867  *
2868  *   3         2         1
2869  *  10987654321098765432109876543210
2870  *  001000               x1110000101
2871  *     rt -----
2872  *          rs -----
2873  *               rd -----
2874  */
2875 std::string NMD::BEQC_16_(uint64 instruction)
2876 {
2877     uint64 rt3_value = extract_rt3_9_8_7(instruction);
2878     uint64 rs3_value = extract_rs3_6_5_4(instruction);
2879     uint64 u_value = extract_u_3_2_1_0__s1(instruction);
2880
2881     std::string rs3 = GPR(encode_rs3_and_check_rs3_lt_rt3(rs3_value));
2882     std::string rt3 = GPR(decode_gpr_gpr3(rt3_value));
2883     std::string u = ADDRESS(encode_u_from_address(u_value), 2);
2884
2885     return img::format("BEQC %s, %s, %s", rs3, rt3, u);
2886 }
2887
2888
2889 /*
2890  *
2891  *
2892  *   3         2         1
2893  *  10987654321098765432109876543210
2894  *  001000               x1110000101
2895  *     rt -----
2896  *          rs -----
2897  *               rd -----
2898  */
2899 std::string NMD::BEQC_32_(uint64 instruction)
2900 {
2901     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
2902     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
2903     int64 s_value = extract_s__se14_0_13_to_1_s1(instruction);
2904
2905     std::string rs = GPR(copy(rs_value));
2906     std::string rt = GPR(copy(rt_value));
2907     std::string s = ADDRESS(encode_s_from_address(s_value), 4);
2908
2909     return img::format("BEQC %s, %s, %s", rs, rt, s);
2910 }
2911
2912
2913 /*
2914  *
2915  *
2916  *   3         2         1
2917  *  10987654321098765432109876543210
2918  *  001000               x1110000101
2919  *     rt -----
2920  *          rs -----
2921  *               rd -----
2922  */
2923 std::string NMD::BEQIC(uint64 instruction)
2924 {
2925     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
2926     uint64 u_value = extract_u_17_16_15_14_13_12_11(instruction);
2927     int64 s_value = extract_s__se11_0_10_9_8_7_6_5_4_3_2_1_0_s1(instruction);
2928
2929     std::string rt = GPR(copy(rt_value));
2930     std::string u = IMMEDIATE(copy(u_value));
2931     std::string s = ADDRESS(encode_s_from_address(s_value), 4);
2932
2933     return img::format("BEQIC %s, %s, %s", rt, u, s);
2934 }
2935
2936
2937 /*
2938  *
2939  *
2940  *   3         2         1
2941  *  10987654321098765432109876543210
2942  *  001000               x1110000101
2943  *     rt -----
2944  *          rs -----
2945  *               rd -----
2946  */
2947 std::string NMD::BEQZC_16_(uint64 instruction)
2948 {
2949     uint64 rt3_value = extract_rt3_9_8_7(instruction);
2950     int64 s_value = extract_s__se7_0_6_5_4_3_2_1_s1(instruction);
2951
2952     std::string rt3 = GPR(decode_gpr_gpr3(rt3_value));
2953     std::string s = ADDRESS(encode_s_from_address(s_value), 2);
2954
2955     return img::format("BEQZC %s, %s", rt3, s);
2956 }
2957
2958
2959 /*
2960  *
2961  *
2962  *   3         2         1
2963  *  10987654321098765432109876543210
2964  *  001000               x1110000101
2965  *     rt -----
2966  *          rs -----
2967  *               rd -----
2968  */
2969 std::string NMD::BGEC(uint64 instruction)
2970 {
2971     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
2972     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
2973     int64 s_value = extract_s__se14_0_13_to_1_s1(instruction);
2974
2975     std::string rs = GPR(copy(rs_value));
2976     std::string rt = GPR(copy(rt_value));
2977     std::string s = ADDRESS(encode_s_from_address(s_value), 4);
2978
2979     return img::format("BGEC %s, %s, %s", rs, rt, s);
2980 }
2981
2982
2983 /*
2984  *
2985  *
2986  *   3         2         1
2987  *  10987654321098765432109876543210
2988  *  001000               x1110000101
2989  *     rt -----
2990  *          rs -----
2991  *               rd -----
2992  */
2993 std::string NMD::BGEIC(uint64 instruction)
2994 {
2995     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
2996     uint64 u_value = extract_u_17_16_15_14_13_12_11(instruction);
2997     int64 s_value = extract_s__se11_0_10_9_8_7_6_5_4_3_2_1_0_s1(instruction);
2998
2999     std::string rt = GPR(copy(rt_value));
3000     std::string u = IMMEDIATE(copy(u_value));
3001     std::string s = ADDRESS(encode_s_from_address(s_value), 4);
3002
3003     return img::format("BGEIC %s, %s, %s", rt, u, s);
3004 }
3005
3006
3007 /*
3008  *
3009  *
3010  *   3         2         1
3011  *  10987654321098765432109876543210
3012  *  001000               x1110000101
3013  *     rt -----
3014  *          rs -----
3015  *               rd -----
3016  */
3017 std::string NMD::BGEIUC(uint64 instruction)
3018 {
3019     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
3020     uint64 u_value = extract_u_17_16_15_14_13_12_11(instruction);
3021     int64 s_value = extract_s__se11_0_10_9_8_7_6_5_4_3_2_1_0_s1(instruction);
3022
3023     std::string rt = GPR(copy(rt_value));
3024     std::string u = IMMEDIATE(copy(u_value));
3025     std::string s = ADDRESS(encode_s_from_address(s_value), 4);
3026
3027     return img::format("BGEIUC %s, %s, %s", rt, u, s);
3028 }
3029
3030
3031 /*
3032  *
3033  *
3034  *   3         2         1
3035  *  10987654321098765432109876543210
3036  *  001000               x1110000101
3037  *     rt -----
3038  *          rs -----
3039  *               rd -----
3040  */
3041 std::string NMD::BGEUC(uint64 instruction)
3042 {
3043     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
3044     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
3045     int64 s_value = extract_s__se14_0_13_to_1_s1(instruction);
3046
3047     std::string rs = GPR(copy(rs_value));
3048     std::string rt = GPR(copy(rt_value));
3049     std::string s = ADDRESS(encode_s_from_address(s_value), 4);
3050
3051     return img::format("BGEUC %s, %s, %s", rs, rt, s);
3052 }
3053
3054
3055 /*
3056  *
3057  *
3058  *   3         2         1
3059  *  10987654321098765432109876543210
3060  *  001000               x1110000101
3061  *     rt -----
3062  *          rs -----
3063  *               rd -----
3064  */
3065 std::string NMD::BLTC(uint64 instruction)
3066 {
3067     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
3068     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
3069     int64 s_value = extract_s__se14_0_13_to_1_s1(instruction);
3070
3071     std::string rs = GPR(copy(rs_value));
3072     std::string rt = GPR(copy(rt_value));
3073     std::string s = ADDRESS(encode_s_from_address(s_value), 4);
3074
3075     return img::format("BLTC %s, %s, %s", rs, rt, s);
3076 }
3077
3078
3079 /*
3080  *
3081  *
3082  *   3         2         1
3083  *  10987654321098765432109876543210
3084  *  001000               x1110000101
3085  *     rt -----
3086  *          rs -----
3087  *               rd -----
3088  */
3089 std::string NMD::BLTIC(uint64 instruction)
3090 {
3091     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
3092     uint64 u_value = extract_u_17_16_15_14_13_12_11(instruction);
3093     int64 s_value = extract_s__se11_0_10_9_8_7_6_5_4_3_2_1_0_s1(instruction);
3094
3095     std::string rt = GPR(copy(rt_value));
3096     std::string u = IMMEDIATE(copy(u_value));
3097     std::string s = ADDRESS(encode_s_from_address(s_value), 4);
3098
3099     return img::format("BLTIC %s, %s, %s", rt, u, s);
3100 }
3101
3102
3103 /*
3104  *
3105  *
3106  *   3         2         1
3107  *  10987654321098765432109876543210
3108  *  001000               x1110000101
3109  *     rt -----
3110  *          rs -----
3111  *               rd -----
3112  */
3113 std::string NMD::BLTIUC(uint64 instruction)
3114 {
3115     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
3116     uint64 u_value = extract_u_17_16_15_14_13_12_11(instruction);
3117     int64 s_value = extract_s__se11_0_10_9_8_7_6_5_4_3_2_1_0_s1(instruction);
3118
3119     std::string rt = GPR(copy(rt_value));
3120     std::string u = IMMEDIATE(copy(u_value));
3121     std::string s = ADDRESS(encode_s_from_address(s_value), 4);
3122
3123     return img::format("BLTIUC %s, %s, %s", rt, u, s);
3124 }
3125
3126
3127 /*
3128  *
3129  *
3130  *   3         2         1
3131  *  10987654321098765432109876543210
3132  *  001000               x1110000101
3133  *     rt -----
3134  *          rs -----
3135  *               rd -----
3136  */
3137 std::string NMD::BLTUC(uint64 instruction)
3138 {
3139     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
3140     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
3141     int64 s_value = extract_s__se14_0_13_to_1_s1(instruction);
3142
3143     std::string rs = GPR(copy(rs_value));
3144     std::string rt = GPR(copy(rt_value));
3145     std::string s = ADDRESS(encode_s_from_address(s_value), 4);
3146
3147     return img::format("BLTUC %s, %s, %s", rs, rt, s);
3148 }
3149
3150
3151 /*
3152  *
3153  *
3154  *   3         2         1
3155  *  10987654321098765432109876543210
3156  *  001000               x1110000101
3157  *     rt -----
3158  *          rs -----
3159  *               rd -----
3160  */
3161 std::string NMD::BNEC_16_(uint64 instruction)
3162 {
3163     uint64 rt3_value = extract_rt3_9_8_7(instruction);
3164     uint64 rs3_value = extract_rs3_6_5_4(instruction);
3165     uint64 u_value = extract_u_3_2_1_0__s1(instruction);
3166
3167     std::string rs3 = GPR(encode_rs3_and_check_rs3_ge_rt3(rs3_value));
3168     std::string rt3 = GPR(decode_gpr_gpr3(rt3_value));
3169     std::string u = ADDRESS(encode_u_from_address(u_value), 2);
3170
3171     return img::format("BNEC %s, %s, %s", rs3, rt3, u);
3172 }
3173
3174
3175 /*
3176  *
3177  *
3178  *   3         2         1
3179  *  10987654321098765432109876543210
3180  *  001000               x1110000101
3181  *     rt -----
3182  *          rs -----
3183  *               rd -----
3184  */
3185 std::string NMD::BNEC_32_(uint64 instruction)
3186 {
3187     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
3188     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
3189     int64 s_value = extract_s__se14_0_13_to_1_s1(instruction);
3190
3191     std::string rs = GPR(copy(rs_value));
3192     std::string rt = GPR(copy(rt_value));
3193     std::string s = ADDRESS(encode_s_from_address(s_value), 4);
3194
3195     return img::format("BNEC %s, %s, %s", rs, rt, s);
3196 }
3197
3198
3199 /*
3200  *
3201  *
3202  *   3         2         1
3203  *  10987654321098765432109876543210
3204  *  001000               x1110000101
3205  *     rt -----
3206  *          rs -----
3207  *               rd -----
3208  */
3209 std::string NMD::BNEIC(uint64 instruction)
3210 {
3211     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
3212     uint64 u_value = extract_u_17_16_15_14_13_12_11(instruction);
3213     int64 s_value = extract_s__se11_0_10_9_8_7_6_5_4_3_2_1_0_s1(instruction);
3214
3215     std::string rt = GPR(copy(rt_value));
3216     std::string u = IMMEDIATE(copy(u_value));
3217     std::string s = ADDRESS(encode_s_from_address(s_value), 4);
3218
3219     return img::format("BNEIC %s, %s, %s", rt, u, s);
3220 }
3221
3222
3223 /*
3224  *
3225  *
3226  *   3         2         1
3227  *  10987654321098765432109876543210
3228  *  001000               x1110000101
3229  *     rt -----
3230  *          rs -----
3231  *               rd -----
3232  */
3233 std::string NMD::BNEZC_16_(uint64 instruction)
3234 {
3235     uint64 rt3_value = extract_rt3_9_8_7(instruction);
3236     int64 s_value = extract_s__se7_0_6_5_4_3_2_1_s1(instruction);
3237
3238     std::string rt3 = GPR(decode_gpr_gpr3(rt3_value));
3239     std::string s = ADDRESS(encode_s_from_address(s_value), 2);
3240
3241     return img::format("BNEZC %s, %s", rt3, s);
3242 }
3243
3244
3245 /*
3246  *
3247  *
3248  *   3         2         1
3249  *  10987654321098765432109876543210
3250  *  001000               x1110000101
3251  *     rt -----
3252  *          rs -----
3253  *               rd -----
3254  */
3255 std::string NMD::BPOSGE32C(uint64 instruction)
3256 {
3257     int64 s_value = extract_s__se14_0_13_to_1_s1(instruction);
3258
3259     std::string s = ADDRESS(encode_s_from_address(s_value), 4);
3260
3261     return img::format("BPOSGE32C %s", s);
3262 }
3263
3264
3265 /*
3266  *
3267  *
3268  *   3         2         1
3269  *  10987654321098765432109876543210
3270  *  001000               x1110000101
3271  *     rt -----
3272  *          rs -----
3273  *               rd -----
3274  */
3275 std::string NMD::BREAK_16_(uint64 instruction)
3276 {
3277     uint64 code_value = extract_code_2_1_0(instruction);
3278
3279     std::string code = IMMEDIATE(copy(code_value));
3280
3281     return img::format("BREAK %s", code);
3282 }
3283
3284
3285 /*
3286  * BREAK code - Break. Cause a Breakpoint exception
3287  *
3288  *   3         2         1
3289  *  10987654321098765432109876543210
3290  *  001000               x1110000101
3291  *     rt -----
3292  *          rs -----
3293  *               rd -----
3294  */
3295 std::string NMD::BREAK_32_(uint64 instruction)
3296 {
3297     uint64 code_value = extract_code_18_to_0(instruction);
3298
3299     std::string code = IMMEDIATE(copy(code_value));
3300
3301     return img::format("BREAK %s", code);
3302 }
3303
3304
3305 /*
3306  *
3307  *
3308  *   3         2         1
3309  *  10987654321098765432109876543210
3310  *  001000               x1110000101
3311  *     rt -----
3312  *          rs -----
3313  *               rd -----
3314  */
3315 std::string NMD::BRSC(uint64 instruction)
3316 {
3317     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
3318
3319     std::string rs = GPR(copy(rs_value));
3320
3321     return img::format("BRSC %s", rs);
3322 }
3323
3324
3325 /*
3326  *
3327  *
3328  *   3         2         1
3329  *  10987654321098765432109876543210
3330  *  001000               x1110000101
3331  *     rt -----
3332  *          rs -----
3333  *               rd -----
3334  */
3335 std::string NMD::CACHE(uint64 instruction)
3336 {
3337     uint64 op_value = extract_op_25_24_23_22_21(instruction);
3338     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
3339     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
3340
3341     std::string op = IMMEDIATE(copy(op_value));
3342     std::string s = IMMEDIATE(copy(s_value));
3343     std::string rs = GPR(copy(rs_value));
3344
3345     return img::format("CACHE %s, %s(%s)", op, s, rs);
3346 }
3347
3348
3349 /*
3350  *
3351  *
3352  *   3         2         1
3353  *  10987654321098765432109876543210
3354  *  001000               x1110000101
3355  *     rt -----
3356  *          rs -----
3357  *               rd -----
3358  */
3359 std::string NMD::CACHEE(uint64 instruction)
3360 {
3361     uint64 op_value = extract_op_25_24_23_22_21(instruction);
3362     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
3363     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
3364
3365     std::string op = IMMEDIATE(copy(op_value));
3366     std::string s = IMMEDIATE(copy(s_value));
3367     std::string rs = GPR(copy(rs_value));
3368
3369     return img::format("CACHEE %s, %s(%s)", op, s, rs);
3370 }
3371
3372
3373 /*
3374  *
3375  *
3376  *   3         2         1
3377  *  10987654321098765432109876543210
3378  *  001000               x1110000101
3379  *     rt -----
3380  *          rs -----
3381  *               rd -----
3382  */
3383 std::string NMD::CEIL_L_D(uint64 instruction)
3384 {
3385     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
3386     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
3387
3388     std::string ft = FPR(copy(ft_value));
3389     std::string fs = FPR(copy(fs_value));
3390
3391     return img::format("CEIL.L.D %s, %s", ft, fs);
3392 }
3393
3394
3395 /*
3396  *
3397  *
3398  *   3         2         1
3399  *  10987654321098765432109876543210
3400  *  001000               x1110000101
3401  *     rt -----
3402  *          rs -----
3403  *               rd -----
3404  */
3405 std::string NMD::CEIL_L_S(uint64 instruction)
3406 {
3407     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
3408     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
3409
3410     std::string ft = FPR(copy(ft_value));
3411     std::string fs = FPR(copy(fs_value));
3412
3413     return img::format("CEIL.L.S %s, %s", ft, fs);
3414 }
3415
3416
3417 /*
3418  *
3419  *
3420  *   3         2         1
3421  *  10987654321098765432109876543210
3422  *  001000               x1110000101
3423  *     rt -----
3424  *          rs -----
3425  *               rd -----
3426  */
3427 std::string NMD::CEIL_W_D(uint64 instruction)
3428 {
3429     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
3430     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
3431
3432     std::string ft = FPR(copy(ft_value));
3433     std::string fs = FPR(copy(fs_value));
3434
3435     return img::format("CEIL.W.D %s, %s", ft, fs);
3436 }
3437
3438
3439 /*
3440  *
3441  *
3442  *   3         2         1
3443  *  10987654321098765432109876543210
3444  *  001000               x1110000101
3445  *     rt -----
3446  *          rs -----
3447  *               rd -----
3448  */
3449 std::string NMD::CEIL_W_S(uint64 instruction)
3450 {
3451     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
3452     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
3453
3454     std::string ft = FPR(copy(ft_value));
3455     std::string fs = FPR(copy(fs_value));
3456
3457     return img::format("CEIL.W.S %s, %s", ft, fs);
3458 }
3459
3460
3461 /*
3462  *
3463  *
3464  *   3         2         1
3465  *  10987654321098765432109876543210
3466  *  001000               x1110000101
3467  *     rt -----
3468  *          rs -----
3469  *               rd -----
3470  */
3471 std::string NMD::CFC1(uint64 instruction)
3472 {
3473     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
3474     uint64 cs_value = extract_cs_20_19_18_17_16(instruction);
3475
3476     std::string rt = GPR(copy(rt_value));
3477     std::string cs = CPR(copy(cs_value));
3478
3479     return img::format("CFC1 %s, %s", rt, cs);
3480 }
3481
3482
3483 /*
3484  *
3485  *
3486  *   3         2         1
3487  *  10987654321098765432109876543210
3488  *  001000               x1110000101
3489  *     rt -----
3490  *          rs -----
3491  *               rd -----
3492  */
3493 std::string NMD::CFC2(uint64 instruction)
3494 {
3495     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
3496     uint64 cs_value = extract_cs_20_19_18_17_16(instruction);
3497
3498     std::string rt = GPR(copy(rt_value));
3499     std::string cs = CPR(copy(cs_value));
3500
3501     return img::format("CFC2 %s, %s", rt, cs);
3502 }
3503
3504
3505 /*
3506  *
3507  *
3508  *   3         2         1
3509  *  10987654321098765432109876543210
3510  *  001000               x1110000101
3511  *     rt -----
3512  *          rs -----
3513  *               rd -----
3514  */
3515 std::string NMD::CLASS_D(uint64 instruction)
3516 {
3517     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
3518     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
3519
3520     std::string ft = FPR(copy(ft_value));
3521     std::string fs = FPR(copy(fs_value));
3522
3523     return img::format("CLASS.D %s, %s", ft, fs);
3524 }
3525
3526
3527 /*
3528  *
3529  *
3530  *   3         2         1
3531  *  10987654321098765432109876543210
3532  *  001000               x1110000101
3533  *     rt -----
3534  *          rs -----
3535  *               rd -----
3536  */
3537 std::string NMD::CLASS_S(uint64 instruction)
3538 {
3539     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
3540     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
3541
3542     std::string ft = FPR(copy(ft_value));
3543     std::string fs = FPR(copy(fs_value));
3544
3545     return img::format("CLASS.S %s, %s", ft, fs);
3546 }
3547
3548
3549 /*
3550  *
3551  *
3552  *   3         2         1
3553  *  10987654321098765432109876543210
3554  *  001000               x1110000101
3555  *     rt -----
3556  *          rs -----
3557  *               rd -----
3558  */
3559 std::string NMD::CLO(uint64 instruction)
3560 {
3561     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
3562     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
3563
3564     std::string rt = GPR(copy(rt_value));
3565     std::string rs = GPR(copy(rs_value));
3566
3567     return img::format("CLO %s, %s", rt, rs);
3568 }
3569
3570
3571 /*
3572  *
3573  *
3574  *   3         2         1
3575  *  10987654321098765432109876543210
3576  *  001000               x1110000101
3577  *     rt -----
3578  *          rs -----
3579  *               rd -----
3580  */
3581 std::string NMD::CLZ(uint64 instruction)
3582 {
3583     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
3584     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
3585
3586     std::string rt = GPR(copy(rt_value));
3587     std::string rs = GPR(copy(rs_value));
3588
3589     return img::format("CLZ %s, %s", rt, rs);
3590 }
3591
3592
3593 /*
3594  *
3595  *
3596  *   3         2         1
3597  *  10987654321098765432109876543210
3598  *  001000               x1110000101
3599  *     rt -----
3600  *          rs -----
3601  *               rd -----
3602  */
3603 std::string NMD::CMP_AF_D(uint64 instruction)
3604 {
3605     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
3606     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
3607     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
3608
3609     std::string fd = FPR(copy(fd_value));
3610     std::string fs = FPR(copy(fs_value));
3611     std::string ft = FPR(copy(ft_value));
3612
3613     return img::format("CMP.AF.D %s, %s, %s", fd, fs, ft);
3614 }
3615
3616
3617 /*
3618  *
3619  *
3620  *   3         2         1
3621  *  10987654321098765432109876543210
3622  *  001000               x1110000101
3623  *     rt -----
3624  *          rs -----
3625  *               rd -----
3626  */
3627 std::string NMD::CMP_AF_S(uint64 instruction)
3628 {
3629     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
3630     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
3631     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
3632
3633     std::string fd = FPR(copy(fd_value));
3634     std::string fs = FPR(copy(fs_value));
3635     std::string ft = FPR(copy(ft_value));
3636
3637     return img::format("CMP.AF.S %s, %s, %s", fd, fs, ft);
3638 }
3639
3640
3641 /*
3642  *
3643  *
3644  *   3         2         1
3645  *  10987654321098765432109876543210
3646  *  001000               x1110000101
3647  *     rt -----
3648  *          rs -----
3649  *               rd -----
3650  */
3651 std::string NMD::CMP_EQ_D(uint64 instruction)
3652 {
3653     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
3654     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
3655     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
3656
3657     std::string fd = FPR(copy(fd_value));
3658     std::string fs = FPR(copy(fs_value));
3659     std::string ft = FPR(copy(ft_value));
3660
3661     return img::format("CMP.EQ.D %s, %s, %s", fd, fs, ft);
3662 }
3663
3664
3665 /*
3666  *
3667  *
3668  *   3         2         1
3669  *  10987654321098765432109876543210
3670  *  001000               x1110000101
3671  *     rt -----
3672  *          rs -----
3673  *               rd -----
3674  */
3675 std::string NMD::CMP_EQ_PH(uint64 instruction)
3676 {
3677     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
3678     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
3679
3680     std::string rs = GPR(copy(rs_value));
3681     std::string rt = GPR(copy(rt_value));
3682
3683     return img::format("CMP.EQ.PH %s, %s", rs, rt);
3684 }
3685
3686
3687 /*
3688  *
3689  *
3690  *   3         2         1
3691  *  10987654321098765432109876543210
3692  *  001000               x1110000101
3693  *     rt -----
3694  *          rs -----
3695  *               rd -----
3696  */
3697 std::string NMD::CMP_EQ_S(uint64 instruction)
3698 {
3699     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
3700     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
3701     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
3702
3703     std::string fd = FPR(copy(fd_value));
3704     std::string fs = FPR(copy(fs_value));
3705     std::string ft = FPR(copy(ft_value));
3706
3707     return img::format("CMP.EQ.S %s, %s, %s", fd, fs, ft);
3708 }
3709
3710
3711 /*
3712  *
3713  *
3714  *   3         2         1
3715  *  10987654321098765432109876543210
3716  *  001000               x1110000101
3717  *     rt -----
3718  *          rs -----
3719  *               rd -----
3720  */
3721 std::string NMD::CMP_LE_D(uint64 instruction)
3722 {
3723     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
3724     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
3725     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
3726
3727     std::string fd = FPR(copy(fd_value));
3728     std::string fs = FPR(copy(fs_value));
3729     std::string ft = FPR(copy(ft_value));
3730
3731     return img::format("CMP.LE.D %s, %s, %s", fd, fs, ft);
3732 }
3733
3734
3735 /*
3736  *
3737  *
3738  *   3         2         1
3739  *  10987654321098765432109876543210
3740  *  001000               x1110000101
3741  *     rt -----
3742  *          rs -----
3743  *               rd -----
3744  */
3745 std::string NMD::CMP_LE_PH(uint64 instruction)
3746 {
3747     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
3748     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
3749
3750     std::string rs = GPR(copy(rs_value));
3751     std::string rt = GPR(copy(rt_value));
3752
3753     return img::format("CMP.LE.PH %s, %s", rs, rt);
3754 }
3755
3756
3757 /*
3758  *
3759  *
3760  *   3         2         1
3761  *  10987654321098765432109876543210
3762  *  001000               x1110000101
3763  *     rt -----
3764  *          rs -----
3765  *               rd -----
3766  */
3767 std::string NMD::CMP_LE_S(uint64 instruction)
3768 {
3769     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
3770     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
3771     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
3772
3773     std::string fd = FPR(copy(fd_value));
3774     std::string fs = FPR(copy(fs_value));
3775     std::string ft = FPR(copy(ft_value));
3776
3777     return img::format("CMP.LE.S %s, %s, %s", fd, fs, ft);
3778 }
3779
3780
3781 /*
3782  *
3783  *
3784  *   3         2         1
3785  *  10987654321098765432109876543210
3786  *  001000               x1110000101
3787  *     rt -----
3788  *          rs -----
3789  *               rd -----
3790  */
3791 std::string NMD::CMP_LT_D(uint64 instruction)
3792 {
3793     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
3794     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
3795     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
3796
3797     std::string fd = FPR(copy(fd_value));
3798     std::string fs = FPR(copy(fs_value));
3799     std::string ft = FPR(copy(ft_value));
3800
3801     return img::format("CMP.LT.D %s, %s, %s", fd, fs, ft);
3802 }
3803
3804
3805 /*
3806  *
3807  *
3808  *   3         2         1
3809  *  10987654321098765432109876543210
3810  *  001000               x1110000101
3811  *     rt -----
3812  *          rs -----
3813  *               rd -----
3814  */
3815 std::string NMD::CMP_LT_PH(uint64 instruction)
3816 {
3817     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
3818     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
3819
3820     std::string rs = GPR(copy(rs_value));
3821     std::string rt = GPR(copy(rt_value));
3822
3823     return img::format("CMP.LT.PH %s, %s", rs, rt);
3824 }
3825
3826
3827 /*
3828  *
3829  *
3830  *   3         2         1
3831  *  10987654321098765432109876543210
3832  *  001000               x1110000101
3833  *     rt -----
3834  *          rs -----
3835  *               rd -----
3836  */
3837 std::string NMD::CMP_LT_S(uint64 instruction)
3838 {
3839     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
3840     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
3841     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
3842
3843     std::string fd = FPR(copy(fd_value));
3844     std::string fs = FPR(copy(fs_value));
3845     std::string ft = FPR(copy(ft_value));
3846
3847     return img::format("CMP.LT.S %s, %s, %s", fd, fs, ft);
3848 }
3849
3850
3851 /*
3852  *
3853  *
3854  *   3         2         1
3855  *  10987654321098765432109876543210
3856  *  001000               x1110000101
3857  *     rt -----
3858  *          rs -----
3859  *               rd -----
3860  */
3861 std::string NMD::CMP_NE_D(uint64 instruction)
3862 {
3863     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
3864     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
3865     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
3866
3867     std::string fd = FPR(copy(fd_value));
3868     std::string fs = FPR(copy(fs_value));
3869     std::string ft = FPR(copy(ft_value));
3870
3871     return img::format("CMP.NE.D %s, %s, %s", fd, fs, ft);
3872 }
3873
3874
3875 /*
3876  *
3877  *
3878  *   3         2         1
3879  *  10987654321098765432109876543210
3880  *  001000               x1110000101
3881  *     rt -----
3882  *          rs -----
3883  *               rd -----
3884  */
3885 std::string NMD::CMP_NE_S(uint64 instruction)
3886 {
3887     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
3888     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
3889     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
3890
3891     std::string fd = FPR(copy(fd_value));
3892     std::string fs = FPR(copy(fs_value));
3893     std::string ft = FPR(copy(ft_value));
3894
3895     return img::format("CMP.NE.S %s, %s, %s", fd, fs, ft);
3896 }
3897
3898
3899 /*
3900  *
3901  *
3902  *   3         2         1
3903  *  10987654321098765432109876543210
3904  *  001000               x1110000101
3905  *     rt -----
3906  *          rs -----
3907  *               rd -----
3908  */
3909 std::string NMD::CMP_OR_D(uint64 instruction)
3910 {
3911     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
3912     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
3913     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
3914
3915     std::string fd = FPR(copy(fd_value));
3916     std::string fs = FPR(copy(fs_value));
3917     std::string ft = FPR(copy(ft_value));
3918
3919     return img::format("CMP.OR.D %s, %s, %s", fd, fs, ft);
3920 }
3921
3922
3923 /*
3924  *
3925  *
3926  *   3         2         1
3927  *  10987654321098765432109876543210
3928  *  001000               x1110000101
3929  *     rt -----
3930  *          rs -----
3931  *               rd -----
3932  */
3933 std::string NMD::CMP_OR_S(uint64 instruction)
3934 {
3935     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
3936     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
3937     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
3938
3939     std::string fd = FPR(copy(fd_value));
3940     std::string fs = FPR(copy(fs_value));
3941     std::string ft = FPR(copy(ft_value));
3942
3943     return img::format("CMP.OR.S %s, %s, %s", fd, fs, ft);
3944 }
3945
3946
3947 /*
3948  *
3949  *
3950  *   3         2         1
3951  *  10987654321098765432109876543210
3952  *  001000               x1110000101
3953  *     rt -----
3954  *          rs -----
3955  *               rd -----
3956  */
3957 std::string NMD::CMP_SAF_D(uint64 instruction)
3958 {
3959     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
3960     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
3961     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
3962
3963     std::string fd = FPR(copy(fd_value));
3964     std::string fs = FPR(copy(fs_value));
3965     std::string ft = FPR(copy(ft_value));
3966
3967     return img::format("CMP.SAF.D %s, %s, %s", fd, fs, ft);
3968 }
3969
3970
3971 /*
3972  *
3973  *
3974  *   3         2         1
3975  *  10987654321098765432109876543210
3976  *  001000               x1110000101
3977  *     rt -----
3978  *          rs -----
3979  *               rd -----
3980  */
3981 std::string NMD::CMP_SAF_S(uint64 instruction)
3982 {
3983     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
3984     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
3985     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
3986
3987     std::string fd = FPR(copy(fd_value));
3988     std::string fs = FPR(copy(fs_value));
3989     std::string ft = FPR(copy(ft_value));
3990
3991     return img::format("CMP.SAF.S %s, %s, %s", fd, fs, ft);
3992 }
3993
3994
3995 /*
3996  *
3997  *
3998  *   3         2         1
3999  *  10987654321098765432109876543210
4000  *  001000               x1110000101
4001  *     rt -----
4002  *          rs -----
4003  *               rd -----
4004  */
4005 std::string NMD::CMP_SEQ_D(uint64 instruction)
4006 {
4007     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4008     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4009     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4010
4011     std::string fd = FPR(copy(fd_value));
4012     std::string fs = FPR(copy(fs_value));
4013     std::string ft = FPR(copy(ft_value));
4014
4015     return img::format("CMP.SEQ.D %s, %s, %s", fd, fs, ft);
4016 }
4017
4018
4019 /*
4020  *
4021  *
4022  *   3         2         1
4023  *  10987654321098765432109876543210
4024  *  001000               x1110000101
4025  *     rt -----
4026  *          rs -----
4027  *               rd -----
4028  */
4029 std::string NMD::CMP_SEQ_S(uint64 instruction)
4030 {
4031     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4032     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4033     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4034
4035     std::string fd = FPR(copy(fd_value));
4036     std::string fs = FPR(copy(fs_value));
4037     std::string ft = FPR(copy(ft_value));
4038
4039     return img::format("CMP.SEQ.S %s, %s, %s", fd, fs, ft);
4040 }
4041
4042
4043 /*
4044  *
4045  *
4046  *   3         2         1
4047  *  10987654321098765432109876543210
4048  *  001000               x1110000101
4049  *     rt -----
4050  *          rs -----
4051  *               rd -----
4052  */
4053 std::string NMD::CMP_SLE_D(uint64 instruction)
4054 {
4055     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4056     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4057     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4058
4059     std::string fd = FPR(copy(fd_value));
4060     std::string fs = FPR(copy(fs_value));
4061     std::string ft = FPR(copy(ft_value));
4062
4063     return img::format("CMP.SLE.D %s, %s, %s", fd, fs, ft);
4064 }
4065
4066
4067 /*
4068  *
4069  *
4070  *   3         2         1
4071  *  10987654321098765432109876543210
4072  *  001000               x1110000101
4073  *     rt -----
4074  *          rs -----
4075  *               rd -----
4076  */
4077 std::string NMD::CMP_SLE_S(uint64 instruction)
4078 {
4079     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4080     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4081     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4082
4083     std::string fd = FPR(copy(fd_value));
4084     std::string fs = FPR(copy(fs_value));
4085     std::string ft = FPR(copy(ft_value));
4086
4087     return img::format("CMP.SLE.S %s, %s, %s", fd, fs, ft);
4088 }
4089
4090
4091 /*
4092  *
4093  *
4094  *   3         2         1
4095  *  10987654321098765432109876543210
4096  *  001000               x1110000101
4097  *     rt -----
4098  *          rs -----
4099  *               rd -----
4100  */
4101 std::string NMD::CMP_SLT_D(uint64 instruction)
4102 {
4103     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4104     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4105     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4106
4107     std::string fd = FPR(copy(fd_value));
4108     std::string fs = FPR(copy(fs_value));
4109     std::string ft = FPR(copy(ft_value));
4110
4111     return img::format("CMP.SLT.D %s, %s, %s", fd, fs, ft);
4112 }
4113
4114
4115 /*
4116  *
4117  *
4118  *   3         2         1
4119  *  10987654321098765432109876543210
4120  *  001000               x1110000101
4121  *     rt -----
4122  *          rs -----
4123  *               rd -----
4124  */
4125 std::string NMD::CMP_SLT_S(uint64 instruction)
4126 {
4127     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4128     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4129     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4130
4131     std::string fd = FPR(copy(fd_value));
4132     std::string fs = FPR(copy(fs_value));
4133     std::string ft = FPR(copy(ft_value));
4134
4135     return img::format("CMP.SLT.S %s, %s, %s", fd, fs, ft);
4136 }
4137
4138
4139 /*
4140  *
4141  *
4142  *   3         2         1
4143  *  10987654321098765432109876543210
4144  *  001000               x1110000101
4145  *     rt -----
4146  *          rs -----
4147  *               rd -----
4148  */
4149 std::string NMD::CMP_SNE_D(uint64 instruction)
4150 {
4151     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4152     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4153     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4154
4155     std::string fd = FPR(copy(fd_value));
4156     std::string fs = FPR(copy(fs_value));
4157     std::string ft = FPR(copy(ft_value));
4158
4159     return img::format("CMP.SNE.D %s, %s, %s", fd, fs, ft);
4160 }
4161
4162
4163 /*
4164  *
4165  *
4166  *   3         2         1
4167  *  10987654321098765432109876543210
4168  *  001000               x1110000101
4169  *     rt -----
4170  *          rs -----
4171  *               rd -----
4172  */
4173 std::string NMD::CMP_SNE_S(uint64 instruction)
4174 {
4175     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4176     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4177     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4178
4179     std::string fd = FPR(copy(fd_value));
4180     std::string fs = FPR(copy(fs_value));
4181     std::string ft = FPR(copy(ft_value));
4182
4183     return img::format("CMP.SNE.S %s, %s, %s", fd, fs, ft);
4184 }
4185
4186
4187 /*
4188  *
4189  *
4190  *   3         2         1
4191  *  10987654321098765432109876543210
4192  *  001000               x1110000101
4193  *     rt -----
4194  *          rs -----
4195  *               rd -----
4196  */
4197 std::string NMD::CMP_SOR_D(uint64 instruction)
4198 {
4199     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4200     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4201     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4202
4203     std::string fd = FPR(copy(fd_value));
4204     std::string fs = FPR(copy(fs_value));
4205     std::string ft = FPR(copy(ft_value));
4206
4207     return img::format("CMP.SOR.D %s, %s, %s", fd, fs, ft);
4208 }
4209
4210
4211 /*
4212  *
4213  *
4214  *   3         2         1
4215  *  10987654321098765432109876543210
4216  *  001000               x1110000101
4217  *     rt -----
4218  *          rs -----
4219  *               rd -----
4220  */
4221 std::string NMD::CMP_SOR_S(uint64 instruction)
4222 {
4223     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4224     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4225     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4226
4227     std::string fd = FPR(copy(fd_value));
4228     std::string fs = FPR(copy(fs_value));
4229     std::string ft = FPR(copy(ft_value));
4230
4231     return img::format("CMP.SOR.S %s, %s, %s", fd, fs, ft);
4232 }
4233
4234
4235 /*
4236  *
4237  *
4238  *   3         2         1
4239  *  10987654321098765432109876543210
4240  *  001000               x1110000101
4241  *     rt -----
4242  *          rs -----
4243  *               rd -----
4244  */
4245 std::string NMD::CMP_SUEQ_D(uint64 instruction)
4246 {
4247     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4248     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4249     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4250
4251     std::string fd = FPR(copy(fd_value));
4252     std::string fs = FPR(copy(fs_value));
4253     std::string ft = FPR(copy(ft_value));
4254
4255     return img::format("CMP.SUEQ.D %s, %s, %s", fd, fs, ft);
4256 }
4257
4258
4259 /*
4260  *
4261  *
4262  *   3         2         1
4263  *  10987654321098765432109876543210
4264  *  001000               x1110000101
4265  *     rt -----
4266  *          rs -----
4267  *               rd -----
4268  */
4269 std::string NMD::CMP_SUEQ_S(uint64 instruction)
4270 {
4271     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4272     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4273     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4274
4275     std::string fd = FPR(copy(fd_value));
4276     std::string fs = FPR(copy(fs_value));
4277     std::string ft = FPR(copy(ft_value));
4278
4279     return img::format("CMP.SUEQ.S %s, %s, %s", fd, fs, ft);
4280 }
4281
4282
4283 /*
4284  *
4285  *
4286  *   3         2         1
4287  *  10987654321098765432109876543210
4288  *  001000               x1110000101
4289  *     rt -----
4290  *          rs -----
4291  *               rd -----
4292  */
4293 std::string NMD::CMP_SULE_D(uint64 instruction)
4294 {
4295     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4296     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4297     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4298
4299     std::string fd = FPR(copy(fd_value));
4300     std::string fs = FPR(copy(fs_value));
4301     std::string ft = FPR(copy(ft_value));
4302
4303     return img::format("CMP.SULE.D %s, %s, %s", fd, fs, ft);
4304 }
4305
4306
4307 /*
4308  *
4309  *
4310  *   3         2         1
4311  *  10987654321098765432109876543210
4312  *  001000               x1110000101
4313  *     rt -----
4314  *          rs -----
4315  *               rd -----
4316  */
4317 std::string NMD::CMP_SULE_S(uint64 instruction)
4318 {
4319     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4320     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4321     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4322
4323     std::string fd = FPR(copy(fd_value));
4324     std::string fs = FPR(copy(fs_value));
4325     std::string ft = FPR(copy(ft_value));
4326
4327     return img::format("CMP.SULE.S %s, %s, %s", fd, fs, ft);
4328 }
4329
4330
4331 /*
4332  *
4333  *
4334  *   3         2         1
4335  *  10987654321098765432109876543210
4336  *  001000               x1110000101
4337  *     rt -----
4338  *          rs -----
4339  *               rd -----
4340  */
4341 std::string NMD::CMP_SULT_D(uint64 instruction)
4342 {
4343     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4344     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4345     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4346
4347     std::string fd = FPR(copy(fd_value));
4348     std::string fs = FPR(copy(fs_value));
4349     std::string ft = FPR(copy(ft_value));
4350
4351     return img::format("CMP.SULT.D %s, %s, %s", fd, fs, ft);
4352 }
4353
4354
4355 /*
4356  *
4357  *
4358  *   3         2         1
4359  *  10987654321098765432109876543210
4360  *  001000               x1110000101
4361  *     rt -----
4362  *          rs -----
4363  *               rd -----
4364  */
4365 std::string NMD::CMP_SULT_S(uint64 instruction)
4366 {
4367     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4368     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4369     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4370
4371     std::string fd = FPR(copy(fd_value));
4372     std::string fs = FPR(copy(fs_value));
4373     std::string ft = FPR(copy(ft_value));
4374
4375     return img::format("CMP.SULT.S %s, %s, %s", fd, fs, ft);
4376 }
4377
4378
4379 /*
4380  *
4381  *
4382  *   3         2         1
4383  *  10987654321098765432109876543210
4384  *  001000               x1110000101
4385  *     rt -----
4386  *          rs -----
4387  *               rd -----
4388  */
4389 std::string NMD::CMP_SUN_D(uint64 instruction)
4390 {
4391     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4392     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4393     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4394
4395     std::string fd = FPR(copy(fd_value));
4396     std::string fs = FPR(copy(fs_value));
4397     std::string ft = FPR(copy(ft_value));
4398
4399     return img::format("CMP.SUN.D %s, %s, %s", fd, fs, ft);
4400 }
4401
4402
4403 /*
4404  *
4405  *
4406  *   3         2         1
4407  *  10987654321098765432109876543210
4408  *  001000               x1110000101
4409  *     rt -----
4410  *          rs -----
4411  *               rd -----
4412  */
4413 std::string NMD::CMP_SUNE_D(uint64 instruction)
4414 {
4415     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4416     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4417     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4418
4419     std::string fd = FPR(copy(fd_value));
4420     std::string fs = FPR(copy(fs_value));
4421     std::string ft = FPR(copy(ft_value));
4422
4423     return img::format("CMP.SUNE.D %s, %s, %s", fd, fs, ft);
4424 }
4425
4426
4427 /*
4428  *
4429  *
4430  *   3         2         1
4431  *  10987654321098765432109876543210
4432  *  001000               x1110000101
4433  *     rt -----
4434  *          rs -----
4435  *               rd -----
4436  */
4437 std::string NMD::CMP_SUNE_S(uint64 instruction)
4438 {
4439     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4440     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4441     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4442
4443     std::string fd = FPR(copy(fd_value));
4444     std::string fs = FPR(copy(fs_value));
4445     std::string ft = FPR(copy(ft_value));
4446
4447     return img::format("CMP.SUNE.S %s, %s, %s", fd, fs, ft);
4448 }
4449
4450
4451 /*
4452  *
4453  *
4454  *   3         2         1
4455  *  10987654321098765432109876543210
4456  *  001000               x1110000101
4457  *     rt -----
4458  *          rs -----
4459  *               rd -----
4460  */
4461 std::string NMD::CMP_SUN_S(uint64 instruction)
4462 {
4463     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4464     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4465     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4466
4467     std::string fd = FPR(copy(fd_value));
4468     std::string fs = FPR(copy(fs_value));
4469     std::string ft = FPR(copy(ft_value));
4470
4471     return img::format("CMP.SUN.S %s, %s, %s", fd, fs, ft);
4472 }
4473
4474
4475 /*
4476  *
4477  *
4478  *   3         2         1
4479  *  10987654321098765432109876543210
4480  *  001000               x1110000101
4481  *     rt -----
4482  *          rs -----
4483  *               rd -----
4484  */
4485 std::string NMD::CMP_UEQ_D(uint64 instruction)
4486 {
4487     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4488     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4489     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4490
4491     std::string fd = FPR(copy(fd_value));
4492     std::string fs = FPR(copy(fs_value));
4493     std::string ft = FPR(copy(ft_value));
4494
4495     return img::format("CMP.UEQ.D %s, %s, %s", fd, fs, ft);
4496 }
4497
4498
4499 /*
4500  *
4501  *
4502  *   3         2         1
4503  *  10987654321098765432109876543210
4504  *  001000               x1110000101
4505  *     rt -----
4506  *          rs -----
4507  *               rd -----
4508  */
4509 std::string NMD::CMP_UEQ_S(uint64 instruction)
4510 {
4511     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4512     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4513     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4514
4515     std::string fd = FPR(copy(fd_value));
4516     std::string fs = FPR(copy(fs_value));
4517     std::string ft = FPR(copy(ft_value));
4518
4519     return img::format("CMP.UEQ.S %s, %s, %s", fd, fs, ft);
4520 }
4521
4522
4523 /*
4524  *
4525  *
4526  *   3         2         1
4527  *  10987654321098765432109876543210
4528  *  001000               x1110000101
4529  *     rt -----
4530  *          rs -----
4531  *               rd -----
4532  */
4533 std::string NMD::CMP_ULE_D(uint64 instruction)
4534 {
4535     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4536     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4537     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4538
4539     std::string fd = FPR(copy(fd_value));
4540     std::string fs = FPR(copy(fs_value));
4541     std::string ft = FPR(copy(ft_value));
4542
4543     return img::format("CMP.ULE.D %s, %s, %s", fd, fs, ft);
4544 }
4545
4546
4547 /*
4548  *
4549  *
4550  *   3         2         1
4551  *  10987654321098765432109876543210
4552  *  001000               x1110000101
4553  *     rt -----
4554  *          rs -----
4555  *               rd -----
4556  */
4557 std::string NMD::CMP_ULE_S(uint64 instruction)
4558 {
4559     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4560     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4561     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4562
4563     std::string fd = FPR(copy(fd_value));
4564     std::string fs = FPR(copy(fs_value));
4565     std::string ft = FPR(copy(ft_value));
4566
4567     return img::format("CMP.ULE.S %s, %s, %s", fd, fs, ft);
4568 }
4569
4570
4571 /*
4572  *
4573  *
4574  *   3         2         1
4575  *  10987654321098765432109876543210
4576  *  001000               x1110000101
4577  *     rt -----
4578  *          rs -----
4579  *               rd -----
4580  */
4581 std::string NMD::CMP_ULT_D(uint64 instruction)
4582 {
4583     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4584     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4585     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4586
4587     std::string fd = FPR(copy(fd_value));
4588     std::string fs = FPR(copy(fs_value));
4589     std::string ft = FPR(copy(ft_value));
4590
4591     return img::format("CMP.ULT.D %s, %s, %s", fd, fs, ft);
4592 }
4593
4594
4595 /*
4596  *
4597  *
4598  *   3         2         1
4599  *  10987654321098765432109876543210
4600  *  001000               x1110000101
4601  *     rt -----
4602  *          rs -----
4603  *               rd -----
4604  */
4605 std::string NMD::CMP_ULT_S(uint64 instruction)
4606 {
4607     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4608     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4609     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4610
4611     std::string fd = FPR(copy(fd_value));
4612     std::string fs = FPR(copy(fs_value));
4613     std::string ft = FPR(copy(ft_value));
4614
4615     return img::format("CMP.ULT.S %s, %s, %s", fd, fs, ft);
4616 }
4617
4618
4619 /*
4620  *
4621  *
4622  *   3         2         1
4623  *  10987654321098765432109876543210
4624  *  001000               x1110000101
4625  *     rt -----
4626  *          rs -----
4627  *               rd -----
4628  */
4629 std::string NMD::CMP_UN_D(uint64 instruction)
4630 {
4631     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4632     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4633     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4634
4635     std::string fd = FPR(copy(fd_value));
4636     std::string fs = FPR(copy(fs_value));
4637     std::string ft = FPR(copy(ft_value));
4638
4639     return img::format("CMP.UN.D %s, %s, %s", fd, fs, ft);
4640 }
4641
4642
4643 /*
4644  *
4645  *
4646  *   3         2         1
4647  *  10987654321098765432109876543210
4648  *  001000               x1110000101
4649  *     rt -----
4650  *          rs -----
4651  *               rd -----
4652  */
4653 std::string NMD::CMP_UNE_D(uint64 instruction)
4654 {
4655     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4656     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4657     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4658
4659     std::string fd = FPR(copy(fd_value));
4660     std::string fs = FPR(copy(fs_value));
4661     std::string ft = FPR(copy(ft_value));
4662
4663     return img::format("CMP.UNE.D %s, %s, %s", fd, fs, ft);
4664 }
4665
4666
4667 /*
4668  *
4669  *
4670  *   3         2         1
4671  *  10987654321098765432109876543210
4672  *  001000               x1110000101
4673  *     rt -----
4674  *          rs -----
4675  *               rd -----
4676  */
4677 std::string NMD::CMP_UNE_S(uint64 instruction)
4678 {
4679     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4680     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4681     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4682
4683     std::string fd = FPR(copy(fd_value));
4684     std::string fs = FPR(copy(fs_value));
4685     std::string ft = FPR(copy(ft_value));
4686
4687     return img::format("CMP.UNE.S %s, %s, %s", fd, fs, ft);
4688 }
4689
4690
4691 /*
4692  *
4693  *
4694  *   3         2         1
4695  *  10987654321098765432109876543210
4696  *  001000               x1110000101
4697  *     rt -----
4698  *          rs -----
4699  *               rd -----
4700  */
4701 std::string NMD::CMP_UN_S(uint64 instruction)
4702 {
4703     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
4704     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
4705     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
4706
4707     std::string fd = FPR(copy(fd_value));
4708     std::string fs = FPR(copy(fs_value));
4709     std::string ft = FPR(copy(ft_value));
4710
4711     return img::format("CMP.UN.S %s, %s, %s", fd, fs, ft);
4712 }
4713
4714
4715 /*
4716  *
4717  *
4718  *   3         2         1
4719  *  10987654321098765432109876543210
4720  *  001000               x1110000101
4721  *     rt -----
4722  *          rs -----
4723  *               rd -----
4724  */
4725 std::string NMD::CMPGDU_EQ_QB(uint64 instruction)
4726 {
4727     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
4728     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
4729     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
4730
4731     std::string rd = GPR(copy(rd_value));
4732     std::string rs = GPR(copy(rs_value));
4733     std::string rt = GPR(copy(rt_value));
4734
4735     return img::format("CMPGDU.EQ.QB %s, %s, %s", rd, rs, rt);
4736 }
4737
4738
4739 /*
4740  *
4741  *
4742  *   3         2         1
4743  *  10987654321098765432109876543210
4744  *  001000               x1110000101
4745  *     rt -----
4746  *          rs -----
4747  *               rd -----
4748  */
4749 std::string NMD::CMPGDU_LE_QB(uint64 instruction)
4750 {
4751     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
4752     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
4753     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
4754
4755     std::string rd = GPR(copy(rd_value));
4756     std::string rs = GPR(copy(rs_value));
4757     std::string rt = GPR(copy(rt_value));
4758
4759     return img::format("CMPGDU.LE.QB %s, %s, %s", rd, rs, rt);
4760 }
4761
4762
4763 /*
4764  *
4765  *
4766  *   3         2         1
4767  *  10987654321098765432109876543210
4768  *  001000               x1110000101
4769  *     rt -----
4770  *          rs -----
4771  *               rd -----
4772  */
4773 std::string NMD::CMPGDU_LT_QB(uint64 instruction)
4774 {
4775     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
4776     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
4777     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
4778
4779     std::string rd = GPR(copy(rd_value));
4780     std::string rs = GPR(copy(rs_value));
4781     std::string rt = GPR(copy(rt_value));
4782
4783     return img::format("CMPGDU.LT.QB %s, %s, %s", rd, rs, rt);
4784 }
4785
4786
4787 /*
4788  *
4789  *
4790  *   3         2         1
4791  *  10987654321098765432109876543210
4792  *  001000               x1110000101
4793  *     rt -----
4794  *          rs -----
4795  *               rd -----
4796  */
4797 std::string NMD::CMPGU_EQ_QB(uint64 instruction)
4798 {
4799     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
4800     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
4801     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
4802
4803     std::string rd = GPR(copy(rd_value));
4804     std::string rs = GPR(copy(rs_value));
4805     std::string rt = GPR(copy(rt_value));
4806
4807     return img::format("CMPGU.EQ.QB %s, %s, %s", rd, rs, rt);
4808 }
4809
4810
4811 /*
4812  *
4813  *
4814  *   3         2         1
4815  *  10987654321098765432109876543210
4816  *  001000               x1110000101
4817  *     rt -----
4818  *          rs -----
4819  *               rd -----
4820  */
4821 std::string NMD::CMPGU_LE_QB(uint64 instruction)
4822 {
4823     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
4824     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
4825     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
4826
4827     std::string rd = GPR(copy(rd_value));
4828     std::string rs = GPR(copy(rs_value));
4829     std::string rt = GPR(copy(rt_value));
4830
4831     return img::format("CMPGU.LE.QB %s, %s, %s", rd, rs, rt);
4832 }
4833
4834
4835 /*
4836  *
4837  *
4838  *   3         2         1
4839  *  10987654321098765432109876543210
4840  *  001000               x1110000101
4841  *     rt -----
4842  *          rs -----
4843  *               rd -----
4844  */
4845 std::string NMD::CMPGU_LT_QB(uint64 instruction)
4846 {
4847     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
4848     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
4849     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
4850
4851     std::string rd = GPR(copy(rd_value));
4852     std::string rs = GPR(copy(rs_value));
4853     std::string rt = GPR(copy(rt_value));
4854
4855     return img::format("CMPGU.LT.QB %s, %s, %s", rd, rs, rt);
4856 }
4857
4858
4859 /*
4860  *
4861  *
4862  *   3         2         1
4863  *  10987654321098765432109876543210
4864  *  001000               x1110000101
4865  *     rt -----
4866  *          rs -----
4867  *               rd -----
4868  */
4869 std::string NMD::CMPU_EQ_QB(uint64 instruction)
4870 {
4871     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
4872     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
4873
4874     std::string rs = GPR(copy(rs_value));
4875     std::string rt = GPR(copy(rt_value));
4876
4877     return img::format("CMPU.EQ.QB %s, %s", rs, rt);
4878 }
4879
4880
4881 /*
4882  *
4883  *
4884  *   3         2         1
4885  *  10987654321098765432109876543210
4886  *  001000               x1110000101
4887  *     rt -----
4888  *          rs -----
4889  *               rd -----
4890  */
4891 std::string NMD::CMPU_LE_QB(uint64 instruction)
4892 {
4893     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
4894     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
4895
4896     std::string rs = GPR(copy(rs_value));
4897     std::string rt = GPR(copy(rt_value));
4898
4899     return img::format("CMPU.LE.QB %s, %s", rs, rt);
4900 }
4901
4902
4903 /*
4904  *
4905  *
4906  *   3         2         1
4907  *  10987654321098765432109876543210
4908  *  001000               x1110000101
4909  *     rt -----
4910  *          rs -----
4911  *               rd -----
4912  */
4913 std::string NMD::CMPU_LT_QB(uint64 instruction)
4914 {
4915     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
4916     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
4917
4918     std::string rs = GPR(copy(rs_value));
4919     std::string rt = GPR(copy(rt_value));
4920
4921     return img::format("CMPU.LT.QB %s, %s", rs, rt);
4922 }
4923
4924
4925 /*
4926  *
4927  *
4928  *   3         2         1
4929  *  10987654321098765432109876543210
4930  *  001000               x1110000101
4931  *     rt -----
4932  *          rs -----
4933  *               rd -----
4934  */
4935 std::string NMD::COP2_1(uint64 instruction)
4936 {
4937     uint64 cofun_value = extract_cofun_25_24_23(instruction);
4938
4939     std::string cofun = IMMEDIATE(copy(cofun_value));
4940
4941     return img::format("COP2_1 %s", cofun);
4942 }
4943
4944
4945 /*
4946  *
4947  *
4948  *   3         2         1
4949  *  10987654321098765432109876543210
4950  *  001000               x1110000101
4951  *     rt -----
4952  *          rs -----
4953  *               rd -----
4954  */
4955 std::string NMD::CTC1(uint64 instruction)
4956 {
4957     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
4958     uint64 cs_value = extract_cs_20_19_18_17_16(instruction);
4959
4960     std::string rt = GPR(copy(rt_value));
4961     std::string cs = CPR(copy(cs_value));
4962
4963     return img::format("CTC1 %s, %s", rt, cs);
4964 }
4965
4966
4967 /*
4968  *
4969  *
4970  *   3         2         1
4971  *  10987654321098765432109876543210
4972  *  001000               x1110000101
4973  *     rt -----
4974  *          rs -----
4975  *               rd -----
4976  */
4977 std::string NMD::CTC2(uint64 instruction)
4978 {
4979     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
4980     uint64 cs_value = extract_cs_20_19_18_17_16(instruction);
4981
4982     std::string rt = GPR(copy(rt_value));
4983     std::string cs = CPR(copy(cs_value));
4984
4985     return img::format("CTC2 %s, %s", rt, cs);
4986 }
4987
4988
4989 /*
4990  *
4991  *
4992  *   3         2         1
4993  *  10987654321098765432109876543210
4994  *  001000               x1110000101
4995  *     rt -----
4996  *          rs -----
4997  *               rd -----
4998  */
4999 std::string NMD::CVT_D_L(uint64 instruction)
5000 {
5001     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
5002     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
5003
5004     std::string ft = FPR(copy(ft_value));
5005     std::string fs = FPR(copy(fs_value));
5006
5007     return img::format("CVT.D.L %s, %s", ft, fs);
5008 }
5009
5010
5011 /*
5012  *
5013  *
5014  *   3         2         1
5015  *  10987654321098765432109876543210
5016  *  001000               x1110000101
5017  *     rt -----
5018  *          rs -----
5019  *               rd -----
5020  */
5021 std::string NMD::CVT_D_S(uint64 instruction)
5022 {
5023     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
5024     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
5025
5026     std::string ft = FPR(copy(ft_value));
5027     std::string fs = FPR(copy(fs_value));
5028
5029     return img::format("CVT.D.S %s, %s", ft, fs);
5030 }
5031
5032
5033 /*
5034  *
5035  *
5036  *   3         2         1
5037  *  10987654321098765432109876543210
5038  *  001000               x1110000101
5039  *     rt -----
5040  *          rs -----
5041  *               rd -----
5042  */
5043 std::string NMD::CVT_D_W(uint64 instruction)
5044 {
5045     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
5046     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
5047
5048     std::string ft = FPR(copy(ft_value));
5049     std::string fs = FPR(copy(fs_value));
5050
5051     return img::format("CVT.D.W %s, %s", ft, fs);
5052 }
5053
5054
5055 /*
5056  *
5057  *
5058  *   3         2         1
5059  *  10987654321098765432109876543210
5060  *  001000               x1110000101
5061  *     rt -----
5062  *          rs -----
5063  *               rd -----
5064  */
5065 std::string NMD::CVT_L_D(uint64 instruction)
5066 {
5067     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
5068     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
5069
5070     std::string ft = FPR(copy(ft_value));
5071     std::string fs = FPR(copy(fs_value));
5072
5073     return img::format("CVT.L.D %s, %s", ft, fs);
5074 }
5075
5076
5077 /*
5078  *
5079  *
5080  *   3         2         1
5081  *  10987654321098765432109876543210
5082  *  001000               x1110000101
5083  *     rt -----
5084  *          rs -----
5085  *               rd -----
5086  */
5087 std::string NMD::CVT_L_S(uint64 instruction)
5088 {
5089     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
5090     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
5091
5092     std::string ft = FPR(copy(ft_value));
5093     std::string fs = FPR(copy(fs_value));
5094
5095     return img::format("CVT.L.S %s, %s", ft, fs);
5096 }
5097
5098
5099 /*
5100  *
5101  *
5102  *   3         2         1
5103  *  10987654321098765432109876543210
5104  *  001000               x1110000101
5105  *     rt -----
5106  *          rs -----
5107  *               rd -----
5108  */
5109 std::string NMD::CVT_S_D(uint64 instruction)
5110 {
5111     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
5112     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
5113
5114     std::string ft = FPR(copy(ft_value));
5115     std::string fs = FPR(copy(fs_value));
5116
5117     return img::format("CVT.S.D %s, %s", ft, fs);
5118 }
5119
5120
5121 /*
5122  *
5123  *
5124  *   3         2         1
5125  *  10987654321098765432109876543210
5126  *  001000               x1110000101
5127  *     rt -----
5128  *          rs -----
5129  *               rd -----
5130  */
5131 std::string NMD::CVT_S_L(uint64 instruction)
5132 {
5133     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
5134     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
5135
5136     std::string ft = FPR(copy(ft_value));
5137     std::string fs = FPR(copy(fs_value));
5138
5139     return img::format("CVT.S.L %s, %s", ft, fs);
5140 }
5141
5142
5143 /*
5144  *
5145  *
5146  *   3         2         1
5147  *  10987654321098765432109876543210
5148  *  001000               x1110000101
5149  *     rt -----
5150  *          rs -----
5151  *               rd -----
5152  */
5153 std::string NMD::CVT_S_PL(uint64 instruction)
5154 {
5155     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
5156     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
5157
5158     std::string ft = FPR(copy(ft_value));
5159     std::string fs = FPR(copy(fs_value));
5160
5161     return img::format("CVT.S.PL %s, %s", ft, fs);
5162 }
5163
5164
5165 /*
5166  *
5167  *
5168  *   3         2         1
5169  *  10987654321098765432109876543210
5170  *  001000               x1110000101
5171  *     rt -----
5172  *          rs -----
5173  *               rd -----
5174  */
5175 std::string NMD::CVT_S_PU(uint64 instruction)
5176 {
5177     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
5178     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
5179
5180     std::string ft = FPR(copy(ft_value));
5181     std::string fs = FPR(copy(fs_value));
5182
5183     return img::format("CVT.S.PU %s, %s", ft, fs);
5184 }
5185
5186
5187 /*
5188  *
5189  *
5190  *   3         2         1
5191  *  10987654321098765432109876543210
5192  *  001000               x1110000101
5193  *     rt -----
5194  *          rs -----
5195  *               rd -----
5196  */
5197 std::string NMD::CVT_S_W(uint64 instruction)
5198 {
5199     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
5200     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
5201
5202     std::string ft = FPR(copy(ft_value));
5203     std::string fs = FPR(copy(fs_value));
5204
5205     return img::format("CVT.S.W %s, %s", ft, fs);
5206 }
5207
5208
5209 /*
5210  *
5211  *
5212  *   3         2         1
5213  *  10987654321098765432109876543210
5214  *  001000               x1110000101
5215  *     rt -----
5216  *          rs -----
5217  *               rd -----
5218  */
5219 std::string NMD::CVT_W_D(uint64 instruction)
5220 {
5221     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
5222     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
5223
5224     std::string ft = FPR(copy(ft_value));
5225     std::string fs = FPR(copy(fs_value));
5226
5227     return img::format("CVT.W.D %s, %s", ft, fs);
5228 }
5229
5230
5231 /*
5232  *
5233  *
5234  *   3         2         1
5235  *  10987654321098765432109876543210
5236  *  001000               x1110000101
5237  *     rt -----
5238  *          rs -----
5239  *               rd -----
5240  */
5241 std::string NMD::CVT_W_S(uint64 instruction)
5242 {
5243     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
5244     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
5245
5246     std::string ft = FPR(copy(ft_value));
5247     std::string fs = FPR(copy(fs_value));
5248
5249     return img::format("CVT.W.S %s, %s", ft, fs);
5250 }
5251
5252
5253 /*
5254  *
5255  *
5256  *   3         2         1
5257  *  10987654321098765432109876543210
5258  *  001000               x1110000101
5259  *     rt -----
5260  *          rs -----
5261  *               rd -----
5262  */
5263 std::string NMD::DADDIU_48_(uint64 instruction)
5264 {
5265     uint64 rt_value = extract_rt_41_40_39_38_37(instruction);
5266     int64 s_value = extract_s__se31_15_to_0_31_to_16(instruction);
5267
5268     std::string rt = GPR(copy(rt_value));
5269     std::string s = IMMEDIATE(copy(s_value));
5270
5271     return img::format("DADDIU %s, %s", rt, s);
5272 }
5273
5274
5275 /*
5276  *
5277  *
5278  *   3         2         1
5279  *  10987654321098765432109876543210
5280  *  001000               x1110000101
5281  *     rt -----
5282  *          rs -----
5283  *               rd -----
5284  */
5285 std::string NMD::DADDIU_NEG_(uint64 instruction)
5286 {
5287     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
5288     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
5289     uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
5290
5291     std::string rt = GPR(copy(rt_value));
5292     std::string rs = GPR(copy(rs_value));
5293     std::string u = IMMEDIATE(neg_copy(u_value));
5294
5295     return img::format("DADDIU %s, %s, %s", rt, rs, u);
5296 }
5297
5298
5299 /*
5300  *
5301  *
5302  *   3         2         1
5303  *  10987654321098765432109876543210
5304  *  001000               x1110000101
5305  *     rt -----
5306  *          rs -----
5307  *               rd -----
5308  */
5309 std::string NMD::DADDIU_U12_(uint64 instruction)
5310 {
5311     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
5312     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
5313     uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
5314
5315     std::string rt = GPR(copy(rt_value));
5316     std::string rs = GPR(copy(rs_value));
5317     std::string u = IMMEDIATE(copy(u_value));
5318
5319     return img::format("DADDIU %s, %s, %s", rt, rs, u);
5320 }
5321
5322
5323 /*
5324  *
5325  *
5326  *   3         2         1
5327  *  10987654321098765432109876543210
5328  *  001000               x1110000101
5329  *     rt -----
5330  *          rs -----
5331  *               rd -----
5332  */
5333 std::string NMD::DADD(uint64 instruction)
5334 {
5335     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
5336     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
5337     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
5338
5339     std::string rd = GPR(copy(rd_value));
5340     std::string rs = GPR(copy(rs_value));
5341     std::string rt = GPR(copy(rt_value));
5342
5343     return img::format("DADD %s, %s, %s", rd, rs, rt);
5344 }
5345
5346
5347 /*
5348  *
5349  *
5350  *   3         2         1
5351  *  10987654321098765432109876543210
5352  *  001000               x1110000101
5353  *     rt -----
5354  *          rs -----
5355  *               rd -----
5356  */
5357 std::string NMD::DADDU(uint64 instruction)
5358 {
5359     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
5360     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
5361     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
5362
5363     std::string rd = GPR(copy(rd_value));
5364     std::string rs = GPR(copy(rs_value));
5365     std::string rt = GPR(copy(rt_value));
5366
5367     return img::format("DADDU %s, %s, %s", rd, rs, rt);
5368 }
5369
5370
5371 /*
5372  *
5373  *
5374  *   3         2         1
5375  *  10987654321098765432109876543210
5376  *  001000               x1110000101
5377  *     rt -----
5378  *          rs -----
5379  *               rd -----
5380  */
5381 std::string NMD::DCLO(uint64 instruction)
5382 {
5383     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
5384     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
5385
5386     std::string rt = GPR(copy(rt_value));
5387     std::string rs = GPR(copy(rs_value));
5388
5389     return img::format("DCLO %s, %s", rt, rs);
5390 }
5391
5392
5393 /*
5394  *
5395  *
5396  *   3         2         1
5397  *  10987654321098765432109876543210
5398  *  001000               x1110000101
5399  *     rt -----
5400  *          rs -----
5401  *               rd -----
5402  */
5403 std::string NMD::DCLZ(uint64 instruction)
5404 {
5405     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
5406     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
5407
5408     std::string rt = GPR(copy(rt_value));
5409     std::string rs = GPR(copy(rs_value));
5410
5411     return img::format("DCLZ %s, %s", rt, rs);
5412 }
5413
5414
5415 /*
5416  *
5417  *
5418  *   3         2         1
5419  *  10987654321098765432109876543210
5420  *  001000               x1110000101
5421  *     rt -----
5422  *          rs -----
5423  *               rd -----
5424  */
5425 std::string NMD::DDIV(uint64 instruction)
5426 {
5427     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
5428     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
5429     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
5430
5431     std::string rd = GPR(copy(rd_value));
5432     std::string rs = GPR(copy(rs_value));
5433     std::string rt = GPR(copy(rt_value));
5434
5435     return img::format("DDIV %s, %s, %s", rd, rs, rt);
5436 }
5437
5438
5439 /*
5440  *
5441  *
5442  *   3         2         1
5443  *  10987654321098765432109876543210
5444  *  001000               x1110000101
5445  *     rt -----
5446  *          rs -----
5447  *               rd -----
5448  */
5449 std::string NMD::DDIVU(uint64 instruction)
5450 {
5451     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
5452     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
5453     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
5454
5455     std::string rd = GPR(copy(rd_value));
5456     std::string rs = GPR(copy(rs_value));
5457     std::string rt = GPR(copy(rt_value));
5458
5459     return img::format("DDIVU %s, %s, %s", rd, rs, rt);
5460 }
5461
5462
5463 /*
5464  *
5465  *
5466  *   3         2         1
5467  *  10987654321098765432109876543210
5468  *  001000               x1110000101
5469  *     rt -----
5470  *          rs -----
5471  *               rd -----
5472  */
5473 std::string NMD::DERET(uint64 instruction)
5474 {
5475     (void)instruction;
5476
5477     return "DERET ";
5478 }
5479
5480
5481 /*
5482  *
5483  *
5484  *   3         2         1
5485  *  10987654321098765432109876543210
5486  *  001000               x1110000101
5487  *     rt -----
5488  *          rs -----
5489  *               rd -----
5490  */
5491 std::string NMD::DEXTM(uint64 instruction)
5492 {
5493     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
5494     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
5495     uint64 msbd_value = extract_msbt_10_9_8_7_6(instruction);
5496     uint64 lsb_value = extract_lsb_4_3_2_1_0(instruction);
5497
5498     std::string rt = GPR(copy(rt_value));
5499     std::string rs = GPR(copy(rs_value));
5500     std::string lsb = IMMEDIATE(copy(lsb_value));
5501     std::string msbd = IMMEDIATE(encode_msbd_from_size(msbd_value));
5502
5503     return img::format("DEXTM %s, %s, %s, %s", rt, rs, lsb, msbd);
5504 }
5505
5506
5507 /*
5508  *
5509  *
5510  *   3         2         1
5511  *  10987654321098765432109876543210
5512  *  001000               x1110000101
5513  *     rt -----
5514  *          rs -----
5515  *               rd -----
5516  */
5517 std::string NMD::DEXT(uint64 instruction)
5518 {
5519     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
5520     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
5521     uint64 msbd_value = extract_msbt_10_9_8_7_6(instruction);
5522     uint64 lsb_value = extract_lsb_4_3_2_1_0(instruction);
5523
5524     std::string rt = GPR(copy(rt_value));
5525     std::string rs = GPR(copy(rs_value));
5526     std::string lsb = IMMEDIATE(copy(lsb_value));
5527     std::string msbd = IMMEDIATE(encode_msbd_from_size(msbd_value));
5528
5529     return img::format("DEXT %s, %s, %s, %s", rt, rs, lsb, msbd);
5530 }
5531
5532
5533 /*
5534  *
5535  *
5536  *   3         2         1
5537  *  10987654321098765432109876543210
5538  *  001000               x1110000101
5539  *     rt -----
5540  *          rs -----
5541  *               rd -----
5542  */
5543 std::string NMD::DEXTU(uint64 instruction)
5544 {
5545     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
5546     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
5547     uint64 msbd_value = extract_msbt_10_9_8_7_6(instruction);
5548     uint64 lsb_value = extract_lsb_4_3_2_1_0(instruction);
5549
5550     std::string rt = GPR(copy(rt_value));
5551     std::string rs = GPR(copy(rs_value));
5552     std::string lsb = IMMEDIATE(copy(lsb_value));
5553     std::string msbd = IMMEDIATE(encode_msbd_from_size(msbd_value));
5554
5555     return img::format("DEXTU %s, %s, %s, %s", rt, rs, lsb, msbd);
5556 }
5557
5558
5559 /*
5560  *
5561  *
5562  *   3         2         1
5563  *  10987654321098765432109876543210
5564  *  001000               x1110000101
5565  *     rt -----
5566  *          rs -----
5567  *               rd -----
5568  */
5569 std::string NMD::DINSM(uint64 instruction)
5570 {
5571     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
5572     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
5573     uint64 msbd_value = extract_msbt_10_9_8_7_6(instruction);
5574     uint64 lsb_value = extract_lsb_4_3_2_1_0(instruction);
5575
5576     std::string rt = GPR(copy(rt_value));
5577     std::string rs = GPR(copy(rs_value));
5578     std::string pos = IMMEDIATE(encode_lsb_from_pos_and_size(lsb_value));
5579     std::string size = IMMEDIATE(encode_lsb_from_pos_and_size(msbd_value));
5580     /* !!!!!!!!!! - no conversion function */
5581
5582     return img::format("DINSM %s, %s, %s, %s", rt, rs, pos, size);
5583     /* hand edited */
5584 }
5585
5586
5587 /*
5588  *
5589  *
5590  *   3         2         1
5591  *  10987654321098765432109876543210
5592  *  001000               x1110000101
5593  *     rt -----
5594  *          rs -----
5595  *               rd -----
5596  */
5597 std::string NMD::DINS(uint64 instruction)
5598 {
5599     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
5600     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
5601     uint64 msbd_value = extract_msbt_10_9_8_7_6(instruction);
5602     uint64 lsb_value = extract_lsb_4_3_2_1_0(instruction);
5603
5604     std::string rt = GPR(copy(rt_value));
5605     std::string rs = GPR(copy(rs_value));
5606     std::string pos = IMMEDIATE(encode_lsb_from_pos_and_size(lsb_value));
5607     std::string size = IMMEDIATE(encode_lsb_from_pos_and_size(msbd_value));
5608     /* !!!!!!!!!! - no conversion function */
5609
5610     return img::format("DINS %s, %s, %s, %s", rt, rs, pos, size);
5611     /* hand edited */
5612 }
5613
5614
5615 /*
5616  *
5617  *
5618  *   3         2         1
5619  *  10987654321098765432109876543210
5620  *  001000               x1110000101
5621  *     rt -----
5622  *          rs -----
5623  *               rd -----
5624  */
5625 std::string NMD::DINSU(uint64 instruction)
5626 {
5627     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
5628     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
5629     uint64 msbd_value = extract_msbt_10_9_8_7_6(instruction);
5630     uint64 lsb_value = extract_lsb_4_3_2_1_0(instruction);
5631
5632     std::string rt = GPR(copy(rt_value));
5633     std::string rs = GPR(copy(rs_value));
5634     std::string pos = IMMEDIATE(encode_lsb_from_pos_and_size(lsb_value));
5635     std::string size = IMMEDIATE(encode_lsb_from_pos_and_size(msbd_value));
5636     /* !!!!!!!!!! - no conversion function */
5637
5638     return img::format("DINSU %s, %s, %s, %s", rt, rs, pos, size);
5639     /* hand edited */
5640 }
5641
5642
5643 /*
5644  *
5645  *
5646  *   3         2         1
5647  *  10987654321098765432109876543210
5648  *  001000               x1110000101
5649  *     rt -----
5650  *          rs -----
5651  *               rd -----
5652  */
5653 std::string NMD::DI(uint64 instruction)
5654 {
5655     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
5656
5657     std::string rt = GPR(copy(rt_value));
5658
5659     return img::format("DI %s", rt);
5660 }
5661
5662
5663 /*
5664  *
5665  *
5666  *   3         2         1
5667  *  10987654321098765432109876543210
5668  *  001000               x1110000101
5669  *     rt -----
5670  *          rs -----
5671  *               rd -----
5672  */
5673 std::string NMD::DIV(uint64 instruction)
5674 {
5675     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
5676     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
5677     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
5678
5679     std::string rd = GPR(copy(rd_value));
5680     std::string rs = GPR(copy(rs_value));
5681     std::string rt = GPR(copy(rt_value));
5682
5683     return img::format("DIV %s, %s, %s", rd, rs, rt);
5684 }
5685
5686
5687 /*
5688  *
5689  *
5690  *   3         2         1
5691  *  10987654321098765432109876543210
5692  *  001000               x1110000101
5693  *     rt -----
5694  *          rs -----
5695  *               rd -----
5696  */
5697 std::string NMD::DIV_D(uint64 instruction)
5698 {
5699     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
5700     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
5701     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
5702
5703     std::string fd = FPR(copy(fd_value));
5704     std::string fs = FPR(copy(fs_value));
5705     std::string ft = FPR(copy(ft_value));
5706
5707     return img::format("DIV.D %s, %s, %s", fd, fs, ft);
5708 }
5709
5710
5711 /*
5712  *
5713  *
5714  *   3         2         1
5715  *  10987654321098765432109876543210
5716  *  001000               x1110000101
5717  *     rt -----
5718  *          rs -----
5719  *               rd -----
5720  */
5721 std::string NMD::DIV_S(uint64 instruction)
5722 {
5723     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
5724     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
5725     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
5726
5727     std::string fd = FPR(copy(fd_value));
5728     std::string fs = FPR(copy(fs_value));
5729     std::string ft = FPR(copy(ft_value));
5730
5731     return img::format("DIV.S %s, %s, %s", fd, fs, ft);
5732 }
5733
5734
5735 /*
5736  *
5737  *
5738  *   3         2         1
5739  *  10987654321098765432109876543210
5740  *  001000               x1110000101
5741  *     rt -----
5742  *          rs -----
5743  *               rd -----
5744  */
5745 std::string NMD::DIVU(uint64 instruction)
5746 {
5747     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
5748     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
5749     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
5750
5751     std::string rd = GPR(copy(rd_value));
5752     std::string rs = GPR(copy(rs_value));
5753     std::string rt = GPR(copy(rt_value));
5754
5755     return img::format("DIVU %s, %s, %s", rd, rs, rt);
5756 }
5757
5758
5759 /*
5760  *
5761  *
5762  *   3         2         1
5763  *  10987654321098765432109876543210
5764  *  001000               x1110000101
5765  *     rt -----
5766  *          rs -----
5767  *               rd -----
5768  */
5769 std::string NMD::DLSA(uint64 instruction)
5770 {
5771     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
5772     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
5773     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
5774     uint64 u2_value = extract_u2_10_9(instruction);
5775
5776     std::string rd = GPR(copy(rd_value));
5777     std::string rs = GPR(copy(rs_value));
5778     std::string rt = GPR(copy(rt_value));
5779     std::string u2 = IMMEDIATE(copy(u2_value));
5780
5781     return img::format("DLSA %s, %s, %s, %s", rd, rs, rt, u2);
5782 }
5783
5784
5785 /*
5786  *
5787  *
5788  *   3         2         1
5789  *  10987654321098765432109876543210
5790  *  001000               x1110000101
5791  *     rt -----
5792  *          rs -----
5793  *               rd -----
5794  */
5795 std::string NMD::DLUI_48_(uint64 instruction)
5796 {
5797     uint64 rt_value = extract_rt_41_40_39_38_37(instruction);
5798     uint64 u_value = extract_u_31_to_0__s32(instruction);
5799
5800     std::string rt = GPR(copy(rt_value));
5801     std::string u = IMMEDIATE(copy(u_value));
5802
5803     return img::format("DLUI %s, %s", rt, u);
5804 }
5805
5806
5807 /*
5808  *
5809  *
5810  *   3         2         1
5811  *  10987654321098765432109876543210
5812  *  001000               x1110000101
5813  *     rt -----
5814  *          rs -----
5815  *               rd -----
5816  */
5817 std::string NMD::DMFC0(uint64 instruction)
5818 {
5819     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
5820     uint64 c0s_value = extract_c0s_20_19_18_17_16(instruction);
5821     uint64 sel_value = extract_sel_15_14_13_12_11(instruction);
5822
5823     std::string rt = GPR(copy(rt_value));
5824     std::string c0s = CPR(copy(c0s_value));
5825     std::string sel = IMMEDIATE(copy(sel_value));
5826
5827     return img::format("DMFC0 %s, %s, %s", rt, c0s, sel);
5828 }
5829
5830
5831 /*
5832  *
5833  *
5834  *   3         2         1
5835  *  10987654321098765432109876543210
5836  *  001000               x1110000101
5837  *     rt -----
5838  *          rs -----
5839  *               rd -----
5840  */
5841 std::string NMD::DMFC1(uint64 instruction)
5842 {
5843     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
5844     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
5845
5846     std::string rt = GPR(copy(rt_value));
5847     std::string fs = FPR(copy(fs_value));
5848
5849     return img::format("DMFC1 %s, %s", rt, fs);
5850 }
5851
5852
5853 /*
5854  *
5855  *
5856  *   3         2         1
5857  *  10987654321098765432109876543210
5858  *  001000               x1110000101
5859  *     rt -----
5860  *          rs -----
5861  *               rd -----
5862  */
5863 std::string NMD::DMFC2(uint64 instruction)
5864 {
5865     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
5866     uint64 cs_value = extract_cs_20_19_18_17_16(instruction);
5867
5868     std::string rt = GPR(copy(rt_value));
5869     std::string cs = CPR(copy(cs_value));
5870
5871     return img::format("DMFC2 %s, %s", rt, cs);
5872 }
5873
5874
5875 /*
5876  *
5877  *
5878  *   3         2         1
5879  *  10987654321098765432109876543210
5880  *  001000               x1110000101
5881  *     rt -----
5882  *          rs -----
5883  *               rd -----
5884  */
5885 std::string NMD::DMFGC0(uint64 instruction)
5886 {
5887     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
5888     uint64 c0s_value = extract_c0s_20_19_18_17_16(instruction);
5889     uint64 sel_value = extract_sel_15_14_13_12_11(instruction);
5890
5891     std::string rt = GPR(copy(rt_value));
5892     std::string c0s = CPR(copy(c0s_value));
5893     std::string sel = IMMEDIATE(copy(sel_value));
5894
5895     return img::format("DMFGC0 %s, %s, %s", rt, c0s, sel);
5896 }
5897
5898
5899 /*
5900  *
5901  *
5902  *   3         2         1
5903  *  10987654321098765432109876543210
5904  *  001000               x1110000101
5905  *     rt -----
5906  *          rs -----
5907  *               rd -----
5908  */
5909 std::string NMD::DMOD(uint64 instruction)
5910 {
5911     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
5912     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
5913     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
5914
5915     std::string rd = GPR(copy(rd_value));
5916     std::string rs = GPR(copy(rs_value));
5917     std::string rt = GPR(copy(rt_value));
5918
5919     return img::format("DMOD %s, %s, %s", rd, rs, rt);
5920 }
5921
5922
5923 /*
5924  *
5925  *
5926  *   3         2         1
5927  *  10987654321098765432109876543210
5928  *  001000               x1110000101
5929  *     rt -----
5930  *          rs -----
5931  *               rd -----
5932  */
5933 std::string NMD::DMODU(uint64 instruction)
5934 {
5935     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
5936     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
5937     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
5938
5939     std::string rd = GPR(copy(rd_value));
5940     std::string rs = GPR(copy(rs_value));
5941     std::string rt = GPR(copy(rt_value));
5942
5943     return img::format("DMODU %s, %s, %s", rd, rs, rt);
5944 }
5945
5946
5947 /*
5948  *
5949  *
5950  *   3         2         1
5951  *  10987654321098765432109876543210
5952  *  001000               x1110000101
5953  *     rt -----
5954  *          rs -----
5955  *               rd -----
5956  */
5957 std::string NMD::DMTC0(uint64 instruction)
5958 {
5959     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
5960     uint64 c0s_value = extract_c0s_20_19_18_17_16(instruction);
5961     uint64 sel_value = extract_sel_15_14_13_12_11(instruction);
5962
5963     std::string rt = GPR(copy(rt_value));
5964     std::string c0s = CPR(copy(c0s_value));
5965     std::string sel = IMMEDIATE(copy(sel_value));
5966
5967     return img::format("DMTC0 %s, %s, %s", rt, c0s, sel);
5968 }
5969
5970
5971 /*
5972  *
5973  *
5974  *   3         2         1
5975  *  10987654321098765432109876543210
5976  *  001000               x1110000101
5977  *     rt -----
5978  *          rs -----
5979  *               rd -----
5980  */
5981 std::string NMD::DMTC1(uint64 instruction)
5982 {
5983     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
5984     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
5985
5986     std::string rt = GPR(copy(rt_value));
5987     std::string fs = FPR(copy(fs_value));
5988
5989     return img::format("DMTC1 %s, %s", rt, fs);
5990 }
5991
5992
5993 /*
5994  *
5995  *
5996  *   3         2         1
5997  *  10987654321098765432109876543210
5998  *  001000               x1110000101
5999  *     rt -----
6000  *          rs -----
6001  *               rd -----
6002  */
6003 std::string NMD::DMTC2(uint64 instruction)
6004 {
6005     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6006     uint64 cs_value = extract_cs_20_19_18_17_16(instruction);
6007
6008     std::string rt = GPR(copy(rt_value));
6009     std::string cs = CPR(copy(cs_value));
6010
6011     return img::format("DMTC2 %s, %s", rt, cs);
6012 }
6013
6014
6015 /*
6016  *
6017  *
6018  *   3         2         1
6019  *  10987654321098765432109876543210
6020  *  001000               x1110000101
6021  *     rt -----
6022  *          rs -----
6023  *               rd -----
6024  */
6025 std::string NMD::DMTGC0(uint64 instruction)
6026 {
6027     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6028     uint64 c0s_value = extract_c0s_20_19_18_17_16(instruction);
6029     uint64 sel_value = extract_sel_15_14_13_12_11(instruction);
6030
6031     std::string rt = GPR(copy(rt_value));
6032     std::string c0s = CPR(copy(c0s_value));
6033     std::string sel = IMMEDIATE(copy(sel_value));
6034
6035     return img::format("DMTGC0 %s, %s, %s", rt, c0s, sel);
6036 }
6037
6038
6039 /*
6040  *
6041  *
6042  *   3         2         1
6043  *  10987654321098765432109876543210
6044  *  001000               x1110000101
6045  *     rt -----
6046  *          rs -----
6047  *               rd -----
6048  */
6049 std::string NMD::DMT(uint64 instruction)
6050 {
6051     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6052
6053     std::string rt = GPR(copy(rt_value));
6054
6055     return img::format("DMT %s", rt);
6056 }
6057
6058
6059 /*
6060  *
6061  *
6062  *   3         2         1
6063  *  10987654321098765432109876543210
6064  *  001000               x1110000101
6065  *     rt -----
6066  *          rs -----
6067  *               rd -----
6068  */
6069 std::string NMD::DMUH(uint64 instruction)
6070 {
6071     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6072     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6073     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
6074
6075     std::string rd = GPR(copy(rd_value));
6076     std::string rs = GPR(copy(rs_value));
6077     std::string rt = GPR(copy(rt_value));
6078
6079     return img::format("DMUH %s, %s, %s", rd, rs, rt);
6080 }
6081
6082
6083 /*
6084  *
6085  *
6086  *   3         2         1
6087  *  10987654321098765432109876543210
6088  *  001000               x1110000101
6089  *     rt -----
6090  *          rs -----
6091  *               rd -----
6092  */
6093 std::string NMD::DMUHU(uint64 instruction)
6094 {
6095     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6096     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6097     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
6098
6099     std::string rd = GPR(copy(rd_value));
6100     std::string rs = GPR(copy(rs_value));
6101     std::string rt = GPR(copy(rt_value));
6102
6103     return img::format("DMUHU %s, %s, %s", rd, rs, rt);
6104 }
6105
6106
6107 /*
6108  *
6109  *
6110  *   3         2         1
6111  *  10987654321098765432109876543210
6112  *  001000               x1110000101
6113  *     rt -----
6114  *          rs -----
6115  *               rd -----
6116  */
6117 std::string NMD::DMUL(uint64 instruction)
6118 {
6119     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6120     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6121     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
6122
6123     std::string rd = GPR(copy(rd_value));
6124     std::string rs = GPR(copy(rs_value));
6125     std::string rt = GPR(copy(rt_value));
6126
6127     return img::format("DMUL %s, %s, %s", rd, rs, rt);
6128 }
6129
6130
6131 /*
6132  *
6133  *
6134  *   3         2         1
6135  *  10987654321098765432109876543210
6136  *  001000               x1110000101
6137  *     rt -----
6138  *          rs -----
6139  *               rd -----
6140  */
6141 std::string NMD::DMULU(uint64 instruction)
6142 {
6143     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6144     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6145     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
6146
6147     std::string rd = GPR(copy(rd_value));
6148     std::string rs = GPR(copy(rs_value));
6149     std::string rt = GPR(copy(rt_value));
6150
6151     return img::format("DMULU %s, %s, %s", rd, rs, rt);
6152 }
6153
6154
6155 /*
6156  *
6157  *
6158  *   3         2         1
6159  *  10987654321098765432109876543210
6160  *  001000               x1110000101
6161  *     rt -----
6162  *          rs -----
6163  *               rd -----
6164  */
6165 std::string NMD::DPA_W_PH(uint64 instruction)
6166 {
6167     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6168     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6169     uint64 ac_value = extract_ac_13_12(instruction);
6170
6171     std::string ac = AC(copy(ac_value));
6172     std::string rs = GPR(copy(rs_value));
6173     std::string rt = GPR(copy(rt_value));
6174
6175     return img::format("DPA.W.PH %s, %s, %s", ac, rs, rt);
6176 }
6177
6178
6179 /*
6180  *
6181  *
6182  *   3         2         1
6183  *  10987654321098765432109876543210
6184  *  001000               x1110000101
6185  *     rt -----
6186  *          rs -----
6187  *               rd -----
6188  */
6189 std::string NMD::DPAQ_SA_L_W(uint64 instruction)
6190 {
6191     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6192     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6193     uint64 ac_value = extract_ac_13_12(instruction);
6194
6195     std::string ac = AC(copy(ac_value));
6196     std::string rs = GPR(copy(rs_value));
6197     std::string rt = GPR(copy(rt_value));
6198
6199     return img::format("DPAQ_SA.L.W %s, %s, %s", ac, rs, rt);
6200 }
6201
6202
6203 /*
6204  *
6205  *
6206  *   3         2         1
6207  *  10987654321098765432109876543210
6208  *  001000               x1110000101
6209  *     rt -----
6210  *          rs -----
6211  *               rd -----
6212  */
6213 std::string NMD::DPAQ_S_W_PH(uint64 instruction)
6214 {
6215     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6216     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6217     uint64 ac_value = extract_ac_13_12(instruction);
6218
6219     std::string ac = AC(copy(ac_value));
6220     std::string rs = GPR(copy(rs_value));
6221     std::string rt = GPR(copy(rt_value));
6222
6223     return img::format("DPAQ_S.W.PH %s, %s, %s", ac, rs, rt);
6224 }
6225
6226
6227 /*
6228  *
6229  *
6230  *   3         2         1
6231  *  10987654321098765432109876543210
6232  *  001000               x1110000101
6233  *     rt -----
6234  *          rs -----
6235  *               rd -----
6236  */
6237 std::string NMD::DPAQX_SA_W_PH(uint64 instruction)
6238 {
6239     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6240     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6241     uint64 ac_value = extract_ac_13_12(instruction);
6242
6243     std::string ac = AC(copy(ac_value));
6244     std::string rs = GPR(copy(rs_value));
6245     std::string rt = GPR(copy(rt_value));
6246
6247     return img::format("DPAQX_SA.W.PH %s, %s, %s", ac, rs, rt);
6248 }
6249
6250
6251 /*
6252  *
6253  *
6254  *   3         2         1
6255  *  10987654321098765432109876543210
6256  *  001000               x1110000101
6257  *     rt -----
6258  *          rs -----
6259  *               rd -----
6260  */
6261 std::string NMD::DPAQX_S_W_PH(uint64 instruction)
6262 {
6263     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6264     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6265     uint64 ac_value = extract_ac_13_12(instruction);
6266
6267     std::string ac = AC(copy(ac_value));
6268     std::string rs = GPR(copy(rs_value));
6269     std::string rt = GPR(copy(rt_value));
6270
6271     return img::format("DPAQX_S.W.PH %s, %s, %s", ac, rs, rt);
6272 }
6273
6274
6275 /*
6276  *
6277  *
6278  *   3         2         1
6279  *  10987654321098765432109876543210
6280  *  001000               x1110000101
6281  *     rt -----
6282  *          rs -----
6283  *               rd -----
6284  */
6285 std::string NMD::DPAU_H_QBL(uint64 instruction)
6286 {
6287     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6288     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6289     uint64 ac_value = extract_ac_13_12(instruction);
6290
6291     std::string ac = AC(copy(ac_value));
6292     std::string rs = GPR(copy(rs_value));
6293     std::string rt = GPR(copy(rt_value));
6294
6295     return img::format("DPAU.H.QBL %s, %s, %s", ac, rs, rt);
6296 }
6297
6298
6299 /*
6300  *
6301  *
6302  *   3         2         1
6303  *  10987654321098765432109876543210
6304  *  001000               x1110000101
6305  *     rt -----
6306  *          rs -----
6307  *               rd -----
6308  */
6309 std::string NMD::DPAU_H_QBR(uint64 instruction)
6310 {
6311     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6312     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6313     uint64 ac_value = extract_ac_13_12(instruction);
6314
6315     std::string ac = AC(copy(ac_value));
6316     std::string rs = GPR(copy(rs_value));
6317     std::string rt = GPR(copy(rt_value));
6318
6319     return img::format("DPAU.H.QBR %s, %s, %s", ac, rs, rt);
6320 }
6321
6322
6323 /*
6324  *
6325  *
6326  *   3         2         1
6327  *  10987654321098765432109876543210
6328  *  001000               x1110000101
6329  *     rt -----
6330  *          rs -----
6331  *               rd -----
6332  */
6333 std::string NMD::DPAX_W_PH(uint64 instruction)
6334 {
6335     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6336     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6337     uint64 ac_value = extract_ac_13_12(instruction);
6338
6339     std::string ac = AC(copy(ac_value));
6340     std::string rs = GPR(copy(rs_value));
6341     std::string rt = GPR(copy(rt_value));
6342
6343     return img::format("DPAX.W.PH %s, %s, %s", ac, rs, rt);
6344 }
6345
6346
6347 /*
6348  *
6349  *
6350  *   3         2         1
6351  *  10987654321098765432109876543210
6352  *  001000               x1110000101
6353  *     rt -----
6354  *          rs -----
6355  *               rd -----
6356  */
6357 std::string NMD::DPS_W_PH(uint64 instruction)
6358 {
6359     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6360     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6361     uint64 ac_value = extract_ac_13_12(instruction);
6362
6363     std::string ac = AC(copy(ac_value));
6364     std::string rs = GPR(copy(rs_value));
6365     std::string rt = GPR(copy(rt_value));
6366
6367     return img::format("DPS.W.PH %s, %s, %s", ac, rs, rt);
6368 }
6369
6370
6371 /*
6372  *
6373  *
6374  *   3         2         1
6375  *  10987654321098765432109876543210
6376  *  001000               x1110000101
6377  *     rt -----
6378  *          rs -----
6379  *               rd -----
6380  */
6381 std::string NMD::DPSQ_SA_L_W(uint64 instruction)
6382 {
6383     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6384     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6385     uint64 ac_value = extract_ac_13_12(instruction);
6386
6387     std::string ac = AC(copy(ac_value));
6388     std::string rs = GPR(copy(rs_value));
6389     std::string rt = GPR(copy(rt_value));
6390
6391     return img::format("DPSQ_SA.L.W %s, %s, %s", ac, rs, rt);
6392 }
6393
6394
6395 /*
6396  *
6397  *
6398  *   3         2         1
6399  *  10987654321098765432109876543210
6400  *  001000               x1110000101
6401  *     rt -----
6402  *          rs -----
6403  *               rd -----
6404  */
6405 std::string NMD::DPSQ_S_W_PH(uint64 instruction)
6406 {
6407     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6408     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6409     uint64 ac_value = extract_ac_13_12(instruction);
6410
6411     std::string ac = AC(copy(ac_value));
6412     std::string rs = GPR(copy(rs_value));
6413     std::string rt = GPR(copy(rt_value));
6414
6415     return img::format("DPSQ_S.W.PH %s, %s, %s", ac, rs, rt);
6416 }
6417
6418
6419 /*
6420  *
6421  *
6422  *   3         2         1
6423  *  10987654321098765432109876543210
6424  *  001000               x1110000101
6425  *     rt -----
6426  *          rs -----
6427  *               rd -----
6428  */
6429 std::string NMD::DPSQX_SA_W_PH(uint64 instruction)
6430 {
6431     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6432     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6433     uint64 ac_value = extract_ac_13_12(instruction);
6434
6435     std::string ac = AC(copy(ac_value));
6436     std::string rs = GPR(copy(rs_value));
6437     std::string rt = GPR(copy(rt_value));
6438
6439     return img::format("DPSQX_SA.W.PH %s, %s, %s", ac, rs, rt);
6440 }
6441
6442
6443 /*
6444  *
6445  *
6446  *   3         2         1
6447  *  10987654321098765432109876543210
6448  *  001000               x1110000101
6449  *     rt -----
6450  *          rs -----
6451  *               rd -----
6452  */
6453 std::string NMD::DPSQX_S_W_PH(uint64 instruction)
6454 {
6455     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6456     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6457     uint64 ac_value = extract_ac_13_12(instruction);
6458
6459     std::string ac = AC(copy(ac_value));
6460     std::string rs = GPR(copy(rs_value));
6461     std::string rt = GPR(copy(rt_value));
6462
6463     return img::format("DPSQX_S.W.PH %s, %s, %s", ac, rs, rt);
6464 }
6465
6466
6467 /*
6468  *
6469  *
6470  *   3         2         1
6471  *  10987654321098765432109876543210
6472  *  001000               x1110000101
6473  *     rt -----
6474  *          rs -----
6475  *               rd -----
6476  */
6477 std::string NMD::DPSU_H_QBL(uint64 instruction)
6478 {
6479     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6480     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6481     uint64 ac_value = extract_ac_13_12(instruction);
6482
6483     std::string ac = AC(copy(ac_value));
6484     std::string rs = GPR(copy(rs_value));
6485     std::string rt = GPR(copy(rt_value));
6486
6487     return img::format("DPSU.H.QBL %s, %s, %s", ac, rs, rt);
6488 }
6489
6490
6491 /*
6492  *
6493  *
6494  *   3         2         1
6495  *  10987654321098765432109876543210
6496  *  001000               x1110000101
6497  *     rt -----
6498  *          rs -----
6499  *               rd -----
6500  */
6501 std::string NMD::DPSU_H_QBR(uint64 instruction)
6502 {
6503     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6504     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6505     uint64 ac_value = extract_ac_13_12(instruction);
6506
6507     std::string ac = AC(copy(ac_value));
6508     std::string rs = GPR(copy(rs_value));
6509     std::string rt = GPR(copy(rt_value));
6510
6511     return img::format("DPSU.H.QBR %s, %s, %s", ac, rs, rt);
6512 }
6513
6514
6515 /*
6516  *
6517  *
6518  *   3         2         1
6519  *  10987654321098765432109876543210
6520  *  001000               x1110000101
6521  *     rt -----
6522  *          rs -----
6523  *               rd -----
6524  */
6525 std::string NMD::DPSX_W_PH(uint64 instruction)
6526 {
6527     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6528     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6529     uint64 ac_value = extract_ac_13_12(instruction);
6530
6531     std::string ac = AC(copy(ac_value));
6532     std::string rs = GPR(copy(rs_value));
6533     std::string rt = GPR(copy(rt_value));
6534
6535     return img::format("DPSX.W.PH %s, %s, %s", ac, rs, rt);
6536 }
6537
6538
6539 /*
6540  * DROTR -
6541  *
6542  *   3         2         1
6543  *  10987654321098765432109876543210
6544  *  001000               x1110000101
6545  *     rt -----
6546  *          rs -----
6547  *               rd -----
6548  */
6549 std::string NMD::DROTR(uint64 instruction)
6550 {
6551     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6552     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6553     uint64 shift_value = extract_shift_4_3_2_1_0(instruction);
6554
6555     std::string rt = GPR(copy(rt_value));
6556     std::string rs = GPR(copy(rs_value));
6557     std::string shift = IMMEDIATE(copy(shift_value));
6558
6559     return img::format("DROTR %s, %s, %s", rt, rs, shift);
6560 }
6561
6562
6563 /*
6564  * DROTR[32] -
6565  *
6566  *   3         2         1
6567  *  10987654321098765432109876543210
6568  *  10o000          1100xxx0110
6569  *     rt -----
6570  *          rs -----
6571  *                       shift -----
6572  */
6573 std::string NMD::DROTR32(uint64 instruction)
6574 {
6575     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6576     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6577     uint64 shift_value = extract_shift_4_3_2_1_0(instruction);
6578
6579     std::string rt = GPR(copy(rt_value));
6580     std::string rs = GPR(copy(rs_value));
6581     std::string shift = IMMEDIATE(copy(shift_value));
6582
6583     return img::format("DROTR32 %s, %s, %s", rt, rs, shift);
6584 }
6585
6586
6587 /*
6588  *
6589  *
6590  *   3         2         1
6591  *  10987654321098765432109876543210
6592  *  001000               x1110000101
6593  *     rt -----
6594  *          rs -----
6595  *               rd -----
6596  */
6597 std::string NMD::DROTRV(uint64 instruction)
6598 {
6599     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6600     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6601     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
6602
6603     std::string rd = GPR(copy(rd_value));
6604     std::string rs = GPR(copy(rs_value));
6605     std::string rt = GPR(copy(rt_value));
6606
6607     return img::format("DROTRV %s, %s, %s", rd, rs, rt);
6608 }
6609
6610
6611 /*
6612  *
6613  *
6614  *   3         2         1
6615  *  10987654321098765432109876543210
6616  *  001000               x1110000101
6617  *     rt -----
6618  *          rs -----
6619  *               rd -----
6620  */
6621 std::string NMD::DROTX(uint64 instruction)
6622 {
6623     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6624     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6625     uint64 shiftx_value = extract_shiftx_11_10_9_8_7_6(instruction);
6626     uint64 shift_value = extract_shift_5_4_3_2_1_0(instruction);
6627
6628     std::string rt = GPR(copy(rt_value));
6629     std::string rs = GPR(copy(rs_value));
6630     std::string shift = IMMEDIATE(copy(shift_value));
6631     std::string shiftx = IMMEDIATE(copy(shiftx_value));
6632
6633     return img::format("DROTX %s, %s, %s, %s", rt, rs, shift, shiftx);
6634 }
6635
6636
6637 /*
6638  * DSLL -
6639  *
6640  *   3         2         1
6641  *  10987654321098765432109876543210
6642  *  10o000          1100xxx0000
6643  *     rt -----
6644  *          rs -----
6645  *                       shift -----
6646  */
6647 std::string NMD::DSLL(uint64 instruction)
6648 {
6649     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6650     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6651     uint64 shift_value = extract_shift_4_3_2_1_0(instruction);
6652
6653     std::string rt = GPR(copy(rt_value));
6654     std::string rs = GPR(copy(rs_value));
6655     std::string shift = IMMEDIATE(copy(shift_value));
6656
6657     return img::format("DSLL %s, %s, %s", rt, rs, shift);
6658 }
6659
6660
6661 /*
6662  * DSLL[32] -
6663  *
6664  *   3         2         1
6665  *  10987654321098765432109876543210
6666  *  10o000          1100xxx0000
6667  *     rt -----
6668  *          rs -----
6669  *                       shift -----
6670  */
6671 std::string NMD::DSLL32(uint64 instruction)
6672 {
6673     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6674     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6675     uint64 shift_value = extract_shift_4_3_2_1_0(instruction);
6676
6677     std::string rt = GPR(copy(rt_value));
6678     std::string rs = GPR(copy(rs_value));
6679     std::string shift = IMMEDIATE(copy(shift_value));
6680
6681     return img::format("DSLL32 %s, %s, %s", rt, rs, shift);
6682 }
6683
6684
6685 /*
6686  *
6687  *
6688  *   3         2         1
6689  *  10987654321098765432109876543210
6690  *  001000               x1110000101
6691  *     rt -----
6692  *          rs -----
6693  *               rd -----
6694  */
6695 std::string NMD::DSLLV(uint64 instruction)
6696 {
6697     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6698     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6699     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
6700
6701     std::string rd = GPR(copy(rd_value));
6702     std::string rs = GPR(copy(rs_value));
6703     std::string rt = GPR(copy(rt_value));
6704
6705     return img::format("DSLLV %s, %s, %s", rd, rs, rt);
6706 }
6707
6708
6709 /*
6710  * DSRA -
6711  *
6712  *   3         2         1
6713  *  10987654321098765432109876543210
6714  *  10o000          1100xxx0100
6715  *     rt -----
6716  *          rs -----
6717  *                       shift -----
6718  */
6719 std::string NMD::DSRA(uint64 instruction)
6720 {
6721     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6722     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6723     uint64 shift_value = extract_shift_4_3_2_1_0(instruction);
6724
6725     std::string rt = GPR(copy(rt_value));
6726     std::string rs = GPR(copy(rs_value));
6727     std::string shift = IMMEDIATE(copy(shift_value));
6728
6729     return img::format("DSRA %s, %s, %s", rt, rs, shift);
6730 }
6731
6732
6733 /*
6734  * DSRA[32] -
6735  *
6736  *   3         2         1
6737  *  10987654321098765432109876543210
6738  *  10o000          1100xxx0100
6739  *     rt -----
6740  *          rs -----
6741  *                       shift -----
6742  */
6743 std::string NMD::DSRA32(uint64 instruction)
6744 {
6745     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6746     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6747     uint64 shift_value = extract_shift_4_3_2_1_0(instruction);
6748
6749     std::string rt = GPR(copy(rt_value));
6750     std::string rs = GPR(copy(rs_value));
6751     std::string shift = IMMEDIATE(copy(shift_value));
6752
6753     return img::format("DSRA32 %s, %s, %s", rt, rs, shift);
6754 }
6755
6756
6757 /*
6758  *
6759  *
6760  *   3         2         1
6761  *  10987654321098765432109876543210
6762  *  001000               x1110000101
6763  *     rt -----
6764  *          rs -----
6765  *               rd -----
6766  */
6767 std::string NMD::DSRAV(uint64 instruction)
6768 {
6769     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6770     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6771     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
6772
6773     std::string rd = GPR(copy(rd_value));
6774     std::string rs = GPR(copy(rs_value));
6775     std::string rt = GPR(copy(rt_value));
6776
6777     return img::format("DSRAV %s, %s, %s", rd, rs, rt);
6778 }
6779
6780
6781 /*
6782  * DSRL -
6783  *
6784  *   3         2         1
6785  *  10987654321098765432109876543210
6786  *  10o000          1100xxx0100
6787  *     rt -----
6788  *          rs -----
6789  *                       shift -----
6790  */
6791 std::string NMD::DSRL(uint64 instruction)
6792 {
6793     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6794     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6795     uint64 shift_value = extract_shift_4_3_2_1_0(instruction);
6796
6797     std::string rt = GPR(copy(rt_value));
6798     std::string rs = GPR(copy(rs_value));
6799     std::string shift = IMMEDIATE(copy(shift_value));
6800
6801     return img::format("DSRL %s, %s, %s", rt, rs, shift);
6802 }
6803
6804
6805 /*
6806  * DSRL[32] -
6807  *
6808  *   3         2         1
6809  *  10987654321098765432109876543210
6810  *  10o000          1100xxx0010
6811  *     rt -----
6812  *          rs -----
6813  *                       shift -----
6814  */
6815 std::string NMD::DSRL32(uint64 instruction)
6816 {
6817     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6818     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6819     uint64 shift_value = extract_shift_4_3_2_1_0(instruction);
6820
6821     std::string rt = GPR(copy(rt_value));
6822     std::string rs = GPR(copy(rs_value));
6823     std::string shift = IMMEDIATE(copy(shift_value));
6824
6825     return img::format("DSRL32 %s, %s, %s", rt, rs, shift);
6826 }
6827
6828
6829 /*
6830  *
6831  *
6832  *   3         2         1
6833  *  10987654321098765432109876543210
6834  *  001000               x1110000101
6835  *     rt -----
6836  *          rs -----
6837  *               rd -----
6838  */
6839 std::string NMD::DSRLV(uint64 instruction)
6840 {
6841     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6842     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6843     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
6844
6845     std::string rd = GPR(copy(rd_value));
6846     std::string rs = GPR(copy(rs_value));
6847     std::string rt = GPR(copy(rt_value));
6848
6849     return img::format("DSRLV %s, %s, %s", rd, rs, rt);
6850 }
6851
6852
6853 /*
6854  *
6855  *
6856  *   3         2         1
6857  *  10987654321098765432109876543210
6858  *  001000               x1110000101
6859  *     rt -----
6860  *          rs -----
6861  *               rd -----
6862  */
6863 std::string NMD::DSUB(uint64 instruction)
6864 {
6865     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6866     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6867     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
6868
6869     std::string rd = GPR(copy(rd_value));
6870     std::string rs = GPR(copy(rs_value));
6871     std::string rt = GPR(copy(rt_value));
6872
6873     return img::format("DSUB %s, %s, %s", rd, rs, rt);
6874 }
6875
6876
6877 /*
6878  *
6879  *
6880  *   3         2         1
6881  *  10987654321098765432109876543210
6882  *  001000               x1110000101
6883  *     rt -----
6884  *          rs -----
6885  *               rd -----
6886  */
6887 std::string NMD::DSUBU(uint64 instruction)
6888 {
6889     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6890     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
6891     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
6892
6893     std::string rd = GPR(copy(rd_value));
6894     std::string rs = GPR(copy(rs_value));
6895     std::string rt = GPR(copy(rt_value));
6896
6897     return img::format("DSUBU %s, %s, %s", rd, rs, rt);
6898 }
6899
6900
6901 /*
6902  *
6903  *
6904  *   3         2         1
6905  *  10987654321098765432109876543210
6906  *  001000               x1110000101
6907  *     rt -----
6908  *          rs -----
6909  *               rd -----
6910  */
6911 std::string NMD::DVPE(uint64 instruction)
6912 {
6913     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6914
6915     std::string rt = GPR(copy(rt_value));
6916
6917     return img::format("DVPE %s", rt);
6918 }
6919
6920
6921 /*
6922  *
6923  *
6924  *   3         2         1
6925  *  10987654321098765432109876543210
6926  *  001000               x1110000101
6927  *     rt -----
6928  *          rs -----
6929  *               rd -----
6930  */
6931 std::string NMD::DVP(uint64 instruction)
6932 {
6933     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6934
6935     std::string rt = GPR(copy(rt_value));
6936
6937     return img::format("DVP %s", rt);
6938 }
6939
6940
6941 /*
6942  *
6943  *
6944  *   3         2         1
6945  *  10987654321098765432109876543210
6946  *  001000               x1110000101
6947  *     rt -----
6948  *          rs -----
6949  *               rd -----
6950  */
6951 std::string NMD::EHB(uint64 instruction)
6952 {
6953     (void)instruction;
6954
6955     return "EHB ";
6956 }
6957
6958
6959 /*
6960  *
6961  *
6962  *   3         2         1
6963  *  10987654321098765432109876543210
6964  *  001000               x1110000101
6965  *     rt -----
6966  *          rs -----
6967  *               rd -----
6968  */
6969 std::string NMD::EI(uint64 instruction)
6970 {
6971     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6972
6973     std::string rt = GPR(copy(rt_value));
6974
6975     return img::format("EI %s", rt);
6976 }
6977
6978
6979 /*
6980  *
6981  *
6982  *   3         2         1
6983  *  10987654321098765432109876543210
6984  *  001000               x1110000101
6985  *     rt -----
6986  *          rs -----
6987  *               rd -----
6988  */
6989 std::string NMD::EMT(uint64 instruction)
6990 {
6991     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
6992
6993     std::string rt = GPR(copy(rt_value));
6994
6995     return img::format("EMT %s", rt);
6996 }
6997
6998
6999 /*
7000  *
7001  *
7002  *   3         2         1
7003  *  10987654321098765432109876543210
7004  *  001000               x1110000101
7005  *     rt -----
7006  *          rs -----
7007  *               rd -----
7008  */
7009 std::string NMD::ERET(uint64 instruction)
7010 {
7011     (void)instruction;
7012
7013     return "ERET ";
7014 }
7015
7016
7017 /*
7018  *
7019  *
7020  *   3         2         1
7021  *  10987654321098765432109876543210
7022  *  001000               x1110000101
7023  *     rt -----
7024  *          rs -----
7025  *               rd -----
7026  */
7027 std::string NMD::ERETNC(uint64 instruction)
7028 {
7029     (void)instruction;
7030
7031     return "ERETNC ";
7032 }
7033
7034
7035 /*
7036  *
7037  *
7038  *   3         2         1
7039  *  10987654321098765432109876543210
7040  *  001000               x1110000101
7041  *     rt -----
7042  *          rs -----
7043  *               rd -----
7044  */
7045 std::string NMD::EVP(uint64 instruction)
7046 {
7047     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
7048
7049     std::string rt = GPR(copy(rt_value));
7050
7051     return img::format("EVP %s", rt);
7052 }
7053
7054
7055 /*
7056  *
7057  *
7058  *   3         2         1
7059  *  10987654321098765432109876543210
7060  *  001000               x1110000101
7061  *     rt -----
7062  *          rs -----
7063  *               rd -----
7064  */
7065 std::string NMD::EVPE(uint64 instruction)
7066 {
7067     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
7068
7069     std::string rt = GPR(copy(rt_value));
7070
7071     return img::format("EVPE %s", rt);
7072 }
7073
7074
7075 /*
7076  *
7077  *
7078  *   3         2         1
7079  *  10987654321098765432109876543210
7080  *  001000               x1110000101
7081  *     rt -----
7082  *          rs -----
7083  *               rd -----
7084  */
7085 std::string NMD::EXT(uint64 instruction)
7086 {
7087     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
7088     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
7089     uint64 msbd_value = extract_msbt_10_9_8_7_6(instruction);
7090     uint64 lsb_value = extract_lsb_4_3_2_1_0(instruction);
7091
7092     std::string rt = GPR(copy(rt_value));
7093     std::string rs = GPR(copy(rs_value));
7094     std::string lsb = IMMEDIATE(copy(lsb_value));
7095     std::string msbd = IMMEDIATE(encode_msbd_from_size(msbd_value));
7096
7097     return img::format("EXT %s, %s, %s, %s", rt, rs, lsb, msbd);
7098 }
7099
7100
7101 /*
7102  *
7103  *
7104  *   3         2         1
7105  *  10987654321098765432109876543210
7106  *  001000               x1110000101
7107  *     rt -----
7108  *          rs -----
7109  *               rd -----
7110  */
7111 std::string NMD::EXTD(uint64 instruction)
7112 {
7113     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
7114     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
7115     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
7116     uint64 shift_value = extract_shift_10_9_8_7_6(instruction);
7117
7118     std::string rd = GPR(copy(rd_value));
7119     std::string rs = GPR(copy(rs_value));
7120     std::string rt = GPR(copy(rt_value));
7121     std::string shift = IMMEDIATE(copy(shift_value));
7122
7123     return img::format("EXTD %s, %s, %s, %s", rd, rs, rt, shift);
7124 }
7125
7126
7127 /*
7128  *
7129  *
7130  *   3         2         1
7131  *  10987654321098765432109876543210
7132  *  001000               x1110000101
7133  *     rt -----
7134  *          rs -----
7135  *               rd -----
7136  */
7137 std::string NMD::EXTD32(uint64 instruction)
7138 {
7139     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
7140     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
7141     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
7142     uint64 shift_value = extract_shift_10_9_8_7_6(instruction);
7143
7144     std::string rd = GPR(copy(rd_value));
7145     std::string rs = GPR(copy(rs_value));
7146     std::string rt = GPR(copy(rt_value));
7147     std::string shift = IMMEDIATE(copy(shift_value));
7148
7149     return img::format("EXTD32 %s, %s, %s, %s", rd, rs, rt, shift);
7150 }
7151
7152
7153 /*
7154  *
7155  *
7156  *   3         2         1
7157  *  10987654321098765432109876543210
7158  *  001000               x1110000101
7159  *     rt -----
7160  *          rs -----
7161  *               rd -----
7162  */
7163 std::string NMD::EXTPDP(uint64 instruction)
7164 {
7165     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
7166     uint64 size_value = extract_size_20_19_18_17_16(instruction);
7167     uint64 ac_value = extract_ac_13_12(instruction);
7168
7169     std::string rt = GPR(copy(rt_value));
7170     std::string ac = AC(copy(ac_value));
7171     std::string size = IMMEDIATE(copy(size_value));
7172
7173     return img::format("EXTPDP %s, %s, %s", rt, ac, size);
7174 }
7175
7176
7177 /*
7178  *
7179  *
7180  *   3         2         1
7181  *  10987654321098765432109876543210
7182  *  001000               x1110000101
7183  *     rt -----
7184  *          rs -----
7185  *               rd -----
7186  */
7187 std::string NMD::EXTPDPV(uint64 instruction)
7188 {
7189     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
7190     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
7191     uint64 ac_value = extract_ac_13_12(instruction);
7192
7193     std::string rt = GPR(copy(rt_value));
7194     std::string ac = AC(copy(ac_value));
7195     std::string rs = GPR(copy(rs_value));
7196
7197     return img::format("EXTPDPV %s, %s, %s", rt, ac, rs);
7198 }
7199
7200
7201 /*
7202  *
7203  *
7204  *   3         2         1
7205  *  10987654321098765432109876543210
7206  *  001000               x1110000101
7207  *     rt -----
7208  *          rs -----
7209  *               rd -----
7210  */
7211 std::string NMD::EXTP(uint64 instruction)
7212 {
7213     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
7214     uint64 size_value = extract_size_20_19_18_17_16(instruction);
7215     uint64 ac_value = extract_ac_13_12(instruction);
7216
7217     std::string rt = GPR(copy(rt_value));
7218     std::string ac = AC(copy(ac_value));
7219     std::string size = IMMEDIATE(copy(size_value));
7220
7221     return img::format("EXTP %s, %s, %s", rt, ac, size);
7222 }
7223
7224
7225 /*
7226  *
7227  *
7228  *   3         2         1
7229  *  10987654321098765432109876543210
7230  *  001000               x1110000101
7231  *     rt -----
7232  *          rs -----
7233  *               rd -----
7234  */
7235 std::string NMD::EXTPV(uint64 instruction)
7236 {
7237     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
7238     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
7239     uint64 ac_value = extract_ac_13_12(instruction);
7240
7241     std::string rt = GPR(copy(rt_value));
7242     std::string ac = AC(copy(ac_value));
7243     std::string rs = GPR(copy(rs_value));
7244
7245     return img::format("EXTPV %s, %s, %s", rt, ac, rs);
7246 }
7247
7248
7249 /*
7250  *
7251  *
7252  *   3         2         1
7253  *  10987654321098765432109876543210
7254  *  001000               x1110000101
7255  *     rt -----
7256  *          rs -----
7257  *               rd -----
7258  */
7259 std::string NMD::EXTR_RS_W(uint64 instruction)
7260 {
7261     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
7262     uint64 shift_value = extract_shift_20_19_18_17_16(instruction);
7263     uint64 ac_value = extract_ac_13_12(instruction);
7264
7265     std::string rt = GPR(copy(rt_value));
7266     std::string ac = AC(copy(ac_value));
7267     std::string shift = IMMEDIATE(copy(shift_value));
7268
7269     return img::format("EXTR_RS.W %s, %s, %s", rt, ac, shift);
7270 }
7271
7272
7273 /*
7274  *
7275  *
7276  *   3         2         1
7277  *  10987654321098765432109876543210
7278  *  001000               x1110000101
7279  *     rt -----
7280  *          rs -----
7281  *               rd -----
7282  */
7283 std::string NMD::EXTR_R_W(uint64 instruction)
7284 {
7285     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
7286     uint64 shift_value = extract_shift_20_19_18_17_16(instruction);
7287     uint64 ac_value = extract_ac_13_12(instruction);
7288
7289     std::string rt = GPR(copy(rt_value));
7290     std::string ac = AC(copy(ac_value));
7291     std::string shift = IMMEDIATE(copy(shift_value));
7292
7293     return img::format("EXTR_R.W %s, %s, %s", rt, ac, shift);
7294 }
7295
7296
7297 /*
7298  *
7299  *
7300  *   3         2         1
7301  *  10987654321098765432109876543210
7302  *  001000               x1110000101
7303  *     rt -----
7304  *          rs -----
7305  *               rd -----
7306  */
7307 std::string NMD::EXTR_S_H(uint64 instruction)
7308 {
7309     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
7310     uint64 shift_value = extract_shift_20_19_18_17_16(instruction);
7311     uint64 ac_value = extract_ac_13_12(instruction);
7312
7313     std::string rt = GPR(copy(rt_value));
7314     std::string ac = AC(copy(ac_value));
7315     std::string shift = IMMEDIATE(copy(shift_value));
7316
7317     return img::format("EXTR_S.H %s, %s, %s", rt, ac, shift);
7318 }
7319
7320
7321 /*
7322  *
7323  *
7324  *   3         2         1
7325  *  10987654321098765432109876543210
7326  *  001000               x1110000101
7327  *     rt -----
7328  *          rs -----
7329  *               rd -----
7330  */
7331 std::string NMD::EXTR_W(uint64 instruction)
7332 {
7333     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
7334     uint64 shift_value = extract_shift_20_19_18_17_16(instruction);
7335     uint64 ac_value = extract_ac_13_12(instruction);
7336
7337     std::string rt = GPR(copy(rt_value));
7338     std::string ac = AC(copy(ac_value));
7339     std::string shift = IMMEDIATE(copy(shift_value));
7340
7341     return img::format("EXTR.W %s, %s, %s", rt, ac, shift);
7342 }
7343
7344
7345 /*
7346  *
7347  *
7348  *   3         2         1
7349  *  10987654321098765432109876543210
7350  *  001000               x1110000101
7351  *     rt -----
7352  *          rs -----
7353  *               rd -----
7354  */
7355 std::string NMD::EXTRV_RS_W(uint64 instruction)
7356 {
7357     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
7358     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
7359     uint64 ac_value = extract_ac_13_12(instruction);
7360
7361     std::string rt = GPR(copy(rt_value));
7362     std::string ac = AC(copy(ac_value));
7363     std::string rs = GPR(copy(rs_value));
7364
7365     return img::format("EXTRV_RS.W %s, %s, %s", rt, ac, rs);
7366 }
7367
7368
7369 /*
7370  *
7371  *
7372  *   3         2         1
7373  *  10987654321098765432109876543210
7374  *  001000               x1110000101
7375  *     rt -----
7376  *          rs -----
7377  *               rd -----
7378  */
7379 std::string NMD::EXTRV_R_W(uint64 instruction)
7380 {
7381     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
7382     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
7383     uint64 ac_value = extract_ac_13_12(instruction);
7384
7385     std::string rt = GPR(copy(rt_value));
7386     std::string ac = AC(copy(ac_value));
7387     std::string rs = GPR(copy(rs_value));
7388
7389     return img::format("EXTRV_R.W %s, %s, %s", rt, ac, rs);
7390 }
7391
7392
7393 /*
7394  *
7395  *
7396  *   3         2         1
7397  *  10987654321098765432109876543210
7398  *  001000               x1110000101
7399  *     rt -----
7400  *          rs -----
7401  *               rd -----
7402  */
7403 std::string NMD::EXTRV_S_H(uint64 instruction)
7404 {
7405     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
7406     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
7407     uint64 ac_value = extract_ac_13_12(instruction);
7408
7409     std::string rt = GPR(copy(rt_value));
7410     std::string ac = AC(copy(ac_value));
7411     std::string rs = GPR(copy(rs_value));
7412
7413     return img::format("EXTRV_S.H %s, %s, %s", rt, ac, rs);
7414 }
7415
7416
7417 /*
7418  *
7419  *
7420  *   3         2         1
7421  *  10987654321098765432109876543210
7422  *  001000               x1110000101
7423  *     rt -----
7424  *          rs -----
7425  *               rd -----
7426  */
7427 std::string NMD::EXTRV_W(uint64 instruction)
7428 {
7429     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
7430     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
7431     uint64 ac_value = extract_ac_13_12(instruction);
7432
7433     std::string rt = GPR(copy(rt_value));
7434     std::string ac = AC(copy(ac_value));
7435     std::string rs = GPR(copy(rs_value));
7436
7437     return img::format("EXTRV.W %s, %s, %s", rt, ac, rs);
7438 }
7439
7440
7441 /*
7442  * EXTW - Extract Word
7443  *
7444  *   3         2         1
7445  *  10987654321098765432109876543210
7446  *  001000                    011111
7447  *     rt -----
7448  *          rs -----
7449  *               rd -----
7450  *                 shift -----
7451  */
7452 std::string NMD::EXTW(uint64 instruction)
7453 {
7454     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
7455     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
7456     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
7457     uint64 shift_value = extract_shift_10_9_8_7_6(instruction);
7458
7459     std::string rd = GPR(copy(rd_value));
7460     std::string rs = GPR(copy(rs_value));
7461     std::string rt = GPR(copy(rt_value));
7462     std::string shift = IMMEDIATE(copy(shift_value));
7463
7464     return img::format("EXTW %s, %s, %s, %s", rd, rs, rt, shift);
7465 }
7466
7467
7468 /*
7469  *
7470  *
7471  *   3         2         1
7472  *  10987654321098765432109876543210
7473  *  001000               x1110000101
7474  *     rt -----
7475  *          rs -----
7476  *               rd -----
7477  */
7478 std::string NMD::FLOOR_L_D(uint64 instruction)
7479 {
7480     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
7481     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
7482
7483     std::string ft = FPR(copy(ft_value));
7484     std::string fs = FPR(copy(fs_value));
7485
7486     return img::format("FLOOR.L.D %s, %s", ft, fs);
7487 }
7488
7489
7490 /*
7491  *
7492  *
7493  *   3         2         1
7494  *  10987654321098765432109876543210
7495  *  001000               x1110000101
7496  *     rt -----
7497  *          rs -----
7498  *               rd -----
7499  */
7500 std::string NMD::FLOOR_L_S(uint64 instruction)
7501 {
7502     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
7503     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
7504
7505     std::string ft = FPR(copy(ft_value));
7506     std::string fs = FPR(copy(fs_value));
7507
7508     return img::format("FLOOR.L.S %s, %s", ft, fs);
7509 }
7510
7511
7512 /*
7513  *
7514  *
7515  *   3         2         1
7516  *  10987654321098765432109876543210
7517  *  001000               x1110000101
7518  *     rt -----
7519  *          rs -----
7520  *               rd -----
7521  */
7522 std::string NMD::FLOOR_W_D(uint64 instruction)
7523 {
7524     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
7525     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
7526
7527     std::string ft = FPR(copy(ft_value));
7528     std::string fs = FPR(copy(fs_value));
7529
7530     return img::format("FLOOR.W.D %s, %s", ft, fs);
7531 }
7532
7533
7534 /*
7535  *
7536  *
7537  *   3         2         1
7538  *  10987654321098765432109876543210
7539  *  001000               x1110000101
7540  *     rt -----
7541  *          rs -----
7542  *               rd -----
7543  */
7544 std::string NMD::FLOOR_W_S(uint64 instruction)
7545 {
7546     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
7547     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
7548
7549     std::string ft = FPR(copy(ft_value));
7550     std::string fs = FPR(copy(fs_value));
7551
7552     return img::format("FLOOR.W.S %s, %s", ft, fs);
7553 }
7554
7555
7556 /*
7557  *
7558  *
7559  *   3         2         1
7560  *  10987654321098765432109876543210
7561  *  001000               x1110000101
7562  *     rt -----
7563  *          rs -----
7564  *               rd -----
7565  */
7566 std::string NMD::FORK(uint64 instruction)
7567 {
7568     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
7569     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
7570     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
7571
7572     std::string rd = GPR(copy(rd_value));
7573     std::string rs = GPR(copy(rs_value));
7574     std::string rt = GPR(copy(rt_value));
7575
7576     return img::format("FORK %s, %s, %s", rd, rs, rt);
7577 }
7578
7579
7580 /*
7581  *
7582  *
7583  *   3         2         1
7584  *  10987654321098765432109876543210
7585  *  001000               x1110000101
7586  *     rt -----
7587  *          rs -----
7588  *               rd -----
7589  */
7590 std::string NMD::HYPCALL(uint64 instruction)
7591 {
7592     uint64 code_value = extract_code_17_to_0(instruction);
7593
7594     std::string code = IMMEDIATE(copy(code_value));
7595
7596     return img::format("HYPCALL %s", code);
7597 }
7598
7599
7600 /*
7601  *
7602  *
7603  *   3         2         1
7604  *  10987654321098765432109876543210
7605  *  001000               x1110000101
7606  *     rt -----
7607  *          rs -----
7608  *               rd -----
7609  */
7610 std::string NMD::HYPCALL_16_(uint64 instruction)
7611 {
7612     uint64 code_value = extract_code_1_0(instruction);
7613
7614     std::string code = IMMEDIATE(copy(code_value));
7615
7616     return img::format("HYPCALL %s", code);
7617 }
7618
7619
7620 /*
7621  *
7622  *
7623  *   3         2         1
7624  *  10987654321098765432109876543210
7625  *  001000               x1110000101
7626  *     rt -----
7627  *          rs -----
7628  *               rd -----
7629  */
7630 std::string NMD::INS(uint64 instruction)
7631 {
7632     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
7633     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
7634     uint64 msbd_value = extract_msbt_10_9_8_7_6(instruction);
7635     uint64 lsb_value = extract_lsb_4_3_2_1_0(instruction);
7636
7637     std::string rt = GPR(copy(rt_value));
7638     std::string rs = GPR(copy(rs_value));
7639     std::string pos = IMMEDIATE(encode_lsb_from_pos_and_size(lsb_value));
7640     std::string size = IMMEDIATE(encode_lsb_from_pos_and_size(msbd_value));
7641     /* !!!!!!!!!! - no conversion function */
7642
7643     return img::format("INS %s, %s, %s, %s", rt, rs, pos, size);
7644     /* hand edited */
7645 }
7646
7647
7648 /*
7649  *
7650  *
7651  *   3         2         1
7652  *  10987654321098765432109876543210
7653  *  001000               x1110000101
7654  *     rt -----
7655  *          rs -----
7656  *               rd -----
7657  */
7658 std::string NMD::INSV(uint64 instruction)
7659 {
7660     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
7661     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
7662
7663     std::string rt = GPR(copy(rt_value));
7664     std::string rs = GPR(copy(rs_value));
7665
7666     return img::format("INSV %s, %s", rt, rs);
7667 }
7668
7669
7670 /*
7671  *
7672  *
7673  *   3         2         1
7674  *  10987654321098765432109876543210
7675  *  001000               x1110000101
7676  *     rt -----
7677  *          rs -----
7678  *               rd -----
7679  */
7680 std::string NMD::IRET(uint64 instruction)
7681 {
7682     (void)instruction;
7683
7684     return "IRET ";
7685 }
7686
7687
7688 /*
7689  *
7690  *
7691  *   3         2         1
7692  *  10987654321098765432109876543210
7693  *  001000               x1110000101
7694  *     rt -----
7695  *          rs -----
7696  *               rd -----
7697  */
7698 std::string NMD::JALRC_16_(uint64 instruction)
7699 {
7700     uint64 rt_value = extract_rt_9_8_7_6_5(instruction);
7701
7702     std::string rt = GPR(copy(rt_value));
7703
7704     return img::format("JALRC $%d, %s", 31, rt);
7705 }
7706
7707
7708 /*
7709  *
7710  *
7711  *   3         2         1
7712  *  10987654321098765432109876543210
7713  *  001000               x1110000101
7714  *     rt -----
7715  *          rs -----
7716  *               rd -----
7717  */
7718 std::string NMD::JALRC_32_(uint64 instruction)
7719 {
7720     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
7721     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
7722
7723     std::string rt = GPR(copy(rt_value));
7724     std::string rs = GPR(copy(rs_value));
7725
7726     return img::format("JALRC %s, %s", rt, rs);
7727 }
7728
7729
7730 /*
7731  *
7732  *
7733  *   3         2         1
7734  *  10987654321098765432109876543210
7735  *  001000               x1110000101
7736  *     rt -----
7737  *          rs -----
7738  *               rd -----
7739  */
7740 std::string NMD::JALRC_HB(uint64 instruction)
7741 {
7742     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
7743     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
7744
7745     std::string rt = GPR(copy(rt_value));
7746     std::string rs = GPR(copy(rs_value));
7747
7748     return img::format("JALRC.HB %s, %s", rt, rs);
7749 }
7750
7751
7752 /*
7753  *
7754  *
7755  *   3         2         1
7756  *  10987654321098765432109876543210
7757  *  001000               x1110000101
7758  *     rt -----
7759  *          rs -----
7760  *               rd -----
7761  */
7762 std::string NMD::JRC(uint64 instruction)
7763 {
7764     uint64 rt_value = extract_rt_9_8_7_6_5(instruction);
7765
7766     std::string rt = GPR(copy(rt_value));
7767
7768     return img::format("JRC %s", rt);
7769 }
7770
7771
7772 /*
7773  *
7774  *
7775  *   3         2         1
7776  *  10987654321098765432109876543210
7777  *  001000               x1110000101
7778  *     rt -----
7779  *          rs -----
7780  *               rd -----
7781  */
7782 std::string NMD::LB_16_(uint64 instruction)
7783 {
7784     uint64 rt3_value = extract_rt3_9_8_7(instruction);
7785     uint64 rs3_value = extract_rs3_6_5_4(instruction);
7786     uint64 u_value = extract_u_1_0(instruction);
7787
7788     std::string rt3 = GPR(decode_gpr_gpr3(rt3_value));
7789     std::string u = IMMEDIATE(copy(u_value));
7790     std::string rs3 = GPR(decode_gpr_gpr3(rs3_value));
7791
7792     return img::format("LB %s, %s(%s)", rt3, u, rs3);
7793 }
7794
7795
7796 /*
7797  *
7798  *
7799  *   3         2         1
7800  *  10987654321098765432109876543210
7801  *  001000               x1110000101
7802  *     rt -----
7803  *          rs -----
7804  *               rd -----
7805  */
7806 std::string NMD::LB_GP_(uint64 instruction)
7807 {
7808     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
7809     uint64 u_value = extract_u_17_to_0(instruction);
7810
7811     std::string rt = GPR(copy(rt_value));
7812     std::string u = IMMEDIATE(copy(u_value));
7813
7814     return img::format("LB %s, %s($%d)", rt, u, 28);
7815 }
7816
7817
7818 /*
7819  *
7820  *
7821  *   3         2         1
7822  *  10987654321098765432109876543210
7823  *  001000               x1110000101
7824  *     rt -----
7825  *          rs -----
7826  *               rd -----
7827  */
7828 std::string NMD::LB_S9_(uint64 instruction)
7829 {
7830     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
7831     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
7832     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
7833
7834     std::string rt = GPR(copy(rt_value));
7835     std::string s = IMMEDIATE(copy(s_value));
7836     std::string rs = GPR(copy(rs_value));
7837
7838     return img::format("LB %s, %s(%s)", rt, s, rs);
7839 }
7840
7841
7842 /*
7843  *
7844  *
7845  *   3         2         1
7846  *  10987654321098765432109876543210
7847  *  001000               x1110000101
7848  *     rt -----
7849  *          rs -----
7850  *               rd -----
7851  */
7852 std::string NMD::LB_U12_(uint64 instruction)
7853 {
7854     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
7855     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
7856     uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
7857
7858     std::string rt = GPR(copy(rt_value));
7859     std::string u = IMMEDIATE(copy(u_value));
7860     std::string rs = GPR(copy(rs_value));
7861
7862     return img::format("LB %s, %s(%s)", rt, u, rs);
7863 }
7864
7865
7866 /*
7867  *
7868  *
7869  *   3         2         1
7870  *  10987654321098765432109876543210
7871  *  001000               x1110000101
7872  *     rt -----
7873  *          rs -----
7874  *               rd -----
7875  */
7876 std::string NMD::LBE(uint64 instruction)
7877 {
7878     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
7879     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
7880     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
7881
7882     std::string rt = GPR(copy(rt_value));
7883     std::string s = IMMEDIATE(copy(s_value));
7884     std::string rs = GPR(copy(rs_value));
7885
7886     return img::format("LBE %s, %s(%s)", rt, s, rs);
7887 }
7888
7889
7890 /*
7891  *
7892  *
7893  *   3         2         1
7894  *  10987654321098765432109876543210
7895  *  001000               x1110000101
7896  *     rt -----
7897  *          rs -----
7898  *               rd -----
7899  */
7900 std::string NMD::LBU_16_(uint64 instruction)
7901 {
7902     uint64 rt3_value = extract_rt3_9_8_7(instruction);
7903     uint64 rs3_value = extract_rs3_6_5_4(instruction);
7904     uint64 u_value = extract_u_1_0(instruction);
7905
7906     std::string rt3 = GPR(decode_gpr_gpr3(rt3_value));
7907     std::string u = IMMEDIATE(copy(u_value));
7908     std::string rs3 = GPR(decode_gpr_gpr3(rs3_value));
7909
7910     return img::format("LBU %s, %s(%s)", rt3, u, rs3);
7911 }
7912
7913
7914 /*
7915  *
7916  *
7917  *   3         2         1
7918  *  10987654321098765432109876543210
7919  *  001000               x1110000101
7920  *     rt -----
7921  *          rs -----
7922  *               rd -----
7923  */
7924 std::string NMD::LBU_GP_(uint64 instruction)
7925 {
7926     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
7927     uint64 u_value = extract_u_17_to_0(instruction);
7928
7929     std::string rt = GPR(copy(rt_value));
7930     std::string u = IMMEDIATE(copy(u_value));
7931
7932     return img::format("LBU %s, %s($%d)", rt, u, 28);
7933 }
7934
7935
7936 /*
7937  *
7938  *
7939  *   3         2         1
7940  *  10987654321098765432109876543210
7941  *  001000               x1110000101
7942  *     rt -----
7943  *          rs -----
7944  *               rd -----
7945  */
7946 std::string NMD::LBU_S9_(uint64 instruction)
7947 {
7948     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
7949     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
7950     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
7951
7952     std::string rt = GPR(copy(rt_value));
7953     std::string s = IMMEDIATE(copy(s_value));
7954     std::string rs = GPR(copy(rs_value));
7955
7956     return img::format("LBU %s, %s(%s)", rt, s, rs);
7957 }
7958
7959
7960 /*
7961  *
7962  *
7963  *   3         2         1
7964  *  10987654321098765432109876543210
7965  *  001000               x1110000101
7966  *     rt -----
7967  *          rs -----
7968  *               rd -----
7969  */
7970 std::string NMD::LBU_U12_(uint64 instruction)
7971 {
7972     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
7973     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
7974     uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
7975
7976     std::string rt = GPR(copy(rt_value));
7977     std::string u = IMMEDIATE(copy(u_value));
7978     std::string rs = GPR(copy(rs_value));
7979
7980     return img::format("LBU %s, %s(%s)", rt, u, rs);
7981 }
7982
7983
7984 /*
7985  *
7986  *
7987  *   3         2         1
7988  *  10987654321098765432109876543210
7989  *  001000               x1110000101
7990  *     rt -----
7991  *          rs -----
7992  *               rd -----
7993  */
7994 std::string NMD::LBUE(uint64 instruction)
7995 {
7996     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
7997     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
7998     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
7999
8000     std::string rt = GPR(copy(rt_value));
8001     std::string s = IMMEDIATE(copy(s_value));
8002     std::string rs = GPR(copy(rs_value));
8003
8004     return img::format("LBUE %s, %s(%s)", rt, s, rs);
8005 }
8006
8007
8008 /*
8009  *
8010  *
8011  *   3         2         1
8012  *  10987654321098765432109876543210
8013  *  001000               x1110000101
8014  *     rt -----
8015  *          rs -----
8016  *               rd -----
8017  */
8018 std::string NMD::LBUX(uint64 instruction)
8019 {
8020     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
8021     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
8022     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
8023
8024     std::string rd = GPR(copy(rd_value));
8025     std::string rs = GPR(copy(rs_value));
8026     std::string rt = GPR(copy(rt_value));
8027
8028     return img::format("LBUX %s, %s(%s)", rd, rs, rt);
8029 }
8030
8031
8032 /*
8033  *
8034  *
8035  *   3         2         1
8036  *  10987654321098765432109876543210
8037  *  001000               x1110000101
8038  *     rt -----
8039  *          rs -----
8040  *               rd -----
8041  */
8042 std::string NMD::LBX(uint64 instruction)
8043 {
8044     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
8045     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
8046     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
8047
8048     std::string rd = GPR(copy(rd_value));
8049     std::string rs = GPR(copy(rs_value));
8050     std::string rt = GPR(copy(rt_value));
8051
8052     return img::format("LBX %s, %s(%s)", rd, rs, rt);
8053 }
8054
8055
8056 /*
8057  *
8058  *
8059  *   3         2         1
8060  *  10987654321098765432109876543210
8061  *  001000               x1110000101
8062  *     rt -----
8063  *          rs -----
8064  *               rd -----
8065  */
8066 std::string NMD::LD_GP_(uint64 instruction)
8067 {
8068     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
8069     uint64 u_value = extract_u_20_to_3__s3(instruction);
8070
8071     std::string rt = GPR(copy(rt_value));
8072     std::string u = IMMEDIATE(copy(u_value));
8073
8074     return img::format("LD %s, %s($%d)", rt, u, 28);
8075 }
8076
8077
8078 /*
8079  *
8080  *
8081  *   3         2         1
8082  *  10987654321098765432109876543210
8083  *  001000               x1110000101
8084  *     rt -----
8085  *          rs -----
8086  *               rd -----
8087  */
8088 std::string NMD::LD_S9_(uint64 instruction)
8089 {
8090     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
8091     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
8092     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
8093
8094     std::string rt = GPR(copy(rt_value));
8095     std::string s = IMMEDIATE(copy(s_value));
8096     std::string rs = GPR(copy(rs_value));
8097
8098     return img::format("LD %s, %s(%s)", rt, s, rs);
8099 }
8100
8101
8102 /*
8103  *
8104  *
8105  *   3         2         1
8106  *  10987654321098765432109876543210
8107  *  001000               x1110000101
8108  *     rt -----
8109  *          rs -----
8110  *               rd -----
8111  */
8112 std::string NMD::LD_U12_(uint64 instruction)
8113 {
8114     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
8115     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
8116     uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
8117
8118     std::string rt = GPR(copy(rt_value));
8119     std::string u = IMMEDIATE(copy(u_value));
8120     std::string rs = GPR(copy(rs_value));
8121
8122     return img::format("LD %s, %s(%s)", rt, u, rs);
8123 }
8124
8125
8126 /*
8127  *
8128  *
8129  *   3         2         1
8130  *  10987654321098765432109876543210
8131  *  001000               x1110000101
8132  *     rt -----
8133  *          rs -----
8134  *               rd -----
8135  */
8136 std::string NMD::LDC1_GP_(uint64 instruction)
8137 {
8138     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
8139     uint64 u_value = extract_u_17_to_2__s2(instruction);
8140
8141     std::string ft = FPR(copy(ft_value));
8142     std::string u = IMMEDIATE(copy(u_value));
8143
8144     return img::format("LDC1 %s, %s($%d)", ft, u, 28);
8145 }
8146
8147
8148 /*
8149  *
8150  *
8151  *   3         2         1
8152  *  10987654321098765432109876543210
8153  *  001000               x1110000101
8154  *     rt -----
8155  *          rs -----
8156  *               rd -----
8157  */
8158 std::string NMD::LDC1_S9_(uint64 instruction)
8159 {
8160     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
8161     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
8162     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
8163
8164     std::string ft = FPR(copy(ft_value));
8165     std::string s = IMMEDIATE(copy(s_value));
8166     std::string rs = GPR(copy(rs_value));
8167
8168     return img::format("LDC1 %s, %s(%s)", ft, s, rs);
8169 }
8170
8171
8172 /*
8173  *
8174  *
8175  *   3         2         1
8176  *  10987654321098765432109876543210
8177  *  001000               x1110000101
8178  *     rt -----
8179  *          rs -----
8180  *               rd -----
8181  */
8182 std::string NMD::LDC1_U12_(uint64 instruction)
8183 {
8184     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
8185     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
8186     uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
8187
8188     std::string ft = FPR(copy(ft_value));
8189     std::string u = IMMEDIATE(copy(u_value));
8190     std::string rs = GPR(copy(rs_value));
8191
8192     return img::format("LDC1 %s, %s(%s)", ft, u, rs);
8193 }
8194
8195
8196 /*
8197  *
8198  *
8199  *   3         2         1
8200  *  10987654321098765432109876543210
8201  *  001000               x1110000101
8202  *     rt -----
8203  *          rs -----
8204  *               rd -----
8205  */
8206 std::string NMD::LDC1XS(uint64 instruction)
8207 {
8208     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
8209     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
8210     uint64 ft_value = extract_ft_15_14_13_12_11(instruction);
8211
8212     std::string ft = FPR(copy(ft_value));
8213     std::string rs = GPR(copy(rs_value));
8214     std::string rt = GPR(copy(rt_value));
8215
8216     return img::format("LDC1XS %s, %s(%s)", ft, rs, rt);
8217 }
8218
8219
8220 /*
8221  *
8222  *
8223  *   3         2         1
8224  *  10987654321098765432109876543210
8225  *  001000               x1110000101
8226  *     rt -----
8227  *          rs -----
8228  *               rd -----
8229  */
8230 std::string NMD::LDC1X(uint64 instruction)
8231 {
8232     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
8233     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
8234     uint64 ft_value = extract_ft_15_14_13_12_11(instruction);
8235
8236     std::string ft = FPR(copy(ft_value));
8237     std::string rs = GPR(copy(rs_value));
8238     std::string rt = GPR(copy(rt_value));
8239
8240     return img::format("LDC1X %s, %s(%s)", ft, rs, rt);
8241 }
8242
8243
8244 /*
8245  *
8246  *
8247  *   3         2         1
8248  *  10987654321098765432109876543210
8249  *  001000               x1110000101
8250  *     rt -----
8251  *          rs -----
8252  *               rd -----
8253  */
8254 std::string NMD::LDC2(uint64 instruction)
8255 {
8256     uint64 ct_value = extract_ct_25_24_23_22_21(instruction);
8257     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
8258     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
8259
8260     std::string ct = CPR(copy(ct_value));
8261     std::string s = IMMEDIATE(copy(s_value));
8262     std::string rs = GPR(copy(rs_value));
8263
8264     return img::format("LDC2 %s, %s(%s)", ct, s, rs);
8265 }
8266
8267
8268 /*
8269  *
8270  *
8271  *   3         2         1
8272  *  10987654321098765432109876543210
8273  *  001000               x1110000101
8274  *     rt -----
8275  *          rs -----
8276  *               rd -----
8277  */
8278 std::string NMD::LDM(uint64 instruction)
8279 {
8280     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
8281     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
8282     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
8283     uint64 count3_value = extract_count3_14_13_12(instruction);
8284
8285     std::string rt = GPR(copy(rt_value));
8286     std::string s = IMMEDIATE(copy(s_value));
8287     std::string rs = GPR(copy(rs_value));
8288     std::string count3 = IMMEDIATE(encode_count3_from_count(count3_value));
8289
8290     return img::format("LDM %s, %s(%s), %s", rt, s, rs, count3);
8291 }
8292
8293
8294 /*
8295  *
8296  *
8297  *   3         2         1
8298  *  10987654321098765432109876543210
8299  *  001000               x1110000101
8300  *     rt -----
8301  *          rs -----
8302  *               rd -----
8303  */
8304 std::string NMD::LDPC_48_(uint64 instruction)
8305 {
8306     uint64 rt_value = extract_rt_41_40_39_38_37(instruction);
8307     int64 s_value = extract_s__se31_15_to_0_31_to_16(instruction);
8308
8309     std::string rt = GPR(copy(rt_value));
8310     std::string s = ADDRESS(encode_s_from_address(s_value), 6);
8311
8312     return img::format("LDPC %s, %s", rt, s);
8313 }
8314
8315
8316 /*
8317  *
8318  *
8319  *   3         2         1
8320  *  10987654321098765432109876543210
8321  *  001000               x1110000101
8322  *     rt -----
8323  *          rs -----
8324  *               rd -----
8325  */
8326 std::string NMD::LDX(uint64 instruction)
8327 {
8328     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
8329     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
8330     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
8331
8332     std::string rd = GPR(copy(rd_value));
8333     std::string rs = GPR(copy(rs_value));
8334     std::string rt = GPR(copy(rt_value));
8335
8336     return img::format("LDX %s, %s(%s)", rd, rs, rt);
8337 }
8338
8339
8340 /*
8341  *
8342  *
8343  *   3         2         1
8344  *  10987654321098765432109876543210
8345  *  001000               x1110000101
8346  *     rt -----
8347  *          rs -----
8348  *               rd -----
8349  */
8350 std::string NMD::LDXS(uint64 instruction)
8351 {
8352     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
8353     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
8354     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
8355
8356     std::string rd = GPR(copy(rd_value));
8357     std::string rs = GPR(copy(rs_value));
8358     std::string rt = GPR(copy(rt_value));
8359
8360     return img::format("LDXS %s, %s(%s)", rd, rs, rt);
8361 }
8362
8363
8364 /*
8365  *
8366  *
8367  *   3         2         1
8368  *  10987654321098765432109876543210
8369  *  001000               x1110000101
8370  *     rt -----
8371  *          rs -----
8372  *               rd -----
8373  */
8374 std::string NMD::LH_16_(uint64 instruction)
8375 {
8376     uint64 rt3_value = extract_rt3_9_8_7(instruction);
8377     uint64 rs3_value = extract_rs3_6_5_4(instruction);
8378     uint64 u_value = extract_u_2_1__s1(instruction);
8379
8380     std::string rt3 = GPR(decode_gpr_gpr3(rt3_value));
8381     std::string u = IMMEDIATE(copy(u_value));
8382     std::string rs3 = GPR(decode_gpr_gpr3(rs3_value));
8383
8384     return img::format("LH %s, %s(%s)", rt3, u, rs3);
8385 }
8386
8387
8388 /*
8389  *
8390  *
8391  *   3         2         1
8392  *  10987654321098765432109876543210
8393  *  001000               x1110000101
8394  *     rt -----
8395  *          rs -----
8396  *               rd -----
8397  */
8398 std::string NMD::LH_GP_(uint64 instruction)
8399 {
8400     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
8401     uint64 u_value = extract_u_17_to_1__s1(instruction);
8402
8403     std::string rt = GPR(copy(rt_value));
8404     std::string u = IMMEDIATE(copy(u_value));
8405
8406     return img::format("LH %s, %s($%d)", rt, u, 28);
8407 }
8408
8409
8410 /*
8411  *
8412  *
8413  *   3         2         1
8414  *  10987654321098765432109876543210
8415  *  001000               x1110000101
8416  *     rt -----
8417  *          rs -----
8418  *               rd -----
8419  */
8420 std::string NMD::LH_S9_(uint64 instruction)
8421 {
8422     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
8423     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
8424     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
8425
8426     std::string rt = GPR(copy(rt_value));
8427     std::string s = IMMEDIATE(copy(s_value));
8428     std::string rs = GPR(copy(rs_value));
8429
8430     return img::format("LH %s, %s(%s)", rt, s, rs);
8431 }
8432
8433
8434 /*
8435  *
8436  *
8437  *   3         2         1
8438  *  10987654321098765432109876543210
8439  *  001000               x1110000101
8440  *     rt -----
8441  *          rs -----
8442  *               rd -----
8443  */
8444 std::string NMD::LH_U12_(uint64 instruction)
8445 {
8446     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
8447     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
8448     uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
8449
8450     std::string rt = GPR(copy(rt_value));
8451     std::string u = IMMEDIATE(copy(u_value));
8452     std::string rs = GPR(copy(rs_value));
8453
8454     return img::format("LH %s, %s(%s)", rt, u, rs);
8455 }
8456
8457
8458 /*
8459  *
8460  *
8461  *   3         2         1
8462  *  10987654321098765432109876543210
8463  *  001000               x1110000101
8464  *     rt -----
8465  *          rs -----
8466  *               rd -----
8467  */
8468 std::string NMD::LHE(uint64 instruction)
8469 {
8470     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
8471     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
8472     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
8473
8474     std::string rt = GPR(copy(rt_value));
8475     std::string s = IMMEDIATE(copy(s_value));
8476     std::string rs = GPR(copy(rs_value));
8477
8478     return img::format("LHE %s, %s(%s)", rt, s, rs);
8479 }
8480
8481
8482 /*
8483  *
8484  *
8485  *   3         2         1
8486  *  10987654321098765432109876543210
8487  *  001000               x1110000101
8488  *     rt -----
8489  *          rs -----
8490  *               rd -----
8491  */
8492 std::string NMD::LHU_16_(uint64 instruction)
8493 {
8494     uint64 rt3_value = extract_rt3_9_8_7(instruction);
8495     uint64 rs3_value = extract_rs3_6_5_4(instruction);
8496     uint64 u_value = extract_u_2_1__s1(instruction);
8497
8498     std::string rt3 = GPR(decode_gpr_gpr3(rt3_value));
8499     std::string u = IMMEDIATE(copy(u_value));
8500     std::string rs3 = GPR(decode_gpr_gpr3(rs3_value));
8501
8502     return img::format("LHU %s, %s(%s)", rt3, u, rs3);
8503 }
8504
8505
8506 /*
8507  *
8508  *
8509  *   3         2         1
8510  *  10987654321098765432109876543210
8511  *  001000               x1110000101
8512  *     rt -----
8513  *          rs -----
8514  *               rd -----
8515  */
8516 std::string NMD::LHU_GP_(uint64 instruction)
8517 {
8518     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
8519     uint64 u_value = extract_u_17_to_1__s1(instruction);
8520
8521     std::string rt = GPR(copy(rt_value));
8522     std::string u = IMMEDIATE(copy(u_value));
8523
8524     return img::format("LHU %s, %s($%d)", rt, u, 28);
8525 }
8526
8527
8528 /*
8529  *
8530  *
8531  *   3         2         1
8532  *  10987654321098765432109876543210
8533  *  001000               x1110000101
8534  *     rt -----
8535  *          rs -----
8536  *               rd -----
8537  */
8538 std::string NMD::LHU_S9_(uint64 instruction)
8539 {
8540     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
8541     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
8542     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
8543
8544     std::string rt = GPR(copy(rt_value));
8545     std::string s = IMMEDIATE(copy(s_value));
8546     std::string rs = GPR(copy(rs_value));
8547
8548     return img::format("LHU %s, %s(%s)", rt, s, rs);
8549 }
8550
8551
8552 /*
8553  *
8554  *
8555  *   3         2         1
8556  *  10987654321098765432109876543210
8557  *  001000               x1110000101
8558  *     rt -----
8559  *          rs -----
8560  *               rd -----
8561  */
8562 std::string NMD::LHU_U12_(uint64 instruction)
8563 {
8564     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
8565     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
8566     uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
8567
8568     std::string rt = GPR(copy(rt_value));
8569     std::string u = IMMEDIATE(copy(u_value));
8570     std::string rs = GPR(copy(rs_value));
8571
8572     return img::format("LHU %s, %s(%s)", rt, u, rs);
8573 }
8574
8575
8576 /*
8577  *
8578  *
8579  *   3         2         1
8580  *  10987654321098765432109876543210
8581  *  001000               x1110000101
8582  *     rt -----
8583  *          rs -----
8584  *               rd -----
8585  */
8586 std::string NMD::LHUE(uint64 instruction)
8587 {
8588     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
8589     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
8590     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
8591
8592     std::string rt = GPR(copy(rt_value));
8593     std::string s = IMMEDIATE(copy(s_value));
8594     std::string rs = GPR(copy(rs_value));
8595
8596     return img::format("LHUE %s, %s(%s)", rt, s, rs);
8597 }
8598
8599
8600 /*
8601  *
8602  *
8603  *   3         2         1
8604  *  10987654321098765432109876543210
8605  *  001000               x1110000101
8606  *     rt -----
8607  *          rs -----
8608  *               rd -----
8609  */
8610 std::string NMD::LHUX(uint64 instruction)
8611 {
8612     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
8613     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
8614     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
8615
8616     std::string rd = GPR(copy(rd_value));
8617     std::string rs = GPR(copy(rs_value));
8618     std::string rt = GPR(copy(rt_value));
8619
8620     return img::format("LHUX %s, %s(%s)", rd, rs, rt);
8621 }
8622
8623
8624 /*
8625  *
8626  *
8627  *   3         2         1
8628  *  10987654321098765432109876543210
8629  *  001000               x1110000101
8630  *     rt -----
8631  *          rs -----
8632  *               rd -----
8633  */
8634 std::string NMD::LHUXS(uint64 instruction)
8635 {
8636     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
8637     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
8638     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
8639
8640     std::string rd = GPR(copy(rd_value));
8641     std::string rs = GPR(copy(rs_value));
8642     std::string rt = GPR(copy(rt_value));
8643
8644     return img::format("LHUXS %s, %s(%s)", rd, rs, rt);
8645 }
8646
8647
8648 /*
8649  *
8650  *
8651  *   3         2         1
8652  *  10987654321098765432109876543210
8653  *  001000               x1110000101
8654  *     rt -----
8655  *          rs -----
8656  *               rd -----
8657  */
8658 std::string NMD::LHXS(uint64 instruction)
8659 {
8660     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
8661     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
8662     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
8663
8664     std::string rd = GPR(copy(rd_value));
8665     std::string rs = GPR(copy(rs_value));
8666     std::string rt = GPR(copy(rt_value));
8667
8668     return img::format("LHXS %s, %s(%s)", rd, rs, rt);
8669 }
8670
8671
8672 /*
8673  *
8674  *
8675  *   3         2         1
8676  *  10987654321098765432109876543210
8677  *  001000               x1110000101
8678  *     rt -----
8679  *          rs -----
8680  *               rd -----
8681  */
8682 std::string NMD::LHX(uint64 instruction)
8683 {
8684     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
8685     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
8686     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
8687
8688     std::string rd = GPR(copy(rd_value));
8689     std::string rs = GPR(copy(rs_value));
8690     std::string rt = GPR(copy(rt_value));
8691
8692     return img::format("LHX %s, %s(%s)", rd, rs, rt);
8693 }
8694
8695
8696 /*
8697  *
8698  *
8699  *   3         2         1
8700  *  10987654321098765432109876543210
8701  *  001000               x1110000101
8702  *     rt -----
8703  *          rs -----
8704  *               rd -----
8705  */
8706 std::string NMD::LI_16_(uint64 instruction)
8707 {
8708     uint64 rt3_value = extract_rt3_9_8_7(instruction);
8709     uint64 eu_value = extract_eu_6_5_4_3_2_1_0(instruction);
8710
8711     std::string rt3 = GPR(decode_gpr_gpr3(rt3_value));
8712     std::string eu = IMMEDIATE(encode_eu_from_s_li16(eu_value));
8713
8714     return img::format("LI %s, %s", rt3, eu);
8715 }
8716
8717
8718 /*
8719  *
8720  *
8721  *   3         2         1
8722  *  10987654321098765432109876543210
8723  *  001000               x1110000101
8724  *     rt -----
8725  *          rs -----
8726  *               rd -----
8727  */
8728 std::string NMD::LI_48_(uint64 instruction)
8729 {
8730     uint64 rt_value = extract_rt_41_40_39_38_37(instruction);
8731     int64 s_value = extract_s__se31_15_to_0_31_to_16(instruction);
8732
8733     std::string rt = GPR(copy(rt_value));
8734     std::string s = IMMEDIATE(copy(s_value));
8735
8736     return img::format("LI %s, %s", rt, s);
8737 }
8738
8739
8740 /*
8741  *
8742  *
8743  *   3         2         1
8744  *  10987654321098765432109876543210
8745  *  001000               x1110000101
8746  *     rt -----
8747  *          rs -----
8748  *               rd -----
8749  */
8750 std::string NMD::LL(uint64 instruction)
8751 {
8752     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
8753     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
8754     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_s2(instruction);
8755
8756     std::string rt = GPR(copy(rt_value));
8757     std::string s = IMMEDIATE(copy(s_value));
8758     std::string rs = GPR(copy(rs_value));
8759
8760     return img::format("LL %s, %s(%s)", rt, s, rs);
8761 }
8762
8763
8764 /*
8765  *
8766  *
8767  *   3         2         1
8768  *  10987654321098765432109876543210
8769  *  001000               x1110000101
8770  *     rt -----
8771  *          rs -----
8772  *               rd -----
8773  */
8774 std::string NMD::LLD(uint64 instruction)
8775 {
8776     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
8777     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
8778     int64 s_value = extract_s__se8_15_7_6_5_4_3_s3(instruction);
8779
8780     std::string rt = GPR(copy(rt_value));
8781     std::string s = IMMEDIATE(copy(s_value));
8782     std::string rs = GPR(copy(rs_value));
8783
8784     return img::format("LLD %s, %s(%s)", rt, s, rs);
8785 }
8786
8787
8788 /*
8789  *
8790  *
8791  *   3         2         1
8792  *  10987654321098765432109876543210
8793  *  001000               x1110000101
8794  *     rt -----
8795  *          rs -----
8796  *               rd -----
8797  */
8798 std::string NMD::LLDP(uint64 instruction)
8799 {
8800     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
8801     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
8802     uint64 ru_value = extract_ru_7_6_5_4_3(instruction);
8803
8804     std::string rt = GPR(copy(rt_value));
8805     std::string ru = GPR(copy(ru_value));
8806     std::string rs = GPR(copy(rs_value));
8807
8808     return img::format("LLDP %s, %s, (%s)", rt, ru, rs);
8809 }
8810
8811
8812 /*
8813  *
8814  *
8815  *   3         2         1
8816  *  10987654321098765432109876543210
8817  *  001000               x1110000101
8818  *     rt -----
8819  *          rs -----
8820  *               rd -----
8821  */
8822 std::string NMD::LLE(uint64 instruction)
8823 {
8824     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
8825     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
8826     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_s2(instruction);
8827
8828     std::string rt = GPR(copy(rt_value));
8829     std::string s = IMMEDIATE(copy(s_value));
8830     std::string rs = GPR(copy(rs_value));
8831
8832     return img::format("LLE %s, %s(%s)", rt, s, rs);
8833 }
8834
8835
8836 /*
8837  *
8838  *
8839  *   3         2         1
8840  *  10987654321098765432109876543210
8841  *  001000               x1110000101
8842  *     rt -----
8843  *          rs -----
8844  *               rd -----
8845  */
8846 std::string NMD::LLWP(uint64 instruction)
8847 {
8848     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
8849     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
8850     uint64 ru_value = extract_ru_7_6_5_4_3(instruction);
8851
8852     std::string rt = GPR(copy(rt_value));
8853     std::string ru = GPR(copy(ru_value));
8854     std::string rs = GPR(copy(rs_value));
8855
8856     return img::format("LLWP %s, %s, (%s)", rt, ru, rs);
8857 }
8858
8859
8860 /*
8861  *
8862  *
8863  *   3         2         1
8864  *  10987654321098765432109876543210
8865  *  001000               x1110000101
8866  *     rt -----
8867  *          rs -----
8868  *               rd -----
8869  */
8870 std::string NMD::LLWPE(uint64 instruction)
8871 {
8872     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
8873     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
8874     uint64 ru_value = extract_ru_7_6_5_4_3(instruction);
8875
8876     std::string rt = GPR(copy(rt_value));
8877     std::string ru = GPR(copy(ru_value));
8878     std::string rs = GPR(copy(rs_value));
8879
8880     return img::format("LLWPE %s, %s, (%s)", rt, ru, rs);
8881 }
8882
8883
8884 /*
8885  *
8886  *
8887  *   3         2         1
8888  *  10987654321098765432109876543210
8889  *  001000               x1110000101
8890  *     rt -----
8891  *          rs -----
8892  *               rd -----
8893  */
8894 std::string NMD::LSA(uint64 instruction)
8895 {
8896     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
8897     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
8898     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
8899     uint64 u2_value = extract_u2_10_9(instruction);
8900
8901     std::string rd = GPR(copy(rd_value));
8902     std::string rs = GPR(copy(rs_value));
8903     std::string rt = GPR(copy(rt_value));
8904     std::string u2 = IMMEDIATE(copy(u2_value));
8905
8906     return img::format("LSA %s, %s, %s, %s", rd, rs, rt, u2);
8907 }
8908
8909
8910 /*
8911  *
8912  *
8913  *   3         2         1
8914  *  10987654321098765432109876543210
8915  *  001000               x1110000101
8916  *     rt -----
8917  *          rs -----
8918  *               rd -----
8919  */
8920 std::string NMD::LUI(uint64 instruction)
8921 {
8922     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
8923     int64 s_value = extract_s__se31_0_11_to_2_20_to_12_s12(instruction);
8924
8925     std::string rt = GPR(copy(rt_value));
8926     std::string s = IMMEDIATE(copy(s_value));
8927
8928     return img::format("LUI %s, %%hi(%s)", rt, s);
8929 }
8930
8931
8932 /*
8933  *
8934  *
8935  *   3         2         1
8936  *  10987654321098765432109876543210
8937  *  001000               x1110000101
8938  *     rt -----
8939  *          rs -----
8940  *               rd -----
8941  */
8942 std::string NMD::LW_16_(uint64 instruction)
8943 {
8944     uint64 rt3_value = extract_rt3_9_8_7(instruction);
8945     uint64 rs3_value = extract_rs3_6_5_4(instruction);
8946     uint64 u_value = extract_u_3_2_1_0__s2(instruction);
8947
8948     std::string rt3 = GPR(decode_gpr_gpr3(rt3_value));
8949     std::string u = IMMEDIATE(copy(u_value));
8950     std::string rs3 = GPR(decode_gpr_gpr3(rs3_value));
8951
8952     return img::format("LW %s, %s(%s)", rt3, u, rs3);
8953 }
8954
8955
8956 /*
8957  *
8958  *
8959  *   3         2         1
8960  *  10987654321098765432109876543210
8961  *  001000               x1110000101
8962  *     rt -----
8963  *          rs -----
8964  *               rd -----
8965  */
8966 std::string NMD::LW_4X4_(uint64 instruction)
8967 {
8968     uint64 rt4_value = extract_rt4_9_7_6_5(instruction);
8969     uint64 rs4_value = extract_rs4_4_2_1_0(instruction);
8970     uint64 u_value = extract_u_3_8__s2(instruction);
8971
8972     std::string rt4 = GPR(encode_gpr4(rt4_value));
8973     std::string u = IMMEDIATE(copy(u_value));
8974     std::string rs4 = GPR(encode_gpr4(rs4_value));
8975
8976     return img::format("LW %s, %s(%s)", rt4, u, rs4);
8977 }
8978
8979
8980 /*
8981  *
8982  *
8983  *   3         2         1
8984  *  10987654321098765432109876543210
8985  *  001000               x1110000101
8986  *     rt -----
8987  *          rs -----
8988  *               rd -----
8989  */
8990 std::string NMD::LW_GP_(uint64 instruction)
8991 {
8992     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
8993     uint64 u_value = extract_u_20_to_2__s2(instruction);
8994
8995     std::string rt = GPR(copy(rt_value));
8996     std::string u = IMMEDIATE(copy(u_value));
8997
8998     return img::format("LW %s, %s($%d)", rt, u, 28);
8999 }
9000
9001
9002 /*
9003  *
9004  *
9005  *   3         2         1
9006  *  10987654321098765432109876543210
9007  *  001000               x1110000101
9008  *     rt -----
9009  *          rs -----
9010  *               rd -----
9011  */
9012 std::string NMD::LW_GP16_(uint64 instruction)
9013 {
9014     uint64 rt3_value = extract_rt3_9_8_7(instruction);
9015     uint64 u_value = extract_u_6_5_4_3_2_1_0__s2(instruction);
9016
9017     std::string rt3 = GPR(decode_gpr_gpr3(rt3_value));
9018     std::string u = IMMEDIATE(copy(u_value));
9019
9020     return img::format("LW %s, %s($%d)", rt3, u, 28);
9021 }
9022
9023
9024 /*
9025  *
9026  *
9027  *   3         2         1
9028  *  10987654321098765432109876543210
9029  *  001000               x1110000101
9030  *     rt -----
9031  *          rs -----
9032  *               rd -----
9033  */
9034 std::string NMD::LW_S9_(uint64 instruction)
9035 {
9036     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
9037     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
9038     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
9039
9040     std::string rt = GPR(copy(rt_value));
9041     std::string s = IMMEDIATE(copy(s_value));
9042     std::string rs = GPR(copy(rs_value));
9043
9044     return img::format("LW %s, %s(%s)", rt, s, rs);
9045 }
9046
9047
9048 /*
9049  *
9050  *
9051  *   3         2         1
9052  *  10987654321098765432109876543210
9053  *  001000               x1110000101
9054  *     rt -----
9055  *          rs -----
9056  *               rd -----
9057  */
9058 std::string NMD::LW_SP_(uint64 instruction)
9059 {
9060     uint64 rt_value = extract_rt_9_8_7_6_5(instruction);
9061     uint64 u_value = extract_u_4_3_2_1_0__s2(instruction);
9062
9063     std::string rt = GPR(copy(rt_value));
9064     std::string u = IMMEDIATE(copy(u_value));
9065
9066     return img::format("LW %s, %s($%d)", rt, u, 29);
9067 }
9068
9069
9070 /*
9071  *
9072  *
9073  *   3         2         1
9074  *  10987654321098765432109876543210
9075  *  001000               x1110000101
9076  *     rt -----
9077  *          rs -----
9078  *               rd -----
9079  */
9080 std::string NMD::LW_U12_(uint64 instruction)
9081 {
9082     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
9083     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
9084     uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
9085
9086     std::string rt = GPR(copy(rt_value));
9087     std::string u = IMMEDIATE(copy(u_value));
9088     std::string rs = GPR(copy(rs_value));
9089
9090     return img::format("LW %s, %s(%s)", rt, u, rs);
9091 }
9092
9093
9094 /*
9095  *
9096  *
9097  *   3         2         1
9098  *  10987654321098765432109876543210
9099  *  001000               x1110000101
9100  *     rt -----
9101  *          rs -----
9102  *               rd -----
9103  */
9104 std::string NMD::LWC1_GP_(uint64 instruction)
9105 {
9106     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
9107     uint64 u_value = extract_u_17_to_2__s2(instruction);
9108
9109     std::string ft = FPR(copy(ft_value));
9110     std::string u = IMMEDIATE(copy(u_value));
9111
9112     return img::format("LWC1 %s, %s($%d)", ft, u, 28);
9113 }
9114
9115
9116 /*
9117  *
9118  *
9119  *   3         2         1
9120  *  10987654321098765432109876543210
9121  *  001000               x1110000101
9122  *     rt -----
9123  *          rs -----
9124  *               rd -----
9125  */
9126 std::string NMD::LWC1_S9_(uint64 instruction)
9127 {
9128     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
9129     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
9130     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
9131
9132     std::string ft = FPR(copy(ft_value));
9133     std::string s = IMMEDIATE(copy(s_value));
9134     std::string rs = GPR(copy(rs_value));
9135
9136     return img::format("LWC1 %s, %s(%s)", ft, s, rs);
9137 }
9138
9139
9140 /*
9141  *
9142  *
9143  *   3         2         1
9144  *  10987654321098765432109876543210
9145  *  001000               x1110000101
9146  *     rt -----
9147  *          rs -----
9148  *               rd -----
9149  */
9150 std::string NMD::LWC1_U12_(uint64 instruction)
9151 {
9152     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
9153     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
9154     uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
9155
9156     std::string ft = FPR(copy(ft_value));
9157     std::string u = IMMEDIATE(copy(u_value));
9158     std::string rs = GPR(copy(rs_value));
9159
9160     return img::format("LWC1 %s, %s(%s)", ft, u, rs);
9161 }
9162
9163
9164 /*
9165  *
9166  *
9167  *   3         2         1
9168  *  10987654321098765432109876543210
9169  *  001000               x1110000101
9170  *     rt -----
9171  *          rs -----
9172  *               rd -----
9173  */
9174 std::string NMD::LWC1X(uint64 instruction)
9175 {
9176     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
9177     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
9178     uint64 ft_value = extract_ft_15_14_13_12_11(instruction);
9179
9180     std::string ft = FPR(copy(ft_value));
9181     std::string rs = GPR(copy(rs_value));
9182     std::string rt = GPR(copy(rt_value));
9183
9184     return img::format("LWC1X %s, %s(%s)", ft, rs, rt);
9185 }
9186
9187
9188 /*
9189  *
9190  *
9191  *   3         2         1
9192  *  10987654321098765432109876543210
9193  *  001000               x1110000101
9194  *     rt -----
9195  *          rs -----
9196  *               rd -----
9197  */
9198 std::string NMD::LWC1XS(uint64 instruction)
9199 {
9200     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
9201     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
9202     uint64 ft_value = extract_ft_15_14_13_12_11(instruction);
9203
9204     std::string ft = FPR(copy(ft_value));
9205     std::string rs = GPR(copy(rs_value));
9206     std::string rt = GPR(copy(rt_value));
9207
9208     return img::format("LWC1XS %s, %s(%s)", ft, rs, rt);
9209 }
9210
9211
9212 /*
9213  *
9214  *
9215  *   3         2         1
9216  *  10987654321098765432109876543210
9217  *  001000               x1110000101
9218  *     rt -----
9219  *          rs -----
9220  *               rd -----
9221  */
9222 std::string NMD::LWC2(uint64 instruction)
9223 {
9224     uint64 ct_value = extract_ct_25_24_23_22_21(instruction);
9225     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
9226     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
9227
9228     std::string ct = CPR(copy(ct_value));
9229     std::string s = IMMEDIATE(copy(s_value));
9230     std::string rs = GPR(copy(rs_value));
9231
9232     return img::format("LWC2 %s, %s(%s)", ct, s, rs);
9233 }
9234
9235
9236 /*
9237  *
9238  *
9239  *   3         2         1
9240  *  10987654321098765432109876543210
9241  *  001000               x1110000101
9242  *     rt -----
9243  *          rs -----
9244  *               rd -----
9245  */
9246 std::string NMD::LWE(uint64 instruction)
9247 {
9248     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
9249     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
9250     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
9251
9252     std::string rt = GPR(copy(rt_value));
9253     std::string s = IMMEDIATE(copy(s_value));
9254     std::string rs = GPR(copy(rs_value));
9255
9256     return img::format("LWE %s, %s(%s)", rt, s, rs);
9257 }
9258
9259
9260 /*
9261  *
9262  *
9263  *   3         2         1
9264  *  10987654321098765432109876543210
9265  *  001000               x1110000101
9266  *     rt -----
9267  *          rs -----
9268  *               rd -----
9269  */
9270 std::string NMD::LWM(uint64 instruction)
9271 {
9272     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
9273     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
9274     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
9275     uint64 count3_value = extract_count3_14_13_12(instruction);
9276
9277     std::string rt = GPR(copy(rt_value));
9278     std::string s = IMMEDIATE(copy(s_value));
9279     std::string rs = GPR(copy(rs_value));
9280     std::string count3 = IMMEDIATE(encode_count3_from_count(count3_value));
9281
9282     return img::format("LWM %s, %s(%s), %s", rt, s, rs, count3);
9283 }
9284
9285
9286 /*
9287  *
9288  *
9289  *   3         2         1
9290  *  10987654321098765432109876543210
9291  *  001000               x1110000101
9292  *     rt -----
9293  *          rs -----
9294  *               rd -----
9295  */
9296 std::string NMD::LWPC_48_(uint64 instruction)
9297 {
9298     uint64 rt_value = extract_rt_41_40_39_38_37(instruction);
9299     int64 s_value = extract_s__se31_15_to_0_31_to_16(instruction);
9300
9301     std::string rt = GPR(copy(rt_value));
9302     std::string s = ADDRESS(encode_s_from_address(s_value), 6);
9303
9304     return img::format("LWPC %s, %s", rt, s);
9305 }
9306
9307
9308 /*
9309  *
9310  *
9311  *   3         2         1
9312  *  10987654321098765432109876543210
9313  *  001000               x1110000101
9314  *     rt -----
9315  *          rs -----
9316  *               rd -----
9317  */
9318 std::string NMD::LWU_GP_(uint64 instruction)
9319 {
9320     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
9321     uint64 u_value = extract_u_17_to_2__s2(instruction);
9322
9323     std::string rt = GPR(copy(rt_value));
9324     std::string u = IMMEDIATE(copy(u_value));
9325
9326     return img::format("LWU %s, %s($%d)", rt, u, 28);
9327 }
9328
9329
9330 /*
9331  *
9332  *
9333  *   3         2         1
9334  *  10987654321098765432109876543210
9335  *  001000               x1110000101
9336  *     rt -----
9337  *          rs -----
9338  *               rd -----
9339  */
9340 std::string NMD::LWU_S9_(uint64 instruction)
9341 {
9342     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
9343     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
9344     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
9345
9346     std::string rt = GPR(copy(rt_value));
9347     std::string s = IMMEDIATE(copy(s_value));
9348     std::string rs = GPR(copy(rs_value));
9349
9350     return img::format("LWU %s, %s(%s)", rt, s, rs);
9351 }
9352
9353
9354 /*
9355  *
9356  *
9357  *   3         2         1
9358  *  10987654321098765432109876543210
9359  *  001000               x1110000101
9360  *     rt -----
9361  *          rs -----
9362  *               rd -----
9363  */
9364 std::string NMD::LWU_U12_(uint64 instruction)
9365 {
9366     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
9367     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
9368     uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
9369
9370     std::string rt = GPR(copy(rt_value));
9371     std::string u = IMMEDIATE(copy(u_value));
9372     std::string rs = GPR(copy(rs_value));
9373
9374     return img::format("LWU %s, %s(%s)", rt, u, rs);
9375 }
9376
9377
9378 /*
9379  *
9380  *
9381  *   3         2         1
9382  *  10987654321098765432109876543210
9383  *  001000               x1110000101
9384  *     rt -----
9385  *          rs -----
9386  *               rd -----
9387  */
9388 std::string NMD::LWUX(uint64 instruction)
9389 {
9390     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
9391     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
9392     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
9393
9394     std::string rd = GPR(copy(rd_value));
9395     std::string rs = GPR(copy(rs_value));
9396     std::string rt = GPR(copy(rt_value));
9397
9398     return img::format("LWUX %s, %s(%s)", rd, rs, rt);
9399 }
9400
9401
9402 /*
9403  *
9404  *
9405  *   3         2         1
9406  *  10987654321098765432109876543210
9407  *  001000               x1110000101
9408  *     rt -----
9409  *          rs -----
9410  *               rd -----
9411  */
9412 std::string NMD::LWUXS(uint64 instruction)
9413 {
9414     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
9415     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
9416     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
9417
9418     std::string rd = GPR(copy(rd_value));
9419     std::string rs = GPR(copy(rs_value));
9420     std::string rt = GPR(copy(rt_value));
9421
9422     return img::format("LWUXS %s, %s(%s)", rd, rs, rt);
9423 }
9424
9425
9426 /*
9427  *
9428  *
9429  *   3         2         1
9430  *  10987654321098765432109876543210
9431  *  001000               x1110000101
9432  *     rt -----
9433  *          rs -----
9434  *               rd -----
9435  */
9436 std::string NMD::LWX(uint64 instruction)
9437 {
9438     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
9439     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
9440     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
9441
9442     std::string rd = GPR(copy(rd_value));
9443     std::string rs = GPR(copy(rs_value));
9444     std::string rt = GPR(copy(rt_value));
9445
9446     return img::format("LWX %s, %s(%s)", rd, rs, rt);
9447 }
9448
9449
9450 /*
9451  *
9452  *
9453  *   3         2         1
9454  *  10987654321098765432109876543210
9455  *  001000               x1110000101
9456  *     rt -----
9457  *          rs -----
9458  *               rd -----
9459  */
9460 std::string NMD::LWXS_16_(uint64 instruction)
9461 {
9462     uint64 rt3_value = extract_rt3_9_8_7(instruction);
9463     uint64 rs3_value = extract_rs3_6_5_4(instruction);
9464     uint64 rd3_value = extract_rd3_3_2_1(instruction);
9465
9466     std::string rd3 = GPR(decode_gpr_gpr3(rd3_value));
9467     std::string rs3 = GPR(decode_gpr_gpr3(rs3_value));
9468     std::string rt3 = IMMEDIATE(decode_gpr_gpr3(rt3_value));
9469
9470     return img::format("LWXS %s, %s(%s)", rd3, rs3, rt3);
9471 }
9472
9473
9474 /*
9475  *
9476  *
9477  *   3         2         1
9478  *  10987654321098765432109876543210
9479  *  001000               x1110000101
9480  *     rt -----
9481  *          rs -----
9482  *               rd -----
9483  */
9484 std::string NMD::LWXS_32_(uint64 instruction)
9485 {
9486     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
9487     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
9488     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
9489
9490     std::string rd = GPR(copy(rd_value));
9491     std::string rs = GPR(copy(rs_value));
9492     std::string rt = GPR(copy(rt_value));
9493
9494     return img::format("LWXS %s, %s(%s)", rd, rs, rt);
9495 }
9496
9497
9498 /*
9499  *
9500  *
9501  *   3         2         1
9502  *  10987654321098765432109876543210
9503  *  001000               x1110000101
9504  *     rt -----
9505  *          rs -----
9506  *               rd -----
9507  */
9508 std::string NMD::MADD_DSP_(uint64 instruction)
9509 {
9510     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
9511     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
9512     uint64 ac_value = extract_ac_13_12(instruction);
9513
9514     std::string ac = AC(copy(ac_value));
9515     std::string rs = GPR(copy(rs_value));
9516     std::string rt = GPR(copy(rt_value));
9517
9518     return img::format("MADD %s, %s, %s", ac, rs, rt);
9519 }
9520
9521
9522 /*
9523  *
9524  *
9525  *   3         2         1
9526  *  10987654321098765432109876543210
9527  *  001000               x1110000101
9528  *     rt -----
9529  *          rs -----
9530  *               rd -----
9531  */
9532 std::string NMD::MADDF_D(uint64 instruction)
9533 {
9534     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
9535     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
9536     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
9537
9538     std::string fd = FPR(copy(fd_value));
9539     std::string fs = FPR(copy(fs_value));
9540     std::string ft = FPR(copy(ft_value));
9541
9542     return img::format("MADDF.D %s, %s, %s", fd, fs, ft);
9543 }
9544
9545
9546 /*
9547  *
9548  *
9549  *   3         2         1
9550  *  10987654321098765432109876543210
9551  *  001000               x1110000101
9552  *     rt -----
9553  *          rs -----
9554  *               rd -----
9555  */
9556 std::string NMD::MADDF_S(uint64 instruction)
9557 {
9558     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
9559     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
9560     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
9561
9562     std::string fd = FPR(copy(fd_value));
9563     std::string fs = FPR(copy(fs_value));
9564     std::string ft = FPR(copy(ft_value));
9565
9566     return img::format("MADDF.S %s, %s, %s", fd, fs, ft);
9567 }
9568
9569
9570 /*
9571  *
9572  *
9573  *   3         2         1
9574  *  10987654321098765432109876543210
9575  *  001000               x1110000101
9576  *     rt -----
9577  *          rs -----
9578  *               rd -----
9579  */
9580 std::string NMD::MADDU_DSP_(uint64 instruction)
9581 {
9582     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
9583     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
9584     uint64 ac_value = extract_ac_13_12(instruction);
9585
9586     std::string ac = AC(copy(ac_value));
9587     std::string rs = GPR(copy(rs_value));
9588     std::string rt = GPR(copy(rt_value));
9589
9590     return img::format("MADDU %s, %s, %s", ac, rs, rt);
9591 }
9592
9593
9594 /*
9595  *
9596  *
9597  *   3         2         1
9598  *  10987654321098765432109876543210
9599  *  001000               x1110000101
9600  *     rt -----
9601  *          rs -----
9602  *               rd -----
9603  */
9604 std::string NMD::MAQ_S_W_PHL(uint64 instruction)
9605 {
9606     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
9607     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
9608     uint64 ac_value = extract_ac_13_12(instruction);
9609
9610     std::string ac = AC(copy(ac_value));
9611     std::string rs = GPR(copy(rs_value));
9612     std::string rt = GPR(copy(rt_value));
9613
9614     return img::format("MAQ_S.W.PHL %s, %s, %s", ac, rs, rt);
9615 }
9616
9617
9618 /*
9619  *
9620  *
9621  *   3         2         1
9622  *  10987654321098765432109876543210
9623  *  001000               x1110000101
9624  *     rt -----
9625  *          rs -----
9626  *               rd -----
9627  */
9628 std::string NMD::MAQ_S_W_PHR(uint64 instruction)
9629 {
9630     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
9631     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
9632     uint64 ac_value = extract_ac_13_12(instruction);
9633
9634     std::string ac = AC(copy(ac_value));
9635     std::string rs = GPR(copy(rs_value));
9636     std::string rt = GPR(copy(rt_value));
9637
9638     return img::format("MAQ_S.W.PHR %s, %s, %s", ac, rs, rt);
9639 }
9640
9641
9642 /*
9643  *
9644  *
9645  *   3         2         1
9646  *  10987654321098765432109876543210
9647  *  001000               x1110000101
9648  *     rt -----
9649  *          rs -----
9650  *               rd -----
9651  */
9652 std::string NMD::MAQ_SA_W_PHL(uint64 instruction)
9653 {
9654     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
9655     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
9656     uint64 ac_value = extract_ac_13_12(instruction);
9657
9658     std::string ac = AC(copy(ac_value));
9659     std::string rs = GPR(copy(rs_value));
9660     std::string rt = GPR(copy(rt_value));
9661
9662     return img::format("MAQ_SA.W.PHL %s, %s, %s", ac, rs, rt);
9663 }
9664
9665
9666 /*
9667  *
9668  *
9669  *   3         2         1
9670  *  10987654321098765432109876543210
9671  *  001000               x1110000101
9672  *     rt -----
9673  *          rs -----
9674  *               rd -----
9675  */
9676 std::string NMD::MAQ_SA_W_PHR(uint64 instruction)
9677 {
9678     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
9679     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
9680     uint64 ac_value = extract_ac_13_12(instruction);
9681
9682     std::string ac = AC(copy(ac_value));
9683     std::string rs = GPR(copy(rs_value));
9684     std::string rt = GPR(copy(rt_value));
9685
9686     return img::format("MAQ_SA.W.PHR %s, %s, %s", ac, rs, rt);
9687 }
9688
9689
9690 /*
9691  *
9692  *
9693  *   3         2         1
9694  *  10987654321098765432109876543210
9695  *  001000               x1110000101
9696  *     rt -----
9697  *          rs -----
9698  *               rd -----
9699  */
9700 std::string NMD::MAX_D(uint64 instruction)
9701 {
9702     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
9703     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
9704     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
9705
9706     std::string fd = FPR(copy(fd_value));
9707     std::string fs = FPR(copy(fs_value));
9708     std::string ft = FPR(copy(ft_value));
9709
9710     return img::format("MAX.D %s, %s, %s", fd, fs, ft);
9711 }
9712
9713
9714 /*
9715  *
9716  *
9717  *   3         2         1
9718  *  10987654321098765432109876543210
9719  *  001000               x1110000101
9720  *     rt -----
9721  *          rs -----
9722  *               rd -----
9723  */
9724 std::string NMD::MAX_S(uint64 instruction)
9725 {
9726     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
9727     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
9728     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
9729
9730     std::string fd = FPR(copy(fd_value));
9731     std::string fs = FPR(copy(fs_value));
9732     std::string ft = FPR(copy(ft_value));
9733
9734     return img::format("MAX.S %s, %s, %s", fd, fs, ft);
9735 }
9736
9737
9738 /*
9739  *
9740  *
9741  *   3         2         1
9742  *  10987654321098765432109876543210
9743  *  001000               x1110000101
9744  *     rt -----
9745  *          rs -----
9746  *               rd -----
9747  */
9748 std::string NMD::MAXA_D(uint64 instruction)
9749 {
9750     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
9751     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
9752     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
9753
9754     std::string fd = FPR(copy(fd_value));
9755     std::string fs = FPR(copy(fs_value));
9756     std::string ft = FPR(copy(ft_value));
9757
9758     return img::format("MAXA.D %s, %s, %s", fd, fs, ft);
9759 }
9760
9761
9762 /*
9763  *
9764  *
9765  *   3         2         1
9766  *  10987654321098765432109876543210
9767  *  001000               x1110000101
9768  *     rt -----
9769  *          rs -----
9770  *               rd -----
9771  */
9772 std::string NMD::MAXA_S(uint64 instruction)
9773 {
9774     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
9775     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
9776     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
9777
9778     std::string fd = FPR(copy(fd_value));
9779     std::string fs = FPR(copy(fs_value));
9780     std::string ft = FPR(copy(ft_value));
9781
9782     return img::format("MAXA.S %s, %s, %s", fd, fs, ft);
9783 }
9784
9785
9786 /*
9787  *
9788  *
9789  *   3         2         1
9790  *  10987654321098765432109876543210
9791  *  001000               x1110000101
9792  *     rt -----
9793  *          rs -----
9794  *               rd -----
9795  */
9796 std::string NMD::MFC0(uint64 instruction)
9797 {
9798     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
9799     uint64 c0s_value = extract_c0s_20_19_18_17_16(instruction);
9800     uint64 sel_value = extract_sel_15_14_13_12_11(instruction);
9801
9802     std::string rt = GPR(copy(rt_value));
9803     std::string c0s = CPR(copy(c0s_value));
9804     std::string sel = IMMEDIATE(copy(sel_value));
9805
9806     return img::format("MFC0 %s, %s, %s", rt, c0s, sel);
9807 }
9808
9809
9810 /*
9811  *
9812  *
9813  *   3         2         1
9814  *  10987654321098765432109876543210
9815  *  001000               x1110000101
9816  *     rt -----
9817  *          rs -----
9818  *               rd -----
9819  */
9820 std::string NMD::MFC1(uint64 instruction)
9821 {
9822     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
9823     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
9824
9825     std::string rt = GPR(copy(rt_value));
9826     std::string fs = FPR(copy(fs_value));
9827
9828     return img::format("MFC1 %s, %s", rt, fs);
9829 }
9830
9831
9832 /*
9833  *
9834  *
9835  *   3         2         1
9836  *  10987654321098765432109876543210
9837  *  001000               x1110000101
9838  *     rt -----
9839  *          rs -----
9840  *               rd -----
9841  */
9842 std::string NMD::MFC2(uint64 instruction)
9843 {
9844     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
9845     uint64 cs_value = extract_cs_20_19_18_17_16(instruction);
9846
9847     std::string rt = GPR(copy(rt_value));
9848     std::string cs = CPR(copy(cs_value));
9849
9850     return img::format("MFC2 %s, %s", rt, cs);
9851 }
9852
9853
9854 /*
9855  *
9856  *
9857  *   3         2         1
9858  *  10987654321098765432109876543210
9859  *  001000               x1110000101
9860  *     rt -----
9861  *          rs -----
9862  *               rd -----
9863  */
9864 std::string NMD::MFGC0(uint64 instruction)
9865 {
9866     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
9867     uint64 c0s_value = extract_c0s_20_19_18_17_16(instruction);
9868     uint64 sel_value = extract_sel_15_14_13_12_11(instruction);
9869
9870     std::string rt = GPR(copy(rt_value));
9871     std::string c0s = CPR(copy(c0s_value));
9872     std::string sel = IMMEDIATE(copy(sel_value));
9873
9874     return img::format("MFGC0 %s, %s, %s", rt, c0s, sel);
9875 }
9876
9877
9878 /*
9879  *
9880  *
9881  *   3         2         1
9882  *  10987654321098765432109876543210
9883  *  001000               x1110000101
9884  *     rt -----
9885  *          rs -----
9886  *               rd -----
9887  */
9888 std::string NMD::MFHC0(uint64 instruction)
9889 {
9890     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
9891     uint64 c0s_value = extract_c0s_20_19_18_17_16(instruction);
9892     uint64 sel_value = extract_sel_15_14_13_12_11(instruction);
9893
9894     std::string rt = GPR(copy(rt_value));
9895     std::string c0s = CPR(copy(c0s_value));
9896     std::string sel = IMMEDIATE(copy(sel_value));
9897
9898     return img::format("MFHC0 %s, %s, %s", rt, c0s, sel);
9899 }
9900
9901
9902 /*
9903  *
9904  *
9905  *   3         2         1
9906  *  10987654321098765432109876543210
9907  *  001000               x1110000101
9908  *     rt -----
9909  *          rs -----
9910  *               rd -----
9911  */
9912 std::string NMD::MFHC1(uint64 instruction)
9913 {
9914     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
9915     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
9916
9917     std::string rt = GPR(copy(rt_value));
9918     std::string fs = FPR(copy(fs_value));
9919
9920     return img::format("MFHC1 %s, %s", rt, fs);
9921 }
9922
9923
9924 /*
9925  *
9926  *
9927  *   3         2         1
9928  *  10987654321098765432109876543210
9929  *  001000               x1110000101
9930  *     rt -----
9931  *          rs -----
9932  *               rd -----
9933  */
9934 std::string NMD::MFHC2(uint64 instruction)
9935 {
9936     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
9937     uint64 cs_value = extract_cs_20_19_18_17_16(instruction);
9938
9939     std::string rt = GPR(copy(rt_value));
9940     std::string cs = CPR(copy(cs_value));
9941
9942     return img::format("MFHC2 %s, %s", rt, cs);
9943 }
9944
9945
9946 /*
9947  *
9948  *
9949  *   3         2         1
9950  *  10987654321098765432109876543210
9951  *  001000               x1110000101
9952  *     rt -----
9953  *          rs -----
9954  *               rd -----
9955  */
9956 std::string NMD::MFHGC0(uint64 instruction)
9957 {
9958     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
9959     uint64 c0s_value = extract_c0s_20_19_18_17_16(instruction);
9960     uint64 sel_value = extract_sel_15_14_13_12_11(instruction);
9961
9962     std::string rt = GPR(copy(rt_value));
9963     std::string c0s = CPR(copy(c0s_value));
9964     std::string sel = IMMEDIATE(copy(sel_value));
9965
9966     return img::format("MFHGC0 %s, %s, %s", rt, c0s, sel);
9967 }
9968
9969
9970 /*
9971  *
9972  *
9973  *   3         2         1
9974  *  10987654321098765432109876543210
9975  *  001000               x1110000101
9976  *     rt -----
9977  *          rs -----
9978  *               rd -----
9979  */
9980 std::string NMD::MFHI_DSP_(uint64 instruction)
9981 {
9982     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
9983     uint64 ac_value = extract_ac_13_12(instruction);
9984
9985     std::string rt = GPR(copy(rt_value));
9986     std::string ac = AC(copy(ac_value));
9987
9988     return img::format("MFHI %s, %s", rt, ac);
9989 }
9990
9991
9992 /*
9993  *
9994  *
9995  *   3         2         1
9996  *  10987654321098765432109876543210
9997  *  001000               x1110000101
9998  *     rt -----
9999  *          rs -----
10000  *               rd -----
10001  */
10002 std::string NMD::MFHTR(uint64 instruction)
10003 {
10004     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
10005     uint64 c0s_value = extract_c0s_20_19_18_17_16(instruction);
10006     uint64 sel_value = extract_sel_15_14_13_12_11(instruction);
10007     uint64 u_value = extract_u_10(instruction);
10008
10009     std::string rt = GPR(copy(rt_value));
10010     std::string c0s = IMMEDIATE(copy(c0s_value));
10011     std::string u = IMMEDIATE(copy(u_value));
10012     std::string sel = IMMEDIATE(copy(sel_value));
10013
10014     return img::format("MFHTR %s, %s, %s, %s", rt, c0s, u, sel);
10015 }
10016
10017
10018 /*
10019  *
10020  *
10021  *   3         2         1
10022  *  10987654321098765432109876543210
10023  *  001000               x1110000101
10024  *     rt -----
10025  *          rs -----
10026  *               rd -----
10027  */
10028 std::string NMD::MFLO_DSP_(uint64 instruction)
10029 {
10030     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
10031     uint64 ac_value = extract_ac_13_12(instruction);
10032
10033     std::string rt = GPR(copy(rt_value));
10034     std::string ac = AC(copy(ac_value));
10035
10036     return img::format("MFLO %s, %s", rt, ac);
10037 }
10038
10039
10040 /*
10041  *
10042  *
10043  *   3         2         1
10044  *  10987654321098765432109876543210
10045  *  001000               x1110000101
10046  *     rt -----
10047  *          rs -----
10048  *               rd -----
10049  */
10050 std::string NMD::MFTR(uint64 instruction)
10051 {
10052     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
10053     uint64 c0s_value = extract_c0s_20_19_18_17_16(instruction);
10054     uint64 sel_value = extract_sel_15_14_13_12_11(instruction);
10055     uint64 u_value = extract_u_10(instruction);
10056
10057     std::string rt = GPR(copy(rt_value));
10058     std::string c0s = IMMEDIATE(copy(c0s_value));
10059     std::string u = IMMEDIATE(copy(u_value));
10060     std::string sel = IMMEDIATE(copy(sel_value));
10061
10062     return img::format("MFTR %s, %s, %s, %s", rt, c0s, u, sel);
10063 }
10064
10065
10066 /*
10067  *
10068  *
10069  *   3         2         1
10070  *  10987654321098765432109876543210
10071  *  001000               x1110000101
10072  *     rt -----
10073  *          rs -----
10074  *               rd -----
10075  */
10076 std::string NMD::MIN_D(uint64 instruction)
10077 {
10078     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
10079     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
10080     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
10081
10082     std::string fd = FPR(copy(fd_value));
10083     std::string fs = FPR(copy(fs_value));
10084     std::string ft = FPR(copy(ft_value));
10085
10086     return img::format("MIN.D %s, %s, %s", fd, fs, ft);
10087 }
10088
10089
10090 /*
10091  *
10092  *
10093  *   3         2         1
10094  *  10987654321098765432109876543210
10095  *  001000               x1110000101
10096  *     rt -----
10097  *          rs -----
10098  *               rd -----
10099  */
10100 std::string NMD::MIN_S(uint64 instruction)
10101 {
10102     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
10103     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
10104     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
10105
10106     std::string fd = FPR(copy(fd_value));
10107     std::string fs = FPR(copy(fs_value));
10108     std::string ft = FPR(copy(ft_value));
10109
10110     return img::format("MIN.S %s, %s, %s", fd, fs, ft);
10111 }
10112
10113
10114 /*
10115  *
10116  *
10117  *   3         2         1
10118  *  10987654321098765432109876543210
10119  *  001000               x1110000101
10120  *     rt -----
10121  *          rs -----
10122  *               rd -----
10123  */
10124 std::string NMD::MINA_D(uint64 instruction)
10125 {
10126     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
10127     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
10128     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
10129
10130     std::string fd = FPR(copy(fd_value));
10131     std::string fs = FPR(copy(fs_value));
10132     std::string ft = FPR(copy(ft_value));
10133
10134     return img::format("MINA.D %s, %s, %s", fd, fs, ft);
10135 }
10136
10137
10138 /*
10139  *
10140  *
10141  *   3         2         1
10142  *  10987654321098765432109876543210
10143  *  001000               x1110000101
10144  *     rt -----
10145  *          rs -----
10146  *               rd -----
10147  */
10148 std::string NMD::MINA_S(uint64 instruction)
10149 {
10150     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
10151     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
10152     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
10153
10154     std::string fd = FPR(copy(fd_value));
10155     std::string fs = FPR(copy(fs_value));
10156     std::string ft = FPR(copy(ft_value));
10157
10158     return img::format("MINA.S %s, %s, %s", fd, fs, ft);
10159 }
10160
10161
10162 /*
10163  *
10164  *
10165  *   3         2         1
10166  *  10987654321098765432109876543210
10167  *  001000               x1110000101
10168  *     rt -----
10169  *          rs -----
10170  *               rd -----
10171  */
10172 std::string NMD::MOD(uint64 instruction)
10173 {
10174     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
10175     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
10176     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
10177
10178     std::string rd = GPR(copy(rd_value));
10179     std::string rs = GPR(copy(rs_value));
10180     std::string rt = GPR(copy(rt_value));
10181
10182     return img::format("MOD %s, %s, %s", rd, rs, rt);
10183 }
10184
10185
10186 /*
10187  *
10188  *
10189  *   3         2         1
10190  *  10987654321098765432109876543210
10191  *  001000               x1110000101
10192  *     rt -----
10193  *          rs -----
10194  *               rd -----
10195  */
10196 std::string NMD::MODSUB(uint64 instruction)
10197 {
10198     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
10199     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
10200     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
10201
10202     std::string rd = GPR(copy(rd_value));
10203     std::string rs = GPR(copy(rs_value));
10204     std::string rt = GPR(copy(rt_value));
10205
10206     return img::format("MODSUB %s, %s, %s", rd, rs, rt);
10207 }
10208
10209
10210 /*
10211  *
10212  *
10213  *   3         2         1
10214  *  10987654321098765432109876543210
10215  *  001000               x1110000101
10216  *     rt -----
10217  *          rs -----
10218  *               rd -----
10219  */
10220 std::string NMD::MODU(uint64 instruction)
10221 {
10222     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
10223     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
10224     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
10225
10226     std::string rd = GPR(copy(rd_value));
10227     std::string rs = GPR(copy(rs_value));
10228     std::string rt = GPR(copy(rt_value));
10229
10230     return img::format("MODU %s, %s, %s", rd, rs, rt);
10231 }
10232
10233
10234 /*
10235  *
10236  *
10237  *   3         2         1
10238  *  10987654321098765432109876543210
10239  *  001000               x1110000101
10240  *     rt -----
10241  *          rs -----
10242  *               rd -----
10243  */
10244 std::string NMD::MOV_D(uint64 instruction)
10245 {
10246     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
10247     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
10248
10249     std::string ft = FPR(copy(ft_value));
10250     std::string fs = FPR(copy(fs_value));
10251
10252     return img::format("MOV.D %s, %s", ft, fs);
10253 }
10254
10255
10256 /*
10257  *
10258  *
10259  *   3         2         1
10260  *  10987654321098765432109876543210
10261  *  001000               x1110000101
10262  *     rt -----
10263  *          rs -----
10264  *               rd -----
10265  */
10266 std::string NMD::MOV_S(uint64 instruction)
10267 {
10268     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
10269     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
10270
10271     std::string ft = FPR(copy(ft_value));
10272     std::string fs = FPR(copy(fs_value));
10273
10274     return img::format("MOV.S %s, %s", ft, fs);
10275 }
10276
10277
10278 /*
10279  *
10280  *
10281  *   3         2         1
10282  *  10987654321098765432109876543210
10283  *  001000               x1110000101
10284  *     rt -----
10285  *          rs -----
10286  *               rd -----
10287  */
10288 std::string NMD::MOVE_BALC(uint64 instruction)
10289 {
10290     uint64 rtz4_value = extract_rtz4_27_26_25_23_22_21(instruction);
10291     uint64 rd1_value = extract_rdl_25_24(instruction);
10292     int64 s_value = extract_s__se21_0_20_to_1_s1(instruction);
10293
10294     std::string rd1 = GPR(encode_rd1_from_rd(rd1_value));
10295     std::string rtz4 = GPR(encode_gpr4_zero(rtz4_value));
10296     std::string s = ADDRESS(encode_s_from_address(s_value), 4);
10297
10298     return img::format("MOVE.BALC %s, %s, %s", rd1, rtz4, s);
10299 }
10300
10301
10302 /*
10303  *
10304  *
10305  *   3         2         1
10306  *  10987654321098765432109876543210
10307  *  001000               x1110000101
10308  *     rt -----
10309  *          rs -----
10310  *               rd -----
10311  */
10312 std::string NMD::MOVEP(uint64 instruction)
10313 {
10314     uint64 rtz4_value = extract_rtz4_9_7_6_5(instruction);
10315     uint64 rd2_value = extract_rd2_3_8(instruction);
10316     uint64 rsz4_value = extract_rsz4_4_2_1_0(instruction);
10317
10318     std::string rd2 = GPR(encode_rd2_reg1(rd2_value));
10319     std::string re2 = GPR(encode_rd2_reg2(rd2_value));
10320     /* !!!!!!!!!! - no conversion function */
10321     std::string rsz4 = GPR(encode_gpr4_zero(rsz4_value));
10322     std::string rtz4 = GPR(encode_gpr4_zero(rtz4_value));
10323
10324     return img::format("MOVEP %s, %s, %s, %s", rd2, re2, rsz4, rtz4);
10325     /* hand edited */
10326 }
10327
10328
10329 /*
10330  *
10331  *
10332  *   3         2         1
10333  *  10987654321098765432109876543210
10334  *  001000               x1110000101
10335  *     rt -----
10336  *          rs -----
10337  *               rd -----
10338  */
10339 std::string NMD::MOVEP_REV_(uint64 instruction)
10340 {
10341     uint64 rt4_value = extract_rt4_9_7_6_5(instruction);
10342     uint64 rd2_value = extract_rd2_3_8(instruction);
10343     uint64 rs4_value = extract_rs4_4_2_1_0(instruction);
10344
10345     std::string rs4 = GPR(encode_gpr4(rs4_value));
10346     std::string rt4 = GPR(encode_gpr4(rt4_value));
10347     std::string rd2 = GPR(encode_rd2_reg1(rd2_value));
10348     std::string rs2 = GPR(encode_rd2_reg2(rd2_value));
10349     /* !!!!!!!!!! - no conversion function */
10350
10351     return img::format("MOVEP %s, %s, %s, %s", rs4, rt4, rd2, rs2);
10352     /* hand edited */
10353 }
10354
10355
10356 /*
10357  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
10358  *
10359  *   3         2         1
10360  *  10987654321098765432109876543210
10361  *  001000               00010001101
10362  *     rt -----
10363  *          rs -----
10364  *               rd -----
10365  */
10366 std::string NMD::MOVE(uint64 instruction)
10367 {
10368     uint64 rt_value = extract_rt_9_8_7_6_5(instruction);
10369     uint64 rs_value = extract_rs_4_3_2_1_0(instruction);
10370
10371     std::string rt = GPR(copy(rt_value));
10372     std::string rs = GPR(copy(rs_value));
10373
10374     return img::format("MOVE %s, %s", rt, rs);
10375 }
10376
10377
10378 /*
10379  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
10380  *
10381  *   3         2         1
10382  *  10987654321098765432109876543210
10383  *  001000               00010001101
10384  *     rt -----
10385  *          rs -----
10386  *               rd -----
10387  */
10388 std::string NMD::MOVN(uint64 instruction)
10389 {
10390     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
10391     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
10392     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
10393
10394     std::string rd = GPR(copy(rd_value));
10395     std::string rs = GPR(copy(rs_value));
10396     std::string rt = GPR(copy(rt_value));
10397
10398     return img::format("MOVN %s, %s, %s", rd, rs, rt);
10399 }
10400
10401
10402 /*
10403  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
10404  *
10405  *   3         2         1
10406  *  10987654321098765432109876543210
10407  *  001000               00010001101
10408  *     rt -----
10409  *          rs -----
10410  *               rd -----
10411  */
10412 std::string NMD::MOVZ(uint64 instruction)
10413 {
10414     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
10415     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
10416     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
10417
10418     std::string rd = GPR(copy(rd_value));
10419     std::string rs = GPR(copy(rs_value));
10420     std::string rt = GPR(copy(rt_value));
10421
10422     return img::format("MOVZ %s, %s, %s", rd, rs, rt);
10423 }
10424
10425
10426 /*
10427  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
10428  *
10429  *   3         2         1
10430  *  10987654321098765432109876543210
10431  *  001000               00010001101
10432  *     rt -----
10433  *          rs -----
10434  *               rd -----
10435  */
10436 std::string NMD::MSUB_DSP_(uint64 instruction)
10437 {
10438     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
10439     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
10440     uint64 ac_value = extract_ac_13_12(instruction);
10441
10442     std::string ac = AC(copy(ac_value));
10443     std::string rs = GPR(copy(rs_value));
10444     std::string rt = GPR(copy(rt_value));
10445
10446     return img::format("MSUB %s, %s, %s", ac, rs, rt);
10447 }
10448
10449
10450 /*
10451  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
10452  *
10453  *   3         2         1
10454  *  10987654321098765432109876543210
10455  *  001000               00010001101
10456  *     rt -----
10457  *          rs -----
10458  *               rd -----
10459  */
10460 std::string NMD::MSUBF_D(uint64 instruction)
10461 {
10462     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
10463     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
10464     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
10465
10466     std::string fd = FPR(copy(fd_value));
10467     std::string fs = FPR(copy(fs_value));
10468     std::string ft = FPR(copy(ft_value));
10469
10470     return img::format("MSUBF.D %s, %s, %s", fd, fs, ft);
10471 }
10472
10473
10474 /*
10475  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
10476  *
10477  *   3         2         1
10478  *  10987654321098765432109876543210
10479  *  001000               00010001101
10480  *     rt -----
10481  *          rs -----
10482  *               rd -----
10483  */
10484 std::string NMD::MSUBF_S(uint64 instruction)
10485 {
10486     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
10487     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
10488     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
10489
10490     std::string fd = FPR(copy(fd_value));
10491     std::string fs = FPR(copy(fs_value));
10492     std::string ft = FPR(copy(ft_value));
10493
10494     return img::format("MSUBF.S %s, %s, %s", fd, fs, ft);
10495 }
10496
10497
10498 /*
10499  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
10500  *
10501  *   3         2         1
10502  *  10987654321098765432109876543210
10503  *  001000               00010001101
10504  *     rt -----
10505  *          rs -----
10506  *               rd -----
10507  */
10508 std::string NMD::MSUBU_DSP_(uint64 instruction)
10509 {
10510     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
10511     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
10512     uint64 ac_value = extract_ac_13_12(instruction);
10513
10514     std::string ac = AC(copy(ac_value));
10515     std::string rs = GPR(copy(rs_value));
10516     std::string rt = GPR(copy(rt_value));
10517
10518     return img::format("MSUBU %s, %s, %s", ac, rs, rt);
10519 }
10520
10521
10522 /*
10523  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
10524  *
10525  *   3         2         1
10526  *  10987654321098765432109876543210
10527  *  001000               00010001101
10528  *     rt -----
10529  *          rs -----
10530  *               rd -----
10531  */
10532 std::string NMD::MTC0(uint64 instruction)
10533 {
10534     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
10535     uint64 c0s_value = extract_c0s_20_19_18_17_16(instruction);
10536     uint64 sel_value = extract_sel_15_14_13_12_11(instruction);
10537
10538     std::string rt = GPR(copy(rt_value));
10539     std::string c0s = CPR(copy(c0s_value));
10540     std::string sel = IMMEDIATE(copy(sel_value));
10541
10542     return img::format("MTC0 %s, %s, %s", rt, c0s, sel);
10543 }
10544
10545
10546 /*
10547  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
10548  *
10549  *   3         2         1
10550  *  10987654321098765432109876543210
10551  *  001000               00010001101
10552  *     rt -----
10553  *          rs -----
10554  *               rd -----
10555  */
10556 std::string NMD::MTC1(uint64 instruction)
10557 {
10558     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
10559     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
10560
10561     std::string rt = GPR(copy(rt_value));
10562     std::string fs = FPR(copy(fs_value));
10563
10564     return img::format("MTC1 %s, %s", rt, fs);
10565 }
10566
10567
10568 /*
10569  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
10570  *
10571  *   3         2         1
10572  *  10987654321098765432109876543210
10573  *  001000               00010001101
10574  *     rt -----
10575  *          rs -----
10576  *               rd -----
10577  */
10578 std::string NMD::MTC2(uint64 instruction)
10579 {
10580     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
10581     uint64 cs_value = extract_cs_20_19_18_17_16(instruction);
10582
10583     std::string rt = GPR(copy(rt_value));
10584     std::string cs = CPR(copy(cs_value));
10585
10586     return img::format("MTC2 %s, %s", rt, cs);
10587 }
10588
10589
10590 /*
10591  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
10592  *
10593  *   3         2         1
10594  *  10987654321098765432109876543210
10595  *  001000               00010001101
10596  *     rt -----
10597  *          rs -----
10598  *               rd -----
10599  */
10600 std::string NMD::MTGC0(uint64 instruction)
10601 {
10602     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
10603     uint64 c0s_value = extract_c0s_20_19_18_17_16(instruction);
10604     uint64 sel_value = extract_sel_15_14_13_12_11(instruction);
10605
10606     std::string rt = GPR(copy(rt_value));
10607     std::string c0s = CPR(copy(c0s_value));
10608     std::string sel = IMMEDIATE(copy(sel_value));
10609
10610     return img::format("MTGC0 %s, %s, %s", rt, c0s, sel);
10611 }
10612
10613
10614 /*
10615  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
10616  *
10617  *   3         2         1
10618  *  10987654321098765432109876543210
10619  *  001000               00010001101
10620  *     rt -----
10621  *          rs -----
10622  *               rd -----
10623  */
10624 std::string NMD::MTHC0(uint64 instruction)
10625 {
10626     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
10627     uint64 c0s_value = extract_c0s_20_19_18_17_16(instruction);
10628     uint64 sel_value = extract_sel_15_14_13_12_11(instruction);
10629
10630     std::string rt = GPR(copy(rt_value));
10631     std::string c0s = CPR(copy(c0s_value));
10632     std::string sel = IMMEDIATE(copy(sel_value));
10633
10634     return img::format("MTHC0 %s, %s, %s", rt, c0s, sel);
10635 }
10636
10637
10638 /*
10639  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
10640  *
10641  *   3         2         1
10642  *  10987654321098765432109876543210
10643  *  001000               00010001101
10644  *     rt -----
10645  *          rs -----
10646  *               rd -----
10647  */
10648 std::string NMD::MTHC1(uint64 instruction)
10649 {
10650     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
10651     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
10652
10653     std::string rt = GPR(copy(rt_value));
10654     std::string fs = FPR(copy(fs_value));
10655
10656     return img::format("MTHC1 %s, %s", rt, fs);
10657 }
10658
10659
10660 /*
10661  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
10662  *
10663  *   3         2         1
10664  *  10987654321098765432109876543210
10665  *  001000               00010001101
10666  *     rt -----
10667  *          rs -----
10668  *               rd -----
10669  */
10670 std::string NMD::MTHC2(uint64 instruction)
10671 {
10672     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
10673     uint64 cs_value = extract_cs_20_19_18_17_16(instruction);
10674
10675     std::string rt = GPR(copy(rt_value));
10676     std::string cs = CPR(copy(cs_value));
10677
10678     return img::format("MTHC2 %s, %s", rt, cs);
10679 }
10680
10681
10682 /*
10683  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
10684  *
10685  *   3         2         1
10686  *  10987654321098765432109876543210
10687  *  001000               00010001101
10688  *     rt -----
10689  *          rs -----
10690  *               rd -----
10691  */
10692 std::string NMD::MTHGC0(uint64 instruction)
10693 {
10694     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
10695     uint64 c0s_value = extract_c0s_20_19_18_17_16(instruction);
10696     uint64 sel_value = extract_sel_15_14_13_12_11(instruction);
10697
10698     std::string rt = GPR(copy(rt_value));
10699     std::string c0s = CPR(copy(c0s_value));
10700     std::string sel = IMMEDIATE(copy(sel_value));
10701
10702     return img::format("MTHGC0 %s, %s, %s", rt, c0s, sel);
10703 }
10704
10705
10706 /*
10707  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
10708  *
10709  *   3         2         1
10710  *  10987654321098765432109876543210
10711  *  001000               00010001101
10712  *     rt -----
10713  *          rs -----
10714  *               rd -----
10715  */
10716 std::string NMD::MTHI_DSP_(uint64 instruction)
10717 {
10718     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
10719     uint64 ac_value = extract_ac_13_12(instruction);
10720
10721     std::string rs = GPR(copy(rs_value));
10722     std::string ac = AC(copy(ac_value));
10723
10724     return img::format("MTHI %s, %s", rs, ac);
10725 }
10726
10727
10728 /*
10729  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
10730  *
10731  *   3         2         1
10732  *  10987654321098765432109876543210
10733  *  001000               00010001101
10734  *     rt -----
10735  *          rs -----
10736  *               rd -----
10737  */
10738 std::string NMD::MTHLIP(uint64 instruction)
10739 {
10740     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
10741     uint64 ac_value = extract_ac_13_12(instruction);
10742
10743     std::string rs = GPR(copy(rs_value));
10744     std::string ac = AC(copy(ac_value));
10745
10746     return img::format("MTHLIP %s, %s", rs, ac);
10747 }
10748
10749
10750 /*
10751  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
10752  *
10753  *   3         2         1
10754  *  10987654321098765432109876543210
10755  *  001000               00010001101
10756  *     rt -----
10757  *          rs -----
10758  *               rd -----
10759  */
10760 std::string NMD::MTHTR(uint64 instruction)
10761 {
10762     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
10763     uint64 c0s_value = extract_c0s_20_19_18_17_16(instruction);
10764     uint64 sel_value = extract_sel_15_14_13_12_11(instruction);
10765     uint64 u_value = extract_u_10(instruction);
10766
10767     std::string rt = GPR(copy(rt_value));
10768     std::string c0s = IMMEDIATE(copy(c0s_value));
10769     std::string u = IMMEDIATE(copy(u_value));
10770     std::string sel = IMMEDIATE(copy(sel_value));
10771
10772     return img::format("MTHTR %s, %s, %s, %s", rt, c0s, u, sel);
10773 }
10774
10775
10776 /*
10777  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
10778  *
10779  *   3         2         1
10780  *  10987654321098765432109876543210
10781  *  001000               00010001101
10782  *     rt -----
10783  *          rs -----
10784  *               rd -----
10785  */
10786 std::string NMD::MTLO_DSP_(uint64 instruction)
10787 {
10788     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
10789     uint64 ac_value = extract_ac_13_12(instruction);
10790
10791     std::string rs = GPR(copy(rs_value));
10792     std::string ac = AC(copy(ac_value));
10793
10794     return img::format("MTLO %s, %s", rs, ac);
10795 }
10796
10797
10798 /*
10799  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
10800  *
10801  *   3         2         1
10802  *  10987654321098765432109876543210
10803  *  001000               00010001101
10804  *     rt -----
10805  *          rs -----
10806  *               rd -----
10807  */
10808 std::string NMD::MTTR(uint64 instruction)
10809 {
10810     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
10811     uint64 c0s_value = extract_c0s_20_19_18_17_16(instruction);
10812     uint64 sel_value = extract_sel_15_14_13_12_11(instruction);
10813     uint64 u_value = extract_u_10(instruction);
10814
10815     std::string rt = GPR(copy(rt_value));
10816     std::string c0s = IMMEDIATE(copy(c0s_value));
10817     std::string u = IMMEDIATE(copy(u_value));
10818     std::string sel = IMMEDIATE(copy(sel_value));
10819
10820     return img::format("MTTR %s, %s, %s, %s", rt, c0s, u, sel);
10821 }
10822
10823
10824 /*
10825  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
10826  *
10827  *   3         2         1
10828  *  10987654321098765432109876543210
10829  *  001000               00010001101
10830  *     rt -----
10831  *          rs -----
10832  *               rd -----
10833  */
10834 std::string NMD::MUH(uint64 instruction)
10835 {
10836     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
10837     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
10838     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
10839
10840     std::string rd = GPR(copy(rd_value));
10841     std::string rs = GPR(copy(rs_value));
10842     std::string rt = GPR(copy(rt_value));
10843
10844     return img::format("MUH %s, %s, %s", rd, rs, rt);
10845 }
10846
10847
10848 /*
10849  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
10850  *
10851  *   3         2         1
10852  *  10987654321098765432109876543210
10853  *  001000               00010001101
10854  *     rt -----
10855  *          rs -----
10856  *               rd -----
10857  */
10858 std::string NMD::MUHU(uint64 instruction)
10859 {
10860     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
10861     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
10862     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
10863
10864     std::string rd = GPR(copy(rd_value));
10865     std::string rs = GPR(copy(rs_value));
10866     std::string rt = GPR(copy(rt_value));
10867
10868     return img::format("MUHU %s, %s, %s", rd, rs, rt);
10869 }
10870
10871
10872 /*
10873  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
10874  *
10875  *   3         2         1
10876  *  10987654321098765432109876543210
10877  *  001000               00010001101
10878  *     rt -----
10879  *          rs -----
10880  *               rd -----
10881  */
10882 std::string NMD::MUL_32_(uint64 instruction)
10883 {
10884     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
10885     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
10886     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
10887
10888     std::string rd = GPR(copy(rd_value));
10889     std::string rs = GPR(copy(rs_value));
10890     std::string rt = GPR(copy(rt_value));
10891
10892     return img::format("MUL %s, %s, %s", rd, rs, rt);
10893 }
10894
10895
10896 /*
10897  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
10898  *
10899  *   3         2         1
10900  *  10987654321098765432109876543210
10901  *  001000               00010001101
10902  *     rt -----
10903  *          rs -----
10904  *               rd -----
10905  */
10906 std::string NMD::MUL_4X4_(uint64 instruction)
10907 {
10908     uint64 rt4_value = extract_rt4_9_7_6_5(instruction);
10909     uint64 rs4_value = extract_rs4_4_2_1_0(instruction);
10910
10911     std::string rs4 = GPR(encode_gpr4(rs4_value));
10912     std::string rt4 = GPR(encode_gpr4(rt4_value));
10913
10914     return img::format("MUL %s, %s", rs4, rt4);
10915 }
10916
10917
10918 /*
10919  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
10920  *
10921  *   3         2         1
10922  *  10987654321098765432109876543210
10923  *  001000               00010001101
10924  *     rt -----
10925  *          rs -----
10926  *               rd -----
10927  */
10928 std::string NMD::MUL_D(uint64 instruction)
10929 {
10930     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
10931     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
10932     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
10933
10934     std::string fd = FPR(copy(fd_value));
10935     std::string fs = FPR(copy(fs_value));
10936     std::string ft = FPR(copy(ft_value));
10937
10938     return img::format("MUL.D %s, %s, %s", fd, fs, ft);
10939 }
10940
10941
10942 /*
10943  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
10944  *
10945  *   3         2         1
10946  *  10987654321098765432109876543210
10947  *  001000               00010001101
10948  *     rt -----
10949  *          rs -----
10950  *               rd -----
10951  */
10952 std::string NMD::MUL_PH(uint64 instruction)
10953 {
10954     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
10955     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
10956     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
10957
10958     std::string rd = GPR(copy(rd_value));
10959     std::string rs = GPR(copy(rs_value));
10960     std::string rt = GPR(copy(rt_value));
10961
10962     return img::format("MUL.PH %s, %s, %s", rd, rs, rt);
10963 }
10964
10965
10966 /*
10967  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
10968  *
10969  *   3         2         1
10970  *  10987654321098765432109876543210
10971  *  001000               00010001101
10972  *     rt -----
10973  *          rs -----
10974  *               rd -----
10975  */
10976 std::string NMD::MUL_S_PH(uint64 instruction)
10977 {
10978     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
10979     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
10980     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
10981
10982     std::string rd = GPR(copy(rd_value));
10983     std::string rs = GPR(copy(rs_value));
10984     std::string rt = GPR(copy(rt_value));
10985
10986     return img::format("MUL_S.PH %s, %s, %s", rd, rs, rt);
10987 }
10988
10989
10990 /*
10991  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
10992  *
10993  *   3         2         1
10994  *  10987654321098765432109876543210
10995  *  001000               00010001101
10996  *     rt -----
10997  *          rs -----
10998  *               rd -----
10999  */
11000 std::string NMD::MUL_S(uint64 instruction)
11001 {
11002     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
11003     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
11004     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
11005
11006     std::string fd = FPR(copy(fd_value));
11007     std::string fs = FPR(copy(fs_value));
11008     std::string ft = FPR(copy(ft_value));
11009
11010     return img::format("MUL.S %s, %s, %s", fd, fs, ft);
11011 }
11012
11013
11014 /*
11015  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
11016  *
11017  *   3         2         1
11018  *  10987654321098765432109876543210
11019  *  001000               00010001101
11020  *     rt -----
11021  *          rs -----
11022  *               rd -----
11023  */
11024 std::string NMD::MULEQ_S_W_PHL(uint64 instruction)
11025 {
11026     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
11027     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
11028     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
11029
11030     std::string rd = GPR(copy(rd_value));
11031     std::string rs = GPR(copy(rs_value));
11032     std::string rt = GPR(copy(rt_value));
11033
11034     return img::format("MULEQ_S.W.PHL %s, %s, %s", rd, rs, rt);
11035 }
11036
11037
11038 /*
11039  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
11040  *
11041  *   3         2         1
11042  *  10987654321098765432109876543210
11043  *  001000               00010001101
11044  *     rt -----
11045  *          rs -----
11046  *               rd -----
11047  */
11048 std::string NMD::MULEQ_S_W_PHR(uint64 instruction)
11049 {
11050     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
11051     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
11052     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
11053
11054     std::string rd = GPR(copy(rd_value));
11055     std::string rs = GPR(copy(rs_value));
11056     std::string rt = GPR(copy(rt_value));
11057
11058     return img::format("MULEQ_S.W.PHR %s, %s, %s", rd, rs, rt);
11059 }
11060
11061
11062 /*
11063  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
11064  *
11065  *   3         2         1
11066  *  10987654321098765432109876543210
11067  *  001000               00010001101
11068  *     rt -----
11069  *          rs -----
11070  *               rd -----
11071  */
11072 std::string NMD::MULEU_S_PH_QBL(uint64 instruction)
11073 {
11074     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
11075     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
11076     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
11077
11078     std::string rd = GPR(copy(rd_value));
11079     std::string rs = GPR(copy(rs_value));
11080     std::string rt = GPR(copy(rt_value));
11081
11082     return img::format("MULEU_S.PH.QBL %s, %s, %s", rd, rs, rt);
11083 }
11084
11085
11086 /*
11087  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
11088  *
11089  *   3         2         1
11090  *  10987654321098765432109876543210
11091  *  001000               00010001101
11092  *     rt -----
11093  *          rs -----
11094  *               rd -----
11095  */
11096 std::string NMD::MULEU_S_PH_QBR(uint64 instruction)
11097 {
11098     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
11099     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
11100     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
11101
11102     std::string rd = GPR(copy(rd_value));
11103     std::string rs = GPR(copy(rs_value));
11104     std::string rt = GPR(copy(rt_value));
11105
11106     return img::format("MULEU_S.PH.QBR %s, %s, %s", rd, rs, rt);
11107 }
11108
11109
11110 /*
11111  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
11112  *
11113  *   3         2         1
11114  *  10987654321098765432109876543210
11115  *  001000               00010001101
11116  *     rt -----
11117  *          rs -----
11118  *               rd -----
11119  */
11120 std::string NMD::MULQ_RS_PH(uint64 instruction)
11121 {
11122     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
11123     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
11124     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
11125
11126     std::string rd = GPR(copy(rd_value));
11127     std::string rs = GPR(copy(rs_value));
11128     std::string rt = GPR(copy(rt_value));
11129
11130     return img::format("MULQ_RS.PH %s, %s, %s", rd, rs, rt);
11131 }
11132
11133
11134 /*
11135  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
11136  *
11137  *   3         2         1
11138  *  10987654321098765432109876543210
11139  *  001000               00010001101
11140  *     rt -----
11141  *          rs -----
11142  *               rd -----
11143  */
11144 std::string NMD::MULQ_RS_W(uint64 instruction)
11145 {
11146     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
11147     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
11148     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
11149
11150     std::string rd = GPR(copy(rd_value));
11151     std::string rs = GPR(copy(rs_value));
11152     std::string rt = GPR(copy(rt_value));
11153
11154     return img::format("MULQ_RS.W %s, %s, %s", rd, rs, rt);
11155 }
11156
11157
11158 /*
11159  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
11160  *
11161  *   3         2         1
11162  *  10987654321098765432109876543210
11163  *  001000               00010001101
11164  *     rt -----
11165  *          rs -----
11166  *               rd -----
11167  */
11168 std::string NMD::MULQ_S_PH(uint64 instruction)
11169 {
11170     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
11171     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
11172     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
11173
11174     std::string rd = GPR(copy(rd_value));
11175     std::string rs = GPR(copy(rs_value));
11176     std::string rt = GPR(copy(rt_value));
11177
11178     return img::format("MULQ_S.PH %s, %s, %s", rd, rs, rt);
11179 }
11180
11181
11182 /*
11183  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
11184  *
11185  *   3         2         1
11186  *  10987654321098765432109876543210
11187  *  001000               00010001101
11188  *     rt -----
11189  *          rs -----
11190  *               rd -----
11191  */
11192 std::string NMD::MULQ_S_W(uint64 instruction)
11193 {
11194     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
11195     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
11196     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
11197
11198     std::string rd = GPR(copy(rd_value));
11199     std::string rs = GPR(copy(rs_value));
11200     std::string rt = GPR(copy(rt_value));
11201
11202     return img::format("MULQ_S.W %s, %s, %s", rd, rs, rt);
11203 }
11204
11205
11206 /*
11207  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
11208  *
11209  *   3         2         1
11210  *  10987654321098765432109876543210
11211  *  001000               00010001101
11212  *     rt -----
11213  *          rs -----
11214  *               rd -----
11215  */
11216 std::string NMD::MULSA_W_PH(uint64 instruction)
11217 {
11218     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
11219     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
11220     uint64 ac_value = extract_ac_13_12(instruction);
11221
11222     std::string ac = AC(copy(ac_value));
11223     std::string rs = GPR(copy(rs_value));
11224     std::string rt = GPR(copy(rt_value));
11225
11226     return img::format("MULSA.W.PH %s, %s, %s", ac, rs, rt);
11227 }
11228
11229
11230 /*
11231  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
11232  *
11233  *   3         2         1
11234  *  10987654321098765432109876543210
11235  *  001000               00010001101
11236  *     rt -----
11237  *          rs -----
11238  *               rd -----
11239  */
11240 std::string NMD::MULSAQ_S_W_PH(uint64 instruction)
11241 {
11242     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
11243     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
11244     uint64 ac_value = extract_ac_13_12(instruction);
11245
11246     std::string ac = AC(copy(ac_value));
11247     std::string rs = GPR(copy(rs_value));
11248     std::string rt = GPR(copy(rt_value));
11249
11250     return img::format("MULSAQ_S.W.PH %s, %s, %s", ac, rs, rt);
11251 }
11252
11253
11254 /*
11255  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
11256  *
11257  *   3         2         1
11258  *  10987654321098765432109876543210
11259  *  001000               00010001101
11260  *     rt -----
11261  *          rs -----
11262  *               rd -----
11263  */
11264 std::string NMD::MULT_DSP_(uint64 instruction)
11265 {
11266     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
11267     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
11268     uint64 ac_value = extract_ac_13_12(instruction);
11269
11270     std::string ac = AC(copy(ac_value));
11271     std::string rs = GPR(copy(rs_value));
11272     std::string rt = GPR(copy(rt_value));
11273
11274     return img::format("MULT %s, %s, %s", ac, rs, rt);
11275 }
11276
11277
11278 /*
11279  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
11280  *
11281  *   3         2         1
11282  *  10987654321098765432109876543210
11283  *  001000               00010001101
11284  *     rt -----
11285  *          rs -----
11286  *               rd -----
11287  */
11288 std::string NMD::MULTU_DSP_(uint64 instruction)
11289 {
11290     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
11291     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
11292     uint64 ac_value = extract_ac_13_12(instruction);
11293
11294     std::string ac = AC(copy(ac_value));
11295     std::string rs = GPR(copy(rs_value));
11296     std::string rt = GPR(copy(rt_value));
11297
11298     return img::format("MULTU %s, %s, %s", ac, rs, rt);
11299 }
11300
11301
11302 /*
11303  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
11304  *
11305  *   3         2         1
11306  *  10987654321098765432109876543210
11307  *  001000               00010001101
11308  *     rt -----
11309  *          rs -----
11310  *               rd -----
11311  */
11312 std::string NMD::MULU(uint64 instruction)
11313 {
11314     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
11315     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
11316     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
11317
11318     std::string rd = GPR(copy(rd_value));
11319     std::string rs = GPR(copy(rs_value));
11320     std::string rt = GPR(copy(rt_value));
11321
11322     return img::format("MULU %s, %s, %s", rd, rs, rt);
11323 }
11324
11325
11326 /*
11327  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
11328  *
11329  *   3         2         1
11330  *  10987654321098765432109876543210
11331  *  001000               00010001101
11332  *     rt -----
11333  *          rs -----
11334  *               rd -----
11335  */
11336 std::string NMD::NEG_D(uint64 instruction)
11337 {
11338     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
11339     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
11340
11341     std::string ft = FPR(copy(ft_value));
11342     std::string fs = FPR(copy(fs_value));
11343
11344     return img::format("NEG.D %s, %s", ft, fs);
11345 }
11346
11347
11348 /*
11349  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
11350  *
11351  *   3         2         1
11352  *  10987654321098765432109876543210
11353  *  001000               00010001101
11354  *     rt -----
11355  *          rs -----
11356  *               rd -----
11357  */
11358 std::string NMD::NEG_S(uint64 instruction)
11359 {
11360     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
11361     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
11362
11363     std::string ft = FPR(copy(ft_value));
11364     std::string fs = FPR(copy(fs_value));
11365
11366     return img::format("NEG.S %s, %s", ft, fs);
11367 }
11368
11369
11370 /*
11371  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
11372  *
11373  *   3         2         1
11374  *  10987654321098765432109876543210
11375  *  001000               00010001101
11376  *     rt -----
11377  *          rs -----
11378  *               rd -----
11379  */
11380 std::string NMD::NOP_16_(uint64 instruction)
11381 {
11382     (void)instruction;
11383
11384     return "NOP ";
11385 }
11386
11387
11388 /*
11389  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
11390  *
11391  *   3         2         1
11392  *  10987654321098765432109876543210
11393  *  001000               00010001101
11394  *     rt -----
11395  *          rs -----
11396  *               rd -----
11397  */
11398 std::string NMD::NOP_32_(uint64 instruction)
11399 {
11400     (void)instruction;
11401
11402     return "NOP ";
11403 }
11404
11405
11406 /*
11407  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
11408  *
11409  *   3         2         1
11410  *  10987654321098765432109876543210
11411  *  001000               00010001101
11412  *     rt -----
11413  *          rs -----
11414  *               rd -----
11415  */
11416 std::string NMD::NOR(uint64 instruction)
11417 {
11418     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
11419     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
11420     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
11421
11422     std::string rd = GPR(copy(rd_value));
11423     std::string rs = GPR(copy(rs_value));
11424     std::string rt = GPR(copy(rt_value));
11425
11426     return img::format("NOR %s, %s, %s", rd, rs, rt);
11427 }
11428
11429
11430 /*
11431  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
11432  *
11433  *   3         2         1
11434  *  10987654321098765432109876543210
11435  *  001000               00010001101
11436  *     rt -----
11437  *          rs -----
11438  *               rd -----
11439  */
11440 std::string NMD::NOT_16_(uint64 instruction)
11441 {
11442     uint64 rt3_value = extract_rt3_9_8_7(instruction);
11443     uint64 rs3_value = extract_rs3_6_5_4(instruction);
11444
11445     std::string rt3 = GPR(decode_gpr_gpr3(rt3_value));
11446     std::string rs3 = GPR(decode_gpr_gpr3(rs3_value));
11447
11448     return img::format("NOT %s, %s", rt3, rs3);
11449 }
11450
11451
11452 /*
11453  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
11454  *
11455  *   3         2         1
11456  *  10987654321098765432109876543210
11457  *  001000               00010001101
11458  *     rt -----
11459  *          rs -----
11460  *               rd -----
11461  */
11462 std::string NMD::OR_16_(uint64 instruction)
11463 {
11464     uint64 rt3_value = extract_rt3_9_8_7(instruction);
11465     uint64 rs3_value = extract_rs3_6_5_4(instruction);
11466
11467     std::string rs3 = GPR(decode_gpr_gpr3(rs3_value));
11468     std::string rt3 = GPR(decode_gpr_gpr3(rt3_value));
11469
11470     return img::format("OR %s, %s", rs3, rt3);
11471 }
11472
11473
11474 /*
11475  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
11476  *
11477  *   3         2         1
11478  *  10987654321098765432109876543210
11479  *  001000               00010001101
11480  *     rt -----
11481  *          rs -----
11482  *               rd -----
11483  */
11484 std::string NMD::OR_32_(uint64 instruction)
11485 {
11486     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
11487     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
11488     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
11489
11490     std::string rd = GPR(copy(rd_value));
11491     std::string rs = GPR(copy(rs_value));
11492     std::string rt = GPR(copy(rt_value));
11493
11494     return img::format("OR %s, %s, %s", rd, rs, rt);
11495 }
11496
11497
11498 /*
11499  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
11500  *
11501  *   3         2         1
11502  *  10987654321098765432109876543210
11503  *  001000               00010001101
11504  *     rt -----
11505  *          rs -----
11506  *               rd -----
11507  */
11508 std::string NMD::ORI(uint64 instruction)
11509 {
11510     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
11511     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
11512     uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
11513
11514     std::string rt = GPR(copy(rt_value));
11515     std::string rs = GPR(copy(rs_value));
11516     std::string u = IMMEDIATE(copy(u_value));
11517
11518     return img::format("ORI %s, %s, %s", rt, rs, u);
11519 }
11520
11521
11522 /*
11523  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
11524  *
11525  *   3         2         1
11526  *  10987654321098765432109876543210
11527  *  001000               00010001101
11528  *     rt -----
11529  *          rs -----
11530  *               rd -----
11531  */
11532 std::string NMD::PACKRL_PH(uint64 instruction)
11533 {
11534     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
11535     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
11536     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
11537
11538     std::string rd = GPR(copy(rd_value));
11539     std::string rs = GPR(copy(rs_value));
11540     std::string rt = GPR(copy(rt_value));
11541
11542     return img::format("PACKRL.PH %s, %s, %s", rd, rs, rt);
11543 }
11544
11545
11546 /*
11547  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
11548  *
11549  *   3         2         1
11550  *  10987654321098765432109876543210
11551  *  001000               00010001101
11552  *     rt -----
11553  *          rs -----
11554  *               rd -----
11555  */
11556 std::string NMD::PAUSE(uint64 instruction)
11557 {
11558     (void)instruction;
11559
11560     return "PAUSE ";
11561 }
11562
11563
11564 /*
11565  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
11566  *
11567  *   3         2         1
11568  *  10987654321098765432109876543210
11569  *  001000               00010001101
11570  *     rt -----
11571  *          rs -----
11572  *               rd -----
11573  */
11574 std::string NMD::PICK_PH(uint64 instruction)
11575 {
11576     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
11577     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
11578     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
11579
11580     std::string rd = GPR(copy(rd_value));
11581     std::string rs = GPR(copy(rs_value));
11582     std::string rt = GPR(copy(rt_value));
11583
11584     return img::format("PICK.PH %s, %s, %s", rd, rs, rt);
11585 }
11586
11587
11588 /*
11589  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
11590  *
11591  *   3         2         1
11592  *  10987654321098765432109876543210
11593  *  001000               00010001101
11594  *     rt -----
11595  *          rs -----
11596  *               rd -----
11597  */
11598 std::string NMD::PICK_QB(uint64 instruction)
11599 {
11600     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
11601     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
11602     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
11603
11604     std::string rd = GPR(copy(rd_value));
11605     std::string rs = GPR(copy(rs_value));
11606     std::string rt = GPR(copy(rt_value));
11607
11608     return img::format("PICK.QB %s, %s, %s", rd, rs, rt);
11609 }
11610
11611
11612 /*
11613  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
11614  *
11615  *   3         2         1
11616  *  10987654321098765432109876543210
11617  *  001000               00010001101
11618  *     rt -----
11619  *          rs -----
11620  *               rd -----
11621  */
11622 std::string NMD::PRECEQ_W_PHL(uint64 instruction)
11623 {
11624     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
11625     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
11626
11627     std::string rt = GPR(copy(rt_value));
11628     std::string rs = GPR(copy(rs_value));
11629
11630     return img::format("PRECEQ.W.PHL %s, %s", rt, rs);
11631 }
11632
11633
11634 /*
11635  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
11636  *
11637  *   3         2         1
11638  *  10987654321098765432109876543210
11639  *  001000               00010001101
11640  *     rt -----
11641  *          rs -----
11642  *               rd -----
11643  */
11644 std::string NMD::PRECEQ_W_PHR(uint64 instruction)
11645 {
11646     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
11647     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
11648
11649     std::string rt = GPR(copy(rt_value));
11650     std::string rs = GPR(copy(rs_value));
11651
11652     return img::format("PRECEQ.W.PHR %s, %s", rt, rs);
11653 }
11654
11655
11656 /*
11657  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
11658  *
11659  *   3         2         1
11660  *  10987654321098765432109876543210
11661  *  001000               00010001101
11662  *     rt -----
11663  *          rs -----
11664  *               rd -----
11665  */
11666 std::string NMD::PRECEQU_PH_QBLA(uint64 instruction)
11667 {
11668     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
11669     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
11670
11671     std::string rt = GPR(copy(rt_value));
11672     std::string rs = GPR(copy(rs_value));
11673
11674     return img::format("PRECEQU.PH.QBLA %s, %s", rt, rs);
11675 }
11676
11677
11678 /*
11679  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
11680  *
11681  *   3         2         1
11682  *  10987654321098765432109876543210
11683  *  001000               00010001101
11684  *     rt -----
11685  *          rs -----
11686  *               rd -----
11687  */
11688 std::string NMD::PRECEQU_PH_QBL(uint64 instruction)
11689 {
11690     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
11691     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
11692
11693     std::string rt = GPR(copy(rt_value));
11694     std::string rs = GPR(copy(rs_value));
11695
11696     return img::format("PRECEQU.PH.QBL %s, %s", rt, rs);
11697 }
11698
11699
11700 /*
11701  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
11702  *
11703  *   3         2         1
11704  *  10987654321098765432109876543210
11705  *  001000               00010001101
11706  *     rt -----
11707  *          rs -----
11708  *               rd -----
11709  */
11710 std::string NMD::PRECEQU_PH_QBRA(uint64 instruction)
11711 {
11712     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
11713     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
11714
11715     std::string rt = GPR(copy(rt_value));
11716     std::string rs = GPR(copy(rs_value));
11717
11718     return img::format("PRECEQU.PH.QBRA %s, %s", rt, rs);
11719 }
11720
11721
11722 /*
11723  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
11724  *
11725  *   3         2         1
11726  *  10987654321098765432109876543210
11727  *  001000               00010001101
11728  *     rt -----
11729  *          rs -----
11730  *               rd -----
11731  */
11732 std::string NMD::PRECEQU_PH_QBR(uint64 instruction)
11733 {
11734     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
11735     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
11736
11737     std::string rt = GPR(copy(rt_value));
11738     std::string rs = GPR(copy(rs_value));
11739
11740     return img::format("PRECEQU.PH.QBR %s, %s", rt, rs);
11741 }
11742
11743
11744 /*
11745  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
11746  *
11747  *   3         2         1
11748  *  10987654321098765432109876543210
11749  *  001000               00010001101
11750  *     rt -----
11751  *          rs -----
11752  *               rd -----
11753  */
11754 std::string NMD::PRECEU_PH_QBLA(uint64 instruction)
11755 {
11756     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
11757     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
11758
11759     std::string rt = GPR(copy(rt_value));
11760     std::string rs = GPR(copy(rs_value));
11761
11762     return img::format("PRECEU.PH.QBLA %s, %s", rt, rs);
11763 }
11764
11765
11766 /*
11767  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
11768  *
11769  *   3         2         1
11770  *  10987654321098765432109876543210
11771  *  001000               00010001101
11772  *     rt -----
11773  *          rs -----
11774  *               rd -----
11775  */
11776 std::string NMD::PRECEU_PH_QBL(uint64 instruction)
11777 {
11778     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
11779     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
11780
11781     std::string rt = GPR(copy(rt_value));
11782     std::string rs = GPR(copy(rs_value));
11783
11784     return img::format("PRECEU.PH.QBL %s, %s", rt, rs);
11785 }
11786
11787
11788 /*
11789  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
11790  *
11791  *   3         2         1
11792  *  10987654321098765432109876543210
11793  *  001000               00010001101
11794  *     rt -----
11795  *          rs -----
11796  *               rd -----
11797  */
11798 std::string NMD::PRECEU_PH_QBRA(uint64 instruction)
11799 {
11800     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
11801     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
11802
11803     std::string rt = GPR(copy(rt_value));
11804     std::string rs = GPR(copy(rs_value));
11805
11806     return img::format("PRECEU.PH.QBRA %s, %s", rt, rs);
11807 }
11808
11809
11810 /*
11811  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
11812  *
11813  *   3         2         1
11814  *  10987654321098765432109876543210
11815  *  001000               00010001101
11816  *     rt -----
11817  *          rs -----
11818  *               rd -----
11819  */
11820 std::string NMD::PRECEU_PH_QBR(uint64 instruction)
11821 {
11822     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
11823     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
11824
11825     std::string rt = GPR(copy(rt_value));
11826     std::string rs = GPR(copy(rs_value));
11827
11828     return img::format("PRECEU.PH.QBR %s, %s", rt, rs);
11829 }
11830
11831
11832 /*
11833  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
11834  *
11835  *   3         2         1
11836  *  10987654321098765432109876543210
11837  *  001000               00010001101
11838  *     rt -----
11839  *          rs -----
11840  *               rd -----
11841  */
11842 std::string NMD::PRECR_QB_PH(uint64 instruction)
11843 {
11844     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
11845     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
11846     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
11847
11848     std::string rd = GPR(copy(rd_value));
11849     std::string rs = GPR(copy(rs_value));
11850     std::string rt = GPR(copy(rt_value));
11851
11852     return img::format("PRECR.QB.PH %s, %s, %s", rd, rs, rt);
11853 }
11854
11855
11856 /*
11857  *
11858  *
11859  *   3         2         1
11860  *  10987654321098765432109876543210
11861  *  001000               x1110000101
11862  *     rt -----
11863  *          rs -----
11864  *               rd -----
11865  */
11866 std::string NMD::PRECR_SRA_PH_W(uint64 instruction)
11867 {
11868     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
11869     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
11870     uint64 sa_value = extract_sa_15_14_13_12_11(instruction);
11871
11872     std::string rt = GPR(copy(rt_value));
11873     std::string rs = GPR(copy(rs_value));
11874     std::string sa = IMMEDIATE(copy(sa_value));
11875
11876     return img::format("PRECR_SRA.PH.W %s, %s, %s", rt, rs, sa);
11877 }
11878
11879
11880 /*
11881  *
11882  *
11883  *   3         2         1
11884  *  10987654321098765432109876543210
11885  *  001000               x1110000101
11886  *     rt -----
11887  *          rs -----
11888  *               rd -----
11889  */
11890 std::string NMD::PRECR_SRA_R_PH_W(uint64 instruction)
11891 {
11892     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
11893     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
11894     uint64 sa_value = extract_sa_15_14_13_12_11(instruction);
11895
11896     std::string rt = GPR(copy(rt_value));
11897     std::string rs = GPR(copy(rs_value));
11898     std::string sa = IMMEDIATE(copy(sa_value));
11899
11900     return img::format("PRECR_SRA_R.PH.W %s, %s, %s", rt, rs, sa);
11901 }
11902
11903
11904 /*
11905  *
11906  *
11907  *   3         2         1
11908  *  10987654321098765432109876543210
11909  *  001000               x1110000101
11910  *     rt -----
11911  *          rs -----
11912  *               rd -----
11913  */
11914 std::string NMD::PRECRQ_PH_W(uint64 instruction)
11915 {
11916     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
11917     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
11918     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
11919
11920     std::string rd = GPR(copy(rd_value));
11921     std::string rs = GPR(copy(rs_value));
11922     std::string rt = GPR(copy(rt_value));
11923
11924     return img::format("PRECRQ.PH.W %s, %s, %s", rd, rs, rt);
11925 }
11926
11927
11928 /*
11929  *
11930  *
11931  *   3         2         1
11932  *  10987654321098765432109876543210
11933  *  001000               x1110000101
11934  *     rt -----
11935  *          rs -----
11936  *               rd -----
11937  */
11938 std::string NMD::PRECRQ_QB_PH(uint64 instruction)
11939 {
11940     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
11941     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
11942     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
11943
11944     std::string rd = GPR(copy(rd_value));
11945     std::string rs = GPR(copy(rs_value));
11946     std::string rt = GPR(copy(rt_value));
11947
11948     return img::format("PRECRQ.QB.PH %s, %s, %s", rd, rs, rt);
11949 }
11950
11951
11952 /*
11953  *
11954  *
11955  *   3         2         1
11956  *  10987654321098765432109876543210
11957  *  001000               x1110000101
11958  *     rt -----
11959  *          rs -----
11960  *               rd -----
11961  */
11962 std::string NMD::PRECRQ_RS_PH_W(uint64 instruction)
11963 {
11964     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
11965     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
11966     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
11967
11968     std::string rd = GPR(copy(rd_value));
11969     std::string rs = GPR(copy(rs_value));
11970     std::string rt = GPR(copy(rt_value));
11971
11972     return img::format("PRECRQ_RS.PH.W %s, %s, %s", rd, rs, rt);
11973 }
11974
11975
11976 /*
11977  *
11978  *
11979  *   3         2         1
11980  *  10987654321098765432109876543210
11981  *  001000               x1110000101
11982  *     rt -----
11983  *          rs -----
11984  *               rd -----
11985  */
11986 std::string NMD::PRECRQU_S_QB_PH(uint64 instruction)
11987 {
11988     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
11989     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
11990     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
11991
11992     std::string rd = GPR(copy(rd_value));
11993     std::string rs = GPR(copy(rs_value));
11994     std::string rt = GPR(copy(rt_value));
11995
11996     return img::format("PRECRQU_S.QB.PH %s, %s, %s", rd, rs, rt);
11997 }
11998
11999
12000 /*
12001  *
12002  *
12003  *   3         2         1
12004  *  10987654321098765432109876543210
12005  *  001000               x1110000101
12006  *     rt -----
12007  *          rs -----
12008  *               rd -----
12009  */
12010 std::string NMD::PREF_S9_(uint64 instruction)
12011 {
12012     uint64 hint_value = extract_hint_25_24_23_22_21(instruction);
12013     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
12014     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
12015
12016     std::string hint = IMMEDIATE(copy(hint_value));
12017     std::string s = IMMEDIATE(copy(s_value));
12018     std::string rs = GPR(copy(rs_value));
12019
12020     return img::format("PREF %s, %s(%s)", hint, s, rs);
12021 }
12022
12023
12024 /*
12025  *
12026  *
12027  *   3         2         1
12028  *  10987654321098765432109876543210
12029  *  001000               x1110000101
12030  *     rt -----
12031  *          rs -----
12032  *               rd -----
12033  */
12034 std::string NMD::PREF_U12_(uint64 instruction)
12035 {
12036     uint64 hint_value = extract_hint_25_24_23_22_21(instruction);
12037     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
12038     uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
12039
12040     std::string hint = IMMEDIATE(copy(hint_value));
12041     std::string u = IMMEDIATE(copy(u_value));
12042     std::string rs = GPR(copy(rs_value));
12043
12044     return img::format("PREF %s, %s(%s)", hint, u, rs);
12045 }
12046
12047
12048 /*
12049  *
12050  *
12051  *   3         2         1
12052  *  10987654321098765432109876543210
12053  *  001000               x1110000101
12054  *     rt -----
12055  *          rs -----
12056  *               rd -----
12057  */
12058 std::string NMD::PREFE(uint64 instruction)
12059 {
12060     uint64 hint_value = extract_hint_25_24_23_22_21(instruction);
12061     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
12062     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
12063
12064     std::string hint = IMMEDIATE(copy(hint_value));
12065     std::string s = IMMEDIATE(copy(s_value));
12066     std::string rs = GPR(copy(rs_value));
12067
12068     return img::format("PREFE %s, %s(%s)", hint, s, rs);
12069 }
12070
12071
12072 /*
12073  *
12074  *
12075  *   3         2         1
12076  *  10987654321098765432109876543210
12077  *  001000               x1110000101
12078  *     rt -----
12079  *          rs -----
12080  *               rd -----
12081  */
12082 std::string NMD::PREPEND(uint64 instruction)
12083 {
12084     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
12085     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
12086     uint64 sa_value = extract_sa_15_14_13_12_11(instruction);
12087
12088     std::string rt = GPR(copy(rt_value));
12089     std::string rs = GPR(copy(rs_value));
12090     std::string sa = IMMEDIATE(copy(sa_value));
12091
12092     return img::format("PREPEND %s, %s, %s", rt, rs, sa);
12093 }
12094
12095
12096 /*
12097  *
12098  *
12099  *   3         2         1
12100  *  10987654321098765432109876543210
12101  *  001000               x1110000101
12102  *     rt -----
12103  *          rs -----
12104  *               rd -----
12105  */
12106 std::string NMD::RADDU_W_QB(uint64 instruction)
12107 {
12108     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
12109     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
12110
12111     std::string rt = GPR(copy(rt_value));
12112     std::string rs = GPR(copy(rs_value));
12113
12114     return img::format("RADDU.W.QB %s, %s", rt, rs);
12115 }
12116
12117
12118 /*
12119  *
12120  *
12121  *   3         2         1
12122  *  10987654321098765432109876543210
12123  *  001000               x1110000101
12124  *     rt -----
12125  *          rs -----
12126  *               rd -----
12127  */
12128 std::string NMD::RDDSP(uint64 instruction)
12129 {
12130     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
12131     uint64 mask_value = extract_mask_20_19_18_17_16_15_14(instruction);
12132
12133     std::string rt = GPR(copy(rt_value));
12134     std::string mask = IMMEDIATE(copy(mask_value));
12135
12136     return img::format("RDDSP %s, %s", rt, mask);
12137 }
12138
12139
12140 /*
12141  *
12142  *
12143  *   3         2         1
12144  *  10987654321098765432109876543210
12145  *  001000               x1110000101
12146  *     rt -----
12147  *          rs -----
12148  *               rd -----
12149  */
12150 std::string NMD::RDHWR(uint64 instruction)
12151 {
12152     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
12153     uint64 hs_value = extract_hs_20_19_18_17_16(instruction);
12154     uint64 sel_value = extract_sel_13_12_11(instruction);
12155
12156     std::string rt = GPR(copy(rt_value));
12157     std::string hs = CPR(copy(hs_value));
12158     std::string sel = IMMEDIATE(copy(sel_value));
12159
12160     return img::format("RDHWR %s, %s, %s", rt, hs, sel);
12161 }
12162
12163
12164 /*
12165  *
12166  *
12167  *   3         2         1
12168  *  10987654321098765432109876543210
12169  *  001000               x1110000101
12170  *     rt -----
12171  *          rs -----
12172  *               rd -----
12173  */
12174 std::string NMD::RDPGPR(uint64 instruction)
12175 {
12176     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
12177     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
12178
12179     std::string rt = GPR(copy(rt_value));
12180     std::string rs = GPR(copy(rs_value));
12181
12182     return img::format("RDPGPR %s, %s", rt, rs);
12183 }
12184
12185
12186 /*
12187  *
12188  *
12189  *   3         2         1
12190  *  10987654321098765432109876543210
12191  *  001000               x1110000101
12192  *     rt -----
12193  *          rs -----
12194  *               rd -----
12195  */
12196 std::string NMD::RECIP_D(uint64 instruction)
12197 {
12198     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
12199     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
12200
12201     std::string ft = FPR(copy(ft_value));
12202     std::string fs = FPR(copy(fs_value));
12203
12204     return img::format("RECIP.D %s, %s", ft, fs);
12205 }
12206
12207
12208 /*
12209  *
12210  *
12211  *   3         2         1
12212  *  10987654321098765432109876543210
12213  *  001000               x1110000101
12214  *     rt -----
12215  *          rs -----
12216  *               rd -----
12217  */
12218 std::string NMD::RECIP_S(uint64 instruction)
12219 {
12220     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
12221     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
12222
12223     std::string ft = FPR(copy(ft_value));
12224     std::string fs = FPR(copy(fs_value));
12225
12226     return img::format("RECIP.S %s, %s", ft, fs);
12227 }
12228
12229
12230 /*
12231  *
12232  *
12233  *   3         2         1
12234  *  10987654321098765432109876543210
12235  *  001000               x1110000101
12236  *     rt -----
12237  *          rs -----
12238  *               rd -----
12239  */
12240 std::string NMD::REPL_PH(uint64 instruction)
12241 {
12242     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
12243     int64 s_value = extract_s__se9_20_19_18_17_16_15_14_13_12_11(instruction);
12244
12245     std::string rt = GPR(copy(rt_value));
12246     std::string s = IMMEDIATE(copy(s_value));
12247
12248     return img::format("REPL.PH %s, %s", rt, s);
12249 }
12250
12251
12252 /*
12253  *
12254  *
12255  *   3         2         1
12256  *  10987654321098765432109876543210
12257  *  001000               x1110000101
12258  *     rt -----
12259  *          rs -----
12260  *               rd -----
12261  */
12262 std::string NMD::REPL_QB(uint64 instruction)
12263 {
12264     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
12265     uint64 u_value = extract_u_20_19_18_17_16_15_14_13(instruction);
12266
12267     std::string rt = GPR(copy(rt_value));
12268     std::string u = IMMEDIATE(copy(u_value));
12269
12270     return img::format("REPL.QB %s, %s", rt, u);
12271 }
12272
12273
12274 /*
12275  *
12276  *
12277  *   3         2         1
12278  *  10987654321098765432109876543210
12279  *  001000               x1110000101
12280  *     rt -----
12281  *          rs -----
12282  *               rd -----
12283  */
12284 std::string NMD::REPLV_PH(uint64 instruction)
12285 {
12286     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
12287     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
12288
12289     std::string rt = GPR(copy(rt_value));
12290     std::string rs = GPR(copy(rs_value));
12291
12292     return img::format("REPLV.PH %s, %s", rt, rs);
12293 }
12294
12295
12296 /*
12297  *
12298  *
12299  *   3         2         1
12300  *  10987654321098765432109876543210
12301  *  001000               x1110000101
12302  *     rt -----
12303  *          rs -----
12304  *               rd -----
12305  */
12306 std::string NMD::REPLV_QB(uint64 instruction)
12307 {
12308     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
12309     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
12310
12311     std::string rt = GPR(copy(rt_value));
12312     std::string rs = GPR(copy(rs_value));
12313
12314     return img::format("REPLV.QB %s, %s", rt, rs);
12315 }
12316
12317
12318 /*
12319  *
12320  *
12321  *   3         2         1
12322  *  10987654321098765432109876543210
12323  *  001000               x1110000101
12324  *     rt -----
12325  *          rs -----
12326  *               rd -----
12327  */
12328 std::string NMD::RESTORE_32_(uint64 instruction)
12329 {
12330     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
12331     uint64 count_value = extract_count_19_18_17_16(instruction);
12332     uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3__s3(instruction);
12333     uint64 gp_value = extract_gp_2(instruction);
12334
12335     std::string u = IMMEDIATE(copy(u_value));
12336     return img::format("RESTORE %s%s", u,
12337                save_restore_list(rt_value, count_value, gp_value));
12338 }
12339
12340
12341 /*
12342  *
12343  *
12344  *   3         2         1
12345  *  10987654321098765432109876543210
12346  *  001000               x1110000101
12347  *     rt -----
12348  *          rs -----
12349  *               rd -----
12350  */
12351 std::string NMD::RESTORE_JRC_16_(uint64 instruction)
12352 {
12353     uint64 rt1_value = extract_rtl_11(instruction);
12354     uint64 u_value = extract_u_7_6_5_4__s4(instruction);
12355     uint64 count_value = extract_count_3_2_1_0(instruction);
12356
12357     std::string u = IMMEDIATE(copy(u_value));
12358     return img::format("RESTORE.JRC %s%s", u,
12359         save_restore_list(encode_rt1_from_rt(rt1_value), count_value, 0));
12360 }
12361
12362
12363 /*
12364  *
12365  *
12366  *   3         2         1
12367  *  10987654321098765432109876543210
12368  *  001000               x1110000101
12369  *     rt -----
12370  *          rs -----
12371  *               rd -----
12372  */
12373 std::string NMD::RESTORE_JRC_32_(uint64 instruction)
12374 {
12375     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
12376     uint64 count_value = extract_count_19_18_17_16(instruction);
12377     uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3__s3(instruction);
12378     uint64 gp_value = extract_gp_2(instruction);
12379
12380     std::string u = IMMEDIATE(copy(u_value));
12381     return img::format("RESTORE.JRC %s%s", u,
12382                save_restore_list(rt_value, count_value, gp_value));
12383 }
12384
12385
12386 /*
12387  *
12388  *
12389  *   3         2         1
12390  *  10987654321098765432109876543210
12391  *  001000               x1110000101
12392  *     rt -----
12393  *          rs -----
12394  *               rd -----
12395  */
12396 std::string NMD::RESTOREF(uint64 instruction)
12397 {
12398     uint64 count_value = extract_count_19_18_17_16(instruction);
12399     uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3__s3(instruction);
12400
12401     std::string u = IMMEDIATE(copy(u_value));
12402     std::string count = IMMEDIATE(copy(count_value));
12403
12404     return img::format("RESTOREF %s, %s", u, count);
12405 }
12406
12407
12408 /*
12409  *
12410  *
12411  *   3         2         1
12412  *  10987654321098765432109876543210
12413  *  001000               x1110000101
12414  *     rt -----
12415  *          rs -----
12416  *               rd -----
12417  */
12418 std::string NMD::RINT_D(uint64 instruction)
12419 {
12420     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
12421     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
12422
12423     std::string ft = FPR(copy(ft_value));
12424     std::string fs = FPR(copy(fs_value));
12425
12426     return img::format("RINT.D %s, %s", ft, fs);
12427 }
12428
12429
12430 /*
12431  *
12432  *
12433  *   3         2         1
12434  *  10987654321098765432109876543210
12435  *  001000               x1110000101
12436  *     rt -----
12437  *          rs -----
12438  *               rd -----
12439  */
12440 std::string NMD::RINT_S(uint64 instruction)
12441 {
12442     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
12443     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
12444
12445     std::string ft = FPR(copy(ft_value));
12446     std::string fs = FPR(copy(fs_value));
12447
12448     return img::format("RINT.S %s, %s", ft, fs);
12449 }
12450
12451
12452 /*
12453  *
12454  *
12455  *   3         2         1
12456  *  10987654321098765432109876543210
12457  *  001000               x1110000101
12458  *     rt -----
12459  *          rs -----
12460  *               rd -----
12461  */
12462 std::string NMD::ROTR(uint64 instruction)
12463 {
12464     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
12465     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
12466     uint64 shift_value = extract_shift_4_3_2_1_0(instruction);
12467
12468     std::string rt = GPR(copy(rt_value));
12469     std::string rs = GPR(copy(rs_value));
12470     std::string shift = IMMEDIATE(copy(shift_value));
12471
12472     return img::format("ROTR %s, %s, %s", rt, rs, shift);
12473 }
12474
12475
12476 /*
12477  *
12478  *
12479  *   3         2         1
12480  *  10987654321098765432109876543210
12481  *  001000               x1110000101
12482  *     rt -----
12483  *          rs -----
12484  *               rd -----
12485  */
12486 std::string NMD::ROTRV(uint64 instruction)
12487 {
12488     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
12489     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
12490     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
12491
12492     std::string rd = GPR(copy(rd_value));
12493     std::string rs = GPR(copy(rs_value));
12494     std::string rt = GPR(copy(rt_value));
12495
12496     return img::format("ROTRV %s, %s, %s", rd, rs, rt);
12497 }
12498
12499
12500 /*
12501  *
12502  *
12503  *   3         2         1
12504  *  10987654321098765432109876543210
12505  *  001000               x1110000101
12506  *     rt -----
12507  *          rs -----
12508  *               rd -----
12509  */
12510 std::string NMD::ROTX(uint64 instruction)
12511 {
12512     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
12513     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
12514     uint64 shiftx_value = extract_shiftx_10_9_8_7__s1(instruction);
12515     uint64 stripe_value = extract_stripe_6(instruction);
12516     uint64 shift_value = extract_shift_4_3_2_1_0(instruction);
12517
12518     std::string rt = GPR(copy(rt_value));
12519     std::string rs = GPR(copy(rs_value));
12520     std::string shift = IMMEDIATE(copy(shift_value));
12521     std::string shiftx = IMMEDIATE(copy(shiftx_value));
12522     std::string stripe = IMMEDIATE(copy(stripe_value));
12523
12524     return img::format("ROTX %s, %s, %s, %s, %s",
12525                        rt, rs, shift, shiftx, stripe);
12526 }
12527
12528
12529 /*
12530  *
12531  *
12532  *   3         2         1
12533  *  10987654321098765432109876543210
12534  *  001000               x1110000101
12535  *     rt -----
12536  *          rs -----
12537  *               rd -----
12538  */
12539 std::string NMD::ROUND_L_D(uint64 instruction)
12540 {
12541     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
12542     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
12543
12544     std::string ft = FPR(copy(ft_value));
12545     std::string fs = FPR(copy(fs_value));
12546
12547     return img::format("ROUND.L.D %s, %s", ft, fs);
12548 }
12549
12550
12551 /*
12552  *
12553  *
12554  *   3         2         1
12555  *  10987654321098765432109876543210
12556  *  001000               x1110000101
12557  *     rt -----
12558  *          rs -----
12559  *               rd -----
12560  */
12561 std::string NMD::ROUND_L_S(uint64 instruction)
12562 {
12563     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
12564     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
12565
12566     std::string ft = FPR(copy(ft_value));
12567     std::string fs = FPR(copy(fs_value));
12568
12569     return img::format("ROUND.L.S %s, %s", ft, fs);
12570 }
12571
12572
12573 /*
12574  *
12575  *
12576  *   3         2         1
12577  *  10987654321098765432109876543210
12578  *  001000               x1110000101
12579  *     rt -----
12580  *          rs -----
12581  *               rd -----
12582  */
12583 std::string NMD::ROUND_W_D(uint64 instruction)
12584 {
12585     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
12586     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
12587
12588     std::string ft = FPR(copy(ft_value));
12589     std::string fs = FPR(copy(fs_value));
12590
12591     return img::format("ROUND.W.D %s, %s", ft, fs);
12592 }
12593
12594
12595 /*
12596  *
12597  *
12598  *   3         2         1
12599  *  10987654321098765432109876543210
12600  *  001000               x1110000101
12601  *     rt -----
12602  *          rs -----
12603  *               rd -----
12604  */
12605 std::string NMD::ROUND_W_S(uint64 instruction)
12606 {
12607     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
12608     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
12609
12610     std::string ft = FPR(copy(ft_value));
12611     std::string fs = FPR(copy(fs_value));
12612
12613     return img::format("ROUND.W.S %s, %s", ft, fs);
12614 }
12615
12616
12617 /*
12618  *
12619  *
12620  *   3         2         1
12621  *  10987654321098765432109876543210
12622  *  001000               x1110000101
12623  *     rt -----
12624  *          rs -----
12625  *               rd -----
12626  */
12627 std::string NMD::RSQRT_D(uint64 instruction)
12628 {
12629     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
12630     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
12631
12632     std::string ft = FPR(copy(ft_value));
12633     std::string fs = FPR(copy(fs_value));
12634
12635     return img::format("RSQRT.D %s, %s", ft, fs);
12636 }
12637
12638
12639 /*
12640  *
12641  *
12642  *   3         2         1
12643  *  10987654321098765432109876543210
12644  *  001000               x1110000101
12645  *     rt -----
12646  *          rs -----
12647  *               rd -----
12648  */
12649 std::string NMD::RSQRT_S(uint64 instruction)
12650 {
12651     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
12652     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
12653
12654     std::string ft = FPR(copy(ft_value));
12655     std::string fs = FPR(copy(fs_value));
12656
12657     return img::format("RSQRT.S %s, %s", ft, fs);
12658 }
12659
12660
12661 /*
12662  *
12663  *
12664  *   3         2         1
12665  *  10987654321098765432109876543210
12666  *  001000               01001001101
12667  *     rt -----
12668  *          rs -----
12669  *               rd -----
12670  */
12671 std::string NMD::SAVE_16_(uint64 instruction)
12672 {
12673     uint64 rt1_value = extract_rtl_11(instruction);
12674     uint64 u_value = extract_u_7_6_5_4__s4(instruction);
12675     uint64 count_value = extract_count_3_2_1_0(instruction);
12676
12677     std::string u = IMMEDIATE(copy(u_value));
12678     return img::format("SAVE %s%s", u,
12679         save_restore_list(encode_rt1_from_rt(rt1_value), count_value, 0));
12680 }
12681
12682
12683 /*
12684  *
12685  *
12686  *   3         2         1
12687  *  10987654321098765432109876543210
12688  *  001000               01001001101
12689  *     rt -----
12690  *          rs -----
12691  *               rd -----
12692  */
12693 std::string NMD::SAVE_32_(uint64 instruction)
12694 {
12695     uint64 count_value = extract_count_19_18_17_16(instruction);
12696     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
12697     uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3__s3(instruction);
12698     uint64 gp_value = extract_gp_2(instruction);
12699
12700     std::string u = IMMEDIATE(copy(u_value));
12701     return img::format("SAVE %s%s", u,
12702                save_restore_list(rt_value, count_value, gp_value));
12703 }
12704
12705
12706 /*
12707  *
12708  *
12709  *   3         2         1
12710  *  10987654321098765432109876543210
12711  *  001000               01001001101
12712  *     rt -----
12713  *          rs -----
12714  *               rd -----
12715  */
12716 std::string NMD::SAVEF(uint64 instruction)
12717 {
12718     uint64 count_value = extract_count_19_18_17_16(instruction);
12719     uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3__s3(instruction);
12720
12721     std::string u = IMMEDIATE(copy(u_value));
12722     std::string count = IMMEDIATE(copy(count_value));
12723
12724     return img::format("SAVEF %s, %s", u, count);
12725 }
12726
12727
12728 /*
12729  *
12730  *
12731  *   3         2         1
12732  *  10987654321098765432109876543210
12733  *  001000               01001001101
12734  *     rt -----
12735  *          rs -----
12736  *               rd -----
12737  */
12738 std::string NMD::SB_16_(uint64 instruction)
12739 {
12740     uint64 rtz3_value = extract_rtz3_9_8_7(instruction);
12741     uint64 rs3_value = extract_rs3_6_5_4(instruction);
12742     uint64 u_value = extract_u_1_0(instruction);
12743
12744     std::string rtz3 = GPR(encode_gpr3_store(rtz3_value));
12745     std::string u = IMMEDIATE(copy(u_value));
12746     std::string rs3 = GPR(decode_gpr_gpr3(rs3_value));
12747
12748     return img::format("SB %s, %s(%s)", rtz3, u, rs3);
12749 }
12750
12751
12752 /*
12753  *
12754  *
12755  *   3         2         1
12756  *  10987654321098765432109876543210
12757  *  001000               01001001101
12758  *     rt -----
12759  *          rs -----
12760  *               rd -----
12761  */
12762 std::string NMD::SB_GP_(uint64 instruction)
12763 {
12764     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
12765     uint64 u_value = extract_u_17_to_0(instruction);
12766
12767     std::string rt = GPR(copy(rt_value));
12768     std::string u = IMMEDIATE(copy(u_value));
12769
12770     return img::format("SB %s, %s($%d)", rt, u, 28);
12771 }
12772
12773
12774 /*
12775  *
12776  *
12777  *   3         2         1
12778  *  10987654321098765432109876543210
12779  *  001000               01001001101
12780  *     rt -----
12781  *          rs -----
12782  *               rd -----
12783  */
12784 std::string NMD::SB_S9_(uint64 instruction)
12785 {
12786     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
12787     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
12788     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
12789
12790     std::string rt = GPR(copy(rt_value));
12791     std::string s = IMMEDIATE(copy(s_value));
12792     std::string rs = GPR(copy(rs_value));
12793
12794     return img::format("SB %s, %s(%s)", rt, s, rs);
12795 }
12796
12797
12798 /*
12799  *
12800  *
12801  *   3         2         1
12802  *  10987654321098765432109876543210
12803  *  001000               01001001101
12804  *     rt -----
12805  *          rs -----
12806  *               rd -----
12807  */
12808 std::string NMD::SB_U12_(uint64 instruction)
12809 {
12810     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
12811     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
12812     uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
12813
12814     std::string rt = GPR(copy(rt_value));
12815     std::string u = IMMEDIATE(copy(u_value));
12816     std::string rs = GPR(copy(rs_value));
12817
12818     return img::format("SB %s, %s(%s)", rt, u, rs);
12819 }
12820
12821
12822 /*
12823  *
12824  *
12825  *   3         2         1
12826  *  10987654321098765432109876543210
12827  *  001000               01001001101
12828  *     rt -----
12829  *          rs -----
12830  *               rd -----
12831  */
12832 std::string NMD::SBE(uint64 instruction)
12833 {
12834     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
12835     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
12836     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
12837
12838     std::string rt = GPR(copy(rt_value));
12839     std::string s = IMMEDIATE(copy(s_value));
12840     std::string rs = GPR(copy(rs_value));
12841
12842     return img::format("SBE %s, %s(%s)", rt, s, rs);
12843 }
12844
12845
12846 /*
12847  *
12848  *
12849  *   3         2         1
12850  *  10987654321098765432109876543210
12851  *  001000               01001001101
12852  *     rt -----
12853  *          rs -----
12854  *               rd -----
12855  */
12856 std::string NMD::SBX(uint64 instruction)
12857 {
12858     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
12859     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
12860     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
12861
12862     std::string rd = GPR(copy(rd_value));
12863     std::string rs = GPR(copy(rs_value));
12864     std::string rt = GPR(copy(rt_value));
12865
12866     return img::format("SBX %s, %s(%s)", rd, rs, rt);
12867 }
12868
12869
12870 /*
12871  *
12872  *
12873  *   3         2         1
12874  *  10987654321098765432109876543210
12875  *  001000               01001001101
12876  *     rt -----
12877  *          rs -----
12878  *               rd -----
12879  */
12880 std::string NMD::SC(uint64 instruction)
12881 {
12882     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
12883     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
12884     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_s2(instruction);
12885
12886     std::string rt = GPR(copy(rt_value));
12887     std::string s = IMMEDIATE(copy(s_value));
12888     std::string rs = GPR(copy(rs_value));
12889
12890     return img::format("SC %s, %s(%s)", rt, s, rs);
12891 }
12892
12893
12894 /*
12895  *
12896  *
12897  *   3         2         1
12898  *  10987654321098765432109876543210
12899  *  001000               01001001101
12900  *     rt -----
12901  *          rs -----
12902  *               rd -----
12903  */
12904 std::string NMD::SCD(uint64 instruction)
12905 {
12906     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
12907     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
12908     int64 s_value = extract_s__se8_15_7_6_5_4_3_s3(instruction);
12909
12910     std::string rt = GPR(copy(rt_value));
12911     std::string s = IMMEDIATE(copy(s_value));
12912     std::string rs = GPR(copy(rs_value));
12913
12914     return img::format("SCD %s, %s(%s)", rt, s, rs);
12915 }
12916
12917
12918 /*
12919  *
12920  *
12921  *   3         2         1
12922  *  10987654321098765432109876543210
12923  *  001000               01001001101
12924  *     rt -----
12925  *          rs -----
12926  *               rd -----
12927  */
12928 std::string NMD::SCDP(uint64 instruction)
12929 {
12930     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
12931     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
12932     uint64 ru_value = extract_ru_7_6_5_4_3(instruction);
12933
12934     std::string rt = GPR(copy(rt_value));
12935     std::string ru = GPR(copy(ru_value));
12936     std::string rs = GPR(copy(rs_value));
12937
12938     return img::format("SCDP %s, %s, (%s)", rt, ru, rs);
12939 }
12940
12941
12942 /*
12943  *
12944  *
12945  *   3         2         1
12946  *  10987654321098765432109876543210
12947  *  001000               01001001101
12948  *     rt -----
12949  *          rs -----
12950  *               rd -----
12951  */
12952 std::string NMD::SCE(uint64 instruction)
12953 {
12954     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
12955     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
12956     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_s2(instruction);
12957
12958     std::string rt = GPR(copy(rt_value));
12959     std::string s = IMMEDIATE(copy(s_value));
12960     std::string rs = GPR(copy(rs_value));
12961
12962     return img::format("SCE %s, %s(%s)", rt, s, rs);
12963 }
12964
12965
12966 /*
12967  *
12968  *
12969  *   3         2         1
12970  *  10987654321098765432109876543210
12971  *  001000               01001001101
12972  *     rt -----
12973  *          rs -----
12974  *               rd -----
12975  */
12976 std::string NMD::SCWP(uint64 instruction)
12977 {
12978     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
12979     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
12980     uint64 ru_value = extract_ru_7_6_5_4_3(instruction);
12981
12982     std::string rt = GPR(copy(rt_value));
12983     std::string ru = GPR(copy(ru_value));
12984     std::string rs = GPR(copy(rs_value));
12985
12986     return img::format("SCWP %s, %s, (%s)", rt, ru, rs);
12987 }
12988
12989
12990 /*
12991  *
12992  *
12993  *   3         2         1
12994  *  10987654321098765432109876543210
12995  *  001000               01001001101
12996  *     rt -----
12997  *          rs -----
12998  *               rd -----
12999  */
13000 std::string NMD::SCWPE(uint64 instruction)
13001 {
13002     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
13003     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
13004     uint64 ru_value = extract_ru_7_6_5_4_3(instruction);
13005
13006     std::string rt = GPR(copy(rt_value));
13007     std::string ru = GPR(copy(ru_value));
13008     std::string rs = GPR(copy(rs_value));
13009
13010     return img::format("SCWPE %s, %s, (%s)", rt, ru, rs);
13011 }
13012
13013
13014 /*
13015  *
13016  *
13017  *   3         2         1
13018  *  10987654321098765432109876543210
13019  *  001000               01001001101
13020  *     rt -----
13021  *          rs -----
13022  *               rd -----
13023  */
13024 std::string NMD::SD_GP_(uint64 instruction)
13025 {
13026     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
13027     uint64 u_value = extract_u_20_to_3__s3(instruction);
13028
13029     std::string rt = GPR(copy(rt_value));
13030     std::string u = IMMEDIATE(copy(u_value));
13031
13032     return img::format("SD %s, %s($%d)", rt, u, 28);
13033 }
13034
13035
13036 /*
13037  *
13038  *
13039  *   3         2         1
13040  *  10987654321098765432109876543210
13041  *  001000               01001001101
13042  *     rt -----
13043  *          rs -----
13044  *               rd -----
13045  */
13046 std::string NMD::SD_S9_(uint64 instruction)
13047 {
13048     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
13049     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
13050     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
13051
13052     std::string rt = GPR(copy(rt_value));
13053     std::string s = IMMEDIATE(copy(s_value));
13054     std::string rs = GPR(copy(rs_value));
13055
13056     return img::format("SD %s, %s(%s)", rt, s, rs);
13057 }
13058
13059
13060 /*
13061  *
13062  *
13063  *   3         2         1
13064  *  10987654321098765432109876543210
13065  *  001000               01001001101
13066  *     rt -----
13067  *          rs -----
13068  *               rd -----
13069  */
13070 std::string NMD::SD_U12_(uint64 instruction)
13071 {
13072     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
13073     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
13074     uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
13075
13076     std::string rt = GPR(copy(rt_value));
13077     std::string u = IMMEDIATE(copy(u_value));
13078     std::string rs = GPR(copy(rs_value));
13079
13080     return img::format("SD %s, %s(%s)", rt, u, rs);
13081 }
13082
13083
13084 /*
13085  *
13086  *
13087  *   3         2         1
13088  *  10987654321098765432109876543210
13089  *  001000               01001001101
13090  *     rt -----
13091  *          rs -----
13092  *               rd -----
13093  */
13094 std::string NMD::SDBBP_16_(uint64 instruction)
13095 {
13096     uint64 code_value = extract_code_2_1_0(instruction);
13097
13098     std::string code = IMMEDIATE(copy(code_value));
13099
13100     return img::format("SDBBP %s", code);
13101 }
13102
13103
13104 /*
13105  *
13106  *
13107  *   3         2         1
13108  *  10987654321098765432109876543210
13109  *  001000               01001001101
13110  *     rt -----
13111  *          rs -----
13112  *               rd -----
13113  */
13114 std::string NMD::SDBBP_32_(uint64 instruction)
13115 {
13116     uint64 code_value = extract_code_18_to_0(instruction);
13117
13118     std::string code = IMMEDIATE(copy(code_value));
13119
13120     return img::format("SDBBP %s", code);
13121 }
13122
13123
13124 /*
13125  *
13126  *
13127  *   3         2         1
13128  *  10987654321098765432109876543210
13129  *  001000               01001001101
13130  *     rt -----
13131  *          rs -----
13132  *               rd -----
13133  */
13134 std::string NMD::SDC1_GP_(uint64 instruction)
13135 {
13136     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
13137     uint64 u_value = extract_u_17_to_2__s2(instruction);
13138
13139     std::string ft = FPR(copy(ft_value));
13140     std::string u = IMMEDIATE(copy(u_value));
13141
13142     return img::format("SDC1 %s, %s($%d)", ft, u, 28);
13143 }
13144
13145
13146 /*
13147  *
13148  *
13149  *   3         2         1
13150  *  10987654321098765432109876543210
13151  *  001000               01001001101
13152  *     rt -----
13153  *          rs -----
13154  *               rd -----
13155  */
13156 std::string NMD::SDC1_S9_(uint64 instruction)
13157 {
13158     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
13159     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
13160     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
13161
13162     std::string ft = FPR(copy(ft_value));
13163     std::string s = IMMEDIATE(copy(s_value));
13164     std::string rs = GPR(copy(rs_value));
13165
13166     return img::format("SDC1 %s, %s(%s)", ft, s, rs);
13167 }
13168
13169
13170 /*
13171  *
13172  *
13173  *   3         2         1
13174  *  10987654321098765432109876543210
13175  *  001000               01001001101
13176  *     rt -----
13177  *          rs -----
13178  *               rd -----
13179  */
13180 std::string NMD::SDC1_U12_(uint64 instruction)
13181 {
13182     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
13183     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
13184     uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
13185
13186     std::string ft = FPR(copy(ft_value));
13187     std::string u = IMMEDIATE(copy(u_value));
13188     std::string rs = GPR(copy(rs_value));
13189
13190     return img::format("SDC1 %s, %s(%s)", ft, u, rs);
13191 }
13192
13193
13194 /*
13195  *
13196  *
13197  *   3         2         1
13198  *  10987654321098765432109876543210
13199  *  001000               01001001101
13200  *     rt -----
13201  *          rs -----
13202  *               rd -----
13203  */
13204 std::string NMD::SDC1X(uint64 instruction)
13205 {
13206     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
13207     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
13208     uint64 ft_value = extract_ft_15_14_13_12_11(instruction);
13209
13210     std::string ft = FPR(copy(ft_value));
13211     std::string rs = GPR(copy(rs_value));
13212     std::string rt = GPR(copy(rt_value));
13213
13214     return img::format("SDC1X %s, %s(%s)", ft, rs, rt);
13215 }
13216
13217
13218 /*
13219  *
13220  *
13221  *   3         2         1
13222  *  10987654321098765432109876543210
13223  *  001000               01001001101
13224  *     rt -----
13225  *          rs -----
13226  *               rd -----
13227  */
13228 std::string NMD::SDC1XS(uint64 instruction)
13229 {
13230     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
13231     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
13232     uint64 ft_value = extract_ft_15_14_13_12_11(instruction);
13233
13234     std::string ft = FPR(copy(ft_value));
13235     std::string rs = GPR(copy(rs_value));
13236     std::string rt = GPR(copy(rt_value));
13237
13238     return img::format("SDC1XS %s, %s(%s)", ft, rs, rt);
13239 }
13240
13241
13242 /*
13243  *
13244  *
13245  *   3         2         1
13246  *  10987654321098765432109876543210
13247  *  001000               01001001101
13248  *     rt -----
13249  *          rs -----
13250  *               rd -----
13251  */
13252 std::string NMD::SDC2(uint64 instruction)
13253 {
13254     uint64 cs_value = extract_cs_25_24_23_22_21(instruction);
13255     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
13256     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
13257
13258     std::string cs = CPR(copy(cs_value));
13259     std::string s = IMMEDIATE(copy(s_value));
13260     std::string rs = GPR(copy(rs_value));
13261
13262     return img::format("SDC2 %s, %s(%s)", cs, s, rs);
13263 }
13264
13265
13266 /*
13267  *
13268  *
13269  *   3         2         1
13270  *  10987654321098765432109876543210
13271  *  001000               01001001101
13272  *     rt -----
13273  *          rs -----
13274  *               rd -----
13275  */
13276 std::string NMD::SDM(uint64 instruction)
13277 {
13278     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
13279     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
13280     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
13281     uint64 count3_value = extract_count3_14_13_12(instruction);
13282
13283     std::string rt = GPR(copy(rt_value));
13284     std::string s = IMMEDIATE(copy(s_value));
13285     std::string rs = GPR(copy(rs_value));
13286     std::string count3 = IMMEDIATE(encode_count3_from_count(count3_value));
13287
13288     return img::format("SDM %s, %s(%s), %s", rt, s, rs, count3);
13289 }
13290
13291
13292 /*
13293  *
13294  *
13295  *   3         2         1
13296  *  10987654321098765432109876543210
13297  *  001000               01001001101
13298  *     rt -----
13299  *          rs -----
13300  *               rd -----
13301  */
13302 std::string NMD::SDPC_48_(uint64 instruction)
13303 {
13304     uint64 rt_value = extract_rt_41_40_39_38_37(instruction);
13305     int64 s_value = extract_s__se31_15_to_0_31_to_16(instruction);
13306
13307     std::string rt = GPR(copy(rt_value));
13308     std::string s = ADDRESS(encode_s_from_address(s_value), 6);
13309
13310     return img::format("SDPC %s, %s", rt, s);
13311 }
13312
13313
13314 /*
13315  *
13316  *
13317  *   3         2         1
13318  *  10987654321098765432109876543210
13319  *  001000               01001001101
13320  *     rt -----
13321  *          rs -----
13322  *               rd -----
13323  */
13324 std::string NMD::SDXS(uint64 instruction)
13325 {
13326     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
13327     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
13328     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
13329
13330     std::string rd = GPR(copy(rd_value));
13331     std::string rs = GPR(copy(rs_value));
13332     std::string rt = GPR(copy(rt_value));
13333
13334     return img::format("SDXS %s, %s(%s)", rd, rs, rt);
13335 }
13336
13337
13338 /*
13339  *
13340  *
13341  *   3         2         1
13342  *  10987654321098765432109876543210
13343  *  001000               01001001101
13344  *     rt -----
13345  *          rs -----
13346  *               rd -----
13347  */
13348 std::string NMD::SDX(uint64 instruction)
13349 {
13350     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
13351     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
13352     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
13353
13354     std::string rd = GPR(copy(rd_value));
13355     std::string rs = GPR(copy(rs_value));
13356     std::string rt = GPR(copy(rt_value));
13357
13358     return img::format("SDX %s, %s(%s)", rd, rs, rt);
13359 }
13360
13361
13362 /*
13363  *
13364  *
13365  *   3         2         1
13366  *  10987654321098765432109876543210
13367  *  001000               01001001101
13368  *     rt -----
13369  *          rs -----
13370  *               rd -----
13371  */
13372 std::string NMD::SEB(uint64 instruction)
13373 {
13374     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
13375     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
13376
13377     std::string rt = GPR(copy(rt_value));
13378     std::string rs = GPR(copy(rs_value));
13379
13380     return img::format("SEB %s, %s", rt, rs);
13381 }
13382
13383
13384 /*
13385  *
13386  *
13387  *   3         2         1
13388  *  10987654321098765432109876543210
13389  *  001000               01001001101
13390  *     rt -----
13391  *          rs -----
13392  *               rd -----
13393  */
13394 std::string NMD::SEH(uint64 instruction)
13395 {
13396     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
13397     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
13398
13399     std::string rt = GPR(copy(rt_value));
13400     std::string rs = GPR(copy(rs_value));
13401
13402     return img::format("SEH %s, %s", rt, rs);
13403 }
13404
13405
13406 /*
13407  *
13408  *
13409  *   3         2         1
13410  *  10987654321098765432109876543210
13411  *  001000               01001001101
13412  *     rt -----
13413  *          rs -----
13414  *               rd -----
13415  */
13416 std::string NMD::SEL_D(uint64 instruction)
13417 {
13418     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
13419     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
13420     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
13421
13422     std::string fd = FPR(copy(fd_value));
13423     std::string fs = FPR(copy(fs_value));
13424     std::string ft = FPR(copy(ft_value));
13425
13426     return img::format("SEL.D %s, %s, %s", fd, fs, ft);
13427 }
13428
13429
13430 /*
13431  *
13432  *
13433  *   3         2         1
13434  *  10987654321098765432109876543210
13435  *  001000               01001001101
13436  *     rt -----
13437  *          rs -----
13438  *               rd -----
13439  */
13440 std::string NMD::SEL_S(uint64 instruction)
13441 {
13442     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
13443     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
13444     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
13445
13446     std::string fd = FPR(copy(fd_value));
13447     std::string fs = FPR(copy(fs_value));
13448     std::string ft = FPR(copy(ft_value));
13449
13450     return img::format("SEL.S %s, %s, %s", fd, fs, ft);
13451 }
13452
13453
13454 /*
13455  *
13456  *
13457  *   3         2         1
13458  *  10987654321098765432109876543210
13459  *  001000               01001001101
13460  *     rt -----
13461  *          rs -----
13462  *               rd -----
13463  */
13464 std::string NMD::SELEQZ_D(uint64 instruction)
13465 {
13466     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
13467     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
13468     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
13469
13470     std::string fd = FPR(copy(fd_value));
13471     std::string fs = FPR(copy(fs_value));
13472     std::string ft = FPR(copy(ft_value));
13473
13474     return img::format("SELEQZ.D %s, %s, %s", fd, fs, ft);
13475 }
13476
13477
13478 /*
13479  *
13480  *
13481  *   3         2         1
13482  *  10987654321098765432109876543210
13483  *  001000               01001001101
13484  *     rt -----
13485  *          rs -----
13486  *               rd -----
13487  */
13488 std::string NMD::SELEQZ_S(uint64 instruction)
13489 {
13490     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
13491     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
13492     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
13493
13494     std::string fd = FPR(copy(fd_value));
13495     std::string fs = FPR(copy(fs_value));
13496     std::string ft = FPR(copy(ft_value));
13497
13498     return img::format("SELEQZ.S %s, %s, %s", fd, fs, ft);
13499 }
13500
13501
13502 /*
13503  *
13504  *
13505  *   3         2         1
13506  *  10987654321098765432109876543210
13507  *  001000               01001001101
13508  *     rt -----
13509  *          rs -----
13510  *               rd -----
13511  */
13512 std::string NMD::SELNEZ_D(uint64 instruction)
13513 {
13514     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
13515     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
13516     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
13517
13518     std::string fd = FPR(copy(fd_value));
13519     std::string fs = FPR(copy(fs_value));
13520     std::string ft = FPR(copy(ft_value));
13521
13522     return img::format("SELNEZ.D %s, %s, %s", fd, fs, ft);
13523 }
13524
13525
13526 /*
13527  *
13528  *
13529  *   3         2         1
13530  *  10987654321098765432109876543210
13531  *  001000               01001001101
13532  *     rt -----
13533  *          rs -----
13534  *               rd -----
13535  */
13536 std::string NMD::SELNEZ_S(uint64 instruction)
13537 {
13538     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
13539     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
13540     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
13541
13542     std::string fd = FPR(copy(fd_value));
13543     std::string fs = FPR(copy(fs_value));
13544     std::string ft = FPR(copy(ft_value));
13545
13546     return img::format("SELNEZ.S %s, %s, %s", fd, fs, ft);
13547 }
13548
13549
13550 /*
13551  *
13552  *
13553  *   3         2         1
13554  *  10987654321098765432109876543210
13555  *  001000               01001001101
13556  *     rt -----
13557  *          rs -----
13558  *               rd -----
13559  */
13560 std::string NMD::SEQI(uint64 instruction)
13561 {
13562     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
13563     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
13564     uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
13565
13566     std::string rt = GPR(copy(rt_value));
13567     std::string rs = GPR(copy(rs_value));
13568     std::string u = IMMEDIATE(copy(u_value));
13569
13570     return img::format("SEQI %s, %s, %s", rt, rs, u);
13571 }
13572
13573
13574 /*
13575  *
13576  *
13577  *   3         2         1
13578  *  10987654321098765432109876543210
13579  *  001000               01001001101
13580  *     rt -----
13581  *          rs -----
13582  *               rd -----
13583  */
13584 std::string NMD::SH_16_(uint64 instruction)
13585 {
13586     uint64 rtz3_value = extract_rtz3_9_8_7(instruction);
13587     uint64 rs3_value = extract_rs3_6_5_4(instruction);
13588     uint64 u_value = extract_u_2_1__s1(instruction);
13589
13590     std::string rtz3 = GPR(encode_gpr3_store(rtz3_value));
13591     std::string u = IMMEDIATE(copy(u_value));
13592     std::string rs3 = GPR(decode_gpr_gpr3(rs3_value));
13593
13594     return img::format("SH %s, %s(%s)", rtz3, u, rs3);
13595 }
13596
13597
13598 /*
13599  *
13600  *
13601  *   3         2         1
13602  *  10987654321098765432109876543210
13603  *  001000               01001001101
13604  *     rt -----
13605  *          rs -----
13606  *               rd -----
13607  */
13608 std::string NMD::SH_GP_(uint64 instruction)
13609 {
13610     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
13611     uint64 u_value = extract_u_17_to_1__s1(instruction);
13612
13613     std::string rt = GPR(copy(rt_value));
13614     std::string u = IMMEDIATE(copy(u_value));
13615
13616     return img::format("SH %s, %s($%d)", rt, u, 28);
13617 }
13618
13619
13620 /*
13621  *
13622  *
13623  *   3         2         1
13624  *  10987654321098765432109876543210
13625  *  001000               01001001101
13626  *     rt -----
13627  *          rs -----
13628  *               rd -----
13629  */
13630 std::string NMD::SH_S9_(uint64 instruction)
13631 {
13632     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
13633     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
13634     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
13635
13636     std::string rt = GPR(copy(rt_value));
13637     std::string s = IMMEDIATE(copy(s_value));
13638     std::string rs = GPR(copy(rs_value));
13639
13640     return img::format("SH %s, %s(%s)", rt, s, rs);
13641 }
13642
13643
13644 /*
13645  *
13646  *
13647  *   3         2         1
13648  *  10987654321098765432109876543210
13649  *  001000               01001001101
13650  *     rt -----
13651  *          rs -----
13652  *               rd -----
13653  */
13654 std::string NMD::SH_U12_(uint64 instruction)
13655 {
13656     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
13657     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
13658     uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
13659
13660     std::string rt = GPR(copy(rt_value));
13661     std::string u = IMMEDIATE(copy(u_value));
13662     std::string rs = GPR(copy(rs_value));
13663
13664     return img::format("SH %s, %s(%s)", rt, u, rs);
13665 }
13666
13667
13668 /*
13669  *
13670  *
13671  *   3         2         1
13672  *  10987654321098765432109876543210
13673  *  001000               01001001101
13674  *     rt -----
13675  *          rs -----
13676  *               rd -----
13677  */
13678 std::string NMD::SHE(uint64 instruction)
13679 {
13680     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
13681     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
13682     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
13683
13684     std::string rt = GPR(copy(rt_value));
13685     std::string s = IMMEDIATE(copy(s_value));
13686     std::string rs = GPR(copy(rs_value));
13687
13688     return img::format("SHE %s, %s(%s)", rt, s, rs);
13689 }
13690
13691
13692 /*
13693  * SHILO ac, shift - Shift an Accumulator Value Leaving the Result in the Same
13694  *                     Accumulator
13695  *
13696  *   3         2         1
13697  *  10987654321098765432109876543210
13698  *  001000xxxx        xxxx0000011101
13699  *      shift ------
13700  *               ac --
13701  */
13702 std::string NMD::SHILO(uint64 instruction)
13703 {
13704     int64 shift_value = extract_shift__se5_21_20_19_18_17_16(instruction);
13705     uint64 ac_value = extract_ac_13_12(instruction);
13706
13707     std::string shift = IMMEDIATE(copy(shift_value));
13708     std::string ac = AC(copy(ac_value));
13709
13710     return img::format("SHILO %s, %s", ac, shift);
13711 }
13712
13713
13714 /*
13715  * SHILOV ac, rs - Variable Shift of Accumulator Value Leaving the Result in
13716  *                   the Same Accumulator
13717  *
13718  *   3         2         1
13719  *  10987654321098765432109876543210
13720  *  001000xxxxx       01001001111111
13721  *          rs -----
13722  *               ac --
13723  */
13724 std::string NMD::SHILOV(uint64 instruction)
13725 {
13726     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
13727     uint64 ac_value = extract_ac_13_12(instruction);
13728
13729     std::string rs = GPR(copy(rs_value));
13730     std::string ac = AC(copy(ac_value));
13731
13732     return img::format("SHILOV %s, %s", ac, rs);
13733 }
13734
13735
13736 /*
13737  * SHLL.PH rt, rs, sa - Shift Left Logical Vector Pair Halfwords
13738  *
13739  *   3         2         1
13740  *  10987654321098765432109876543210
13741  *  001000              001110110101
13742  *     rt -----
13743  *          rs -----
13744  *               sa ----
13745  */
13746 std::string NMD::SHLL_PH(uint64 instruction)
13747 {
13748     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
13749     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
13750     uint64 sa_value = extract_sa_15_14_13_12(instruction);
13751
13752     std::string rt = GPR(copy(rt_value));
13753     std::string rs = GPR(copy(rs_value));
13754     std::string sa = IMMEDIATE(copy(sa_value));
13755
13756     return img::format("SHLL.PH %s, %s, %s", rt, rs, sa);
13757 }
13758
13759
13760 /*
13761  * SHLL.QB rt, rs, sa - Shift Left Logical Vector Quad Bytes
13762  *
13763  *   3         2         1
13764  *  10987654321098765432109876543210
13765  *  001000             0100001111111
13766  *     rt -----
13767  *          rs -----
13768  *               sa ---
13769  */
13770 std::string NMD::SHLL_QB(uint64 instruction)
13771 {
13772     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
13773     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
13774     uint64 sa_value = extract_sa_15_14_13(instruction);
13775
13776     std::string rt = GPR(copy(rt_value));
13777     std::string rs = GPR(copy(rs_value));
13778     std::string sa = IMMEDIATE(copy(sa_value));
13779
13780     return img::format("SHLL.QB %s, %s, %s", rt, rs, sa);
13781 }
13782
13783
13784 /*
13785  * SHLL_S.PH rt, rs, sa - Shift Left Logical Vector Pair Halfwords (saturated)
13786  *
13787  *   3         2         1
13788  *  10987654321098765432109876543210
13789  *  001000              001110110101
13790  *     rt -----
13791  *          rs -----
13792  *               sa ----
13793  */
13794 std::string NMD::SHLL_S_PH(uint64 instruction)
13795 {
13796     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
13797     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
13798     uint64 sa_value = extract_sa_15_14_13_12(instruction);
13799
13800     std::string rt = GPR(copy(rt_value));
13801     std::string rs = GPR(copy(rs_value));
13802     std::string sa = IMMEDIATE(copy(sa_value));
13803
13804     return img::format("SHLL_S.PH %s, %s, %s", rt, rs, sa);
13805 }
13806
13807
13808 /*
13809  *
13810  *
13811  *   3         2         1
13812  *  10987654321098765432109876543210
13813  *  001000               01001001101
13814  *     rt -----
13815  *          rs -----
13816  *               rd -----
13817  */
13818 std::string NMD::SHLL_S_W(uint64 instruction)
13819 {
13820     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
13821     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
13822     uint64 sa_value = extract_sa_15_14_13_12_11(instruction);
13823
13824     std::string rt = GPR(copy(rt_value));
13825     std::string rs = GPR(copy(rs_value));
13826     std::string sa = IMMEDIATE(copy(sa_value));
13827
13828     return img::format("SHLL_S.W %s, %s, %s", rt, rs, sa);
13829 }
13830
13831
13832 /*
13833  *
13834  *
13835  *   3         2         1
13836  *  10987654321098765432109876543210
13837  *  001000               01001001101
13838  *     rt -----
13839  *          rs -----
13840  *               rd -----
13841  */
13842 std::string NMD::SHLLV_PH(uint64 instruction)
13843 {
13844     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
13845     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
13846     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
13847
13848     std::string rd = GPR(copy(rd_value));
13849     std::string rt = GPR(copy(rt_value));
13850     std::string rs = GPR(copy(rs_value));
13851
13852     return img::format("SHLLV.PH %s, %s, %s", rd, rt, rs);
13853 }
13854
13855
13856 /*
13857  *
13858  *
13859  *   3         2         1
13860  *  10987654321098765432109876543210
13861  *  001000               01001001101
13862  *     rt -----
13863  *          rs -----
13864  *               rd -----
13865  */
13866 std::string NMD::SHLLV_QB(uint64 instruction)
13867 {
13868     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
13869     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
13870     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
13871
13872     std::string rd = GPR(copy(rd_value));
13873     std::string rt = GPR(copy(rt_value));
13874     std::string rs = GPR(copy(rs_value));
13875
13876     return img::format("SHLLV.QB %s, %s, %s", rd, rt, rs);
13877 }
13878
13879
13880 /*
13881  *
13882  *
13883  *   3         2         1
13884  *  10987654321098765432109876543210
13885  *  001000               01001001101
13886  *     rt -----
13887  *          rs -----
13888  *               rd -----
13889  */
13890 std::string NMD::SHLLV_S_PH(uint64 instruction)
13891 {
13892     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
13893     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
13894     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
13895
13896     std::string rd = GPR(copy(rd_value));
13897     std::string rt = GPR(copy(rt_value));
13898     std::string rs = GPR(copy(rs_value));
13899
13900     return img::format("SHLLV_S.PH %s, %s, %s", rd, rt, rs);
13901 }
13902
13903
13904 /*
13905  *
13906  *
13907  *   3         2         1
13908  *  10987654321098765432109876543210
13909  *  001000               01001001101
13910  *     rt -----
13911  *          rs -----
13912  *               rd -----
13913  */
13914 std::string NMD::SHLLV_S_W(uint64 instruction)
13915 {
13916     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
13917     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
13918     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
13919
13920     std::string rd = GPR(copy(rd_value));
13921     std::string rt = GPR(copy(rt_value));
13922     std::string rs = GPR(copy(rs_value));
13923
13924     return img::format("SHLLV_S.W %s, %s, %s", rd, rt, rs);
13925 }
13926
13927
13928 /*
13929  *
13930  *
13931  *   3         2         1
13932  *  10987654321098765432109876543210
13933  *  001000               01001001101
13934  *     rt -----
13935  *          rs -----
13936  *               rd -----
13937  */
13938 std::string NMD::SHRA_PH(uint64 instruction)
13939 {
13940     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
13941     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
13942     uint64 sa_value = extract_sa_15_14_13_12(instruction);
13943
13944     std::string rt = GPR(copy(rt_value));
13945     std::string rs = GPR(copy(rs_value));
13946     std::string sa = IMMEDIATE(copy(sa_value));
13947
13948     return img::format("SHRA.PH %s, %s, %s", rt, rs, sa);
13949 }
13950
13951
13952 /*
13953  *
13954  *
13955  *   3         2         1
13956  *  10987654321098765432109876543210
13957  *  001000               01001001101
13958  *     rt -----
13959  *          rs -----
13960  *               rd -----
13961  */
13962 std::string NMD::SHRA_QB(uint64 instruction)
13963 {
13964     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
13965     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
13966     uint64 sa_value = extract_sa_15_14_13(instruction);
13967
13968     std::string rt = GPR(copy(rt_value));
13969     std::string rs = GPR(copy(rs_value));
13970     std::string sa = IMMEDIATE(copy(sa_value));
13971
13972     return img::format("SHRA.QB %s, %s, %s", rt, rs, sa);
13973 }
13974
13975
13976 /*
13977  *
13978  *
13979  *   3         2         1
13980  *  10987654321098765432109876543210
13981  *  001000               01001001101
13982  *     rt -----
13983  *          rs -----
13984  *               rd -----
13985  */
13986 std::string NMD::SHRA_R_PH(uint64 instruction)
13987 {
13988     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
13989     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
13990     uint64 sa_value = extract_sa_15_14_13_12(instruction);
13991
13992     std::string rt = GPR(copy(rt_value));
13993     std::string rs = GPR(copy(rs_value));
13994     std::string sa = IMMEDIATE(copy(sa_value));
13995
13996     return img::format("SHRA_R.PH %s, %s, %s", rt, rs, sa);
13997 }
13998
13999
14000 /*
14001  *
14002  *
14003  *   3         2         1
14004  *  10987654321098765432109876543210
14005  *  001000               01001001101
14006  *     rt -----
14007  *          rs -----
14008  *               rd -----
14009  */
14010 std::string NMD::SHRA_R_QB(uint64 instruction)
14011 {
14012     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
14013     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14014     uint64 sa_value = extract_sa_15_14_13(instruction);
14015
14016     std::string rt = GPR(copy(rt_value));
14017     std::string rs = GPR(copy(rs_value));
14018     std::string sa = IMMEDIATE(copy(sa_value));
14019
14020     return img::format("SHRA_R.QB %s, %s, %s", rt, rs, sa);
14021 }
14022
14023
14024 /*
14025  *
14026  *
14027  *   3         2         1
14028  *  10987654321098765432109876543210
14029  *  001000               01001001101
14030  *     rt -----
14031  *          rs -----
14032  *               rd -----
14033  */
14034 std::string NMD::SHRA_R_W(uint64 instruction)
14035 {
14036     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
14037     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14038     uint64 sa_value = extract_sa_15_14_13_12_11(instruction);
14039
14040     std::string rt = GPR(copy(rt_value));
14041     std::string rs = GPR(copy(rs_value));
14042     std::string sa = IMMEDIATE(copy(sa_value));
14043
14044     return img::format("SHRA_R.W %s, %s, %s", rt, rs, sa);
14045 }
14046
14047
14048 /*
14049  *
14050  *
14051  *   3         2         1
14052  *  10987654321098765432109876543210
14053  *  001000               01001001101
14054  *     rt -----
14055  *          rs -----
14056  *               rd -----
14057  */
14058 std::string NMD::SHRAV_PH(uint64 instruction)
14059 {
14060     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
14061     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14062     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
14063
14064     std::string rd = GPR(copy(rd_value));
14065     std::string rt = GPR(copy(rt_value));
14066     std::string rs = GPR(copy(rs_value));
14067
14068     return img::format("SHRAV.PH %s, %s, %s", rd, rt, rs);
14069 }
14070
14071
14072 /*
14073  *
14074  *
14075  *   3         2         1
14076  *  10987654321098765432109876543210
14077  *  001000               01001001101
14078  *     rt -----
14079  *          rs -----
14080  *               rd -----
14081  */
14082 std::string NMD::SHRAV_QB(uint64 instruction)
14083 {
14084     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
14085     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14086     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
14087
14088     std::string rd = GPR(copy(rd_value));
14089     std::string rt = GPR(copy(rt_value));
14090     std::string rs = GPR(copy(rs_value));
14091
14092     return img::format("SHRAV.QB %s, %s, %s", rd, rt, rs);
14093 }
14094
14095
14096 /*
14097  *
14098  *
14099  *   3         2         1
14100  *  10987654321098765432109876543210
14101  *  001000               01001001101
14102  *     rt -----
14103  *          rs -----
14104  *               rd -----
14105  */
14106 std::string NMD::SHRAV_R_PH(uint64 instruction)
14107 {
14108     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
14109     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14110     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
14111
14112     std::string rd = GPR(copy(rd_value));
14113     std::string rt = GPR(copy(rt_value));
14114     std::string rs = GPR(copy(rs_value));
14115
14116     return img::format("SHRAV_R.PH %s, %s, %s", rd, rt, rs);
14117 }
14118
14119
14120 /*
14121  *
14122  *
14123  *   3         2         1
14124  *  10987654321098765432109876543210
14125  *  001000               01001001101
14126  *     rt -----
14127  *          rs -----
14128  *               rd -----
14129  */
14130 std::string NMD::SHRAV_R_QB(uint64 instruction)
14131 {
14132     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
14133     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14134     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
14135
14136     std::string rd = GPR(copy(rd_value));
14137     std::string rt = GPR(copy(rt_value));
14138     std::string rs = GPR(copy(rs_value));
14139
14140     return img::format("SHRAV_R.QB %s, %s, %s", rd, rt, rs);
14141 }
14142
14143
14144 /*
14145  *
14146  *
14147  *   3         2         1
14148  *  10987654321098765432109876543210
14149  *  001000               01001001101
14150  *     rt -----
14151  *          rs -----
14152  *               rd -----
14153  */
14154 std::string NMD::SHRAV_R_W(uint64 instruction)
14155 {
14156     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
14157     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14158     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
14159
14160     std::string rd = GPR(copy(rd_value));
14161     std::string rt = GPR(copy(rt_value));
14162     std::string rs = GPR(copy(rs_value));
14163
14164     return img::format("SHRAV_R.W %s, %s, %s", rd, rt, rs);
14165 }
14166
14167
14168 /*
14169  *
14170  *
14171  *   3         2         1
14172  *  10987654321098765432109876543210
14173  *  001000               01001001101
14174  *     rt -----
14175  *          rs -----
14176  *               rd -----
14177  */
14178 std::string NMD::SHRL_PH(uint64 instruction)
14179 {
14180     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
14181     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14182     uint64 sa_value = extract_sa_15_14_13_12(instruction);
14183
14184     std::string rt = GPR(copy(rt_value));
14185     std::string rs = GPR(copy(rs_value));
14186     std::string sa = IMMEDIATE(copy(sa_value));
14187
14188     return img::format("SHRL.PH %s, %s, %s", rt, rs, sa);
14189 }
14190
14191
14192 /*
14193  *
14194  *
14195  *   3         2         1
14196  *  10987654321098765432109876543210
14197  *  001000               01001001101
14198  *     rt -----
14199  *          rs -----
14200  *               rd -----
14201  */
14202 std::string NMD::SHRL_QB(uint64 instruction)
14203 {
14204     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
14205     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14206     uint64 sa_value = extract_sa_15_14_13(instruction);
14207
14208     std::string rt = GPR(copy(rt_value));
14209     std::string rs = GPR(copy(rs_value));
14210     std::string sa = IMMEDIATE(copy(sa_value));
14211
14212     return img::format("SHRL.QB %s, %s, %s", rt, rs, sa);
14213 }
14214
14215
14216 /*
14217  *
14218  *
14219  *   3         2         1
14220  *  10987654321098765432109876543210
14221  *  001000               01001001101
14222  *     rt -----
14223  *          rs -----
14224  *               rd -----
14225  */
14226 std::string NMD::SHRLV_PH(uint64 instruction)
14227 {
14228     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
14229     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14230     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
14231
14232     std::string rd = GPR(copy(rd_value));
14233     std::string rt = GPR(copy(rt_value));
14234     std::string rs = GPR(copy(rs_value));
14235
14236     return img::format("SHRLV.PH %s, %s, %s", rd, rt, rs);
14237 }
14238
14239
14240 /*
14241  *
14242  *
14243  *   3         2         1
14244  *  10987654321098765432109876543210
14245  *  001000               01001001101
14246  *     rt -----
14247  *          rs -----
14248  *               rd -----
14249  */
14250 std::string NMD::SHRLV_QB(uint64 instruction)
14251 {
14252     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
14253     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14254     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
14255
14256     std::string rd = GPR(copy(rd_value));
14257     std::string rt = GPR(copy(rt_value));
14258     std::string rs = GPR(copy(rs_value));
14259
14260     return img::format("SHRLV.QB %s, %s, %s", rd, rt, rs);
14261 }
14262
14263
14264 /*
14265  *
14266  *
14267  *   3         2         1
14268  *  10987654321098765432109876543210
14269  *  001000               01001001101
14270  *     rt -----
14271  *          rs -----
14272  *               rd -----
14273  */
14274 std::string NMD::SHX(uint64 instruction)
14275 {
14276     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
14277     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14278     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
14279
14280     std::string rd = GPR(copy(rd_value));
14281     std::string rs = GPR(copy(rs_value));
14282     std::string rt = GPR(copy(rt_value));
14283
14284     return img::format("SHX %s, %s(%s)", rd, rs, rt);
14285 }
14286
14287
14288 /*
14289  *
14290  *
14291  *   3         2         1
14292  *  10987654321098765432109876543210
14293  *  001000               01001001101
14294  *     rt -----
14295  *          rs -----
14296  *               rd -----
14297  */
14298 std::string NMD::SHXS(uint64 instruction)
14299 {
14300     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
14301     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14302     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
14303
14304     std::string rd = GPR(copy(rd_value));
14305     std::string rs = GPR(copy(rs_value));
14306     std::string rt = GPR(copy(rt_value));
14307
14308     return img::format("SHXS %s, %s(%s)", rd, rs, rt);
14309 }
14310
14311
14312 /*
14313  *
14314  *
14315  *   3         2         1
14316  *  10987654321098765432109876543210
14317  *  001000               01001001101
14318  *     rt -----
14319  *          rs -----
14320  *               rd -----
14321  */
14322 std::string NMD::SIGRIE(uint64 instruction)
14323 {
14324     uint64 code_value = extract_code_18_to_0(instruction);
14325
14326     std::string code = IMMEDIATE(copy(code_value));
14327
14328     return img::format("SIGRIE %s", code);
14329 }
14330
14331
14332 /*
14333  *
14334  *
14335  *   3         2         1
14336  *  10987654321098765432109876543210
14337  *  001000               01001001101
14338  *     rt -----
14339  *          rs -----
14340  *               rd -----
14341  */
14342 std::string NMD::SLL_16_(uint64 instruction)
14343 {
14344     uint64 rt3_value = extract_rt3_9_8_7(instruction);
14345     uint64 rs3_value = extract_rs3_6_5_4(instruction);
14346     uint64 shift3_value = extract_shift3_2_1_0(instruction);
14347
14348     std::string rt3 = GPR(decode_gpr_gpr3(rt3_value));
14349     std::string rs3 = GPR(decode_gpr_gpr3(rs3_value));
14350     std::string shift3 = IMMEDIATE(encode_shift3_from_shift(shift3_value));
14351
14352     return img::format("SLL %s, %s, %s", rt3, rs3, shift3);
14353 }
14354
14355
14356 /*
14357  *
14358  *
14359  *   3         2         1
14360  *  10987654321098765432109876543210
14361  *  001000               01001001101
14362  *     rt -----
14363  *          rs -----
14364  *               rd -----
14365  */
14366 std::string NMD::SLL_32_(uint64 instruction)
14367 {
14368     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
14369     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14370     uint64 shift_value = extract_shift_4_3_2_1_0(instruction);
14371
14372     std::string rt = GPR(copy(rt_value));
14373     std::string rs = GPR(copy(rs_value));
14374     std::string shift = IMMEDIATE(copy(shift_value));
14375
14376     return img::format("SLL %s, %s, %s", rt, rs, shift);
14377 }
14378
14379
14380 /*
14381  *
14382  *
14383  *   3         2         1
14384  *  10987654321098765432109876543210
14385  *  001000               01001001101
14386  *     rt -----
14387  *          rs -----
14388  *               rd -----
14389  */
14390 std::string NMD::SLLV(uint64 instruction)
14391 {
14392     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
14393     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14394     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
14395
14396     std::string rd = GPR(copy(rd_value));
14397     std::string rs = GPR(copy(rs_value));
14398     std::string rt = GPR(copy(rt_value));
14399
14400     return img::format("SLLV %s, %s, %s", rd, rs, rt);
14401 }
14402
14403
14404 /*
14405  *
14406  *
14407  *   3         2         1
14408  *  10987654321098765432109876543210
14409  *  001000               01001001101
14410  *     rt -----
14411  *          rs -----
14412  *               rd -----
14413  */
14414 std::string NMD::SLT(uint64 instruction)
14415 {
14416     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
14417     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14418     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
14419
14420     std::string rd = GPR(copy(rd_value));
14421     std::string rs = GPR(copy(rs_value));
14422     std::string rt = GPR(copy(rt_value));
14423
14424     return img::format("SLT %s, %s, %s", rd, rs, rt);
14425 }
14426
14427
14428 /*
14429  *
14430  *
14431  *   3         2         1
14432  *  10987654321098765432109876543210
14433  *  001000               01001001101
14434  *     rt -----
14435  *          rs -----
14436  *               rd -----
14437  */
14438 std::string NMD::SLTI(uint64 instruction)
14439 {
14440     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
14441     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14442     uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
14443
14444     std::string rt = GPR(copy(rt_value));
14445     std::string rs = GPR(copy(rs_value));
14446     std::string u = IMMEDIATE(copy(u_value));
14447
14448     return img::format("SLTI %s, %s, %s", rt, rs, u);
14449 }
14450
14451
14452 /*
14453  *
14454  *
14455  *   3         2         1
14456  *  10987654321098765432109876543210
14457  *  001000               01001001101
14458  *     rt -----
14459  *          rs -----
14460  *               rd -----
14461  */
14462 std::string NMD::SLTIU(uint64 instruction)
14463 {
14464     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
14465     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14466     uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
14467
14468     std::string rt = GPR(copy(rt_value));
14469     std::string rs = GPR(copy(rs_value));
14470     std::string u = IMMEDIATE(copy(u_value));
14471
14472     return img::format("SLTIU %s, %s, %s", rt, rs, u);
14473 }
14474
14475
14476 /*
14477  *
14478  *
14479  *   3         2         1
14480  *  10987654321098765432109876543210
14481  *  001000               01001001101
14482  *     rt -----
14483  *          rs -----
14484  *               rd -----
14485  */
14486 std::string NMD::SLTU(uint64 instruction)
14487 {
14488     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
14489     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14490     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
14491
14492     std::string rd = GPR(copy(rd_value));
14493     std::string rs = GPR(copy(rs_value));
14494     std::string rt = GPR(copy(rt_value));
14495
14496     return img::format("SLTU %s, %s, %s", rd, rs, rt);
14497 }
14498
14499
14500 /*
14501  *
14502  *
14503  *   3         2         1
14504  *  10987654321098765432109876543210
14505  *  001000               01001001101
14506  *     rt -----
14507  *          rs -----
14508  *               rd -----
14509  */
14510 std::string NMD::SOV(uint64 instruction)
14511 {
14512     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
14513     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14514     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
14515
14516     std::string rd = GPR(copy(rd_value));
14517     std::string rs = GPR(copy(rs_value));
14518     std::string rt = GPR(copy(rt_value));
14519
14520     return img::format("SOV %s, %s, %s", rd, rs, rt);
14521 }
14522
14523
14524 /*
14525  *
14526  *
14527  *   3         2         1
14528  *  10987654321098765432109876543210
14529  *  001000               01001001101
14530  *     rt -----
14531  *          rs -----
14532  *               rd -----
14533  */
14534 std::string NMD::SPECIAL2(uint64 instruction)
14535 {
14536     uint64 op_value = extract_op_25_to_3(instruction);
14537
14538     std::string op = IMMEDIATE(copy(op_value));
14539
14540     return img::format("SPECIAL2 %s", op);
14541 }
14542
14543
14544 /*
14545  *
14546  *
14547  *   3         2         1
14548  *  10987654321098765432109876543210
14549  *  001000               01001001101
14550  *     rt -----
14551  *          rs -----
14552  *               rd -----
14553  */
14554 std::string NMD::SQRT_D(uint64 instruction)
14555 {
14556     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
14557     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
14558
14559     std::string ft = FPR(copy(ft_value));
14560     std::string fs = FPR(copy(fs_value));
14561
14562     return img::format("SQRT.D %s, %s", ft, fs);
14563 }
14564
14565
14566 /*
14567  *
14568  *
14569  *   3         2         1
14570  *  10987654321098765432109876543210
14571  *  001000               01001001101
14572  *     rt -----
14573  *          rs -----
14574  *               rd -----
14575  */
14576 std::string NMD::SQRT_S(uint64 instruction)
14577 {
14578     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
14579     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
14580
14581     std::string ft = FPR(copy(ft_value));
14582     std::string fs = FPR(copy(fs_value));
14583
14584     return img::format("SQRT.S %s, %s", ft, fs);
14585 }
14586
14587
14588 /*
14589  * SRA rd, rt, sa - Shift Word Right Arithmetic
14590  *
14591  *   3         2         1
14592  *  10987654321098765432109876543210
14593  *  00000000000               000011
14594  *          rt -----
14595  *               rd -----
14596  *                    sa -----
14597  */
14598 std::string NMD::SRA(uint64 instruction)
14599 {
14600     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
14601     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14602     uint64 shift_value = extract_shift_4_3_2_1_0(instruction);
14603
14604     std::string rt = GPR(copy(rt_value));
14605     std::string rs = GPR(copy(rs_value));
14606     std::string shift = IMMEDIATE(copy(shift_value));
14607
14608     return img::format("SRA %s, %s, %s", rt, rs, shift);
14609 }
14610
14611
14612 /*
14613  * SRAV rd, rt, rs - Shift Word Right Arithmetic Variable
14614  *
14615  *   3         2         1
14616  *  10987654321098765432109876543210
14617  *  001000               00000000111
14618  *     rs -----
14619  *          rt -----
14620  *               rd -----
14621  */
14622 std::string NMD::SRAV(uint64 instruction)
14623 {
14624     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
14625     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14626     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
14627
14628     std::string rd = GPR(copy(rd_value));
14629     std::string rs = GPR(copy(rs_value));
14630     std::string rt = GPR(copy(rt_value));
14631
14632     return img::format("SRAV %s, %s, %s", rd, rs, rt);
14633 }
14634
14635
14636 /*
14637  *
14638  *
14639  *   3         2         1
14640  *  10987654321098765432109876543210
14641  *  001000               00000000111
14642  *     rs -----
14643  *          rt -----
14644  *               rd -----
14645  */
14646 std::string NMD::SRL_16_(uint64 instruction)
14647 {
14648     uint64 rt3_value = extract_rt3_9_8_7(instruction);
14649     uint64 rs3_value = extract_rs3_6_5_4(instruction);
14650     uint64 shift3_value = extract_shift3_2_1_0(instruction);
14651
14652     std::string rt3 = GPR(decode_gpr_gpr3(rt3_value));
14653     std::string rs3 = GPR(decode_gpr_gpr3(rs3_value));
14654     std::string shift3 = IMMEDIATE(encode_shift3_from_shift(shift3_value));
14655
14656     return img::format("SRL %s, %s, %s", rt3, rs3, shift3);
14657 }
14658
14659
14660 /*
14661  *
14662  *
14663  *   3         2         1
14664  *  10987654321098765432109876543210
14665  *  001000               01001001101
14666  *     rt -----
14667  *          rs -----
14668  *               rd -----
14669  */
14670 std::string NMD::SRL_32_(uint64 instruction)
14671 {
14672     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
14673     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14674     uint64 shift_value = extract_shift_4_3_2_1_0(instruction);
14675
14676     std::string rt = GPR(copy(rt_value));
14677     std::string rs = GPR(copy(rs_value));
14678     std::string shift = IMMEDIATE(copy(shift_value));
14679
14680     return img::format("SRL %s, %s, %s", rt, rs, shift);
14681 }
14682
14683
14684 /*
14685  *
14686  *
14687  *   3         2         1
14688  *  10987654321098765432109876543210
14689  *  001000               01001001101
14690  *     rt -----
14691  *          rs -----
14692  *               rd -----
14693  */
14694 std::string NMD::SRLV(uint64 instruction)
14695 {
14696     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
14697     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14698     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
14699
14700     std::string rd = GPR(copy(rd_value));
14701     std::string rs = GPR(copy(rs_value));
14702     std::string rt = GPR(copy(rt_value));
14703
14704     return img::format("SRLV %s, %s, %s", rd, rs, rt);
14705 }
14706
14707
14708 /*
14709  *
14710  *
14711  *   3         2         1
14712  *  10987654321098765432109876543210
14713  *  001000               01001001101
14714  *     rt -----
14715  *          rs -----
14716  *               rd -----
14717  */
14718 std::string NMD::SUB(uint64 instruction)
14719 {
14720     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
14721     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14722     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
14723
14724     std::string rd = GPR(copy(rd_value));
14725     std::string rs = GPR(copy(rs_value));
14726     std::string rt = GPR(copy(rt_value));
14727
14728     return img::format("SUB %s, %s, %s", rd, rs, rt);
14729 }
14730
14731
14732 /*
14733  *
14734  *
14735  *   3         2         1
14736  *  10987654321098765432109876543210
14737  *  001000               01001001101
14738  *     rt -----
14739  *          rs -----
14740  *               rd -----
14741  */
14742 std::string NMD::SUB_D(uint64 instruction)
14743 {
14744     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
14745     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
14746     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
14747
14748     std::string fd = FPR(copy(fd_value));
14749     std::string fs = FPR(copy(fs_value));
14750     std::string ft = FPR(copy(ft_value));
14751
14752     return img::format("SUB.D %s, %s, %s", fd, fs, ft);
14753 }
14754
14755
14756 /*
14757  *
14758  *
14759  *   3         2         1
14760  *  10987654321098765432109876543210
14761  *  001000               01001001101
14762  *     rt -----
14763  *          rs -----
14764  *               rd -----
14765  */
14766 std::string NMD::SUB_S(uint64 instruction)
14767 {
14768     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
14769     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
14770     uint64 fd_value = extract_fd_15_14_13_12_11(instruction);
14771
14772     std::string fd = FPR(copy(fd_value));
14773     std::string fs = FPR(copy(fs_value));
14774     std::string ft = FPR(copy(ft_value));
14775
14776     return img::format("SUB.S %s, %s, %s", fd, fs, ft);
14777 }
14778
14779
14780 /*
14781  *
14782  *
14783  *   3         2         1
14784  *  10987654321098765432109876543210
14785  *  001000               01001001101
14786  *     rt -----
14787  *          rs -----
14788  *               rd -----
14789  */
14790 std::string NMD::SUBQ_PH(uint64 instruction)
14791 {
14792     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
14793     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14794     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
14795
14796     std::string rd = GPR(copy(rd_value));
14797     std::string rs = GPR(copy(rs_value));
14798     std::string rt = GPR(copy(rt_value));
14799
14800     return img::format("SUBQ.PH %s, %s, %s", rd, rs, rt);
14801 }
14802
14803
14804 /*
14805  * SUBQH.PH rd, rt, rs - Subtract Fractional Halfword Vectors And Shift Right
14806  *                         to Halve Results
14807  *
14808  *   3         2         1
14809  *  10987654321098765432109876543210
14810  *  001000               01001001101
14811  *     rt -----
14812  *          rs -----
14813  *               rd -----
14814  */
14815 std::string NMD::SUBQ_S_PH(uint64 instruction)
14816 {
14817     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
14818     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14819     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
14820
14821     std::string rd = GPR(copy(rd_value));
14822     std::string rs = GPR(copy(rs_value));
14823     std::string rt = GPR(copy(rt_value));
14824
14825     return img::format("SUBQ_S.PH %s, %s, %s", rd, rs, rt);
14826 }
14827
14828
14829 /*
14830  * SUBQH.PH rd, rt, rs - Subtract Fractional Halfword Vectors And Shift Right
14831  *                         to Halve Results
14832  *
14833  *   3         2         1
14834  *  10987654321098765432109876543210
14835  *  001000               01001001101
14836  *     rt -----
14837  *          rs -----
14838  *               rd -----
14839  */
14840 std::string NMD::SUBQ_S_W(uint64 instruction)
14841 {
14842     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
14843     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14844     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
14845
14846     std::string rd = GPR(copy(rd_value));
14847     std::string rs = GPR(copy(rs_value));
14848     std::string rt = GPR(copy(rt_value));
14849
14850     return img::format("SUBQ_S.W %s, %s, %s", rd, rs, rt);
14851 }
14852
14853
14854 /*
14855  * SUBQH.PH rd, rt, rs - Subtract Fractional Halfword Vectors And Shift Right
14856  *                         to Halve Results
14857  *
14858  *   3         2         1
14859  *  10987654321098765432109876543210
14860  *  001000               01001001101
14861  *     rt -----
14862  *          rs -----
14863  *               rd -----
14864  */
14865 std::string NMD::SUBQH_PH(uint64 instruction)
14866 {
14867     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
14868     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14869     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
14870
14871     std::string rd = GPR(copy(rd_value));
14872     std::string rs = GPR(copy(rs_value));
14873     std::string rt = GPR(copy(rt_value));
14874
14875     return img::format("SUBQH.PH %s, %s, %s", rd, rs, rt);
14876 }
14877
14878
14879 /*
14880  * SUBQH.PH rd, rt, rs - Subtract Fractional Halfword Vectors And Shift Right
14881  *                         to Halve Results
14882  *
14883  *   3         2         1
14884  *  10987654321098765432109876543210
14885  *  001000               01001001101
14886  *     rt -----
14887  *          rs -----
14888  *               rd -----
14889  */
14890 std::string NMD::SUBQH_R_PH(uint64 instruction)
14891 {
14892     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
14893     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14894     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
14895
14896     std::string rd = GPR(copy(rd_value));
14897     std::string rs = GPR(copy(rs_value));
14898     std::string rt = GPR(copy(rt_value));
14899
14900     return img::format("SUBQH_R.PH %s, %s, %s", rd, rs, rt);
14901 }
14902
14903
14904 /*
14905  * SUBQH_R.PH rd, rt, rs - Subtract Fractional Halfword Vectors And Shift Right
14906  *                           to Halve Results (rounding)
14907  *
14908  *   3         2         1
14909  *  10987654321098765432109876543210
14910  *  001000               11001001101
14911  *     rt -----
14912  *          rs -----
14913  *               rd -----
14914  */
14915 std::string NMD::SUBQH_R_W(uint64 instruction)
14916 {
14917     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
14918     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14919     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
14920
14921     std::string rd = GPR(copy(rd_value));
14922     std::string rs = GPR(copy(rs_value));
14923     std::string rt = GPR(copy(rt_value));
14924
14925     return img::format("SUBQH_R.W %s, %s, %s", rd, rs, rt);
14926 }
14927
14928
14929 /*
14930  * SUBQH.W rd, rs, rt - Subtract Fractional Words And Shift Right to Halve
14931  *                        Results
14932  *
14933  *   3         2         1
14934  *  10987654321098765432109876543210
14935  *  001000               01010001101
14936  *     rt -----
14937  *          rs -----
14938  *               rd -----
14939  */
14940 std::string NMD::SUBQH_W(uint64 instruction)
14941 {
14942     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
14943     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14944     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
14945
14946     std::string rd = GPR(copy(rd_value));
14947     std::string rs = GPR(copy(rs_value));
14948     std::string rt = GPR(copy(rt_value));
14949
14950     return img::format("SUBQH.W %s, %s, %s", rd, rs, rt);
14951 }
14952
14953
14954 /*
14955  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
14956  *
14957  *   3         2         1
14958  *  10987654321098765432109876543210
14959  *  001000               00010001101
14960  *     rt -----
14961  *          rs -----
14962  *               rd -----
14963  */
14964 std::string NMD::SUBU_16_(uint64 instruction)
14965 {
14966     uint64 rt3_value = extract_rt3_9_8_7(instruction);
14967     uint64 rs3_value = extract_rs3_6_5_4(instruction);
14968     uint64 rd3_value = extract_rd3_3_2_1(instruction);
14969
14970     std::string rd3 = GPR(decode_gpr_gpr3(rd3_value));
14971     std::string rs3 = GPR(decode_gpr_gpr3(rs3_value));
14972     std::string rt3 = GPR(decode_gpr_gpr3(rt3_value));
14973
14974     return img::format("SUBU %s, %s, %s", rd3, rs3, rt3);
14975 }
14976
14977
14978 /*
14979  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
14980  *
14981  *   3         2         1
14982  *  10987654321098765432109876543210
14983  *  001000               00010001101
14984  *     rt -----
14985  *          rs -----
14986  *               rd -----
14987  */
14988 std::string NMD::SUBU_32_(uint64 instruction)
14989 {
14990     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
14991     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
14992     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
14993
14994     std::string rd = GPR(copy(rd_value));
14995     std::string rs = GPR(copy(rs_value));
14996     std::string rt = GPR(copy(rt_value));
14997
14998     return img::format("SUBU %s, %s, %s", rd, rs, rt);
14999 }
15000
15001
15002 /*
15003  * SUBU.PH rd, rs, rt - Subtract Unsigned Integer Halfwords
15004  *
15005  *   3         2         1
15006  *  10987654321098765432109876543210
15007  *  001000               01100001101
15008  *     rt -----
15009  *          rs -----
15010  *               rd -----
15011  */
15012 std::string NMD::SUBU_PH(uint64 instruction)
15013 {
15014     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
15015     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
15016     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
15017
15018     std::string rd = GPR(copy(rd_value));
15019     std::string rs = GPR(copy(rs_value));
15020     std::string rt = GPR(copy(rt_value));
15021
15022     return img::format("SUBU.PH %s, %s, %s", rd, rs, rt);
15023 }
15024
15025
15026 /*
15027  * SUBU.QB rd, rs, rt - Subtract Unsigned Quad Byte Vector
15028  *
15029  *   3         2         1
15030  *  10987654321098765432109876543210
15031  *  001000               01011001101
15032  *     rt -----
15033  *          rs -----
15034  *               rd -----
15035  */
15036 std::string NMD::SUBU_QB(uint64 instruction)
15037 {
15038     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
15039     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
15040     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
15041
15042     std::string rd = GPR(copy(rd_value));
15043     std::string rs = GPR(copy(rs_value));
15044     std::string rt = GPR(copy(rt_value));
15045
15046     return img::format("SUBU.QB %s, %s, %s", rd, rs, rt);
15047 }
15048
15049
15050 /*
15051  * SUBU_S.PH rd, rs, rt - Subtract Unsigned Integer Halfwords (saturating)
15052  *
15053  *   3         2         1
15054  *  10987654321098765432109876543210
15055  *  001000               11100001101
15056  *     rt -----
15057  *          rs -----
15058  *               rd -----
15059  */
15060 std::string NMD::SUBU_S_PH(uint64 instruction)
15061 {
15062     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
15063     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
15064     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
15065
15066     std::string rd = GPR(copy(rd_value));
15067     std::string rs = GPR(copy(rs_value));
15068     std::string rt = GPR(copy(rt_value));
15069
15070     return img::format("SUBU_S.PH %s, %s, %s", rd, rs, rt);
15071 }
15072
15073
15074 /*
15075  * SUBU_S.QB rd, rs, rt - Subtract Unsigned Quad Byte Vector (saturating)
15076  *
15077  *   3         2         1
15078  *  10987654321098765432109876543210
15079  *  001000               11011001101
15080  *     rt -----
15081  *          rs -----
15082  *               rd -----
15083  */
15084 std::string NMD::SUBU_S_QB(uint64 instruction)
15085 {
15086     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
15087     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
15088     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
15089
15090     std::string rd = GPR(copy(rd_value));
15091     std::string rs = GPR(copy(rs_value));
15092     std::string rt = GPR(copy(rt_value));
15093
15094     return img::format("SUBU_S.QB %s, %s, %s", rd, rs, rt);
15095 }
15096
15097
15098 /*
15099  * SUBUH.QB rd, rs, rt - Subtract Unsigned Bytes And Right Shift to Halve
15100  *                         Results
15101  *
15102  *   3         2         1
15103  *  10987654321098765432109876543210
15104  *  001000               01101001101
15105  *     rt -----
15106  *          rs -----
15107  *               rd -----
15108  */
15109 std::string NMD::SUBUH_QB(uint64 instruction)
15110 {
15111     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
15112     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
15113     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
15114
15115     std::string rd = GPR(copy(rd_value));
15116     std::string rs = GPR(copy(rs_value));
15117     std::string rt = GPR(copy(rt_value));
15118
15119     return img::format("SUBUH.QB %s, %s, %s", rd, rs, rt);
15120 }
15121
15122
15123 /*
15124  * SUBUH_R.QB rd, rs, rt - Subtract Unsigned Bytes And Right Shift to Halve
15125  *                           Results (rounding)
15126  *
15127  *   3         2         1
15128  *  10987654321098765432109876543210
15129  *  001000               11101001101
15130  *     rt -----
15131  *          rs -----
15132  *               rd -----
15133  */
15134 std::string NMD::SUBUH_R_QB(uint64 instruction)
15135 {
15136     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
15137     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
15138     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
15139
15140     std::string rd = GPR(copy(rd_value));
15141     std::string rs = GPR(copy(rs_value));
15142     std::string rt = GPR(copy(rt_value));
15143
15144     return img::format("SUBUH_R.QB %s, %s, %s", rd, rs, rt);
15145 }
15146
15147
15148 /*
15149  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15150  *
15151  *   3         2         1
15152  *  10987654321098765432109876543210
15153  *  001000               00010001101
15154  *     rt -----
15155  *          rs -----
15156  *               rd -----
15157  */
15158 std::string NMD::SW_16_(uint64 instruction)
15159 {
15160     uint64 rtz3_value = extract_rtz3_9_8_7(instruction);
15161     uint64 rs3_value = extract_rs3_6_5_4(instruction);
15162     uint64 u_value = extract_u_3_2_1_0__s2(instruction);
15163
15164     std::string rtz3 = GPR(encode_gpr3_store(rtz3_value));
15165     std::string u = IMMEDIATE(copy(u_value));
15166     std::string rs3 = GPR(decode_gpr_gpr3(rs3_value));
15167
15168     return img::format("SW %s, %s(%s)", rtz3, u, rs3);
15169 }
15170
15171
15172 /*
15173  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15174  *
15175  *   3         2         1
15176  *  10987654321098765432109876543210
15177  *  001000               00010001101
15178  *     rt -----
15179  *          rs -----
15180  *               rd -----
15181  */
15182 std::string NMD::SW_4X4_(uint64 instruction)
15183 {
15184     uint64 rtz4_value = extract_rtz4_9_7_6_5(instruction);
15185     uint64 rs4_value = extract_rs4_4_2_1_0(instruction);
15186     uint64 u_value = extract_u_3_8__s2(instruction);
15187
15188     std::string rtz4 = GPR(encode_gpr4_zero(rtz4_value));
15189     std::string u = IMMEDIATE(copy(u_value));
15190     std::string rs4 = GPR(encode_gpr4(rs4_value));
15191
15192     return img::format("SW %s, %s(%s)", rtz4, u, rs4);
15193 }
15194
15195
15196 /*
15197  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15198  *
15199  *   3         2         1
15200  *  10987654321098765432109876543210
15201  *  001000               00010001101
15202  *     rt -----
15203  *          rs -----
15204  *               rd -----
15205  */
15206 std::string NMD::SW_GP16_(uint64 instruction)
15207 {
15208     uint64 u_value = extract_u_6_5_4_3_2_1_0__s2(instruction);
15209     uint64 rtz3_value = extract_rtz3_9_8_7(instruction);
15210
15211     std::string rtz3 = GPR(encode_gpr3_store(rtz3_value));
15212     std::string u = IMMEDIATE(copy(u_value));
15213
15214     return img::format("SW %s, %s($%d)", rtz3, u, 28);
15215 }
15216
15217
15218 /*
15219  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15220  *
15221  *   3         2         1
15222  *  10987654321098765432109876543210
15223  *  001000               00010001101
15224  *     rt -----
15225  *          rs -----
15226  *               rd -----
15227  */
15228 std::string NMD::SW_GP_(uint64 instruction)
15229 {
15230     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
15231     uint64 u_value = extract_u_20_to_2__s2(instruction);
15232
15233     std::string rt = GPR(copy(rt_value));
15234     std::string u = IMMEDIATE(copy(u_value));
15235
15236     return img::format("SW %s, %s($%d)", rt, u, 28);
15237 }
15238
15239
15240 /*
15241  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15242  *
15243  *   3         2         1
15244  *  10987654321098765432109876543210
15245  *  001000               00010001101
15246  *     rt -----
15247  *          rs -----
15248  *               rd -----
15249  */
15250 std::string NMD::SW_S9_(uint64 instruction)
15251 {
15252     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
15253     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
15254     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
15255
15256     std::string rt = GPR(copy(rt_value));
15257     std::string s = IMMEDIATE(copy(s_value));
15258     std::string rs = GPR(copy(rs_value));
15259
15260     return img::format("SW %s, %s(%s)", rt, s, rs);
15261 }
15262
15263
15264 /*
15265  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15266  *
15267  *   3         2         1
15268  *  10987654321098765432109876543210
15269  *  001000               00010001101
15270  *     rt -----
15271  *          rs -----
15272  *               rd -----
15273  */
15274 std::string NMD::SW_SP_(uint64 instruction)
15275 {
15276     uint64 rt_value = extract_rt_9_8_7_6_5(instruction);
15277     uint64 u_value = extract_u_4_3_2_1_0__s2(instruction);
15278
15279     std::string rt = GPR(copy(rt_value));
15280     std::string u = IMMEDIATE(copy(u_value));
15281
15282     return img::format("SW %s, %s($%d)", rt, u, 29);
15283 }
15284
15285
15286 /*
15287  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15288  *
15289  *   3         2         1
15290  *  10987654321098765432109876543210
15291  *  001000               00010001101
15292  *     rt -----
15293  *          rs -----
15294  *               rd -----
15295  */
15296 std::string NMD::SW_U12_(uint64 instruction)
15297 {
15298     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
15299     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
15300     uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
15301
15302     std::string rt = GPR(copy(rt_value));
15303     std::string u = IMMEDIATE(copy(u_value));
15304     std::string rs = GPR(copy(rs_value));
15305
15306     return img::format("SW %s, %s(%s)", rt, u, rs);
15307 }
15308
15309
15310 /*
15311  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15312  *
15313  *   3         2         1
15314  *  10987654321098765432109876543210
15315  *  001000               00010001101
15316  *     rt -----
15317  *          rs -----
15318  *               rd -----
15319  */
15320 std::string NMD::SWC1_GP_(uint64 instruction)
15321 {
15322     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
15323     uint64 u_value = extract_u_17_to_2__s2(instruction);
15324
15325     std::string ft = FPR(copy(ft_value));
15326     std::string u = IMMEDIATE(copy(u_value));
15327
15328     return img::format("SWC1 %s, %s($%d)", ft, u, 28);
15329 }
15330
15331
15332 /*
15333  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15334  *
15335  *   3         2         1
15336  *  10987654321098765432109876543210
15337  *  001000               00010001101
15338  *     rt -----
15339  *          rs -----
15340  *               rd -----
15341  */
15342 std::string NMD::SWC1_S9_(uint64 instruction)
15343 {
15344     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
15345     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
15346     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
15347
15348     std::string ft = FPR(copy(ft_value));
15349     std::string s = IMMEDIATE(copy(s_value));
15350     std::string rs = GPR(copy(rs_value));
15351
15352     return img::format("SWC1 %s, %s(%s)", ft, s, rs);
15353 }
15354
15355
15356 /*
15357  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15358  *
15359  *   3         2         1
15360  *  10987654321098765432109876543210
15361  *  001000               00010001101
15362  *     rt -----
15363  *          rs -----
15364  *               rd -----
15365  */
15366 std::string NMD::SWC1_U12_(uint64 instruction)
15367 {
15368     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
15369     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
15370     uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
15371
15372     std::string ft = FPR(copy(ft_value));
15373     std::string u = IMMEDIATE(copy(u_value));
15374     std::string rs = GPR(copy(rs_value));
15375
15376     return img::format("SWC1 %s, %s(%s)", ft, u, rs);
15377 }
15378
15379
15380 /*
15381  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15382  *
15383  *   3         2         1
15384  *  10987654321098765432109876543210
15385  *  001000               00010001101
15386  *     rt -----
15387  *          rs -----
15388  *               rd -----
15389  */
15390 std::string NMD::SWC1X(uint64 instruction)
15391 {
15392     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
15393     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
15394     uint64 ft_value = extract_ft_15_14_13_12_11(instruction);
15395
15396     std::string ft = FPR(copy(ft_value));
15397     std::string rs = GPR(copy(rs_value));
15398     std::string rt = GPR(copy(rt_value));
15399
15400     return img::format("SWC1X %s, %s(%s)", ft, rs, rt);
15401 }
15402
15403
15404 /*
15405  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15406  *
15407  *   3         2         1
15408  *  10987654321098765432109876543210
15409  *  001000               00010001101
15410  *     rt -----
15411  *          rs -----
15412  *               rd -----
15413  */
15414 std::string NMD::SWC1XS(uint64 instruction)
15415 {
15416     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
15417     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
15418     uint64 ft_value = extract_ft_15_14_13_12_11(instruction);
15419
15420     std::string ft = FPR(copy(ft_value));
15421     std::string rs = GPR(copy(rs_value));
15422     std::string rt = GPR(copy(rt_value));
15423
15424     return img::format("SWC1XS %s, %s(%s)", ft, rs, rt);
15425 }
15426
15427
15428 /*
15429  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15430  *
15431  *   3         2         1
15432  *  10987654321098765432109876543210
15433  *  001000               00010001101
15434  *     rt -----
15435  *          rs -----
15436  *               rd -----
15437  */
15438 std::string NMD::SWC2(uint64 instruction)
15439 {
15440     uint64 cs_value = extract_cs_25_24_23_22_21(instruction);
15441     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
15442     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
15443
15444     std::string cs = CPR(copy(cs_value));
15445     std::string s = IMMEDIATE(copy(s_value));
15446     std::string rs = GPR(copy(rs_value));
15447
15448     return img::format("SWC2 %s, %s(%s)", cs, s, rs);
15449 }
15450
15451
15452 /*
15453  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15454  *
15455  *   3         2         1
15456  *  10987654321098765432109876543210
15457  *  001000               00010001101
15458  *     rt -----
15459  *          rs -----
15460  *               rd -----
15461  */
15462 std::string NMD::SWE(uint64 instruction)
15463 {
15464     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
15465     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
15466     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
15467
15468     std::string rt = GPR(copy(rt_value));
15469     std::string s = IMMEDIATE(copy(s_value));
15470     std::string rs = GPR(copy(rs_value));
15471
15472     return img::format("SWE %s, %s(%s)", rt, s, rs);
15473 }
15474
15475
15476 /*
15477  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15478  *
15479  *   3         2         1
15480  *  10987654321098765432109876543210
15481  *  001000               00010001101
15482  *     rt -----
15483  *          rs -----
15484  *               rd -----
15485  */
15486 std::string NMD::SWM(uint64 instruction)
15487 {
15488     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
15489     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
15490     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
15491     uint64 count3_value = extract_count3_14_13_12(instruction);
15492
15493     std::string rt = GPR(copy(rt_value));
15494     std::string s = IMMEDIATE(copy(s_value));
15495     std::string rs = GPR(copy(rs_value));
15496     std::string count3 = IMMEDIATE(encode_count3_from_count(count3_value));
15497
15498     return img::format("SWM %s, %s(%s), %s", rt, s, rs, count3);
15499 }
15500
15501
15502 /*
15503  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15504  *
15505  *   3         2         1
15506  *  10987654321098765432109876543210
15507  *  001000               00010001101
15508  *     rt -----
15509  *          rs -----
15510  *               rd -----
15511  */
15512 std::string NMD::SWPC_48_(uint64 instruction)
15513 {
15514     uint64 rt_value = extract_rt_41_40_39_38_37(instruction);
15515     int64 s_value = extract_s__se31_15_to_0_31_to_16(instruction);
15516
15517     std::string rt = GPR(copy(rt_value));
15518     std::string s = ADDRESS(encode_s_from_address(s_value), 6);
15519
15520     return img::format("SWPC %s, %s", rt, s);
15521 }
15522
15523
15524 /*
15525  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15526  *
15527  *   3         2         1
15528  *  10987654321098765432109876543210
15529  *  001000               00010001101
15530  *     rt -----
15531  *          rs -----
15532  *               rd -----
15533  */
15534 std::string NMD::SWX(uint64 instruction)
15535 {
15536     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
15537     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
15538     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
15539
15540     std::string rd = GPR(copy(rd_value));
15541     std::string rs = GPR(copy(rs_value));
15542     std::string rt = GPR(copy(rt_value));
15543
15544     return img::format("SWX %s, %s(%s)", rd, rs, rt);
15545 }
15546
15547
15548 /*
15549  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15550  *
15551  *   3         2         1
15552  *  10987654321098765432109876543210
15553  *  001000               00010001101
15554  *     rt -----
15555  *          rs -----
15556  *               rd -----
15557  */
15558 std::string NMD::SWXS(uint64 instruction)
15559 {
15560     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
15561     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
15562     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
15563
15564     std::string rd = GPR(copy(rd_value));
15565     std::string rs = GPR(copy(rs_value));
15566     std::string rt = GPR(copy(rt_value));
15567
15568     return img::format("SWXS %s, %s(%s)", rd, rs, rt);
15569 }
15570
15571
15572 /*
15573  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15574  *
15575  *   3         2         1
15576  *  10987654321098765432109876543210
15577  *  001000               00010001101
15578  *     rt -----
15579  *          rs -----
15580  *               rd -----
15581  */
15582 std::string NMD::SYNC(uint64 instruction)
15583 {
15584     uint64 stype_value = extract_stype_20_19_18_17_16(instruction);
15585
15586     std::string stype = IMMEDIATE(copy(stype_value));
15587
15588     return img::format("SYNC %s", stype);
15589 }
15590
15591
15592 /*
15593  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15594  *
15595  *   3         2         1
15596  *  10987654321098765432109876543210
15597  *  001000               00010001101
15598  *     rt -----
15599  *          rs -----
15600  *               rd -----
15601  */
15602 std::string NMD::SYNCI(uint64 instruction)
15603 {
15604     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
15605     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
15606
15607     std::string s = IMMEDIATE(copy(s_value));
15608     std::string rs = GPR(copy(rs_value));
15609
15610     return img::format("SYNCI %s(%s)", s, rs);
15611 }
15612
15613
15614 /*
15615  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15616  *
15617  *   3         2         1
15618  *  10987654321098765432109876543210
15619  *  001000               00010001101
15620  *     rt -----
15621  *          rs -----
15622  *               rd -----
15623  */
15624 std::string NMD::SYNCIE(uint64 instruction)
15625 {
15626     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
15627     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
15628
15629     std::string s = IMMEDIATE(copy(s_value));
15630     std::string rs = GPR(copy(rs_value));
15631
15632     return img::format("SYNCIE %s(%s)", s, rs);
15633 }
15634
15635
15636 /*
15637  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15638  *
15639  *   3         2         1
15640  *  10987654321098765432109876543210
15641  *  001000               00010001101
15642  *     rt -----
15643  *          rs -----
15644  *               rd -----
15645  */
15646 std::string NMD::SYSCALL_16_(uint64 instruction)
15647 {
15648     uint64 code_value = extract_code_1_0(instruction);
15649
15650     std::string code = IMMEDIATE(copy(code_value));
15651
15652     return img::format("SYSCALL %s", code);
15653 }
15654
15655
15656 /*
15657  * SYSCALL code - System Call. Cause a System Call Exception
15658  *
15659  *   3         2         1
15660  *  10987654321098765432109876543210
15661  *  00000000000010
15662  *           code ------------------
15663  */
15664 std::string NMD::SYSCALL_32_(uint64 instruction)
15665 {
15666     uint64 code_value = extract_code_17_to_0(instruction);
15667
15668     std::string code = IMMEDIATE(copy(code_value));
15669
15670     return img::format("SYSCALL %s", code);
15671 }
15672
15673
15674 /*
15675  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15676  *
15677  *   3         2         1
15678  *  10987654321098765432109876543210
15679  *  001000               00010001101
15680  *     rt -----
15681  *          rs -----
15682  *               rd -----
15683  */
15684 std::string NMD::TEQ(uint64 instruction)
15685 {
15686     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
15687     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
15688
15689     std::string rs = GPR(copy(rs_value));
15690     std::string rt = GPR(copy(rt_value));
15691
15692     return img::format("TEQ %s, %s", rs, rt);
15693 }
15694
15695
15696 /*
15697  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15698  *
15699  *   3         2         1
15700  *  10987654321098765432109876543210
15701  *  001000               00010001101
15702  *     rt -----
15703  *          rs -----
15704  *               rd -----
15705  */
15706 std::string NMD::TLBGINV(uint64 instruction)
15707 {
15708     (void)instruction;
15709
15710     return "TLBGINV ";
15711 }
15712
15713
15714 /*
15715  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15716  *
15717  *   3         2         1
15718  *  10987654321098765432109876543210
15719  *  001000               00010001101
15720  *     rt -----
15721  *          rs -----
15722  *               rd -----
15723  */
15724 std::string NMD::TLBGINVF(uint64 instruction)
15725 {
15726     (void)instruction;
15727
15728     return "TLBGINVF ";
15729 }
15730
15731
15732 /*
15733  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15734  *
15735  *   3         2         1
15736  *  10987654321098765432109876543210
15737  *  001000               00010001101
15738  *     rt -----
15739  *          rs -----
15740  *               rd -----
15741  */
15742 std::string NMD::TLBGP(uint64 instruction)
15743 {
15744     (void)instruction;
15745
15746     return "TLBGP ";
15747 }
15748
15749
15750 /*
15751  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15752  *
15753  *   3         2         1
15754  *  10987654321098765432109876543210
15755  *  001000               00010001101
15756  *     rt -----
15757  *          rs -----
15758  *               rd -----
15759  */
15760 std::string NMD::TLBGR(uint64 instruction)
15761 {
15762     (void)instruction;
15763
15764     return "TLBGR ";
15765 }
15766
15767
15768 /*
15769  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15770  *
15771  *   3         2         1
15772  *  10987654321098765432109876543210
15773  *  001000               00010001101
15774  *     rt -----
15775  *          rs -----
15776  *               rd -----
15777  */
15778 std::string NMD::TLBGWI(uint64 instruction)
15779 {
15780     (void)instruction;
15781
15782     return "TLBGWI ";
15783 }
15784
15785
15786 /*
15787  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15788  *
15789  *   3         2         1
15790  *  10987654321098765432109876543210
15791  *  001000               00010001101
15792  *     rt -----
15793  *          rs -----
15794  *               rd -----
15795  */
15796 std::string NMD::TLBGWR(uint64 instruction)
15797 {
15798     (void)instruction;
15799
15800     return "TLBGWR ";
15801 }
15802
15803
15804 /*
15805  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15806  *
15807  *   3         2         1
15808  *  10987654321098765432109876543210
15809  *  001000               00010001101
15810  *     rt -----
15811  *          rs -----
15812  *               rd -----
15813  */
15814 std::string NMD::TLBINV(uint64 instruction)
15815 {
15816     (void)instruction;
15817
15818     return "TLBINV ";
15819 }
15820
15821
15822 /*
15823  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15824  *
15825  *   3         2         1
15826  *  10987654321098765432109876543210
15827  *  001000               00010001101
15828  *     rt -----
15829  *          rs -----
15830  *               rd -----
15831  */
15832 std::string NMD::TLBINVF(uint64 instruction)
15833 {
15834     (void)instruction;
15835
15836     return "TLBINVF ";
15837 }
15838
15839
15840 /*
15841  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15842  *
15843  *   3         2         1
15844  *  10987654321098765432109876543210
15845  *  001000               00010001101
15846  *     rt -----
15847  *          rs -----
15848  *               rd -----
15849  */
15850 std::string NMD::TLBP(uint64 instruction)
15851 {
15852     (void)instruction;
15853
15854     return "TLBP ";
15855 }
15856
15857
15858 /*
15859  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15860  *
15861  *   3         2         1
15862  *  10987654321098765432109876543210
15863  *  001000               00010001101
15864  *     rt -----
15865  *          rs -----
15866  *               rd -----
15867  */
15868 std::string NMD::TLBR(uint64 instruction)
15869 {
15870     (void)instruction;
15871
15872     return "TLBR ";
15873 }
15874
15875
15876 /*
15877  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15878  *
15879  *   3         2         1
15880  *  10987654321098765432109876543210
15881  *  001000               00010001101
15882  *     rt -----
15883  *          rs -----
15884  *               rd -----
15885  */
15886 std::string NMD::TLBWI(uint64 instruction)
15887 {
15888     (void)instruction;
15889
15890     return "TLBWI ";
15891 }
15892
15893
15894 /*
15895  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15896  *
15897  *   3         2         1
15898  *  10987654321098765432109876543210
15899  *  001000               00010001101
15900  *     rt -----
15901  *          rs -----
15902  *               rd -----
15903  */
15904 std::string NMD::TLBWR(uint64 instruction)
15905 {
15906     (void)instruction;
15907
15908     return "TLBWR ";
15909 }
15910
15911
15912 /*
15913  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15914  *
15915  *   3         2         1
15916  *  10987654321098765432109876543210
15917  *  001000               00010001101
15918  *     rt -----
15919  *          rs -----
15920  *               rd -----
15921  */
15922 std::string NMD::TNE(uint64 instruction)
15923 {
15924     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
15925     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
15926
15927     std::string rs = GPR(copy(rs_value));
15928     std::string rt = GPR(copy(rt_value));
15929
15930     return img::format("TNE %s, %s", rs, rt);
15931 }
15932
15933
15934 /*
15935  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15936  *
15937  *   3         2         1
15938  *  10987654321098765432109876543210
15939  *  001000               00010001101
15940  *     rt -----
15941  *          rs -----
15942  *               rd -----
15943  */
15944 std::string NMD::TRUNC_L_D(uint64 instruction)
15945 {
15946     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
15947     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
15948
15949     std::string ft = FPR(copy(ft_value));
15950     std::string fs = FPR(copy(fs_value));
15951
15952     return img::format("TRUNC.L.D %s, %s", ft, fs);
15953 }
15954
15955
15956 /*
15957  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15958  *
15959  *   3         2         1
15960  *  10987654321098765432109876543210
15961  *  001000               00010001101
15962  *     rt -----
15963  *          rs -----
15964  *               rd -----
15965  */
15966 std::string NMD::TRUNC_L_S(uint64 instruction)
15967 {
15968     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
15969     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
15970
15971     std::string ft = FPR(copy(ft_value));
15972     std::string fs = FPR(copy(fs_value));
15973
15974     return img::format("TRUNC.L.S %s, %s", ft, fs);
15975 }
15976
15977
15978 /*
15979  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
15980  *
15981  *   3         2         1
15982  *  10987654321098765432109876543210
15983  *  001000               00010001101
15984  *     rt -----
15985  *          rs -----
15986  *               rd -----
15987  */
15988 std::string NMD::TRUNC_W_D(uint64 instruction)
15989 {
15990     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
15991     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
15992
15993     std::string ft = FPR(copy(ft_value));
15994     std::string fs = FPR(copy(fs_value));
15995
15996     return img::format("TRUNC.W.D %s, %s", ft, fs);
15997 }
15998
15999
16000 /*
16001  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
16002  *
16003  *   3         2         1
16004  *  10987654321098765432109876543210
16005  *  001000               00010001101
16006  *     rt -----
16007  *          rs -----
16008  *               rd -----
16009  */
16010 std::string NMD::TRUNC_W_S(uint64 instruction)
16011 {
16012     uint64 ft_value = extract_ft_25_24_23_22_21(instruction);
16013     uint64 fs_value = extract_fs_20_19_18_17_16(instruction);
16014
16015     std::string ft = FPR(copy(ft_value));
16016     std::string fs = FPR(copy(fs_value));
16017
16018     return img::format("TRUNC.W.S %s, %s", ft, fs);
16019 }
16020
16021
16022 /*
16023  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
16024  *
16025  *   3         2         1
16026  *  10987654321098765432109876543210
16027  *  001000               00010001101
16028  *     rt -----
16029  *          rs -----
16030  *               rd -----
16031  */
16032 std::string NMD::UALDM(uint64 instruction)
16033 {
16034     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
16035     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
16036     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
16037     uint64 count3_value = extract_count3_14_13_12(instruction);
16038
16039     std::string rt = GPR(copy(rt_value));
16040     std::string s = IMMEDIATE(copy(s_value));
16041     std::string rs = GPR(copy(rs_value));
16042     std::string count3 = IMMEDIATE(encode_count3_from_count(count3_value));
16043
16044     return img::format("UALDM %s, %s(%s), %s", rt, s, rs, count3);
16045 }
16046
16047
16048 /*
16049  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
16050  *
16051  *   3         2         1
16052  *  10987654321098765432109876543210
16053  *  001000               00010001101
16054  *     rt -----
16055  *          rs -----
16056  *               rd -----
16057  */
16058 std::string NMD::UALH(uint64 instruction)
16059 {
16060     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
16061     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
16062     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
16063
16064     std::string rt = GPR(copy(rt_value));
16065     std::string s = IMMEDIATE(copy(s_value));
16066     std::string rs = GPR(copy(rs_value));
16067
16068     return img::format("UALH %s, %s(%s)", rt, s, rs);
16069 }
16070
16071
16072 /*
16073  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
16074  *
16075  *   3         2         1
16076  *  10987654321098765432109876543210
16077  *  001000               00010001101
16078  *     rt -----
16079  *          rs -----
16080  *               rd -----
16081  */
16082 std::string NMD::UALWM(uint64 instruction)
16083 {
16084     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
16085     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
16086     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
16087     uint64 count3_value = extract_count3_14_13_12(instruction);
16088
16089     std::string rt = GPR(copy(rt_value));
16090     std::string s = IMMEDIATE(copy(s_value));
16091     std::string rs = GPR(copy(rs_value));
16092     std::string count3 = IMMEDIATE(encode_count3_from_count(count3_value));
16093
16094     return img::format("UALWM %s, %s(%s), %s", rt, s, rs, count3);
16095 }
16096
16097
16098 /*
16099  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
16100  *
16101  *   3         2         1
16102  *  10987654321098765432109876543210
16103  *  001000               00010001101
16104  *     rt -----
16105  *          rs -----
16106  *               rd -----
16107  */
16108 std::string NMD::UASDM(uint64 instruction)
16109 {
16110     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
16111     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
16112     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
16113     uint64 count3_value = extract_count3_14_13_12(instruction);
16114
16115     std::string rt = GPR(copy(rt_value));
16116     std::string s = IMMEDIATE(copy(s_value));
16117     std::string rs = GPR(copy(rs_value));
16118     std::string count3 = IMMEDIATE(encode_count3_from_count(count3_value));
16119
16120     return img::format("UASDM %s, %s(%s), %s", rt, s, rs, count3);
16121 }
16122
16123
16124 /*
16125  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
16126  *
16127  *   3         2         1
16128  *  10987654321098765432109876543210
16129  *  001000               00010001101
16130  *     rt -----
16131  *          rs -----
16132  *               rd -----
16133  */
16134 std::string NMD::UASH(uint64 instruction)
16135 {
16136     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
16137     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
16138     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
16139
16140     std::string rt = GPR(copy(rt_value));
16141     std::string s = IMMEDIATE(copy(s_value));
16142     std::string rs = GPR(copy(rs_value));
16143
16144     return img::format("UASH %s, %s(%s)", rt, s, rs);
16145 }
16146
16147
16148 /*
16149  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
16150  *
16151  *   3         2         1
16152  *  10987654321098765432109876543210
16153  *  001000               00010001101
16154  *     rt -----
16155  *          rs -----
16156  *               rd -----
16157  */
16158 std::string NMD::UASWM(uint64 instruction)
16159 {
16160     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
16161     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
16162     int64 s_value = extract_s__se8_15_7_6_5_4_3_2_1_0(instruction);
16163     uint64 count3_value = extract_count3_14_13_12(instruction);
16164
16165     std::string rt = GPR(copy(rt_value));
16166     std::string s = IMMEDIATE(copy(s_value));
16167     std::string rs = GPR(copy(rs_value));
16168     std::string count3 = IMMEDIATE(encode_count3_from_count(count3_value));
16169
16170     return img::format("UASWM %s, %s(%s), %s", rt, s, rs, count3);
16171 }
16172
16173
16174 /*
16175  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
16176  *
16177  *   3         2         1
16178  *  10987654321098765432109876543210
16179  *  001000               00010001101
16180  *     rt -----
16181  *          rs -----
16182  *               rd -----
16183  */
16184 std::string NMD::UDI(uint64 instruction)
16185 {
16186     uint64 op_value = extract_op_25_to_3(instruction);
16187
16188     std::string op = IMMEDIATE(copy(op_value));
16189
16190     return img::format("UDI %s", op);
16191 }
16192
16193
16194 /*
16195  * WAIT code - Enter Wait State
16196  *
16197  *   3         2         1
16198  *  10987654321098765432109876543210
16199  *  001000          1100001101111111
16200  *   code ----------
16201  */
16202 std::string NMD::WAIT(uint64 instruction)
16203 {
16204     uint64 code_value = extract_code_25_24_23_22_21_20_19_18_17_16(instruction);
16205
16206     std::string code = IMMEDIATE(copy(code_value));
16207
16208     return img::format("WAIT %s", code);
16209 }
16210
16211
16212 /*
16213  * WRDSP rt, mask - Write Fields to DSPControl Register from a GPR
16214  *
16215  *   3         2         1
16216  *  10987654321098765432109876543210
16217  *  001000            01011001111111
16218  *     rt -----
16219  *        mask -------
16220  */
16221 std::string NMD::WRDSP(uint64 instruction)
16222 {
16223     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
16224     uint64 mask_value = extract_mask_20_19_18_17_16_15_14(instruction);
16225
16226     std::string rt = GPR(copy(rt_value));
16227     std::string mask = IMMEDIATE(copy(mask_value));
16228
16229     return img::format("WRDSP %s, %s", rt, mask);
16230 }
16231
16232
16233 /*
16234  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
16235  *
16236  *   3         2         1
16237  *  10987654321098765432109876543210
16238  *  001000               00010001101
16239  *     rt -----
16240  *          rs -----
16241  *               rd -----
16242  */
16243 std::string NMD::WRPGPR(uint64 instruction)
16244 {
16245     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
16246     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
16247
16248     std::string rt = GPR(copy(rt_value));
16249     std::string rs = GPR(copy(rs_value));
16250
16251     return img::format("WRPGPR %s, %s", rt, rs);
16252 }
16253
16254
16255 /*
16256  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
16257  *
16258  *   3         2         1
16259  *  10987654321098765432109876543210
16260  *  001000               00010001101
16261  *     rt -----
16262  *          rs -----
16263  *               rd -----
16264  */
16265 std::string NMD::XOR_16_(uint64 instruction)
16266 {
16267     uint64 rt3_value = extract_rt3_9_8_7(instruction);
16268     uint64 rs3_value = extract_rs3_6_5_4(instruction);
16269
16270     std::string rs3 = GPR(decode_gpr_gpr3(rs3_value));
16271     std::string rt3 = GPR(decode_gpr_gpr3(rt3_value));
16272
16273     return img::format("XOR %s, %s", rs3, rt3);
16274 }
16275
16276
16277 /*
16278  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
16279  *
16280  *   3         2         1
16281  *  10987654321098765432109876543210
16282  *  001000               00010001101
16283  *     rt -----
16284  *          rs -----
16285  *               rd -----
16286  */
16287 std::string NMD::XOR_32_(uint64 instruction)
16288 {
16289     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
16290     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
16291     uint64 rd_value = extract_rd_15_14_13_12_11(instruction);
16292
16293     std::string rd = GPR(copy(rd_value));
16294     std::string rs = GPR(copy(rs_value));
16295     std::string rt = GPR(copy(rt_value));
16296
16297     return img::format("XOR %s, %s, %s", rd, rs, rt);
16298 }
16299
16300
16301 /*
16302  * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results
16303  *
16304  *   3         2         1
16305  *  10987654321098765432109876543210
16306  *  001000               00010001101
16307  *     rt -----
16308  *          rs -----
16309  *               rd -----
16310  */
16311 std::string NMD::XORI(uint64 instruction)
16312 {
16313     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
16314     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
16315     uint64 u_value = extract_u_11_10_9_8_7_6_5_4_3_2_1_0(instruction);
16316
16317     std::string rt = GPR(copy(rt_value));
16318     std::string rs = GPR(copy(rs_value));
16319     std::string u = IMMEDIATE(copy(u_value));
16320
16321     return img::format("XORI %s, %s, %s", rt, rs, u);
16322 }
16323
16324
16325 /*
16326  * YIELD rt, rs -
16327  *
16328  *   3         2         1
16329  *  10987654321098765432109876543210
16330  *  001000               00010001101
16331  *     rt -----
16332  *          rs -----
16333  */
16334 std::string NMD::YIELD(uint64 instruction)
16335 {
16336     uint64 rt_value = extract_rt_25_24_23_22_21(instruction);
16337     uint64 rs_value = extract_rs_20_19_18_17_16(instruction);
16338
16339     std::string rt = GPR(copy(rt_value));
16340     std::string rs = GPR(copy(rs_value));
16341
16342     return img::format("YIELD %s, %s", rt, rs);
16343 }
16344
16345
16346
16347 NMD::Pool NMD::P_SYSCALL[2] = {
16348     { instruction         , 0                   , 0   , 32,
16349        0xfffc0000, 0x00080000, &NMD::SYSCALL_32_      , 0,
16350        0x0                 },        /* SYSCALL[32] */
16351     { instruction         , 0                   , 0   , 32,
16352        0xfffc0000, 0x000c0000, &NMD::HYPCALL          , 0,
16353        CP0_ | VZ_          },        /* HYPCALL */
16354 };
16355
16356
16357 NMD::Pool NMD::P_RI[4] = {
16358     { instruction         , 0                   , 0   , 32,
16359        0xfff80000, 0x00000000, &NMD::SIGRIE           , 0,
16360        0x0                 },        /* SIGRIE */
16361     { pool                , P_SYSCALL           , 2   , 32,
16362        0xfff80000, 0x00080000, 0                      , 0,
16363        0x0                 },        /* P.SYSCALL */
16364     { instruction         , 0                   , 0   , 32,
16365        0xfff80000, 0x00100000, &NMD::BREAK_32_        , 0,
16366        0x0                 },        /* BREAK[32] */
16367     { instruction         , 0                   , 0   , 32,
16368        0xfff80000, 0x00180000, &NMD::SDBBP_32_        , 0,
16369        EJTAG_              },        /* SDBBP[32] */
16370 };
16371
16372
16373 NMD::Pool NMD::P_ADDIU[2] = {
16374     { pool                , P_RI                , 4   , 32,
16375        0xffe00000, 0x00000000, 0                      , 0,
16376        0x0                 },        /* P.RI */
16377     { instruction         , 0                   , 0   , 32,
16378        0xfc000000, 0x00000000, &NMD::ADDIU_32_        , &NMD::ADDIU_32__cond   ,
16379        0x0                 },        /* ADDIU[32] */
16380 };
16381
16382
16383 NMD::Pool NMD::P_TRAP[2] = {
16384     { instruction         , 0                   , 0   , 32,
16385        0xfc0007ff, 0x20000000, &NMD::TEQ              , 0,
16386        XMMS_               },        /* TEQ */
16387     { instruction         , 0                   , 0   , 32,
16388        0xfc0007ff, 0x20000400, &NMD::TNE              , 0,
16389        XMMS_               },        /* TNE */
16390 };
16391
16392
16393 NMD::Pool NMD::P_CMOVE[2] = {
16394     { instruction         , 0                   , 0   , 32,
16395        0xfc0007ff, 0x20000210, &NMD::MOVZ             , 0,
16396        0x0                 },        /* MOVZ */
16397     { instruction         , 0                   , 0   , 32,
16398        0xfc0007ff, 0x20000610, &NMD::MOVN             , 0,
16399        0x0                 },        /* MOVN */
16400 };
16401
16402
16403 NMD::Pool NMD::P_D_MT_VPE[2] = {
16404     { instruction         , 0                   , 0   , 32,
16405        0xfc1f3fff, 0x20010ab0, &NMD::DMT              , 0,
16406        MT_                 },        /* DMT */
16407     { instruction         , 0                   , 0   , 32,
16408        0xfc1f3fff, 0x20000ab0, &NMD::DVPE             , 0,
16409        MT_                 },        /* DVPE */
16410 };
16411
16412
16413 NMD::Pool NMD::P_E_MT_VPE[2] = {
16414     { instruction         , 0                   , 0   , 32,
16415        0xfc1f3fff, 0x20010eb0, &NMD::EMT              , 0,
16416        MT_                 },        /* EMT */
16417     { instruction         , 0                   , 0   , 32,
16418        0xfc1f3fff, 0x20000eb0, &NMD::EVPE             , 0,
16419        MT_                 },        /* EVPE */
16420 };
16421
16422
16423 NMD::Pool NMD::_P_MT_VPE[2] = {
16424     { pool                , P_D_MT_VPE          , 2   , 32,
16425        0xfc003fff, 0x20000ab0, 0                      , 0,
16426        0x0                 },        /* P.D_MT_VPE */
16427     { pool                , P_E_MT_VPE          , 2   , 32,
16428        0xfc003fff, 0x20000eb0, 0                      , 0,
16429        0x0                 },        /* P.E_MT_VPE */
16430 };
16431
16432
16433 NMD::Pool NMD::P_MT_VPE[8] = {
16434     { reserved_block      , 0                   , 0   , 32,
16435        0xfc003bff, 0x200002b0, 0                      , 0,
16436        0x0                 },        /* P.MT_VPE~*(0) */
16437     { pool                , _P_MT_VPE           , 2   , 32,
16438        0xfc003bff, 0x20000ab0, 0                      , 0,
16439        0x0                 },        /* _P.MT_VPE */
16440     { reserved_block      , 0                   , 0   , 32,
16441        0xfc003bff, 0x200012b0, 0                      , 0,
16442        0x0                 },        /* P.MT_VPE~*(2) */
16443     { reserved_block      , 0                   , 0   , 32,
16444        0xfc003bff, 0x20001ab0, 0                      , 0,
16445        0x0                 },        /* P.MT_VPE~*(3) */
16446     { reserved_block      , 0                   , 0   , 32,
16447        0xfc003bff, 0x200022b0, 0                      , 0,
16448        0x0                 },        /* P.MT_VPE~*(4) */
16449     { reserved_block      , 0                   , 0   , 32,
16450        0xfc003bff, 0x20002ab0, 0                      , 0,
16451        0x0                 },        /* P.MT_VPE~*(5) */
16452     { reserved_block      , 0                   , 0   , 32,
16453        0xfc003bff, 0x200032b0, 0                      , 0,
16454        0x0                 },        /* P.MT_VPE~*(6) */
16455     { reserved_block      , 0                   , 0   , 32,
16456        0xfc003bff, 0x20003ab0, 0                      , 0,
16457        0x0                 },        /* P.MT_VPE~*(7) */
16458 };
16459
16460
16461 NMD::Pool NMD::P_DVP[2] = {
16462     { instruction         , 0                   , 0   , 32,
16463        0xfc00ffff, 0x20000390, &NMD::DVP              , 0,
16464        0x0                 },        /* DVP */
16465     { instruction         , 0                   , 0   , 32,
16466        0xfc00ffff, 0x20000790, &NMD::EVP              , 0,
16467        0x0                 },        /* EVP */
16468 };
16469
16470
16471 NMD::Pool NMD::P_SLTU[2] = {
16472     { pool                , P_DVP               , 2   , 32,
16473        0xfc00fbff, 0x20000390, 0                      , 0,
16474        0x0                 },        /* P.DVP */
16475     { instruction         , 0                   , 0   , 32,
16476        0xfc0003ff, 0x20000390, &NMD::SLTU             , &NMD::SLTU_cond        ,
16477        0x0                 },        /* SLTU */
16478 };
16479
16480
16481 NMD::Pool NMD::_POOL32A0[128] = {
16482     { pool                , P_TRAP              , 2   , 32,
16483        0xfc0003ff, 0x20000000, 0                      , 0,
16484        0x0                 },        /* P.TRAP */
16485     { instruction         , 0                   , 0   , 32,
16486        0xfc0003ff, 0x20000008, &NMD::SEB              , 0,
16487        XMMS_               },        /* SEB */
16488     { instruction         , 0                   , 0   , 32,
16489        0xfc0003ff, 0x20000010, &NMD::SLLV             , 0,
16490        0x0                 },        /* SLLV */
16491     { instruction         , 0                   , 0   , 32,
16492        0xfc0003ff, 0x20000018, &NMD::MUL_32_          , 0,
16493        0x0                 },        /* MUL[32] */
16494     { reserved_block      , 0                   , 0   , 32,
16495        0xfc0003ff, 0x20000020, 0                      , 0,
16496        0x0                 },        /* _POOL32A0~*(4) */
16497     { reserved_block      , 0                   , 0   , 32,
16498        0xfc0003ff, 0x20000028, 0                      , 0,
16499        0x0                 },        /* _POOL32A0~*(5) */
16500     { instruction         , 0                   , 0   , 32,
16501        0xfc0003ff, 0x20000030, &NMD::MFC0             , 0,
16502        0x0                 },        /* MFC0 */
16503     { instruction         , 0                   , 0   , 32,
16504        0xfc0003ff, 0x20000038, &NMD::MFHC0            , 0,
16505        CP0_ | MVH_         },        /* MFHC0 */
16506     { reserved_block      , 0                   , 0   , 32,
16507        0xfc0003ff, 0x20000040, 0                      , 0,
16508        0x0                 },        /* _POOL32A0~*(8) */
16509     { instruction         , 0                   , 0   , 32,
16510        0xfc0003ff, 0x20000048, &NMD::SEH              , 0,
16511        0x0                 },        /* SEH */
16512     { instruction         , 0                   , 0   , 32,
16513        0xfc0003ff, 0x20000050, &NMD::SRLV             , 0,
16514        0x0                 },        /* SRLV */
16515     { instruction         , 0                   , 0   , 32,
16516        0xfc0003ff, 0x20000058, &NMD::MUH              , 0,
16517        0x0                 },        /* MUH */
16518     { reserved_block      , 0                   , 0   , 32,
16519        0xfc0003ff, 0x20000060, 0                      , 0,
16520        0x0                 },        /* _POOL32A0~*(12) */
16521     { reserved_block      , 0                   , 0   , 32,
16522        0xfc0003ff, 0x20000068, 0                      , 0,
16523        0x0                 },        /* _POOL32A0~*(13) */
16524     { instruction         , 0                   , 0   , 32,
16525        0xfc0003ff, 0x20000070, &NMD::MTC0             , 0,
16526        CP0_                },        /* MTC0 */
16527     { instruction         , 0                   , 0   , 32,
16528        0xfc0003ff, 0x20000078, &NMD::MTHC0            , 0,
16529        CP0_ | MVH_         },        /* MTHC0 */
16530     { reserved_block      , 0                   , 0   , 32,
16531        0xfc0003ff, 0x20000080, 0                      , 0,
16532        0x0                 },        /* _POOL32A0~*(16) */
16533     { reserved_block      , 0                   , 0   , 32,
16534        0xfc0003ff, 0x20000088, 0                      , 0,
16535        0x0                 },        /* _POOL32A0~*(17) */
16536     { instruction         , 0                   , 0   , 32,
16537        0xfc0003ff, 0x20000090, &NMD::SRAV             , 0,
16538        0x0                 },        /* SRAV */
16539     { instruction         , 0                   , 0   , 32,
16540        0xfc0003ff, 0x20000098, &NMD::MULU             , 0,
16541        0x0                 },        /* MULU */
16542     { reserved_block      , 0                   , 0   , 32,
16543        0xfc0003ff, 0x200000a0, 0                      , 0,
16544        0x0                 },        /* _POOL32A0~*(20) */
16545     { reserved_block      , 0                   , 0   , 32,
16546        0xfc0003ff, 0x200000a8, 0                      , 0,
16547        0x0                 },        /* _POOL32A0~*(21) */
16548     { instruction         , 0                   , 0   , 32,
16549        0xfc0003ff, 0x200000b0, &NMD::MFGC0            , 0,
16550        CP0_ | VZ_          },        /* MFGC0 */
16551     { instruction         , 0                   , 0   , 32,
16552        0xfc0003ff, 0x200000b8, &NMD::MFHGC0           , 0,
16553        CP0_ | VZ_ | MVH_   },        /* MFHGC0 */
16554     { reserved_block      , 0                   , 0   , 32,
16555        0xfc0003ff, 0x200000c0, 0                      , 0,
16556        0x0                 },        /* _POOL32A0~*(24) */
16557     { reserved_block      , 0                   , 0   , 32,
16558        0xfc0003ff, 0x200000c8, 0                      , 0,
16559        0x0                 },        /* _POOL32A0~*(25) */
16560     { instruction         , 0                   , 0   , 32,
16561        0xfc0003ff, 0x200000d0, &NMD::ROTRV            , 0,
16562        0x0                 },        /* ROTRV */
16563     { instruction         , 0                   , 0   , 32,
16564        0xfc0003ff, 0x200000d8, &NMD::MUHU             , 0,
16565        0x0                 },        /* MUHU */
16566     { reserved_block      , 0                   , 0   , 32,
16567        0xfc0003ff, 0x200000e0, 0                      , 0,
16568        0x0                 },        /* _POOL32A0~*(28) */
16569     { reserved_block      , 0                   , 0   , 32,
16570        0xfc0003ff, 0x200000e8, 0                      , 0,
16571        0x0                 },        /* _POOL32A0~*(29) */
16572     { instruction         , 0                   , 0   , 32,
16573        0xfc0003ff, 0x200000f0, &NMD::MTGC0            , 0,
16574        CP0_ | VZ_          },        /* MTGC0 */
16575     { instruction         , 0                   , 0   , 32,
16576        0xfc0003ff, 0x200000f8, &NMD::MTHGC0           , 0,
16577        CP0_ | VZ_ | MVH_   },        /* MTHGC0 */
16578     { reserved_block      , 0                   , 0   , 32,
16579        0xfc0003ff, 0x20000100, 0                      , 0,
16580        0x0                 },        /* _POOL32A0~*(32) */
16581     { reserved_block      , 0                   , 0   , 32,
16582        0xfc0003ff, 0x20000108, 0                      , 0,
16583        0x0                 },        /* _POOL32A0~*(33) */
16584     { instruction         , 0                   , 0   , 32,
16585        0xfc0003ff, 0x20000110, &NMD::ADD              , 0,
16586        XMMS_               },        /* ADD */
16587     { instruction         , 0                   , 0   , 32,
16588        0xfc0003ff, 0x20000118, &NMD::DIV              , 0,
16589        0x0                 },        /* DIV */
16590     { reserved_block      , 0                   , 0   , 32,
16591        0xfc0003ff, 0x20000120, 0                      , 0,
16592        0x0                 },        /* _POOL32A0~*(36) */
16593     { reserved_block      , 0                   , 0   , 32,
16594        0xfc0003ff, 0x20000128, 0                      , 0,
16595        0x0                 },        /* _POOL32A0~*(37) */
16596     { instruction         , 0                   , 0   , 32,
16597        0xfc0003ff, 0x20000130, &NMD::DMFC0            , 0,
16598        CP0_ | MIPS64_      },        /* DMFC0 */
16599     { reserved_block      , 0                   , 0   , 32,
16600        0xfc0003ff, 0x20000138, 0                      , 0,
16601        0x0                 },        /* _POOL32A0~*(39) */
16602     { reserved_block      , 0                   , 0   , 32,
16603        0xfc0003ff, 0x20000140, 0                      , 0,
16604        0x0                 },        /* _POOL32A0~*(40) */
16605     { reserved_block      , 0                   , 0   , 32,
16606        0xfc0003ff, 0x20000148, 0                      , 0,
16607        0x0                 },        /* _POOL32A0~*(41) */
16608     { instruction         , 0                   , 0   , 32,
16609        0xfc0003ff, 0x20000150, &NMD::ADDU_32_         , 0,
16610        0x0                 },        /* ADDU[32] */
16611     { instruction         , 0                   , 0   , 32,
16612        0xfc0003ff, 0x20000158, &NMD::MOD              , 0,
16613        0x0                 },        /* MOD */
16614     { reserved_block      , 0                   , 0   , 32,
16615        0xfc0003ff, 0x20000160, 0                      , 0,
16616        0x0                 },        /* _POOL32A0~*(44) */
16617     { reserved_block      , 0                   , 0   , 32,
16618        0xfc0003ff, 0x20000168, 0                      , 0,
16619        0x0                 },        /* _POOL32A0~*(45) */
16620     { instruction         , 0                   , 0   , 32,
16621        0xfc0003ff, 0x20000170, &NMD::DMTC0            , 0,
16622        CP0_ | MIPS64_      },        /* DMTC0 */
16623     { reserved_block      , 0                   , 0   , 32,
16624        0xfc0003ff, 0x20000178, 0                      , 0,
16625        0x0                 },        /* _POOL32A0~*(47) */
16626     { reserved_block      , 0                   , 0   , 32,
16627        0xfc0003ff, 0x20000180, 0                      , 0,
16628        0x0                 },        /* _POOL32A0~*(48) */
16629     { reserved_block      , 0                   , 0   , 32,
16630        0xfc0003ff, 0x20000188, 0                      , 0,
16631        0x0                 },        /* _POOL32A0~*(49) */
16632     { instruction         , 0                   , 0   , 32,
16633        0xfc0003ff, 0x20000190, &NMD::SUB              , 0,
16634        XMMS_               },        /* SUB */
16635     { instruction         , 0                   , 0   , 32,
16636        0xfc0003ff, 0x20000198, &NMD::DIVU             , 0,
16637        0x0                 },        /* DIVU */
16638     { reserved_block      , 0                   , 0   , 32,
16639        0xfc0003ff, 0x200001a0, 0                      , 0,
16640        0x0                 },        /* _POOL32A0~*(52) */
16641     { reserved_block      , 0                   , 0   , 32,
16642        0xfc0003ff, 0x200001a8, 0                      , 0,
16643        0x0                 },        /* _POOL32A0~*(53) */
16644     { instruction         , 0                   , 0   , 32,
16645        0xfc0003ff, 0x200001b0, &NMD::DMFGC0           , 0,
16646        CP0_ | MIPS64_ | VZ_},        /* DMFGC0 */
16647     { reserved_block      , 0                   , 0   , 32,
16648        0xfc0003ff, 0x200001b8, 0                      , 0,
16649        0x0                 },        /* _POOL32A0~*(55) */
16650     { instruction         , 0                   , 0   , 32,
16651        0xfc0003ff, 0x200001c0, &NMD::RDHWR            , 0,
16652        XMMS_               },        /* RDHWR */
16653     { reserved_block      , 0                   , 0   , 32,
16654        0xfc0003ff, 0x200001c8, 0                      , 0,
16655        0x0                 },        /* _POOL32A0~*(57) */
16656     { instruction         , 0                   , 0   , 32,
16657        0xfc0003ff, 0x200001d0, &NMD::SUBU_32_         , 0,
16658        0x0                 },        /* SUBU[32] */
16659     { instruction         , 0                   , 0   , 32,
16660        0xfc0003ff, 0x200001d8, &NMD::MODU             , 0,
16661        0x0                 },        /* MODU */
16662     { reserved_block      , 0                   , 0   , 32,
16663        0xfc0003ff, 0x200001e0, 0                      , 0,
16664        0x0                 },        /* _POOL32A0~*(60) */
16665     { reserved_block      , 0                   , 0   , 32,
16666        0xfc0003ff, 0x200001e8, 0                      , 0,
16667        0x0                 },        /* _POOL32A0~*(61) */
16668     { instruction         , 0                   , 0   , 32,
16669        0xfc0003ff, 0x200001f0, &NMD::DMTGC0           , 0,
16670        CP0_ | MIPS64_ | VZ_},        /* DMTGC0 */
16671     { reserved_block      , 0                   , 0   , 32,
16672        0xfc0003ff, 0x200001f8, 0                      , 0,
16673        0x0                 },        /* _POOL32A0~*(63) */
16674     { reserved_block      , 0                   , 0   , 32,
16675        0xfc0003ff, 0x20000200, 0                      , 0,
16676        0x0                 },        /* _POOL32A0~*(64) */
16677     { reserved_block      , 0                   , 0   , 32,
16678        0xfc0003ff, 0x20000208, 0                      , 0,
16679        0x0                 },        /* _POOL32A0~*(65) */
16680     { pool                , P_CMOVE             , 2   , 32,
16681        0xfc0003ff, 0x20000210, 0                      , 0,
16682        0x0                 },        /* P.CMOVE */
16683     { reserved_block      , 0                   , 0   , 32,
16684        0xfc0003ff, 0x20000218, 0                      , 0,
16685        0x0                 },        /* _POOL32A0~*(67) */
16686     { reserved_block      , 0                   , 0   , 32,
16687        0xfc0003ff, 0x20000220, 0                      , 0,
16688        0x0                 },        /* _POOL32A0~*(68) */
16689     { instruction         , 0                   , 0   , 32,
16690        0xfc0003ff, 0x20000228, &NMD::FORK             , 0,
16691        MT_                 },        /* FORK */
16692     { instruction         , 0                   , 0   , 32,
16693        0xfc0003ff, 0x20000230, &NMD::MFTR             , 0,
16694        MT_                 },        /* MFTR */
16695     { instruction         , 0                   , 0   , 32,
16696        0xfc0003ff, 0x20000238, &NMD::MFHTR            , 0,
16697        MT_                 },        /* MFHTR */
16698     { reserved_block      , 0                   , 0   , 32,
16699        0xfc0003ff, 0x20000240, 0                      , 0,
16700        0x0                 },        /* _POOL32A0~*(72) */
16701     { reserved_block      , 0                   , 0   , 32,
16702        0xfc0003ff, 0x20000248, 0                      , 0,
16703        0x0                 },        /* _POOL32A0~*(73) */
16704     { instruction         , 0                   , 0   , 32,
16705        0xfc0003ff, 0x20000250, &NMD::AND_32_          , 0,
16706        0x0                 },        /* AND[32] */
16707     { reserved_block      , 0                   , 0   , 32,
16708        0xfc0003ff, 0x20000258, 0                      , 0,
16709        0x0                 },        /* _POOL32A0~*(75) */
16710     { reserved_block      , 0                   , 0   , 32,
16711        0xfc0003ff, 0x20000260, 0                      , 0,
16712        0x0                 },        /* _POOL32A0~*(76) */
16713     { instruction         , 0                   , 0   , 32,
16714        0xfc0003ff, 0x20000268, &NMD::YIELD            , 0,
16715        MT_                 },        /* YIELD */
16716     { instruction         , 0                   , 0   , 32,
16717        0xfc0003ff, 0x20000270, &NMD::MTTR             , 0,
16718        MT_                 },        /* MTTR */
16719     { instruction         , 0                   , 0   , 32,
16720        0xfc0003ff, 0x20000278, &NMD::MTHTR            , 0,
16721        MT_                 },        /* MTHTR */
16722     { reserved_block      , 0                   , 0   , 32,
16723        0xfc0003ff, 0x20000280, 0                      , 0,
16724        0x0                 },        /* _POOL32A0~*(80) */
16725     { reserved_block      , 0                   , 0   , 32,
16726        0xfc0003ff, 0x20000288, 0                      , 0,
16727        0x0                 },        /* _POOL32A0~*(81) */
16728     { instruction         , 0                   , 0   , 32,
16729        0xfc0003ff, 0x20000290, &NMD::OR_32_           , 0,
16730        0x0                 },        /* OR[32] */
16731     { reserved_block      , 0                   , 0   , 32,
16732        0xfc0003ff, 0x20000298, 0                      , 0,
16733        0x0                 },        /* _POOL32A0~*(83) */
16734     { reserved_block      , 0                   , 0   , 32,
16735        0xfc0003ff, 0x200002a0, 0                      , 0,
16736        0x0                 },        /* _POOL32A0~*(84) */
16737     { reserved_block      , 0                   , 0   , 32,
16738        0xfc0003ff, 0x200002a8, 0                      , 0,
16739        0x0                 },        /* _POOL32A0~*(85) */
16740     { pool                , P_MT_VPE            , 8   , 32,
16741        0xfc0003ff, 0x200002b0, 0                      , 0,
16742        0x0                 },        /* P.MT_VPE */
16743     { reserved_block      , 0                   , 0   , 32,
16744        0xfc0003ff, 0x200002b8, 0                      , 0,
16745        0x0                 },        /* _POOL32A0~*(87) */
16746     { reserved_block      , 0                   , 0   , 32,
16747        0xfc0003ff, 0x200002c0, 0                      , 0,
16748        0x0                 },        /* _POOL32A0~*(88) */
16749     { reserved_block      , 0                   , 0   , 32,
16750        0xfc0003ff, 0x200002c8, 0                      , 0,
16751        0x0                 },        /* _POOL32A0~*(89) */
16752     { instruction         , 0                   , 0   , 32,
16753        0xfc0003ff, 0x200002d0, &NMD::NOR              , 0,
16754        0x0                 },        /* NOR */
16755     { reserved_block      , 0                   , 0   , 32,
16756        0xfc0003ff, 0x200002d8, 0                      , 0,
16757        0x0                 },        /* _POOL32A0~*(91) */
16758     { reserved_block      , 0                   , 0   , 32,
16759        0xfc0003ff, 0x200002e0, 0                      , 0,
16760        0x0                 },        /* _POOL32A0~*(92) */
16761     { reserved_block      , 0                   , 0   , 32,
16762        0xfc0003ff, 0x200002e8, 0                      , 0,
16763        0x0                 },        /* _POOL32A0~*(93) */
16764     { reserved_block      , 0                   , 0   , 32,
16765        0xfc0003ff, 0x200002f0, 0                      , 0,
16766        0x0                 },        /* _POOL32A0~*(94) */
16767     { reserved_block      , 0                   , 0   , 32,
16768        0xfc0003ff, 0x200002f8, 0                      , 0,
16769        0x0                 },        /* _POOL32A0~*(95) */
16770     { reserved_block      , 0                   , 0   , 32,
16771        0xfc0003ff, 0x20000300, 0                      , 0,
16772        0x0                 },        /* _POOL32A0~*(96) */
16773     { reserved_block      , 0                   , 0   , 32,
16774        0xfc0003ff, 0x20000308, 0                      , 0,
16775        0x0                 },        /* _POOL32A0~*(97) */
16776     { instruction         , 0                   , 0   , 32,
16777        0xfc0003ff, 0x20000310, &NMD::XOR_32_          , 0,
16778        0x0                 },        /* XOR[32] */
16779     { reserved_block      , 0                   , 0   , 32,
16780        0xfc0003ff, 0x20000318, 0                      , 0,
16781        0x0                 },        /* _POOL32A0~*(99) */
16782     { reserved_block      , 0                   , 0   , 32,
16783        0xfc0003ff, 0x20000320, 0                      , 0,
16784        0x0                 },        /* _POOL32A0~*(100) */
16785     { reserved_block      , 0                   , 0   , 32,
16786        0xfc0003ff, 0x20000328, 0                      , 0,
16787        0x0                 },        /* _POOL32A0~*(101) */
16788     { reserved_block      , 0                   , 0   , 32,
16789        0xfc0003ff, 0x20000330, 0                      , 0,
16790        0x0                 },        /* _POOL32A0~*(102) */
16791     { reserved_block      , 0                   , 0   , 32,
16792        0xfc0003ff, 0x20000338, 0                      , 0,
16793        0x0                 },        /* _POOL32A0~*(103) */
16794     { reserved_block      , 0                   , 0   , 32,
16795        0xfc0003ff, 0x20000340, 0                      , 0,
16796        0x0                 },        /* _POOL32A0~*(104) */
16797     { reserved_block      , 0                   , 0   , 32,
16798        0xfc0003ff, 0x20000348, 0                      , 0,
16799        0x0                 },        /* _POOL32A0~*(105) */
16800     { instruction         , 0                   , 0   , 32,
16801        0xfc0003ff, 0x20000350, &NMD::SLT              , 0,
16802        0x0                 },        /* SLT */
16803     { reserved_block      , 0                   , 0   , 32,
16804        0xfc0003ff, 0x20000358, 0                      , 0,
16805        0x0                 },        /* _POOL32A0~*(107) */
16806     { reserved_block      , 0                   , 0   , 32,
16807        0xfc0003ff, 0x20000360, 0                      , 0,
16808        0x0                 },        /* _POOL32A0~*(108) */
16809     { reserved_block      , 0                   , 0   , 32,
16810        0xfc0003ff, 0x20000368, 0                      , 0,
16811        0x0                 },        /* _POOL32A0~*(109) */
16812     { reserved_block      , 0                   , 0   , 32,
16813        0xfc0003ff, 0x20000370, 0                      , 0,
16814        0x0                 },        /* _POOL32A0~*(110) */
16815     { reserved_block      , 0                   , 0   , 32,
16816        0xfc0003ff, 0x20000378, 0                      , 0,
16817        0x0                 },        /* _POOL32A0~*(111) */
16818     { reserved_block      , 0                   , 0   , 32,
16819        0xfc0003ff, 0x20000380, 0                      , 0,
16820        0x0                 },        /* _POOL32A0~*(112) */
16821     { reserved_block      , 0                   , 0   , 32,
16822        0xfc0003ff, 0x20000388, 0                      , 0,
16823        0x0                 },        /* _POOL32A0~*(113) */
16824     { pool                , P_SLTU              , 2   , 32,
16825        0xfc0003ff, 0x20000390, 0                      , 0,
16826        0x0                 },        /* P.SLTU */
16827     { reserved_block      , 0                   , 0   , 32,
16828        0xfc0003ff, 0x20000398, 0                      , 0,
16829        0x0                 },        /* _POOL32A0~*(115) */
16830     { reserved_block      , 0                   , 0   , 32,
16831        0xfc0003ff, 0x200003a0, 0                      , 0,
16832        0x0                 },        /* _POOL32A0~*(116) */
16833     { reserved_block      , 0                   , 0   , 32,
16834        0xfc0003ff, 0x200003a8, 0                      , 0,
16835        0x0                 },        /* _POOL32A0~*(117) */
16836     { reserved_block      , 0                   , 0   , 32,
16837        0xfc0003ff, 0x200003b0, 0                      , 0,
16838        0x0                 },        /* _POOL32A0~*(118) */
16839     { reserved_block      , 0                   , 0   , 32,
16840        0xfc0003ff, 0x200003b8, 0                      , 0,
16841        0x0                 },        /* _POOL32A0~*(119) */
16842     { reserved_block      , 0                   , 0   , 32,
16843        0xfc0003ff, 0x200003c0, 0                      , 0,
16844        0x0                 },        /* _POOL32A0~*(120) */
16845     { reserved_block      , 0                   , 0   , 32,
16846        0xfc0003ff, 0x200003c8, 0                      , 0,
16847        0x0                 },        /* _POOL32A0~*(121) */
16848     { instruction         , 0                   , 0   , 32,
16849        0xfc0003ff, 0x200003d0, &NMD::SOV              , 0,
16850        0x0                 },        /* SOV */
16851     { reserved_block      , 0                   , 0   , 32,
16852        0xfc0003ff, 0x200003d8, 0                      , 0,
16853        0x0                 },        /* _POOL32A0~*(123) */
16854     { reserved_block      , 0                   , 0   , 32,
16855        0xfc0003ff, 0x200003e0, 0                      , 0,
16856        0x0                 },        /* _POOL32A0~*(124) */
16857     { reserved_block      , 0                   , 0   , 32,
16858        0xfc0003ff, 0x200003e8, 0                      , 0,
16859        0x0                 },        /* _POOL32A0~*(125) */
16860     { reserved_block      , 0                   , 0   , 32,
16861        0xfc0003ff, 0x200003f0, 0                      , 0,
16862        0x0                 },        /* _POOL32A0~*(126) */
16863     { reserved_block      , 0                   , 0   , 32,
16864        0xfc0003ff, 0x200003f8, 0                      , 0,
16865        0x0                 },        /* _POOL32A0~*(127) */
16866 };
16867
16868
16869 NMD::Pool NMD::ADDQ__S__PH[2] = {
16870     { instruction         , 0                   , 0   , 32,
16871        0xfc0007ff, 0x2000000d, &NMD::ADDQ_PH          , 0,
16872        DSP_                },        /* ADDQ.PH */
16873     { instruction         , 0                   , 0   , 32,
16874        0xfc0007ff, 0x2000040d, &NMD::ADDQ_S_PH        , 0,
16875        DSP_                },        /* ADDQ_S.PH */
16876 };
16877
16878
16879 NMD::Pool NMD::MUL__S__PH[2] = {
16880     { instruction         , 0                   , 0   , 32,
16881        0xfc0007ff, 0x2000002d, &NMD::MUL_PH           , 0,
16882        DSP_                },        /* MUL.PH */
16883     { instruction         , 0                   , 0   , 32,
16884        0xfc0007ff, 0x2000042d, &NMD::MUL_S_PH         , 0,
16885        DSP_                },        /* MUL_S.PH */
16886 };
16887
16888
16889 NMD::Pool NMD::ADDQH__R__PH[2] = {
16890     { instruction         , 0                   , 0   , 32,
16891        0xfc0007ff, 0x2000004d, &NMD::ADDQH_PH         , 0,
16892        DSP_                },        /* ADDQH.PH */
16893     { instruction         , 0                   , 0   , 32,
16894        0xfc0007ff, 0x2000044d, &NMD::ADDQH_R_PH       , 0,
16895        DSP_                },        /* ADDQH_R.PH */
16896 };
16897
16898
16899 NMD::Pool NMD::ADDQH__R__W[2] = {
16900     { instruction         , 0                   , 0   , 32,
16901        0xfc0007ff, 0x2000008d, &NMD::ADDQH_W          , 0,
16902        DSP_                },        /* ADDQH.W */
16903     { instruction         , 0                   , 0   , 32,
16904        0xfc0007ff, 0x2000048d, &NMD::ADDQH_R_W        , 0,
16905        DSP_                },        /* ADDQH_R.W */
16906 };
16907
16908
16909 NMD::Pool NMD::ADDU__S__QB[2] = {
16910     { instruction         , 0                   , 0   , 32,
16911        0xfc0007ff, 0x200000cd, &NMD::ADDU_QB          , 0,
16912        DSP_                },        /* ADDU.QB */
16913     { instruction         , 0                   , 0   , 32,
16914        0xfc0007ff, 0x200004cd, &NMD::ADDU_S_QB        , 0,
16915        DSP_                },        /* ADDU_S.QB */
16916 };
16917
16918
16919 NMD::Pool NMD::ADDU__S__PH[2] = {
16920     { instruction         , 0                   , 0   , 32,
16921        0xfc0007ff, 0x2000010d, &NMD::ADDU_PH          , 0,
16922        DSP_                },        /* ADDU.PH */
16923     { instruction         , 0                   , 0   , 32,
16924        0xfc0007ff, 0x2000050d, &NMD::ADDU_S_PH        , 0,
16925        DSP_                },        /* ADDU_S.PH */
16926 };
16927
16928
16929 NMD::Pool NMD::ADDUH__R__QB[2] = {
16930     { instruction         , 0                   , 0   , 32,
16931        0xfc0007ff, 0x2000014d, &NMD::ADDUH_QB         , 0,
16932        DSP_                },        /* ADDUH.QB */
16933     { instruction         , 0                   , 0   , 32,
16934        0xfc0007ff, 0x2000054d, &NMD::ADDUH_R_QB       , 0,
16935        DSP_                },        /* ADDUH_R.QB */
16936 };
16937
16938
16939 NMD::Pool NMD::SHRAV__R__PH[2] = {
16940     { instruction         , 0                   , 0   , 32,
16941        0xfc0007ff, 0x2000018d, &NMD::SHRAV_PH         , 0,
16942        DSP_                },        /* SHRAV.PH */
16943     { instruction         , 0                   , 0   , 32,
16944        0xfc0007ff, 0x2000058d, &NMD::SHRAV_R_PH       , 0,
16945        DSP_                },        /* SHRAV_R.PH */
16946 };
16947
16948
16949 NMD::Pool NMD::SHRAV__R__QB[2] = {
16950     { instruction         , 0                   , 0   , 32,
16951        0xfc0007ff, 0x200001cd, &NMD::SHRAV_QB         , 0,
16952        DSP_                },        /* SHRAV.QB */
16953     { instruction         , 0                   , 0   , 32,
16954        0xfc0007ff, 0x200005cd, &NMD::SHRAV_R_QB       , 0,
16955        DSP_                },        /* SHRAV_R.QB */
16956 };
16957
16958
16959 NMD::Pool NMD::SUBQ__S__PH[2] = {
16960     { instruction         , 0                   , 0   , 32,
16961        0xfc0007ff, 0x2000020d, &NMD::SUBQ_PH          , 0,
16962        DSP_                },        /* SUBQ.PH */
16963     { instruction         , 0                   , 0   , 32,
16964        0xfc0007ff, 0x2000060d, &NMD::SUBQ_S_PH        , 0,
16965        DSP_                },        /* SUBQ_S.PH */
16966 };
16967
16968
16969 NMD::Pool NMD::SUBQH__R__PH[2] = {
16970     { instruction         , 0                   , 0   , 32,
16971        0xfc0007ff, 0x2000024d, &NMD::SUBQH_PH         , 0,
16972        DSP_                },        /* SUBQH.PH */
16973     { instruction         , 0                   , 0   , 32,
16974        0xfc0007ff, 0x2000064d, &NMD::SUBQH_R_PH       , 0,
16975        DSP_                },        /* SUBQH_R.PH */
16976 };
16977
16978
16979 NMD::Pool NMD::SUBQH__R__W[2] = {
16980     { instruction         , 0                   , 0   , 32,
16981        0xfc0007ff, 0x2000028d, &NMD::SUBQH_W          , 0,
16982        DSP_                },        /* SUBQH.W */
16983     { instruction         , 0                   , 0   , 32,
16984        0xfc0007ff, 0x2000068d, &NMD::SUBQH_R_W        , 0,
16985        DSP_                },        /* SUBQH_R.W */
16986 };
16987
16988
16989 NMD::Pool NMD::SUBU__S__QB[2] = {
16990     { instruction         , 0                   , 0   , 32,
16991        0xfc0007ff, 0x200002cd, &NMD::SUBU_QB          , 0,
16992        DSP_                },        /* SUBU.QB */
16993     { instruction         , 0                   , 0   , 32,
16994        0xfc0007ff, 0x200006cd, &NMD::SUBU_S_QB        , 0,
16995        DSP_                },        /* SUBU_S.QB */
16996 };
16997
16998
16999 NMD::Pool NMD::SUBU__S__PH[2] = {
17000     { instruction         , 0                   , 0   , 32,
17001        0xfc0007ff, 0x2000030d, &NMD::SUBU_PH          , 0,
17002        DSP_                },        /* SUBU.PH */
17003     { instruction         , 0                   , 0   , 32,
17004        0xfc0007ff, 0x2000070d, &NMD::SUBU_S_PH        , 0,
17005        DSP_                },        /* SUBU_S.PH */
17006 };
17007
17008
17009 NMD::Pool NMD::SHRA__R__PH[2] = {
17010     { instruction         , 0                   , 0   , 32,
17011        0xfc0007ff, 0x20000335, &NMD::SHRA_PH          , 0,
17012        DSP_                },        /* SHRA.PH */
17013     { instruction         , 0                   , 0   , 32,
17014        0xfc0007ff, 0x20000735, &NMD::SHRA_R_PH        , 0,
17015        DSP_                },        /* SHRA_R.PH */
17016 };
17017
17018
17019 NMD::Pool NMD::SUBUH__R__QB[2] = {
17020     { instruction         , 0                   , 0   , 32,
17021        0xfc0007ff, 0x2000034d, &NMD::SUBUH_QB         , 0,
17022        DSP_                },        /* SUBUH.QB */
17023     { instruction         , 0                   , 0   , 32,
17024        0xfc0007ff, 0x2000074d, &NMD::SUBUH_R_QB       , 0,
17025        DSP_                },        /* SUBUH_R.QB */
17026 };
17027
17028
17029 NMD::Pool NMD::SHLLV__S__PH[2] = {
17030     { instruction         , 0                   , 0   , 32,
17031        0xfc0007ff, 0x2000038d, &NMD::SHLLV_PH         , 0,
17032        DSP_                },        /* SHLLV.PH */
17033     { instruction         , 0                   , 0   , 32,
17034        0xfc0007ff, 0x2000078d, &NMD::SHLLV_S_PH       , 0,
17035        DSP_                },        /* SHLLV_S.PH */
17036 };
17037
17038
17039 NMD::Pool NMD::SHLL__S__PH[4] = {
17040     { instruction         , 0                   , 0   , 32,
17041        0xfc000fff, 0x200003b5, &NMD::SHLL_PH          , 0,
17042        DSP_                },        /* SHLL.PH */
17043     { reserved_block      , 0                   , 0   , 32,
17044        0xfc000fff, 0x200007b5, 0                      , 0,
17045        0x0                 },        /* SHLL[_S].PH~*(1) */
17046     { instruction         , 0                   , 0   , 32,
17047        0xfc000fff, 0x20000bb5, &NMD::SHLL_S_PH        , 0,
17048        DSP_                },        /* SHLL_S.PH */
17049     { reserved_block      , 0                   , 0   , 32,
17050        0xfc000fff, 0x20000fb5, 0                      , 0,
17051        0x0                 },        /* SHLL[_S].PH~*(3) */
17052 };
17053
17054
17055 NMD::Pool NMD::PRECR_SRA__R__PH_W[2] = {
17056     { instruction         , 0                   , 0   , 32,
17057        0xfc0007ff, 0x200003cd, &NMD::PRECR_SRA_PH_W   , 0,
17058        DSP_                },        /* PRECR_SRA.PH.W */
17059     { instruction         , 0                   , 0   , 32,
17060        0xfc0007ff, 0x200007cd, &NMD::PRECR_SRA_R_PH_W , 0,
17061        DSP_                },        /* PRECR_SRA_R.PH.W */
17062 };
17063
17064
17065 NMD::Pool NMD::_POOL32A5[128] = {
17066     { instruction         , 0                   , 0   , 32,
17067        0xfc0003ff, 0x20000005, &NMD::CMP_EQ_PH        , 0,
17068        DSP_                },        /* CMP.EQ.PH */
17069     { pool                , ADDQ__S__PH         , 2   , 32,
17070        0xfc0003ff, 0x2000000d, 0                      , 0,
17071        0x0                 },        /* ADDQ[_S].PH */
17072     { reserved_block      , 0                   , 0   , 32,
17073        0xfc0003ff, 0x20000015, 0                      , 0,
17074        0x0                 },        /* _POOL32A5~*(2) */
17075     { instruction         , 0                   , 0   , 32,
17076        0xfc0003ff, 0x2000001d, &NMD::SHILO            , 0,
17077        DSP_                },        /* SHILO */
17078     { instruction         , 0                   , 0   , 32,
17079        0xfc0003ff, 0x20000025, &NMD::MULEQ_S_W_PHL    , 0,
17080        DSP_                },        /* MULEQ_S.W.PHL */
17081     { pool                , MUL__S__PH          , 2   , 32,
17082        0xfc0003ff, 0x2000002d, 0                      , 0,
17083        0x0                 },        /* MUL[_S].PH */
17084     { reserved_block      , 0                   , 0   , 32,
17085        0xfc0003ff, 0x20000035, 0                      , 0,
17086        0x0                 },        /* _POOL32A5~*(6) */
17087     { instruction         , 0                   , 0   , 32,
17088        0xfc0003ff, 0x2000003d, &NMD::REPL_PH          , 0,
17089        DSP_                },        /* REPL.PH */
17090     { instruction         , 0                   , 0   , 32,
17091        0xfc0003ff, 0x20000045, &NMD::CMP_LT_PH        , 0,
17092        DSP_                },        /* CMP.LT.PH */
17093     { pool                , ADDQH__R__PH        , 2   , 32,
17094        0xfc0003ff, 0x2000004d, 0                      , 0,
17095        0x0                 },        /* ADDQH[_R].PH */
17096     { reserved_block      , 0                   , 0   , 32,
17097        0xfc0003ff, 0x20000055, 0                      , 0,
17098        0x0                 },        /* _POOL32A5~*(10) */
17099     { reserved_block      , 0                   , 0   , 32,
17100        0xfc0003ff, 0x2000005d, 0                      , 0,
17101        0x0                 },        /* _POOL32A5~*(11) */
17102     { instruction         , 0                   , 0   , 32,
17103        0xfc0003ff, 0x20000065, &NMD::MULEQ_S_W_PHR    , 0,
17104        DSP_                },        /* MULEQ_S.W.PHR */
17105     { instruction         , 0                   , 0   , 32,
17106        0xfc0003ff, 0x2000006d, &NMD::PRECR_QB_PH      , 0,
17107        DSP_                },        /* PRECR.QB.PH */
17108     { reserved_block      , 0                   , 0   , 32,
17109        0xfc0003ff, 0x20000075, 0                      , 0,
17110        0x0                 },        /* _POOL32A5~*(14) */
17111     { reserved_block      , 0                   , 0   , 32,
17112        0xfc0003ff, 0x2000007d, 0                      , 0,
17113        0x0                 },        /* _POOL32A5~*(15) */
17114     { instruction         , 0                   , 0   , 32,
17115        0xfc0003ff, 0x20000085, &NMD::CMP_LE_PH        , 0,
17116        DSP_                },        /* CMP.LE.PH */
17117     { pool                , ADDQH__R__W         , 2   , 32,
17118        0xfc0003ff, 0x2000008d, 0                      , 0,
17119        0x0                 },        /* ADDQH[_R].W */
17120     { instruction         , 0                   , 0   , 32,
17121        0xfc0003ff, 0x20000095, &NMD::MULEU_S_PH_QBL   , 0,
17122        DSP_                },        /* MULEU_S.PH.QBL */
17123     { reserved_block      , 0                   , 0   , 32,
17124        0xfc0003ff, 0x2000009d, 0                      , 0,
17125        0x0                 },        /* _POOL32A5~*(19) */
17126     { reserved_block      , 0                   , 0   , 32,
17127        0xfc0003ff, 0x200000a5, 0                      , 0,
17128        0x0                 },        /* _POOL32A5~*(20) */
17129     { instruction         , 0                   , 0   , 32,
17130        0xfc0003ff, 0x200000ad, &NMD::PRECRQ_QB_PH     , 0,
17131        DSP_                },        /* PRECRQ.QB.PH */
17132     { reserved_block      , 0                   , 0   , 32,
17133        0xfc0003ff, 0x200000b5, 0                      , 0,
17134        0x0                 },        /* _POOL32A5~*(22) */
17135     { reserved_block      , 0                   , 0   , 32,
17136        0xfc0003ff, 0x200000bd, 0                      , 0,
17137        0x0                 },        /* _POOL32A5~*(23) */
17138     { instruction         , 0                   , 0   , 32,
17139        0xfc0003ff, 0x200000c5, &NMD::CMPGU_EQ_QB      , 0,
17140        DSP_                },        /* CMPGU.EQ.QB */
17141     { pool                , ADDU__S__QB         , 2   , 32,
17142        0xfc0003ff, 0x200000cd, 0                      , 0,
17143        0x0                 },        /* ADDU[_S].QB */
17144     { instruction         , 0                   , 0   , 32,
17145        0xfc0003ff, 0x200000d5, &NMD::MULEU_S_PH_QBR   , 0,
17146        DSP_                },        /* MULEU_S.PH.QBR */
17147     { reserved_block      , 0                   , 0   , 32,
17148        0xfc0003ff, 0x200000dd, 0                      , 0,
17149        0x0                 },        /* _POOL32A5~*(27) */
17150     { reserved_block      , 0                   , 0   , 32,
17151        0xfc0003ff, 0x200000e5, 0                      , 0,
17152        0x0                 },        /* _POOL32A5~*(28) */
17153     { instruction         , 0                   , 0   , 32,
17154        0xfc0003ff, 0x200000ed, &NMD::PRECRQ_PH_W      , 0,
17155        DSP_                },        /* PRECRQ.PH.W */
17156     { reserved_block      , 0                   , 0   , 32,
17157        0xfc0003ff, 0x200000f5, 0                      , 0,
17158        0x0                 },        /* _POOL32A5~*(30) */
17159     { reserved_block      , 0                   , 0   , 32,
17160        0xfc0003ff, 0x200000fd, 0                      , 0,
17161        0x0                 },        /* _POOL32A5~*(31) */
17162     { instruction         , 0                   , 0   , 32,
17163        0xfc0003ff, 0x20000105, &NMD::CMPGU_LT_QB      , 0,
17164        DSP_                },        /* CMPGU.LT.QB */
17165     { pool                , ADDU__S__PH         , 2   , 32,
17166        0xfc0003ff, 0x2000010d, 0                      , 0,
17167        0x0                 },        /* ADDU[_S].PH */
17168     { instruction         , 0                   , 0   , 32,
17169        0xfc0003ff, 0x20000115, &NMD::MULQ_RS_PH       , 0,
17170        DSP_                },        /* MULQ_RS.PH */
17171     { reserved_block      , 0                   , 0   , 32,
17172        0xfc0003ff, 0x2000011d, 0                      , 0,
17173        0x0                 },        /* _POOL32A5~*(35) */
17174     { reserved_block      , 0                   , 0   , 32,
17175        0xfc0003ff, 0x20000125, 0                      , 0,
17176        0x0                 },        /* _POOL32A5~*(36) */
17177     { instruction         , 0                   , 0   , 32,
17178        0xfc0003ff, 0x2000012d, &NMD::PRECRQ_RS_PH_W   , 0,
17179        DSP_                },        /* PRECRQ_RS.PH.W */
17180     { reserved_block      , 0                   , 0   , 32,
17181        0xfc0003ff, 0x20000135, 0                      , 0,
17182        0x0                 },        /* _POOL32A5~*(38) */
17183     { reserved_block      , 0                   , 0   , 32,
17184        0xfc0003ff, 0x2000013d, 0                      , 0,
17185        0x0                 },        /* _POOL32A5~*(39) */
17186     { instruction         , 0                   , 0   , 32,
17187        0xfc0003ff, 0x20000145, &NMD::CMPGU_LE_QB      , 0,
17188        DSP_                },        /* CMPGU.LE.QB */
17189     { pool                , ADDUH__R__QB        , 2   , 32,
17190        0xfc0003ff, 0x2000014d, 0                      , 0,
17191        0x0                 },        /* ADDUH[_R].QB */
17192     { instruction         , 0                   , 0   , 32,
17193        0xfc0003ff, 0x20000155, &NMD::MULQ_S_PH        , 0,
17194        DSP_                },        /* MULQ_S.PH */
17195     { reserved_block      , 0                   , 0   , 32,
17196        0xfc0003ff, 0x2000015d, 0                      , 0,
17197        0x0                 },        /* _POOL32A5~*(43) */
17198     { reserved_block      , 0                   , 0   , 32,
17199        0xfc0003ff, 0x20000165, 0                      , 0,
17200        0x0                 },        /* _POOL32A5~*(44) */
17201     { instruction         , 0                   , 0   , 32,
17202        0xfc0003ff, 0x2000016d, &NMD::PRECRQU_S_QB_PH  , 0,
17203        DSP_                },        /* PRECRQU_S.QB.PH */
17204     { reserved_block      , 0                   , 0   , 32,
17205        0xfc0003ff, 0x20000175, 0                      , 0,
17206        0x0                 },        /* _POOL32A5~*(46) */
17207     { reserved_block      , 0                   , 0   , 32,
17208        0xfc0003ff, 0x2000017d, 0                      , 0,
17209        0x0                 },        /* _POOL32A5~*(47) */
17210     { instruction         , 0                   , 0   , 32,
17211        0xfc0003ff, 0x20000185, &NMD::CMPGDU_EQ_QB     , 0,
17212        DSP_                },        /* CMPGDU.EQ.QB */
17213     { pool                , SHRAV__R__PH        , 2   , 32,
17214        0xfc0003ff, 0x2000018d, 0                      , 0,
17215        0x0                 },        /* SHRAV[_R].PH */
17216     { instruction         , 0                   , 0   , 32,
17217        0xfc0003ff, 0x20000195, &NMD::MULQ_RS_W        , 0,
17218        DSP_                },        /* MULQ_RS.W */
17219     { reserved_block      , 0                   , 0   , 32,
17220        0xfc0003ff, 0x2000019d, 0                      , 0,
17221        0x0                 },        /* _POOL32A5~*(51) */
17222     { reserved_block      , 0                   , 0   , 32,
17223        0xfc0003ff, 0x200001a5, 0                      , 0,
17224        0x0                 },        /* _POOL32A5~*(52) */
17225     { instruction         , 0                   , 0   , 32,
17226        0xfc0003ff, 0x200001ad, &NMD::PACKRL_PH        , 0,
17227        DSP_                },        /* PACKRL.PH */
17228     { reserved_block      , 0                   , 0   , 32,
17229        0xfc0003ff, 0x200001b5, 0                      , 0,
17230        0x0                 },        /* _POOL32A5~*(54) */
17231     { reserved_block      , 0                   , 0   , 32,
17232        0xfc0003ff, 0x200001bd, 0                      , 0,
17233        0x0                 },        /* _POOL32A5~*(55) */
17234     { instruction         , 0                   , 0   , 32,
17235        0xfc0003ff, 0x200001c5, &NMD::CMPGDU_LT_QB     , 0,
17236        DSP_                },        /* CMPGDU.LT.QB */
17237     { pool                , SHRAV__R__QB        , 2   , 32,
17238        0xfc0003ff, 0x200001cd, 0                      , 0,
17239        0x0                 },        /* SHRAV[_R].QB */
17240     { instruction         , 0                   , 0   , 32,
17241        0xfc0003ff, 0x200001d5, &NMD::MULQ_S_W         , 0,
17242        DSP_                },        /* MULQ_S.W */
17243     { reserved_block      , 0                   , 0   , 32,
17244        0xfc0003ff, 0x200001dd, 0                      , 0,
17245        0x0                 },        /* _POOL32A5~*(59) */
17246     { reserved_block      , 0                   , 0   , 32,
17247        0xfc0003ff, 0x200001e5, 0                      , 0,
17248        0x0                 },        /* _POOL32A5~*(60) */
17249     { instruction         , 0                   , 0   , 32,
17250        0xfc0003ff, 0x200001ed, &NMD::PICK_QB          , 0,
17251        DSP_                },        /* PICK.QB */
17252     { reserved_block      , 0                   , 0   , 32,
17253        0xfc0003ff, 0x200001f5, 0                      , 0,
17254        0x0                 },        /* _POOL32A5~*(62) */
17255     { reserved_block      , 0                   , 0   , 32,
17256        0xfc0003ff, 0x200001fd, 0                      , 0,
17257        0x0                 },        /* _POOL32A5~*(63) */
17258     { instruction         , 0                   , 0   , 32,
17259        0xfc0003ff, 0x20000205, &NMD::CMPGDU_LE_QB     , 0,
17260        DSP_                },        /* CMPGDU.LE.QB */
17261     { pool                , SUBQ__S__PH         , 2   , 32,
17262        0xfc0003ff, 0x2000020d, 0                      , 0,
17263        0x0                 },        /* SUBQ[_S].PH */
17264     { instruction         , 0                   , 0   , 32,
17265        0xfc0003ff, 0x20000215, &NMD::APPEND           , 0,
17266        DSP_                },        /* APPEND */
17267     { reserved_block      , 0                   , 0   , 32,
17268        0xfc0003ff, 0x2000021d, 0                      , 0,
17269        0x0                 },        /* _POOL32A5~*(67) */
17270     { reserved_block      , 0                   , 0   , 32,
17271        0xfc0003ff, 0x20000225, 0                      , 0,
17272        0x0                 },        /* _POOL32A5~*(68) */
17273     { instruction         , 0                   , 0   , 32,
17274        0xfc0003ff, 0x2000022d, &NMD::PICK_PH          , 0,
17275        DSP_                },        /* PICK.PH */
17276     { reserved_block      , 0                   , 0   , 32,
17277        0xfc0003ff, 0x20000235, 0                      , 0,
17278        0x0                 },        /* _POOL32A5~*(70) */
17279     { reserved_block      , 0                   , 0   , 32,
17280        0xfc0003ff, 0x2000023d, 0                      , 0,
17281        0x0                 },        /* _POOL32A5~*(71) */
17282     { instruction         , 0                   , 0   , 32,
17283        0xfc0003ff, 0x20000245, &NMD::CMPU_EQ_QB       , 0,
17284        DSP_                },        /* CMPU.EQ.QB */
17285     { pool                , SUBQH__R__PH        , 2   , 32,
17286        0xfc0003ff, 0x2000024d, 0                      , 0,
17287        0x0                 },        /* SUBQH[_R].PH */
17288     { instruction         , 0                   , 0   , 32,
17289        0xfc0003ff, 0x20000255, &NMD::PREPEND          , 0,
17290        DSP_                },        /* PREPEND */
17291     { reserved_block      , 0                   , 0   , 32,
17292        0xfc0003ff, 0x2000025d, 0                      , 0,
17293        0x0                 },        /* _POOL32A5~*(75) */
17294     { reserved_block      , 0                   , 0   , 32,
17295        0xfc0003ff, 0x20000265, 0                      , 0,
17296        0x0                 },        /* _POOL32A5~*(76) */
17297     { reserved_block      , 0                   , 0   , 32,
17298        0xfc0003ff, 0x2000026d, 0                      , 0,
17299        0x0                 },        /* _POOL32A5~*(77) */
17300     { reserved_block      , 0                   , 0   , 32,
17301        0xfc0003ff, 0x20000275, 0                      , 0,
17302        0x0                 },        /* _POOL32A5~*(78) */
17303     { reserved_block      , 0                   , 0   , 32,
17304        0xfc0003ff, 0x2000027d, 0                      , 0,
17305        0x0                 },        /* _POOL32A5~*(79) */
17306     { instruction         , 0                   , 0   , 32,
17307        0xfc0003ff, 0x20000285, &NMD::CMPU_LT_QB       , 0,
17308        DSP_                },        /* CMPU.LT.QB */
17309     { pool                , SUBQH__R__W         , 2   , 32,
17310        0xfc0003ff, 0x2000028d, 0                      , 0,
17311        0x0                 },        /* SUBQH[_R].W */
17312     { instruction         , 0                   , 0   , 32,
17313        0xfc0003ff, 0x20000295, &NMD::MODSUB           , 0,
17314        DSP_                },        /* MODSUB */
17315     { reserved_block      , 0                   , 0   , 32,
17316        0xfc0003ff, 0x2000029d, 0                      , 0,
17317        0x0                 },        /* _POOL32A5~*(83) */
17318     { reserved_block      , 0                   , 0   , 32,
17319        0xfc0003ff, 0x200002a5, 0                      , 0,
17320        0x0                 },        /* _POOL32A5~*(84) */
17321     { reserved_block      , 0                   , 0   , 32,
17322        0xfc0003ff, 0x200002ad, 0                      , 0,
17323        0x0                 },        /* _POOL32A5~*(85) */
17324     { reserved_block      , 0                   , 0   , 32,
17325        0xfc0003ff, 0x200002b5, 0                      , 0,
17326        0x0                 },        /* _POOL32A5~*(86) */
17327     { reserved_block      , 0                   , 0   , 32,
17328        0xfc0003ff, 0x200002bd, 0                      , 0,
17329        0x0                 },        /* _POOL32A5~*(87) */
17330     { instruction         , 0                   , 0   , 32,
17331        0xfc0003ff, 0x200002c5, &NMD::CMPU_LE_QB       , 0,
17332        DSP_                },        /* CMPU.LE.QB */
17333     { pool                , SUBU__S__QB         , 2   , 32,
17334        0xfc0003ff, 0x200002cd, 0                      , 0,
17335        0x0                 },        /* SUBU[_S].QB */
17336     { instruction         , 0                   , 0   , 32,
17337        0xfc0003ff, 0x200002d5, &NMD::SHRAV_R_W        , 0,
17338        DSP_                },        /* SHRAV_R.W */
17339     { reserved_block      , 0                   , 0   , 32,
17340        0xfc0003ff, 0x200002dd, 0                      , 0,
17341        0x0                 },        /* _POOL32A5~*(91) */
17342     { reserved_block      , 0                   , 0   , 32,
17343        0xfc0003ff, 0x200002e5, 0                      , 0,
17344        0x0                 },        /* _POOL32A5~*(92) */
17345     { reserved_block      , 0                   , 0   , 32,
17346        0xfc0003ff, 0x200002ed, 0                      , 0,
17347        0x0                 },        /* _POOL32A5~*(93) */
17348     { instruction         , 0                   , 0   , 32,
17349        0xfc0003ff, 0x200002f5, &NMD::SHRA_R_W         , 0,
17350        DSP_                },        /* SHRA_R.W */
17351     { reserved_block      , 0                   , 0   , 32,
17352        0xfc0003ff, 0x200002fd, 0                      , 0,
17353        0x0                 },        /* _POOL32A5~*(95) */
17354     { instruction         , 0                   , 0   , 32,
17355        0xfc0003ff, 0x20000305, &NMD::ADDQ_S_W         , 0,
17356        DSP_                },        /* ADDQ_S.W */
17357     { pool                , SUBU__S__PH         , 2   , 32,
17358        0xfc0003ff, 0x2000030d, 0                      , 0,
17359        0x0                 },        /* SUBU[_S].PH */
17360     { instruction         , 0                   , 0   , 32,
17361        0xfc0003ff, 0x20000315, &NMD::SHRLV_PH         , 0,
17362        DSP_                },        /* SHRLV.PH */
17363     { reserved_block      , 0                   , 0   , 32,
17364        0xfc0003ff, 0x2000031d, 0                      , 0,
17365        0x0                 },        /* _POOL32A5~*(99) */
17366     { reserved_block      , 0                   , 0   , 32,
17367        0xfc0003ff, 0x20000325, 0                      , 0,
17368        0x0                 },        /* _POOL32A5~*(100) */
17369     { reserved_block      , 0                   , 0   , 32,
17370        0xfc0003ff, 0x2000032d, 0                      , 0,
17371        0x0                 },        /* _POOL32A5~*(101) */
17372     { pool                , SHRA__R__PH         , 2   , 32,
17373        0xfc0003ff, 0x20000335, 0                      , 0,
17374        0x0                 },        /* SHRA[_R].PH */
17375     { reserved_block      , 0                   , 0   , 32,
17376        0xfc0003ff, 0x2000033d, 0                      , 0,
17377        0x0                 },        /* _POOL32A5~*(103) */
17378     { instruction         , 0                   , 0   , 32,
17379        0xfc0003ff, 0x20000345, &NMD::SUBQ_S_W         , 0,
17380        DSP_                },        /* SUBQ_S.W */
17381     { pool                , SUBUH__R__QB        , 2   , 32,
17382        0xfc0003ff, 0x2000034d, 0                      , 0,
17383        0x0                 },        /* SUBUH[_R].QB */
17384     { instruction         , 0                   , 0   , 32,
17385        0xfc0003ff, 0x20000355, &NMD::SHRLV_QB         , 0,
17386        DSP_                },        /* SHRLV.QB */
17387     { reserved_block      , 0                   , 0   , 32,
17388        0xfc0003ff, 0x2000035d, 0                      , 0,
17389        0x0                 },        /* _POOL32A5~*(107) */
17390     { reserved_block      , 0                   , 0   , 32,
17391        0xfc0003ff, 0x20000365, 0                      , 0,
17392        0x0                 },        /* _POOL32A5~*(108) */
17393     { reserved_block      , 0                   , 0   , 32,
17394        0xfc0003ff, 0x2000036d, 0                      , 0,
17395        0x0                 },        /* _POOL32A5~*(109) */
17396     { reserved_block      , 0                   , 0   , 32,
17397        0xfc0003ff, 0x20000375, 0                      , 0,
17398        0x0                 },        /* _POOL32A5~*(110) */
17399     { reserved_block      , 0                   , 0   , 32,
17400        0xfc0003ff, 0x2000037d, 0                      , 0,
17401        0x0                 },        /* _POOL32A5~*(111) */
17402     { instruction         , 0                   , 0   , 32,
17403        0xfc0003ff, 0x20000385, &NMD::ADDSC            , 0,
17404        DSP_                },        /* ADDSC */
17405     { pool                , SHLLV__S__PH        , 2   , 32,
17406        0xfc0003ff, 0x2000038d, 0                      , 0,
17407        0x0                 },        /* SHLLV[_S].PH */
17408     { instruction         , 0                   , 0   , 32,
17409        0xfc0003ff, 0x20000395, &NMD::SHLLV_QB         , 0,
17410        DSP_                },        /* SHLLV.QB */
17411     { reserved_block      , 0                   , 0   , 32,
17412        0xfc0003ff, 0x2000039d, 0                      , 0,
17413        0x0                 },        /* _POOL32A5~*(115) */
17414     { reserved_block      , 0                   , 0   , 32,
17415        0xfc0003ff, 0x200003a5, 0                      , 0,
17416        0x0                 },        /* _POOL32A5~*(116) */
17417     { reserved_block      , 0                   , 0   , 32,
17418        0xfc0003ff, 0x200003ad, 0                      , 0,
17419        0x0                 },        /* _POOL32A5~*(117) */
17420     { pool                , SHLL__S__PH         , 4   , 32,
17421        0xfc0003ff, 0x200003b5, 0                      , 0,
17422        0x0                 },        /* SHLL[_S].PH */
17423     { reserved_block      , 0                   , 0   , 32,
17424        0xfc0003ff, 0x200003bd, 0                      , 0,
17425        0x0                 },        /* _POOL32A5~*(119) */
17426     { instruction         , 0                   , 0   , 32,
17427        0xfc0003ff, 0x200003c5, &NMD::ADDWC            , 0,
17428        DSP_                },        /* ADDWC */
17429     { pool                , PRECR_SRA__R__PH_W  , 2   , 32,
17430        0xfc0003ff, 0x200003cd, 0                      , 0,
17431        0x0                 },        /* PRECR_SRA[_R].PH.W */
17432     { instruction         , 0                   , 0   , 32,
17433        0xfc0003ff, 0x200003d5, &NMD::SHLLV_S_W        , 0,
17434        DSP_                },        /* SHLLV_S.W */
17435     { reserved_block      , 0                   , 0   , 32,
17436        0xfc0003ff, 0x200003dd, 0                      , 0,
17437        0x0                 },        /* _POOL32A5~*(123) */
17438     { reserved_block      , 0                   , 0   , 32,
17439        0xfc0003ff, 0x200003e5, 0                      , 0,
17440        0x0                 },        /* _POOL32A5~*(124) */
17441     { reserved_block      , 0                   , 0   , 32,
17442        0xfc0003ff, 0x200003ed, 0                      , 0,
17443        0x0                 },        /* _POOL32A5~*(125) */
17444     { instruction         , 0                   , 0   , 32,
17445        0xfc0003ff, 0x200003f5, &NMD::SHLL_S_W         , 0,
17446        DSP_                },        /* SHLL_S.W */
17447     { reserved_block      , 0                   , 0   , 32,
17448        0xfc0003ff, 0x200003fd, 0                      , 0,
17449        0x0                 },        /* _POOL32A5~*(127) */
17450 };
17451
17452
17453 NMD::Pool NMD::PP_LSX[16] = {
17454     { instruction         , 0                   , 0   , 32,
17455        0xfc0007ff, 0x20000007, &NMD::LBX              , 0,
17456        0x0                 },        /* LBX */
17457     { instruction         , 0                   , 0   , 32,
17458        0xfc0007ff, 0x20000087, &NMD::SBX              , 0,
17459        XMMS_               },        /* SBX */
17460     { instruction         , 0                   , 0   , 32,
17461        0xfc0007ff, 0x20000107, &NMD::LBUX             , 0,
17462        0x0                 },        /* LBUX */
17463     { reserved_block      , 0                   , 0   , 32,
17464        0xfc0007ff, 0x20000187, 0                      , 0,
17465        0x0                 },        /* PP.LSX~*(3) */
17466     { instruction         , 0                   , 0   , 32,
17467        0xfc0007ff, 0x20000207, &NMD::LHX              , 0,
17468        0x0                 },        /* LHX */
17469     { instruction         , 0                   , 0   , 32,
17470        0xfc0007ff, 0x20000287, &NMD::SHX              , 0,
17471        XMMS_               },        /* SHX */
17472     { instruction         , 0                   , 0   , 32,
17473        0xfc0007ff, 0x20000307, &NMD::LHUX             , 0,
17474        0x0                 },        /* LHUX */
17475     { instruction         , 0                   , 0   , 32,
17476        0xfc0007ff, 0x20000387, &NMD::LWUX             , 0,
17477        MIPS64_             },        /* LWUX */
17478     { instruction         , 0                   , 0   , 32,
17479        0xfc0007ff, 0x20000407, &NMD::LWX              , 0,
17480        0x0                 },        /* LWX */
17481     { instruction         , 0                   , 0   , 32,
17482        0xfc0007ff, 0x20000487, &NMD::SWX              , 0,
17483        XMMS_               },        /* SWX */
17484     { instruction         , 0                   , 0   , 32,
17485        0xfc0007ff, 0x20000507, &NMD::LWC1X            , 0,
17486        CP1_                },        /* LWC1X */
17487     { instruction         , 0                   , 0   , 32,
17488        0xfc0007ff, 0x20000587, &NMD::SWC1X            , 0,
17489        CP1_                },        /* SWC1X */
17490     { instruction         , 0                   , 0   , 32,
17491        0xfc0007ff, 0x20000607, &NMD::LDX              , 0,
17492        MIPS64_             },        /* LDX */
17493     { instruction         , 0                   , 0   , 32,
17494        0xfc0007ff, 0x20000687, &NMD::SDX              , 0,
17495        MIPS64_             },        /* SDX */
17496     { instruction         , 0                   , 0   , 32,
17497        0xfc0007ff, 0x20000707, &NMD::LDC1X            , 0,
17498        CP1_                },        /* LDC1X */
17499     { instruction         , 0                   , 0   , 32,
17500        0xfc0007ff, 0x20000787, &NMD::SDC1X            , 0,
17501        CP1_                },        /* SDC1X */
17502 };
17503
17504
17505 NMD::Pool NMD::PP_LSXS[16] = {
17506     { reserved_block      , 0                   , 0   , 32,
17507        0xfc0007ff, 0x20000047, 0                      , 0,
17508        0x0                 },        /* PP.LSXS~*(0) */
17509     { reserved_block      , 0                   , 0   , 32,
17510        0xfc0007ff, 0x200000c7, 0                      , 0,
17511        0x0                 },        /* PP.LSXS~*(1) */
17512     { reserved_block      , 0                   , 0   , 32,
17513        0xfc0007ff, 0x20000147, 0                      , 0,
17514        0x0                 },        /* PP.LSXS~*(2) */
17515     { reserved_block      , 0                   , 0   , 32,
17516        0xfc0007ff, 0x200001c7, 0                      , 0,
17517        0x0                 },        /* PP.LSXS~*(3) */
17518     { instruction         , 0                   , 0   , 32,
17519        0xfc0007ff, 0x20000247, &NMD::LHXS             , 0,
17520        0x0                 },        /* LHXS */
17521     { instruction         , 0                   , 0   , 32,
17522        0xfc0007ff, 0x200002c7, &NMD::SHXS             , 0,
17523        XMMS_               },        /* SHXS */
17524     { instruction         , 0                   , 0   , 32,
17525        0xfc0007ff, 0x20000347, &NMD::LHUXS            , 0,
17526        0x0                 },        /* LHUXS */
17527     { instruction         , 0                   , 0   , 32,
17528        0xfc0007ff, 0x200003c7, &NMD::LWUXS            , 0,
17529        MIPS64_             },        /* LWUXS */
17530     { instruction         , 0                   , 0   , 32,
17531        0xfc0007ff, 0x20000447, &NMD::LWXS_32_         , 0,
17532        0x0                 },        /* LWXS[32] */
17533     { instruction         , 0                   , 0   , 32,
17534        0xfc0007ff, 0x200004c7, &NMD::SWXS             , 0,
17535        XMMS_               },        /* SWXS */
17536     { instruction         , 0                   , 0   , 32,
17537        0xfc0007ff, 0x20000547, &NMD::LWC1XS           , 0,
17538        CP1_                },        /* LWC1XS */
17539     { instruction         , 0                   , 0   , 32,
17540        0xfc0007ff, 0x200005c7, &NMD::SWC1XS           , 0,
17541        CP1_                },        /* SWC1XS */
17542     { instruction         , 0                   , 0   , 32,
17543        0xfc0007ff, 0x20000647, &NMD::LDXS             , 0,
17544        MIPS64_             },        /* LDXS */
17545     { instruction         , 0                   , 0   , 32,
17546        0xfc0007ff, 0x200006c7, &NMD::SDXS             , 0,
17547        MIPS64_             },        /* SDXS */
17548     { instruction         , 0                   , 0   , 32,
17549        0xfc0007ff, 0x20000747, &NMD::LDC1XS           , 0,
17550        CP1_                },        /* LDC1XS */
17551     { instruction         , 0                   , 0   , 32,
17552        0xfc0007ff, 0x200007c7, &NMD::SDC1XS           , 0,
17553        CP1_                },        /* SDC1XS */
17554 };
17555
17556
17557 NMD::Pool NMD::P_LSX[2] = {
17558     { pool                , PP_LSX              , 16  , 32,
17559        0xfc00007f, 0x20000007, 0                      , 0,
17560        0x0                 },        /* PP.LSX */
17561     { pool                , PP_LSXS             , 16  , 32,
17562        0xfc00007f, 0x20000047, 0                      , 0,
17563        0x0                 },        /* PP.LSXS */
17564 };
17565
17566
17567 NMD::Pool NMD::POOL32Axf_1_0[4] = {
17568     { instruction         , 0                   , 0   , 32,
17569        0xfc003fff, 0x2000007f, &NMD::MFHI_DSP_        , 0,
17570        DSP_                },        /* MFHI[DSP] */
17571     { instruction         , 0                   , 0   , 32,
17572        0xfc003fff, 0x2000107f, &NMD::MFLO_DSP_        , 0,
17573        DSP_                },        /* MFLO[DSP] */
17574     { instruction         , 0                   , 0   , 32,
17575        0xfc003fff, 0x2000207f, &NMD::MTHI_DSP_        , 0,
17576        DSP_                },        /* MTHI[DSP] */
17577     { instruction         , 0                   , 0   , 32,
17578        0xfc003fff, 0x2000307f, &NMD::MTLO_DSP_        , 0,
17579        DSP_                },        /* MTLO[DSP] */
17580 };
17581
17582
17583 NMD::Pool NMD::POOL32Axf_1_1[4] = {
17584     { instruction         , 0                   , 0   , 32,
17585        0xfc003fff, 0x2000027f, &NMD::MTHLIP           , 0,
17586        DSP_                },        /* MTHLIP */
17587     { instruction         , 0                   , 0   , 32,
17588        0xfc003fff, 0x2000127f, &NMD::SHILOV           , 0,
17589        DSP_                },        /* SHILOV */
17590     { reserved_block      , 0                   , 0   , 32,
17591        0xfc003fff, 0x2000227f, 0                      , 0,
17592        0x0                 },        /* POOL32Axf_1_1~*(2) */
17593     { reserved_block      , 0                   , 0   , 32,
17594        0xfc003fff, 0x2000327f, 0                      , 0,
17595        0x0                 },        /* POOL32Axf_1_1~*(3) */
17596 };
17597
17598
17599 NMD::Pool NMD::POOL32Axf_1_3[4] = {
17600     { instruction         , 0                   , 0   , 32,
17601        0xfc003fff, 0x2000067f, &NMD::RDDSP            , 0,
17602        DSP_                },        /* RDDSP */
17603     { instruction         , 0                   , 0   , 32,
17604        0xfc003fff, 0x2000167f, &NMD::WRDSP            , 0,
17605        DSP_                },        /* WRDSP */
17606     { instruction         , 0                   , 0   , 32,
17607        0xfc003fff, 0x2000267f, &NMD::EXTP             , 0,
17608        DSP_                },        /* EXTP */
17609     { instruction         , 0                   , 0   , 32,
17610        0xfc003fff, 0x2000367f, &NMD::EXTPDP           , 0,
17611        DSP_                },        /* EXTPDP */
17612 };
17613
17614
17615 NMD::Pool NMD::POOL32Axf_1_4[2] = {
17616     { instruction         , 0                   , 0   , 32,
17617        0xfc001fff, 0x2000087f, &NMD::SHLL_QB          , 0,
17618        DSP_                },        /* SHLL.QB */
17619     { instruction         , 0                   , 0   , 32,
17620        0xfc001fff, 0x2000187f, &NMD::SHRL_QB          , 0,
17621        DSP_                },        /* SHRL.QB */
17622 };
17623
17624
17625 NMD::Pool NMD::MAQ_S_A__W_PHR[2] = {
17626     { instruction         , 0                   , 0   , 32,
17627        0xfc003fff, 0x20000a7f, &NMD::MAQ_S_W_PHR      , 0,
17628        DSP_                },        /* MAQ_S.W.PHR */
17629     { instruction         , 0                   , 0   , 32,
17630        0xfc003fff, 0x20002a7f, &NMD::MAQ_SA_W_PHR     , 0,
17631        DSP_                },        /* MAQ_SA.W.PHR */
17632 };
17633
17634
17635 NMD::Pool NMD::MAQ_S_A__W_PHL[2] = {
17636     { instruction         , 0                   , 0   , 32,
17637        0xfc003fff, 0x20001a7f, &NMD::MAQ_S_W_PHL      , 0,
17638        DSP_                },        /* MAQ_S.W.PHL */
17639     { instruction         , 0                   , 0   , 32,
17640        0xfc003fff, 0x20003a7f, &NMD::MAQ_SA_W_PHL     , 0,
17641        DSP_                },        /* MAQ_SA.W.PHL */
17642 };
17643
17644
17645 NMD::Pool NMD::POOL32Axf_1_5[2] = {
17646     { pool                , MAQ_S_A__W_PHR      , 2   , 32,
17647        0xfc001fff, 0x20000a7f, 0                      , 0,
17648        0x0                 },        /* MAQ_S[A].W.PHR */
17649     { pool                , MAQ_S_A__W_PHL      , 2   , 32,
17650        0xfc001fff, 0x20001a7f, 0                      , 0,
17651        0x0                 },        /* MAQ_S[A].W.PHL */
17652 };
17653
17654
17655 NMD::Pool NMD::POOL32Axf_1_7[4] = {
17656     { instruction         , 0                   , 0   , 32,
17657        0xfc003fff, 0x20000e7f, &NMD::EXTR_W           , 0,
17658        DSP_                },        /* EXTR.W */
17659     { instruction         , 0                   , 0   , 32,
17660        0xfc003fff, 0x20001e7f, &NMD::EXTR_R_W         , 0,
17661        DSP_                },        /* EXTR_R.W */
17662     { instruction         , 0                   , 0   , 32,
17663        0xfc003fff, 0x20002e7f, &NMD::EXTR_RS_W        , 0,
17664        DSP_                },        /* EXTR_RS.W */
17665     { instruction         , 0                   , 0   , 32,
17666        0xfc003fff, 0x20003e7f, &NMD::EXTR_S_H         , 0,
17667        DSP_                },        /* EXTR_S.H */
17668 };
17669
17670
17671 NMD::Pool NMD::POOL32Axf_1[8] = {
17672     { pool                , POOL32Axf_1_0       , 4   , 32,
17673        0xfc000fff, 0x2000007f, 0                      , 0,
17674        0x0                 },        /* POOL32Axf_1_0 */
17675     { pool                , POOL32Axf_1_1       , 4   , 32,
17676        0xfc000fff, 0x2000027f, 0                      , 0,
17677        0x0                 },        /* POOL32Axf_1_1 */
17678     { reserved_block      , 0                   , 0   , 32,
17679        0xfc000fff, 0x2000047f, 0                      , 0,
17680        0x0                 },        /* POOL32Axf_1~*(2) */
17681     { pool                , POOL32Axf_1_3       , 4   , 32,
17682        0xfc000fff, 0x2000067f, 0                      , 0,
17683        0x0                 },        /* POOL32Axf_1_3 */
17684     { pool                , POOL32Axf_1_4       , 2   , 32,
17685        0xfc000fff, 0x2000087f, 0                      , 0,
17686        0x0                 },        /* POOL32Axf_1_4 */
17687     { pool                , POOL32Axf_1_5       , 2   , 32,
17688        0xfc000fff, 0x20000a7f, 0                      , 0,
17689        0x0                 },        /* POOL32Axf_1_5 */
17690     { reserved_block      , 0                   , 0   , 32,
17691        0xfc000fff, 0x20000c7f, 0                      , 0,
17692        0x0                 },        /* POOL32Axf_1~*(6) */
17693     { pool                , POOL32Axf_1_7       , 4   , 32,
17694        0xfc000fff, 0x20000e7f, 0                      , 0,
17695        0x0                 },        /* POOL32Axf_1_7 */
17696 };
17697
17698
17699 NMD::Pool NMD::POOL32Axf_2_DSP__0_7[8] = {
17700     { instruction         , 0                   , 0   , 32,
17701        0xfc003fff, 0x200000bf, &NMD::DPA_W_PH         , 0,
17702        DSP_                },        /* DPA.W.PH */
17703     { instruction         , 0                   , 0   , 32,
17704        0xfc003fff, 0x200002bf, &NMD::DPAQ_S_W_PH      , 0,
17705        DSP_                },        /* DPAQ_S.W.PH */
17706     { instruction         , 0                   , 0   , 32,
17707        0xfc003fff, 0x200004bf, &NMD::DPS_W_PH         , 0,
17708        DSP_                },        /* DPS.W.PH */
17709     { instruction         , 0                   , 0   , 32,
17710        0xfc003fff, 0x200006bf, &NMD::DPSQ_S_W_PH      , 0,
17711        DSP_                },        /* DPSQ_S.W.PH */
17712     { reserved_block      , 0                   , 0   , 32,
17713        0xfc003fff, 0x200008bf, 0                      , 0,
17714        0x0                 },        /* POOL32Axf_2(DSP)_0_7~*(4) */
17715     { instruction         , 0                   , 0   , 32,
17716        0xfc003fff, 0x20000abf, &NMD::MADD_DSP_        , 0,
17717        DSP_                },        /* MADD[DSP] */
17718     { instruction         , 0                   , 0   , 32,
17719        0xfc003fff, 0x20000cbf, &NMD::MULT_DSP_        , 0,
17720        DSP_                },        /* MULT[DSP] */
17721     { instruction         , 0                   , 0   , 32,
17722        0xfc003fff, 0x20000ebf, &NMD::EXTRV_W          , 0,
17723        DSP_                },        /* EXTRV.W */
17724 };
17725
17726
17727 NMD::Pool NMD::POOL32Axf_2_DSP__8_15[8] = {
17728     { instruction         , 0                   , 0   , 32,
17729        0xfc003fff, 0x200010bf, &NMD::DPAX_W_PH        , 0,
17730        DSP_                },        /* DPAX.W.PH */
17731     { instruction         , 0                   , 0   , 32,
17732        0xfc003fff, 0x200012bf, &NMD::DPAQ_SA_L_W      , 0,
17733        DSP_                },        /* DPAQ_SA.L.W */
17734     { instruction         , 0                   , 0   , 32,
17735        0xfc003fff, 0x200014bf, &NMD::DPSX_W_PH        , 0,
17736        DSP_                },        /* DPSX.W.PH */
17737     { instruction         , 0                   , 0   , 32,
17738        0xfc003fff, 0x200016bf, &NMD::DPSQ_SA_L_W      , 0,
17739        DSP_                },        /* DPSQ_SA.L.W */
17740     { reserved_block      , 0                   , 0   , 32,
17741        0xfc003fff, 0x200018bf, 0                      , 0,
17742        0x0                 },        /* POOL32Axf_2(DSP)_8_15~*(4) */
17743     { instruction         , 0                   , 0   , 32,
17744        0xfc003fff, 0x20001abf, &NMD::MADDU_DSP_       , 0,
17745        DSP_                },        /* MADDU[DSP] */
17746     { instruction         , 0                   , 0   , 32,
17747        0xfc003fff, 0x20001cbf, &NMD::MULTU_DSP_       , 0,
17748        DSP_                },        /* MULTU[DSP] */
17749     { instruction         , 0                   , 0   , 32,
17750        0xfc003fff, 0x20001ebf, &NMD::EXTRV_R_W        , 0,
17751        DSP_                },        /* EXTRV_R.W */
17752 };
17753
17754
17755 NMD::Pool NMD::POOL32Axf_2_DSP__16_23[8] = {
17756     { instruction         , 0                   , 0   , 32,
17757        0xfc003fff, 0x200020bf, &NMD::DPAU_H_QBL       , 0,
17758        DSP_                },        /* DPAU.H.QBL */
17759     { instruction         , 0                   , 0   , 32,
17760        0xfc003fff, 0x200022bf, &NMD::DPAQX_S_W_PH     , 0,
17761        DSP_                },        /* DPAQX_S.W.PH */
17762     { instruction         , 0                   , 0   , 32,
17763        0xfc003fff, 0x200024bf, &NMD::DPSU_H_QBL       , 0,
17764        DSP_                },        /* DPSU.H.QBL */
17765     { instruction         , 0                   , 0   , 32,
17766        0xfc003fff, 0x200026bf, &NMD::DPSQX_S_W_PH     , 0,
17767        DSP_                },        /* DPSQX_S.W.PH */
17768     { instruction         , 0                   , 0   , 32,
17769        0xfc003fff, 0x200028bf, &NMD::EXTPV            , 0,
17770        DSP_                },        /* EXTPV */
17771     { instruction         , 0                   , 0   , 32,
17772        0xfc003fff, 0x20002abf, &NMD::MSUB_DSP_        , 0,
17773        DSP_                },        /* MSUB[DSP] */
17774     { instruction         , 0                   , 0   , 32,
17775        0xfc003fff, 0x20002cbf, &NMD::MULSA_W_PH       , 0,
17776        DSP_                },        /* MULSA.W.PH */
17777     { instruction         , 0                   , 0   , 32,
17778        0xfc003fff, 0x20002ebf, &NMD::EXTRV_RS_W       , 0,
17779        DSP_                },        /* EXTRV_RS.W */
17780 };
17781
17782
17783 NMD::Pool NMD::POOL32Axf_2_DSP__24_31[8] = {
17784     { instruction         , 0                   , 0   , 32,
17785        0xfc003fff, 0x200030bf, &NMD::DPAU_H_QBR       , 0,
17786        DSP_                },        /* DPAU.H.QBR */
17787     { instruction         , 0                   , 0   , 32,
17788        0xfc003fff, 0x200032bf, &NMD::DPAQX_SA_W_PH    , 0,
17789        DSP_                },        /* DPAQX_SA.W.PH */
17790     { instruction         , 0                   , 0   , 32,
17791        0xfc003fff, 0x200034bf, &NMD::DPSU_H_QBR       , 0,
17792        DSP_                },        /* DPSU.H.QBR */
17793     { instruction         , 0                   , 0   , 32,
17794        0xfc003fff, 0x200036bf, &NMD::DPSQX_SA_W_PH    , 0,
17795        DSP_                },        /* DPSQX_SA.W.PH */
17796     { instruction         , 0                   , 0   , 32,
17797        0xfc003fff, 0x200038bf, &NMD::EXTPDPV          , 0,
17798        DSP_                },        /* EXTPDPV */
17799     { instruction         , 0                   , 0   , 32,
17800        0xfc003fff, 0x20003abf, &NMD::MSUBU_DSP_       , 0,
17801        DSP_                },        /* MSUBU[DSP] */
17802     { instruction         , 0                   , 0   , 32,
17803        0xfc003fff, 0x20003cbf, &NMD::MULSAQ_S_W_PH    , 0,
17804        DSP_                },        /* MULSAQ_S.W.PH */
17805     { instruction         , 0                   , 0   , 32,
17806        0xfc003fff, 0x20003ebf, &NMD::EXTRV_S_H        , 0,
17807        DSP_                },        /* EXTRV_S.H */
17808 };
17809
17810
17811 NMD::Pool NMD::POOL32Axf_2[4] = {
17812     { pool                , POOL32Axf_2_DSP__0_7, 8   , 32,
17813        0xfc0031ff, 0x200000bf, 0                      , 0,
17814        0x0                 },        /* POOL32Axf_2(DSP)_0_7 */
17815     { pool                , POOL32Axf_2_DSP__8_15, 8   , 32,
17816        0xfc0031ff, 0x200010bf, 0                      , 0,
17817        0x0                 },        /* POOL32Axf_2(DSP)_8_15 */
17818     { pool                , POOL32Axf_2_DSP__16_23, 8   , 32,
17819        0xfc0031ff, 0x200020bf, 0                      , 0,
17820        0x0                 },        /* POOL32Axf_2(DSP)_16_23 */
17821     { pool                , POOL32Axf_2_DSP__24_31, 8   , 32,
17822        0xfc0031ff, 0x200030bf, 0                      , 0,
17823        0x0                 },        /* POOL32Axf_2(DSP)_24_31 */
17824 };
17825
17826
17827 NMD::Pool NMD::POOL32Axf_4[128] = {
17828     { instruction         , 0                   , 0   , 32,
17829        0xfc00ffff, 0x2000013f, &NMD::ABSQ_S_QB        , 0,
17830        DSP_                },        /* ABSQ_S.QB */
17831     { instruction         , 0                   , 0   , 32,
17832        0xfc00ffff, 0x2000033f, &NMD::REPLV_PH         , 0,
17833        DSP_                },        /* REPLV.PH */
17834     { reserved_block      , 0                   , 0   , 32,
17835        0xfc00ffff, 0x2000053f, 0                      , 0,
17836        0x0                 },        /* POOL32Axf_4~*(2) */
17837     { reserved_block      , 0                   , 0   , 32,
17838        0xfc00ffff, 0x2000073f, 0                      , 0,
17839        0x0                 },        /* POOL32Axf_4~*(3) */
17840     { reserved_block      , 0                   , 0   , 32,
17841        0xfc00ffff, 0x2000093f, 0                      , 0,
17842        0x0                 },        /* POOL32Axf_4~*(4) */
17843     { reserved_block      , 0                   , 0   , 32,
17844        0xfc00ffff, 0x20000b3f, 0                      , 0,
17845        0x0                 },        /* POOL32Axf_4~*(5) */
17846     { reserved_block      , 0                   , 0   , 32,
17847        0xfc00ffff, 0x20000d3f, 0                      , 0,
17848        0x0                 },        /* POOL32Axf_4~*(6) */
17849     { reserved_block      , 0                   , 0   , 32,
17850        0xfc00ffff, 0x20000f3f, 0                      , 0,
17851        0x0                 },        /* POOL32Axf_4~*(7) */
17852     { instruction         , 0                   , 0   , 32,
17853        0xfc00ffff, 0x2000113f, &NMD::ABSQ_S_PH        , 0,
17854        DSP_                },        /* ABSQ_S.PH */
17855     { instruction         , 0                   , 0   , 32,
17856        0xfc00ffff, 0x2000133f, &NMD::REPLV_QB         , 0,
17857        DSP_                },        /* REPLV.QB */
17858     { reserved_block      , 0                   , 0   , 32,
17859        0xfc00ffff, 0x2000153f, 0                      , 0,
17860        0x0                 },        /* POOL32Axf_4~*(10) */
17861     { reserved_block      , 0                   , 0   , 32,
17862        0xfc00ffff, 0x2000173f, 0                      , 0,
17863        0x0                 },        /* POOL32Axf_4~*(11) */
17864     { reserved_block      , 0                   , 0   , 32,
17865        0xfc00ffff, 0x2000193f, 0                      , 0,
17866        0x0                 },        /* POOL32Axf_4~*(12) */
17867     { reserved_block      , 0                   , 0   , 32,
17868        0xfc00ffff, 0x20001b3f, 0                      , 0,
17869        0x0                 },        /* POOL32Axf_4~*(13) */
17870     { reserved_block      , 0                   , 0   , 32,
17871        0xfc00ffff, 0x20001d3f, 0                      , 0,
17872        0x0                 },        /* POOL32Axf_4~*(14) */
17873     { reserved_block      , 0                   , 0   , 32,
17874        0xfc00ffff, 0x20001f3f, 0                      , 0,
17875        0x0                 },        /* POOL32Axf_4~*(15) */
17876     { instruction         , 0                   , 0   , 32,
17877        0xfc00ffff, 0x2000213f, &NMD::ABSQ_S_W         , 0,
17878        DSP_                },        /* ABSQ_S.W */
17879     { reserved_block      , 0                   , 0   , 32,
17880        0xfc00ffff, 0x2000233f, 0                      , 0,
17881        0x0                 },        /* POOL32Axf_4~*(17) */
17882     { reserved_block      , 0                   , 0   , 32,
17883        0xfc00ffff, 0x2000253f, 0                      , 0,
17884        0x0                 },        /* POOL32Axf_4~*(18) */
17885     { reserved_block      , 0                   , 0   , 32,
17886        0xfc00ffff, 0x2000273f, 0                      , 0,
17887        0x0                 },        /* POOL32Axf_4~*(19) */
17888     { reserved_block      , 0                   , 0   , 32,
17889        0xfc00ffff, 0x2000293f, 0                      , 0,
17890        0x0                 },        /* POOL32Axf_4~*(20) */
17891     { reserved_block      , 0                   , 0   , 32,
17892        0xfc00ffff, 0x20002b3f, 0                      , 0,
17893        0x0                 },        /* POOL32Axf_4~*(21) */
17894     { reserved_block      , 0                   , 0   , 32,
17895        0xfc00ffff, 0x20002d3f, 0                      , 0,
17896        0x0                 },        /* POOL32Axf_4~*(22) */
17897     { reserved_block      , 0                   , 0   , 32,
17898        0xfc00ffff, 0x20002f3f, 0                      , 0,
17899        0x0                 },        /* POOL32Axf_4~*(23) */
17900     { reserved_block      , 0                   , 0   , 32,
17901        0xfc00ffff, 0x2000313f, 0                      , 0,
17902        0x0                 },        /* POOL32Axf_4~*(24) */
17903     { reserved_block      , 0                   , 0   , 32,
17904        0xfc00ffff, 0x2000333f, 0                      , 0,
17905        0x0                 },        /* POOL32Axf_4~*(25) */
17906     { reserved_block      , 0                   , 0   , 32,
17907        0xfc00ffff, 0x2000353f, 0                      , 0,
17908        0x0                 },        /* POOL32Axf_4~*(26) */
17909     { reserved_block      , 0                   , 0   , 32,
17910        0xfc00ffff, 0x2000373f, 0                      , 0,
17911        0x0                 },        /* POOL32Axf_4~*(27) */
17912     { reserved_block      , 0                   , 0   , 32,
17913        0xfc00ffff, 0x2000393f, 0                      , 0,
17914        0x0                 },        /* POOL32Axf_4~*(28) */
17915     { reserved_block      , 0                   , 0   , 32,
17916        0xfc00ffff, 0x20003b3f, 0                      , 0,
17917        0x0                 },        /* POOL32Axf_4~*(29) */
17918     { reserved_block      , 0                   , 0   , 32,
17919        0xfc00ffff, 0x20003d3f, 0                      , 0,
17920        0x0                 },        /* POOL32Axf_4~*(30) */
17921     { reserved_block      , 0                   , 0   , 32,
17922        0xfc00ffff, 0x20003f3f, 0                      , 0,
17923        0x0                 },        /* POOL32Axf_4~*(31) */
17924     { instruction         , 0                   , 0   , 32,
17925        0xfc00ffff, 0x2000413f, &NMD::INSV             , 0,
17926        DSP_                },        /* INSV */
17927     { reserved_block      , 0                   , 0   , 32,
17928        0xfc00ffff, 0x2000433f, 0                      , 0,
17929        0x0                 },        /* POOL32Axf_4~*(33) */
17930     { reserved_block      , 0                   , 0   , 32,
17931        0xfc00ffff, 0x2000453f, 0                      , 0,
17932        0x0                 },        /* POOL32Axf_4~*(34) */
17933     { reserved_block      , 0                   , 0   , 32,
17934        0xfc00ffff, 0x2000473f, 0                      , 0,
17935        0x0                 },        /* POOL32Axf_4~*(35) */
17936     { reserved_block      , 0                   , 0   , 32,
17937        0xfc00ffff, 0x2000493f, 0                      , 0,
17938        0x0                 },        /* POOL32Axf_4~*(36) */
17939     { instruction         , 0                   , 0   , 32,
17940        0xfc00ffff, 0x20004b3f, &NMD::CLO              , 0,
17941        XMMS_               },        /* CLO */
17942     { instruction         , 0                   , 0   , 32,
17943        0xfc00ffff, 0x20004d3f, &NMD::MFC2             , 0,
17944        CP2_                },        /* MFC2 */
17945     { reserved_block      , 0                   , 0   , 32,
17946        0xfc00ffff, 0x20004f3f, 0                      , 0,
17947        0x0                 },        /* POOL32Axf_4~*(39) */
17948     { instruction         , 0                   , 0   , 32,
17949        0xfc00ffff, 0x2000513f, &NMD::PRECEQ_W_PHL     , 0,
17950        DSP_                },        /* PRECEQ.W.PHL */
17951     { reserved_block      , 0                   , 0   , 32,
17952        0xfc00ffff, 0x2000533f, 0                      , 0,
17953        0x0                 },        /* POOL32Axf_4~*(41) */
17954     { reserved_block      , 0                   , 0   , 32,
17955        0xfc00ffff, 0x2000553f, 0                      , 0,
17956        0x0                 },        /* POOL32Axf_4~*(42) */
17957     { reserved_block      , 0                   , 0   , 32,
17958        0xfc00ffff, 0x2000573f, 0                      , 0,
17959        0x0                 },        /* POOL32Axf_4~*(43) */
17960     { reserved_block      , 0                   , 0   , 32,
17961        0xfc00ffff, 0x2000593f, 0                      , 0,
17962        0x0                 },        /* POOL32Axf_4~*(44) */
17963     { instruction         , 0                   , 0   , 32,
17964        0xfc00ffff, 0x20005b3f, &NMD::CLZ              , 0,
17965        XMMS_               },        /* CLZ */
17966     { instruction         , 0                   , 0   , 32,
17967        0xfc00ffff, 0x20005d3f, &NMD::MTC2             , 0,
17968        CP2_                },        /* MTC2 */
17969     { reserved_block      , 0                   , 0   , 32,
17970        0xfc00ffff, 0x20005f3f, 0                      , 0,
17971        0x0                 },        /* POOL32Axf_4~*(47) */
17972     { instruction         , 0                   , 0   , 32,
17973        0xfc00ffff, 0x2000613f, &NMD::PRECEQ_W_PHR     , 0,
17974        DSP_                },        /* PRECEQ.W.PHR */
17975     { reserved_block      , 0                   , 0   , 32,
17976        0xfc00ffff, 0x2000633f, 0                      , 0,
17977        0x0                 },        /* POOL32Axf_4~*(49) */
17978     { reserved_block      , 0                   , 0   , 32,
17979        0xfc00ffff, 0x2000653f, 0                      , 0,
17980        0x0                 },        /* POOL32Axf_4~*(50) */
17981     { reserved_block      , 0                   , 0   , 32,
17982        0xfc00ffff, 0x2000673f, 0                      , 0,
17983        0x0                 },        /* POOL32Axf_4~*(51) */
17984     { reserved_block      , 0                   , 0   , 32,
17985        0xfc00ffff, 0x2000693f, 0                      , 0,
17986        0x0                 },        /* POOL32Axf_4~*(52) */
17987     { reserved_block      , 0                   , 0   , 32,
17988        0xfc00ffff, 0x20006b3f, 0                      , 0,
17989        0x0                 },        /* POOL32Axf_4~*(53) */
17990     { instruction         , 0                   , 0   , 32,
17991        0xfc00ffff, 0x20006d3f, &NMD::DMFC2            , 0,
17992        CP2_                },        /* DMFC2 */
17993     { reserved_block      , 0                   , 0   , 32,
17994        0xfc00ffff, 0x20006f3f, 0                      , 0,
17995        0x0                 },        /* POOL32Axf_4~*(55) */
17996     { instruction         , 0                   , 0   , 32,
17997        0xfc00ffff, 0x2000713f, &NMD::PRECEQU_PH_QBL   , 0,
17998        DSP_                },        /* PRECEQU.PH.QBL */
17999     { instruction         , 0                   , 0   , 32,
18000        0xfc00ffff, 0x2000733f, &NMD::PRECEQU_PH_QBLA  , 0,
18001        DSP_                },        /* PRECEQU.PH.QBLA */
18002     { reserved_block      , 0                   , 0   , 32,
18003        0xfc00ffff, 0x2000753f, 0                      , 0,
18004        0x0                 },        /* POOL32Axf_4~*(58) */
18005     { reserved_block      , 0                   , 0   , 32,
18006        0xfc00ffff, 0x2000773f, 0                      , 0,
18007        0x0                 },        /* POOL32Axf_4~*(59) */
18008     { reserved_block      , 0                   , 0   , 32,
18009        0xfc00ffff, 0x2000793f, 0                      , 0,
18010        0x0                 },        /* POOL32Axf_4~*(60) */
18011     { reserved_block      , 0                   , 0   , 32,
18012        0xfc00ffff, 0x20007b3f, 0                      , 0,
18013        0x0                 },        /* POOL32Axf_4~*(61) */
18014     { instruction         , 0                   , 0   , 32,
18015        0xfc00ffff, 0x20007d3f, &NMD::DMTC2            , 0,
18016        CP2_                },        /* DMTC2 */
18017     { reserved_block      , 0                   , 0   , 32,
18018        0xfc00ffff, 0x20007f3f, 0                      , 0,
18019        0x0                 },        /* POOL32Axf_4~*(63) */
18020     { reserved_block      , 0                   , 0   , 32,
18021        0xfc00ffff, 0x2000813f, 0                      , 0,
18022        0x0                 },        /* POOL32Axf_4~*(64) */
18023     { reserved_block      , 0                   , 0   , 32,
18024        0xfc00ffff, 0x2000833f, 0                      , 0,
18025        0x0                 },        /* POOL32Axf_4~*(65) */
18026     { reserved_block      , 0                   , 0   , 32,
18027        0xfc00ffff, 0x2000853f, 0                      , 0,
18028        0x0                 },        /* POOL32Axf_4~*(66) */
18029     { reserved_block      , 0                   , 0   , 32,
18030        0xfc00ffff, 0x2000873f, 0                      , 0,
18031        0x0                 },        /* POOL32Axf_4~*(67) */
18032     { reserved_block      , 0                   , 0   , 32,
18033        0xfc00ffff, 0x2000893f, 0                      , 0,
18034        0x0                 },        /* POOL32Axf_4~*(68) */
18035     { reserved_block      , 0                   , 0   , 32,
18036        0xfc00ffff, 0x20008b3f, 0                      , 0,
18037        0x0                 },        /* POOL32Axf_4~*(69) */
18038     { instruction         , 0                   , 0   , 32,
18039        0xfc00ffff, 0x20008d3f, &NMD::MFHC2            , 0,
18040        CP2_                },        /* MFHC2 */
18041     { reserved_block      , 0                   , 0   , 32,
18042        0xfc00ffff, 0x20008f3f, 0                      , 0,
18043        0x0                 },        /* POOL32Axf_4~*(71) */
18044     { instruction         , 0                   , 0   , 32,
18045        0xfc00ffff, 0x2000913f, &NMD::PRECEQU_PH_QBR   , 0,
18046        DSP_                },        /* PRECEQU.PH.QBR */
18047     { instruction         , 0                   , 0   , 32,
18048        0xfc00ffff, 0x2000933f, &NMD::PRECEQU_PH_QBRA  , 0,
18049        DSP_                },        /* PRECEQU.PH.QBRA */
18050     { reserved_block      , 0                   , 0   , 32,
18051        0xfc00ffff, 0x2000953f, 0                      , 0,
18052        0x0                 },        /* POOL32Axf_4~*(74) */
18053     { reserved_block      , 0                   , 0   , 32,
18054        0xfc00ffff, 0x2000973f, 0                      , 0,
18055        0x0                 },        /* POOL32Axf_4~*(75) */
18056     { reserved_block      , 0                   , 0   , 32,
18057        0xfc00ffff, 0x2000993f, 0                      , 0,
18058        0x0                 },        /* POOL32Axf_4~*(76) */
18059     { reserved_block      , 0                   , 0   , 32,
18060        0xfc00ffff, 0x20009b3f, 0                      , 0,
18061        0x0                 },        /* POOL32Axf_4~*(77) */
18062     { instruction         , 0                   , 0   , 32,
18063        0xfc00ffff, 0x20009d3f, &NMD::MTHC2            , 0,
18064        CP2_                },        /* MTHC2 */
18065     { reserved_block      , 0                   , 0   , 32,
18066        0xfc00ffff, 0x20009f3f, 0                      , 0,
18067        0x0                 },        /* POOL32Axf_4~*(79) */
18068     { reserved_block      , 0                   , 0   , 32,
18069        0xfc00ffff, 0x2000a13f, 0                      , 0,
18070        0x0                 },        /* POOL32Axf_4~*(80) */
18071     { reserved_block      , 0                   , 0   , 32,
18072        0xfc00ffff, 0x2000a33f, 0                      , 0,
18073        0x0                 },        /* POOL32Axf_4~*(81) */
18074     { reserved_block      , 0                   , 0   , 32,
18075        0xfc00ffff, 0x2000a53f, 0                      , 0,
18076        0x0                 },        /* POOL32Axf_4~*(82) */
18077     { reserved_block      , 0                   , 0   , 32,
18078        0xfc00ffff, 0x2000a73f, 0                      , 0,
18079        0x0                 },        /* POOL32Axf_4~*(83) */
18080     { reserved_block      , 0                   , 0   , 32,
18081        0xfc00ffff, 0x2000a93f, 0                      , 0,
18082        0x0                 },        /* POOL32Axf_4~*(84) */
18083     { reserved_block      , 0                   , 0   , 32,
18084        0xfc00ffff, 0x2000ab3f, 0                      , 0,
18085        0x0                 },        /* POOL32Axf_4~*(85) */
18086     { reserved_block      , 0                   , 0   , 32,
18087        0xfc00ffff, 0x2000ad3f, 0                      , 0,
18088        0x0                 },        /* POOL32Axf_4~*(86) */
18089     { reserved_block      , 0                   , 0   , 32,
18090        0xfc00ffff, 0x2000af3f, 0                      , 0,
18091        0x0                 },        /* POOL32Axf_4~*(87) */
18092     { instruction         , 0                   , 0   , 32,
18093        0xfc00ffff, 0x2000b13f, &NMD::PRECEU_PH_QBL    , 0,
18094        DSP_                },        /* PRECEU.PH.QBL */
18095     { instruction         , 0                   , 0   , 32,
18096        0xfc00ffff, 0x2000b33f, &NMD::PRECEU_PH_QBLA   , 0,
18097        DSP_                },        /* PRECEU.PH.QBLA */
18098     { reserved_block      , 0                   , 0   , 32,
18099        0xfc00ffff, 0x2000b53f, 0                      , 0,
18100        0x0                 },        /* POOL32Axf_4~*(90) */
18101     { reserved_block      , 0                   , 0   , 32,
18102        0xfc00ffff, 0x2000b73f, 0                      , 0,
18103        0x0                 },        /* POOL32Axf_4~*(91) */
18104     { reserved_block      , 0                   , 0   , 32,
18105        0xfc00ffff, 0x2000b93f, 0                      , 0,
18106        0x0                 },        /* POOL32Axf_4~*(92) */
18107     { reserved_block      , 0                   , 0   , 32,
18108        0xfc00ffff, 0x2000bb3f, 0                      , 0,
18109        0x0                 },        /* POOL32Axf_4~*(93) */
18110     { reserved_block      , 0                   , 0   , 32,
18111        0xfc00ffff, 0x2000bd3f, 0                      , 0,
18112        0x0                 },        /* POOL32Axf_4~*(94) */
18113     { reserved_block      , 0                   , 0   , 32,
18114        0xfc00ffff, 0x2000bf3f, 0                      , 0,
18115        0x0                 },        /* POOL32Axf_4~*(95) */
18116     { reserved_block      , 0                   , 0   , 32,
18117        0xfc00ffff, 0x2000c13f, 0                      , 0,
18118        0x0                 },        /* POOL32Axf_4~*(96) */
18119     { reserved_block      , 0                   , 0   , 32,
18120        0xfc00ffff, 0x2000c33f, 0                      , 0,
18121        0x0                 },        /* POOL32Axf_4~*(97) */
18122     { reserved_block      , 0                   , 0   , 32,
18123        0xfc00ffff, 0x2000c53f, 0                      , 0,
18124        0x0                 },        /* POOL32Axf_4~*(98) */
18125     { reserved_block      , 0                   , 0   , 32,
18126        0xfc00ffff, 0x2000c73f, 0                      , 0,
18127        0x0                 },        /* POOL32Axf_4~*(99) */
18128     { reserved_block      , 0                   , 0   , 32,
18129        0xfc00ffff, 0x2000c93f, 0                      , 0,
18130        0x0                 },        /* POOL32Axf_4~*(100) */
18131     { reserved_block      , 0                   , 0   , 32,
18132        0xfc00ffff, 0x2000cb3f, 0                      , 0,
18133        0x0                 },        /* POOL32Axf_4~*(101) */
18134     { instruction         , 0                   , 0   , 32,
18135        0xfc00ffff, 0x2000cd3f, &NMD::CFC2             , 0,
18136        CP2_                },        /* CFC2 */
18137     { reserved_block      , 0                   , 0   , 32,
18138        0xfc00ffff, 0x2000cf3f, 0                      , 0,
18139        0x0                 },        /* POOL32Axf_4~*(103) */
18140     { instruction         , 0                   , 0   , 32,
18141        0xfc00ffff, 0x2000d13f, &NMD::PRECEU_PH_QBR    , 0,
18142        DSP_                },        /* PRECEU.PH.QBR */
18143     { instruction         , 0                   , 0   , 32,
18144        0xfc00ffff, 0x2000d33f, &NMD::PRECEU_PH_QBRA   , 0,
18145        DSP_                },        /* PRECEU.PH.QBRA */
18146     { reserved_block      , 0                   , 0   , 32,
18147        0xfc00ffff, 0x2000d53f, 0                      , 0,
18148        0x0                 },        /* POOL32Axf_4~*(106) */
18149     { reserved_block      , 0                   , 0   , 32,
18150        0xfc00ffff, 0x2000d73f, 0                      , 0,
18151        0x0                 },        /* POOL32Axf_4~*(107) */
18152     { reserved_block      , 0                   , 0   , 32,
18153        0xfc00ffff, 0x2000d93f, 0                      , 0,
18154        0x0                 },        /* POOL32Axf_4~*(108) */
18155     { reserved_block      , 0                   , 0   , 32,
18156        0xfc00ffff, 0x2000db3f, 0                      , 0,
18157        0x0                 },        /* POOL32Axf_4~*(109) */
18158     { instruction         , 0                   , 0   , 32,
18159        0xfc00ffff, 0x2000dd3f, &NMD::CTC2             , 0,
18160        CP2_                },        /* CTC2 */
18161     { reserved_block      , 0                   , 0   , 32,
18162        0xfc00ffff, 0x2000df3f, 0                      , 0,
18163        0x0                 },        /* POOL32Axf_4~*(111) */
18164     { reserved_block      , 0                   , 0   , 32,
18165        0xfc00ffff, 0x2000e13f, 0                      , 0,
18166        0x0                 },        /* POOL32Axf_4~*(112) */
18167     { reserved_block      , 0                   , 0   , 32,
18168        0xfc00ffff, 0x2000e33f, 0                      , 0,
18169        0x0                 },        /* POOL32Axf_4~*(113) */
18170     { reserved_block      , 0                   , 0   , 32,
18171        0xfc00ffff, 0x2000e53f, 0                      , 0,
18172        0x0                 },        /* POOL32Axf_4~*(114) */
18173     { reserved_block      , 0                   , 0   , 32,
18174        0xfc00ffff, 0x2000e73f, 0                      , 0,
18175        0x0                 },        /* POOL32Axf_4~*(115) */
18176     { reserved_block      , 0                   , 0   , 32,
18177        0xfc00ffff, 0x2000e93f, 0                      , 0,
18178        0x0                 },        /* POOL32Axf_4~*(116) */
18179     { reserved_block      , 0                   , 0   , 32,
18180        0xfc00ffff, 0x2000eb3f, 0                      , 0,
18181        0x0                 },        /* POOL32Axf_4~*(117) */
18182     { reserved_block      , 0                   , 0   , 32,
18183        0xfc00ffff, 0x2000ed3f, 0                      , 0,
18184        0x0                 },        /* POOL32Axf_4~*(118) */
18185     { reserved_block      , 0                   , 0   , 32,
18186        0xfc00ffff, 0x2000ef3f, 0                      , 0,
18187        0x0                 },        /* POOL32Axf_4~*(119) */
18188     { instruction         , 0                   , 0   , 32,
18189        0xfc00ffff, 0x2000f13f, &NMD::RADDU_W_QB       , 0,
18190        DSP_                },        /* RADDU.W.QB */
18191     { reserved_block      , 0                   , 0   , 32,
18192        0xfc00ffff, 0x2000f33f, 0                      , 0,
18193        0x0                 },        /* POOL32Axf_4~*(121) */
18194     { reserved_block      , 0                   , 0   , 32,
18195        0xfc00ffff, 0x2000f53f, 0                      , 0,
18196        0x0                 },        /* POOL32Axf_4~*(122) */
18197     { reserved_block      , 0                   , 0   , 32,
18198        0xfc00ffff, 0x2000f73f, 0                      , 0,
18199        0x0                 },        /* POOL32Axf_4~*(123) */
18200     { reserved_block      , 0                   , 0   , 32,
18201        0xfc00ffff, 0x2000f93f, 0                      , 0,
18202        0x0                 },        /* POOL32Axf_4~*(124) */
18203     { reserved_block      , 0                   , 0   , 32,
18204        0xfc00ffff, 0x2000fb3f, 0                      , 0,
18205        0x0                 },        /* POOL32Axf_4~*(125) */
18206     { reserved_block      , 0                   , 0   , 32,
18207        0xfc00ffff, 0x2000fd3f, 0                      , 0,
18208        0x0                 },        /* POOL32Axf_4~*(126) */
18209     { reserved_block      , 0                   , 0   , 32,
18210        0xfc00ffff, 0x2000ff3f, 0                      , 0,
18211        0x0                 },        /* POOL32Axf_4~*(127) */
18212 };
18213
18214
18215 NMD::Pool NMD::POOL32Axf_5_group0[32] = {
18216     { instruction         , 0                   , 0   , 32,
18217        0xfc00ffff, 0x2000017f, &NMD::TLBGP            , 0,
18218        CP0_ | VZ_ | TLB_   },        /* TLBGP */
18219     { instruction         , 0                   , 0   , 32,
18220        0xfc00ffff, 0x2000037f, &NMD::TLBP             , 0,
18221        CP0_ | TLB_         },        /* TLBP */
18222     { instruction         , 0                   , 0   , 32,
18223        0xfc00ffff, 0x2000057f, &NMD::TLBGINV          , 0,
18224        CP0_ | VZ_ | TLB_ | TLBINV_},        /* TLBGINV */
18225     { instruction         , 0                   , 0   , 32,
18226        0xfc00ffff, 0x2000077f, &NMD::TLBINV           , 0,
18227        CP0_ | TLB_ | TLBINV_},        /* TLBINV */
18228     { reserved_block      , 0                   , 0   , 32,
18229        0xfc00ffff, 0x2000097f, 0                      , 0,
18230        0x0                 },        /* POOL32Axf_5_group0~*(4) */
18231     { reserved_block      , 0                   , 0   , 32,
18232        0xfc00ffff, 0x20000b7f, 0                      , 0,
18233        0x0                 },        /* POOL32Axf_5_group0~*(5) */
18234     { reserved_block      , 0                   , 0   , 32,
18235        0xfc00ffff, 0x20000d7f, 0                      , 0,
18236        0x0                 },        /* POOL32Axf_5_group0~*(6) */
18237     { reserved_block      , 0                   , 0   , 32,
18238        0xfc00ffff, 0x20000f7f, 0                      , 0,
18239        0x0                 },        /* POOL32Axf_5_group0~*(7) */
18240     { instruction         , 0                   , 0   , 32,
18241        0xfc00ffff, 0x2000117f, &NMD::TLBGR            , 0,
18242        CP0_ | VZ_ | TLB_   },        /* TLBGR */
18243     { instruction         , 0                   , 0   , 32,
18244        0xfc00ffff, 0x2000137f, &NMD::TLBR             , 0,
18245        CP0_ | TLB_         },        /* TLBR */
18246     { instruction         , 0                   , 0   , 32,
18247        0xfc00ffff, 0x2000157f, &NMD::TLBGINVF         , 0,
18248        CP0_ | VZ_ | TLB_ | TLBINV_},        /* TLBGINVF */
18249     { instruction         , 0                   , 0   , 32,
18250        0xfc00ffff, 0x2000177f, &NMD::TLBINVF          , 0,
18251        CP0_ | TLB_ | TLBINV_},        /* TLBINVF */
18252     { reserved_block      , 0                   , 0   , 32,
18253        0xfc00ffff, 0x2000197f, 0                      , 0,
18254        0x0                 },        /* POOL32Axf_5_group0~*(12) */
18255     { reserved_block      , 0                   , 0   , 32,
18256        0xfc00ffff, 0x20001b7f, 0                      , 0,
18257        0x0                 },        /* POOL32Axf_5_group0~*(13) */
18258     { reserved_block      , 0                   , 0   , 32,
18259        0xfc00ffff, 0x20001d7f, 0                      , 0,
18260        0x0                 },        /* POOL32Axf_5_group0~*(14) */
18261     { reserved_block      , 0                   , 0   , 32,
18262        0xfc00ffff, 0x20001f7f, 0                      , 0,
18263        0x0                 },        /* POOL32Axf_5_group0~*(15) */
18264     { instruction         , 0                   , 0   , 32,
18265        0xfc00ffff, 0x2000217f, &NMD::TLBGWI           , 0,
18266        CP0_ | VZ_ | TLB_   },        /* TLBGWI */
18267     { instruction         , 0                   , 0   , 32,
18268        0xfc00ffff, 0x2000237f, &NMD::TLBWI            , 0,
18269        CP0_ | TLB_         },        /* TLBWI */
18270     { reserved_block      , 0                   , 0   , 32,
18271        0xfc00ffff, 0x2000257f, 0                      , 0,
18272        0x0                 },        /* POOL32Axf_5_group0~*(18) */
18273     { reserved_block      , 0                   , 0   , 32,
18274        0xfc00ffff, 0x2000277f, 0                      , 0,
18275        0x0                 },        /* POOL32Axf_5_group0~*(19) */
18276     { reserved_block      , 0                   , 0   , 32,
18277        0xfc00ffff, 0x2000297f, 0                      , 0,
18278        0x0                 },        /* POOL32Axf_5_group0~*(20) */
18279     { reserved_block      , 0                   , 0   , 32,
18280        0xfc00ffff, 0x20002b7f, 0                      , 0,
18281        0x0                 },        /* POOL32Axf_5_group0~*(21) */
18282     { reserved_block      , 0                   , 0   , 32,
18283        0xfc00ffff, 0x20002d7f, 0                      , 0,
18284        0x0                 },        /* POOL32Axf_5_group0~*(22) */
18285     { reserved_block      , 0                   , 0   , 32,
18286        0xfc00ffff, 0x20002f7f, 0                      , 0,
18287        0x0                 },        /* POOL32Axf_5_group0~*(23) */
18288     { instruction         , 0                   , 0   , 32,
18289        0xfc00ffff, 0x2000317f, &NMD::TLBGWR           , 0,
18290        CP0_ | VZ_ | TLB_   },        /* TLBGWR */
18291     { instruction         , 0                   , 0   , 32,
18292        0xfc00ffff, 0x2000337f, &NMD::TLBWR            , 0,
18293        CP0_ | TLB_         },        /* TLBWR */
18294     { reserved_block      , 0                   , 0   , 32,
18295        0xfc00ffff, 0x2000357f, 0                      , 0,
18296        0x0                 },        /* POOL32Axf_5_group0~*(26) */
18297     { reserved_block      , 0                   , 0   , 32,
18298        0xfc00ffff, 0x2000377f, 0                      , 0,
18299        0x0                 },        /* POOL32Axf_5_group0~*(27) */
18300     { reserved_block      , 0                   , 0   , 32,
18301        0xfc00ffff, 0x2000397f, 0                      , 0,
18302        0x0                 },        /* POOL32Axf_5_group0~*(28) */
18303     { reserved_block      , 0                   , 0   , 32,
18304        0xfc00ffff, 0x20003b7f, 0                      , 0,
18305        0x0                 },        /* POOL32Axf_5_group0~*(29) */
18306     { reserved_block      , 0                   , 0   , 32,
18307        0xfc00ffff, 0x20003d7f, 0                      , 0,
18308        0x0                 },        /* POOL32Axf_5_group0~*(30) */
18309     { reserved_block      , 0                   , 0   , 32,
18310        0xfc00ffff, 0x20003f7f, 0                      , 0,
18311        0x0                 },        /* POOL32Axf_5_group0~*(31) */
18312 };
18313
18314
18315 NMD::Pool NMD::POOL32Axf_5_group1[32] = {
18316     { reserved_block      , 0                   , 0   , 32,
18317        0xfc00ffff, 0x2000417f, 0                      , 0,
18318        0x0                 },        /* POOL32Axf_5_group1~*(0) */
18319     { reserved_block      , 0                   , 0   , 32,
18320        0xfc00ffff, 0x2000437f, 0                      , 0,
18321        0x0                 },        /* POOL32Axf_5_group1~*(1) */
18322     { reserved_block      , 0                   , 0   , 32,
18323        0xfc00ffff, 0x2000457f, 0                      , 0,
18324        0x0                 },        /* POOL32Axf_5_group1~*(2) */
18325     { instruction         , 0                   , 0   , 32,
18326        0xfc00ffff, 0x2000477f, &NMD::DI               , 0,
18327        0x0                 },        /* DI */
18328     { reserved_block      , 0                   , 0   , 32,
18329        0xfc00ffff, 0x2000497f, 0                      , 0,
18330        0x0                 },        /* POOL32Axf_5_group1~*(4) */
18331     { reserved_block      , 0                   , 0   , 32,
18332        0xfc00ffff, 0x20004b7f, 0                      , 0,
18333        0x0                 },        /* POOL32Axf_5_group1~*(5) */
18334     { reserved_block      , 0                   , 0   , 32,
18335        0xfc00ffff, 0x20004d7f, 0                      , 0,
18336        0x0                 },        /* POOL32Axf_5_group1~*(6) */
18337     { reserved_block      , 0                   , 0   , 32,
18338        0xfc00ffff, 0x20004f7f, 0                      , 0,
18339        0x0                 },        /* POOL32Axf_5_group1~*(7) */
18340     { reserved_block      , 0                   , 0   , 32,
18341        0xfc00ffff, 0x2000517f, 0                      , 0,
18342        0x0                 },        /* POOL32Axf_5_group1~*(8) */
18343     { reserved_block      , 0                   , 0   , 32,
18344        0xfc00ffff, 0x2000537f, 0                      , 0,
18345        0x0                 },        /* POOL32Axf_5_group1~*(9) */
18346     { reserved_block      , 0                   , 0   , 32,
18347        0xfc00ffff, 0x2000557f, 0                      , 0,
18348        0x0                 },        /* POOL32Axf_5_group1~*(10) */
18349     { instruction         , 0                   , 0   , 32,
18350        0xfc00ffff, 0x2000577f, &NMD::EI               , 0,
18351        0x0                 },        /* EI */
18352     { reserved_block      , 0                   , 0   , 32,
18353        0xfc00ffff, 0x2000597f, 0                      , 0,
18354        0x0                 },        /* POOL32Axf_5_group1~*(12) */
18355     { reserved_block      , 0                   , 0   , 32,
18356        0xfc00ffff, 0x20005b7f, 0                      , 0,
18357        0x0                 },        /* POOL32Axf_5_group1~*(13) */
18358     { reserved_block      , 0                   , 0   , 32,
18359        0xfc00ffff, 0x20005d7f, 0                      , 0,
18360        0x0                 },        /* POOL32Axf_5_group1~*(14) */
18361     { reserved_block      , 0                   , 0   , 32,
18362        0xfc00ffff, 0x20005f7f, 0                      , 0,
18363        0x0                 },        /* POOL32Axf_5_group1~*(15) */
18364     { reserved_block      , 0                   , 0   , 32,
18365        0xfc00ffff, 0x2000617f, 0                      , 0,
18366        0x0                 },        /* POOL32Axf_5_group1~*(16) */
18367     { reserved_block      , 0                   , 0   , 32,
18368        0xfc00ffff, 0x2000637f, 0                      , 0,
18369        0x0                 },        /* POOL32Axf_5_group1~*(17) */
18370     { reserved_block      , 0                   , 0   , 32,
18371        0xfc00ffff, 0x2000657f, 0                      , 0,
18372        0x0                 },        /* POOL32Axf_5_group1~*(18) */
18373     { reserved_block      , 0                   , 0   , 32,
18374        0xfc00ffff, 0x2000677f, 0                      , 0,
18375        0x0                 },        /* POOL32Axf_5_group1~*(19) */
18376     { reserved_block      , 0                   , 0   , 32,
18377        0xfc00ffff, 0x2000697f, 0                      , 0,
18378        0x0                 },        /* POOL32Axf_5_group1~*(20) */
18379     { reserved_block      , 0                   , 0   , 32,
18380        0xfc00ffff, 0x20006b7f, 0                      , 0,
18381        0x0                 },        /* POOL32Axf_5_group1~*(21) */
18382     { reserved_block      , 0                   , 0   , 32,
18383        0xfc00ffff, 0x20006d7f, 0                      , 0,
18384        0x0                 },        /* POOL32Axf_5_group1~*(22) */
18385     { reserved_block      , 0                   , 0   , 32,
18386        0xfc00ffff, 0x20006f7f, 0                      , 0,
18387        0x0                 },        /* POOL32Axf_5_group1~*(23) */
18388     { reserved_block      , 0                   , 0   , 32,
18389        0xfc00ffff, 0x2000717f, 0                      , 0,
18390        0x0                 },        /* POOL32Axf_5_group1~*(24) */
18391     { reserved_block      , 0                   , 0   , 32,
18392        0xfc00ffff, 0x2000737f, 0                      , 0,
18393        0x0                 },        /* POOL32Axf_5_group1~*(25) */
18394     { reserved_block      , 0                   , 0   , 32,
18395        0xfc00ffff, 0x2000757f, 0                      , 0,
18396        0x0                 },        /* POOL32Axf_5_group1~*(26) */
18397     { reserved_block      , 0                   , 0   , 32,
18398        0xfc00ffff, 0x2000777f, 0                      , 0,
18399        0x0                 },        /* POOL32Axf_5_group1~*(27) */
18400     { reserved_block      , 0                   , 0   , 32,
18401        0xfc00ffff, 0x2000797f, 0                      , 0,
18402        0x0                 },        /* POOL32Axf_5_group1~*(28) */
18403     { reserved_block      , 0                   , 0   , 32,
18404        0xfc00ffff, 0x20007b7f, 0                      , 0,
18405        0x0                 },        /* POOL32Axf_5_group1~*(29) */
18406     { reserved_block      , 0                   , 0   , 32,
18407        0xfc00ffff, 0x20007d7f, 0                      , 0,
18408        0x0                 },        /* POOL32Axf_5_group1~*(30) */
18409     { reserved_block      , 0                   , 0   , 32,
18410        0xfc00ffff, 0x20007f7f, 0                      , 0,
18411        0x0                 },        /* POOL32Axf_5_group1~*(31) */
18412 };
18413
18414
18415 NMD::Pool NMD::ERETx[2] = {
18416     { instruction         , 0                   , 0   , 32,
18417        0xfc01ffff, 0x2000f37f, &NMD::ERET             , 0,
18418        0x0                 },        /* ERET */
18419     { instruction         , 0                   , 0   , 32,
18420        0xfc01ffff, 0x2001f37f, &NMD::ERETNC           , 0,
18421        0x0                 },        /* ERETNC */
18422 };
18423
18424
18425 NMD::Pool NMD::POOL32Axf_5_group3[32] = {
18426     { reserved_block      , 0                   , 0   , 32,
18427        0xfc00ffff, 0x2000c17f, 0                      , 0,
18428        0x0                 },        /* POOL32Axf_5_group3~*(0) */
18429     { instruction         , 0                   , 0   , 32,
18430        0xfc00ffff, 0x2000c37f, &NMD::WAIT             , 0,
18431        0x0                 },        /* WAIT */
18432     { reserved_block      , 0                   , 0   , 32,
18433        0xfc00ffff, 0x2000c57f, 0                      , 0,
18434        0x0                 },        /* POOL32Axf_5_group3~*(2) */
18435     { reserved_block      , 0                   , 0   , 32,
18436        0xfc00ffff, 0x2000c77f, 0                      , 0,
18437        0x0                 },        /* POOL32Axf_5_group3~*(3) */
18438     { reserved_block      , 0                   , 0   , 32,
18439        0xfc00ffff, 0x2000c97f, 0                      , 0,
18440        0x0                 },        /* POOL32Axf_5_group3~*(4) */
18441     { reserved_block      , 0                   , 0   , 32,
18442        0xfc00ffff, 0x2000cb7f, 0                      , 0,
18443        0x0                 },        /* POOL32Axf_5_group3~*(5) */
18444     { reserved_block      , 0                   , 0   , 32,
18445        0xfc00ffff, 0x2000cd7f, 0                      , 0,
18446        0x0                 },        /* POOL32Axf_5_group3~*(6) */
18447     { reserved_block      , 0                   , 0   , 32,
18448        0xfc00ffff, 0x2000cf7f, 0                      , 0,
18449        0x0                 },        /* POOL32Axf_5_group3~*(7) */
18450     { reserved_block      , 0                   , 0   , 32,
18451        0xfc00ffff, 0x2000d17f, 0                      , 0,
18452        0x0                 },        /* POOL32Axf_5_group3~*(8) */
18453     { instruction         , 0                   , 0   , 32,
18454        0xfc00ffff, 0x2000d37f, &NMD::IRET             , 0,
18455        MCU_                },        /* IRET */
18456     { reserved_block      , 0                   , 0   , 32,
18457        0xfc00ffff, 0x2000d57f, 0                      , 0,
18458        0x0                 },        /* POOL32Axf_5_group3~*(10) */
18459     { reserved_block      , 0                   , 0   , 32,
18460        0xfc00ffff, 0x2000d77f, 0                      , 0,
18461        0x0                 },        /* POOL32Axf_5_group3~*(11) */
18462     { reserved_block      , 0                   , 0   , 32,
18463        0xfc00ffff, 0x2000d97f, 0                      , 0,
18464        0x0                 },        /* POOL32Axf_5_group3~*(12) */
18465     { reserved_block      , 0                   , 0   , 32,
18466        0xfc00ffff, 0x2000db7f, 0                      , 0,
18467        0x0                 },        /* POOL32Axf_5_group3~*(13) */
18468     { reserved_block      , 0                   , 0   , 32,
18469        0xfc00ffff, 0x2000dd7f, 0                      , 0,
18470        0x0                 },        /* POOL32Axf_5_group3~*(14) */
18471     { reserved_block      , 0                   , 0   , 32,
18472        0xfc00ffff, 0x2000df7f, 0                      , 0,
18473        0x0                 },        /* POOL32Axf_5_group3~*(15) */
18474     { instruction         , 0                   , 0   , 32,
18475        0xfc00ffff, 0x2000e17f, &NMD::RDPGPR           , 0,
18476        CP0_                },        /* RDPGPR */
18477     { instruction         , 0                   , 0   , 32,
18478        0xfc00ffff, 0x2000e37f, &NMD::DERET            , 0,
18479        EJTAG_              },        /* DERET */
18480     { reserved_block      , 0                   , 0   , 32,
18481        0xfc00ffff, 0x2000e57f, 0                      , 0,
18482        0x0                 },        /* POOL32Axf_5_group3~*(18) */
18483     { reserved_block      , 0                   , 0   , 32,
18484        0xfc00ffff, 0x2000e77f, 0                      , 0,
18485        0x0                 },        /* POOL32Axf_5_group3~*(19) */
18486     { reserved_block      , 0                   , 0   , 32,
18487        0xfc00ffff, 0x2000e97f, 0                      , 0,
18488        0x0                 },        /* POOL32Axf_5_group3~*(20) */
18489     { reserved_block      , 0                   , 0   , 32,
18490        0xfc00ffff, 0x2000eb7f, 0                      , 0,
18491        0x0                 },        /* POOL32Axf_5_group3~*(21) */
18492     { reserved_block      , 0                   , 0   , 32,
18493        0xfc00ffff, 0x2000ed7f, 0                      , 0,
18494        0x0                 },        /* POOL32Axf_5_group3~*(22) */
18495     { reserved_block      , 0                   , 0   , 32,
18496        0xfc00ffff, 0x2000ef7f, 0                      , 0,
18497        0x0                 },        /* POOL32Axf_5_group3~*(23) */
18498     { instruction         , 0                   , 0   , 32,
18499        0xfc00ffff, 0x2000f17f, &NMD::WRPGPR           , 0,
18500        CP0_                },        /* WRPGPR */
18501     { pool                , ERETx               , 2   , 32,
18502        0xfc00ffff, 0x2000f37f, 0                      , 0,
18503        0x0                 },        /* ERETx */
18504     { reserved_block      , 0                   , 0   , 32,
18505        0xfc00ffff, 0x2000f57f, 0                      , 0,
18506        0x0                 },        /* POOL32Axf_5_group3~*(26) */
18507     { reserved_block      , 0                   , 0   , 32,
18508        0xfc00ffff, 0x2000f77f, 0                      , 0,
18509        0x0                 },        /* POOL32Axf_5_group3~*(27) */
18510     { reserved_block      , 0                   , 0   , 32,
18511        0xfc00ffff, 0x2000f97f, 0                      , 0,
18512        0x0                 },        /* POOL32Axf_5_group3~*(28) */
18513     { reserved_block      , 0                   , 0   , 32,
18514        0xfc00ffff, 0x2000fb7f, 0                      , 0,
18515        0x0                 },        /* POOL32Axf_5_group3~*(29) */
18516     { reserved_block      , 0                   , 0   , 32,
18517        0xfc00ffff, 0x2000fd7f, 0                      , 0,
18518        0x0                 },        /* POOL32Axf_5_group3~*(30) */
18519     { reserved_block      , 0                   , 0   , 32,
18520        0xfc00ffff, 0x2000ff7f, 0                      , 0,
18521        0x0                 },        /* POOL32Axf_5_group3~*(31) */
18522 };
18523
18524
18525 NMD::Pool NMD::POOL32Axf_5[4] = {
18526     { pool                , POOL32Axf_5_group0  , 32  , 32,
18527        0xfc00c1ff, 0x2000017f, 0                      , 0,
18528        0x0                 },        /* POOL32Axf_5_group0 */
18529     { pool                , POOL32Axf_5_group1  , 32  , 32,
18530        0xfc00c1ff, 0x2000417f, 0                      , 0,
18531        0x0                 },        /* POOL32Axf_5_group1 */
18532     { reserved_block      , 0                   , 0   , 32,
18533        0xfc00c1ff, 0x2000817f, 0                      , 0,
18534        0x0                 },        /* POOL32Axf_5~*(2) */
18535     { pool                , POOL32Axf_5_group3  , 32  , 32,
18536        0xfc00c1ff, 0x2000c17f, 0                      , 0,
18537        0x0                 },        /* POOL32Axf_5_group3 */
18538 };
18539
18540
18541 NMD::Pool NMD::SHRA__R__QB[2] = {
18542     { instruction         , 0                   , 0   , 32,
18543        0xfc001fff, 0x200001ff, &NMD::SHRA_QB          , 0,
18544        DSP_                },        /* SHRA.QB */
18545     { instruction         , 0                   , 0   , 32,
18546        0xfc001fff, 0x200011ff, &NMD::SHRA_R_QB        , 0,
18547        DSP_                },        /* SHRA_R.QB */
18548 };
18549
18550
18551 NMD::Pool NMD::POOL32Axf_7[8] = {
18552     { pool                , SHRA__R__QB         , 2   , 32,
18553        0xfc000fff, 0x200001ff, 0                      , 0,
18554        0x0                 },        /* SHRA[_R].QB */
18555     { instruction         , 0                   , 0   , 32,
18556        0xfc000fff, 0x200003ff, &NMD::SHRL_PH          , 0,
18557        DSP_                },        /* SHRL.PH */
18558     { instruction         , 0                   , 0   , 32,
18559        0xfc000fff, 0x200005ff, &NMD::REPL_QB          , 0,
18560        DSP_                },        /* REPL.QB */
18561     { reserved_block      , 0                   , 0   , 32,
18562        0xfc000fff, 0x200007ff, 0                      , 0,
18563        0x0                 },        /* POOL32Axf_7~*(3) */
18564     { reserved_block      , 0                   , 0   , 32,
18565        0xfc000fff, 0x200009ff, 0                      , 0,
18566        0x0                 },        /* POOL32Axf_7~*(4) */
18567     { reserved_block      , 0                   , 0   , 32,
18568        0xfc000fff, 0x20000bff, 0                      , 0,
18569        0x0                 },        /* POOL32Axf_7~*(5) */
18570     { reserved_block      , 0                   , 0   , 32,
18571        0xfc000fff, 0x20000dff, 0                      , 0,
18572        0x0                 },        /* POOL32Axf_7~*(6) */
18573     { reserved_block      , 0                   , 0   , 32,
18574        0xfc000fff, 0x20000fff, 0                      , 0,
18575        0x0                 },        /* POOL32Axf_7~*(7) */
18576 };
18577
18578
18579 NMD::Pool NMD::POOL32Axf[8] = {
18580     { reserved_block      , 0                   , 0   , 32,
18581        0xfc0001ff, 0x2000003f, 0                      , 0,
18582        0x0                 },        /* POOL32Axf~*(0) */
18583     { pool                , POOL32Axf_1         , 8   , 32,
18584        0xfc0001ff, 0x2000007f, 0                      , 0,
18585        0x0                 },        /* POOL32Axf_1 */
18586     { pool                , POOL32Axf_2         , 4   , 32,
18587        0xfc0001ff, 0x200000bf, 0                      , 0,
18588        0x0                 },        /* POOL32Axf_2 */
18589     { reserved_block      , 0                   , 0   , 32,
18590        0xfc0001ff, 0x200000ff, 0                      , 0,
18591        0x0                 },        /* POOL32Axf~*(3) */
18592     { pool                , POOL32Axf_4         , 128 , 32,
18593        0xfc0001ff, 0x2000013f, 0                      , 0,
18594        0x0                 },        /* POOL32Axf_4 */
18595     { pool                , POOL32Axf_5         , 4   , 32,
18596        0xfc0001ff, 0x2000017f, 0                      , 0,
18597        0x0                 },        /* POOL32Axf_5 */
18598     { reserved_block      , 0                   , 0   , 32,
18599        0xfc0001ff, 0x200001bf, 0                      , 0,
18600        0x0                 },        /* POOL32Axf~*(6) */
18601     { pool                , POOL32Axf_7         , 8   , 32,
18602        0xfc0001ff, 0x200001ff, 0                      , 0,
18603        0x0                 },        /* POOL32Axf_7 */
18604 };
18605
18606
18607 NMD::Pool NMD::_POOL32A7[8] = {
18608     { pool                , P_LSX               , 2   , 32,
18609        0xfc00003f, 0x20000007, 0                      , 0,
18610        0x0                 },        /* P.LSX */
18611     { instruction         , 0                   , 0   , 32,
18612        0xfc00003f, 0x2000000f, &NMD::LSA              , 0,
18613        0x0                 },        /* LSA */
18614     { reserved_block      , 0                   , 0   , 32,
18615        0xfc00003f, 0x20000017, 0                      , 0,
18616        0x0                 },        /* _POOL32A7~*(2) */
18617     { instruction         , 0                   , 0   , 32,
18618        0xfc00003f, 0x2000001f, &NMD::EXTW             , 0,
18619        0x0                 },        /* EXTW */
18620     { reserved_block      , 0                   , 0   , 32,
18621        0xfc00003f, 0x20000027, 0                      , 0,
18622        0x0                 },        /* _POOL32A7~*(4) */
18623     { reserved_block      , 0                   , 0   , 32,
18624        0xfc00003f, 0x2000002f, 0                      , 0,
18625        0x0                 },        /* _POOL32A7~*(5) */
18626     { reserved_block      , 0                   , 0   , 32,
18627        0xfc00003f, 0x20000037, 0                      , 0,
18628        0x0                 },        /* _POOL32A7~*(6) */
18629     { pool                , POOL32Axf           , 8   , 32,
18630        0xfc00003f, 0x2000003f, 0                      , 0,
18631        0x0                 },        /* POOL32Axf */
18632 };
18633
18634
18635 NMD::Pool NMD::P32A[8] = {
18636     { pool                , _POOL32A0           , 128 , 32,
18637        0xfc000007, 0x20000000, 0                      , 0,
18638        0x0                 },        /* _POOL32A0 */
18639     { instruction         , 0                   , 0   , 32,
18640        0xfc000007, 0x20000001, &NMD::SPECIAL2         , 0,
18641        UDI_                },        /* SPECIAL2 */
18642     { instruction         , 0                   , 0   , 32,
18643        0xfc000007, 0x20000002, &NMD::COP2_1           , 0,
18644        CP2_                },        /* COP2_1 */
18645     { instruction         , 0                   , 0   , 32,
18646        0xfc000007, 0x20000003, &NMD::UDI              , 0,
18647        UDI_                },        /* UDI */
18648     { reserved_block      , 0                   , 0   , 32,
18649        0xfc000007, 0x20000004, 0                      , 0,
18650        0x0                 },        /* P32A~*(4) */
18651     { pool                , _POOL32A5           , 128 , 32,
18652        0xfc000007, 0x20000005, 0                      , 0,
18653        0x0                 },        /* _POOL32A5 */
18654     { reserved_block      , 0                   , 0   , 32,
18655        0xfc000007, 0x20000006, 0                      , 0,
18656        0x0                 },        /* P32A~*(6) */
18657     { pool                , _POOL32A7           , 8   , 32,
18658        0xfc000007, 0x20000007, 0                      , 0,
18659        0x0                 },        /* _POOL32A7 */
18660 };
18661
18662
18663 NMD::Pool NMD::P_GP_D[2] = {
18664     { instruction         , 0                   , 0   , 32,
18665        0xfc000007, 0x40000001, &NMD::LD_GP_           , 0,
18666        MIPS64_             },        /* LD[GP] */
18667     { instruction         , 0                   , 0   , 32,
18668        0xfc000007, 0x40000005, &NMD::SD_GP_           , 0,
18669        MIPS64_             },        /* SD[GP] */
18670 };
18671
18672
18673 NMD::Pool NMD::P_GP_W[4] = {
18674     { instruction         , 0                   , 0   , 32,
18675        0xfc000003, 0x40000000, &NMD::ADDIU_GP_W_      , 0,
18676        0x0                 },        /* ADDIU[GP.W] */
18677     { pool                , P_GP_D              , 2   , 32,
18678        0xfc000003, 0x40000001, 0                      , 0,
18679        0x0                 },        /* P.GP.D */
18680     { instruction         , 0                   , 0   , 32,
18681        0xfc000003, 0x40000002, &NMD::LW_GP_           , 0,
18682        0x0                 },        /* LW[GP] */
18683     { instruction         , 0                   , 0   , 32,
18684        0xfc000003, 0x40000003, &NMD::SW_GP_           , 0,
18685        0x0                 },        /* SW[GP] */
18686 };
18687
18688
18689 NMD::Pool NMD::POOL48I[32] = {
18690     { instruction         , 0                   , 0   , 48,
18691        0xfc1f00000000ull, 0x600000000000ull, &NMD::LI_48_           , 0,
18692        XMMS_               },        /* LI[48] */
18693     { instruction         , 0                   , 0   , 48,
18694        0xfc1f00000000ull, 0x600100000000ull, &NMD::ADDIU_48_        , 0,
18695        XMMS_               },        /* ADDIU[48] */
18696     { instruction         , 0                   , 0   , 48,
18697        0xfc1f00000000ull, 0x600200000000ull, &NMD::ADDIU_GP48_      , 0,
18698        XMMS_               },        /* ADDIU[GP48] */
18699     { instruction         , 0                   , 0   , 48,
18700        0xfc1f00000000ull, 0x600300000000ull, &NMD::ADDIUPC_48_      , 0,
18701        XMMS_               },        /* ADDIUPC[48] */
18702     { reserved_block      , 0                   , 0   , 48,
18703        0xfc1f00000000ull, 0x600400000000ull, 0                      , 0,
18704        0x0                 },        /* POOL48I~*(4) */
18705     { reserved_block      , 0                   , 0   , 48,
18706        0xfc1f00000000ull, 0x600500000000ull, 0                      , 0,
18707        0x0                 },        /* POOL48I~*(5) */
18708     { reserved_block      , 0                   , 0   , 48,
18709        0xfc1f00000000ull, 0x600600000000ull, 0                      , 0,
18710        0x0                 },        /* POOL48I~*(6) */
18711     { reserved_block      , 0                   , 0   , 48,
18712        0xfc1f00000000ull, 0x600700000000ull, 0                      , 0,
18713        0x0                 },        /* POOL48I~*(7) */
18714     { reserved_block      , 0                   , 0   , 48,
18715        0xfc1f00000000ull, 0x600800000000ull, 0                      , 0,
18716        0x0                 },        /* POOL48I~*(8) */
18717     { reserved_block      , 0                   , 0   , 48,
18718        0xfc1f00000000ull, 0x600900000000ull, 0                      , 0,
18719        0x0                 },        /* POOL48I~*(9) */
18720     { reserved_block      , 0                   , 0   , 48,
18721        0xfc1f00000000ull, 0x600a00000000ull, 0                      , 0,
18722        0x0                 },        /* POOL48I~*(10) */
18723     { instruction         , 0                   , 0   , 48,
18724        0xfc1f00000000ull, 0x600b00000000ull, &NMD::LWPC_48_         , 0,
18725        XMMS_               },        /* LWPC[48] */
18726     { reserved_block      , 0                   , 0   , 48,
18727        0xfc1f00000000ull, 0x600c00000000ull, 0                      , 0,
18728        0x0                 },        /* POOL48I~*(12) */
18729     { reserved_block      , 0                   , 0   , 48,
18730        0xfc1f00000000ull, 0x600d00000000ull, 0                      , 0,
18731        0x0                 },        /* POOL48I~*(13) */
18732     { reserved_block      , 0                   , 0   , 48,
18733        0xfc1f00000000ull, 0x600e00000000ull, 0                      , 0,
18734        0x0                 },        /* POOL48I~*(14) */
18735     { instruction         , 0                   , 0   , 48,
18736        0xfc1f00000000ull, 0x600f00000000ull, &NMD::SWPC_48_         , 0,
18737        XMMS_               },        /* SWPC[48] */
18738     { reserved_block      , 0                   , 0   , 48,
18739        0xfc1f00000000ull, 0x601000000000ull, 0                      , 0,
18740        0x0                 },        /* POOL48I~*(16) */
18741     { instruction         , 0                   , 0   , 48,
18742        0xfc1f00000000ull, 0x601100000000ull, &NMD::DADDIU_48_       , 0,
18743        MIPS64_             },        /* DADDIU[48] */
18744     { reserved_block      , 0                   , 0   , 48,
18745        0xfc1f00000000ull, 0x601200000000ull, 0                      , 0,
18746        0x0                 },        /* POOL48I~*(18) */
18747     { reserved_block      , 0                   , 0   , 48,
18748        0xfc1f00000000ull, 0x601300000000ull, 0                      , 0,
18749        0x0                 },        /* POOL48I~*(19) */
18750     { instruction         , 0                   , 0   , 48,
18751        0xfc1f00000000ull, 0x601400000000ull, &NMD::DLUI_48_         , 0,
18752        MIPS64_             },        /* DLUI[48] */
18753     { reserved_block      , 0                   , 0   , 48,
18754        0xfc1f00000000ull, 0x601500000000ull, 0                      , 0,
18755        0x0                 },        /* POOL48I~*(21) */
18756     { reserved_block      , 0                   , 0   , 48,
18757        0xfc1f00000000ull, 0x601600000000ull, 0                      , 0,
18758        0x0                 },        /* POOL48I~*(22) */
18759     { reserved_block      , 0                   , 0   , 48,
18760        0xfc1f00000000ull, 0x601700000000ull, 0                      , 0,
18761        0x0                 },        /* POOL48I~*(23) */
18762     { reserved_block      , 0                   , 0   , 48,
18763        0xfc1f00000000ull, 0x601800000000ull, 0                      , 0,
18764        0x0                 },        /* POOL48I~*(24) */
18765     { reserved_block      , 0                   , 0   , 48,
18766        0xfc1f00000000ull, 0x601900000000ull, 0                      , 0,
18767        0x0                 },        /* POOL48I~*(25) */
18768     { reserved_block      , 0                   , 0   , 48,
18769        0xfc1f00000000ull, 0x601a00000000ull, 0                      , 0,
18770        0x0                 },        /* POOL48I~*(26) */
18771     { instruction         , 0                   , 0   , 48,
18772        0xfc1f00000000ull, 0x601b00000000ull, &NMD::LDPC_48_         , 0,
18773        MIPS64_             },        /* LDPC[48] */
18774     { reserved_block      , 0                   , 0   , 48,
18775        0xfc1f00000000ull, 0x601c00000000ull, 0                      , 0,
18776        0x0                 },        /* POOL48I~*(28) */
18777     { reserved_block      , 0                   , 0   , 48,
18778        0xfc1f00000000ull, 0x601d00000000ull, 0                      , 0,
18779        0x0                 },        /* POOL48I~*(29) */
18780     { reserved_block      , 0                   , 0   , 48,
18781        0xfc1f00000000ull, 0x601e00000000ull, 0                      , 0,
18782        0x0                 },        /* POOL48I~*(30) */
18783     { instruction         , 0                   , 0   , 48,
18784        0xfc1f00000000ull, 0x601f00000000ull, &NMD::SDPC_48_         , 0,
18785        MIPS64_             },        /* SDPC[48] */
18786 };
18787
18788
18789 NMD::Pool NMD::PP_SR[4] = {
18790     { instruction         , 0                   , 0   , 32,
18791        0xfc10f003, 0x80003000, &NMD::SAVE_32_         , 0,
18792        0x0                 },        /* SAVE[32] */
18793     { reserved_block      , 0                   , 0   , 32,
18794        0xfc10f003, 0x80003001, 0                      , 0,
18795        0x0                 },        /* PP.SR~*(1) */
18796     { instruction         , 0                   , 0   , 32,
18797        0xfc10f003, 0x80003002, &NMD::RESTORE_32_      , 0,
18798        0x0                 },        /* RESTORE[32] */
18799     { return_instruction  , 0                   , 0   , 32,
18800        0xfc10f003, 0x80003003, &NMD::RESTORE_JRC_32_  , 0,
18801        0x0                 },        /* RESTORE.JRC[32] */
18802 };
18803
18804
18805 NMD::Pool NMD::P_SR_F[8] = {
18806     { instruction         , 0                   , 0   , 32,
18807        0xfc10f007, 0x80103000, &NMD::SAVEF            , 0,
18808        CP1_                },        /* SAVEF */
18809     { instruction         , 0                   , 0   , 32,
18810        0xfc10f007, 0x80103001, &NMD::RESTOREF         , 0,
18811        CP1_                },        /* RESTOREF */
18812     { reserved_block      , 0                   , 0   , 32,
18813        0xfc10f007, 0x80103002, 0                      , 0,
18814        0x0                 },        /* P.SR.F~*(2) */
18815     { reserved_block      , 0                   , 0   , 32,
18816        0xfc10f007, 0x80103003, 0                      , 0,
18817        0x0                 },        /* P.SR.F~*(3) */
18818     { reserved_block      , 0                   , 0   , 32,
18819        0xfc10f007, 0x80103004, 0                      , 0,
18820        0x0                 },        /* P.SR.F~*(4) */
18821     { reserved_block      , 0                   , 0   , 32,
18822        0xfc10f007, 0x80103005, 0                      , 0,
18823        0x0                 },        /* P.SR.F~*(5) */
18824     { reserved_block      , 0                   , 0   , 32,
18825        0xfc10f007, 0x80103006, 0                      , 0,
18826        0x0                 },        /* P.SR.F~*(6) */
18827     { reserved_block      , 0                   , 0   , 32,
18828        0xfc10f007, 0x80103007, 0                      , 0,
18829        0x0                 },        /* P.SR.F~*(7) */
18830 };
18831
18832
18833 NMD::Pool NMD::P_SR[2] = {
18834     { pool                , PP_SR               , 4   , 32,
18835        0xfc10f000, 0x80003000, 0                      , 0,
18836        0x0                 },        /* PP.SR */
18837     { pool                , P_SR_F              , 8   , 32,
18838        0xfc10f000, 0x80103000, 0                      , 0,
18839        0x0                 },        /* P.SR.F */
18840 };
18841
18842
18843 NMD::Pool NMD::P_SLL[5] = {
18844     { instruction         , 0                   , 0   , 32,
18845        0xffe0f1ff, 0x8000c000, &NMD::NOP_32_          , 0,
18846        0x0                 },        /* NOP[32] */
18847     { instruction         , 0                   , 0   , 32,
18848        0xffe0f1ff, 0x8000c003, &NMD::EHB              , 0,
18849        0x0                 },        /* EHB */
18850     { instruction         , 0                   , 0   , 32,
18851        0xffe0f1ff, 0x8000c005, &NMD::PAUSE            , 0,
18852        0x0                 },        /* PAUSE */
18853     { instruction         , 0                   , 0   , 32,
18854        0xffe0f1ff, 0x8000c006, &NMD::SYNC             , 0,
18855        0x0                 },        /* SYNC */
18856     { instruction         , 0                   , 0   , 32,
18857        0xfc00f1e0, 0x8000c000, &NMD::SLL_32_          , 0,
18858        0x0                 },        /* SLL[32] */
18859 };
18860
18861
18862 NMD::Pool NMD::P_SHIFT[16] = {
18863     { pool                , P_SLL               , 5   , 32,
18864        0xfc00f1e0, 0x8000c000, 0                      , 0,
18865        0x0                 },        /* P.SLL */
18866     { reserved_block      , 0                   , 0   , 32,
18867        0xfc00f1e0, 0x8000c020, 0                      , 0,
18868        0x0                 },        /* P.SHIFT~*(1) */
18869     { instruction         , 0                   , 0   , 32,
18870        0xfc00f1e0, 0x8000c040, &NMD::SRL_32_          , 0,
18871        0x0                 },        /* SRL[32] */
18872     { reserved_block      , 0                   , 0   , 32,
18873        0xfc00f1e0, 0x8000c060, 0                      , 0,
18874        0x0                 },        /* P.SHIFT~*(3) */
18875     { instruction         , 0                   , 0   , 32,
18876        0xfc00f1e0, 0x8000c080, &NMD::SRA              , 0,
18877        0x0                 },        /* SRA */
18878     { reserved_block      , 0                   , 0   , 32,
18879        0xfc00f1e0, 0x8000c0a0, 0                      , 0,
18880        0x0                 },        /* P.SHIFT~*(5) */
18881     { instruction         , 0                   , 0   , 32,
18882        0xfc00f1e0, 0x8000c0c0, &NMD::ROTR             , 0,
18883        0x0                 },        /* ROTR */
18884     { reserved_block      , 0                   , 0   , 32,
18885        0xfc00f1e0, 0x8000c0e0, 0                      , 0,
18886        0x0                 },        /* P.SHIFT~*(7) */
18887     { instruction         , 0                   , 0   , 32,
18888        0xfc00f1e0, 0x8000c100, &NMD::DSLL             , 0,
18889        MIPS64_             },        /* DSLL */
18890     { instruction         , 0                   , 0   , 32,
18891        0xfc00f1e0, 0x8000c120, &NMD::DSLL32           , 0,
18892        MIPS64_             },        /* DSLL32 */
18893     { instruction         , 0                   , 0   , 32,
18894        0xfc00f1e0, 0x8000c140, &NMD::DSRL             , 0,
18895        MIPS64_             },        /* DSRL */
18896     { instruction         , 0                   , 0   , 32,
18897        0xfc00f1e0, 0x8000c160, &NMD::DSRL32           , 0,
18898        MIPS64_             },        /* DSRL32 */
18899     { instruction         , 0                   , 0   , 32,
18900        0xfc00f1e0, 0x8000c180, &NMD::DSRA             , 0,
18901        MIPS64_             },        /* DSRA */
18902     { instruction         , 0                   , 0   , 32,
18903        0xfc00f1e0, 0x8000c1a0, &NMD::DSRA32           , 0,
18904        MIPS64_             },        /* DSRA32 */
18905     { instruction         , 0                   , 0   , 32,
18906        0xfc00f1e0, 0x8000c1c0, &NMD::DROTR            , 0,
18907        MIPS64_             },        /* DROTR */
18908     { instruction         , 0                   , 0   , 32,
18909        0xfc00f1e0, 0x8000c1e0, &NMD::DROTR32          , 0,
18910        MIPS64_             },        /* DROTR32 */
18911 };
18912
18913
18914 NMD::Pool NMD::P_ROTX[4] = {
18915     { instruction         , 0                   , 0   , 32,
18916        0xfc00f820, 0x8000d000, &NMD::ROTX             , 0,
18917        XMMS_               },        /* ROTX */
18918     { reserved_block      , 0                   , 0   , 32,
18919        0xfc00f820, 0x8000d020, 0                      , 0,
18920        0x0                 },        /* P.ROTX~*(1) */
18921     { reserved_block      , 0                   , 0   , 32,
18922        0xfc00f820, 0x8000d800, 0                      , 0,
18923        0x0                 },        /* P.ROTX~*(2) */
18924     { reserved_block      , 0                   , 0   , 32,
18925        0xfc00f820, 0x8000d820, 0                      , 0,
18926        0x0                 },        /* P.ROTX~*(3) */
18927 };
18928
18929
18930 NMD::Pool NMD::P_INS[4] = {
18931     { instruction         , 0                   , 0   , 32,
18932        0xfc00f820, 0x8000e000, &NMD::INS              , 0,
18933        XMMS_               },        /* INS */
18934     { instruction         , 0                   , 0   , 32,
18935        0xfc00f820, 0x8000e020, &NMD::DINSU            , 0,
18936        MIPS64_             },        /* DINSU */
18937     { instruction         , 0                   , 0   , 32,
18938        0xfc00f820, 0x8000e800, &NMD::DINSM            , 0,
18939        MIPS64_             },        /* DINSM */
18940     { instruction         , 0                   , 0   , 32,
18941        0xfc00f820, 0x8000e820, &NMD::DINS             , 0,
18942        MIPS64_             },        /* DINS */
18943 };
18944
18945
18946 NMD::Pool NMD::P_EXT[4] = {
18947     { instruction         , 0                   , 0   , 32,
18948        0xfc00f820, 0x8000f000, &NMD::EXT              , 0,
18949        XMMS_               },        /* EXT */
18950     { instruction         , 0                   , 0   , 32,
18951        0xfc00f820, 0x8000f020, &NMD::DEXTU            , 0,
18952        MIPS64_             },        /* DEXTU */
18953     { instruction         , 0                   , 0   , 32,
18954        0xfc00f820, 0x8000f800, &NMD::DEXTM            , 0,
18955        MIPS64_             },        /* DEXTM */
18956     { instruction         , 0                   , 0   , 32,
18957        0xfc00f820, 0x8000f820, &NMD::DEXT             , 0,
18958        MIPS64_             },        /* DEXT */
18959 };
18960
18961
18962 NMD::Pool NMD::P_U12[16] = {
18963     { instruction         , 0                   , 0   , 32,
18964        0xfc00f000, 0x80000000, &NMD::ORI              , 0,
18965        0x0                 },        /* ORI */
18966     { instruction         , 0                   , 0   , 32,
18967        0xfc00f000, 0x80001000, &NMD::XORI             , 0,
18968        0x0                 },        /* XORI */
18969     { instruction         , 0                   , 0   , 32,
18970        0xfc00f000, 0x80002000, &NMD::ANDI_32_         , 0,
18971        0x0                 },        /* ANDI[32] */
18972     { pool                , P_SR                , 2   , 32,
18973        0xfc00f000, 0x80003000, 0                      , 0,
18974        0x0                 },        /* P.SR */
18975     { instruction         , 0                   , 0   , 32,
18976        0xfc00f000, 0x80004000, &NMD::SLTI             , 0,
18977        0x0                 },        /* SLTI */
18978     { instruction         , 0                   , 0   , 32,
18979        0xfc00f000, 0x80005000, &NMD::SLTIU            , 0,
18980        0x0                 },        /* SLTIU */
18981     { instruction         , 0                   , 0   , 32,
18982        0xfc00f000, 0x80006000, &NMD::SEQI             , 0,
18983        0x0                 },        /* SEQI */
18984     { reserved_block      , 0                   , 0   , 32,
18985        0xfc00f000, 0x80007000, 0                      , 0,
18986        0x0                 },        /* P.U12~*(7) */
18987     { instruction         , 0                   , 0   , 32,
18988        0xfc00f000, 0x80008000, &NMD::ADDIU_NEG_       , 0,
18989        0x0                 },        /* ADDIU[NEG] */
18990     { instruction         , 0                   , 0   , 32,
18991        0xfc00f000, 0x80009000, &NMD::DADDIU_U12_      , 0,
18992        MIPS64_             },        /* DADDIU[U12] */
18993     { instruction         , 0                   , 0   , 32,
18994        0xfc00f000, 0x8000a000, &NMD::DADDIU_NEG_      , 0,
18995        MIPS64_             },        /* DADDIU[NEG] */
18996     { instruction         , 0                   , 0   , 32,
18997        0xfc00f000, 0x8000b000, &NMD::DROTX            , 0,
18998        MIPS64_             },        /* DROTX */
18999     { pool                , P_SHIFT             , 16  , 32,
19000        0xfc00f000, 0x8000c000, 0                      , 0,
19001        0x0                 },        /* P.SHIFT */
19002     { pool                , P_ROTX              , 4   , 32,
19003        0xfc00f000, 0x8000d000, 0                      , 0,
19004        0x0                 },        /* P.ROTX */
19005     { pool                , P_INS               , 4   , 32,
19006        0xfc00f000, 0x8000e000, 0                      , 0,
19007        0x0                 },        /* P.INS */
19008     { pool                , P_EXT               , 4   , 32,
19009        0xfc00f000, 0x8000f000, 0                      , 0,
19010        0x0                 },        /* P.EXT */
19011 };
19012
19013
19014 NMD::Pool NMD::RINT_fmt[2] = {
19015     { instruction         , 0                   , 0   , 32,
19016        0xfc0003ff, 0xa0000020, &NMD::RINT_S           , 0,
19017        CP1_                },        /* RINT.S */
19018     { instruction         , 0                   , 0   , 32,
19019        0xfc0003ff, 0xa0000220, &NMD::RINT_D           , 0,
19020        CP1_                },        /* RINT.D */
19021 };
19022
19023
19024 NMD::Pool NMD::ADD_fmt0[2] = {
19025     { instruction         , 0                   , 0   , 32,
19026        0xfc0003ff, 0xa0000030, &NMD::ADD_S            , 0,
19027        CP1_                },        /* ADD.S */
19028     { reserved_block      , 0                   , 0   , 32,
19029        0xfc0003ff, 0xa0000230, 0                      , 0,
19030        CP1_                },        /* ADD.fmt0~*(1) */
19031 };
19032
19033
19034 NMD::Pool NMD::SELEQZ_fmt[2] = {
19035     { instruction         , 0                   , 0   , 32,
19036        0xfc0003ff, 0xa0000038, &NMD::SELEQZ_S         , 0,
19037        CP1_                },        /* SELEQZ.S */
19038     { instruction         , 0                   , 0   , 32,
19039        0xfc0003ff, 0xa0000238, &NMD::SELEQZ_D         , 0,
19040        CP1_                },        /* SELEQZ.D */
19041 };
19042
19043
19044 NMD::Pool NMD::CLASS_fmt[2] = {
19045     { instruction         , 0                   , 0   , 32,
19046        0xfc0003ff, 0xa0000060, &NMD::CLASS_S          , 0,
19047        CP1_                },        /* CLASS.S */
19048     { instruction         , 0                   , 0   , 32,
19049        0xfc0003ff, 0xa0000260, &NMD::CLASS_D          , 0,
19050        CP1_                },        /* CLASS.D */
19051 };
19052
19053
19054 NMD::Pool NMD::SUB_fmt0[2] = {
19055     { instruction         , 0                   , 0   , 32,
19056        0xfc0003ff, 0xa0000070, &NMD::SUB_S            , 0,
19057        CP1_                },        /* SUB.S */
19058     { reserved_block      , 0                   , 0   , 32,
19059        0xfc0003ff, 0xa0000270, 0                      , 0,
19060        CP1_                },        /* SUB.fmt0~*(1) */
19061 };
19062
19063
19064 NMD::Pool NMD::SELNEZ_fmt[2] = {
19065     { instruction         , 0                   , 0   , 32,
19066        0xfc0003ff, 0xa0000078, &NMD::SELNEZ_S         , 0,
19067        CP1_                },        /* SELNEZ.S */
19068     { instruction         , 0                   , 0   , 32,
19069        0xfc0003ff, 0xa0000278, &NMD::SELNEZ_D         , 0,
19070        CP1_                },        /* SELNEZ.D */
19071 };
19072
19073
19074 NMD::Pool NMD::MUL_fmt0[2] = {
19075     { instruction         , 0                   , 0   , 32,
19076        0xfc0003ff, 0xa00000b0, &NMD::MUL_S            , 0,
19077        CP1_                },        /* MUL.S */
19078     { reserved_block      , 0                   , 0   , 32,
19079        0xfc0003ff, 0xa00002b0, 0                      , 0,
19080        CP1_                },        /* MUL.fmt0~*(1) */
19081 };
19082
19083
19084 NMD::Pool NMD::SEL_fmt[2] = {
19085     { instruction         , 0                   , 0   , 32,
19086        0xfc0003ff, 0xa00000b8, &NMD::SEL_S            , 0,
19087        CP1_                },        /* SEL.S */
19088     { instruction         , 0                   , 0   , 32,
19089        0xfc0003ff, 0xa00002b8, &NMD::SEL_D            , 0,
19090        CP1_                },        /* SEL.D */
19091 };
19092
19093
19094 NMD::Pool NMD::DIV_fmt0[2] = {
19095     { instruction         , 0                   , 0   , 32,
19096        0xfc0003ff, 0xa00000f0, &NMD::DIV_S            , 0,
19097        CP1_                },        /* DIV.S */
19098     { reserved_block      , 0                   , 0   , 32,
19099        0xfc0003ff, 0xa00002f0, 0                      , 0,
19100        CP1_                },        /* DIV.fmt0~*(1) */
19101 };
19102
19103
19104 NMD::Pool NMD::ADD_fmt1[2] = {
19105     { instruction         , 0                   , 0   , 32,
19106        0xfc0003ff, 0xa0000130, &NMD::ADD_D            , 0,
19107        CP1_                },        /* ADD.D */
19108     { reserved_block      , 0                   , 0   , 32,
19109        0xfc0003ff, 0xa0000330, 0                      , 0,
19110        CP1_                },        /* ADD.fmt1~*(1) */
19111 };
19112
19113
19114 NMD::Pool NMD::SUB_fmt1[2] = {
19115     { instruction         , 0                   , 0   , 32,
19116        0xfc0003ff, 0xa0000170, &NMD::SUB_D            , 0,
19117        CP1_                },        /* SUB.D */
19118     { reserved_block      , 0                   , 0   , 32,
19119        0xfc0003ff, 0xa0000370, 0                      , 0,
19120        CP1_                },        /* SUB.fmt1~*(1) */
19121 };
19122
19123
19124 NMD::Pool NMD::MUL_fmt1[2] = {
19125     { instruction         , 0                   , 0   , 32,
19126        0xfc0003ff, 0xa00001b0, &NMD::MUL_D            , 0,
19127        CP1_                },        /* MUL.D */
19128     { reserved_block      , 0                   , 0   , 32,
19129        0xfc0003ff, 0xa00003b0, 0                      , 0,
19130        CP1_                },        /* MUL.fmt1~*(1) */
19131 };
19132
19133
19134 NMD::Pool NMD::MADDF_fmt[2] = {
19135     { instruction         , 0                   , 0   , 32,
19136        0xfc0003ff, 0xa00001b8, &NMD::MADDF_S          , 0,
19137        CP1_                },        /* MADDF.S */
19138     { instruction         , 0                   , 0   , 32,
19139        0xfc0003ff, 0xa00003b8, &NMD::MADDF_D          , 0,
19140        CP1_                },        /* MADDF.D */
19141 };
19142
19143
19144 NMD::Pool NMD::DIV_fmt1[2] = {
19145     { instruction         , 0                   , 0   , 32,
19146        0xfc0003ff, 0xa00001f0, &NMD::DIV_D            , 0,
19147        CP1_                },        /* DIV.D */
19148     { reserved_block      , 0                   , 0   , 32,
19149        0xfc0003ff, 0xa00003f0, 0                      , 0,
19150        CP1_                },        /* DIV.fmt1~*(1) */
19151 };
19152
19153
19154 NMD::Pool NMD::MSUBF_fmt[2] = {
19155     { instruction         , 0                   , 0   , 32,
19156        0xfc0003ff, 0xa00001f8, &NMD::MSUBF_S          , 0,
19157        CP1_                },        /* MSUBF.S */
19158     { instruction         , 0                   , 0   , 32,
19159        0xfc0003ff, 0xa00003f8, &NMD::MSUBF_D          , 0,
19160        CP1_                },        /* MSUBF.D */
19161 };
19162
19163
19164 NMD::Pool NMD::POOL32F_0[64] = {
19165     { reserved_block      , 0                   , 0   , 32,
19166        0xfc0001ff, 0xa0000000, 0                      , 0,
19167        CP1_                },        /* POOL32F_0~*(0) */
19168     { reserved_block      , 0                   , 0   , 32,
19169        0xfc0001ff, 0xa0000008, 0                      , 0,
19170        CP1_                },        /* POOL32F_0~*(1) */
19171     { reserved_block      , 0                   , 0   , 32,
19172        0xfc0001ff, 0xa0000010, 0                      , 0,
19173        CP1_                },        /* POOL32F_0~*(2) */
19174     { reserved_block      , 0                   , 0   , 32,
19175        0xfc0001ff, 0xa0000018, 0                      , 0,
19176        CP1_                },        /* POOL32F_0~*(3) */
19177     { pool                , RINT_fmt            , 2   , 32,
19178        0xfc0001ff, 0xa0000020, 0                      , 0,
19179        CP1_                },        /* RINT.fmt */
19180     { reserved_block      , 0                   , 0   , 32,
19181        0xfc0001ff, 0xa0000028, 0                      , 0,
19182        CP1_                },        /* POOL32F_0~*(5) */
19183     { pool                , ADD_fmt0            , 2   , 32,
19184        0xfc0001ff, 0xa0000030, 0                      , 0,
19185        CP1_                },        /* ADD.fmt0 */
19186     { pool                , SELEQZ_fmt          , 2   , 32,
19187        0xfc0001ff, 0xa0000038, 0                      , 0,
19188        CP1_                },        /* SELEQZ.fmt */
19189     { reserved_block      , 0                   , 0   , 32,
19190        0xfc0001ff, 0xa0000040, 0                      , 0,
19191        CP1_                },        /* POOL32F_0~*(8) */
19192     { reserved_block      , 0                   , 0   , 32,
19193        0xfc0001ff, 0xa0000048, 0                      , 0,
19194        CP1_                },        /* POOL32F_0~*(9) */
19195     { reserved_block      , 0                   , 0   , 32,
19196        0xfc0001ff, 0xa0000050, 0                      , 0,
19197        CP1_                },        /* POOL32F_0~*(10) */
19198     { reserved_block      , 0                   , 0   , 32,
19199        0xfc0001ff, 0xa0000058, 0                      , 0,
19200        CP1_                },        /* POOL32F_0~*(11) */
19201     { pool                , CLASS_fmt           , 2   , 32,
19202        0xfc0001ff, 0xa0000060, 0                      , 0,
19203        CP1_                },        /* CLASS.fmt */
19204     { reserved_block      , 0                   , 0   , 32,
19205        0xfc0001ff, 0xa0000068, 0                      , 0,
19206        CP1_                },        /* POOL32F_0~*(13) */
19207     { pool                , SUB_fmt0            , 2   , 32,
19208        0xfc0001ff, 0xa0000070, 0                      , 0,
19209        CP1_                },        /* SUB.fmt0 */
19210     { pool                , SELNEZ_fmt          , 2   , 32,
19211        0xfc0001ff, 0xa0000078, 0                      , 0,
19212        CP1_                },        /* SELNEZ.fmt */
19213     { reserved_block      , 0                   , 0   , 32,
19214        0xfc0001ff, 0xa0000080, 0                      , 0,
19215        CP1_                },        /* POOL32F_0~*(16) */
19216     { reserved_block      , 0                   , 0   , 32,
19217        0xfc0001ff, 0xa0000088, 0                      , 0,
19218        CP1_                },        /* POOL32F_0~*(17) */
19219     { reserved_block      , 0                   , 0   , 32,
19220        0xfc0001ff, 0xa0000090, 0                      , 0,
19221        CP1_                },        /* POOL32F_0~*(18) */
19222     { reserved_block      , 0                   , 0   , 32,
19223        0xfc0001ff, 0xa0000098, 0                      , 0,
19224        CP1_                },        /* POOL32F_0~*(19) */
19225     { reserved_block      , 0                   , 0   , 32,
19226        0xfc0001ff, 0xa00000a0, 0                      , 0,
19227        CP1_                },        /* POOL32F_0~*(20) */
19228     { reserved_block      , 0                   , 0   , 32,
19229        0xfc0001ff, 0xa00000a8, 0                      , 0,
19230        CP1_                },        /* POOL32F_0~*(21) */
19231     { pool                , MUL_fmt0            , 2   , 32,
19232        0xfc0001ff, 0xa00000b0, 0                      , 0,
19233        CP1_                },        /* MUL.fmt0 */
19234     { pool                , SEL_fmt             , 2   , 32,
19235        0xfc0001ff, 0xa00000b8, 0                      , 0,
19236        CP1_                },        /* SEL.fmt */
19237     { reserved_block      , 0                   , 0   , 32,
19238        0xfc0001ff, 0xa00000c0, 0                      , 0,
19239        CP1_                },        /* POOL32F_0~*(24) */
19240     { reserved_block      , 0                   , 0   , 32,
19241        0xfc0001ff, 0xa00000c8, 0                      , 0,
19242        CP1_                },        /* POOL32F_0~*(25) */
19243     { reserved_block      , 0                   , 0   , 32,
19244        0xfc0001ff, 0xa00000d0, 0                      , 0,
19245        CP1_                },        /* POOL32F_0~*(26) */
19246     { reserved_block      , 0                   , 0   , 32,
19247        0xfc0001ff, 0xa00000d8, 0                      , 0,
19248        CP1_                },        /* POOL32F_0~*(27) */
19249     { reserved_block      , 0                   , 0   , 32,
19250        0xfc0001ff, 0xa00000e0, 0                      , 0,
19251        CP1_                },        /* POOL32F_0~*(28) */
19252     { reserved_block      , 0                   , 0   , 32,
19253        0xfc0001ff, 0xa00000e8, 0                      , 0,
19254        CP1_                },        /* POOL32F_0~*(29) */
19255     { pool                , DIV_fmt0            , 2   , 32,
19256        0xfc0001ff, 0xa00000f0, 0                      , 0,
19257        CP1_                },        /* DIV.fmt0 */
19258     { reserved_block      , 0                   , 0   , 32,
19259        0xfc0001ff, 0xa00000f8, 0                      , 0,
19260        CP1_                },        /* POOL32F_0~*(31) */
19261     { reserved_block      , 0                   , 0   , 32,
19262        0xfc0001ff, 0xa0000100, 0                      , 0,
19263        CP1_                },        /* POOL32F_0~*(32) */
19264     { reserved_block      , 0                   , 0   , 32,
19265        0xfc0001ff, 0xa0000108, 0                      , 0,
19266        CP1_                },        /* POOL32F_0~*(33) */
19267     { reserved_block      , 0                   , 0   , 32,
19268        0xfc0001ff, 0xa0000110, 0                      , 0,
19269        CP1_                },        /* POOL32F_0~*(34) */
19270     { reserved_block      , 0                   , 0   , 32,
19271        0xfc0001ff, 0xa0000118, 0                      , 0,
19272        CP1_                },        /* POOL32F_0~*(35) */
19273     { reserved_block      , 0                   , 0   , 32,
19274        0xfc0001ff, 0xa0000120, 0                      , 0,
19275        CP1_                },        /* POOL32F_0~*(36) */
19276     { reserved_block      , 0                   , 0   , 32,
19277        0xfc0001ff, 0xa0000128, 0                      , 0,
19278        CP1_                },        /* POOL32F_0~*(37) */
19279     { pool                , ADD_fmt1            , 2   , 32,
19280        0xfc0001ff, 0xa0000130, 0                      , 0,
19281        CP1_                },        /* ADD.fmt1 */
19282     { reserved_block      , 0                   , 0   , 32,
19283        0xfc0001ff, 0xa0000138, 0                      , 0,
19284        CP1_                },        /* POOL32F_0~*(39) */
19285     { reserved_block      , 0                   , 0   , 32,
19286        0xfc0001ff, 0xa0000140, 0                      , 0,
19287        CP1_                },        /* POOL32F_0~*(40) */
19288     { reserved_block      , 0                   , 0   , 32,
19289        0xfc0001ff, 0xa0000148, 0                      , 0,
19290        CP1_                },        /* POOL32F_0~*(41) */
19291     { reserved_block      , 0                   , 0   , 32,
19292        0xfc0001ff, 0xa0000150, 0                      , 0,
19293        CP1_                },        /* POOL32F_0~*(42) */
19294     { reserved_block      , 0                   , 0   , 32,
19295        0xfc0001ff, 0xa0000158, 0                      , 0,
19296        CP1_                },        /* POOL32F_0~*(43) */
19297     { reserved_block      , 0                   , 0   , 32,
19298        0xfc0001ff, 0xa0000160, 0                      , 0,
19299        CP1_                },        /* POOL32F_0~*(44) */
19300     { reserved_block      , 0                   , 0   , 32,
19301        0xfc0001ff, 0xa0000168, 0                      , 0,
19302        CP1_                },        /* POOL32F_0~*(45) */
19303     { pool                , SUB_fmt1            , 2   , 32,
19304        0xfc0001ff, 0xa0000170, 0                      , 0,
19305        CP1_                },        /* SUB.fmt1 */
19306     { reserved_block      , 0                   , 0   , 32,
19307        0xfc0001ff, 0xa0000178, 0                      , 0,
19308        CP1_                },        /* POOL32F_0~*(47) */
19309     { reserved_block      , 0                   , 0   , 32,
19310        0xfc0001ff, 0xa0000180, 0                      , 0,
19311        CP1_                },        /* POOL32F_0~*(48) */
19312     { reserved_block      , 0                   , 0   , 32,
19313        0xfc0001ff, 0xa0000188, 0                      , 0,
19314        CP1_                },        /* POOL32F_0~*(49) */
19315     { reserved_block      , 0                   , 0   , 32,
19316        0xfc0001ff, 0xa0000190, 0                      , 0,
19317        CP1_                },        /* POOL32F_0~*(50) */
19318     { reserved_block      , 0                   , 0   , 32,
19319        0xfc0001ff, 0xa0000198, 0                      , 0,
19320        CP1_                },        /* POOL32F_0~*(51) */
19321     { reserved_block      , 0                   , 0   , 32,
19322        0xfc0001ff, 0xa00001a0, 0                      , 0,
19323        CP1_                },        /* POOL32F_0~*(52) */
19324     { reserved_block      , 0                   , 0   , 32,
19325        0xfc0001ff, 0xa00001a8, 0                      , 0,
19326        CP1_                },        /* POOL32F_0~*(53) */
19327     { pool                , MUL_fmt1            , 2   , 32,
19328        0xfc0001ff, 0xa00001b0, 0                      , 0,
19329        CP1_                },        /* MUL.fmt1 */
19330     { pool                , MADDF_fmt           , 2   , 32,
19331        0xfc0001ff, 0xa00001b8, 0                      , 0,
19332        CP1_                },        /* MADDF.fmt */
19333     { reserved_block      , 0                   , 0   , 32,
19334        0xfc0001ff, 0xa00001c0, 0                      , 0,
19335        CP1_                },        /* POOL32F_0~*(56) */
19336     { reserved_block      , 0                   , 0   , 32,
19337        0xfc0001ff, 0xa00001c8, 0                      , 0,
19338        CP1_                },        /* POOL32F_0~*(57) */
19339     { reserved_block      , 0                   , 0   , 32,
19340        0xfc0001ff, 0xa00001d0, 0                      , 0,
19341        CP1_                },        /* POOL32F_0~*(58) */
19342     { reserved_block      , 0                   , 0   , 32,
19343        0xfc0001ff, 0xa00001d8, 0                      , 0,
19344        CP1_                },        /* POOL32F_0~*(59) */
19345     { reserved_block      , 0                   , 0   , 32,
19346        0xfc0001ff, 0xa00001e0, 0                      , 0,
19347        CP1_                },        /* POOL32F_0~*(60) */
19348     { reserved_block      , 0                   , 0   , 32,
19349        0xfc0001ff, 0xa00001e8, 0                      , 0,
19350        CP1_                },        /* POOL32F_0~*(61) */
19351     { pool                , DIV_fmt1            , 2   , 32,
19352        0xfc0001ff, 0xa00001f0, 0                      , 0,
19353        CP1_                },        /* DIV.fmt1 */
19354     { pool                , MSUBF_fmt           , 2   , 32,
19355        0xfc0001ff, 0xa00001f8, 0                      , 0,
19356        CP1_                },        /* MSUBF.fmt */
19357 };
19358
19359
19360 NMD::Pool NMD::MIN_fmt[2] = {
19361     { instruction         , 0                   , 0   , 32,
19362        0xfc00023f, 0xa0000003, &NMD::MIN_S            , 0,
19363        CP1_                },        /* MIN.S */
19364     { instruction         , 0                   , 0   , 32,
19365        0xfc00023f, 0xa0000203, &NMD::MIN_D            , 0,
19366        CP1_                },        /* MIN.D */
19367 };
19368
19369
19370 NMD::Pool NMD::MAX_fmt[2] = {
19371     { instruction         , 0                   , 0   , 32,
19372        0xfc00023f, 0xa000000b, &NMD::MAX_S            , 0,
19373        CP1_                },        /* MAX.S */
19374     { instruction         , 0                   , 0   , 32,
19375        0xfc00023f, 0xa000020b, &NMD::MAX_D            , 0,
19376        CP1_                },        /* MAX.D */
19377 };
19378
19379
19380 NMD::Pool NMD::MINA_fmt[2] = {
19381     { instruction         , 0                   , 0   , 32,
19382        0xfc00023f, 0xa0000023, &NMD::MINA_S           , 0,
19383        CP1_                },        /* MINA.S */
19384     { instruction         , 0                   , 0   , 32,
19385        0xfc00023f, 0xa0000223, &NMD::MINA_D           , 0,
19386        CP1_                },        /* MINA.D */
19387 };
19388
19389
19390 NMD::Pool NMD::MAXA_fmt[2] = {
19391     { instruction         , 0                   , 0   , 32,
19392        0xfc00023f, 0xa000002b, &NMD::MAXA_S           , 0,
19393        CP1_                },        /* MAXA.S */
19394     { instruction         , 0                   , 0   , 32,
19395        0xfc00023f, 0xa000022b, &NMD::MAXA_D           , 0,
19396        CP1_                },        /* MAXA.D */
19397 };
19398
19399
19400 NMD::Pool NMD::CVT_L_fmt[2] = {
19401     { instruction         , 0                   , 0   , 32,
19402        0xfc007fff, 0xa000013b, &NMD::CVT_L_S          , 0,
19403        CP1_                },        /* CVT.L.S */
19404     { instruction         , 0                   , 0   , 32,
19405        0xfc007fff, 0xa000413b, &NMD::CVT_L_D          , 0,
19406        CP1_                },        /* CVT.L.D */
19407 };
19408
19409
19410 NMD::Pool NMD::RSQRT_fmt[2] = {
19411     { instruction         , 0                   , 0   , 32,
19412        0xfc007fff, 0xa000023b, &NMD::RSQRT_S          , 0,
19413        CP1_                },        /* RSQRT.S */
19414     { instruction         , 0                   , 0   , 32,
19415        0xfc007fff, 0xa000423b, &NMD::RSQRT_D          , 0,
19416        CP1_                },        /* RSQRT.D */
19417 };
19418
19419
19420 NMD::Pool NMD::FLOOR_L_fmt[2] = {
19421     { instruction         , 0                   , 0   , 32,
19422        0xfc007fff, 0xa000033b, &NMD::FLOOR_L_S        , 0,
19423        CP1_                },        /* FLOOR.L.S */
19424     { instruction         , 0                   , 0   , 32,
19425        0xfc007fff, 0xa000433b, &NMD::FLOOR_L_D        , 0,
19426        CP1_                },        /* FLOOR.L.D */
19427 };
19428
19429
19430 NMD::Pool NMD::CVT_W_fmt[2] = {
19431     { instruction         , 0                   , 0   , 32,
19432        0xfc007fff, 0xa000093b, &NMD::CVT_W_S          , 0,
19433        CP1_                },        /* CVT.W.S */
19434     { instruction         , 0                   , 0   , 32,
19435        0xfc007fff, 0xa000493b, &NMD::CVT_W_D          , 0,
19436        CP1_                },        /* CVT.W.D */
19437 };
19438
19439
19440 NMD::Pool NMD::SQRT_fmt[2] = {
19441     { instruction         , 0                   , 0   , 32,
19442        0xfc007fff, 0xa0000a3b, &NMD::SQRT_S           , 0,
19443        CP1_                },        /* SQRT.S */
19444     { instruction         , 0                   , 0   , 32,
19445        0xfc007fff, 0xa0004a3b, &NMD::SQRT_D           , 0,
19446        CP1_                },        /* SQRT.D */
19447 };
19448
19449
19450 NMD::Pool NMD::FLOOR_W_fmt[2] = {
19451     { instruction         , 0                   , 0   , 32,
19452        0xfc007fff, 0xa0000b3b, &NMD::FLOOR_W_S        , 0,
19453        CP1_                },        /* FLOOR.W.S */
19454     { instruction         , 0                   , 0   , 32,
19455        0xfc007fff, 0xa0004b3b, &NMD::FLOOR_W_D        , 0,
19456        CP1_                },        /* FLOOR.W.D */
19457 };
19458
19459
19460 NMD::Pool NMD::RECIP_fmt[2] = {
19461     { instruction         , 0                   , 0   , 32,
19462        0xfc007fff, 0xa000123b, &NMD::RECIP_S          , 0,
19463        CP1_                },        /* RECIP.S */
19464     { instruction         , 0                   , 0   , 32,
19465        0xfc007fff, 0xa000523b, &NMD::RECIP_D          , 0,
19466        CP1_                },        /* RECIP.D */
19467 };
19468
19469
19470 NMD::Pool NMD::CEIL_L_fmt[2] = {
19471     { instruction         , 0                   , 0   , 32,
19472        0xfc007fff, 0xa000133b, &NMD::CEIL_L_S         , 0,
19473        CP1_                },        /* CEIL.L.S */
19474     { instruction         , 0                   , 0   , 32,
19475        0xfc007fff, 0xa000533b, &NMD::CEIL_L_D         , 0,
19476        CP1_                },        /* CEIL.L.D */
19477 };
19478
19479
19480 NMD::Pool NMD::CEIL_W_fmt[2] = {
19481     { instruction         , 0                   , 0   , 32,
19482        0xfc007fff, 0xa0001b3b, &NMD::CEIL_W_S         , 0,
19483        CP1_                },        /* CEIL.W.S */
19484     { instruction         , 0                   , 0   , 32,
19485        0xfc007fff, 0xa0005b3b, &NMD::CEIL_W_D         , 0,
19486        CP1_                },        /* CEIL.W.D */
19487 };
19488
19489
19490 NMD::Pool NMD::TRUNC_L_fmt[2] = {
19491     { instruction         , 0                   , 0   , 32,
19492        0xfc007fff, 0xa000233b, &NMD::TRUNC_L_S        , 0,
19493        CP1_                },        /* TRUNC.L.S */
19494     { instruction         , 0                   , 0   , 32,
19495        0xfc007fff, 0xa000633b, &NMD::TRUNC_L_D        , 0,
19496        CP1_                },        /* TRUNC.L.D */
19497 };
19498
19499
19500 NMD::Pool NMD::TRUNC_W_fmt[2] = {
19501     { instruction         , 0                   , 0   , 32,
19502        0xfc007fff, 0xa0002b3b, &NMD::TRUNC_W_S        , 0,
19503        CP1_                },        /* TRUNC.W.S */
19504     { instruction         , 0                   , 0   , 32,
19505        0xfc007fff, 0xa0006b3b, &NMD::TRUNC_W_D        , 0,
19506        CP1_                },        /* TRUNC.W.D */
19507 };
19508
19509
19510 NMD::Pool NMD::ROUND_L_fmt[2] = {
19511     { instruction         , 0                   , 0   , 32,
19512        0xfc007fff, 0xa000333b, &NMD::ROUND_L_S        , 0,
19513        CP1_                },        /* ROUND.L.S */
19514     { instruction         , 0                   , 0   , 32,
19515        0xfc007fff, 0xa000733b, &NMD::ROUND_L_D        , 0,
19516        CP1_                },        /* ROUND.L.D */
19517 };
19518
19519
19520 NMD::Pool NMD::ROUND_W_fmt[2] = {
19521     { instruction         , 0                   , 0   , 32,
19522        0xfc007fff, 0xa0003b3b, &NMD::ROUND_W_S        , 0,
19523        CP1_                },        /* ROUND.W.S */
19524     { instruction         , 0                   , 0   , 32,
19525        0xfc007fff, 0xa0007b3b, &NMD::ROUND_W_D        , 0,
19526        CP1_                },        /* ROUND.W.D */
19527 };
19528
19529
19530 NMD::Pool NMD::POOL32Fxf_0[64] = {
19531     { reserved_block      , 0                   , 0   , 32,
19532        0xfc003fff, 0xa000003b, 0                      , 0,
19533        CP1_                },        /* POOL32Fxf_0~*(0) */
19534     { pool                , CVT_L_fmt           , 2   , 32,
19535        0xfc003fff, 0xa000013b, 0                      , 0,
19536        CP1_                },        /* CVT.L.fmt */
19537     { pool                , RSQRT_fmt           , 2   , 32,
19538        0xfc003fff, 0xa000023b, 0                      , 0,
19539        CP1_                },        /* RSQRT.fmt */
19540     { pool                , FLOOR_L_fmt         , 2   , 32,
19541        0xfc003fff, 0xa000033b, 0                      , 0,
19542        CP1_                },        /* FLOOR.L.fmt */
19543     { reserved_block      , 0                   , 0   , 32,
19544        0xfc003fff, 0xa000043b, 0                      , 0,
19545        CP1_                },        /* POOL32Fxf_0~*(4) */
19546     { reserved_block      , 0                   , 0   , 32,
19547        0xfc003fff, 0xa000053b, 0                      , 0,
19548        CP1_                },        /* POOL32Fxf_0~*(5) */
19549     { reserved_block      , 0                   , 0   , 32,
19550        0xfc003fff, 0xa000063b, 0                      , 0,
19551        CP1_                },        /* POOL32Fxf_0~*(6) */
19552     { reserved_block      , 0                   , 0   , 32,
19553        0xfc003fff, 0xa000073b, 0                      , 0,
19554        CP1_                },        /* POOL32Fxf_0~*(7) */
19555     { reserved_block      , 0                   , 0   , 32,
19556        0xfc003fff, 0xa000083b, 0                      , 0,
19557        CP1_                },        /* POOL32Fxf_0~*(8) */
19558     { pool                , CVT_W_fmt           , 2   , 32,
19559        0xfc003fff, 0xa000093b, 0                      , 0,
19560        CP1_                },        /* CVT.W.fmt */
19561     { pool                , SQRT_fmt            , 2   , 32,
19562        0xfc003fff, 0xa0000a3b, 0                      , 0,
19563        CP1_                },        /* SQRT.fmt */
19564     { pool                , FLOOR_W_fmt         , 2   , 32,
19565        0xfc003fff, 0xa0000b3b, 0                      , 0,
19566        CP1_                },        /* FLOOR.W.fmt */
19567     { reserved_block      , 0                   , 0   , 32,
19568        0xfc003fff, 0xa0000c3b, 0                      , 0,
19569        CP1_                },        /* POOL32Fxf_0~*(12) */
19570     { reserved_block      , 0                   , 0   , 32,
19571        0xfc003fff, 0xa0000d3b, 0                      , 0,
19572        CP1_                },        /* POOL32Fxf_0~*(13) */
19573     { reserved_block      , 0                   , 0   , 32,
19574        0xfc003fff, 0xa0000e3b, 0                      , 0,
19575        CP1_                },        /* POOL32Fxf_0~*(14) */
19576     { reserved_block      , 0                   , 0   , 32,
19577        0xfc003fff, 0xa0000f3b, 0                      , 0,
19578        CP1_                },        /* POOL32Fxf_0~*(15) */
19579     { instruction         , 0                   , 0   , 32,
19580        0xfc003fff, 0xa000103b, &NMD::CFC1             , 0,
19581        CP1_                },        /* CFC1 */
19582     { reserved_block      , 0                   , 0   , 32,
19583        0xfc003fff, 0xa000113b, 0                      , 0,
19584        CP1_                },        /* POOL32Fxf_0~*(17) */
19585     { pool                , RECIP_fmt           , 2   , 32,
19586        0xfc003fff, 0xa000123b, 0                      , 0,
19587        CP1_                },        /* RECIP.fmt */
19588     { pool                , CEIL_L_fmt          , 2   , 32,
19589        0xfc003fff, 0xa000133b, 0                      , 0,
19590        CP1_                },        /* CEIL.L.fmt */
19591     { reserved_block      , 0                   , 0   , 32,
19592        0xfc003fff, 0xa000143b, 0                      , 0,
19593        CP1_                },        /* POOL32Fxf_0~*(20) */
19594     { reserved_block      , 0                   , 0   , 32,
19595        0xfc003fff, 0xa000153b, 0                      , 0,
19596        CP1_                },        /* POOL32Fxf_0~*(21) */
19597     { reserved_block      , 0                   , 0   , 32,
19598        0xfc003fff, 0xa000163b, 0                      , 0,
19599        CP1_                },        /* POOL32Fxf_0~*(22) */
19600     { reserved_block      , 0                   , 0   , 32,
19601        0xfc003fff, 0xa000173b, 0                      , 0,
19602        CP1_                },        /* POOL32Fxf_0~*(23) */
19603     { instruction         , 0                   , 0   , 32,
19604        0xfc003fff, 0xa000183b, &NMD::CTC1             , 0,
19605        CP1_                },        /* CTC1 */
19606     { reserved_block      , 0                   , 0   , 32,
19607        0xfc003fff, 0xa000193b, 0                      , 0,
19608        CP1_                },        /* POOL32Fxf_0~*(25) */
19609     { reserved_block      , 0                   , 0   , 32,
19610        0xfc003fff, 0xa0001a3b, 0                      , 0,
19611        CP1_                },        /* POOL32Fxf_0~*(26) */
19612     { pool                , CEIL_W_fmt          , 2   , 32,
19613        0xfc003fff, 0xa0001b3b, 0                      , 0,
19614        CP1_                },        /* CEIL.W.fmt */
19615     { reserved_block      , 0                   , 0   , 32,
19616        0xfc003fff, 0xa0001c3b, 0                      , 0,
19617        CP1_                },        /* POOL32Fxf_0~*(28) */
19618     { reserved_block      , 0                   , 0   , 32,
19619        0xfc003fff, 0xa0001d3b, 0                      , 0,
19620        CP1_                },        /* POOL32Fxf_0~*(29) */
19621     { reserved_block      , 0                   , 0   , 32,
19622        0xfc003fff, 0xa0001e3b, 0                      , 0,
19623        CP1_                },        /* POOL32Fxf_0~*(30) */
19624     { reserved_block      , 0                   , 0   , 32,
19625        0xfc003fff, 0xa0001f3b, 0                      , 0,
19626        CP1_                },        /* POOL32Fxf_0~*(31) */
19627     { instruction         , 0                   , 0   , 32,
19628        0xfc003fff, 0xa000203b, &NMD::MFC1             , 0,
19629        CP1_                },        /* MFC1 */
19630     { instruction         , 0                   , 0   , 32,
19631        0xfc003fff, 0xa000213b, &NMD::CVT_S_PL         , 0,
19632        CP1_                },        /* CVT.S.PL */
19633     { reserved_block      , 0                   , 0   , 32,
19634        0xfc003fff, 0xa000223b, 0                      , 0,
19635        CP1_                },        /* POOL32Fxf_0~*(34) */
19636     { pool                , TRUNC_L_fmt         , 2   , 32,
19637        0xfc003fff, 0xa000233b, 0                      , 0,
19638        CP1_                },        /* TRUNC.L.fmt */
19639     { instruction         , 0                   , 0   , 32,
19640        0xfc003fff, 0xa000243b, &NMD::DMFC1            , 0,
19641        CP1_ | MIPS64_      },        /* DMFC1 */
19642     { reserved_block      , 0                   , 0   , 32,
19643        0xfc003fff, 0xa000253b, 0                      , 0,
19644        CP1_                },        /* POOL32Fxf_0~*(37) */
19645     { reserved_block      , 0                   , 0   , 32,
19646        0xfc003fff, 0xa000263b, 0                      , 0,
19647        CP1_                },        /* POOL32Fxf_0~*(38) */
19648     { reserved_block      , 0                   , 0   , 32,
19649        0xfc003fff, 0xa000273b, 0                      , 0,
19650        CP1_                },        /* POOL32Fxf_0~*(39) */
19651     { instruction         , 0                   , 0   , 32,
19652        0xfc003fff, 0xa000283b, &NMD::MTC1             , 0,
19653        CP1_                },        /* MTC1 */
19654     { instruction         , 0                   , 0   , 32,
19655        0xfc003fff, 0xa000293b, &NMD::CVT_S_PU         , 0,
19656        CP1_                },        /* CVT.S.PU */
19657     { reserved_block      , 0                   , 0   , 32,
19658        0xfc003fff, 0xa0002a3b, 0                      , 0,
19659        CP1_                },        /* POOL32Fxf_0~*(42) */
19660     { pool                , TRUNC_W_fmt         , 2   , 32,
19661        0xfc003fff, 0xa0002b3b, 0                      , 0,
19662        CP1_                },        /* TRUNC.W.fmt */
19663     { instruction         , 0                   , 0   , 32,
19664        0xfc003fff, 0xa0002c3b, &NMD::DMTC1            , 0,
19665        CP1_ | MIPS64_      },        /* DMTC1 */
19666     { reserved_block      , 0                   , 0   , 32,
19667        0xfc003fff, 0xa0002d3b, 0                      , 0,
19668        CP1_                },        /* POOL32Fxf_0~*(45) */
19669     { reserved_block      , 0                   , 0   , 32,
19670        0xfc003fff, 0xa0002e3b, 0                      , 0,
19671        CP1_                },        /* POOL32Fxf_0~*(46) */
19672     { reserved_block      , 0                   , 0   , 32,
19673        0xfc003fff, 0xa0002f3b, 0                      , 0,
19674        CP1_                },        /* POOL32Fxf_0~*(47) */
19675     { instruction         , 0                   , 0   , 32,
19676        0xfc003fff, 0xa000303b, &NMD::MFHC1            , 0,
19677        CP1_                },        /* MFHC1 */
19678     { reserved_block      , 0                   , 0   , 32,
19679        0xfc003fff, 0xa000313b, 0                      , 0,
19680        CP1_                },        /* POOL32Fxf_0~*(49) */
19681     { reserved_block      , 0                   , 0   , 32,
19682        0xfc003fff, 0xa000323b, 0                      , 0,
19683        CP1_                },        /* POOL32Fxf_0~*(50) */
19684     { pool                , ROUND_L_fmt         , 2   , 32,
19685        0xfc003fff, 0xa000333b, 0                      , 0,
19686        CP1_                },        /* ROUND.L.fmt */
19687     { reserved_block      , 0                   , 0   , 32,
19688        0xfc003fff, 0xa000343b, 0                      , 0,
19689        CP1_                },        /* POOL32Fxf_0~*(52) */
19690     { reserved_block      , 0                   , 0   , 32,
19691        0xfc003fff, 0xa000353b, 0                      , 0,
19692        CP1_                },        /* POOL32Fxf_0~*(53) */
19693     { reserved_block      , 0                   , 0   , 32,
19694        0xfc003fff, 0xa000363b, 0                      , 0,
19695        CP1_                },        /* POOL32Fxf_0~*(54) */
19696     { reserved_block      , 0                   , 0   , 32,
19697        0xfc003fff, 0xa000373b, 0                      , 0,
19698        CP1_                },        /* POOL32Fxf_0~*(55) */
19699     { instruction         , 0                   , 0   , 32,
19700        0xfc003fff, 0xa000383b, &NMD::MTHC1            , 0,
19701        CP1_                },        /* MTHC1 */
19702     { reserved_block      , 0                   , 0   , 32,
19703        0xfc003fff, 0xa000393b, 0                      , 0,
19704        CP1_                },        /* POOL32Fxf_0~*(57) */
19705     { reserved_block      , 0                   , 0   , 32,
19706        0xfc003fff, 0xa0003a3b, 0                      , 0,
19707        CP1_                },        /* POOL32Fxf_0~*(58) */
19708     { pool                , ROUND_W_fmt         , 2   , 32,
19709        0xfc003fff, 0xa0003b3b, 0                      , 0,
19710        CP1_                },        /* ROUND.W.fmt */
19711     { reserved_block      , 0                   , 0   , 32,
19712        0xfc003fff, 0xa0003c3b, 0                      , 0,
19713        CP1_                },        /* POOL32Fxf_0~*(60) */
19714     { reserved_block      , 0                   , 0   , 32,
19715        0xfc003fff, 0xa0003d3b, 0                      , 0,
19716        CP1_                },        /* POOL32Fxf_0~*(61) */
19717     { reserved_block      , 0                   , 0   , 32,
19718        0xfc003fff, 0xa0003e3b, 0                      , 0,
19719        CP1_                },        /* POOL32Fxf_0~*(62) */
19720     { reserved_block      , 0                   , 0   , 32,
19721        0xfc003fff, 0xa0003f3b, 0                      , 0,
19722        CP1_                },        /* POOL32Fxf_0~*(63) */
19723 };
19724
19725
19726 NMD::Pool NMD::MOV_fmt[4] = {
19727     { instruction         , 0                   , 0   , 32,
19728        0xfc007fff, 0xa000007b, &NMD::MOV_S            , 0,
19729        CP1_                },        /* MOV.S */
19730     { instruction         , 0                   , 0   , 32,
19731        0xfc007fff, 0xa000207b, &NMD::MOV_D            , 0,
19732        CP1_                },        /* MOV.D */
19733     { reserved_block      , 0                   , 0   , 32,
19734        0xfc007fff, 0xa000407b, 0                      , 0,
19735        CP1_                },        /* MOV.fmt~*(2) */
19736     { reserved_block      , 0                   , 0   , 32,
19737        0xfc007fff, 0xa000607b, 0                      , 0,
19738        CP1_                },        /* MOV.fmt~*(3) */
19739 };
19740
19741
19742 NMD::Pool NMD::ABS_fmt[4] = {
19743     { instruction         , 0                   , 0   , 32,
19744        0xfc007fff, 0xa000037b, &NMD::ABS_S            , 0,
19745        CP1_                },        /* ABS.S */
19746     { instruction         , 0                   , 0   , 32,
19747        0xfc007fff, 0xa000237b, &NMD::ABS_D            , 0,
19748        CP1_                },        /* ABS.D */
19749     { reserved_block      , 0                   , 0   , 32,
19750        0xfc007fff, 0xa000437b, 0                      , 0,
19751        CP1_                },        /* ABS.fmt~*(2) */
19752     { reserved_block      , 0                   , 0   , 32,
19753        0xfc007fff, 0xa000637b, 0                      , 0,
19754        CP1_                },        /* ABS.fmt~*(3) */
19755 };
19756
19757
19758 NMD::Pool NMD::NEG_fmt[4] = {
19759     { instruction         , 0                   , 0   , 32,
19760        0xfc007fff, 0xa0000b7b, &NMD::NEG_S            , 0,
19761        CP1_                },        /* NEG.S */
19762     { instruction         , 0                   , 0   , 32,
19763        0xfc007fff, 0xa0002b7b, &NMD::NEG_D            , 0,
19764        CP1_                },        /* NEG.D */
19765     { reserved_block      , 0                   , 0   , 32,
19766        0xfc007fff, 0xa0004b7b, 0                      , 0,
19767        CP1_                },        /* NEG.fmt~*(2) */
19768     { reserved_block      , 0                   , 0   , 32,
19769        0xfc007fff, 0xa0006b7b, 0                      , 0,
19770        CP1_                },        /* NEG.fmt~*(3) */
19771 };
19772
19773
19774 NMD::Pool NMD::CVT_D_fmt[4] = {
19775     { instruction         , 0                   , 0   , 32,
19776        0xfc007fff, 0xa000137b, &NMD::CVT_D_S          , 0,
19777        CP1_                },        /* CVT.D.S */
19778     { instruction         , 0                   , 0   , 32,
19779        0xfc007fff, 0xa000337b, &NMD::CVT_D_W          , 0,
19780        CP1_                },        /* CVT.D.W */
19781     { instruction         , 0                   , 0   , 32,
19782        0xfc007fff, 0xa000537b, &NMD::CVT_D_L          , 0,
19783        CP1_                },        /* CVT.D.L */
19784     { reserved_block      , 0                   , 0   , 32,
19785        0xfc007fff, 0xa000737b, 0                      , 0,
19786        CP1_                },        /* CVT.D.fmt~*(3) */
19787 };
19788
19789
19790 NMD::Pool NMD::CVT_S_fmt[4] = {
19791     { instruction         , 0                   , 0   , 32,
19792        0xfc007fff, 0xa0001b7b, &NMD::CVT_S_D          , 0,
19793        CP1_                },        /* CVT.S.D */
19794     { instruction         , 0                   , 0   , 32,
19795        0xfc007fff, 0xa0003b7b, &NMD::CVT_S_W          , 0,
19796        CP1_                },        /* CVT.S.W */
19797     { instruction         , 0                   , 0   , 32,
19798        0xfc007fff, 0xa0005b7b, &NMD::CVT_S_L          , 0,
19799        CP1_                },        /* CVT.S.L */
19800     { reserved_block      , 0                   , 0   , 32,
19801        0xfc007fff, 0xa0007b7b, 0                      , 0,
19802        CP1_                },        /* CVT.S.fmt~*(3) */
19803 };
19804
19805
19806 NMD::Pool NMD::POOL32Fxf_1[32] = {
19807     { pool                , MOV_fmt             , 4   , 32,
19808        0xfc001fff, 0xa000007b, 0                      , 0,
19809        CP1_                },        /* MOV.fmt */
19810     { reserved_block      , 0                   , 0   , 32,
19811        0xfc001fff, 0xa000017b, 0                      , 0,
19812        CP1_                },        /* POOL32Fxf_1~*(1) */
19813     { reserved_block      , 0                   , 0   , 32,
19814        0xfc001fff, 0xa000027b, 0                      , 0,
19815        CP1_                },        /* POOL32Fxf_1~*(2) */
19816     { pool                , ABS_fmt             , 4   , 32,
19817        0xfc001fff, 0xa000037b, 0                      , 0,
19818        CP1_                },        /* ABS.fmt */
19819     { reserved_block      , 0                   , 0   , 32,
19820        0xfc001fff, 0xa000047b, 0                      , 0,
19821        CP1_                },        /* POOL32Fxf_1~*(4) */
19822     { reserved_block      , 0                   , 0   , 32,
19823        0xfc001fff, 0xa000057b, 0                      , 0,
19824        CP1_                },        /* POOL32Fxf_1~*(5) */
19825     { reserved_block      , 0                   , 0   , 32,
19826        0xfc001fff, 0xa000067b, 0                      , 0,
19827        CP1_                },        /* POOL32Fxf_1~*(6) */
19828     { reserved_block      , 0                   , 0   , 32,
19829        0xfc001fff, 0xa000077b, 0                      , 0,
19830        CP1_                },        /* POOL32Fxf_1~*(7) */
19831     { reserved_block      , 0                   , 0   , 32,
19832        0xfc001fff, 0xa000087b, 0                      , 0,
19833        CP1_                },        /* POOL32Fxf_1~*(8) */
19834     { reserved_block      , 0                   , 0   , 32,
19835        0xfc001fff, 0xa000097b, 0                      , 0,
19836        CP1_                },        /* POOL32Fxf_1~*(9) */
19837     { reserved_block      , 0                   , 0   , 32,
19838        0xfc001fff, 0xa0000a7b, 0                      , 0,
19839        CP1_                },        /* POOL32Fxf_1~*(10) */
19840     { pool                , NEG_fmt             , 4   , 32,
19841        0xfc001fff, 0xa0000b7b, 0                      , 0,
19842        CP1_                },        /* NEG.fmt */
19843     { reserved_block      , 0                   , 0   , 32,
19844        0xfc001fff, 0xa0000c7b, 0                      , 0,
19845        CP1_                },        /* POOL32Fxf_1~*(12) */
19846     { reserved_block      , 0                   , 0   , 32,
19847        0xfc001fff, 0xa0000d7b, 0                      , 0,
19848        CP1_                },        /* POOL32Fxf_1~*(13) */
19849     { reserved_block      , 0                   , 0   , 32,
19850        0xfc001fff, 0xa0000e7b, 0                      , 0,
19851        CP1_                },        /* POOL32Fxf_1~*(14) */
19852     { reserved_block      , 0                   , 0   , 32,
19853        0xfc001fff, 0xa0000f7b, 0                      , 0,
19854        CP1_                },        /* POOL32Fxf_1~*(15) */
19855     { reserved_block      , 0                   , 0   , 32,
19856        0xfc001fff, 0xa000107b, 0                      , 0,
19857        CP1_                },        /* POOL32Fxf_1~*(16) */
19858     { reserved_block      , 0                   , 0   , 32,
19859        0xfc001fff, 0xa000117b, 0                      , 0,
19860        CP1_                },        /* POOL32Fxf_1~*(17) */
19861     { reserved_block      , 0                   , 0   , 32,
19862        0xfc001fff, 0xa000127b, 0                      , 0,
19863        CP1_                },        /* POOL32Fxf_1~*(18) */
19864     { pool                , CVT_D_fmt           , 4   , 32,
19865        0xfc001fff, 0xa000137b, 0                      , 0,
19866        CP1_                },        /* CVT.D.fmt */
19867     { reserved_block      , 0                   , 0   , 32,
19868        0xfc001fff, 0xa000147b, 0                      , 0,
19869        CP1_                },        /* POOL32Fxf_1~*(20) */
19870     { reserved_block      , 0                   , 0   , 32,
19871        0xfc001fff, 0xa000157b, 0                      , 0,
19872        CP1_                },        /* POOL32Fxf_1~*(21) */
19873     { reserved_block      , 0                   , 0   , 32,
19874        0xfc001fff, 0xa000167b, 0                      , 0,
19875        CP1_                },        /* POOL32Fxf_1~*(22) */
19876     { reserved_block      , 0                   , 0   , 32,
19877        0xfc001fff, 0xa000177b, 0                      , 0,
19878        CP1_                },        /* POOL32Fxf_1~*(23) */
19879     { reserved_block      , 0                   , 0   , 32,
19880        0xfc001fff, 0xa000187b, 0                      , 0,
19881        CP1_                },        /* POOL32Fxf_1~*(24) */
19882     { reserved_block      , 0                   , 0   , 32,
19883        0xfc001fff, 0xa000197b, 0                      , 0,
19884        CP1_                },        /* POOL32Fxf_1~*(25) */
19885     { reserved_block      , 0                   , 0   , 32,
19886        0xfc001fff, 0xa0001a7b, 0                      , 0,
19887        CP1_                },        /* POOL32Fxf_1~*(26) */
19888     { pool                , CVT_S_fmt           , 4   , 32,
19889        0xfc001fff, 0xa0001b7b, 0                      , 0,
19890        CP1_                },        /* CVT.S.fmt */
19891     { reserved_block      , 0                   , 0   , 32,
19892        0xfc001fff, 0xa0001c7b, 0                      , 0,
19893        CP1_                },        /* POOL32Fxf_1~*(28) */
19894     { reserved_block      , 0                   , 0   , 32,
19895        0xfc001fff, 0xa0001d7b, 0                      , 0,
19896        CP1_                },        /* POOL32Fxf_1~*(29) */
19897     { reserved_block      , 0                   , 0   , 32,
19898        0xfc001fff, 0xa0001e7b, 0                      , 0,
19899        CP1_                },        /* POOL32Fxf_1~*(30) */
19900     { reserved_block      , 0                   , 0   , 32,
19901        0xfc001fff, 0xa0001f7b, 0                      , 0,
19902        CP1_                },        /* POOL32Fxf_1~*(31) */
19903 };
19904
19905
19906 NMD::Pool NMD::POOL32Fxf[4] = {
19907     { pool                , POOL32Fxf_0         , 64  , 32,
19908        0xfc0000ff, 0xa000003b, 0                      , 0,
19909        CP1_                },        /* POOL32Fxf_0 */
19910     { pool                , POOL32Fxf_1         , 32  , 32,
19911        0xfc0000ff, 0xa000007b, 0                      , 0,
19912        CP1_                },        /* POOL32Fxf_1 */
19913     { reserved_block      , 0                   , 0   , 32,
19914        0xfc0000ff, 0xa00000bb, 0                      , 0,
19915        CP1_                },        /* POOL32Fxf~*(2) */
19916     { reserved_block      , 0                   , 0   , 32,
19917        0xfc0000ff, 0xa00000fb, 0                      , 0,
19918        CP1_                },        /* POOL32Fxf~*(3) */
19919 };
19920
19921
19922 NMD::Pool NMD::POOL32F_3[8] = {
19923     { pool                , MIN_fmt             , 2   , 32,
19924        0xfc00003f, 0xa0000003, 0                      , 0,
19925        CP1_                },        /* MIN.fmt */
19926     { pool                , MAX_fmt             , 2   , 32,
19927        0xfc00003f, 0xa000000b, 0                      , 0,
19928        CP1_                },        /* MAX.fmt */
19929     { reserved_block      , 0                   , 0   , 32,
19930        0xfc00003f, 0xa0000013, 0                      , 0,
19931        CP1_                },        /* POOL32F_3~*(2) */
19932     { reserved_block      , 0                   , 0   , 32,
19933        0xfc00003f, 0xa000001b, 0                      , 0,
19934        CP1_                },        /* POOL32F_3~*(3) */
19935     { pool                , MINA_fmt            , 2   , 32,
19936        0xfc00003f, 0xa0000023, 0                      , 0,
19937        CP1_                },        /* MINA.fmt */
19938     { pool                , MAXA_fmt            , 2   , 32,
19939        0xfc00003f, 0xa000002b, 0                      , 0,
19940        CP1_                },        /* MAXA.fmt */
19941     { reserved_block      , 0                   , 0   , 32,
19942        0xfc00003f, 0xa0000033, 0                      , 0,
19943        CP1_                },        /* POOL32F_3~*(6) */
19944     { pool                , POOL32Fxf           , 4   , 32,
19945        0xfc00003f, 0xa000003b, 0                      , 0,
19946        CP1_                },        /* POOL32Fxf */
19947 };
19948
19949
19950 NMD::Pool NMD::CMP_condn_S[32] = {
19951     { instruction         , 0                   , 0   , 32,
19952        0xfc0007ff, 0xa0000005, &NMD::CMP_AF_S         , 0,
19953        CP1_                },        /* CMP.AF.S */
19954     { instruction         , 0                   , 0   , 32,
19955        0xfc0007ff, 0xa0000045, &NMD::CMP_UN_S         , 0,
19956        CP1_                },        /* CMP.UN.S */
19957     { instruction         , 0                   , 0   , 32,
19958        0xfc0007ff, 0xa0000085, &NMD::CMP_EQ_S         , 0,
19959        CP1_                },        /* CMP.EQ.S */
19960     { instruction         , 0                   , 0   , 32,
19961        0xfc0007ff, 0xa00000c5, &NMD::CMP_UEQ_S        , 0,
19962        CP1_                },        /* CMP.UEQ.S */
19963     { instruction         , 0                   , 0   , 32,
19964        0xfc0007ff, 0xa0000105, &NMD::CMP_LT_S         , 0,
19965        CP1_                },        /* CMP.LT.S */
19966     { instruction         , 0                   , 0   , 32,
19967        0xfc0007ff, 0xa0000145, &NMD::CMP_ULT_S        , 0,
19968        CP1_                },        /* CMP.ULT.S */
19969     { instruction         , 0                   , 0   , 32,
19970        0xfc0007ff, 0xa0000185, &NMD::CMP_LE_S         , 0,
19971        CP1_                },        /* CMP.LE.S */
19972     { instruction         , 0                   , 0   , 32,
19973        0xfc0007ff, 0xa00001c5, &NMD::CMP_ULE_S        , 0,
19974        CP1_                },        /* CMP.ULE.S */
19975     { instruction         , 0                   , 0   , 32,
19976        0xfc0007ff, 0xa0000205, &NMD::CMP_SAF_S        , 0,
19977        CP1_                },        /* CMP.SAF.S */
19978     { instruction         , 0                   , 0   , 32,
19979        0xfc0007ff, 0xa0000245, &NMD::CMP_SUN_S        , 0,
19980        CP1_                },        /* CMP.SUN.S */
19981     { instruction         , 0                   , 0   , 32,
19982        0xfc0007ff, 0xa0000285, &NMD::CMP_SEQ_S        , 0,
19983        CP1_                },        /* CMP.SEQ.S */
19984     { instruction         , 0                   , 0   , 32,
19985        0xfc0007ff, 0xa00002c5, &NMD::CMP_SUEQ_S       , 0,
19986        CP1_                },        /* CMP.SUEQ.S */
19987     { instruction         , 0                   , 0   , 32,
19988        0xfc0007ff, 0xa0000305, &NMD::CMP_SLT_S        , 0,
19989        CP1_                },        /* CMP.SLT.S */
19990     { instruction         , 0                   , 0   , 32,
19991        0xfc0007ff, 0xa0000345, &NMD::CMP_SULT_S       , 0,
19992        CP1_                },        /* CMP.SULT.S */
19993     { instruction         , 0                   , 0   , 32,
19994        0xfc0007ff, 0xa0000385, &NMD::CMP_SLE_S        , 0,
19995        CP1_                },        /* CMP.SLE.S */
19996     { instruction         , 0                   , 0   , 32,
19997        0xfc0007ff, 0xa00003c5, &NMD::CMP_SULE_S       , 0,
19998        CP1_                },        /* CMP.SULE.S */
19999     { reserved_block      , 0                   , 0   , 32,
20000        0xfc0007ff, 0xa0000405, 0                      , 0,
20001        CP1_                },        /* CMP.condn.S~*(16) */
20002     { instruction         , 0                   , 0   , 32,
20003        0xfc0007ff, 0xa0000445, &NMD::CMP_OR_S         , 0,
20004        CP1_                },        /* CMP.OR.S */
20005     { instruction         , 0                   , 0   , 32,
20006        0xfc0007ff, 0xa0000485, &NMD::CMP_UNE_S        , 0,
20007        CP1_                },        /* CMP.UNE.S */
20008     { instruction         , 0                   , 0   , 32,
20009        0xfc0007ff, 0xa00004c5, &NMD::CMP_NE_S         , 0,
20010        CP1_                },        /* CMP.NE.S */
20011     { reserved_block      , 0                   , 0   , 32,
20012        0xfc0007ff, 0xa0000505, 0                      , 0,
20013        CP1_                },        /* CMP.condn.S~*(20) */
20014     { reserved_block      , 0                   , 0   , 32,
20015        0xfc0007ff, 0xa0000545, 0                      , 0,
20016        CP1_                },        /* CMP.condn.S~*(21) */
20017     { reserved_block      , 0                   , 0   , 32,
20018        0xfc0007ff, 0xa0000585, 0                      , 0,
20019        CP1_                },        /* CMP.condn.S~*(22) */
20020     { reserved_block      , 0                   , 0   , 32,
20021        0xfc0007ff, 0xa00005c5, 0                      , 0,
20022        CP1_                },        /* CMP.condn.S~*(23) */
20023     { reserved_block      , 0                   , 0   , 32,
20024        0xfc0007ff, 0xa0000605, 0                      , 0,
20025        CP1_                },        /* CMP.condn.S~*(24) */
20026     { instruction         , 0                   , 0   , 32,
20027        0xfc0007ff, 0xa0000645, &NMD::CMP_SOR_S        , 0,
20028        CP1_                },        /* CMP.SOR.S */
20029     { instruction         , 0                   , 0   , 32,
20030        0xfc0007ff, 0xa0000685, &NMD::CMP_SUNE_S       , 0,
20031        CP1_                },        /* CMP.SUNE.S */
20032     { instruction         , 0                   , 0   , 32,
20033        0xfc0007ff, 0xa00006c5, &NMD::CMP_SNE_S        , 0,
20034        CP1_                },        /* CMP.SNE.S */
20035     { reserved_block      , 0                   , 0   , 32,
20036        0xfc0007ff, 0xa0000705, 0                      , 0,
20037        CP1_                },        /* CMP.condn.S~*(28) */
20038     { reserved_block      , 0                   , 0   , 32,
20039        0xfc0007ff, 0xa0000745, 0                      , 0,
20040        CP1_                },        /* CMP.condn.S~*(29) */
20041     { reserved_block      , 0                   , 0   , 32,
20042        0xfc0007ff, 0xa0000785, 0                      , 0,
20043        CP1_                },        /* CMP.condn.S~*(30) */
20044     { reserved_block      , 0                   , 0   , 32,
20045        0xfc0007ff, 0xa00007c5, 0                      , 0,
20046        CP1_                },        /* CMP.condn.S~*(31) */
20047 };
20048
20049
20050 NMD::Pool NMD::CMP_condn_D[32] = {
20051     { instruction         , 0                   , 0   , 32,
20052        0xfc0007ff, 0xa0000015, &NMD::CMP_AF_D         , 0,
20053        CP1_                },        /* CMP.AF.D */
20054     { instruction         , 0                   , 0   , 32,
20055        0xfc0007ff, 0xa0000055, &NMD::CMP_UN_D         , 0,
20056        CP1_                },        /* CMP.UN.D */
20057     { instruction         , 0                   , 0   , 32,
20058        0xfc0007ff, 0xa0000095, &NMD::CMP_EQ_D         , 0,
20059        CP1_                },        /* CMP.EQ.D */
20060     { instruction         , 0                   , 0   , 32,
20061        0xfc0007ff, 0xa00000d5, &NMD::CMP_UEQ_D        , 0,
20062        CP1_                },        /* CMP.UEQ.D */
20063     { instruction         , 0                   , 0   , 32,
20064        0xfc0007ff, 0xa0000115, &NMD::CMP_LT_D         , 0,
20065        CP1_                },        /* CMP.LT.D */
20066     { instruction         , 0                   , 0   , 32,
20067        0xfc0007ff, 0xa0000155, &NMD::CMP_ULT_D        , 0,
20068        CP1_                },        /* CMP.ULT.D */
20069     { instruction         , 0                   , 0   , 32,
20070        0xfc0007ff, 0xa0000195, &NMD::CMP_LE_D         , 0,
20071        CP1_                },        /* CMP.LE.D */
20072     { instruction         , 0                   , 0   , 32,
20073        0xfc0007ff, 0xa00001d5, &NMD::CMP_ULE_D        , 0,
20074        CP1_                },        /* CMP.ULE.D */
20075     { instruction         , 0                   , 0   , 32,
20076        0xfc0007ff, 0xa0000215, &NMD::CMP_SAF_D        , 0,
20077        CP1_                },        /* CMP.SAF.D */
20078     { instruction         , 0                   , 0   , 32,
20079        0xfc0007ff, 0xa0000255, &NMD::CMP_SUN_D        , 0,
20080        CP1_                },        /* CMP.SUN.D */
20081     { instruction         , 0                   , 0   , 32,
20082        0xfc0007ff, 0xa0000295, &NMD::CMP_SEQ_D        , 0,
20083        CP1_                },        /* CMP.SEQ.D */
20084     { instruction         , 0                   , 0   , 32,
20085        0xfc0007ff, 0xa00002d5, &NMD::CMP_SUEQ_D       , 0,
20086        CP1_                },        /* CMP.SUEQ.D */
20087     { instruction         , 0                   , 0   , 32,
20088        0xfc0007ff, 0xa0000315, &NMD::CMP_SLT_D        , 0,
20089        CP1_                },        /* CMP.SLT.D */
20090     { instruction         , 0                   , 0   , 32,
20091        0xfc0007ff, 0xa0000355, &NMD::CMP_SULT_D       , 0,
20092        CP1_                },        /* CMP.SULT.D */
20093     { instruction         , 0                   , 0   , 32,
20094        0xfc0007ff, 0xa0000395, &NMD::CMP_SLE_D        , 0,
20095        CP1_                },        /* CMP.SLE.D */
20096     { instruction         , 0                   , 0   , 32,
20097        0xfc0007ff, 0xa00003d5, &NMD::CMP_SULE_D       , 0,
20098        CP1_                },        /* CMP.SULE.D */
20099     { reserved_block      , 0                   , 0   , 32,
20100        0xfc0007ff, 0xa0000415, 0                      , 0,
20101        CP1_                },        /* CMP.condn.D~*(16) */
20102     { instruction         , 0                   , 0   , 32,
20103        0xfc0007ff, 0xa0000455, &NMD::CMP_OR_D         , 0,
20104        CP1_                },        /* CMP.OR.D */
20105     { instruction         , 0                   , 0   , 32,
20106        0xfc0007ff, 0xa0000495, &NMD::CMP_UNE_D        , 0,
20107        CP1_                },        /* CMP.UNE.D */
20108     { instruction         , 0                   , 0   , 32,
20109        0xfc0007ff, 0xa00004d5, &NMD::CMP_NE_D         , 0,
20110        CP1_                },        /* CMP.NE.D */
20111     { reserved_block      , 0                   , 0   , 32,
20112        0xfc0007ff, 0xa0000515, 0                      , 0,
20113        CP1_                },        /* CMP.condn.D~*(20) */
20114     { reserved_block      , 0                   , 0   , 32,
20115        0xfc0007ff, 0xa0000555, 0                      , 0,
20116        CP1_                },        /* CMP.condn.D~*(21) */
20117     { reserved_block      , 0                   , 0   , 32,
20118        0xfc0007ff, 0xa0000595, 0                      , 0,
20119        CP1_                },        /* CMP.condn.D~*(22) */
20120     { reserved_block      , 0                   , 0   , 32,
20121        0xfc0007ff, 0xa00005d5, 0                      , 0,
20122        CP1_                },        /* CMP.condn.D~*(23) */
20123     { reserved_block      , 0                   , 0   , 32,
20124        0xfc0007ff, 0xa0000615, 0                      , 0,
20125        CP1_                },        /* CMP.condn.D~*(24) */
20126     { instruction         , 0                   , 0   , 32,
20127        0xfc0007ff, 0xa0000655, &NMD::CMP_SOR_D        , 0,
20128        CP1_                },        /* CMP.SOR.D */
20129     { instruction         , 0                   , 0   , 32,
20130        0xfc0007ff, 0xa0000695, &NMD::CMP_SUNE_D       , 0,
20131        CP1_                },        /* CMP.SUNE.D */
20132     { instruction         , 0                   , 0   , 32,
20133        0xfc0007ff, 0xa00006d5, &NMD::CMP_SNE_D        , 0,
20134        CP1_                },        /* CMP.SNE.D */
20135     { reserved_block      , 0                   , 0   , 32,
20136        0xfc0007ff, 0xa0000715, 0                      , 0,
20137        CP1_                },        /* CMP.condn.D~*(28) */
20138     { reserved_block      , 0                   , 0   , 32,
20139        0xfc0007ff, 0xa0000755, 0                      , 0,
20140        CP1_                },        /* CMP.condn.D~*(29) */
20141     { reserved_block      , 0                   , 0   , 32,
20142        0xfc0007ff, 0xa0000795, 0                      , 0,
20143        CP1_                },        /* CMP.condn.D~*(30) */
20144     { reserved_block      , 0                   , 0   , 32,
20145        0xfc0007ff, 0xa00007d5, 0                      , 0,
20146        CP1_                },        /* CMP.condn.D~*(31) */
20147 };
20148
20149
20150 NMD::Pool NMD::POOL32F_5[8] = {
20151     { pool                , CMP_condn_S         , 32  , 32,
20152        0xfc00003f, 0xa0000005, 0                      , 0,
20153        CP1_                },        /* CMP.condn.S */
20154     { reserved_block      , 0                   , 0   , 32,
20155        0xfc00003f, 0xa000000d, 0                      , 0,
20156        CP1_                },        /* POOL32F_5~*(1) */
20157     { pool                , CMP_condn_D         , 32  , 32,
20158        0xfc00003f, 0xa0000015, 0                      , 0,
20159        CP1_                },        /* CMP.condn.D */
20160     { reserved_block      , 0                   , 0   , 32,
20161        0xfc00003f, 0xa000001d, 0                      , 0,
20162        CP1_                },        /* POOL32F_5~*(3) */
20163     { reserved_block      , 0                   , 0   , 32,
20164        0xfc00003f, 0xa0000025, 0                      , 0,
20165        CP1_                },        /* POOL32F_5~*(4) */
20166     { reserved_block      , 0                   , 0   , 32,
20167        0xfc00003f, 0xa000002d, 0                      , 0,
20168        CP1_                },        /* POOL32F_5~*(5) */
20169     { reserved_block      , 0                   , 0   , 32,
20170        0xfc00003f, 0xa0000035, 0                      , 0,
20171        CP1_                },        /* POOL32F_5~*(6) */
20172     { reserved_block      , 0                   , 0   , 32,
20173        0xfc00003f, 0xa000003d, 0                      , 0,
20174        CP1_                },        /* POOL32F_5~*(7) */
20175 };
20176
20177
20178 NMD::Pool NMD::POOL32F[8] = {
20179     { pool                , POOL32F_0           , 64  , 32,
20180        0xfc000007, 0xa0000000, 0                      , 0,
20181        CP1_                },        /* POOL32F_0 */
20182     { reserved_block      , 0                   , 0   , 32,
20183        0xfc000007, 0xa0000001, 0                      , 0,
20184        CP1_                },        /* POOL32F~*(1) */
20185     { reserved_block      , 0                   , 0   , 32,
20186        0xfc000007, 0xa0000002, 0                      , 0,
20187        CP1_                },        /* POOL32F~*(2) */
20188     { pool                , POOL32F_3           , 8   , 32,
20189        0xfc000007, 0xa0000003, 0                      , 0,
20190        CP1_                },        /* POOL32F_3 */
20191     { reserved_block      , 0                   , 0   , 32,
20192        0xfc000007, 0xa0000004, 0                      , 0,
20193        CP1_                },        /* POOL32F~*(4) */
20194     { pool                , POOL32F_5           , 8   , 32,
20195        0xfc000007, 0xa0000005, 0                      , 0,
20196        CP1_                },        /* POOL32F_5 */
20197     { reserved_block      , 0                   , 0   , 32,
20198        0xfc000007, 0xa0000006, 0                      , 0,
20199        CP1_                },        /* POOL32F~*(6) */
20200     { reserved_block      , 0                   , 0   , 32,
20201        0xfc000007, 0xa0000007, 0                      , 0,
20202        CP1_                },        /* POOL32F~*(7) */
20203 };
20204
20205
20206 NMD::Pool NMD::POOL32S_0[64] = {
20207     { reserved_block      , 0                   , 0   , 32,
20208        0xfc0001ff, 0xc0000000, 0                      , 0,
20209        0x0                 },        /* POOL32S_0~*(0) */
20210     { instruction         , 0                   , 0   , 32,
20211        0xfc0001ff, 0xc0000008, &NMD::DLSA             , 0,
20212        MIPS64_             },        /* DLSA */
20213     { instruction         , 0                   , 0   , 32,
20214        0xfc0001ff, 0xc0000010, &NMD::DSLLV            , 0,
20215        MIPS64_             },        /* DSLLV */
20216     { instruction         , 0                   , 0   , 32,
20217        0xfc0001ff, 0xc0000018, &NMD::DMUL             , 0,
20218        MIPS64_             },        /* DMUL */
20219     { reserved_block      , 0                   , 0   , 32,
20220        0xfc0001ff, 0xc0000020, 0                      , 0,
20221        0x0                 },        /* POOL32S_0~*(4) */
20222     { reserved_block      , 0                   , 0   , 32,
20223        0xfc0001ff, 0xc0000028, 0                      , 0,
20224        0x0                 },        /* POOL32S_0~*(5) */
20225     { reserved_block      , 0                   , 0   , 32,
20226        0xfc0001ff, 0xc0000030, 0                      , 0,
20227        0x0                 },        /* POOL32S_0~*(6) */
20228     { reserved_block      , 0                   , 0   , 32,
20229        0xfc0001ff, 0xc0000038, 0                      , 0,
20230        0x0                 },        /* POOL32S_0~*(7) */
20231     { reserved_block      , 0                   , 0   , 32,
20232        0xfc0001ff, 0xc0000040, 0                      , 0,
20233        0x0                 },        /* POOL32S_0~*(8) */
20234     { reserved_block      , 0                   , 0   , 32,
20235        0xfc0001ff, 0xc0000048, 0                      , 0,
20236        0x0                 },        /* POOL32S_0~*(9) */
20237     { instruction         , 0                   , 0   , 32,
20238        0xfc0001ff, 0xc0000050, &NMD::DSRLV            , 0,
20239        MIPS64_             },        /* DSRLV */
20240     { instruction         , 0                   , 0   , 32,
20241        0xfc0001ff, 0xc0000058, &NMD::DMUH             , 0,
20242        MIPS64_             },        /* DMUH */
20243     { reserved_block      , 0                   , 0   , 32,
20244        0xfc0001ff, 0xc0000060, 0                      , 0,
20245        0x0                 },        /* POOL32S_0~*(12) */
20246     { reserved_block      , 0                   , 0   , 32,
20247        0xfc0001ff, 0xc0000068, 0                      , 0,
20248        0x0                 },        /* POOL32S_0~*(13) */
20249     { reserved_block      , 0                   , 0   , 32,
20250        0xfc0001ff, 0xc0000070, 0                      , 0,
20251        0x0                 },        /* POOL32S_0~*(14) */
20252     { reserved_block      , 0                   , 0   , 32,
20253        0xfc0001ff, 0xc0000078, 0                      , 0,
20254        0x0                 },        /* POOL32S_0~*(15) */
20255     { reserved_block      , 0                   , 0   , 32,
20256        0xfc0001ff, 0xc0000080, 0                      , 0,
20257        0x0                 },        /* POOL32S_0~*(16) */
20258     { reserved_block      , 0                   , 0   , 32,
20259        0xfc0001ff, 0xc0000088, 0                      , 0,
20260        0x0                 },        /* POOL32S_0~*(17) */
20261     { instruction         , 0                   , 0   , 32,
20262        0xfc0001ff, 0xc0000090, &NMD::DSRAV            , 0,
20263        MIPS64_             },        /* DSRAV */
20264     { instruction         , 0                   , 0   , 32,
20265        0xfc0001ff, 0xc0000098, &NMD::DMULU            , 0,
20266        MIPS64_             },        /* DMULU */
20267     { reserved_block      , 0                   , 0   , 32,
20268        0xfc0001ff, 0xc00000a0, 0                      , 0,
20269        0x0                 },        /* POOL32S_0~*(20) */
20270     { reserved_block      , 0                   , 0   , 32,
20271        0xfc0001ff, 0xc00000a8, 0                      , 0,
20272        0x0                 },        /* POOL32S_0~*(21) */
20273     { reserved_block      , 0                   , 0   , 32,
20274        0xfc0001ff, 0xc00000b0, 0                      , 0,
20275        0x0                 },        /* POOL32S_0~*(22) */
20276     { reserved_block      , 0                   , 0   , 32,
20277        0xfc0001ff, 0xc00000b8, 0                      , 0,
20278        0x0                 },        /* POOL32S_0~*(23) */
20279     { reserved_block      , 0                   , 0   , 32,
20280        0xfc0001ff, 0xc00000c0, 0                      , 0,
20281        0x0                 },        /* POOL32S_0~*(24) */
20282     { reserved_block      , 0                   , 0   , 32,
20283        0xfc0001ff, 0xc00000c8, 0                      , 0,
20284        0x0                 },        /* POOL32S_0~*(25) */
20285     { instruction         , 0                   , 0   , 32,
20286        0xfc0001ff, 0xc00000d0, &NMD::DROTRV           , 0,
20287        MIPS64_             },        /* DROTRV */
20288     { instruction         , 0                   , 0   , 32,
20289        0xfc0001ff, 0xc00000d8, &NMD::DMUHU            , 0,
20290        MIPS64_             },        /* DMUHU */
20291     { reserved_block      , 0                   , 0   , 32,
20292        0xfc0001ff, 0xc00000e0, 0                      , 0,
20293        0x0                 },        /* POOL32S_0~*(28) */
20294     { reserved_block      , 0                   , 0   , 32,
20295        0xfc0001ff, 0xc00000e8, 0                      , 0,
20296        0x0                 },        /* POOL32S_0~*(29) */
20297     { reserved_block      , 0                   , 0   , 32,
20298        0xfc0001ff, 0xc00000f0, 0                      , 0,
20299        0x0                 },        /* POOL32S_0~*(30) */
20300     { reserved_block      , 0                   , 0   , 32,
20301        0xfc0001ff, 0xc00000f8, 0                      , 0,
20302        0x0                 },        /* POOL32S_0~*(31) */
20303     { reserved_block      , 0                   , 0   , 32,
20304        0xfc0001ff, 0xc0000100, 0                      , 0,
20305        0x0                 },        /* POOL32S_0~*(32) */
20306     { reserved_block      , 0                   , 0   , 32,
20307        0xfc0001ff, 0xc0000108, 0                      , 0,
20308        0x0                 },        /* POOL32S_0~*(33) */
20309     { instruction         , 0                   , 0   , 32,
20310        0xfc0001ff, 0xc0000110, &NMD::DADD             , 0,
20311        MIPS64_             },        /* DADD */
20312     { instruction         , 0                   , 0   , 32,
20313        0xfc0001ff, 0xc0000118, &NMD::DDIV             , 0,
20314        MIPS64_             },        /* DDIV */
20315     { reserved_block      , 0                   , 0   , 32,
20316        0xfc0001ff, 0xc0000120, 0                      , 0,
20317        0x0                 },        /* POOL32S_0~*(36) */
20318     { reserved_block      , 0                   , 0   , 32,
20319        0xfc0001ff, 0xc0000128, 0                      , 0,
20320        0x0                 },        /* POOL32S_0~*(37) */
20321     { reserved_block      , 0                   , 0   , 32,
20322        0xfc0001ff, 0xc0000130, 0                      , 0,
20323        0x0                 },        /* POOL32S_0~*(38) */
20324     { reserved_block      , 0                   , 0   , 32,
20325        0xfc0001ff, 0xc0000138, 0                      , 0,
20326        0x0                 },        /* POOL32S_0~*(39) */
20327     { reserved_block      , 0                   , 0   , 32,
20328        0xfc0001ff, 0xc0000140, 0                      , 0,
20329        0x0                 },        /* POOL32S_0~*(40) */
20330     { reserved_block      , 0                   , 0   , 32,
20331        0xfc0001ff, 0xc0000148, 0                      , 0,
20332        0x0                 },        /* POOL32S_0~*(41) */
20333     { instruction         , 0                   , 0   , 32,
20334        0xfc0001ff, 0xc0000150, &NMD::DADDU            , 0,
20335        MIPS64_             },        /* DADDU */
20336     { instruction         , 0                   , 0   , 32,
20337        0xfc0001ff, 0xc0000158, &NMD::DMOD             , 0,
20338        MIPS64_             },        /* DMOD */
20339     { reserved_block      , 0                   , 0   , 32,
20340        0xfc0001ff, 0xc0000160, 0                      , 0,
20341        0x0                 },        /* POOL32S_0~*(44) */
20342     { reserved_block      , 0                   , 0   , 32,
20343        0xfc0001ff, 0xc0000168, 0                      , 0,
20344        0x0                 },        /* POOL32S_0~*(45) */
20345     { reserved_block      , 0                   , 0   , 32,
20346        0xfc0001ff, 0xc0000170, 0                      , 0,
20347        0x0                 },        /* POOL32S_0~*(46) */
20348     { reserved_block      , 0                   , 0   , 32,
20349        0xfc0001ff, 0xc0000178, 0                      , 0,
20350        0x0                 },        /* POOL32S_0~*(47) */
20351     { reserved_block      , 0                   , 0   , 32,
20352        0xfc0001ff, 0xc0000180, 0                      , 0,
20353        0x0                 },        /* POOL32S_0~*(48) */
20354     { reserved_block      , 0                   , 0   , 32,
20355        0xfc0001ff, 0xc0000188, 0                      , 0,
20356        0x0                 },        /* POOL32S_0~*(49) */
20357     { instruction         , 0                   , 0   , 32,
20358        0xfc0001ff, 0xc0000190, &NMD::DSUB             , 0,
20359        MIPS64_             },        /* DSUB */
20360     { instruction         , 0                   , 0   , 32,
20361        0xfc0001ff, 0xc0000198, &NMD::DDIVU            , 0,
20362        MIPS64_             },        /* DDIVU */
20363     { reserved_block      , 0                   , 0   , 32,
20364        0xfc0001ff, 0xc00001a0, 0                      , 0,
20365        0x0                 },        /* POOL32S_0~*(52) */
20366     { reserved_block      , 0                   , 0   , 32,
20367        0xfc0001ff, 0xc00001a8, 0                      , 0,
20368        0x0                 },        /* POOL32S_0~*(53) */
20369     { reserved_block      , 0                   , 0   , 32,
20370        0xfc0001ff, 0xc00001b0, 0                      , 0,
20371        0x0                 },        /* POOL32S_0~*(54) */
20372     { reserved_block      , 0                   , 0   , 32,
20373        0xfc0001ff, 0xc00001b8, 0                      , 0,
20374        0x0                 },        /* POOL32S_0~*(55) */
20375     { reserved_block      , 0                   , 0   , 32,
20376        0xfc0001ff, 0xc00001c0, 0                      , 0,
20377        0x0                 },        /* POOL32S_0~*(56) */
20378     { reserved_block      , 0                   , 0   , 32,
20379        0xfc0001ff, 0xc00001c8, 0                      , 0,
20380        0x0                 },        /* POOL32S_0~*(57) */
20381     { instruction         , 0                   , 0   , 32,
20382        0xfc0001ff, 0xc00001d0, &NMD::DSUBU            , 0,
20383        MIPS64_             },        /* DSUBU */
20384     { instruction         , 0                   , 0   , 32,
20385        0xfc0001ff, 0xc00001d8, &NMD::DMODU            , 0,
20386        MIPS64_             },        /* DMODU */
20387     { reserved_block      , 0                   , 0   , 32,
20388        0xfc0001ff, 0xc00001e0, 0                      , 0,
20389        0x0                 },        /* POOL32S_0~*(60) */
20390     { reserved_block      , 0                   , 0   , 32,
20391        0xfc0001ff, 0xc00001e8, 0                      , 0,
20392        0x0                 },        /* POOL32S_0~*(61) */
20393     { reserved_block      , 0                   , 0   , 32,
20394        0xfc0001ff, 0xc00001f0, 0                      , 0,
20395        0x0                 },        /* POOL32S_0~*(62) */
20396     { reserved_block      , 0                   , 0   , 32,
20397        0xfc0001ff, 0xc00001f8, 0                      , 0,
20398        0x0                 },        /* POOL32S_0~*(63) */
20399 };
20400
20401
20402 NMD::Pool NMD::POOL32Sxf_4[128] = {
20403     { reserved_block      , 0                   , 0   , 32,
20404        0xfc00ffff, 0xc000013c, 0                      , 0,
20405        0x0                 },        /* POOL32Sxf_4~*(0) */
20406     { reserved_block      , 0                   , 0   , 32,
20407        0xfc00ffff, 0xc000033c, 0                      , 0,
20408        0x0                 },        /* POOL32Sxf_4~*(1) */
20409     { reserved_block      , 0                   , 0   , 32,
20410        0xfc00ffff, 0xc000053c, 0                      , 0,
20411        0x0                 },        /* POOL32Sxf_4~*(2) */
20412     { reserved_block      , 0                   , 0   , 32,
20413        0xfc00ffff, 0xc000073c, 0                      , 0,
20414        0x0                 },        /* POOL32Sxf_4~*(3) */
20415     { reserved_block      , 0                   , 0   , 32,
20416        0xfc00ffff, 0xc000093c, 0                      , 0,
20417        0x0                 },        /* POOL32Sxf_4~*(4) */
20418     { reserved_block      , 0                   , 0   , 32,
20419        0xfc00ffff, 0xc0000b3c, 0                      , 0,
20420        0x0                 },        /* POOL32Sxf_4~*(5) */
20421     { reserved_block      , 0                   , 0   , 32,
20422        0xfc00ffff, 0xc0000d3c, 0                      , 0,
20423        0x0                 },        /* POOL32Sxf_4~*(6) */
20424     { reserved_block      , 0                   , 0   , 32,
20425        0xfc00ffff, 0xc0000f3c, 0                      , 0,
20426        0x0                 },        /* POOL32Sxf_4~*(7) */
20427     { reserved_block      , 0                   , 0   , 32,
20428        0xfc00ffff, 0xc000113c, 0                      , 0,
20429        0x0                 },        /* POOL32Sxf_4~*(8) */
20430     { reserved_block      , 0                   , 0   , 32,
20431        0xfc00ffff, 0xc000133c, 0                      , 0,
20432        0x0                 },        /* POOL32Sxf_4~*(9) */
20433     { reserved_block      , 0                   , 0   , 32,
20434        0xfc00ffff, 0xc000153c, 0                      , 0,
20435        0x0                 },        /* POOL32Sxf_4~*(10) */
20436     { reserved_block      , 0                   , 0   , 32,
20437        0xfc00ffff, 0xc000173c, 0                      , 0,
20438        0x0                 },        /* POOL32Sxf_4~*(11) */
20439     { reserved_block      , 0                   , 0   , 32,
20440        0xfc00ffff, 0xc000193c, 0                      , 0,
20441        0x0                 },        /* POOL32Sxf_4~*(12) */
20442     { reserved_block      , 0                   , 0   , 32,
20443        0xfc00ffff, 0xc0001b3c, 0                      , 0,
20444        0x0                 },        /* POOL32Sxf_4~*(13) */
20445     { reserved_block      , 0                   , 0   , 32,
20446        0xfc00ffff, 0xc0001d3c, 0                      , 0,
20447        0x0                 },        /* POOL32Sxf_4~*(14) */
20448     { reserved_block      , 0                   , 0   , 32,
20449        0xfc00ffff, 0xc0001f3c, 0                      , 0,
20450        0x0                 },        /* POOL32Sxf_4~*(15) */
20451     { reserved_block      , 0                   , 0   , 32,
20452        0xfc00ffff, 0xc000213c, 0                      , 0,
20453        0x0                 },        /* POOL32Sxf_4~*(16) */
20454     { reserved_block      , 0                   , 0   , 32,
20455        0xfc00ffff, 0xc000233c, 0                      , 0,
20456        0x0                 },        /* POOL32Sxf_4~*(17) */
20457     { reserved_block      , 0                   , 0   , 32,
20458        0xfc00ffff, 0xc000253c, 0                      , 0,
20459        0x0                 },        /* POOL32Sxf_4~*(18) */
20460     { reserved_block      , 0                   , 0   , 32,
20461        0xfc00ffff, 0xc000273c, 0                      , 0,
20462        0x0                 },        /* POOL32Sxf_4~*(19) */
20463     { reserved_block      , 0                   , 0   , 32,
20464        0xfc00ffff, 0xc000293c, 0                      , 0,
20465        0x0                 },        /* POOL32Sxf_4~*(20) */
20466     { reserved_block      , 0                   , 0   , 32,
20467        0xfc00ffff, 0xc0002b3c, 0                      , 0,
20468        0x0                 },        /* POOL32Sxf_4~*(21) */
20469     { reserved_block      , 0                   , 0   , 32,
20470        0xfc00ffff, 0xc0002d3c, 0                      , 0,
20471        0x0                 },        /* POOL32Sxf_4~*(22) */
20472     { reserved_block      , 0                   , 0   , 32,
20473        0xfc00ffff, 0xc0002f3c, 0                      , 0,
20474        0x0                 },        /* POOL32Sxf_4~*(23) */
20475     { reserved_block      , 0                   , 0   , 32,
20476        0xfc00ffff, 0xc000313c, 0                      , 0,
20477        0x0                 },        /* POOL32Sxf_4~*(24) */
20478     { reserved_block      , 0                   , 0   , 32,
20479        0xfc00ffff, 0xc000333c, 0                      , 0,
20480        0x0                 },        /* POOL32Sxf_4~*(25) */
20481     { reserved_block      , 0                   , 0   , 32,
20482        0xfc00ffff, 0xc000353c, 0                      , 0,
20483        0x0                 },        /* POOL32Sxf_4~*(26) */
20484     { reserved_block      , 0                   , 0   , 32,
20485        0xfc00ffff, 0xc000373c, 0                      , 0,
20486        0x0                 },        /* POOL32Sxf_4~*(27) */
20487     { reserved_block      , 0                   , 0   , 32,
20488        0xfc00ffff, 0xc000393c, 0                      , 0,
20489        0x0                 },        /* POOL32Sxf_4~*(28) */
20490     { reserved_block      , 0                   , 0   , 32,
20491        0xfc00ffff, 0xc0003b3c, 0                      , 0,
20492        0x0                 },        /* POOL32Sxf_4~*(29) */
20493     { reserved_block      , 0                   , 0   , 32,
20494        0xfc00ffff, 0xc0003d3c, 0                      , 0,
20495        0x0                 },        /* POOL32Sxf_4~*(30) */
20496     { reserved_block      , 0                   , 0   , 32,
20497        0xfc00ffff, 0xc0003f3c, 0                      , 0,
20498        0x0                 },        /* POOL32Sxf_4~*(31) */
20499     { reserved_block      , 0                   , 0   , 32,
20500        0xfc00ffff, 0xc000413c, 0                      , 0,
20501        0x0                 },        /* POOL32Sxf_4~*(32) */
20502     { reserved_block      , 0                   , 0   , 32,
20503        0xfc00ffff, 0xc000433c, 0                      , 0,
20504        0x0                 },        /* POOL32Sxf_4~*(33) */
20505     { reserved_block      , 0                   , 0   , 32,
20506        0xfc00ffff, 0xc000453c, 0                      , 0,
20507        0x0                 },        /* POOL32Sxf_4~*(34) */
20508     { reserved_block      , 0                   , 0   , 32,
20509        0xfc00ffff, 0xc000473c, 0                      , 0,
20510        0x0                 },        /* POOL32Sxf_4~*(35) */
20511     { reserved_block      , 0                   , 0   , 32,
20512        0xfc00ffff, 0xc000493c, 0                      , 0,
20513        0x0                 },        /* POOL32Sxf_4~*(36) */
20514     { instruction         , 0                   , 0   , 32,
20515        0xfc00ffff, 0xc0004b3c, &NMD::DCLO             , 0,
20516        MIPS64_             },        /* DCLO */
20517     { reserved_block      , 0                   , 0   , 32,
20518        0xfc00ffff, 0xc0004d3c, 0                      , 0,
20519        0x0                 },        /* POOL32Sxf_4~*(38) */
20520     { reserved_block      , 0                   , 0   , 32,
20521        0xfc00ffff, 0xc0004f3c, 0                      , 0,
20522        0x0                 },        /* POOL32Sxf_4~*(39) */
20523     { reserved_block      , 0                   , 0   , 32,
20524        0xfc00ffff, 0xc000513c, 0                      , 0,
20525        0x0                 },        /* POOL32Sxf_4~*(40) */
20526     { reserved_block      , 0                   , 0   , 32,
20527        0xfc00ffff, 0xc000533c, 0                      , 0,
20528        0x0                 },        /* POOL32Sxf_4~*(41) */
20529     { reserved_block      , 0                   , 0   , 32,
20530        0xfc00ffff, 0xc000553c, 0                      , 0,
20531        0x0                 },        /* POOL32Sxf_4~*(42) */
20532     { reserved_block      , 0                   , 0   , 32,
20533        0xfc00ffff, 0xc000573c, 0                      , 0,
20534        0x0                 },        /* POOL32Sxf_4~*(43) */
20535     { reserved_block      , 0                   , 0   , 32,
20536        0xfc00ffff, 0xc000593c, 0                      , 0,
20537        0x0                 },        /* POOL32Sxf_4~*(44) */
20538     { instruction         , 0                   , 0   , 32,
20539        0xfc00ffff, 0xc0005b3c, &NMD::DCLZ             , 0,
20540        MIPS64_             },        /* DCLZ */
20541     { reserved_block      , 0                   , 0   , 32,
20542        0xfc00ffff, 0xc0005d3c, 0                      , 0,
20543        0x0                 },        /* POOL32Sxf_4~*(46) */
20544     { reserved_block      , 0                   , 0   , 32,
20545        0xfc00ffff, 0xc0005f3c, 0                      , 0,
20546        0x0                 },        /* POOL32Sxf_4~*(47) */
20547     { reserved_block      , 0                   , 0   , 32,
20548        0xfc00ffff, 0xc000613c, 0                      , 0,
20549        0x0                 },        /* POOL32Sxf_4~*(48) */
20550     { reserved_block      , 0                   , 0   , 32,
20551        0xfc00ffff, 0xc000633c, 0                      , 0,
20552        0x0                 },        /* POOL32Sxf_4~*(49) */
20553     { reserved_block      , 0                   , 0   , 32,
20554        0xfc00ffff, 0xc000653c, 0                      , 0,
20555        0x0                 },        /* POOL32Sxf_4~*(50) */
20556     { reserved_block      , 0                   , 0   , 32,
20557        0xfc00ffff, 0xc000673c, 0                      , 0,
20558        0x0                 },        /* POOL32Sxf_4~*(51) */
20559     { reserved_block      , 0                   , 0   , 32,
20560        0xfc00ffff, 0xc000693c, 0                      , 0,
20561        0x0                 },        /* POOL32Sxf_4~*(52) */
20562     { reserved_block      , 0                   , 0   , 32,
20563        0xfc00ffff, 0xc0006b3c, 0                      , 0,
20564        0x0                 },        /* POOL32Sxf_4~*(53) */
20565     { reserved_block      , 0                   , 0   , 32,
20566        0xfc00ffff, 0xc0006d3c, 0                      , 0,
20567        0x0                 },        /* POOL32Sxf_4~*(54) */
20568     { reserved_block      , 0                   , 0   , 32,
20569        0xfc00ffff, 0xc0006f3c, 0                      , 0,
20570        0x0                 },        /* POOL32Sxf_4~*(55) */
20571     { reserved_block      , 0                   , 0   , 32,
20572        0xfc00ffff, 0xc000713c, 0                      , 0,
20573        0x0                 },        /* POOL32Sxf_4~*(56) */
20574     { reserved_block      , 0                   , 0   , 32,
20575        0xfc00ffff, 0xc000733c, 0                      , 0,
20576        0x0                 },        /* POOL32Sxf_4~*(57) */
20577     { reserved_block      , 0                   , 0   , 32,
20578        0xfc00ffff, 0xc000753c, 0                      , 0,
20579        0x0                 },        /* POOL32Sxf_4~*(58) */
20580     { reserved_block      , 0                   , 0   , 32,
20581        0xfc00ffff, 0xc000773c, 0                      , 0,
20582        0x0                 },        /* POOL32Sxf_4~*(59) */
20583     { reserved_block      , 0                   , 0   , 32,
20584        0xfc00ffff, 0xc000793c, 0                      , 0,
20585        0x0                 },        /* POOL32Sxf_4~*(60) */
20586     { reserved_block      , 0                   , 0   , 32,
20587        0xfc00ffff, 0xc0007b3c, 0                      , 0,
20588        0x0                 },        /* POOL32Sxf_4~*(61) */
20589     { reserved_block      , 0                   , 0   , 32,
20590        0xfc00ffff, 0xc0007d3c, 0                      , 0,
20591        0x0                 },        /* POOL32Sxf_4~*(62) */
20592     { reserved_block      , 0                   , 0   , 32,
20593        0xfc00ffff, 0xc0007f3c, 0                      , 0,
20594        0x0                 },        /* POOL32Sxf_4~*(63) */
20595     { reserved_block      , 0                   , 0   , 32,
20596        0xfc00ffff, 0xc000813c, 0                      , 0,
20597        0x0                 },        /* POOL32Sxf_4~*(64) */
20598     { reserved_block      , 0                   , 0   , 32,
20599        0xfc00ffff, 0xc000833c, 0                      , 0,
20600        0x0                 },        /* POOL32Sxf_4~*(65) */
20601     { reserved_block      , 0                   , 0   , 32,
20602        0xfc00ffff, 0xc000853c, 0                      , 0,
20603        0x0                 },        /* POOL32Sxf_4~*(66) */
20604     { reserved_block      , 0                   , 0   , 32,
20605        0xfc00ffff, 0xc000873c, 0                      , 0,
20606        0x0                 },        /* POOL32Sxf_4~*(67) */
20607     { reserved_block      , 0                   , 0   , 32,
20608        0xfc00ffff, 0xc000893c, 0                      , 0,
20609        0x0                 },        /* POOL32Sxf_4~*(68) */
20610     { reserved_block      , 0                   , 0   , 32,
20611        0xfc00ffff, 0xc0008b3c, 0                      , 0,
20612        0x0                 },        /* POOL32Sxf_4~*(69) */
20613     { reserved_block      , 0                   , 0   , 32,
20614        0xfc00ffff, 0xc0008d3c, 0                      , 0,
20615        0x0                 },        /* POOL32Sxf_4~*(70) */
20616     { reserved_block      , 0                   , 0   , 32,
20617        0xfc00ffff, 0xc0008f3c, 0                      , 0,
20618        0x0                 },        /* POOL32Sxf_4~*(71) */
20619     { reserved_block      , 0                   , 0   , 32,
20620        0xfc00ffff, 0xc000913c, 0                      , 0,
20621        0x0                 },        /* POOL32Sxf_4~*(72) */
20622     { reserved_block      , 0                   , 0   , 32,
20623        0xfc00ffff, 0xc000933c, 0                      , 0,
20624        0x0                 },        /* POOL32Sxf_4~*(73) */
20625     { reserved_block      , 0                   , 0   , 32,
20626        0xfc00ffff, 0xc000953c, 0                      , 0,
20627        0x0                 },        /* POOL32Sxf_4~*(74) */
20628     { reserved_block      , 0                   , 0   , 32,
20629        0xfc00ffff, 0xc000973c, 0                      , 0,
20630        0x0                 },        /* POOL32Sxf_4~*(75) */
20631     { reserved_block      , 0                   , 0   , 32,
20632        0xfc00ffff, 0xc000993c, 0                      , 0,
20633        0x0                 },        /* POOL32Sxf_4~*(76) */
20634     { reserved_block      , 0                   , 0   , 32,
20635        0xfc00ffff, 0xc0009b3c, 0                      , 0,
20636        0x0                 },        /* POOL32Sxf_4~*(77) */
20637     { reserved_block      , 0                   , 0   , 32,
20638        0xfc00ffff, 0xc0009d3c, 0                      , 0,
20639        0x0                 },        /* POOL32Sxf_4~*(78) */
20640     { reserved_block      , 0                   , 0   , 32,
20641        0xfc00ffff, 0xc0009f3c, 0                      , 0,
20642        0x0                 },        /* POOL32Sxf_4~*(79) */
20643     { reserved_block      , 0                   , 0   , 32,
20644        0xfc00ffff, 0xc000a13c, 0                      , 0,
20645        0x0                 },        /* POOL32Sxf_4~*(80) */
20646     { reserved_block      , 0                   , 0   , 32,
20647        0xfc00ffff, 0xc000a33c, 0                      , 0,
20648        0x0                 },        /* POOL32Sxf_4~*(81) */
20649     { reserved_block      , 0                   , 0   , 32,
20650        0xfc00ffff, 0xc000a53c, 0                      , 0,
20651        0x0                 },        /* POOL32Sxf_4~*(82) */
20652     { reserved_block      , 0                   , 0   , 32,
20653        0xfc00ffff, 0xc000a73c, 0                      , 0,
20654        0x0                 },        /* POOL32Sxf_4~*(83) */
20655     { reserved_block      , 0                   , 0   , 32,
20656        0xfc00ffff, 0xc000a93c, 0                      , 0,
20657        0x0                 },        /* POOL32Sxf_4~*(84) */
20658     { reserved_block      , 0                   , 0   , 32,
20659        0xfc00ffff, 0xc000ab3c, 0                      , 0,
20660        0x0                 },        /* POOL32Sxf_4~*(85) */
20661     { reserved_block      , 0                   , 0   , 32,
20662        0xfc00ffff, 0xc000ad3c, 0                      , 0,
20663        0x0                 },        /* POOL32Sxf_4~*(86) */
20664     { reserved_block      , 0                   , 0   , 32,
20665        0xfc00ffff, 0xc000af3c, 0                      , 0,
20666        0x0                 },        /* POOL32Sxf_4~*(87) */
20667     { reserved_block      , 0                   , 0   , 32,
20668        0xfc00ffff, 0xc000b13c, 0                      , 0,
20669        0x0                 },        /* POOL32Sxf_4~*(88) */
20670     { reserved_block      , 0                   , 0   , 32,
20671        0xfc00ffff, 0xc000b33c, 0                      , 0,
20672        0x0                 },        /* POOL32Sxf_4~*(89) */
20673     { reserved_block      , 0                   , 0   , 32,
20674        0xfc00ffff, 0xc000b53c, 0                      , 0,
20675        0x0                 },        /* POOL32Sxf_4~*(90) */
20676     { reserved_block      , 0                   , 0   , 32,
20677        0xfc00ffff, 0xc000b73c, 0                      , 0,
20678        0x0                 },        /* POOL32Sxf_4~*(91) */
20679     { reserved_block      , 0                   , 0   , 32,
20680        0xfc00ffff, 0xc000b93c, 0                      , 0,
20681        0x0                 },        /* POOL32Sxf_4~*(92) */
20682     { reserved_block      , 0                   , 0   , 32,
20683        0xfc00ffff, 0xc000bb3c, 0                      , 0,
20684        0x0                 },        /* POOL32Sxf_4~*(93) */
20685     { reserved_block      , 0                   , 0   , 32,
20686        0xfc00ffff, 0xc000bd3c, 0                      , 0,
20687        0x0                 },        /* POOL32Sxf_4~*(94) */
20688     { reserved_block      , 0                   , 0   , 32,
20689        0xfc00ffff, 0xc000bf3c, 0                      , 0,
20690        0x0                 },        /* POOL32Sxf_4~*(95) */
20691     { reserved_block      , 0                   , 0   , 32,
20692        0xfc00ffff, 0xc000c13c, 0                      , 0,
20693        0x0                 },        /* POOL32Sxf_4~*(96) */
20694     { reserved_block      , 0                   , 0   , 32,
20695        0xfc00ffff, 0xc000c33c, 0                      , 0,
20696        0x0                 },        /* POOL32Sxf_4~*(97) */
20697     { reserved_block      , 0                   , 0   , 32,
20698        0xfc00ffff, 0xc000c53c, 0                      , 0,
20699        0x0                 },        /* POOL32Sxf_4~*(98) */
20700     { reserved_block      , 0                   , 0   , 32,
20701        0xfc00ffff, 0xc000c73c, 0                      , 0,
20702        0x0                 },        /* POOL32Sxf_4~*(99) */
20703     { reserved_block      , 0                   , 0   , 32,
20704        0xfc00ffff, 0xc000c93c, 0                      , 0,
20705        0x0                 },        /* POOL32Sxf_4~*(100) */
20706     { reserved_block      , 0                   , 0   , 32,
20707        0xfc00ffff, 0xc000cb3c, 0                      , 0,
20708        0x0                 },        /* POOL32Sxf_4~*(101) */
20709     { reserved_block      , 0                   , 0   , 32,
20710        0xfc00ffff, 0xc000cd3c, 0                      , 0,
20711        0x0                 },        /* POOL32Sxf_4~*(102) */
20712     { reserved_block      , 0                   , 0   , 32,
20713        0xfc00ffff, 0xc000cf3c, 0                      , 0,
20714        0x0                 },        /* POOL32Sxf_4~*(103) */
20715     { reserved_block      , 0                   , 0   , 32,
20716        0xfc00ffff, 0xc000d13c, 0                      , 0,
20717        0x0                 },        /* POOL32Sxf_4~*(104) */
20718     { reserved_block      , 0                   , 0   , 32,
20719        0xfc00ffff, 0xc000d33c, 0                      , 0,
20720        0x0                 },        /* POOL32Sxf_4~*(105) */
20721     { reserved_block      , 0                   , 0   , 32,
20722        0xfc00ffff, 0xc000d53c, 0                      , 0,
20723        0x0                 },        /* POOL32Sxf_4~*(106) */
20724     { reserved_block      , 0                   , 0   , 32,
20725        0xfc00ffff, 0xc000d73c, 0                      , 0,
20726        0x0                 },        /* POOL32Sxf_4~*(107) */
20727     { reserved_block      , 0                   , 0   , 32,
20728        0xfc00ffff, 0xc000d93c, 0                      , 0,
20729        0x0                 },        /* POOL32Sxf_4~*(108) */
20730     { reserved_block      , 0                   , 0   , 32,
20731        0xfc00ffff, 0xc000db3c, 0                      , 0,
20732        0x0                 },        /* POOL32Sxf_4~*(109) */
20733     { reserved_block      , 0                   , 0   , 32,
20734        0xfc00ffff, 0xc000dd3c, 0                      , 0,
20735        0x0                 },        /* POOL32Sxf_4~*(110) */
20736     { reserved_block      , 0                   , 0   , 32,
20737        0xfc00ffff, 0xc000df3c, 0                      , 0,
20738        0x0                 },        /* POOL32Sxf_4~*(111) */
20739     { reserved_block      , 0                   , 0   , 32,
20740        0xfc00ffff, 0xc000e13c, 0                      , 0,
20741        0x0                 },        /* POOL32Sxf_4~*(112) */
20742     { reserved_block      , 0                   , 0   , 32,
20743        0xfc00ffff, 0xc000e33c, 0                      , 0,
20744        0x0                 },        /* POOL32Sxf_4~*(113) */
20745     { reserved_block      , 0                   , 0   , 32,
20746        0xfc00ffff, 0xc000e53c, 0                      , 0,
20747        0x0                 },        /* POOL32Sxf_4~*(114) */
20748     { reserved_block      , 0                   , 0   , 32,
20749        0xfc00ffff, 0xc000e73c, 0                      , 0,
20750        0x0                 },        /* POOL32Sxf_4~*(115) */
20751     { reserved_block      , 0                   , 0   , 32,
20752        0xfc00ffff, 0xc000e93c, 0                      , 0,
20753        0x0                 },        /* POOL32Sxf_4~*(116) */
20754     { reserved_block      , 0                   , 0   , 32,
20755        0xfc00ffff, 0xc000eb3c, 0                      , 0,
20756        0x0                 },        /* POOL32Sxf_4~*(117) */
20757     { reserved_block      , 0                   , 0   , 32,
20758        0xfc00ffff, 0xc000ed3c, 0                      , 0,
20759        0x0                 },        /* POOL32Sxf_4~*(118) */
20760     { reserved_block      , 0                   , 0   , 32,
20761        0xfc00ffff, 0xc000ef3c, 0                      , 0,
20762        0x0                 },        /* POOL32Sxf_4~*(119) */
20763     { reserved_block      , 0                   , 0   , 32,
20764        0xfc00ffff, 0xc000f13c, 0                      , 0,
20765        0x0                 },        /* POOL32Sxf_4~*(120) */
20766     { reserved_block      , 0                   , 0   , 32,
20767        0xfc00ffff, 0xc000f33c, 0                      , 0,
20768        0x0                 },        /* POOL32Sxf_4~*(121) */
20769     { reserved_block      , 0                   , 0   , 32,
20770        0xfc00ffff, 0xc000f53c, 0                      , 0,
20771        0x0                 },        /* POOL32Sxf_4~*(122) */
20772     { reserved_block      , 0                   , 0   , 32,
20773        0xfc00ffff, 0xc000f73c, 0                      , 0,
20774        0x0                 },        /* POOL32Sxf_4~*(123) */
20775     { reserved_block      , 0                   , 0   , 32,
20776        0xfc00ffff, 0xc000f93c, 0                      , 0,
20777        0x0                 },        /* POOL32Sxf_4~*(124) */
20778     { reserved_block      , 0                   , 0   , 32,
20779        0xfc00ffff, 0xc000fb3c, 0                      , 0,
20780        0x0                 },        /* POOL32Sxf_4~*(125) */
20781     { reserved_block      , 0                   , 0   , 32,
20782        0xfc00ffff, 0xc000fd3c, 0                      , 0,
20783        0x0                 },        /* POOL32Sxf_4~*(126) */
20784     { reserved_block      , 0                   , 0   , 32,
20785        0xfc00ffff, 0xc000ff3c, 0                      , 0,
20786        0x0                 },        /* POOL32Sxf_4~*(127) */
20787 };
20788
20789
20790 NMD::Pool NMD::POOL32Sxf[8] = {
20791     { reserved_block      , 0                   , 0   , 32,
20792        0xfc0001ff, 0xc000003c, 0                      , 0,
20793        0x0                 },        /* POOL32Sxf~*(0) */
20794     { reserved_block      , 0                   , 0   , 32,
20795        0xfc0001ff, 0xc000007c, 0                      , 0,
20796        0x0                 },        /* POOL32Sxf~*(1) */
20797     { reserved_block      , 0                   , 0   , 32,
20798        0xfc0001ff, 0xc00000bc, 0                      , 0,
20799        0x0                 },        /* POOL32Sxf~*(2) */
20800     { reserved_block      , 0                   , 0   , 32,
20801        0xfc0001ff, 0xc00000fc, 0                      , 0,
20802        0x0                 },        /* POOL32Sxf~*(3) */
20803     { pool                , POOL32Sxf_4         , 128 , 32,
20804        0xfc0001ff, 0xc000013c, 0                      , 0,
20805        0x0                 },        /* POOL32Sxf_4 */
20806     { reserved_block      , 0                   , 0   , 32,
20807        0xfc0001ff, 0xc000017c, 0                      , 0,
20808        0x0                 },        /* POOL32Sxf~*(5) */
20809     { reserved_block      , 0                   , 0   , 32,
20810        0xfc0001ff, 0xc00001bc, 0                      , 0,
20811        0x0                 },        /* POOL32Sxf~*(6) */
20812     { reserved_block      , 0                   , 0   , 32,
20813        0xfc0001ff, 0xc00001fc, 0                      , 0,
20814        0x0                 },        /* POOL32Sxf~*(7) */
20815 };
20816
20817
20818 NMD::Pool NMD::POOL32S_4[8] = {
20819     { instruction         , 0                   , 0   , 32,
20820        0xfc00003f, 0xc0000004, &NMD::EXTD             , 0,
20821        MIPS64_             },        /* EXTD */
20822     { instruction         , 0                   , 0   , 32,
20823        0xfc00003f, 0xc000000c, &NMD::EXTD32           , 0,
20824        MIPS64_             },        /* EXTD32 */
20825     { reserved_block      , 0                   , 0   , 32,
20826        0xfc00003f, 0xc0000014, 0                      , 0,
20827        0x0                 },        /* POOL32S_4~*(2) */
20828     { reserved_block      , 0                   , 0   , 32,
20829        0xfc00003f, 0xc000001c, 0                      , 0,
20830        0x0                 },        /* POOL32S_4~*(3) */
20831     { reserved_block      , 0                   , 0   , 32,
20832        0xfc00003f, 0xc0000024, 0                      , 0,
20833        0x0                 },        /* POOL32S_4~*(4) */
20834     { reserved_block      , 0                   , 0   , 32,
20835        0xfc00003f, 0xc000002c, 0                      , 0,
20836        0x0                 },        /* POOL32S_4~*(5) */
20837     { reserved_block      , 0                   , 0   , 32,
20838        0xfc00003f, 0xc0000034, 0                      , 0,
20839        0x0                 },        /* POOL32S_4~*(6) */
20840     { pool                , POOL32Sxf           , 8   , 32,
20841        0xfc00003f, 0xc000003c, 0                      , 0,
20842        0x0                 },        /* POOL32Sxf */
20843 };
20844
20845
20846 NMD::Pool NMD::POOL32S[8] = {
20847     { pool                , POOL32S_0           , 64  , 32,
20848        0xfc000007, 0xc0000000, 0                      , 0,
20849        0x0                 },        /* POOL32S_0 */
20850     { reserved_block      , 0                   , 0   , 32,
20851        0xfc000007, 0xc0000001, 0                      , 0,
20852        0x0                 },        /* POOL32S~*(1) */
20853     { reserved_block      , 0                   , 0   , 32,
20854        0xfc000007, 0xc0000002, 0                      , 0,
20855        0x0                 },        /* POOL32S~*(2) */
20856     { reserved_block      , 0                   , 0   , 32,
20857        0xfc000007, 0xc0000003, 0                      , 0,
20858        0x0                 },        /* POOL32S~*(3) */
20859     { pool                , POOL32S_4           , 8   , 32,
20860        0xfc000007, 0xc0000004, 0                      , 0,
20861        0x0                 },        /* POOL32S_4 */
20862     { reserved_block      , 0                   , 0   , 32,
20863        0xfc000007, 0xc0000005, 0                      , 0,
20864        0x0                 },        /* POOL32S~*(5) */
20865     { reserved_block      , 0                   , 0   , 32,
20866        0xfc000007, 0xc0000006, 0                      , 0,
20867        0x0                 },        /* POOL32S~*(6) */
20868     { reserved_block      , 0                   , 0   , 32,
20869        0xfc000007, 0xc0000007, 0                      , 0,
20870        0x0                 },        /* POOL32S~*(7) */
20871 };
20872
20873
20874 NMD::Pool NMD::P_LUI[2] = {
20875     { instruction         , 0                   , 0   , 32,
20876        0xfc000002, 0xe0000000, &NMD::LUI              , 0,
20877        0x0                 },        /* LUI */
20878     { instruction         , 0                   , 0   , 32,
20879        0xfc000002, 0xe0000002, &NMD::ALUIPC           , 0,
20880        0x0                 },        /* ALUIPC */
20881 };
20882
20883
20884 NMD::Pool NMD::P_GP_LH[2] = {
20885     { instruction         , 0                   , 0   , 32,
20886        0xfc1c0001, 0x44100000, &NMD::LH_GP_           , 0,
20887        0x0                 },        /* LH[GP] */
20888     { instruction         , 0                   , 0   , 32,
20889        0xfc1c0001, 0x44100001, &NMD::LHU_GP_          , 0,
20890        0x0                 },        /* LHU[GP] */
20891 };
20892
20893
20894 NMD::Pool NMD::P_GP_SH[2] = {
20895     { instruction         , 0                   , 0   , 32,
20896        0xfc1c0001, 0x44140000, &NMD::SH_GP_           , 0,
20897        0x0                 },        /* SH[GP] */
20898     { reserved_block      , 0                   , 0   , 32,
20899        0xfc1c0001, 0x44140001, 0                      , 0,
20900        0x0                 },        /* P.GP.SH~*(1) */
20901 };
20902
20903
20904 NMD::Pool NMD::P_GP_CP1[4] = {
20905     { instruction         , 0                   , 0   , 32,
20906        0xfc1c0003, 0x44180000, &NMD::LWC1_GP_         , 0,
20907        CP1_                },        /* LWC1[GP] */
20908     { instruction         , 0                   , 0   , 32,
20909        0xfc1c0003, 0x44180001, &NMD::SWC1_GP_         , 0,
20910        CP1_                },        /* SWC1[GP] */
20911     { instruction         , 0                   , 0   , 32,
20912        0xfc1c0003, 0x44180002, &NMD::LDC1_GP_         , 0,
20913        CP1_                },        /* LDC1[GP] */
20914     { instruction         , 0                   , 0   , 32,
20915        0xfc1c0003, 0x44180003, &NMD::SDC1_GP_         , 0,
20916        CP1_                },        /* SDC1[GP] */
20917 };
20918
20919
20920 NMD::Pool NMD::P_GP_M64[4] = {
20921     { instruction         , 0                   , 0   , 32,
20922        0xfc1c0003, 0x441c0000, &NMD::LWU_GP_          , 0,
20923        MIPS64_             },        /* LWU[GP] */
20924     { reserved_block      , 0                   , 0   , 32,
20925        0xfc1c0003, 0x441c0001, 0                      , 0,
20926        0x0                 },        /* P.GP.M64~*(1) */
20927     { reserved_block      , 0                   , 0   , 32,
20928        0xfc1c0003, 0x441c0002, 0                      , 0,
20929        0x0                 },        /* P.GP.M64~*(2) */
20930     { reserved_block      , 0                   , 0   , 32,
20931        0xfc1c0003, 0x441c0003, 0                      , 0,
20932        0x0                 },        /* P.GP.M64~*(3) */
20933 };
20934
20935
20936 NMD::Pool NMD::P_GP_BH[8] = {
20937     { instruction         , 0                   , 0   , 32,
20938        0xfc1c0000, 0x44000000, &NMD::LB_GP_           , 0,
20939        0x0                 },        /* LB[GP] */
20940     { instruction         , 0                   , 0   , 32,
20941        0xfc1c0000, 0x44040000, &NMD::SB_GP_           , 0,
20942        0x0                 },        /* SB[GP] */
20943     { instruction         , 0                   , 0   , 32,
20944        0xfc1c0000, 0x44080000, &NMD::LBU_GP_          , 0,
20945        0x0                 },        /* LBU[GP] */
20946     { instruction         , 0                   , 0   , 32,
20947        0xfc1c0000, 0x440c0000, &NMD::ADDIU_GP_B_      , 0,
20948        0x0                 },        /* ADDIU[GP.B] */
20949     { pool                , P_GP_LH             , 2   , 32,
20950        0xfc1c0000, 0x44100000, 0                      , 0,
20951        0x0                 },        /* P.GP.LH */
20952     { pool                , P_GP_SH             , 2   , 32,
20953        0xfc1c0000, 0x44140000, 0                      , 0,
20954        0x0                 },        /* P.GP.SH */
20955     { pool                , P_GP_CP1            , 4   , 32,
20956        0xfc1c0000, 0x44180000, 0                      , 0,
20957        0x0                 },        /* P.GP.CP1 */
20958     { pool                , P_GP_M64            , 4   , 32,
20959        0xfc1c0000, 0x441c0000, 0                      , 0,
20960        0x0                 },        /* P.GP.M64 */
20961 };
20962
20963
20964 NMD::Pool NMD::P_LS_U12[16] = {
20965     { instruction         , 0                   , 0   , 32,
20966        0xfc00f000, 0x84000000, &NMD::LB_U12_          , 0,
20967        0x0                 },        /* LB[U12] */
20968     { instruction         , 0                   , 0   , 32,
20969        0xfc00f000, 0x84001000, &NMD::SB_U12_          , 0,
20970        0x0                 },        /* SB[U12] */
20971     { instruction         , 0                   , 0   , 32,
20972        0xfc00f000, 0x84002000, &NMD::LBU_U12_         , 0,
20973        0x0                 },        /* LBU[U12] */
20974     { instruction         , 0                   , 0   , 32,
20975        0xfc00f000, 0x84003000, &NMD::PREF_U12_        , 0,
20976        0x0                 },        /* PREF[U12] */
20977     { instruction         , 0                   , 0   , 32,
20978        0xfc00f000, 0x84004000, &NMD::LH_U12_          , 0,
20979        0x0                 },        /* LH[U12] */
20980     { instruction         , 0                   , 0   , 32,
20981        0xfc00f000, 0x84005000, &NMD::SH_U12_          , 0,
20982        0x0                 },        /* SH[U12] */
20983     { instruction         , 0                   , 0   , 32,
20984        0xfc00f000, 0x84006000, &NMD::LHU_U12_         , 0,
20985        0x0                 },        /* LHU[U12] */
20986     { instruction         , 0                   , 0   , 32,
20987        0xfc00f000, 0x84007000, &NMD::LWU_U12_         , 0,
20988        MIPS64_             },        /* LWU[U12] */
20989     { instruction         , 0                   , 0   , 32,
20990        0xfc00f000, 0x84008000, &NMD::LW_U12_          , 0,
20991        0x0                 },        /* LW[U12] */
20992     { instruction         , 0                   , 0   , 32,
20993        0xfc00f000, 0x84009000, &NMD::SW_U12_          , 0,
20994        0x0                 },        /* SW[U12] */
20995     { instruction         , 0                   , 0   , 32,
20996        0xfc00f000, 0x8400a000, &NMD::LWC1_U12_        , 0,
20997        CP1_                },        /* LWC1[U12] */
20998     { instruction         , 0                   , 0   , 32,
20999        0xfc00f000, 0x8400b000, &NMD::SWC1_U12_        , 0,
21000        CP1_                },        /* SWC1[U12] */
21001     { instruction         , 0                   , 0   , 32,
21002        0xfc00f000, 0x8400c000, &NMD::LD_U12_          , 0,
21003        MIPS64_             },        /* LD[U12] */
21004     { instruction         , 0                   , 0   , 32,
21005        0xfc00f000, 0x8400d000, &NMD::SD_U12_          , 0,
21006        MIPS64_             },        /* SD[U12] */
21007     { instruction         , 0                   , 0   , 32,
21008        0xfc00f000, 0x8400e000, &NMD::LDC1_U12_        , 0,
21009        CP1_                },        /* LDC1[U12] */
21010     { instruction         , 0                   , 0   , 32,
21011        0xfc00f000, 0x8400f000, &NMD::SDC1_U12_        , 0,
21012        CP1_                },        /* SDC1[U12] */
21013 };
21014
21015
21016 NMD::Pool NMD::P_PREF_S9_[2] = {
21017     { instruction         , 0                   , 0   , 32,
21018        0xffe07f00, 0xa7e01800, &NMD::SYNCI            , 0,
21019        0x0                 },        /* SYNCI */
21020     { instruction         , 0                   , 0   , 32,
21021        0xfc007f00, 0xa4001800, &NMD::PREF_S9_         , &NMD::PREF_S9__cond    ,
21022        0x0                 },        /* PREF[S9] */
21023 };
21024
21025
21026 NMD::Pool NMD::P_LS_S0[16] = {
21027     { instruction         , 0                   , 0   , 32,
21028        0xfc007f00, 0xa4000000, &NMD::LB_S9_           , 0,
21029        0x0                 },        /* LB[S9] */
21030     { instruction         , 0                   , 0   , 32,
21031        0xfc007f00, 0xa4000800, &NMD::SB_S9_           , 0,
21032        0x0                 },        /* SB[S9] */
21033     { instruction         , 0                   , 0   , 32,
21034        0xfc007f00, 0xa4001000, &NMD::LBU_S9_          , 0,
21035        0x0                 },        /* LBU[S9] */
21036     { pool                , P_PREF_S9_          , 2   , 32,
21037        0xfc007f00, 0xa4001800, 0                      , 0,
21038        0x0                 },        /* P.PREF[S9] */
21039     { instruction         , 0                   , 0   , 32,
21040        0xfc007f00, 0xa4002000, &NMD::LH_S9_           , 0,
21041        0x0                 },        /* LH[S9] */
21042     { instruction         , 0                   , 0   , 32,
21043        0xfc007f00, 0xa4002800, &NMD::SH_S9_           , 0,
21044        0x0                 },        /* SH[S9] */
21045     { instruction         , 0                   , 0   , 32,
21046        0xfc007f00, 0xa4003000, &NMD::LHU_S9_          , 0,
21047        0x0                 },        /* LHU[S9] */
21048     { instruction         , 0                   , 0   , 32,
21049        0xfc007f00, 0xa4003800, &NMD::LWU_S9_          , 0,
21050        MIPS64_             },        /* LWU[S9] */
21051     { instruction         , 0                   , 0   , 32,
21052        0xfc007f00, 0xa4004000, &NMD::LW_S9_           , 0,
21053        0x0                 },        /* LW[S9] */
21054     { instruction         , 0                   , 0   , 32,
21055        0xfc007f00, 0xa4004800, &NMD::SW_S9_           , 0,
21056        0x0                 },        /* SW[S9] */
21057     { instruction         , 0                   , 0   , 32,
21058        0xfc007f00, 0xa4005000, &NMD::LWC1_S9_         , 0,
21059        CP1_                },        /* LWC1[S9] */
21060     { instruction         , 0                   , 0   , 32,
21061        0xfc007f00, 0xa4005800, &NMD::SWC1_S9_         , 0,
21062        CP1_                },        /* SWC1[S9] */
21063     { instruction         , 0                   , 0   , 32,
21064        0xfc007f00, 0xa4006000, &NMD::LD_S9_           , 0,
21065        MIPS64_             },        /* LD[S9] */
21066     { instruction         , 0                   , 0   , 32,
21067        0xfc007f00, 0xa4006800, &NMD::SD_S9_           , 0,
21068        MIPS64_             },        /* SD[S9] */
21069     { instruction         , 0                   , 0   , 32,
21070        0xfc007f00, 0xa4007000, &NMD::LDC1_S9_         , 0,
21071        CP1_                },        /* LDC1[S9] */
21072     { instruction         , 0                   , 0   , 32,
21073        0xfc007f00, 0xa4007800, &NMD::SDC1_S9_         , 0,
21074        CP1_                },        /* SDC1[S9] */
21075 };
21076
21077
21078 NMD::Pool NMD::ASET_ACLR[2] = {
21079     { instruction         , 0                   , 0   , 32,
21080        0xfe007f00, 0xa4001100, &NMD::ASET             , 0,
21081        MCU_                },        /* ASET */
21082     { instruction         , 0                   , 0   , 32,
21083        0xfe007f00, 0xa6001100, &NMD::ACLR             , 0,
21084        MCU_                },        /* ACLR */
21085 };
21086
21087
21088 NMD::Pool NMD::P_LL[4] = {
21089     { instruction         , 0                   , 0   , 32,
21090        0xfc007f03, 0xa4005100, &NMD::LL               , 0,
21091        0x0                 },        /* LL */
21092     { instruction         , 0                   , 0   , 32,
21093        0xfc007f03, 0xa4005101, &NMD::LLWP             , 0,
21094        XNP_                },        /* LLWP */
21095     { reserved_block      , 0                   , 0   , 32,
21096        0xfc007f03, 0xa4005102, 0                      , 0,
21097        0x0                 },        /* P.LL~*(2) */
21098     { reserved_block      , 0                   , 0   , 32,
21099        0xfc007f03, 0xa4005103, 0                      , 0,
21100        0x0                 },        /* P.LL~*(3) */
21101 };
21102
21103
21104 NMD::Pool NMD::P_SC[4] = {
21105     { instruction         , 0                   , 0   , 32,
21106        0xfc007f03, 0xa4005900, &NMD::SC               , 0,
21107        0x0                 },        /* SC */
21108     { instruction         , 0                   , 0   , 32,
21109        0xfc007f03, 0xa4005901, &NMD::SCWP             , 0,
21110        XNP_                },        /* SCWP */
21111     { reserved_block      , 0                   , 0   , 32,
21112        0xfc007f03, 0xa4005902, 0                      , 0,
21113        0x0                 },        /* P.SC~*(2) */
21114     { reserved_block      , 0                   , 0   , 32,
21115        0xfc007f03, 0xa4005903, 0                      , 0,
21116        0x0                 },        /* P.SC~*(3) */
21117 };
21118
21119
21120 NMD::Pool NMD::P_LLD[8] = {
21121     { instruction         , 0                   , 0   , 32,
21122        0xfc007f07, 0xa4007100, &NMD::LLD              , 0,
21123        MIPS64_             },        /* LLD */
21124     { instruction         , 0                   , 0   , 32,
21125        0xfc007f07, 0xa4007101, &NMD::LLDP             , 0,
21126        MIPS64_             },        /* LLDP */
21127     { reserved_block      , 0                   , 0   , 32,
21128        0xfc007f07, 0xa4007102, 0                      , 0,
21129        0x0                 },        /* P.LLD~*(2) */
21130     { reserved_block      , 0                   , 0   , 32,
21131        0xfc007f07, 0xa4007103, 0                      , 0,
21132        0x0                 },        /* P.LLD~*(3) */
21133     { reserved_block      , 0                   , 0   , 32,
21134        0xfc007f07, 0xa4007104, 0                      , 0,
21135        0x0                 },        /* P.LLD~*(4) */
21136     { reserved_block      , 0                   , 0   , 32,
21137        0xfc007f07, 0xa4007105, 0                      , 0,
21138        0x0                 },        /* P.LLD~*(5) */
21139     { reserved_block      , 0                   , 0   , 32,
21140        0xfc007f07, 0xa4007106, 0                      , 0,
21141        0x0                 },        /* P.LLD~*(6) */
21142     { reserved_block      , 0                   , 0   , 32,
21143        0xfc007f07, 0xa4007107, 0                      , 0,
21144        0x0                 },        /* P.LLD~*(7) */
21145 };
21146
21147
21148 NMD::Pool NMD::P_SCD[8] = {
21149     { instruction         , 0                   , 0   , 32,
21150        0xfc007f07, 0xa4007900, &NMD::SCD              , 0,
21151        MIPS64_             },        /* SCD */
21152     { instruction         , 0                   , 0   , 32,
21153        0xfc007f07, 0xa4007901, &NMD::SCDP             , 0,
21154        MIPS64_             },        /* SCDP */
21155     { reserved_block      , 0                   , 0   , 32,
21156        0xfc007f07, 0xa4007902, 0                      , 0,
21157        0x0                 },        /* P.SCD~*(2) */
21158     { reserved_block      , 0                   , 0   , 32,
21159        0xfc007f07, 0xa4007903, 0                      , 0,
21160        0x0                 },        /* P.SCD~*(3) */
21161     { reserved_block      , 0                   , 0   , 32,
21162        0xfc007f07, 0xa4007904, 0                      , 0,
21163        0x0                 },        /* P.SCD~*(4) */
21164     { reserved_block      , 0                   , 0   , 32,
21165        0xfc007f07, 0xa4007905, 0                      , 0,
21166        0x0                 },        /* P.SCD~*(5) */
21167     { reserved_block      , 0                   , 0   , 32,
21168        0xfc007f07, 0xa4007906, 0                      , 0,
21169        0x0                 },        /* P.SCD~*(6) */
21170     { reserved_block      , 0                   , 0   , 32,
21171        0xfc007f07, 0xa4007907, 0                      , 0,
21172        0x0                 },        /* P.SCD~*(7) */
21173 };
21174
21175
21176 NMD::Pool NMD::P_LS_S1[16] = {
21177     { reserved_block      , 0                   , 0   , 32,
21178        0xfc007f00, 0xa4000100, 0                      , 0,
21179        0x0                 },        /* P.LS.S1~*(0) */
21180     { reserved_block      , 0                   , 0   , 32,
21181        0xfc007f00, 0xa4000900, 0                      , 0,
21182        0x0                 },        /* P.LS.S1~*(1) */
21183     { pool                , ASET_ACLR           , 2   , 32,
21184        0xfc007f00, 0xa4001100, 0                      , 0,
21185        0x0                 },        /* ASET_ACLR */
21186     { reserved_block      , 0                   , 0   , 32,
21187        0xfc007f00, 0xa4001900, 0                      , 0,
21188        0x0                 },        /* P.LS.S1~*(3) */
21189     { instruction         , 0                   , 0   , 32,
21190        0xfc007f00, 0xa4002100, &NMD::UALH             , 0,
21191        XMMS_               },        /* UALH */
21192     { instruction         , 0                   , 0   , 32,
21193        0xfc007f00, 0xa4002900, &NMD::UASH             , 0,
21194        XMMS_               },        /* UASH */
21195     { reserved_block      , 0                   , 0   , 32,
21196        0xfc007f00, 0xa4003100, 0                      , 0,
21197        0x0                 },        /* P.LS.S1~*(6) */
21198     { instruction         , 0                   , 0   , 32,
21199        0xfc007f00, 0xa4003900, &NMD::CACHE            , 0,
21200        CP0_                },        /* CACHE */
21201     { instruction         , 0                   , 0   , 32,
21202        0xfc007f00, 0xa4004100, &NMD::LWC2             , 0,
21203        CP2_                },        /* LWC2 */
21204     { instruction         , 0                   , 0   , 32,
21205        0xfc007f00, 0xa4004900, &NMD::SWC2             , 0,
21206        CP2_                },        /* SWC2 */
21207     { pool                , P_LL                , 4   , 32,
21208        0xfc007f00, 0xa4005100, 0                      , 0,
21209        0x0                 },        /* P.LL */
21210     { pool                , P_SC                , 4   , 32,
21211        0xfc007f00, 0xa4005900, 0                      , 0,
21212        0x0                 },        /* P.SC */
21213     { instruction         , 0                   , 0   , 32,
21214        0xfc007f00, 0xa4006100, &NMD::LDC2             , 0,
21215        CP2_                },        /* LDC2 */
21216     { instruction         , 0                   , 0   , 32,
21217        0xfc007f00, 0xa4006900, &NMD::SDC2             , 0,
21218        CP2_                },        /* SDC2 */
21219     { pool                , P_LLD               , 8   , 32,
21220        0xfc007f00, 0xa4007100, 0                      , 0,
21221        0x0                 },        /* P.LLD */
21222     { pool                , P_SCD               , 8   , 32,
21223        0xfc007f00, 0xa4007900, 0                      , 0,
21224        0x0                 },        /* P.SCD */
21225 };
21226
21227
21228 NMD::Pool NMD::P_PREFE[2] = {
21229     { instruction         , 0                   , 0   , 32,
21230        0xffe07f00, 0xa7e01a00, &NMD::SYNCIE           , 0,
21231        CP0_ | EVA_         },        /* SYNCIE */
21232     { instruction         , 0                   , 0   , 32,
21233        0xfc007f00, 0xa4001a00, &NMD::PREFE            , &NMD::PREFE_cond       ,
21234        CP0_ | EVA_         },        /* PREFE */
21235 };
21236
21237
21238 NMD::Pool NMD::P_LLE[4] = {
21239     { instruction         , 0                   , 0   , 32,
21240        0xfc007f03, 0xa4005200, &NMD::LLE              , 0,
21241        CP0_ | EVA_         },        /* LLE */
21242     { instruction         , 0                   , 0   , 32,
21243        0xfc007f03, 0xa4005201, &NMD::LLWPE            , 0,
21244        CP0_ | EVA_         },        /* LLWPE */
21245     { reserved_block      , 0                   , 0   , 32,
21246        0xfc007f03, 0xa4005202, 0                      , 0,
21247        0x0                 },        /* P.LLE~*(2) */
21248     { reserved_block      , 0                   , 0   , 32,
21249        0xfc007f03, 0xa4005203, 0                      , 0,
21250        0x0                 },        /* P.LLE~*(3) */
21251 };
21252
21253
21254 NMD::Pool NMD::P_SCE[4] = {
21255     { instruction         , 0                   , 0   , 32,
21256        0xfc007f03, 0xa4005a00, &NMD::SCE              , 0,
21257        CP0_ | EVA_         },        /* SCE */
21258     { instruction         , 0                   , 0   , 32,
21259        0xfc007f03, 0xa4005a01, &NMD::SCWPE            , 0,
21260        CP0_ | EVA_         },        /* SCWPE */
21261     { reserved_block      , 0                   , 0   , 32,
21262        0xfc007f03, 0xa4005a02, 0                      , 0,
21263        0x0                 },        /* P.SCE~*(2) */
21264     { reserved_block      , 0                   , 0   , 32,
21265        0xfc007f03, 0xa4005a03, 0                      , 0,
21266        0x0                 },        /* P.SCE~*(3) */
21267 };
21268
21269
21270 NMD::Pool NMD::P_LS_E0[16] = {
21271     { instruction         , 0                   , 0   , 32,
21272        0xfc007f00, 0xa4000200, &NMD::LBE              , 0,
21273        CP0_ | EVA_         },        /* LBE */
21274     { instruction         , 0                   , 0   , 32,
21275        0xfc007f00, 0xa4000a00, &NMD::SBE              , 0,
21276        CP0_ | EVA_         },        /* SBE */
21277     { instruction         , 0                   , 0   , 32,
21278        0xfc007f00, 0xa4001200, &NMD::LBUE             , 0,
21279        CP0_ | EVA_         },        /* LBUE */
21280     { pool                , P_PREFE             , 2   , 32,
21281        0xfc007f00, 0xa4001a00, 0                      , 0,
21282        0x0                 },        /* P.PREFE */
21283     { instruction         , 0                   , 0   , 32,
21284        0xfc007f00, 0xa4002200, &NMD::LHE              , 0,
21285        CP0_ | EVA_         },        /* LHE */
21286     { instruction         , 0                   , 0   , 32,
21287        0xfc007f00, 0xa4002a00, &NMD::SHE              , 0,
21288        CP0_ | EVA_         },        /* SHE */
21289     { instruction         , 0                   , 0   , 32,
21290        0xfc007f00, 0xa4003200, &NMD::LHUE             , 0,
21291        CP0_ | EVA_         },        /* LHUE */
21292     { instruction         , 0                   , 0   , 32,
21293        0xfc007f00, 0xa4003a00, &NMD::CACHEE           , 0,
21294        CP0_ | EVA_         },        /* CACHEE */
21295     { instruction         , 0                   , 0   , 32,
21296        0xfc007f00, 0xa4004200, &NMD::LWE              , 0,
21297        CP0_ | EVA_         },        /* LWE */
21298     { instruction         , 0                   , 0   , 32,
21299        0xfc007f00, 0xa4004a00, &NMD::SWE              , 0,
21300        CP0_ | EVA_         },        /* SWE */
21301     { pool                , P_LLE               , 4   , 32,
21302        0xfc007f00, 0xa4005200, 0                      , 0,
21303        0x0                 },        /* P.LLE */
21304     { pool                , P_SCE               , 4   , 32,
21305        0xfc007f00, 0xa4005a00, 0                      , 0,
21306        0x0                 },        /* P.SCE */
21307     { reserved_block      , 0                   , 0   , 32,
21308        0xfc007f00, 0xa4006200, 0                      , 0,
21309        0x0                 },        /* P.LS.E0~*(12) */
21310     { reserved_block      , 0                   , 0   , 32,
21311        0xfc007f00, 0xa4006a00, 0                      , 0,
21312        0x0                 },        /* P.LS.E0~*(13) */
21313     { reserved_block      , 0                   , 0   , 32,
21314        0xfc007f00, 0xa4007200, 0                      , 0,
21315        0x0                 },        /* P.LS.E0~*(14) */
21316     { reserved_block      , 0                   , 0   , 32,
21317        0xfc007f00, 0xa4007a00, 0                      , 0,
21318        0x0                 },        /* P.LS.E0~*(15) */
21319 };
21320
21321
21322 NMD::Pool NMD::P_LS_WM[2] = {
21323     { instruction         , 0                   , 0   , 32,
21324        0xfc000f00, 0xa4000400, &NMD::LWM              , 0,
21325        XMMS_               },        /* LWM */
21326     { instruction         , 0                   , 0   , 32,
21327        0xfc000f00, 0xa4000c00, &NMD::SWM              , 0,
21328        XMMS_               },        /* SWM */
21329 };
21330
21331
21332 NMD::Pool NMD::P_LS_UAWM[2] = {
21333     { instruction         , 0                   , 0   , 32,
21334        0xfc000f00, 0xa4000500, &NMD::UALWM            , 0,
21335        XMMS_               },        /* UALWM */
21336     { instruction         , 0                   , 0   , 32,
21337        0xfc000f00, 0xa4000d00, &NMD::UASWM            , 0,
21338        XMMS_               },        /* UASWM */
21339 };
21340
21341
21342 NMD::Pool NMD::P_LS_DM[2] = {
21343     { instruction         , 0                   , 0   , 32,
21344        0xfc000f00, 0xa4000600, &NMD::LDM              , 0,
21345        MIPS64_             },        /* LDM */
21346     { instruction         , 0                   , 0   , 32,
21347        0xfc000f00, 0xa4000e00, &NMD::SDM              , 0,
21348        MIPS64_             },        /* SDM */
21349 };
21350
21351
21352 NMD::Pool NMD::P_LS_UADM[2] = {
21353     { instruction         , 0                   , 0   , 32,
21354        0xfc000f00, 0xa4000700, &NMD::UALDM            , 0,
21355        MIPS64_             },        /* UALDM */
21356     { instruction         , 0                   , 0   , 32,
21357        0xfc000f00, 0xa4000f00, &NMD::UASDM            , 0,
21358        MIPS64_             },        /* UASDM */
21359 };
21360
21361
21362 NMD::Pool NMD::P_LS_S9[8] = {
21363     { pool                , P_LS_S0             , 16  , 32,
21364        0xfc000700, 0xa4000000, 0                      , 0,
21365        0x0                 },        /* P.LS.S0 */
21366     { pool                , P_LS_S1             , 16  , 32,
21367        0xfc000700, 0xa4000100, 0                      , 0,
21368        0x0                 },        /* P.LS.S1 */
21369     { pool                , P_LS_E0             , 16  , 32,
21370        0xfc000700, 0xa4000200, 0                      , 0,
21371        0x0                 },        /* P.LS.E0 */
21372     { reserved_block      , 0                   , 0   , 32,
21373        0xfc000700, 0xa4000300, 0                      , 0,
21374        0x0                 },        /* P.LS.S9~*(3) */
21375     { pool                , P_LS_WM             , 2   , 32,
21376        0xfc000700, 0xa4000400, 0                      , 0,
21377        0x0                 },        /* P.LS.WM */
21378     { pool                , P_LS_UAWM           , 2   , 32,
21379        0xfc000700, 0xa4000500, 0                      , 0,
21380        0x0                 },        /* P.LS.UAWM */
21381     { pool                , P_LS_DM             , 2   , 32,
21382        0xfc000700, 0xa4000600, 0                      , 0,
21383        0x0                 },        /* P.LS.DM */
21384     { pool                , P_LS_UADM           , 2   , 32,
21385        0xfc000700, 0xa4000700, 0                      , 0,
21386        0x0                 },        /* P.LS.UADM */
21387 };
21388
21389
21390 NMD::Pool NMD::P_BAL[2] = {
21391     { branch_instruction  , 0                   , 0   , 32,
21392        0xfe000000, 0x28000000, &NMD::BC_32_           , 0,
21393        0x0                 },        /* BC[32] */
21394     { call_instruction    , 0                   , 0   , 32,
21395        0xfe000000, 0x2a000000, &NMD::BALC_32_         , 0,
21396        0x0                 },        /* BALC[32] */
21397 };
21398
21399
21400 NMD::Pool NMD::P_BALRSC[2] = {
21401     { branch_instruction  , 0                   , 0   , 32,
21402        0xffe0f000, 0x48008000, &NMD::BRSC             , 0,
21403        0x0                 },        /* BRSC */
21404     { call_instruction    , 0                   , 0   , 32,
21405        0xfc00f000, 0x48008000, &NMD::BALRSC           , &NMD::BALRSC_cond      ,
21406        0x0                 },        /* BALRSC */
21407 };
21408
21409
21410 NMD::Pool NMD::P_J[16] = {
21411     { call_instruction    , 0                   , 0   , 32,
21412        0xfc00f000, 0x48000000, &NMD::JALRC_32_        , 0,
21413        0x0                 },        /* JALRC[32] */
21414     { call_instruction    , 0                   , 0   , 32,
21415        0xfc00f000, 0x48001000, &NMD::JALRC_HB         , 0,
21416        0x0                 },        /* JALRC.HB */
21417     { reserved_block      , 0                   , 0   , 32,
21418        0xfc00f000, 0x48002000, 0                      , 0,
21419        0x0                 },        /* P.J~*(2) */
21420     { reserved_block      , 0                   , 0   , 32,
21421        0xfc00f000, 0x48003000, 0                      , 0,
21422        0x0                 },        /* P.J~*(3) */
21423     { reserved_block      , 0                   , 0   , 32,
21424        0xfc00f000, 0x48004000, 0                      , 0,
21425        0x0                 },        /* P.J~*(4) */
21426     { reserved_block      , 0                   , 0   , 32,
21427        0xfc00f000, 0x48005000, 0                      , 0,
21428        0x0                 },        /* P.J~*(5) */
21429     { reserved_block      , 0                   , 0   , 32,
21430        0xfc00f000, 0x48006000, 0                      , 0,
21431        0x0                 },        /* P.J~*(6) */
21432     { reserved_block      , 0                   , 0   , 32,
21433        0xfc00f000, 0x48007000, 0                      , 0,
21434        0x0                 },        /* P.J~*(7) */
21435     { pool                , P_BALRSC            , 2   , 32,
21436        0xfc00f000, 0x48008000, 0                      , 0,
21437        0x0                 },        /* P.BALRSC */
21438     { reserved_block      , 0                   , 0   , 32,
21439        0xfc00f000, 0x48009000, 0                      , 0,
21440        0x0                 },        /* P.J~*(9) */
21441     { reserved_block      , 0                   , 0   , 32,
21442        0xfc00f000, 0x4800a000, 0                      , 0,
21443        0x0                 },        /* P.J~*(10) */
21444     { reserved_block      , 0                   , 0   , 32,
21445        0xfc00f000, 0x4800b000, 0                      , 0,
21446        0x0                 },        /* P.J~*(11) */
21447     { reserved_block      , 0                   , 0   , 32,
21448        0xfc00f000, 0x4800c000, 0                      , 0,
21449        0x0                 },        /* P.J~*(12) */
21450     { reserved_block      , 0                   , 0   , 32,
21451        0xfc00f000, 0x4800d000, 0                      , 0,
21452        0x0                 },        /* P.J~*(13) */
21453     { reserved_block      , 0                   , 0   , 32,
21454        0xfc00f000, 0x4800e000, 0                      , 0,
21455        0x0                 },        /* P.J~*(14) */
21456     { reserved_block      , 0                   , 0   , 32,
21457        0xfc00f000, 0x4800f000, 0                      , 0,
21458        0x0                 },        /* P.J~*(15) */
21459 };
21460
21461
21462 NMD::Pool NMD::P_BR3A[32] = {
21463     { branch_instruction  , 0                   , 0   , 32,
21464        0xfc1fc000, 0x88004000, &NMD::BC1EQZC          , 0,
21465        CP1_                },        /* BC1EQZC */
21466     { branch_instruction  , 0                   , 0   , 32,
21467        0xfc1fc000, 0x88014000, &NMD::BC1NEZC          , 0,
21468        CP1_                },        /* BC1NEZC */
21469     { branch_instruction  , 0                   , 0   , 32,
21470        0xfc1fc000, 0x88024000, &NMD::BC2EQZC          , 0,
21471        CP2_                },        /* BC2EQZC */
21472     { branch_instruction  , 0                   , 0   , 32,
21473        0xfc1fc000, 0x88034000, &NMD::BC2NEZC          , 0,
21474        CP2_                },        /* BC2NEZC */
21475     { branch_instruction  , 0                   , 0   , 32,
21476        0xfc1fc000, 0x88044000, &NMD::BPOSGE32C        , 0,
21477        DSP_                },        /* BPOSGE32C */
21478     { reserved_block      , 0                   , 0   , 32,
21479        0xfc1fc000, 0x88054000, 0                      , 0,
21480        0x0                 },        /* P.BR3A~*(5) */
21481     { reserved_block      , 0                   , 0   , 32,
21482        0xfc1fc000, 0x88064000, 0                      , 0,
21483        0x0                 },        /* P.BR3A~*(6) */
21484     { reserved_block      , 0                   , 0   , 32,
21485        0xfc1fc000, 0x88074000, 0                      , 0,
21486        0x0                 },        /* P.BR3A~*(7) */
21487     { reserved_block      , 0                   , 0   , 32,
21488        0xfc1fc000, 0x88084000, 0                      , 0,
21489        0x0                 },        /* P.BR3A~*(8) */
21490     { reserved_block      , 0                   , 0   , 32,
21491        0xfc1fc000, 0x88094000, 0                      , 0,
21492        0x0                 },        /* P.BR3A~*(9) */
21493     { reserved_block      , 0                   , 0   , 32,
21494        0xfc1fc000, 0x880a4000, 0                      , 0,
21495        0x0                 },        /* P.BR3A~*(10) */
21496     { reserved_block      , 0                   , 0   , 32,
21497        0xfc1fc000, 0x880b4000, 0                      , 0,
21498        0x0                 },        /* P.BR3A~*(11) */
21499     { reserved_block      , 0                   , 0   , 32,
21500        0xfc1fc000, 0x880c4000, 0                      , 0,
21501        0x0                 },        /* P.BR3A~*(12) */
21502     { reserved_block      , 0                   , 0   , 32,
21503        0xfc1fc000, 0x880d4000, 0                      , 0,
21504        0x0                 },        /* P.BR3A~*(13) */
21505     { reserved_block      , 0                   , 0   , 32,
21506        0xfc1fc000, 0x880e4000, 0                      , 0,
21507        0x0                 },        /* P.BR3A~*(14) */
21508     { reserved_block      , 0                   , 0   , 32,
21509        0xfc1fc000, 0x880f4000, 0                      , 0,
21510        0x0                 },        /* P.BR3A~*(15) */
21511     { reserved_block      , 0                   , 0   , 32,
21512        0xfc1fc000, 0x88104000, 0                      , 0,
21513        0x0                 },        /* P.BR3A~*(16) */
21514     { reserved_block      , 0                   , 0   , 32,
21515        0xfc1fc000, 0x88114000, 0                      , 0,
21516        0x0                 },        /* P.BR3A~*(17) */
21517     { reserved_block      , 0                   , 0   , 32,
21518        0xfc1fc000, 0x88124000, 0                      , 0,
21519        0x0                 },        /* P.BR3A~*(18) */
21520     { reserved_block      , 0                   , 0   , 32,
21521        0xfc1fc000, 0x88134000, 0                      , 0,
21522        0x0                 },        /* P.BR3A~*(19) */
21523     { reserved_block      , 0                   , 0   , 32,
21524        0xfc1fc000, 0x88144000, 0                      , 0,
21525        0x0                 },        /* P.BR3A~*(20) */
21526     { reserved_block      , 0                   , 0   , 32,
21527        0xfc1fc000, 0x88154000, 0                      , 0,
21528        0x0                 },        /* P.BR3A~*(21) */
21529     { reserved_block      , 0                   , 0   , 32,
21530        0xfc1fc000, 0x88164000, 0                      , 0,
21531        0x0                 },        /* P.BR3A~*(22) */
21532     { reserved_block      , 0                   , 0   , 32,
21533        0xfc1fc000, 0x88174000, 0                      , 0,
21534        0x0                 },        /* P.BR3A~*(23) */
21535     { reserved_block      , 0                   , 0   , 32,
21536        0xfc1fc000, 0x88184000, 0                      , 0,
21537        0x0                 },        /* P.BR3A~*(24) */
21538     { reserved_block      , 0                   , 0   , 32,
21539        0xfc1fc000, 0x88194000, 0                      , 0,
21540        0x0                 },        /* P.BR3A~*(25) */
21541     { reserved_block      , 0                   , 0   , 32,
21542        0xfc1fc000, 0x881a4000, 0                      , 0,
21543        0x0                 },        /* P.BR3A~*(26) */
21544     { reserved_block      , 0                   , 0   , 32,
21545        0xfc1fc000, 0x881b4000, 0                      , 0,
21546        0x0                 },        /* P.BR3A~*(27) */
21547     { reserved_block      , 0                   , 0   , 32,
21548        0xfc1fc000, 0x881c4000, 0                      , 0,
21549        0x0                 },        /* P.BR3A~*(28) */
21550     { reserved_block      , 0                   , 0   , 32,
21551        0xfc1fc000, 0x881d4000, 0                      , 0,
21552        0x0                 },        /* P.BR3A~*(29) */
21553     { reserved_block      , 0                   , 0   , 32,
21554        0xfc1fc000, 0x881e4000, 0                      , 0,
21555        0x0                 },        /* P.BR3A~*(30) */
21556     { reserved_block      , 0                   , 0   , 32,
21557        0xfc1fc000, 0x881f4000, 0                      , 0,
21558        0x0                 },        /* P.BR3A~*(31) */
21559 };
21560
21561
21562 NMD::Pool NMD::P_BR1[4] = {
21563     { branch_instruction  , 0                   , 0   , 32,
21564        0xfc00c000, 0x88000000, &NMD::BEQC_32_         , 0,
21565        0x0                 },        /* BEQC[32] */
21566     { pool                , P_BR3A              , 32  , 32,
21567        0xfc00c000, 0x88004000, 0                      , 0,
21568        0x0                 },        /* P.BR3A */
21569     { branch_instruction  , 0                   , 0   , 32,
21570        0xfc00c000, 0x88008000, &NMD::BGEC             , 0,
21571        0x0                 },        /* BGEC */
21572     { branch_instruction  , 0                   , 0   , 32,
21573        0xfc00c000, 0x8800c000, &NMD::BGEUC            , 0,
21574        0x0                 },        /* BGEUC */
21575 };
21576
21577
21578 NMD::Pool NMD::P_BR2[4] = {
21579     { branch_instruction  , 0                   , 0   , 32,
21580        0xfc00c000, 0xa8000000, &NMD::BNEC_32_         , 0,
21581        0x0                 },        /* BNEC[32] */
21582     { reserved_block      , 0                   , 0   , 32,
21583        0xfc00c000, 0xa8004000, 0                      , 0,
21584        0x0                 },        /* P.BR2~*(1) */
21585     { branch_instruction  , 0                   , 0   , 32,
21586        0xfc00c000, 0xa8008000, &NMD::BLTC             , 0,
21587        0x0                 },        /* BLTC */
21588     { branch_instruction  , 0                   , 0   , 32,
21589        0xfc00c000, 0xa800c000, &NMD::BLTUC            , 0,
21590        0x0                 },        /* BLTUC */
21591 };
21592
21593
21594 NMD::Pool NMD::P_BRI[8] = {
21595     { branch_instruction  , 0                   , 0   , 32,
21596        0xfc1c0000, 0xc8000000, &NMD::BEQIC            , 0,
21597        0x0                 },        /* BEQIC */
21598     { branch_instruction  , 0                   , 0   , 32,
21599        0xfc1c0000, 0xc8040000, &NMD::BBEQZC           , 0,
21600        XMMS_               },        /* BBEQZC */
21601     { branch_instruction  , 0                   , 0   , 32,
21602        0xfc1c0000, 0xc8080000, &NMD::BGEIC            , 0,
21603        0x0                 },        /* BGEIC */
21604     { branch_instruction  , 0                   , 0   , 32,
21605        0xfc1c0000, 0xc80c0000, &NMD::BGEIUC           , 0,
21606        0x0                 },        /* BGEIUC */
21607     { branch_instruction  , 0                   , 0   , 32,
21608        0xfc1c0000, 0xc8100000, &NMD::BNEIC            , 0,
21609        0x0                 },        /* BNEIC */
21610     { branch_instruction  , 0                   , 0   , 32,
21611        0xfc1c0000, 0xc8140000, &NMD::BBNEZC           , 0,
21612        XMMS_               },        /* BBNEZC */
21613     { branch_instruction  , 0                   , 0   , 32,
21614        0xfc1c0000, 0xc8180000, &NMD::BLTIC            , 0,
21615        0x0                 },        /* BLTIC */
21616     { branch_instruction  , 0                   , 0   , 32,
21617        0xfc1c0000, 0xc81c0000, &NMD::BLTIUC           , 0,
21618        0x0                 },        /* BLTIUC */
21619 };
21620
21621
21622 NMD::Pool NMD::P32[32] = {
21623     { pool                , P_ADDIU             , 2   , 32,
21624        0xfc000000, 0x00000000, 0                      , 0,
21625        0x0                 },        /* P.ADDIU */
21626     { pool                , P32A                , 8   , 32,
21627        0xfc000000, 0x20000000, 0                      , 0,
21628        0x0                 },        /* P32A */
21629     { pool                , P_GP_W              , 4   , 32,
21630        0xfc000000, 0x40000000, 0                      , 0,
21631        0x0                 },        /* P.GP.W */
21632     { pool                , POOL48I             , 32  , 48,
21633        0xfc0000000000ull, 0x600000000000ull, 0                      , 0,
21634        0x0                 },        /* POOL48I */
21635     { pool                , P_U12               , 16  , 32,
21636        0xfc000000, 0x80000000, 0                      , 0,
21637        0x0                 },        /* P.U12 */
21638     { pool                , POOL32F             , 8   , 32,
21639        0xfc000000, 0xa0000000, 0                      , 0,
21640        CP1_                },        /* POOL32F */
21641     { pool                , POOL32S             , 8   , 32,
21642        0xfc000000, 0xc0000000, 0                      , 0,
21643        0x0                 },        /* POOL32S */
21644     { pool                , P_LUI               , 2   , 32,
21645        0xfc000000, 0xe0000000, 0                      , 0,
21646        0x0                 },        /* P.LUI */
21647     { instruction         , 0                   , 0   , 32,
21648        0xfc000000, 0x04000000, &NMD::ADDIUPC_32_      , 0,
21649        0x0                 },        /* ADDIUPC[32] */
21650     { reserved_block      , 0                   , 0   , 32,
21651        0xfc000000, 0x24000000, 0                      , 0,
21652        0x0                 },        /* P32~*(5) */
21653     { pool                , P_GP_BH             , 8   , 32,
21654        0xfc000000, 0x44000000, 0                      , 0,
21655        0x0                 },        /* P.GP.BH */
21656     { reserved_block      , 0                   , 0   , 32,
21657        0xfc000000, 0x64000000, 0                      , 0,
21658        0x0                 },        /* P32~*(13) */
21659     { pool                , P_LS_U12            , 16  , 32,
21660        0xfc000000, 0x84000000, 0                      , 0,
21661        0x0                 },        /* P.LS.U12 */
21662     { pool                , P_LS_S9             , 8   , 32,
21663        0xfc000000, 0xa4000000, 0                      , 0,
21664        0x0                 },        /* P.LS.S9 */
21665     { reserved_block      , 0                   , 0   , 32,
21666        0xfc000000, 0xc4000000, 0                      , 0,
21667        0x0                 },        /* P32~*(25) */
21668     { reserved_block      , 0                   , 0   , 32,
21669        0xfc000000, 0xe4000000, 0                      , 0,
21670        0x0                 },        /* P32~*(29) */
21671     { call_instruction    , 0                   , 0   , 32,
21672        0xfc000000, 0x08000000, &NMD::MOVE_BALC        , 0,
21673        XMMS_               },        /* MOVE.BALC */
21674     { pool                , P_BAL               , 2   , 32,
21675        0xfc000000, 0x28000000, 0                      , 0,
21676        0x0                 },        /* P.BAL */
21677     { pool                , P_J                 , 16  , 32,
21678        0xfc000000, 0x48000000, 0                      , 0,
21679        0x0                 },        /* P.J */
21680     { reserved_block      , 0                   , 0   , 32,
21681        0xfc000000, 0x68000000, 0                      , 0,
21682        0x0                 },        /* P32~*(14) */
21683     { pool                , P_BR1               , 4   , 32,
21684        0xfc000000, 0x88000000, 0                      , 0,
21685        0x0                 },        /* P.BR1 */
21686     { pool                , P_BR2               , 4   , 32,
21687        0xfc000000, 0xa8000000, 0                      , 0,
21688        0x0                 },        /* P.BR2 */
21689     { pool                , P_BRI               , 8   , 32,
21690        0xfc000000, 0xc8000000, 0                      , 0,
21691        0x0                 },        /* P.BRI */
21692     { reserved_block      , 0                   , 0   , 32,
21693        0xfc000000, 0xe8000000, 0                      , 0,
21694        0x0                 },        /* P32~*(30) */
21695     { reserved_block      , 0                   , 0   , 32,
21696        0xfc000000, 0x0c000000, 0                      , 0,
21697        0x0                 },        /* P32~*(3) */
21698     { reserved_block      , 0                   , 0   , 32,
21699        0xfc000000, 0x2c000000, 0                      , 0,
21700        0x0                 },        /* P32~*(7) */
21701     { reserved_block      , 0                   , 0   , 32,
21702        0xfc000000, 0x4c000000, 0                      , 0,
21703        0x0                 },        /* P32~*(11) */
21704     { reserved_block      , 0                   , 0   , 32,
21705        0xfc000000, 0x6c000000, 0                      , 0,
21706        0x0                 },        /* P32~*(15) */
21707     { reserved_block      , 0                   , 0   , 32,
21708        0xfc000000, 0x8c000000, 0                      , 0,
21709        0x0                 },        /* P32~*(19) */
21710     { reserved_block      , 0                   , 0   , 32,
21711        0xfc000000, 0xac000000, 0                      , 0,
21712        0x0                 },        /* P32~*(23) */
21713     { reserved_block      , 0                   , 0   , 32,
21714        0xfc000000, 0xcc000000, 0                      , 0,
21715        0x0                 },        /* P32~*(27) */
21716     { reserved_block      , 0                   , 0   , 32,
21717        0xfc000000, 0xec000000, 0                      , 0,
21718        0x0                 },        /* P32~*(31) */
21719 };
21720
21721
21722 NMD::Pool NMD::P16_SYSCALL[2] = {
21723     { instruction         , 0                   , 0   , 16,
21724        0xfffc    , 0x1008    , &NMD::SYSCALL_16_      , 0,
21725        0x0                 },        /* SYSCALL[16] */
21726     { instruction         , 0                   , 0   , 16,
21727        0xfffc    , 0x100c    , &NMD::HYPCALL_16_      , 0,
21728        CP0_ | VZ_          },        /* HYPCALL[16] */
21729 };
21730
21731
21732 NMD::Pool NMD::P16_RI[4] = {
21733     { reserved_block      , 0                   , 0   , 16,
21734        0xfff8    , 0x1000    , 0                      , 0,
21735        0x0                 },        /* P16.RI~*(0) */
21736     { pool                , P16_SYSCALL         , 2   , 16,
21737        0xfff8    , 0x1008    , 0                      , 0,
21738        0x0                 },        /* P16.SYSCALL */
21739     { instruction         , 0                   , 0   , 16,
21740        0xfff8    , 0x1010    , &NMD::BREAK_16_        , 0,
21741        0x0                 },        /* BREAK[16] */
21742     { instruction         , 0                   , 0   , 16,
21743        0xfff8    , 0x1018    , &NMD::SDBBP_16_        , 0,
21744        EJTAG_              },        /* SDBBP[16] */
21745 };
21746
21747
21748 NMD::Pool NMD::P16_MV[2] = {
21749     { pool                , P16_RI              , 4   , 16,
21750        0xffe0    , 0x1000    , 0                      , 0,
21751        0x0                 },        /* P16.RI */
21752     { instruction         , 0                   , 0   , 16,
21753        0xfc00    , 0x1000    , &NMD::MOVE             , &NMD::MOVE_cond        ,
21754        0x0                 },        /* MOVE */
21755 };
21756
21757
21758 NMD::Pool NMD::P16_SHIFT[2] = {
21759     { instruction         , 0                   , 0   , 16,
21760        0xfc08    , 0x3000    , &NMD::SLL_16_          , 0,
21761        0x0                 },        /* SLL[16] */
21762     { instruction         , 0                   , 0   , 16,
21763        0xfc08    , 0x3008    , &NMD::SRL_16_          , 0,
21764        0x0                 },        /* SRL[16] */
21765 };
21766
21767
21768 NMD::Pool NMD::POOL16C_00[4] = {
21769     { instruction         , 0                   , 0   , 16,
21770        0xfc0f    , 0x5000    , &NMD::NOT_16_          , 0,
21771        0x0                 },        /* NOT[16] */
21772     { instruction         , 0                   , 0   , 16,
21773        0xfc0f    , 0x5004    , &NMD::XOR_16_          , 0,
21774        0x0                 },        /* XOR[16] */
21775     { instruction         , 0                   , 0   , 16,
21776        0xfc0f    , 0x5008    , &NMD::AND_16_          , 0,
21777        0x0                 },        /* AND[16] */
21778     { instruction         , 0                   , 0   , 16,
21779        0xfc0f    , 0x500c    , &NMD::OR_16_           , 0,
21780        0x0                 },        /* OR[16] */
21781 };
21782
21783
21784 NMD::Pool NMD::POOL16C_0[2] = {
21785     { pool                , POOL16C_00          , 4   , 16,
21786        0xfc03    , 0x5000    , 0                      , 0,
21787        0x0                 },        /* POOL16C_00 */
21788     { reserved_block      , 0                   , 0   , 16,
21789        0xfc03    , 0x5002    , 0                      , 0,
21790        0x0                 },        /* POOL16C_0~*(1) */
21791 };
21792
21793
21794 NMD::Pool NMD::P16C[2] = {
21795     { pool                , POOL16C_0           , 2   , 16,
21796        0xfc01    , 0x5000    , 0                      , 0,
21797        0x0                 },        /* POOL16C_0 */
21798     { instruction         , 0                   , 0   , 16,
21799        0xfc01    , 0x5001    , &NMD::LWXS_16_         , 0,
21800        0x0                 },        /* LWXS[16] */
21801 };
21802
21803
21804 NMD::Pool NMD::P16_A1[2] = {
21805     { reserved_block      , 0                   , 0   , 16,
21806        0xfc40    , 0x7000    , 0                      , 0,
21807        0x0                 },        /* P16.A1~*(0) */
21808     { instruction         , 0                   , 0   , 16,
21809        0xfc40    , 0x7040    , &NMD::ADDIU_R1_SP_     , 0,
21810        0x0                 },        /* ADDIU[R1.SP] */
21811 };
21812
21813
21814 NMD::Pool NMD::P_ADDIU_RS5_[2] = {
21815     { instruction         , 0                   , 0   , 16,
21816        0xffe8    , 0x9008    , &NMD::NOP_16_          , 0,
21817        0x0                 },        /* NOP[16] */
21818     { instruction         , 0                   , 0   , 16,
21819        0xfc08    , 0x9008    , &NMD::ADDIU_RS5_       , &NMD::ADDIU_RS5__cond  ,
21820        0x0                 },        /* ADDIU[RS5] */
21821 };
21822
21823
21824 NMD::Pool NMD::P16_A2[2] = {
21825     { instruction         , 0                   , 0   , 16,
21826        0xfc08    , 0x9000    , &NMD::ADDIU_R2_        , 0,
21827        0x0                 },        /* ADDIU[R2] */
21828     { pool                , P_ADDIU_RS5_        , 2   , 16,
21829        0xfc08    , 0x9008    , 0                      , 0,
21830        0x0                 },        /* P.ADDIU[RS5] */
21831 };
21832
21833
21834 NMD::Pool NMD::P16_ADDU[2] = {
21835     { instruction         , 0                   , 0   , 16,
21836        0xfc01    , 0xb000    , &NMD::ADDU_16_         , 0,
21837        0x0                 },        /* ADDU[16] */
21838     { instruction         , 0                   , 0   , 16,
21839        0xfc01    , 0xb001    , &NMD::SUBU_16_         , 0,
21840        0x0                 },        /* SUBU[16] */
21841 };
21842
21843
21844 NMD::Pool NMD::P16_JRC[2] = {
21845     { branch_instruction  , 0                   , 0   , 16,
21846        0xfc1f    , 0xd800    , &NMD::JRC              , 0,
21847        0x0                 },        /* JRC */
21848     { call_instruction    , 0                   , 0   , 16,
21849        0xfc1f    , 0xd810    , &NMD::JALRC_16_        , 0,
21850        0x0                 },        /* JALRC[16] */
21851 };
21852
21853
21854 NMD::Pool NMD::P16_BR1[2] = {
21855     { branch_instruction  , 0                   , 0   , 16,
21856        0xfc00    , 0xd800    , &NMD::BEQC_16_         , &NMD::BEQC_16__cond    ,
21857        XMMS_               },        /* BEQC[16] */
21858     { branch_instruction  , 0                   , 0   , 16,
21859        0xfc00    , 0xd800    , &NMD::BNEC_16_         , &NMD::BNEC_16__cond    ,
21860        XMMS_               },        /* BNEC[16] */
21861 };
21862
21863
21864 NMD::Pool NMD::P16_BR[2] = {
21865     { pool                , P16_JRC             , 2   , 16,
21866        0xfc0f    , 0xd800    , 0                      , 0,
21867        0x0                 },        /* P16.JRC */
21868     { pool                , P16_BR1             , 2   , 16,
21869        0xfc00    , 0xd800    , 0                      , &NMD::P16_BR1_cond     ,
21870        0x0                 },        /* P16.BR1 */
21871 };
21872
21873
21874 NMD::Pool NMD::P16_SR[2] = {
21875     { instruction         , 0                   , 0   , 16,
21876        0xfd00    , 0x1c00    , &NMD::SAVE_16_         , 0,
21877        0x0                 },        /* SAVE[16] */
21878     { return_instruction  , 0                   , 0   , 16,
21879        0xfd00    , 0x1d00    , &NMD::RESTORE_JRC_16_  , 0,
21880        0x0                 },        /* RESTORE.JRC[16] */
21881 };
21882
21883
21884 NMD::Pool NMD::P16_4X4[4] = {
21885     { instruction         , 0                   , 0   , 16,
21886        0xfd08    , 0x3c00    , &NMD::ADDU_4X4_        , 0,
21887        XMMS_               },        /* ADDU[4X4] */
21888     { instruction         , 0                   , 0   , 16,
21889        0xfd08    , 0x3c08    , &NMD::MUL_4X4_         , 0,
21890        XMMS_               },        /* MUL[4X4] */
21891     { reserved_block      , 0                   , 0   , 16,
21892        0xfd08    , 0x3d00    , 0                      , 0,
21893        0x0                 },        /* P16.4X4~*(2) */
21894     { reserved_block      , 0                   , 0   , 16,
21895        0xfd08    , 0x3d08    , 0                      , 0,
21896        0x0                 },        /* P16.4X4~*(3) */
21897 };
21898
21899
21900 NMD::Pool NMD::P16_LB[4] = {
21901     { instruction         , 0                   , 0   , 16,
21902        0xfc0c    , 0x5c00    , &NMD::LB_16_           , 0,
21903        0x0                 },        /* LB[16] */
21904     { instruction         , 0                   , 0   , 16,
21905        0xfc0c    , 0x5c04    , &NMD::SB_16_           , 0,
21906        0x0                 },        /* SB[16] */
21907     { instruction         , 0                   , 0   , 16,
21908        0xfc0c    , 0x5c08    , &NMD::LBU_16_          , 0,
21909        0x0                 },        /* LBU[16] */
21910     { reserved_block      , 0                   , 0   , 16,
21911        0xfc0c    , 0x5c0c    , 0                      , 0,
21912        0x0                 },        /* P16.LB~*(3) */
21913 };
21914
21915
21916 NMD::Pool NMD::P16_LH[4] = {
21917     { instruction         , 0                   , 0   , 16,
21918        0xfc09    , 0x7c00    , &NMD::LH_16_           , 0,
21919        0x0                 },        /* LH[16] */
21920     { instruction         , 0                   , 0   , 16,
21921        0xfc09    , 0x7c01    , &NMD::SH_16_           , 0,
21922        0x0                 },        /* SH[16] */
21923     { instruction         , 0                   , 0   , 16,
21924        0xfc09    , 0x7c08    , &NMD::LHU_16_          , 0,
21925        0x0                 },        /* LHU[16] */
21926     { reserved_block      , 0                   , 0   , 16,
21927        0xfc09    , 0x7c09    , 0                      , 0,
21928        0x0                 },        /* P16.LH~*(3) */
21929 };
21930
21931
21932 NMD::Pool NMD::P16[32] = {
21933     { pool                , P16_MV              , 2   , 16,
21934        0xfc00    , 0x1000    , 0                      , 0,
21935        0x0                 },        /* P16.MV */
21936     { pool                , P16_SHIFT           , 2   , 16,
21937        0xfc00    , 0x3000    , 0                      , 0,
21938        0x0                 },        /* P16.SHIFT */
21939     { pool                , P16C                , 2   , 16,
21940        0xfc00    , 0x5000    , 0                      , 0,
21941        0x0                 },        /* P16C */
21942     { pool                , P16_A1              , 2   , 16,
21943        0xfc00    , 0x7000    , 0                      , 0,
21944        0x0                 },        /* P16.A1 */
21945     { pool                , P16_A2              , 2   , 16,
21946        0xfc00    , 0x9000    , 0                      , 0,
21947        0x0                 },        /* P16.A2 */
21948     { pool                , P16_ADDU            , 2   , 16,
21949        0xfc00    , 0xb000    , 0                      , 0,
21950        0x0                 },        /* P16.ADDU */
21951     { instruction         , 0                   , 0   , 16,
21952        0xfc00    , 0xd000    , &NMD::LI_16_           , 0,
21953        0x0                 },        /* LI[16] */
21954     { instruction         , 0                   , 0   , 16,
21955        0xfc00    , 0xf000    , &NMD::ANDI_16_         , 0,
21956        0x0                 },        /* ANDI[16] */
21957     { instruction         , 0                   , 0   , 16,
21958        0xfc00    , 0x1400    , &NMD::LW_16_           , 0,
21959        0x0                 },        /* LW[16] */
21960     { instruction         , 0                   , 0   , 16,
21961        0xfc00    , 0x3400    , &NMD::LW_SP_           , 0,
21962        0x0                 },        /* LW[SP] */
21963     { instruction         , 0                   , 0   , 16,
21964        0xfc00    , 0x5400    , &NMD::LW_GP16_         , 0,
21965        0x0                 },        /* LW[GP16] */
21966     { instruction         , 0                   , 0   , 16,
21967        0xfc00    , 0x7400    , &NMD::LW_4X4_          , 0,
21968        XMMS_               },        /* LW[4X4] */
21969     { instruction         , 0                   , 0   , 16,
21970        0xfc00    , 0x9400    , &NMD::SW_16_           , 0,
21971        0x0                 },        /* SW[16] */
21972     { instruction         , 0                   , 0   , 16,
21973        0xfc00    , 0xb400    , &NMD::SW_SP_           , 0,
21974        0x0                 },        /* SW[SP] */
21975     { instruction         , 0                   , 0   , 16,
21976        0xfc00    , 0xd400    , &NMD::SW_GP16_         , 0,
21977        0x0                 },        /* SW[GP16] */
21978     { instruction         , 0                   , 0   , 16,
21979        0xfc00    , 0xf400    , &NMD::SW_4X4_          , 0,
21980        XMMS_               },        /* SW[4X4] */
21981     { branch_instruction  , 0                   , 0   , 16,
21982        0xfc00    , 0x1800    , &NMD::BC_16_           , 0,
21983        0x0                 },        /* BC[16] */
21984     { call_instruction    , 0                   , 0   , 16,
21985        0xfc00    , 0x3800    , &NMD::BALC_16_         , 0,
21986        0x0                 },        /* BALC[16] */
21987     { reserved_block      , 0                   , 0   , 16,
21988        0xfc00    , 0x5800    , 0                      , 0,
21989        0x0                 },        /* P16~*(10) */
21990     { reserved_block      , 0                   , 0   , 16,
21991        0xfc00    , 0x7800    , 0                      , 0,
21992        0x0                 },        /* P16~*(14) */
21993     { branch_instruction  , 0                   , 0   , 16,
21994        0xfc00    , 0x9800    , &NMD::BEQZC_16_        , 0,
21995        0x0                 },        /* BEQZC[16] */
21996     { branch_instruction  , 0                   , 0   , 16,
21997        0xfc00    , 0xb800    , &NMD::BNEZC_16_        , 0,
21998        0x0                 },        /* BNEZC[16] */
21999     { pool                , P16_BR              , 2   , 16,
22000        0xfc00    , 0xd800    , 0                      , 0,
22001        0x0                 },        /* P16.BR */
22002     { reserved_block      , 0                   , 0   , 16,
22003        0xfc00    , 0xf800    , 0                      , 0,
22004        0x0                 },        /* P16~*(30) */
22005     { pool                , P16_SR              , 2   , 16,
22006        0xfc00    , 0x1c00    , 0                      , 0,
22007        0x0                 },        /* P16.SR */
22008     { pool                , P16_4X4             , 4   , 16,
22009        0xfc00    , 0x3c00    , 0                      , 0,
22010        0x0                 },        /* P16.4X4 */
22011     { pool                , P16_LB              , 4   , 16,
22012        0xfc00    , 0x5c00    , 0                      , 0,
22013        0x0                 },        /* P16.LB */
22014     { pool                , P16_LH              , 4   , 16,
22015        0xfc00    , 0x7c00    , 0                      , 0,
22016        0x0                 },        /* P16.LH */
22017     { reserved_block      , 0                   , 0   , 16,
22018        0xfc00    , 0x9c00    , 0                      , 0,
22019        0x0                 },        /* P16~*(19) */
22020     { instruction         , 0                   , 0   , 16,
22021        0xfc00    , 0xbc00    , &NMD::MOVEP            , 0,
22022        XMMS_               },        /* MOVEP */
22023     { reserved_block      , 0                   , 0   , 16,
22024        0xfc00    , 0xdc00    , 0                      , 0,
22025        0x0                 },        /* P16~*(27) */
22026     { instruction         , 0                   , 0   , 16,
22027        0xfc00    , 0xfc00    , &NMD::MOVEP_REV_       , 0,
22028        XMMS_               },        /* MOVEP[REV] */
22029 };
22030
22031
22032 NMD::Pool NMD::MAJOR[2] = {
22033     { pool                , P32                 , 32  , 32,
22034        0x10000000, 0x00000000, 0                      , 0,
22035        0x0                 },        /* P32 */
22036     { pool                , P16                 , 32  , 16,
22037        0x1000    , 0x1000    , 0                      , 0,
22038        0x0                 },        /* P16 */
22039 };