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12 <h1>Bytecode for the Dalvik VM</h1>
13 <p>Copyright © 2007 The Android Open Source Project
15 <h2>General Design</h2>
18 <li>The machine model and calling conventions are meant to approximately
19 imitate common real architectures and C-style calling conventions:
21 <li>The VM is register-based, and frames are fixed in size upon creation.
22 Each frame consists of a particular number of registers (specified by
23 the method) as well as any adjunct data needed to execute the method,
24 such as (but not limited to) the program counter and a reference to the
25 <code>.dex</code> file that contains the method.
27 <li>When used for bit values (such as integers and floating point
28 numbers), registers are considered 32 bits wide. Adjacent register
29 pairs are used for 64-bit values. There is no alignment requirement
32 <li>When used for object references, registers are considered wide enough
33 to hold exactly one such reference.
35 <li>In terms of bitwise representation, <code>(Object) null == (int)
38 <li>The <i>N</i> arguments to a method land in the last <i>N</i> registers
39 of the method's invocation frame, in order. Wide arguments consume
40 two registers. Instance methods are passed a <code>this</code> reference
41 as their first argument.
44 <li>The storage unit in the instruction stream is a 16-bit unsigned quantity.
45 Some bits in some instructions are ignored / must-be-zero.
47 <li>Instructions aren't gratuitously limited to a particular type. For
48 example, instructions that move 32-bit register values without interpretation
49 don't have to specify whether they are moving ints or floats.
51 <li>There are separately enumerated and indexed constant pools for
52 references to strings, types, fields, and methods.
54 <li>Bitwise literal data is represented in-line in the instruction stream.</li>
55 <li>Because, in practice, it is uncommon for a method to need more than
56 16 registers, and because needing more than eight registers <i>is</i>
57 reasonably common, many instructions are limited to only addressing
59 registers. When reasonably possible, instructions allow references to
60 up to the first 256 registers. In addition, some instructions have variants
61 that allow for much larger register counts, including a pair of catch-all
62 <code>move</code> instructions that can address registers in the range
63 <code>v0</code> – <code>v65535</code>.
64 In cases where an instruction variant isn't
65 available to address a desired register, it is expected that the register
66 contents get moved from the original register to a low register (before the
67 operation) and/or moved from a low result register to a high register
68 (after the operation).
70 <li>There are several "pseudo-instructions" that are used to hold
71 variable-length data referred to by regular instructions (for example,
72 <code>fill-array-data</code>). Such instructions must never be
73 encountered during the normal flow of execution. In addition, the
74 instructions must be located on even-numbered bytecode offsets (that is,
75 4-byte aligned). In order to meet this requirement, dex generation tools
76 must emit an extra <code>nop</code> instruction as a spacer if such an
77 instruction would otherwise be unaligned. Finally, though not required,
78 it is expected that most tools will choose to emit these instructions at
79 the ends of methods, since otherwise it would likely be the case that
80 additional instructions would be needed to branch around them.
82 <li>When installed on a running system, some instructions may be altered,
83 changing their format, as an install-time static linking optimization.
84 This is to allow for faster execution once linkage is known.
86 <a href="instruction-formats.html">instruction formats document</a>
87 for the suggested variants. The word "suggested" is used advisedly;
88 it is not mandatory to implement these.
90 <li>Human-syntax and mnemonics:
92 <li>Dest-then-source ordering for arguments.</li>
93 <li>Some opcodes have a disambiguating name suffix to indicate the type(s)
96 <li>Type-general 32-bit opcodes are unmarked.</li>
97 <li>Type-general 64-bit opcodes are suffixed with <code>-wide</code>.</li>
98 <li>Type-specific opcodes are suffixed with their type (or a
99 straightforward abbreviation), one of: <code>-boolean</code>
100 <code>-byte</code> <code>-char</code> <code>-short</code>
101 <code>-int</code> <code>-long</code> <code>-float</code>
102 <code>-double</code> <code>-object</code> <code>-string</code>
103 <code>-class</code> <code>-void</code>.</li>
106 <li>Some opcodes have a disambiguating suffix to distinguish
107 otherwise-identical operations that have different instruction layouts
108 or options. These suffixes are separated from the main names with a slash
109 ("<code>/</code>") and mainly exist at all to make there be a one-to-one
110 mapping with static constants in the code that generates and interprets
111 executables (that is, to reduce ambiguity for humans).
113 <li>In the descriptions here, the width of a value (indicating, e.g., the
114 range of a constant or the number of registers possibly addressed) is
115 emphasized by the use of a character per four bits of width.
117 <li>For example, in the instruction
118 "<code>move-wide/from16 vAA, vBBBB</code>":
120 <li>"<code>move</code>" is the base opcode, indicating the base operation
121 (move a register's value).</li>
122 <li>"<code>wide</code>" is the name suffix, indicating that it operates
123 on wide (64 bit) data.</li>
124 <li>"<code>from16</code>" is the opcode suffix, indicating a variant
125 that has a 16-bit register reference as a source.</li>
126 <li>"<code>vAA</code>" is the destination register (implied by the
127 operation; again, the rule is that destination arguments always come
128 first), which must be in the range <code>v0</code> –
129 <code>v255</code>.</li>
130 <li>"<code>vBBBB</code>" is the source register, which must be in the
131 range <code>v0</code> – <code>v65535</code>.</li>
136 <li>See the <a href="instruction-formats.html">instruction formats
137 document</a> for more details about the various instruction formats
138 (listed under "Op & Format") as well as details about the opcode
141 <li>See the <a href="dex-format.html"><code>.dex</code> file format
142 document</a> for more details about where the bytecode fits into
147 <h2>Summary of Instruction Set</h2>
149 <table class="instruc">
152 <th>Op & Format</th>
153 <th>Mnemonic / Syntax</th>
165 Data-bearing pseudo-instructions are tagged with this opcode, in which
166 case the high-order byte of the opcode unit indicates the nature of
167 the data. See "<code>packed-switch</code> Format",
168 "<code>sparse-switch</code> Format", and
169 "<code>fill-array-data</code> Format" below.</p>
175 <td><code>A:</code> destination register (4 bits)<br/>
176 <code>B:</code> source register (4 bits)</td>
177 <td>Move the contents of one non-object register to another.</td>
181 <td>move/from16 vAA, vBBBB</td>
182 <td><code>A:</code> destination register (8 bits)<br/>
183 <code>B:</code> source register (16 bits)</td>
184 <td>Move the contents of one non-object register to another.</td>
188 <td>move/16 vAAAA, vBBBB</td>
189 <td><code>A:</code> destination register (16 bits)<br/>
190 <code>B:</code> source register (16 bits)</td>
191 <td>Move the contents of one non-object register to another.</td>
195 <td>move-wide vA, vB</td>
196 <td><code>A:</code> destination register pair (4 bits)<br/>
197 <code>B:</code> source register pair (4 bits)</td>
198 <td>Move the contents of one register-pair to another.
200 It is legal to move from <code>v<i>N</i></code> to either
201 <code>v<i>N-1</i></code> or <code>v<i>N+1</i></code>, so implementations
202 must arrange for both halves of a register pair to be read before
203 anything is written.</p>
208 <td>move-wide/from16 vAA, vBBBB</td>
209 <td><code>A:</code> destination register pair (8 bits)<br/>
210 <code>B:</code> source register pair (16 bits)</td>
211 <td>Move the contents of one register-pair to another.
213 Implementation considerations are the same as <code>move-wide</code>,
219 <td>move-wide/16 vAAAA, vBBBB</td>
220 <td><code>A:</code> destination register pair (16 bits)<br/>
221 <code>B:</code> source register pair (16 bits)</td>
222 <td>Move the contents of one register-pair to another.
224 Implementation considerations are the same as <code>move-wide</code>,
230 <td>move-object vA, vB</td>
231 <td><code>A:</code> destination register (4 bits)<br/>
232 <code>B:</code> source register (4 bits)</td>
233 <td>Move the contents of one object-bearing register to another.</td>
237 <td>move-object/from16 vAA, vBBBB</td>
238 <td><code>A:</code> destination register (8 bits)<br/>
239 <code>B:</code> source register (16 bits)</td>
240 <td>Move the contents of one object-bearing register to another.</td>
244 <td>move-object/16 vAAAA, vBBBB</td>
245 <td><code>A:</code> destination register (16 bits)<br/>
246 <code>B:</code> source register (16 bits)</td>
247 <td>Move the contents of one object-bearing register to another.</td>
251 <td>move-result vAA</td>
252 <td><code>A:</code> destination register (8 bits)</td>
253 <td>Move the single-word non-object result of the most recent
254 <code>invoke-<i>kind</i></code> into the indicated register.
255 This must be done as the instruction immediately after an
256 <code>invoke-<i>kind</i></code> whose (single-word, non-object) result
257 is not to be ignored; anywhere else is invalid.</td>
261 <td>move-result-wide vAA</td>
262 <td><code>A:</code> destination register pair (8 bits)</td>
263 <td>Move the double-word result of the most recent
264 <code>invoke-<i>kind</i></code> into the indicated register pair.
265 This must be done as the instruction immediately after an
266 <code>invoke-<i>kind</i></code> whose (double-word) result
267 is not to be ignored; anywhere else is invalid.</td>
271 <td>move-result-object vAA</td>
272 <td><code>A:</code> destination register (8 bits)</td>
273 <td>Move the object result of the most recent <code>invoke-<i>kind</i></code>
274 into the indicated register. This must be done as the instruction
275 immediately after an <code>invoke-<i>kind</i></code> or
276 <code>filled-new-array</code>
277 whose (object) result is not to be ignored; anywhere else is invalid.</td>
281 <td>move-exception vAA</td>
282 <td><code>A:</code> destination register (8 bits)</td>
283 <td>Save a just-caught exception into the given register. This must
284 be the first instruction of any exception handler whose caught
285 exception is not to be ignored, and this instruction must <i>only</i>
286 ever occur as the first instruction of an exception handler; anywhere
287 else is invalid.</td>
293 <td>Return from a <code>void</code> method.</td>
298 <td><code>A:</code> return value register (8 bits)</td>
299 <td>Return from a single-width (32-bit) non-object value-returning
305 <td>return-wide vAA</td>
306 <td><code>A:</code> return value register-pair (8 bits)</td>
307 <td>Return from a double-width (64-bit) value-returning method.</td>
311 <td>return-object vAA</td>
312 <td><code>A:</code> return value register (8 bits)</td>
313 <td>Return from an object-returning method.</td>
317 <td>const/4 vA, #+B</td>
318 <td><code>A:</code> destination register (4 bits)<br/>
319 <code>B:</code> signed int (4 bits)</td>
320 <td>Move the given literal value (sign-extended to 32 bits) into
321 the specified register.</td>
325 <td>const/16 vAA, #+BBBB</td>
326 <td><code>A:</code> destination register (8 bits)<br/>
327 <code>B:</code> signed int (16 bits)</td>
328 <td>Move the given literal value (sign-extended to 32 bits) into
329 the specified register.</td>
333 <td>const vAA, #+BBBBBBBB</td>
334 <td><code>A:</code> destination register (8 bits)<br/>
335 <code>B:</code> arbitrary 32-bit constant</td>
336 <td>Move the given literal value into the specified register.</td>
340 <td>const/high16 vAA, #+BBBB0000</td>
341 <td><code>A:</code> destination register (8 bits)<br/>
342 <code>B:</code> signed int (16 bits)</td>
343 <td>Move the given literal value (right-zero-extended to 32 bits) into
344 the specified register.</td>
348 <td>const-wide/16 vAA, #+BBBB</td>
349 <td><code>A:</code> destination register (8 bits)<br/>
350 <code>B:</code> signed int (16 bits)</td>
351 <td>Move the given literal value (sign-extended to 64 bits) into
352 the specified register-pair.</td>
356 <td>const-wide/32 vAA, #+BBBBBBBB</td>
357 <td><code>A:</code> destination register (8 bits)<br/>
358 <code>B:</code> signed int (32 bits)</td>
359 <td>Move the given literal value (sign-extended to 64 bits) into
360 the specified register-pair.</td>
364 <td>const-wide vAA, #+BBBBBBBBBBBBBBBB</td>
365 <td><code>A:</code> destination register (8 bits)<br/>
366 <code>B:</code> arbitrary double-width (64-bit) constant</td>
367 <td>Move the given literal value into
368 the specified register-pair.</td>
372 <td>const-wide/high16 vAA, #+BBBB000000000000</td>
373 <td><code>A:</code> destination register (8 bits)<br/>
374 <code>B:</code> signed int (16 bits)</td>
375 <td>Move the given literal value (right-zero-extended to 64 bits) into
376 the specified register-pair.</td>
380 <td>const-string vAA, string@BBBB</td>
381 <td><code>A:</code> destination register (8 bits)<br/>
382 <code>B:</code> string index</td>
383 <td>Move a reference to the string specified by the given index into the
384 specified register.</td>
388 <td>const-string/jumbo vAA, string@BBBBBBBB</td>
389 <td><code>A:</code> destination register (8 bits)<br/>
390 <code>B:</code> string index</td>
391 <td>Move a reference to the string specified by the given index into the
392 specified register.</td>
396 <td>const-class vAA, type@BBBB</td>
397 <td><code>A:</code> destination register (8 bits)<br/>
398 <code>B:</code> type index</td>
399 <td>Move a reference to the class specified by the given index into the
400 specified register. In the case where the indicated type is primitive,
401 this will store a reference to the primitive type's degenerate
406 <td>monitor-enter vAA</td>
407 <td><code>A:</code> reference-bearing register (8 bits)</td>
408 <td>Acquire the monitor for the indicated object.</td>
412 <td>monitor-exit vAA</td>
413 <td><code>A:</code> reference-bearing register (8 bits)</td>
414 <td>Release the monitor for the indicated object.
416 If this instruction needs to throw an exception, it must do
417 so as if the pc has already advanced past the instruction.
418 It may be useful to think of this as the instruction successfully
419 executing (in a sense), and the exception getting thrown <i>after</i>
420 the instruction but <i>before</i> the next one gets a chance to
421 run. This definition makes it possible for a method to use
422 a monitor cleanup catch-all (e.g., <code>finally</code>) block as
423 the monitor cleanup for that block itself, as a way to handle the
424 arbitrary exceptions that might get thrown due to the historical
425 implementation of <code>Thread.stop()</code>, while still managing
426 to have proper monitor hygiene.</p>
431 <td>check-cast vAA, type@BBBB</td>
432 <td><code>A:</code> reference-bearing register (8 bits)<br/>
433 <code>B:</code> type index (16 bits)</td>
434 <td>Throw a <code>ClassCastException</code> if the reference in the
435 given register cannot be cast to the indicated type.
436 <p><b>Note:</b> Since <code>A</code> must always be a reference
437 (and not a primitive value), this will necessarily fail at runtime
438 (that is, it will throw an exception) if <code>B</code> refers to a
444 <td>instance-of vA, vB, type@CCCC</td>
445 <td><code>A:</code> destination register (4 bits)<br/>
446 <code>B:</code> reference-bearing register (4 bits)<br/>
447 <code>C:</code> type index (16 bits)</td>
448 <td>Store in the given destination register <code>1</code>
449 if the indicated reference is an instance of the given type,
450 or <code>0</code> if not.
451 <p><b>Note:</b> Since <code>B</code> must always be a reference
452 (and not a primitive value), this will always result
453 in <code>0</code> being stored if <code>C</code> refers to a primitive
458 <td>array-length vA, vB</td>
459 <td><code>A:</code> destination register (4 bits)<br/>
460 <code>B:</code> array reference-bearing register (4 bits)</td>
461 <td>Store in the given destination register the length of the indicated
462 array, in entries</td>
466 <td>new-instance vAA, type@BBBB</td>
467 <td><code>A:</code> destination register (8 bits)<br/>
468 <code>B:</code> type index</td>
469 <td>Construct a new instance of the indicated type, storing a
470 reference to it in the destination. The type must refer to a
471 non-array class.</td>
475 <td>new-array vA, vB, type@CCCC</td>
476 <td><code>A:</code> destination register (8 bits)<br/>
477 <code>B:</code> size register<br/>
478 <code>C:</code> type index</td>
479 <td>Construct a new array of the indicated type and size. The type
480 must be an array type.</td>
484 <td>filled-new-array {vD, vE, vF, vG, vA}, type@CCCC</td>
485 <td><code>B:</code> array size and argument word count (4 bits)<br/>
486 <code>C:</code> type index (16 bits)<br/>
487 <code>D..G, A:</code> argument registers (4 bits each)</td>
488 <td>Construct an array of the given type and size, filling it with the
489 supplied contents. The type must be an array type. The array's
490 contents must be single-word (that is,
491 no arrays of <code>long</code> or <code>double</code>, but reference
492 types are acceptable). The constructed
493 instance is stored as a "result" in the same way that the method invocation
494 instructions store their results, so the constructed instance must
495 be moved to a register with an immediately subsequent
496 <code>move-result-object</code> instruction (if it is to be used).</td>
500 <td>filled-new-array/range {vCCCC .. vNNNN}, type@BBBB</td>
501 <td><code>A:</code> array size and argument word count (8 bits)<br/>
502 <code>B:</code> type index (16 bits)<br/>
503 <code>C:</code> first argument register (16 bits)<br/>
504 <code>N = A + C - 1</code></td>
505 <td>Construct an array of the given type and size, filling it with
506 the supplied contents. Clarifications and restrictions are the same
507 as <code>filled-new-array</code>, described above.</td>
511 <td>fill-array-data vAA, +BBBBBBBB <i>(with supplemental data as specified
512 below in "<code>fill-array-data</code> Format")</i></td>
513 <td><code>A:</code> array reference (8 bits)<br/>
514 <code>B:</code> signed "branch" offset to table data pseudo-instruction
517 <td>Fill the given array with the indicated data. The reference must be
518 to an array of primitives, and the data table must match it in type and
519 must contain no more elements than will fit in the array. That is,
520 the array may be larger than the table, and if so, only the initial
521 elements of the array are set, leaving the remainder alone.
527 <td><code>A:</code> exception-bearing register (8 bits)<br/></td>
528 <td>Throw the indicated exception.</td>
533 <td><code>A:</code> signed branch offset (8 bits)</td>
534 <td>Unconditionally jump to the indicated instruction.
536 The branch offset must not be <code>0</code>. (A spin
537 loop may be legally constructed either with <code>goto/32</code> or
538 by including a <code>nop</code> as a target before the branch.)</p>
543 <td>goto/16 +AAAA</td>
544 <td><code>A:</code> signed branch offset (16 bits)<br/></td>
545 <td>Unconditionally jump to the indicated instruction.
547 The branch offset must not be <code>0</code>. (A spin
548 loop may be legally constructed either with <code>goto/32</code> or
549 by including a <code>nop</code> as a target before the branch.)</p>
554 <td>goto/32 +AAAAAAAA</td>
555 <td><code>A:</code> signed branch offset (32 bits)<br/></td>
556 <td>Unconditionally jump to the indicated instruction.</td>
560 <td>packed-switch vAA, +BBBBBBBB <i>(with supplemental data as
561 specified below in "<code>packed-switch</code> Format")</i></td>
562 <td><code>A:</code> register to test<br/>
563 <code>B:</code> signed "branch" offset to table data pseudo-instruction
566 <td>Jump to a new instruction based on the value in the
567 given register, using a table of offsets corresponding to each value
568 in a particular integral range, or fall through to the next
569 instruction if there is no match.
574 <td>sparse-switch vAA, +BBBBBBBB <i>(with supplemental data as
575 specified below in "<code>sparse-switch</code> Format")</i></td>
576 <td><code>A:</code> register to test<br/>
577 <code>B:</code> signed "branch" offset to table data pseudo-instruction
580 <td>Jump to a new instruction based on the value in the given
581 register, using an ordered table of value-offset pairs, or fall
582 through to the next instruction if there is no match.
587 <td>cmp<i>kind</i> vAA, vBB, vCC<br/>
588 2d: cmpl-float <i>(lt bias)</i><br/>
589 2e: cmpg-float <i>(gt bias)</i><br/>
590 2f: cmpl-double <i>(lt bias)</i><br/>
591 30: cmpg-double <i>(gt bias)</i><br/>
594 <td><code>A:</code> destination register (8 bits)<br/>
595 <code>B:</code> first source register or pair<br/>
596 <code>C:</code> second source register or pair</td>
597 <td>Perform the indicated floating point or <code>long</code> comparison,
598 storing <code>0</code> if the two arguments are equal, <code>1</code>
599 if the second argument is larger, or <code>-1</code> if the first
600 argument is larger. The "bias" listed for the floating point operations
601 indicates how <code>NaN</code> comparisons are treated: "Gt bias"
602 instructions return <code>1</code> for <code>NaN</code> comparisons,
603 and "lt bias" instructions return
605 <p>For example, to check to see if floating point
606 <code>a < b</code>, then it is advisable to use
607 <code>cmpg-float</code>; a result of <code>-1</code> indicates that
608 the test was true, and the other values indicate it was false either
609 due to a valid comparison or because one or the other values was
610 <code>NaN</code>.</p>
615 <td>if-<i>test</i> vA, vB, +CCCC<br/>
623 <td><code>A:</code> first register to test (4 bits)<br/>
624 <code>B:</code> second register to test (4 bits)<br/>
625 <code>C:</code> signed branch offset (16 bits)</td>
626 <td>Branch to the given destination if the given two registers' values
627 compare as specified.
629 The branch offset must not be <code>0</code>. (A spin
630 loop may be legally constructed either by branching around a
631 backward <code>goto</code> or by including a <code>nop</code> as
632 a target before the branch.)</p>
637 <td>if-<i>test</i>z vAA, +BBBB<br/>
645 <td><code>A:</code> register to test (8 bits)<br/>
646 <code>B:</code> signed branch offset (16 bits)</td>
647 <td>Branch to the given destination if the given register's value compares
650 The branch offset must not be <code>0</code>. (A spin
651 loop may be legally constructed either by branching around a
652 backward <code>goto</code> or by including a <code>nop</code> as
653 a target before the branch.)</p>
658 <td><i>(unused)</i></td>
660 <td><i>(unused)</i></td>
664 <td><i>arrayop</i> vAA, vBB, vCC<br/>
668 47: aget-boolean<br/>
675 4e: aput-boolean<br/>
680 <td><code>A:</code> value register or pair; may be source or dest
682 <code>B:</code> array register (8 bits)<br/>
683 <code>C:</code> index register (8 bits)</td>
684 <td>Perform the identified array operation at the identified index of
685 the given array, loading or storing into the value register.</td>
689 <td>i<i>instanceop</i> vA, vB, field@CCCC<br/>
693 55: iget-boolean<br/>
700 5c: iput-boolean<br/>
705 <td><code>A:</code> value register or pair; may be source or dest
707 <code>B:</code> object register (4 bits)<br/>
708 <code>C:</code> instance field reference index (16 bits)</td>
709 <td>Perform the identified object instance field operation with
710 the identified field, loading or storing into the value register.
711 <p><b>Note:</b> These opcodes are reasonable candidates for static linking,
712 altering the field argument to be a more direct offset.</p>
717 <td>s<i>staticop</i> vAA, field@BBBB<br/>
721 63: sget-boolean<br/>
728 6a: sput-boolean<br/>
733 <td><code>A:</code> value register or pair; may be source or dest
735 <code>B:</code> static field reference index (16 bits)</td>
736 <td>Perform the identified object static field operation with the identified
737 static field, loading or storing into the value register.
738 <p><b>Note:</b> These opcodes are reasonable candidates for static linking,
739 altering the field argument to be a more direct offset.</p>
744 <td>invoke-<i>kind</i> {vD, vE, vF, vG, vA}, meth@CCCC<br/>
745 6e: invoke-virtual<br/>
746 6f: invoke-super<br/>
747 70: invoke-direct<br/>
748 71: invoke-static<br/>
751 <td><code>B:</code> argument word count (4 bits)<br/>
752 <code>C:</code> method reference index (16 bits)<br/>
753 <code>D..G, A:</code> argument registers (4 bits each)</td>
754 <td>Call the indicated method. The result (if any) may be stored
755 with an appropriate <code>move-result*</code> variant as the immediately
756 subsequent instruction.
757 <p><code>invoke-virtual</code> is used to invoke a normal virtual
758 method (a method that is not <code>private</code>, <code>static</code>,
759 or <code>final</code>, and is also not a constructor).</p>
760 <p><code>invoke-super</code> is used to invoke the closest superclass's
761 virtual method (as opposed to the one with the same <code>method_id</code>
762 in the calling class). The same method restrictions hold as for
763 <code>invoke-virtual</code>.</p>
764 <p><code>invoke-direct</code> is used to invoke a non-<code>static</code>
765 direct method (that is, an instance method that is by its nature
766 non-overridable, namely either a <code>private</code> instance method
767 or a constructor).</p>
768 <p><code>invoke-static</code> is used to invoke a <code>static</code>
769 method (which is always considered a direct method).</p>
770 <p><code>invoke-interface</code> is used to invoke an
771 <code>interface</code> method, that is, on an object whose concrete
772 class isn't known, using a <code>method_id</code> that refers to
773 an <code>interface</code>.</p>
774 <p><b>Note:</b> These opcodes are reasonable candidates for static linking,
775 altering the method argument to be a more direct offset
776 (or pair thereof).</p>
781 <td><i>(unused)</i></td>
783 <td><i>(unused)</i></td>
787 <td>invoke-<i>kind</i>/range {vCCCC .. vNNNN}, meth@BBBB<br/>
788 74: invoke-virtual/range<br/>
789 75: invoke-super/range<br/>
790 76: invoke-direct/range<br/>
791 77: invoke-static/range<br/>
792 78: invoke-interface/range
794 <td><code>A:</code> argument word count (8 bits)<br/>
795 <code>B:</code> method reference index (16 bits)<br/>
796 <code>C:</code> first argument register (16 bits)<br/>
797 <code>N = A + C - 1</code></td>
798 <td>Call the indicated method. See first <code>invoke-<i>kind</i></code>
799 description above for details, caveats, and suggestions.
804 <td><i>(unused)</i></td>
806 <td><i>(unused)</i></td>
810 <td><i>unop</i> vA, vB<br/>
818 82: int-to-float<br/>
819 83: int-to-double<br/>
821 85: long-to-float<br/>
822 86: long-to-double<br/>
823 87: float-to-int<br/>
824 88: float-to-long<br/>
825 89: float-to-double<br/>
826 8a: double-to-int<br/>
827 8b: double-to-long<br/>
828 8c: double-to-float<br/>
833 <td><code>A:</code> destination register or pair (4 bits)<br/>
834 <code>B:</code> source register or pair (4 bits)</td>
835 <td>Perform the identified unary operation on the source register,
836 storing the result in the destination register.</td>
841 <td><i>binop</i> vAA, vBB, vCC<br/>
875 <td><code>A:</code> destination register or pair (8 bits)<br/>
876 <code>B:</code> first source register or pair (8 bits)<br/>
877 <code>C:</code> second source register or pair (8 bits)</td>
878 <td>Perform the identified binary operation on the two source registers,
879 storing the result in the first source register.</td>
883 <td><i>binop</i>/2addr vA, vB<br/>
884 b0: add-int/2addr<br/>
885 b1: sub-int/2addr<br/>
886 b2: mul-int/2addr<br/>
887 b3: div-int/2addr<br/>
888 b4: rem-int/2addr<br/>
889 b5: and-int/2addr<br/>
890 b6: or-int/2addr<br/>
891 b7: xor-int/2addr<br/>
892 b8: shl-int/2addr<br/>
893 b9: shr-int/2addr<br/>
894 ba: ushr-int/2addr<br/>
895 bb: add-long/2addr<br/>
896 bc: sub-long/2addr<br/>
897 bd: mul-long/2addr<br/>
898 be: div-long/2addr<br/>
899 bf: rem-long/2addr<br/>
900 c0: and-long/2addr<br/>
901 c1: or-long/2addr<br/>
902 c2: xor-long/2addr<br/>
903 c3: shl-long/2addr<br/>
904 c4: shr-long/2addr<br/>
905 c5: ushr-long/2addr<br/>
906 c6: add-float/2addr<br/>
907 c7: sub-float/2addr<br/>
908 c8: mul-float/2addr<br/>
909 c9: div-float/2addr<br/>
910 ca: rem-float/2addr<br/>
911 cb: add-double/2addr<br/>
912 cc: sub-double/2addr<br/>
913 cd: mul-double/2addr<br/>
914 ce: div-double/2addr<br/>
917 <td><code>A:</code> destination and first source register or pair
919 <code>B:</code> second source register or pair (4 bits)</td>
920 <td>Perform the identified binary operation on the two source registers,
921 storing the result in the first source register.</td>
925 <td><i>binop</i>/lit16 vA, vB, #+CCCC<br/>
926 d0: add-int/lit16<br/>
927 d1: rsub-int (reverse subtract)<br/>
928 d2: mul-int/lit16<br/>
929 d3: div-int/lit16<br/>
930 d4: rem-int/lit16<br/>
931 d5: and-int/lit16<br/>
932 d6: or-int/lit16<br/>
935 <td><code>A:</code> destination register (4 bits)<br/>
936 <code>B:</code> source register (4 bits)<br/>
937 <code>C:</code> signed int constant (16 bits)</td>
938 <td>Perform the indicated binary op on the indicated register (first
939 argument) and literal value (second argument), storing the result in
940 the destination register.
942 <code>rsub-int</code> does not have a suffix since this version is the
943 main opcode of its family. Also, see below for details on its semantics.
949 <td><i>binop</i>/lit8 vAA, vBB, #+CC<br/>
950 d8: add-int/lit8<br/>
951 d9: rsub-int/lit8<br/>
952 da: mul-int/lit8<br/>
953 db: div-int/lit8<br/>
954 dc: rem-int/lit8<br/>
955 dd: and-int/lit8<br/>
957 df: xor-int/lit8<br/>
958 e0: shl-int/lit8<br/>
959 e1: shr-int/lit8<br/>
962 <td><code>A:</code> destination register (8 bits)<br/>
963 <code>B:</code> source register (8 bits)<br/>
964 <code>C:</code> signed int constant (8 bits)</td>
965 <td>Perform the indicated binary op on the indicated register (first
966 argument) and literal value (second argument), storing the result
967 in the destination register.
968 <p><b>Note:</b> See below for details on the semantics of
969 <code>rsub-int</code>.</p>
974 <td><i>(unused)</i></td>
976 <td><i>(unused)</i></td>
980 <td><i>(expanded opcode)</i></td>
982 <td>An <code>ff</code> in the primary opcode position indicates that there
983 is a secondary opcode in the high-order byte of the opcode code unit,
984 as opposed to an argument value. These expanded opcodes are detailed
990 <td>const-class/jumbo vBBBB, type@AAAAAAAA</td>
991 <td><code>A:</code> type index (32 bits)<br/>
992 <code>B:</code> destination register (16 bits)</td>
993 <td>Move a reference to the class specified by the given index into the
994 specified register. See <code>const-class</code> description above
995 for details, caveats, and suggestions.
1000 <td>check-cast/jumbo vBBBB, type@AAAAAAAA</td>
1001 <td><code>A:</code> type index (32 bits)<br/>
1002 <code>B:</code> reference-bearing register (16 bits)
1004 <td>Throw a <code>ClassCastException</code> if the reference in the
1005 given register cannot be cast to the indicated type. See
1006 <code>check-cast</code> description above for details,
1007 caveats, and suggestions.
1012 <td>instance-of/jumbo vBBBB, vCCCC, type@AAAAAAAA</td>
1013 <td><code>A:</code> type index (32 bits)<br/>
1014 <code>B:</code> destination register (16 bits)<br/>
1015 <code>C:</code> reference-bearing register (16 bits)
1017 <td>Store in the given destination register <code>1</code>
1018 if the indicated reference is an instance of the given type,
1019 or <code>0</code> if not. See
1020 <code>instance-of</code> description above for details,
1021 caveats, and suggestions.
1026 <td>new-instance/jumbo vBBBB, type@AAAAAAAA</td>
1027 <td><code>A:</code> type index (32 bits)<br/>
1028 <code>B:</code> destination register (16 bits)
1030 <td>Construct a new instance of the indicated type. See
1031 <code>new-instance</code> description above for details,
1032 caveats, and suggestions.
1037 <td>new-array/jumbo vBBBB, vCCCC, type@AAAAAAAA</td>
1038 <td><code>A:</code> type index (32 bits)<br/>
1039 <code>B:</code> destination register (16 bits)<br/>
1040 <code>C:</code> size register (16 bits)
1042 <td>Construct a new array of the indicated type and size. See
1043 <code>new-array</code> description above for details,
1044 caveats, and suggestions.
1049 <td>filled-new-array/jumbo {vCCCC .. vNNNN}, type@AAAAAAAA</td>
1050 <td><code>A:</code> type index (32 bits)<br/>
1051 <code>B:</code> array size and argument word count (16 bits)<br/>
1052 <code>C:</code> first argument register (16 bits)<br/>
1053 <code>N = B + C - 1</code>
1055 <td>Construct an array of the given type and size, filling it with the
1056 supplied contents. See first
1057 <code>filled-new-array</code> description above for details,
1058 caveats, and suggestions.
1062 <td>06ff..13ff 52c</td>
1063 <td>i<i>instanceop</i>/jumbo vBBBB, vCCCC, field@AAAAAAAA<br/>
1064 06ff: iget/jumbo<br/>
1065 07ff: iget-wide/jumbo<br/>
1066 08ff: iget-object/jumbo<br/>
1067 09ff: iget-boolean/jumbo<br/>
1068 0aff: iget-byte/jumbo<br/>
1069 0bff: iget-char/jumbo<br/>
1070 0cff: iget-short/jumbo<br/>
1071 0dff: iput/jumbo<br/>
1072 0eff: iput-wide/jumbo<br/>
1073 0fff: iput-object/jumbo<br/>
1074 10ff: iput-boolean/jumbo<br/>
1075 11ff: iput-byte/jumbo<br/>
1076 12ff: iput-char/jumbo<br/>
1077 13ff: iput-short/jumbo
1079 <td><code>A:</code> instance field reference index (32 bits)<br/>
1080 <code>B:</code> value register or pair; may be source or dest
1082 <code>C:</code> object register (16 bits)
1084 <td>Perform the identified object instance field operation. See
1085 <code>i<i>instanceop</i></code> description above for details,
1086 caveats, and suggestions.
1090 <td>14ff..21ff 41c</td>
1091 <td>s<i>staticop</i>/jumbo vBBBB, field@AAAAAAAA<br/>
1092 14ff: sget/jumbo<br/>
1093 15ff: sget-wide/jumbo<br/>
1094 16ff: sget-object/jumbo<br/>
1095 17ff: sget-boolean/jumbo<br/>
1096 18ff: sget-byte/jumbo<br/>
1097 19ff: sget-char/jumbo<br/>
1098 1aff: sget-short/jumbo<br/>
1099 1bff: sput/jumbo<br/>
1100 1cff: sput-wide/jumbo<br/>
1101 1dff: sput-object/jumbo<br/>
1102 1eff: sput-boolean/jumbo<br/>
1103 1fff: sput-byte/jumbo<br/>
1104 20ff: sput-char/jumbo<br/>
1105 21ff: sput-short/jumbo
1107 <td><code>A:</code> instance field reference index (32 bits)<br/>
1108 <code>B:</code> value register or pair; may be source or dest
1111 <td>Perform the identified object static field operation. See
1112 <code>s<i>staticop</i></code> description above for details,
1113 caveats, and suggestions.
1117 <td>22ff..26ff 5rc</td>
1118 <td>invoke-<i>kind</i>/jumbo {vCCCC .. vNNNN}, meth@AAAAAAAA<br/>
1119 22ff: invoke-virtual/jumbo<br/>
1120 23ff: invoke-super/jumbo<br/>
1121 24ff: invoke-direct/jumbo<br/>
1122 25ff: invoke-static/jumbo<br/>
1123 26ff: invoke-interface/jumbo
1125 <td><code>A:</code> method reference index (32 bits)<br/>
1126 <code>B:</code> argument word count (16 bits)<br/>
1127 <code>C:</code> first argument register (16 bits)<br/>
1128 <code>N = B + C - 1</code>
1130 <td>Call the indicated method. See first <code>invoke-<i>kind</i></code>
1131 description above for details, caveats, and suggestions.
1137 <h2><code>packed-switch</code> Format</h2>
1139 <table class="supplement">
1144 <th>Description</th>
1150 <td>ushort = 0x0100</td>
1151 <td>identifying pseudo-opcode</td>
1156 <td>number of entries in the table</td>
1161 <td>first (and lowest) switch case value</td>
1166 <td>list of <code>size</code> relative branch targets. The targets are
1167 relative to the address of the switch opcode, not of this table.
1173 <p><b>Note:</b> The total number of code units for an instance of this
1174 table is <code>(size * 2) + 4</code>.</p>
1176 <h2><code>sparse-switch</code> Format</h2>
1178 <table class="supplement">
1183 <th>Description</th>
1189 <td>ushort = 0x0200</td>
1190 <td>identifying pseudo-opcode</td>
1195 <td>number of entries in the table</td>
1200 <td>list of <code>size</code> key values, sorted low-to-high</td>
1205 <td>list of <code>size</code> relative branch targets, each corresponding
1206 to the key value at the same index. The targets are
1207 relative to the address of the switch opcode, not of this table.
1213 <p><b>Note:</b> The total number of code units for an instance of this
1214 table is <code>(size * 4) + 2</code>.</p>
1216 <h2><code>fill-array-data</code> Format</h2>
1218 <table class="supplement">
1223 <th>Description</th>
1229 <td>ushort = 0x0300</td>
1230 <td>identifying pseudo-opcode</td>
1233 <td>element_width</td>
1235 <td>number of bytes in each element</td>
1240 <td>number of elements in the table</td>
1245 <td>data values</td>
1250 <p><b>Note:</b> The total number of code units for an instance of this
1251 table is <code>(size * element_width + 1) / 2 + 4</code>.</p>
1254 <h2>Mathematical Operation Details</h2>
1256 <p><b>Note:</b> Floating point operations must follow IEEE 754 rules, using
1257 round-to-nearest and gradual underflow, except where stated otherwise.</p>
1259 <table class="math">
1263 <th>C Semantics</th>
1273 <td>Unary twos-complement.</td>
1280 <td>Unary ones-complement.</td>
1287 <td>Unary twos-complement.</td>
1294 <td>Unary ones-complement.</td>
1301 <td>Floating point negation.</td>
1308 <td>Floating point negation.</td>
1311 <td>int-to-long</td>
1313 int64 result = (int64) a;
1315 <td>Sign extension of <code>int32</code> into <code>int64</code>.</td>
1318 <td>int-to-float</td>
1320 float result = (float) a;
1322 <td>Conversion of <code>int32</code> to <code>float</code>, using
1323 round-to-nearest. This loses precision for some values.
1327 <td>int-to-double</td>
1329 double result = (double) a;
1331 <td>Conversion of <code>int32</code> to <code>double</code>.</td>
1334 <td>long-to-int</td>
1336 int32 result = (int32) a;
1338 <td>Truncation of <code>int64</code> into <code>int32</code>.</td>
1341 <td>long-to-float</td>
1343 float result = (float) a;
1345 <td>Conversion of <code>int64</code> to <code>float</code>, using
1346 round-to-nearest. This loses precision for some values.
1350 <td>long-to-double</td>
1352 double result = (double) a;
1354 <td>Conversion of <code>int64</code> to <code>double</code>, using
1355 round-to-nearest. This loses precision for some values.
1359 <td>float-to-int</td>
1361 int32 result = (int32) a;
1363 <td>Conversion of <code>float</code> to <code>int32</code>, using
1364 round-toward-zero. <code>NaN</code> and <code>-0.0</code> (negative zero)
1365 convert to the integer <code>0</code>. Infinities and values with
1366 too large a magnitude to be represented get converted to either
1367 <code>0x7fffffff</code> or <code>-0x80000000</code> depending on sign.
1371 <td>float-to-long</td>
1373 int64 result = (int64) a;
1375 <td>Conversion of <code>float</code> to <code>int64</code>, using
1376 round-toward-zero. The same special case rules as for
1377 <code>float-to-int</code> apply here, except that out-of-range values
1378 get converted to either <code>0x7fffffffffffffff</code> or
1379 <code>-0x8000000000000000</code> depending on sign.
1383 <td>float-to-double</td>
1385 double result = (double) a;
1387 <td>Conversion of <code>float</code> to <code>double</code>, preserving
1392 <td>double-to-int</td>
1394 int32 result = (int32) a;
1396 <td>Conversion of <code>double</code> to <code>int32</code>, using
1397 round-toward-zero. The same special case rules as for
1398 <code>float-to-int</code> apply here.
1402 <td>double-to-long</td>
1404 int64 result = (int64) a;
1406 <td>Conversion of <code>double</code> to <code>int64</code>, using
1407 round-toward-zero. The same special case rules as for
1408 <code>float-to-long</code> apply here.
1412 <td>double-to-float</td>
1414 float result = (float) a;
1416 <td>Conversion of <code>double</code> to <code>float</code>, using
1417 round-to-nearest. This loses precision for some values.
1421 <td>int-to-byte</td>
1423 int32 result = (a << 24) >> 24;
1425 <td>Truncation of <code>int32</code> to <code>int8</code>, sign
1426 extending the result.
1430 <td>int-to-char</td>
1432 int32 result = a & 0xffff;
1434 <td>Truncation of <code>int32</code> to <code>uint16</code>, without
1439 <td>int-to-short</td>
1441 int32 result = (a << 16) >> 16;
1443 <td>Truncation of <code>int32</code> to <code>int16</code>, sign
1444 extending the result.
1449 <td>int32 a, b;<br/>
1450 int32 result = a + b;
1452 <td>Twos-complement addition.</td>
1456 <td>int32 a, b;<br/>
1457 int32 result = a - b;
1459 <td>Twos-complement subtraction.</td>
1463 <td>int32 a, b;<br/>
1464 int32 result = b - a;
1466 <td>Twos-complement reverse subtraction.</td>
1470 <td>int32 a, b;<br/>
1471 int32 result = a * b;
1473 <td>Twos-complement multiplication.</td>
1477 <td>int32 a, b;<br/>
1478 int32 result = a / b;
1480 <td>Twos-complement division, rounded towards zero (that is, truncated to
1481 integer). This throws <code>ArithmeticException</code> if
1482 <code>b == 0</code>.
1487 <td>int32 a, b;<br/>
1488 int32 result = a % b;
1490 <td>Twos-complement remainder after division. The sign of the result
1491 is the same as that of <code>a</code>, and it is more precisely
1492 defined as <code>result == a - (a / b) * b</code>. This throws
1493 <code>ArithmeticException</code> if <code>b == 0</code>.
1498 <td>int32 a, b;<br/>
1499 int32 result = a & b;
1501 <td>Bitwise AND.</td>
1505 <td>int32 a, b;<br/>
1506 int32 result = a | b;
1508 <td>Bitwise OR.</td>
1512 <td>int32 a, b;<br/>
1513 int32 result = a ^ b;
1515 <td>Bitwise XOR.</td>
1519 <td>int32 a, b;<br/>
1520 int32 result = a << (b & 0x1f);
1522 <td>Bitwise shift left (with masked argument).</td>
1526 <td>int32 a, b;<br/>
1527 int32 result = a >> (b & 0x1f);
1529 <td>Bitwise signed shift right (with masked argument).</td>
1533 <td>uint32 a, b;<br/>
1534 int32 result = a >> (b & 0x1f);
1536 <td>Bitwise unsigned shift right (with masked argument).</td>
1540 <td>int64 a, b;<br/>
1541 int64 result = a + b;
1543 <td>Twos-complement addition.</td>
1547 <td>int64 a, b;<br/>
1548 int64 result = a - b;
1550 <td>Twos-complement subtraction.</td>
1554 <td>int64 a, b;<br/>
1555 int64 result = a * b;
1557 <td>Twos-complement multiplication.</td>
1561 <td>int64 a, b;<br/>
1562 int64 result = a / b;
1564 <td>Twos-complement division, rounded towards zero (that is, truncated to
1565 integer). This throws <code>ArithmeticException</code> if
1566 <code>b == 0</code>.
1571 <td>int64 a, b;<br/>
1572 int64 result = a % b;
1574 <td>Twos-complement remainder after division. The sign of the result
1575 is the same as that of <code>a</code>, and it is more precisely
1576 defined as <code>result == a - (a / b) * b</code>. This throws
1577 <code>ArithmeticException</code> if <code>b == 0</code>.
1582 <td>int64 a, b;<br/>
1583 int64 result = a & b;
1585 <td>Bitwise AND.</td>
1589 <td>int64 a, b;<br/>
1590 int64 result = a | b;
1592 <td>Bitwise OR.</td>
1596 <td>int64 a, b;<br/>
1597 int64 result = a ^ b;
1599 <td>Bitwise XOR.</td>
1603 <td>int64 a, b;<br/>
1604 int64 result = a << (b & 0x3f);
1606 <td>Bitwise shift left (with masked argument).</td>
1610 <td>int64 a, b;<br/>
1611 int64 result = a >> (b & 0x3f);
1613 <td>Bitwise signed shift right (with masked argument).</td>
1617 <td>uint64 a, b;<br/>
1618 int64 result = a >> (b & 0x3f);
1620 <td>Bitwise unsigned shift right (with masked argument).</td>
1624 <td>float a, b;<br/>
1625 float result = a + b;
1627 <td>Floating point addition.</td>
1631 <td>float a, b;<br/>
1632 float result = a - b;
1634 <td>Floating point subtraction.</td>
1638 <td>float a, b;<br/>
1639 float result = a * b;
1641 <td>Floating point multiplication.</td>
1645 <td>float a, b;<br/>
1646 float result = a / b;
1648 <td>Floating point division.</td>
1652 <td>float a, b;<br/>
1653 float result = a % b;
1655 <td>Floating point remainder after division. This function is different
1656 than IEEE 754 remainder and is defined as
1657 <code>result == a - roundTowardZero(a / b) * b</code>.
1662 <td>double a, b;<br/>
1663 double result = a + b;
1665 <td>Floating point addition.</td>
1669 <td>double a, b;<br/>
1670 double result = a - b;
1672 <td>Floating point subtraction.</td>
1676 <td>double a, b;<br/>
1677 double result = a * b;
1679 <td>Floating point multiplication.</td>
1683 <td>double a, b;<br/>
1684 double result = a / b;
1686 <td>Floating point division.</td>
1690 <td>double a, b;<br/>
1691 double result = a % b;
1693 <td>Floating point remainder after division. This function is different
1694 than IEEE 754 remainder and is defined as
1695 <code>result == a - roundTowardZero(a / b) * b</code>.