2 /* drivers/atm/firestream.c - FireStream 155 (MB86697) and
3 * FireStream 50 (MB86695) device driver
6 /* Written & (C) 2000 by R.E.Wolff@BitWizard.nl
7 * Copied snippets from zatm.c by Werner Almesberger, EPFL LRC/ICA
8 * and ambassador.c Copyright (C) 1995-1999 Madge Networks Ltd
12 This program is free software; you can redistribute it and/or modify
13 it under the terms of the GNU General Public License as published by
14 the Free Software Foundation; either version 2 of the License, or
15 (at your option) any later version.
17 This program is distributed in the hope that it will be useful,
18 but WITHOUT ANY WARRANTY; without even the implied warranty of
19 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 GNU General Public License for more details.
22 You should have received a copy of the GNU General Public License
23 along with this program; if not, write to the Free Software
24 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
26 The GNU GPL is contained in /usr/doc/copyright/GPL on a Debian
27 system and in the file COPYING in the Linux kernel source.
31 #include <linux/module.h>
32 #include <linux/sched.h>
33 #include <linux/kernel.h>
35 #include <linux/pci.h>
36 #include <linux/poison.h>
37 #include <linux/errno.h>
38 #include <linux/atm.h>
39 #include <linux/atmdev.h>
40 #include <linux/sonet.h>
41 #include <linux/skbuff.h>
42 #include <linux/netdevice.h>
43 #include <linux/delay.h>
44 #include <linux/ioport.h> /* for request_region */
45 #include <linux/uio.h>
46 #include <linux/init.h>
47 #include <linux/interrupt.h>
48 #include <linux/capability.h>
49 #include <linux/bitops.h>
50 #include <linux/slab.h>
51 #include <asm/byteorder.h>
52 #include <asm/string.h>
54 #include <linux/atomic.h>
55 #include <asm/uaccess.h>
56 #include <linux/wait.h>
58 #include "firestream.h"
60 static int loopback = 0;
63 /* According to measurements (but they look suspicious to me!) done in
64 * '97, 37% of the packets are one cell in size. So it pays to have
65 * buffers allocated at that size. A large jump in percentage of
66 * packets occurs at packets around 536 bytes in length. So it also
67 * pays to have those pre-allocated. Unfortunately, we can't fully
68 * take advantage of this as the majority of the packets is likely to
69 * be TCP/IP (As where obviously the measurement comes from) There the
70 * link would be opened with say a 1500 byte MTU, and we can't handle
71 * smaller buffers more efficiently than the larger ones. -- REW
74 /* Due to the way Linux memory management works, specifying "576" as
75 * an allocation size here isn't going to help. They are allocated
76 * from 1024-byte regions anyway. With the size of the sk_buffs (quite
77 * large), it doesn't pay to allocate the smallest size (64) -- REW */
79 /* This is all guesswork. Hard numbers to back this up or disprove this,
80 * are appreciated. -- REW */
82 /* The last entry should be about 64k. However, the "buffer size" is
83 * passed to the chip in a 16 bit field. I don't know how "65536"
84 * would be interpreted. -- REW */
86 #define NP FS_NR_FREE_POOLS
87 static int rx_buf_sizes[NP] = {128, 256, 512, 1024, 2048, 4096, 16384, 65520};
88 /* log2: 7 8 9 10 11 12 14 16 */
91 static int rx_pool_sizes[NP] = {1024, 1024, 512, 256, 128, 64, 32, 32};
94 static int rx_pool_sizes[NP] = {128, 128, 128, 64, 64, 64, 32, 32};
96 /* log2: 10 10 9 8 7 6 5 5 */
97 /* sumlog2: 17 18 18 18 18 18 19 21 */
98 /* mem allocated: 128k 256k 256k 256k 256k 256k 512k 2M */
99 /* tot mem: almost 4M */
101 /* NP is shorter, so that it fits on a single line. */
105 /* Small hardware gotcha:
107 The FS50 CAM (VP/VC match registers) always take the lowest channel
108 number that matches. This is not a problem.
110 However, they also ignore whether the channel is enabled or
111 not. This means that if you allocate channel 0 to 1.2 and then
112 channel 1 to 0.0, then disabeling channel 0 and writing 0 to the
113 match channel for channel 0 will "steal" the traffic from channel
114 1, even if you correctly disable channel 0.
118 - When disabling channels, write an invalid VP/VC value to the
119 match register. (We use 0xffffffff, which in the worst case
120 matches VP/VC = <maxVP>/<maxVC>, but I expect it not to match
121 anything as some "when not in use, program to 0" bits are now
124 - Don't initialize the match registers to 0, as 0.0 is a valid
129 /* Optimization hints and tips.
131 The FireStream chips are very capable of reducing the amount of
132 "interrupt-traffic" for the CPU. This driver requests an interrupt on EVERY
133 action. You could try to minimize this a bit.
135 Besides that, the userspace->kernel copy and the PCI bus are the
136 performance limiting issues for this driver.
138 You could queue up a bunch of outgoing packets without telling the
139 FireStream. I'm not sure that's going to win you much though. The
140 Linux layer won't tell us in advance when it's not going to give us
141 any more packets in a while. So this is tricky to implement right without
142 introducing extra delays.
150 /* The strings that define what the RX queue entry is all about. */
151 /* Fujitsu: Please tell me which ones can have a pointer to a
152 freepool descriptor! */
153 static char *res_strings[] = {
154 "RX OK: streaming not EOP",
155 "RX OK: streaming EOP",
156 "RX OK: Single buffer packet",
157 "RX OK: packet mode",
158 "RX OK: F4 OAM (end to end)",
159 "RX OK: F4 OAM (Segment)",
160 "RX OK: F5 OAM (end to end)",
161 "RX OK: F5 OAM (Segment)",
163 "RX OK: TRANSP cell",
164 "RX OK: TRANSPC cell",
171 "reassemby abort: AAL5 abort",
173 "packet ageing timeout",
174 "channel ageing timeout",
175 "calculated length error",
176 "programmed length limit error",
178 "oam transp or transpc crc10 error",
185 "reassembly abort: no buffers",
186 "receive buffer overflow",
188 "receive buffer full",
189 "low priority discard - no receive descriptor",
190 "low priority discard - missing end of packet",
216 static char *irq_bitname[] = {
248 #define PHY_CLEARALL -2
250 struct reginit_item {
255 static struct reginit_item PHY_NTC_INIT[] = {
256 { PHY_CLEARALL, 0x40 },
262 { 0x39, 0x0006 }, /* changed here to make loopback */
266 { PHY_EOF, 0}, /* -1 signals end of list */
270 /* Safetyfeature: If the card interrupts more than this number of times
271 in a jiffy (1/100th of a second) then we just disable the interrupt and
272 print a message. This prevents the system from hanging.
274 150000 packets per second is close to the limit a PC is going to have
275 anyway. We therefore have to disable this for production. -- REW */
276 #undef IRQ_RATE_LIMIT // 100
278 /* Interrupts work now. Unlike serial cards, ATM cards don't work all
279 that great without interrupts. -- REW */
280 #undef FS_POLL_FREQ // 100
283 This driver can spew a whole lot of debugging output at you. If you
284 need maximum performance, you should disable the DEBUG define. To
285 aid in debugging in the field, I'm leaving the compile-time debug
286 features enabled, and disable them "runtime". That allows me to
287 instruct people with problems to enable debugging without requiring
288 them to recompile... -- REW
293 #define fs_dprintk(f, str...) if (fs_debug & f) printk (str)
295 #define fs_dprintk(f, str...) /* nothing */
299 static int fs_keystream = 0;
302 /* I didn't forget to set this to zero before shipping. Hit me with a stick
303 if you get this with the debug default not set to zero again. -- REW */
304 static int fs_debug = 0;
311 module_param(fs_debug, int, 0644);
313 module_param(loopback, int, 0);
314 module_param(num, int, 0);
315 module_param(fs_keystream, int, 0);
316 /* XXX Add rx_buf_sizes, and rx_pool_sizes As per request Amar. -- REW */
320 #define FS_DEBUG_FLOW 0x00000001
321 #define FS_DEBUG_OPEN 0x00000002
322 #define FS_DEBUG_QUEUE 0x00000004
323 #define FS_DEBUG_IRQ 0x00000008
324 #define FS_DEBUG_INIT 0x00000010
325 #define FS_DEBUG_SEND 0x00000020
326 #define FS_DEBUG_PHY 0x00000040
327 #define FS_DEBUG_CLEANUP 0x00000080
328 #define FS_DEBUG_QOS 0x00000100
329 #define FS_DEBUG_TXQ 0x00000200
330 #define FS_DEBUG_ALLOC 0x00000400
331 #define FS_DEBUG_TXMEM 0x00000800
332 #define FS_DEBUG_QSIZE 0x00001000
335 #define func_enter() fs_dprintk(FS_DEBUG_FLOW, "fs: enter %s\n", __func__)
336 #define func_exit() fs_dprintk(FS_DEBUG_FLOW, "fs: exit %s\n", __func__)
339 static struct fs_dev *fs_boards = NULL;
343 static void my_hd (void *addr, int len)
346 unsigned char *ptr = addr;
350 for (j=0;j < ((len < 16)?len:16);j++) {
351 printk ("%02x %s", ptr[j], (j==7)?" ":"");
354 printk (" %s", (j==7)?" ":"");
356 for (j=0;j < ((len < 16)?len:16);j++) {
358 printk ("%c", (ch < 0x20)?'.':((ch > 0x7f)?'.':ch));
366 static void my_hd (void *addr, int len){}
369 /********** free an skb (as per ATM device driver documentation) **********/
371 /* Hmm. If this is ATM specific, why isn't there an ATM routine for this?
372 * I copied it over from the ambassador driver. -- REW */
374 static inline void fs_kfree_skb (struct sk_buff * skb)
376 if (ATM_SKB(skb)->vcc->pop)
377 ATM_SKB(skb)->vcc->pop (ATM_SKB(skb)->vcc, skb);
379 dev_kfree_skb_any (skb);
385 /* It seems the ATM forum recommends this horribly complicated 16bit
386 * floating point format. Turns out the Ambassador uses the exact same
387 * encoding. I just copied it over. If Mitch agrees, I'll move it over
388 * to the atm_misc file or something like that. (and remove it from
389 * here and the ambassador driver) -- REW
392 /* The good thing about this format is that it is monotonic. So,
393 a conversion routine need not be very complicated. To be able to
394 round "nearest" we need to take along a few extra bits. Lets
395 put these after 16 bits, so that we can just return the top 16
396 bits of the 32bit number as the result:
398 int mr (unsigned int rate, int r)
401 static int round[4]={0, 0, 0xffff, 0x8000};
403 while (rate & 0xfc000000) {
407 while (! (rate & 0xfe000000)) {
412 // Now the mantissa is in positions bit 16-25. Excepf for the "hidden 1" that's in bit 26.
414 // Next add in the exponent
416 // And perform the rounding:
417 return (rate + round[r]) >> 16;
420 14 lines-of-code. Compare that with the 120 that the Ambassador
421 guys needed. (would be 8 lines shorter if I'd try to really reduce
424 int mr (unsigned int rate, int r)
427 static int round[4]={0, 0, 0xffff, 0x8000};
429 for (; rate & 0xfc000000 ;rate >>= 1, e++);
430 for (;!(rate & 0xfe000000);rate <<= 1, e--);
431 return ((rate & ~0x02000000) | (e << (16+9)) + round[r]) >> 16;
434 Exercise for the reader: Remove one more line-of-code, without
435 cheating. (Just joining two lines is cheating). (I know it's
436 possible, don't think you've beat me if you found it... If you
437 manage to lose two lines or more, keep me updated! ;-)
444 #define ROUND_NEAREST 3
445 /********** make rate (not quite as much fun as Horizon) **********/
447 static int make_rate(unsigned int rate, int r,
448 u16 *bits, unsigned int *actual)
450 unsigned char exp = -1; /* hush gcc */
451 unsigned int man = -1; /* hush gcc */
453 fs_dprintk (FS_DEBUG_QOS, "make_rate %u", rate);
455 /* rates in cells per second, ITU format (nasty 16-bit floating-point)
456 given 5-bit e and 9-bit m:
457 rate = EITHER (1+m/2^9)*2^e OR 0
458 bits = EITHER 1<<14 | e<<9 | m OR 0
459 (bit 15 is "reserved", bit 14 "non-zero")
460 smallest rate is 0 (special representation)
461 largest rate is (1+511/512)*2^31 = 4290772992 (< 2^32-1)
462 smallest non-zero rate is (1+0/512)*2^0 = 1 (> 0)
464 find position of top bit, this gives e
465 remove top bit and shift (rounding if feeling clever) by 9-e
467 /* Ambassador ucode bug: please don't set bit 14! so 0 rate not
468 representable. // This should move into the ambassador driver
469 when properly merged. -- REW */
471 if (rate > 0xffc00000U) {
472 /* larger than largest representable rate */
482 /* representable rate */
487 /* invariant: rate = man*2^(exp-31) */
488 while (!(man & (1<<31))) {
493 /* man has top bit set
494 rate = (2^31+(man-2^31))*2^(exp-31)
495 rate = (1+(man-2^31)/2^31)*2^exp
498 man &= 0xffffffffU; /* a nop on 32-bit systems */
499 /* rate = (1+man/2^32)*2^exp
501 exp is in the range 0 to 31, man is in the range 0 to 2^32-1
502 time to lose significance... we want m in the range 0 to 2^9-1
503 rounding presents a minor problem... we first decide which way
504 we are rounding (based on given rounding direction and possibly
505 the bits of the mantissa that are to be discarded).
515 /* check all bits that we are discarding */
516 if (man & (~0U>>9)) {
517 man = (man>>(32-9)) + 1;
519 /* no need to check for round up outside of range */
528 case ROUND_NEAREST: {
529 /* check msb that we are discarding */
530 if (man & (1<<(32-9-1))) {
531 man = (man>>(32-9)) + 1;
533 /* no need to check for round up outside of range */
545 /* zero rate - not representable */
547 if (r == ROUND_DOWN) {
555 fs_dprintk (FS_DEBUG_QOS, "rate: man=%u, exp=%hu", man, exp);
558 *bits = /* (1<<14) | */ (exp<<9) | man;
562 ? (1 << exp) + (man << (exp-9))
563 : (1 << exp) + ((man + (1<<(9-exp-1))) >> (9-exp));
571 /* FireStream access routines */
572 /* For DEEP-DOWN debugging these can be rigged to intercept accesses to
573 certain registers or to just log all accesses. */
575 static inline void write_fs (struct fs_dev *dev, int offset, u32 val)
577 writel (val, dev->base + offset);
581 static inline u32 read_fs (struct fs_dev *dev, int offset)
583 return readl (dev->base + offset);
588 static inline struct FS_QENTRY *get_qentry (struct fs_dev *dev, struct queue *q)
590 return bus_to_virt (read_fs (dev, Q_WP(q->offset)) & Q_ADDR_MASK);
594 static void submit_qentry (struct fs_dev *dev, struct queue *q, struct FS_QENTRY *qe)
597 struct FS_QENTRY *cqe;
599 /* XXX Sanity check: the write pointer can be checked to be
600 still the same as the value passed as qe... -- REW */
602 while ((wp = read_fs (dev, Q_WP (q->offset))) & Q_FULL) {
603 fs_dprintk (FS_DEBUG_TXQ, "Found queue at %x full. Waiting.\n",
609 cqe = bus_to_virt (wp);
611 fs_dprintk (FS_DEBUG_TXQ, "q mismatch! %p %p\n", qe, cqe);
614 write_fs (dev, Q_WP(q->offset), Q_INCWRAP);
621 rp = read_fs (dev, Q_RP(q->offset));
622 wp = read_fs (dev, Q_WP(q->offset));
623 fs_dprintk (FS_DEBUG_TXQ, "q at %d: %x-%x: %x entries.\n",
624 q->offset, rp, wp, wp-rp);
630 static struct FS_QENTRY pq[60];
633 static struct FS_BPENTRY dq[60];
638 static void submit_queue (struct fs_dev *dev, struct queue *q,
639 u32 cmd, u32 p1, u32 p2, u32 p3)
641 struct FS_QENTRY *qe;
643 qe = get_qentry (dev, q);
648 submit_qentry (dev, q, qe);
656 if (qp >= 60) qp = 0;
660 /* Test the "other" way one day... -- REW */
662 #define submit_command submit_queue
665 static void submit_command (struct fs_dev *dev, struct queue *q,
666 u32 cmd, u32 p1, u32 p2, u32 p3)
668 write_fs (dev, CMDR0, cmd);
669 write_fs (dev, CMDR1, p1);
670 write_fs (dev, CMDR2, p2);
671 write_fs (dev, CMDR3, p3);
677 static void process_return_queue (struct fs_dev *dev, struct queue *q)
680 struct FS_QENTRY *qe;
683 while (!((rq = read_fs (dev, Q_RP(q->offset))) & Q_EMPTY)) {
684 fs_dprintk (FS_DEBUG_QUEUE, "reaping return queue entry at %lx\n", rq);
685 qe = bus_to_virt (rq);
687 fs_dprintk (FS_DEBUG_QUEUE, "queue entry: %08x %08x %08x %08x. (%d)\n",
688 qe->cmd, qe->p0, qe->p1, qe->p2, STATUS_CODE (qe));
690 switch (STATUS_CODE (qe)) {
692 tc = bus_to_virt (qe->p0);
693 fs_dprintk (FS_DEBUG_ALLOC, "Free tc: %p\n", tc);
698 write_fs (dev, Q_RP(q->offset), Q_INCWRAP);
703 static void process_txdone_queue (struct fs_dev *dev, struct queue *q)
707 struct FS_QENTRY *qe;
709 struct FS_BPENTRY *td;
711 while (!((rq = read_fs (dev, Q_RP(q->offset))) & Q_EMPTY)) {
712 fs_dprintk (FS_DEBUG_QUEUE, "reaping txdone entry at %lx\n", rq);
713 qe = bus_to_virt (rq);
715 fs_dprintk (FS_DEBUG_QUEUE, "queue entry: %08x %08x %08x %08x: %d\n",
716 qe->cmd, qe->p0, qe->p1, qe->p2, STATUS_CODE (qe));
718 if (STATUS_CODE (qe) != 2)
719 fs_dprintk (FS_DEBUG_TXMEM, "queue entry: %08x %08x %08x %08x: %d\n",
720 qe->cmd, qe->p0, qe->p1, qe->p2, STATUS_CODE (qe));
723 switch (STATUS_CODE (qe)) {
724 case 0x01: /* This is for AAL0 where we put the chip in streaming mode */
727 /* Process a real txdone entry. */
730 printk (KERN_WARNING "td not aligned: %ld\n", tmp);
732 td = bus_to_virt (tmp);
734 fs_dprintk (FS_DEBUG_QUEUE, "Pool entry: %08x %08x %08x %08x %p.\n",
735 td->flags, td->next, td->bsa, td->aal_bufsize, td->skb );
738 if (skb == FS_VCC (ATM_SKB(skb)->vcc)->last_skb) {
739 FS_VCC (ATM_SKB(skb)->vcc)->last_skb = NULL;
740 wake_up_interruptible (& FS_VCC (ATM_SKB(skb)->vcc)->close_wait);
748 fs_dprintk (FS_DEBUG_QSIZE, "[%d]", td->dev->ntxpckts);
752 atomic_inc(&ATM_SKB(skb)->vcc->stats->tx);
754 fs_dprintk (FS_DEBUG_TXMEM, "i");
755 fs_dprintk (FS_DEBUG_ALLOC, "Free t-skb: %p\n", skb);
758 fs_dprintk (FS_DEBUG_ALLOC, "Free trans-d: %p\n", td);
759 memset (td, ATM_POISON_FREE, sizeof(struct FS_BPENTRY));
763 /* Here we get the tx purge inhibit command ... */
764 /* Action, I believe, is "don't do anything". -- REW */
768 write_fs (dev, Q_RP(q->offset), Q_INCWRAP);
773 static void process_incoming (struct fs_dev *dev, struct queue *q)
776 struct FS_QENTRY *qe;
777 struct FS_BPENTRY *pe;
780 struct atm_vcc *atm_vcc;
782 while (!((rq = read_fs (dev, Q_RP(q->offset))) & Q_EMPTY)) {
783 fs_dprintk (FS_DEBUG_QUEUE, "reaping incoming queue entry at %lx\n", rq);
784 qe = bus_to_virt (rq);
786 fs_dprintk (FS_DEBUG_QUEUE, "queue entry: %08x %08x %08x %08x. ",
787 qe->cmd, qe->p0, qe->p1, qe->p2);
789 fs_dprintk (FS_DEBUG_QUEUE, "-> %x: %s\n",
791 res_strings[STATUS_CODE(qe)]);
793 pe = bus_to_virt (qe->p0);
794 fs_dprintk (FS_DEBUG_QUEUE, "Pool entry: %08x %08x %08x %08x %p %p.\n",
795 pe->flags, pe->next, pe->bsa, pe->aal_bufsize,
798 channo = qe->cmd & 0xffff;
800 if (channo < dev->nchannels)
801 atm_vcc = dev->atm_vccs[channo];
805 /* Single buffer packet */
806 switch (STATUS_CODE (qe)) {
808 /* Fall through for streaming mode */
809 case 0x2:/* Packet received OK.... */
814 fs_dprintk (FS_DEBUG_QUEUE, "Got skb: %p\n", skb);
815 if (FS_DEBUG_QUEUE & fs_debug) my_hd (bus_to_virt (pe->bsa), 0x20);
817 skb_put (skb, qe->p1 & 0xffff);
818 ATM_SKB(skb)->vcc = atm_vcc;
819 atomic_inc(&atm_vcc->stats->rx);
820 __net_timestamp(skb);
821 fs_dprintk (FS_DEBUG_ALLOC, "Free rec-skb: %p (pushed)\n", skb);
822 atm_vcc->push (atm_vcc, skb);
823 fs_dprintk (FS_DEBUG_ALLOC, "Free rec-d: %p\n", pe);
826 printk (KERN_ERR "Got a receive on a non-open channel %d.\n", channo);
829 case 0x17:/* AAL 5 CRC32 error. IFF the length field is nonzero, a buffer
830 has been consumed and needs to be processed. -- REW */
831 if (qe->p1 & 0xffff) {
832 pe = bus_to_virt (qe->p0);
834 fs_dprintk (FS_DEBUG_ALLOC, "Free rec-skb: %p\n", pe->skb);
835 dev_kfree_skb_any (pe->skb);
836 fs_dprintk (FS_DEBUG_ALLOC, "Free rec-d: %p\n", pe);
840 atomic_inc(&atm_vcc->stats->rx_drop);
842 case 0x1f: /* Reassembly abort: no buffers. */
843 /* Silently increment error counter. */
845 atomic_inc(&atm_vcc->stats->rx_drop);
847 default: /* Hmm. Haven't written the code to handle the others yet... -- REW */
848 printk (KERN_WARNING "Don't know what to do with RX status %x: %s.\n",
849 STATUS_CODE(qe), res_strings[STATUS_CODE (qe)]);
851 write_fs (dev, Q_RP(q->offset), Q_INCWRAP);
857 #define DO_DIRECTION(tp) ((tp)->traffic_class != ATM_NONE)
859 static int fs_open(struct atm_vcc *atm_vcc)
863 struct fs_transmit_config *tc;
864 struct atm_trafprm * txtp;
865 struct atm_trafprm * rxtp;
866 /* struct fs_receive_config *rc;*/
867 /* struct FS_QENTRY *qe; */
872 short vpi = atm_vcc->vpi;
873 int vci = atm_vcc->vci;
877 dev = FS_DEV(atm_vcc->dev);
878 fs_dprintk (FS_DEBUG_OPEN, "fs: open on dev: %p, vcc at %p\n",
881 if (vci != ATM_VPI_UNSPEC && vpi != ATM_VCI_UNSPEC)
882 set_bit(ATM_VF_ADDR, &atm_vcc->flags);
884 if ((atm_vcc->qos.aal != ATM_AAL5) &&
885 (atm_vcc->qos.aal != ATM_AAL2))
886 return -EINVAL; /* XXX AAL0 */
888 fs_dprintk (FS_DEBUG_OPEN, "fs: (itf %d): open %d.%d\n",
889 atm_vcc->dev->number, atm_vcc->vpi, atm_vcc->vci);
891 /* XXX handle qos parameters (rate limiting) ? */
893 vcc = kmalloc(sizeof(struct fs_vcc), GFP_KERNEL);
894 fs_dprintk (FS_DEBUG_ALLOC, "Alloc VCC: %p(%Zd)\n", vcc, sizeof(struct fs_vcc));
896 clear_bit(ATM_VF_ADDR, &atm_vcc->flags);
900 atm_vcc->dev_data = vcc;
901 vcc->last_skb = NULL;
903 init_waitqueue_head (&vcc->close_wait);
905 txtp = &atm_vcc->qos.txtp;
906 rxtp = &atm_vcc->qos.rxtp;
908 if (!test_bit(ATM_VF_PARTIAL, &atm_vcc->flags)) {
910 /* Increment the channel numer: take a free one next time. */
911 for (to=33;to;to--, dev->channo++) {
912 /* We only have 32 channels */
913 if (dev->channo >= 32)
915 /* If we need to do RX, AND the RX is inuse, try the next */
916 if (DO_DIRECTION(rxtp) && dev->atm_vccs[dev->channo])
918 /* If we need to do TX, AND the TX is inuse, try the next */
919 if (DO_DIRECTION(txtp) && test_bit (dev->channo, dev->tx_inuse))
921 /* Ok, both are free! (or not needed) */
925 printk ("No more free channels for FS50..\n");
929 vcc->channo = dev->channo;
930 dev->channo &= dev->channel_mask;
933 vcc->channo = (vpi << FS155_VCI_BITS) | (vci);
934 if (((DO_DIRECTION(rxtp) && dev->atm_vccs[vcc->channo])) ||
935 ( DO_DIRECTION(txtp) && test_bit (vcc->channo, dev->tx_inuse))) {
936 printk ("Channel is in use for FS155.\n");
941 fs_dprintk (FS_DEBUG_OPEN, "OK. Allocated channel %x(%d).\n",
942 vcc->channo, vcc->channo);
945 if (DO_DIRECTION (txtp)) {
946 tc = kmalloc (sizeof (struct fs_transmit_config), GFP_KERNEL);
947 fs_dprintk (FS_DEBUG_ALLOC, "Alloc tc: %p(%Zd)\n",
948 tc, sizeof (struct fs_transmit_config));
950 fs_dprintk (FS_DEBUG_OPEN, "fs: can't alloc transmit_config.\n");
955 /* Allocate the "open" entry from the high priority txq. This makes
956 it most likely that the chip will notice it. It also prevents us
957 from having to wait for completion. On the other hand, we may
958 need to wait for completion anyway, to see if it completed
961 switch (atm_vcc->qos.aal) {
965 | TC_FLAGS_TRANSPARENT_PAYLOAD
968 | TC_FLAGS_TYPE_UBR /* XXX Change to VBR -- PVDL */
974 | TC_FLAGS_PACKET /* ??? */
979 printk ("Unknown aal: %d\n", atm_vcc->qos.aal);
982 /* Docs are vague about this atm_hdr field. By the way, the FS
983 * chip makes odd errors if lower bits are set.... -- REW */
984 tc->atm_hdr = (vpi << 20) | (vci << 4);
987 int pcr = atm_pcr_goal (txtp);
989 fs_dprintk (FS_DEBUG_OPEN, "pcr = %d.\n", pcr);
991 /* XXX Hmm. officially we're only allowed to do this if rounding
992 is round_down -- REW */
994 if (pcr > 51840000/53/8) pcr = 51840000/53/8;
996 if (pcr > 155520000/53/8) pcr = 155520000/53/8;
1000 tmc0 = IS_FS50(dev)?0x61BE:0x64c9; /* Just copied over the bits from Fujitsu -- REW */
1009 error = make_rate (pcr, r, &tmc0, NULL);
1015 fs_dprintk (FS_DEBUG_OPEN, "pcr = %d.\n", pcr);
1018 tc->TMC[0] = tmc0 | 0x4000;
1019 tc->TMC[1] = 0; /* Unused */
1020 tc->TMC[2] = 0; /* Unused */
1021 tc->TMC[3] = 0; /* Unused */
1023 tc->spec = 0; /* UTOPIA address, UDF, HEC: Unused -> 0 */
1024 tc->rtag[0] = 0; /* What should I do with routing tags???
1025 -- Not used -- AS -- Thanks -- REW*/
1029 if (fs_debug & FS_DEBUG_OPEN) {
1030 fs_dprintk (FS_DEBUG_OPEN, "TX config record:\n");
1031 my_hd (tc, sizeof (*tc));
1034 /* We now use the "submit_command" function to submit commands to
1035 the firestream. There is a define up near the definition of
1036 that routine that switches this routine between immediate write
1037 to the immediate command registers and queuing the commands in
1038 the HPTXQ for execution. This last technique might be more
1039 efficient if we know we're going to submit a whole lot of
1040 commands in one go, but this driver is not setup to be able to
1041 use such a construct. So it probably doen't matter much right
1044 /* The command is IMMediate and INQueue. The parameters are out-of-line.. */
1045 submit_command (dev, &dev->hp_txq,
1046 QE_CMD_CONFIG_TX | QE_CMD_IMM_INQ | vcc->channo,
1047 virt_to_bus (tc), 0, 0);
1049 submit_command (dev, &dev->hp_txq,
1050 QE_CMD_TX_EN | QE_CMD_IMM_INQ | vcc->channo,
1052 set_bit (vcc->channo, dev->tx_inuse);
1055 if (DO_DIRECTION (rxtp)) {
1056 dev->atm_vccs[vcc->channo] = atm_vcc;
1058 for (bfp = 0;bfp < FS_NR_FREE_POOLS; bfp++)
1059 if (atm_vcc->qos.rxtp.max_sdu <= dev->rx_fp[bfp].bufsize) break;
1060 if (bfp >= FS_NR_FREE_POOLS) {
1061 fs_dprintk (FS_DEBUG_OPEN, "No free pool fits sdu: %d.\n",
1062 atm_vcc->qos.rxtp.max_sdu);
1063 /* XXX Cleanup? -- Would just calling fs_close work??? -- REW */
1065 /* XXX clear tx inuse. Close TX part? */
1066 dev->atm_vccs[vcc->channo] = NULL;
1071 switch (atm_vcc->qos.aal) {
1074 submit_command (dev, &dev->hp_txq,
1075 QE_CMD_CONFIG_RX | QE_CMD_IMM_INQ | vcc->channo,
1077 RC_FLAGS_BFPS_BFP * bfp |
1078 RC_FLAGS_RXBM_PSB, 0, 0);
1081 submit_command (dev, &dev->hp_txq,
1082 QE_CMD_CONFIG_RX | QE_CMD_IMM_INQ | vcc->channo,
1084 RC_FLAGS_BFPS_BFP * bfp |
1085 RC_FLAGS_RXBM_PSB, 0, 0);
1088 if (IS_FS50 (dev)) {
1089 submit_command (dev, &dev->hp_txq,
1090 QE_CMD_REG_WR | QE_CMD_IMM_INQ,
1092 (vpi << 16) | vci, 0 ); /* XXX -- Use defines. */
1094 submit_command (dev, &dev->hp_txq,
1095 QE_CMD_RX_EN | QE_CMD_IMM_INQ | vcc->channo,
1099 /* Indicate we're done! */
1100 set_bit(ATM_VF_READY, &atm_vcc->flags);
1107 static void fs_close(struct atm_vcc *atm_vcc)
1109 struct fs_dev *dev = FS_DEV (atm_vcc->dev);
1110 struct fs_vcc *vcc = FS_VCC (atm_vcc);
1111 struct atm_trafprm * txtp;
1112 struct atm_trafprm * rxtp;
1116 clear_bit(ATM_VF_READY, &atm_vcc->flags);
1118 fs_dprintk (FS_DEBUG_QSIZE, "--==**[%d]**==--", dev->ntxpckts);
1119 if (vcc->last_skb) {
1120 fs_dprintk (FS_DEBUG_QUEUE, "Waiting for skb %p to be sent.\n",
1122 /* We're going to wait for the last packet to get sent on this VC. It would
1123 be impolite not to send them don't you think?
1125 We don't know which packets didn't get sent. So if we get interrupted in
1126 this sleep_on, we'll lose any reference to these packets. Memory leak!
1127 On the other hand, it's awfully convenient that we can abort a "close" that
1128 is taking too long. Maybe just use non-interruptible sleep on? -- REW */
1129 wait_event_interruptible(vcc->close_wait, !vcc->last_skb);
1132 txtp = &atm_vcc->qos.txtp;
1133 rxtp = &atm_vcc->qos.rxtp;
1136 /* See App note XXX (Unpublished as of now) for the reason for the
1137 removal of the "CMD_IMM_INQ" part of the TX_PURGE_INH... -- REW */
1139 if (DO_DIRECTION (txtp)) {
1140 submit_command (dev, &dev->hp_txq,
1141 QE_CMD_TX_PURGE_INH | /*QE_CMD_IMM_INQ|*/ vcc->channo, 0,0,0);
1142 clear_bit (vcc->channo, dev->tx_inuse);
1145 if (DO_DIRECTION (rxtp)) {
1146 submit_command (dev, &dev->hp_txq,
1147 QE_CMD_RX_PURGE_INH | QE_CMD_IMM_INQ | vcc->channo, 0,0,0);
1148 dev->atm_vccs [vcc->channo] = NULL;
1150 /* This means that this is configured as a receive channel */
1151 if (IS_FS50 (dev)) {
1152 /* Disable the receive filter. Is 0/0 indeed an invalid receive
1153 channel? -- REW. Yes it is. -- Hang. Ok. I'll use -1
1154 (0xfff...) -- REW */
1155 submit_command (dev, &dev->hp_txq,
1156 QE_CMD_REG_WR | QE_CMD_IMM_INQ,
1157 0x80 + vcc->channo, -1, 0 );
1161 fs_dprintk (FS_DEBUG_ALLOC, "Free vcc: %p\n", vcc);
1168 static int fs_send (struct atm_vcc *atm_vcc, struct sk_buff *skb)
1170 struct fs_dev *dev = FS_DEV (atm_vcc->dev);
1171 struct fs_vcc *vcc = FS_VCC (atm_vcc);
1172 struct FS_BPENTRY *td;
1176 fs_dprintk (FS_DEBUG_TXMEM, "I");
1177 fs_dprintk (FS_DEBUG_SEND, "Send: atm_vcc %p skb %p vcc %p dev %p\n",
1178 atm_vcc, skb, vcc, dev);
1180 fs_dprintk (FS_DEBUG_ALLOC, "Alloc t-skb: %p (atm_send)\n", skb);
1182 ATM_SKB(skb)->vcc = atm_vcc;
1184 vcc->last_skb = skb;
1186 td = kmalloc (sizeof (struct FS_BPENTRY), GFP_ATOMIC);
1187 fs_dprintk (FS_DEBUG_ALLOC, "Alloc transd: %p(%Zd)\n", td, sizeof (struct FS_BPENTRY));
1189 /* Oops out of mem */
1193 fs_dprintk (FS_DEBUG_SEND, "first word in buffer: %x\n",
1194 *(int *) skb->data);
1196 td->flags = TD_EPI | TD_DATA | skb->len;
1198 td->bsa = virt_to_bus (skb->data);
1205 dq[qd].flags = td->flags;
1206 dq[qd].next = td->next;
1207 dq[qd].bsa = td->bsa;
1208 dq[qd].skb = td->skb;
1209 dq[qd].dev = td->dev;
1211 if (qd >= 60) qd = 0;
1214 submit_queue (dev, &dev->hp_txq,
1215 QE_TRANSMIT_DE | vcc->channo,
1216 virt_to_bus (td), 0,
1219 fs_dprintk (FS_DEBUG_QUEUE, "in send: txq %d txrq %d\n",
1220 read_fs (dev, Q_EA (dev->hp_txq.offset)) -
1221 read_fs (dev, Q_SA (dev->hp_txq.offset)),
1222 read_fs (dev, Q_EA (dev->tx_relq.offset)) -
1223 read_fs (dev, Q_SA (dev->tx_relq.offset)));
1230 /* Some function placeholders for functions we don't yet support. */
1233 static int fs_ioctl(struct atm_dev *dev,unsigned int cmd,void __user *arg)
1237 return -ENOIOCTLCMD;
1241 static int fs_getsockopt(struct atm_vcc *vcc,int level,int optname,
1242 void __user *optval,int optlen)
1250 static int fs_setsockopt(struct atm_vcc *vcc,int level,int optname,
1251 void __user *optval,unsigned int optlen)
1259 static void fs_phy_put(struct atm_dev *dev,unsigned char value,
1267 static unsigned char fs_phy_get(struct atm_dev *dev,unsigned long addr)
1275 static int fs_change_qos(struct atm_vcc *vcc,struct atm_qos *qos,int flags)
1285 static const struct atmdev_ops ops = {
1289 .owner = THIS_MODULE,
1290 /* ioctl: fs_ioctl, */
1291 /* getsockopt: fs_getsockopt, */
1292 /* setsockopt: fs_setsockopt, */
1293 /* change_qos: fs_change_qos, */
1295 /* For now implement these internally here... */
1296 /* phy_put: fs_phy_put, */
1297 /* phy_get: fs_phy_get, */
1301 static void undocumented_pci_fix(struct pci_dev *pdev)
1305 /* The Windows driver says: */
1306 /* Switch off FireStream Retry Limit Threshold
1309 /* The register at 0x28 is documented as "reserved", no further
1312 pci_read_config_dword (pdev, 0x28, &tint);
1315 pci_write_config_dword (pdev, 0x28, tint);
1321 /**************************************************************************
1323 **************************************************************************/
1325 static void write_phy(struct fs_dev *dev, int regnum, int val)
1327 submit_command (dev, &dev->hp_txq, QE_CMD_PRP_WR | QE_CMD_IMM_INQ,
1331 static int init_phy(struct fs_dev *dev, struct reginit_item *reginit)
1336 while (reginit->reg != PHY_EOF) {
1337 if (reginit->reg == PHY_CLEARALL) {
1338 /* "PHY_CLEARALL means clear all registers. Numregisters is in "val". */
1339 for (i=0;i<reginit->val;i++) {
1340 write_phy (dev, i, 0);
1343 write_phy (dev, reginit->reg, reginit->val);
1351 static void reset_chip (struct fs_dev *dev)
1355 write_fs (dev, SARMODE0, SARMODE0_SRTS0);
1357 /* Undocumented delay */
1360 /* The "internal registers are documented to all reset to zero, but
1361 comments & code in the Windows driver indicates that the pools are
1363 for (i=0;i < FS_NR_FREE_POOLS;i++) {
1364 write_fs (dev, FP_CNF (RXB_FP(i)), 0);
1365 write_fs (dev, FP_SA (RXB_FP(i)), 0);
1366 write_fs (dev, FP_EA (RXB_FP(i)), 0);
1367 write_fs (dev, FP_CNT (RXB_FP(i)), 0);
1368 write_fs (dev, FP_CTU (RXB_FP(i)), 0);
1371 /* The same goes for the match channel registers, although those are
1372 NOT documented that way in the Windows driver. -- REW */
1373 /* The Windows driver DOES write 0 to these registers somewhere in
1374 the init sequence. However, a small hardware-feature, will
1375 prevent reception of data on VPI/VCI = 0/0 (Unless the channel
1376 allocated happens to have no disabled channels that have a lower
1379 /* Clear the match channel registers. */
1380 if (IS_FS50 (dev)) {
1381 for (i=0;i<FS50_NR_CHANNELS;i++) {
1382 write_fs (dev, 0x200 + i * 4, -1);
1387 static void *aligned_kmalloc(int size, gfp_t flags, int alignment)
1391 if (alignment <= 0x10) {
1392 t = kmalloc (size, flags);
1393 if ((unsigned long)t & (alignment-1)) {
1394 printk ("Kmalloc doesn't align things correctly! %p\n", t);
1396 return aligned_kmalloc (size, flags, alignment * 4);
1400 printk (KERN_ERR "Request for > 0x10 alignment not yet implemented (hard!)\n");
1404 static int init_q(struct fs_dev *dev, struct queue *txq, int queue,
1405 int nentries, int is_rq)
1407 int sz = nentries * sizeof (struct FS_QENTRY);
1408 struct FS_QENTRY *p;
1412 fs_dprintk (FS_DEBUG_INIT, "Inititing queue at %x: %d entries:\n",
1415 p = aligned_kmalloc (sz, GFP_KERNEL, 0x10);
1416 fs_dprintk (FS_DEBUG_ALLOC, "Alloc queue: %p(%d)\n", p, sz);
1420 write_fs (dev, Q_SA(queue), virt_to_bus(p));
1421 write_fs (dev, Q_EA(queue), virt_to_bus(p+nentries-1));
1422 write_fs (dev, Q_WP(queue), virt_to_bus(p));
1423 write_fs (dev, Q_RP(queue), virt_to_bus(p));
1425 /* Configuration for the receive queue: 0: interrupt immediately,
1426 no pre-warning to empty queues: We do our best to keep the
1427 queue filled anyway. */
1428 write_fs (dev, Q_CNF(queue), 0 );
1433 txq->offset = queue;
1440 static int init_fp(struct fs_dev *dev, struct freepool *fp, int queue,
1441 int bufsize, int nr_buffers)
1445 fs_dprintk (FS_DEBUG_INIT, "Inititing free pool at %x:\n", queue);
1447 write_fs (dev, FP_CNF(queue), (bufsize * RBFP_RBS) | RBFP_RBSVAL | RBFP_CME);
1448 write_fs (dev, FP_SA(queue), 0);
1449 write_fs (dev, FP_EA(queue), 0);
1450 write_fs (dev, FP_CTU(queue), 0);
1451 write_fs (dev, FP_CNT(queue), 0);
1454 fp->bufsize = bufsize;
1455 fp->nr_buffers = nr_buffers;
1462 static inline int nr_buffers_in_freepool (struct fs_dev *dev, struct freepool *fp)
1465 /* This seems to be unreliable.... */
1466 return read_fs (dev, FP_CNT (fp->offset));
1473 /* Check if this gets going again if a pool ever runs out. -- Yes, it
1474 does. I've seen "receive abort: no buffers" and things started
1475 working again after that... -- REW */
1477 static void top_off_fp (struct fs_dev *dev, struct freepool *fp,
1480 struct FS_BPENTRY *qe, *ne;
1481 struct sk_buff *skb;
1485 fs_dprintk (FS_DEBUG_QUEUE, "Topping off queue at %x (%d-%d/%d)\n",
1486 fp->offset, read_fs (dev, FP_CNT (fp->offset)), fp->n,
1488 while (nr_buffers_in_freepool(dev, fp) < fp->nr_buffers) {
1490 skb = alloc_skb (fp->bufsize, gfp_flags);
1491 fs_dprintk (FS_DEBUG_ALLOC, "Alloc rec-skb: %p(%d)\n", skb, fp->bufsize);
1493 ne = kmalloc (sizeof (struct FS_BPENTRY), gfp_flags);
1494 fs_dprintk (FS_DEBUG_ALLOC, "Alloc rec-d: %p(%Zd)\n", ne, sizeof (struct FS_BPENTRY));
1496 fs_dprintk (FS_DEBUG_ALLOC, "Free rec-skb: %p\n", skb);
1497 dev_kfree_skb_any (skb);
1501 fs_dprintk (FS_DEBUG_QUEUE, "Adding skb %p desc %p -> %p(%p) ",
1502 skb, ne, skb->data, skb->head);
1504 ne->flags = FP_FLAGS_EPI | fp->bufsize;
1505 ne->next = virt_to_bus (NULL);
1506 ne->bsa = virt_to_bus (skb->data);
1507 ne->aal_bufsize = fp->bufsize;
1512 * FIXME: following code encodes and decodes
1513 * machine pointers (could be 64-bit) into a
1517 qe_tmp = read_fs (dev, FP_EA(fp->offset));
1518 fs_dprintk (FS_DEBUG_QUEUE, "link at %x\n", qe_tmp);
1520 qe = bus_to_virt ((long) qe_tmp);
1521 qe->next = virt_to_bus(ne);
1522 qe->flags &= ~FP_FLAGS_EPI;
1524 write_fs (dev, FP_SA(fp->offset), virt_to_bus(ne));
1526 write_fs (dev, FP_EA(fp->offset), virt_to_bus (ne));
1527 fp->n++; /* XXX Atomic_inc? */
1528 write_fs (dev, FP_CTU(fp->offset), 1);
1531 fs_dprintk (FS_DEBUG_QUEUE, "Added %d entries. \n", n);
1534 static void free_queue(struct fs_dev *dev, struct queue *txq)
1538 write_fs (dev, Q_SA(txq->offset), 0);
1539 write_fs (dev, Q_EA(txq->offset), 0);
1540 write_fs (dev, Q_RP(txq->offset), 0);
1541 write_fs (dev, Q_WP(txq->offset), 0);
1542 /* Configuration ? */
1544 fs_dprintk (FS_DEBUG_ALLOC, "Free queue: %p\n", txq->sa);
1550 static void free_freepool(struct fs_dev *dev, struct freepool *fp)
1554 write_fs (dev, FP_CNF(fp->offset), 0);
1555 write_fs (dev, FP_SA (fp->offset), 0);
1556 write_fs (dev, FP_EA (fp->offset), 0);
1557 write_fs (dev, FP_CNT(fp->offset), 0);
1558 write_fs (dev, FP_CTU(fp->offset), 0);
1565 static irqreturn_t fs_irq (int irq, void *dev_id)
1569 struct fs_dev *dev = dev_id;
1571 status = read_fs (dev, ISR);
1577 #ifdef IRQ_RATE_LIMIT
1578 /* Aaargh! I'm ashamed. This costs more lines-of-code than the actual
1579 interrupt routine!. (Well, used to when I wrote that comment) -- REW */
1584 if (lastjif == jiffies) {
1585 if (++nintr > IRQ_RATE_LIMIT) {
1586 free_irq (dev->irq, dev_id);
1587 printk (KERN_ERR "fs: Too many interrupts. Turning off interrupt %d.\n",
1596 fs_dprintk (FS_DEBUG_QUEUE, "in intr: txq %d txrq %d\n",
1597 read_fs (dev, Q_EA (dev->hp_txq.offset)) -
1598 read_fs (dev, Q_SA (dev->hp_txq.offset)),
1599 read_fs (dev, Q_EA (dev->tx_relq.offset)) -
1600 read_fs (dev, Q_SA (dev->tx_relq.offset)));
1602 /* print the bits in the ISR register. */
1603 if (fs_debug & FS_DEBUG_IRQ) {
1604 /* The FS_DEBUG things are unnecessary here. But this way it is
1605 clear for grep that these are debug prints. */
1606 fs_dprintk (FS_DEBUG_IRQ, "IRQ status:");
1608 if (status & (1 << i))
1609 fs_dprintk (FS_DEBUG_IRQ, " %s", irq_bitname[i]);
1610 fs_dprintk (FS_DEBUG_IRQ, "\n");
1613 if (status & ISR_RBRQ0_W) {
1614 fs_dprintk (FS_DEBUG_IRQ, "Iiiin-coming (0)!!!!\n");
1615 process_incoming (dev, &dev->rx_rq[0]);
1616 /* items mentioned on RBRQ0 are from FP 0 or 1. */
1617 top_off_fp (dev, &dev->rx_fp[0], GFP_ATOMIC);
1618 top_off_fp (dev, &dev->rx_fp[1], GFP_ATOMIC);
1621 if (status & ISR_RBRQ1_W) {
1622 fs_dprintk (FS_DEBUG_IRQ, "Iiiin-coming (1)!!!!\n");
1623 process_incoming (dev, &dev->rx_rq[1]);
1624 top_off_fp (dev, &dev->rx_fp[2], GFP_ATOMIC);
1625 top_off_fp (dev, &dev->rx_fp[3], GFP_ATOMIC);
1628 if (status & ISR_RBRQ2_W) {
1629 fs_dprintk (FS_DEBUG_IRQ, "Iiiin-coming (2)!!!!\n");
1630 process_incoming (dev, &dev->rx_rq[2]);
1631 top_off_fp (dev, &dev->rx_fp[4], GFP_ATOMIC);
1632 top_off_fp (dev, &dev->rx_fp[5], GFP_ATOMIC);
1635 if (status & ISR_RBRQ3_W) {
1636 fs_dprintk (FS_DEBUG_IRQ, "Iiiin-coming (3)!!!!\n");
1637 process_incoming (dev, &dev->rx_rq[3]);
1638 top_off_fp (dev, &dev->rx_fp[6], GFP_ATOMIC);
1639 top_off_fp (dev, &dev->rx_fp[7], GFP_ATOMIC);
1642 if (status & ISR_CSQ_W) {
1643 fs_dprintk (FS_DEBUG_IRQ, "Command executed ok!\n");
1644 process_return_queue (dev, &dev->st_q);
1647 if (status & ISR_TBRQ_W) {
1648 fs_dprintk (FS_DEBUG_IRQ, "Data tramsitted!\n");
1649 process_txdone_queue (dev, &dev->tx_relq);
1658 static void fs_poll (unsigned long data)
1660 struct fs_dev *dev = (struct fs_dev *) data;
1663 dev->timer.expires = jiffies + FS_POLL_FREQ;
1664 add_timer (&dev->timer);
1668 static int fs_init(struct fs_dev *dev)
1670 struct pci_dev *pci_dev;
1675 pci_dev = dev->pci_dev;
1677 printk (KERN_INFO "found a FireStream %d card, base %16llx, irq%d.\n",
1678 IS_FS50(dev)?50:155,
1679 (unsigned long long)pci_resource_start(pci_dev, 0),
1682 if (fs_debug & FS_DEBUG_INIT)
1683 my_hd ((unsigned char *) dev, sizeof (*dev));
1685 undocumented_pci_fix (pci_dev);
1687 dev->hw_base = pci_resource_start(pci_dev, 0);
1689 dev->base = ioremap(dev->hw_base, 0x1000);
1693 write_fs (dev, SARMODE0, 0
1694 | (0 * SARMODE0_SHADEN) /* We don't use shadow registers. */
1695 | (1 * SARMODE0_INTMODE_READCLEAR)
1696 | (1 * SARMODE0_CWRE)
1697 | (IS_FS50(dev) ? SARMODE0_PRPWT_FS50_5:
1698 SARMODE0_PRPWT_FS155_3)
1699 | (1 * SARMODE0_CALSUP_1)
1700 | (IS_FS50(dev) ? (0
1702 | SARMODE0_ABRVCS_32
1703 | SARMODE0_TXVCS_32):
1706 | SARMODE0_ABRVCS_1k
1707 | SARMODE0_TXVCS_1k)));
1709 /* 10ms * 100 is 1 second. That should be enough, as AN3:9 says it takes
1713 isr = read_fs (dev, ISR);
1715 /* This bit is documented as "RESERVED" */
1716 if (isr & ISR_INIT_ERR) {
1717 printk (KERN_ERR "Error initializing the FS... \n");
1720 if (isr & ISR_INIT) {
1721 fs_dprintk (FS_DEBUG_INIT, "Ha! Initialized OK!\n");
1725 /* Try again after 10ms. */
1730 printk (KERN_ERR "timeout initializing the FS... \n");
1734 /* XXX fix for fs155 */
1735 dev->channel_mask = 0x1f;
1739 write_fs (dev, SARMODE1, 0
1740 | (fs_keystream * SARMODE1_DEFHEC) /* XXX PHY */
1741 | ((loopback == 1) * SARMODE1_TSTLP) /* XXX Loopback mode enable... */
1742 | (1 * SARMODE1_DCRM)
1743 | (1 * SARMODE1_DCOAM)
1744 | (0 * SARMODE1_OAMCRC)
1745 | (0 * SARMODE1_DUMPE)
1746 | (0 * SARMODE1_GPLEN)
1747 | (0 * SARMODE1_GNAM)
1748 | (0 * SARMODE1_GVAS)
1749 | (0 * SARMODE1_GPAS)
1750 | (1 * SARMODE1_GPRI)
1751 | (0 * SARMODE1_PMS)
1752 | (0 * SARMODE1_GFCR)
1753 | (1 * SARMODE1_HECM2)
1754 | (1 * SARMODE1_HECM1)
1755 | (1 * SARMODE1_HECM0)
1756 | (1 << 12) /* That's what hang's driver does. Program to 0 */
1757 | (0 * 0xff) /* XXX FS155 */);
1760 /* Cal prescale etc */
1763 write_fs (dev, TMCONF, 0x0000000f);
1764 write_fs (dev, CALPRESCALE, 0x01010101 * num);
1765 write_fs (dev, 0x80, 0x000F00E4);
1768 write_fs (dev, CELLOSCONF, 0
1769 | ( 0 * CELLOSCONF_CEN)
1771 | (0x80 * CELLOSCONF_COBS)
1772 | (num * CELLOSCONF_COPK) /* Changed from 0xff to 0x5a */
1773 | (num * CELLOSCONF_COST));/* after a hint from Hang.
1774 * performance jumped 50->70... */
1776 /* Magic value by Hang */
1777 write_fs (dev, CELLOSCONF_COST, 0x0B809191);
1779 if (IS_FS50 (dev)) {
1780 write_fs (dev, RAS0, RAS0_DCD_XHLT);
1781 dev->atm_dev->ci_range.vpi_bits = 12;
1782 dev->atm_dev->ci_range.vci_bits = 16;
1783 dev->nchannels = FS50_NR_CHANNELS;
1785 write_fs (dev, RAS0, RAS0_DCD_XHLT
1786 | (((1 << FS155_VPI_BITS) - 1) * RAS0_VPSEL)
1787 | (((1 << FS155_VCI_BITS) - 1) * RAS0_VCSEL));
1788 /* We can chose the split arbitrarily. We might be able to
1789 support more. Whatever. This should do for now. */
1790 dev->atm_dev->ci_range.vpi_bits = FS155_VPI_BITS;
1791 dev->atm_dev->ci_range.vci_bits = FS155_VCI_BITS;
1793 /* Address bits we can't use should be compared to 0. */
1794 write_fs (dev, RAC, 0);
1796 /* Manual (AN9, page 6) says ASF1=0 means compare Utopia address
1797 * too. I can't find ASF1 anywhere. Anyway, we AND with just the
1798 * other bits, then compare with 0, which is exactly what we
1800 write_fs (dev, RAM, (1 << (28 - FS155_VPI_BITS - FS155_VCI_BITS)) - 1);
1801 dev->nchannels = FS155_NR_CHANNELS;
1803 dev->atm_vccs = kcalloc (dev->nchannels, sizeof (struct atm_vcc *),
1805 fs_dprintk (FS_DEBUG_ALLOC, "Alloc atmvccs: %p(%Zd)\n",
1806 dev->atm_vccs, dev->nchannels * sizeof (struct atm_vcc *));
1808 if (!dev->atm_vccs) {
1809 printk (KERN_WARNING "Couldn't allocate memory for VCC buffers. Woops!\n");
1810 /* XXX Clean up..... */
1814 dev->tx_inuse = kzalloc (dev->nchannels / 8 /* bits/byte */ , GFP_KERNEL);
1815 fs_dprintk (FS_DEBUG_ALLOC, "Alloc tx_inuse: %p(%d)\n",
1816 dev->atm_vccs, dev->nchannels / 8);
1818 if (!dev->tx_inuse) {
1819 printk (KERN_WARNING "Couldn't allocate memory for tx_inuse bits!\n");
1820 /* XXX Clean up..... */
1823 /* -- RAS1 : FS155 and 50 differ. Default (0) should be OK for both */
1824 /* -- RAS2 : FS50 only: Default is OK. */
1826 /* DMAMODE, default should be OK. -- REW */
1827 write_fs (dev, DMAMR, DMAMR_TX_MODE_FULL);
1829 init_q (dev, &dev->hp_txq, TX_PQ(TXQ_HP), TXQ_NENTRIES, 0);
1830 init_q (dev, &dev->lp_txq, TX_PQ(TXQ_LP), TXQ_NENTRIES, 0);
1831 init_q (dev, &dev->tx_relq, TXB_RQ, TXQ_NENTRIES, 1);
1832 init_q (dev, &dev->st_q, ST_Q, TXQ_NENTRIES, 1);
1834 for (i=0;i < FS_NR_FREE_POOLS;i++) {
1835 init_fp (dev, &dev->rx_fp[i], RXB_FP(i),
1836 rx_buf_sizes[i], rx_pool_sizes[i]);
1837 top_off_fp (dev, &dev->rx_fp[i], GFP_KERNEL);
1841 for (i=0;i < FS_NR_RX_QUEUES;i++)
1842 init_q (dev, &dev->rx_rq[i], RXB_RQ(i), RXRQ_NENTRIES, 1);
1844 dev->irq = pci_dev->irq;
1845 if (request_irq (dev->irq, fs_irq, IRQF_SHARED, "firestream", dev)) {
1846 printk (KERN_WARNING "couldn't get irq %d for firestream.\n", pci_dev->irq);
1847 /* XXX undo all previous stuff... */
1850 fs_dprintk (FS_DEBUG_INIT, "Grabbed irq %d for dev at %p.\n", dev->irq, dev);
1852 /* We want to be notified of most things. Just the statistics count
1853 overflows are not interesting */
1854 write_fs (dev, IMR, 0
1862 write_fs (dev, SARMODE0, 0
1863 | (0 * SARMODE0_SHADEN) /* We don't use shadow registers. */
1864 | (1 * SARMODE0_GINT)
1865 | (1 * SARMODE0_INTMODE_READCLEAR)
1866 | (0 * SARMODE0_CWRE)
1867 | (IS_FS50(dev)?SARMODE0_PRPWT_FS50_5:
1868 SARMODE0_PRPWT_FS155_3)
1869 | (1 * SARMODE0_CALSUP_1)
1872 | SARMODE0_ABRVCS_32
1873 | SARMODE0_TXVCS_32):
1876 | SARMODE0_ABRVCS_1k
1877 | SARMODE0_TXVCS_1k))
1878 | (1 * SARMODE0_RUN));
1880 init_phy (dev, PHY_NTC_INIT);
1882 if (loopback == 2) {
1883 write_phy (dev, 0x39, 0x000e);
1887 init_timer (&dev->timer);
1888 dev->timer.data = (unsigned long) dev;
1889 dev->timer.function = fs_poll;
1890 dev->timer.expires = jiffies + FS_POLL_FREQ;
1891 add_timer (&dev->timer);
1894 dev->atm_dev->dev_data = dev;
1903 static int firestream_init_one(struct pci_dev *pci_dev,
1904 const struct pci_device_id *ent)
1906 struct atm_dev *atm_dev;
1907 struct fs_dev *fs_dev;
1909 if (pci_enable_device(pci_dev))
1912 fs_dev = kzalloc (sizeof (struct fs_dev), GFP_KERNEL);
1913 fs_dprintk (FS_DEBUG_ALLOC, "Alloc fs-dev: %p(%Zd)\n",
1914 fs_dev, sizeof (struct fs_dev));
1917 atm_dev = atm_dev_register("fs", &pci_dev->dev, &ops, -1, NULL);
1919 goto err_out_free_fs_dev;
1921 fs_dev->pci_dev = pci_dev;
1922 fs_dev->atm_dev = atm_dev;
1923 fs_dev->flags = ent->driver_data;
1925 if (fs_init(fs_dev))
1926 goto err_out_free_atm_dev;
1928 fs_dev->next = fs_boards;
1932 err_out_free_atm_dev:
1933 atm_dev_deregister(atm_dev);
1934 err_out_free_fs_dev:
1940 static void firestream_remove_one(struct pci_dev *pdev)
1943 struct fs_dev *dev, *nxtdev;
1945 struct FS_BPENTRY *fp, *nxt;
1950 printk ("hptxq:\n");
1951 for (i=0;i<60;i++) {
1952 printk ("%d: %08x %08x %08x %08x \n",
1953 i, pq[qp].cmd, pq[qp].p0, pq[qp].p1, pq[qp].p2);
1955 if (qp >= 60) qp = 0;
1958 printk ("descriptors:\n");
1959 for (i=0;i<60;i++) {
1960 printk ("%d: %p: %08x %08x %p %p\n",
1961 i, da[qd], dq[qd].flags, dq[qd].bsa, dq[qd].skb, dq[qd].dev);
1963 if (qd >= 60) qd = 0;
1967 for (dev = fs_boards;dev != NULL;dev=nxtdev) {
1968 fs_dprintk (FS_DEBUG_CLEANUP, "Releasing resources for dev at %p.\n", dev);
1970 /* XXX Hit all the tx channels too! */
1972 for (i=0;i < dev->nchannels;i++) {
1973 if (dev->atm_vccs[i]) {
1974 vcc = FS_VCC (dev->atm_vccs[i]);
1975 submit_command (dev, &dev->hp_txq,
1976 QE_CMD_TX_PURGE_INH | QE_CMD_IMM_INQ | vcc->channo, 0,0,0);
1977 submit_command (dev, &dev->hp_txq,
1978 QE_CMD_RX_PURGE_INH | QE_CMD_IMM_INQ | vcc->channo, 0,0,0);
1983 /* XXX Wait a while for the chip to release all buffers. */
1985 for (i=0;i < FS_NR_FREE_POOLS;i++) {
1986 for (fp=bus_to_virt (read_fs (dev, FP_SA(dev->rx_fp[i].offset)));
1987 !(fp->flags & FP_FLAGS_EPI);fp = nxt) {
1988 fs_dprintk (FS_DEBUG_ALLOC, "Free rec-skb: %p\n", fp->skb);
1989 dev_kfree_skb_any (fp->skb);
1990 nxt = bus_to_virt (fp->next);
1991 fs_dprintk (FS_DEBUG_ALLOC, "Free rec-d: %p\n", fp);
1994 fs_dprintk (FS_DEBUG_ALLOC, "Free rec-skb: %p\n", fp->skb);
1995 dev_kfree_skb_any (fp->skb);
1996 fs_dprintk (FS_DEBUG_ALLOC, "Free rec-d: %p\n", fp);
2000 /* Hang the chip in "reset", prevent it clobbering memory that is
2004 fs_dprintk (FS_DEBUG_CLEANUP, "Freeing irq%d.\n", dev->irq);
2005 free_irq (dev->irq, dev);
2006 del_timer_sync (&dev->timer);
2008 atm_dev_deregister(dev->atm_dev);
2009 free_queue (dev, &dev->hp_txq);
2010 free_queue (dev, &dev->lp_txq);
2011 free_queue (dev, &dev->tx_relq);
2012 free_queue (dev, &dev->st_q);
2014 fs_dprintk (FS_DEBUG_ALLOC, "Free atmvccs: %p\n", dev->atm_vccs);
2015 kfree (dev->atm_vccs);
2017 for (i=0;i< FS_NR_FREE_POOLS;i++)
2018 free_freepool (dev, &dev->rx_fp[i]);
2020 for (i=0;i < FS_NR_RX_QUEUES;i++)
2021 free_queue (dev, &dev->rx_rq[i]);
2024 fs_dprintk (FS_DEBUG_ALLOC, "Free fs-dev: %p\n", dev);
2032 static struct pci_device_id firestream_pci_tbl[] = {
2033 { PCI_VDEVICE(FUJITSU_ME, PCI_DEVICE_ID_FUJITSU_FS50), FS_IS50},
2034 { PCI_VDEVICE(FUJITSU_ME, PCI_DEVICE_ID_FUJITSU_FS155), FS_IS155},
2038 MODULE_DEVICE_TABLE(pci, firestream_pci_tbl);
2040 static struct pci_driver firestream_driver = {
2041 .name = "firestream",
2042 .id_table = firestream_pci_tbl,
2043 .probe = firestream_init_one,
2044 .remove = firestream_remove_one,
2047 static int __init firestream_init_module (void)
2052 error = pci_register_driver(&firestream_driver);
2057 static void __exit firestream_cleanup_module(void)
2059 pci_unregister_driver(&firestream_driver);
2062 module_init(firestream_init_module);
2063 module_exit(firestream_cleanup_module);
2065 MODULE_LICENSE("GPL");