drivers/block/nvme-core.c

   1 /*
   2  * NVM Express device driver
   3  * Copyright (c) 2011-2014, Intel Corporation.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms and conditions of the GNU General Public License,
   7  * version 2, as published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  */
  14
  15 #include <linux/nvme.h>
  16 #include <linux/bitops.h>
  17 #include <linux/blkdev.h>
  18 #include <linux/blk-mq.h>
  19 #include <linux/cpu.h>
  20 #include <linux/delay.h>
  21 #include <linux/errno.h>
  22 #include <linux/fs.h>
  23 #include <linux/genhd.h>
  24 #include <linux/hdreg.h>
  25 #include <linux/idr.h>
  26 #include <linux/init.h>
  27 #include <linux/interrupt.h>
  28 #include <linux/io.h>
  29 #include <linux/kdev_t.h>
  30 #include <linux/kthread.h>
  31 #include <linux/kernel.h>
  32 #include <linux/mm.h>
  33 #include <linux/module.h>
  34 #include <linux/moduleparam.h>
  35 #include <linux/pci.h>
  36 #include <linux/poison.h>
  37 #include <linux/ptrace.h>
  38 #include <linux/sched.h>
  39 #include <linux/slab.h>
  40 #include <linux/types.h>
  41 #include <scsi/sg.h>
  42 #include <asm-generic/io-64-nonatomic-lo-hi.h>
  43
  44 #define NVME_Q_DEPTH            1024
  45 #define NVME_AQ_DEPTH           64
  46 #define SQ_SIZE(depth)          (depth * sizeof(struct nvme_command))
  47 #define CQ_SIZE(depth)          (depth * sizeof(struct nvme_completion))
  48 #define ADMIN_TIMEOUT           (admin_timeout * HZ)
  49 #define SHUTDOWN_TIMEOUT        (shutdown_timeout * HZ)
  50 #define IOD_TIMEOUT             (retry_time * HZ)
  51
  52 static unsigned char admin_timeout = 60;
  53 module_param(admin_timeout, byte, 0644);
  54 MODULE_PARM_DESC(admin_timeout, "timeout in seconds for admin commands");
  55
  56 unsigned char nvme_io_timeout = 30;
  57 module_param_named(io_timeout, nvme_io_timeout, byte, 0644);
  58 MODULE_PARM_DESC(io_timeout, "timeout in seconds for I/O");
  59
  60 static unsigned char retry_time = 30;
  61 module_param(retry_time, byte, 0644);
  62 MODULE_PARM_DESC(retry_time, "time in seconds to retry failed I/O");
  63
  64 static unsigned char shutdown_timeout = 5;
  65 module_param(shutdown_timeout, byte, 0644);
  66 MODULE_PARM_DESC(shutdown_timeout, "timeout in seconds for controller shutdown");
  67
  68 static int nvme_major;
  69 module_param(nvme_major, int, 0);
  70
  71 static int use_threaded_interrupts;
  72 module_param(use_threaded_interrupts, int, 0);
  73
  74 static DEFINE_SPINLOCK(dev_list_lock);
  75 static LIST_HEAD(dev_list);
  76 static struct task_struct *nvme_thread;
  77 static struct workqueue_struct *nvme_workq;
  78 static wait_queue_head_t nvme_kthread_wait;
  79 static struct notifier_block nvme_nb;
  80
  81 static void nvme_reset_failed_dev(struct work_struct *ws);
  82 static int nvme_process_cq(struct nvme_queue *nvmeq);
  83
  84 struct async_cmd_info {
  85         struct kthread_work work;
  86         struct kthread_worker *worker;
  87         struct request *req;
  88         u32 result;
  89         int status;
  90         void *ctx;
  91 };
  92
  93 /*
  94  * An NVM Express queue.  Each device has at least two (one for admin
  95  * commands and one for I/O commands).
  96  */
  97 struct nvme_queue {
  98         struct llist_node node;
  99         struct device *q_dmadev;
 100         struct nvme_dev *dev;
 101         char irqname[24];       /* nvme4294967295-65535\0 */
 102         spinlock_t q_lock;
 103         struct nvme_command *sq_cmds;
 104         volatile struct nvme_completion *cqes;
 105         dma_addr_t sq_dma_addr;
 106         dma_addr_t cq_dma_addr;
 107         u32 __iomem *q_db;
 108         u16 q_depth;
 109         u16 cq_vector;
 110         u16 sq_head;
 111         u16 sq_tail;
 112         u16 cq_head;
 113         u16 qid;
 114         u8 cq_phase;
 115         u8 cqe_seen;
 116         struct async_cmd_info cmdinfo;
 117         struct blk_mq_hw_ctx *hctx;
 118 };
 119
 120 /*
 121  * Check we didin't inadvertently grow the command struct
 122  */
 123 static inline void _nvme_check_size(void)
 124 {
 125         BUILD_BUG_ON(sizeof(struct nvme_rw_command) != 64);
 126         BUILD_BUG_ON(sizeof(struct nvme_create_cq) != 64);
 127         BUILD_BUG_ON(sizeof(struct nvme_create_sq) != 64);
 128         BUILD_BUG_ON(sizeof(struct nvme_delete_queue) != 64);
 129         BUILD_BUG_ON(sizeof(struct nvme_features) != 64);
 130         BUILD_BUG_ON(sizeof(struct nvme_format_cmd) != 64);
 131         BUILD_BUG_ON(sizeof(struct nvme_abort_cmd) != 64);
 132         BUILD_BUG_ON(sizeof(struct nvme_command) != 64);
 133         BUILD_BUG_ON(sizeof(struct nvme_id_ctrl) != 4096);
 134         BUILD_BUG_ON(sizeof(struct nvme_id_ns) != 4096);
 135         BUILD_BUG_ON(sizeof(struct nvme_lba_range_type) != 64);
 136         BUILD_BUG_ON(sizeof(struct nvme_smart_log) != 512);
 137 }
 138
 139 typedef void (*nvme_completion_fn)(struct nvme_queue *, void *,
 140                                                 struct nvme_completion *);
 141
 142 struct nvme_cmd_info {
 143         nvme_completion_fn fn;
 144         void *ctx;
 145         int aborted;
 146         struct nvme_queue *nvmeq;
 147 };
 148
 149 static int nvme_admin_init_hctx(struct blk_mq_hw_ctx *hctx, void *data,
 150                                 unsigned int hctx_idx)
 151 {
 152         struct nvme_dev *dev = data;
 153         struct nvme_queue *nvmeq = dev->queues[0];
 154
 155         WARN_ON(nvmeq->hctx);
 156         nvmeq->hctx = hctx;
 157         hctx->driver_data = nvmeq;
 158         return 0;
 159 }
 160
 161 static int nvme_admin_init_request(void *data, struct request *req,
 162                                 unsigned int hctx_idx, unsigned int rq_idx,
 163                                 unsigned int numa_node)
 164 {
 165         struct nvme_dev *dev = data;
 166         struct nvme_cmd_info *cmd = blk_mq_rq_to_pdu(req);
 167         struct nvme_queue *nvmeq = dev->queues[0];
 168
 169         BUG_ON(!nvmeq);
 170         cmd->nvmeq = nvmeq;
 171         return 0;
 172 }
 173
 174 static int nvme_init_hctx(struct blk_mq_hw_ctx *hctx, void *data,
 175                           unsigned int hctx_idx)
 176 {
 177         struct nvme_dev *dev = data;
 178         struct nvme_queue *nvmeq = dev->queues[
 179                                         (hctx_idx % dev->queue_count) + 1];
 180
 181         if (!nvmeq->hctx)
 182                 nvmeq->hctx = hctx;
 183
 184         /* nvmeq queues are shared between namespaces. We assume here that
 185          * blk-mq map the tags so they match up with the nvme queue tags. */
 186         WARN_ON(nvmeq->hctx->tags != hctx->tags);
 187
 188         hctx->driver_data = nvmeq;
 189         return 0;
 190 }
 191
 192 static int nvme_init_request(void *data, struct request *req,
 193                                 unsigned int hctx_idx, unsigned int rq_idx,
 194                                 unsigned int numa_node)
 195 {
 196         struct nvme_dev *dev = data;
 197         struct nvme_cmd_info *cmd = blk_mq_rq_to_pdu(req);
 198         struct nvme_queue *nvmeq = dev->queues[hctx_idx + 1];
 199
 200         BUG_ON(!nvmeq);
 201         cmd->nvmeq = nvmeq;
 202         return 0;
 203 }
 204
 205 static void nvme_set_info(struct nvme_cmd_info *cmd, void *ctx,
 206                                 nvme_completion_fn handler)
 207 {
 208         cmd->fn = handler;
 209         cmd->ctx = ctx;
 210         cmd->aborted = 0;
 211 }
 212
 213 /* Special values must be less than 0x1000 */
 214 #define CMD_CTX_BASE            ((void *)POISON_POINTER_DELTA)
 215 #define CMD_CTX_CANCELLED       (0x30C + CMD_CTX_BASE)
 216 #define CMD_CTX_COMPLETED       (0x310 + CMD_CTX_BASE)
 217 #define CMD_CTX_INVALID         (0x314 + CMD_CTX_BASE)
 218
 219 static void special_completion(struct nvme_queue *nvmeq, void *ctx,
 220                                                 struct nvme_completion *cqe)
 221 {
 222         if (ctx == CMD_CTX_CANCELLED)
 223                 return;
 224         if (ctx == CMD_CTX_COMPLETED) {
 225                 dev_warn(nvmeq->q_dmadev,
 226                                 "completed id %d twice on queue %d\n",
 227                                 cqe->command_id, le16_to_cpup(&cqe->sq_id));
 228                 return;
 229         }
 230         if (ctx == CMD_CTX_INVALID) {
 231                 dev_warn(nvmeq->q_dmadev,
 232                                 "invalid id %d completed on queue %d\n",
 233                                 cqe->command_id, le16_to_cpup(&cqe->sq_id));
 234                 return;
 235         }
 236         dev_warn(nvmeq->q_dmadev, "Unknown special completion %p\n", ctx);
 237 }
 238
 239 static void *cancel_cmd_info(struct nvme_cmd_info *cmd, nvme_completion_fn *fn)
 240 {
 241         void *ctx;
 242
 243         if (fn)
 244                 *fn = cmd->fn;
 245         ctx = cmd->ctx;
 246         cmd->fn = special_completion;
 247         cmd->ctx = CMD_CTX_CANCELLED;
 248         return ctx;
 249 }
 250
 251 static void async_req_completion(struct nvme_queue *nvmeq, void *ctx,
 252                                                 struct nvme_completion *cqe)
 253 {
 254         struct request *req = ctx;
 255
 256         u32 result = le32_to_cpup(&cqe->result);
 257         u16 status = le16_to_cpup(&cqe->status) >> 1;
 258
 259         if (status == NVME_SC_SUCCESS || status == NVME_SC_ABORT_REQ)
 260                 ++nvmeq->dev->event_limit;
 261         if (status == NVME_SC_SUCCESS)
 262                 dev_warn(nvmeq->q_dmadev,
 263                         "async event result %08x\n", result);
 264
 265         blk_put_request(req);
 266 }
 267
 268 static void abort_completion(struct nvme_queue *nvmeq, void *ctx,
 269                                                 struct nvme_completion *cqe)
 270 {
 271         struct request *req = ctx;
 272
 273         u16 status = le16_to_cpup(&cqe->status) >> 1;
 274         u32 result = le32_to_cpup(&cqe->result);
 275
 276         blk_put_request(req);
 277
 278         dev_warn(nvmeq->q_dmadev, "Abort status:%x result:%x", status, result);
 279         ++nvmeq->dev->abort_limit;
 280 }
 281
 282 static void async_completion(struct nvme_queue *nvmeq, void *ctx,
 283                                                 struct nvme_completion *cqe)
 284 {
 285         struct async_cmd_info *cmdinfo = ctx;
 286         cmdinfo->result = le32_to_cpup(&cqe->result);
 287         cmdinfo->status = le16_to_cpup(&cqe->status) >> 1;
 288         queue_kthread_work(cmdinfo->worker, &cmdinfo->work);
 289         blk_put_request(cmdinfo->req);
 290 }
 291
 292 static inline struct nvme_cmd_info *get_cmd_from_tag(struct nvme_queue *nvmeq,
 293                                   unsigned int tag)
 294 {
 295         struct blk_mq_hw_ctx *hctx = nvmeq->hctx;
 296         struct request *req = blk_mq_tag_to_rq(hctx->tags, tag);
 297
 298         return blk_mq_rq_to_pdu(req);
 299 }
 300
 301 /*
 302  * Called with local interrupts disabled and the q_lock held.  May not sleep.
 303  */
 304 static void *nvme_finish_cmd(struct nvme_queue *nvmeq, int tag,
 305                                                 nvme_completion_fn *fn)
 306 {
 307         struct nvme_cmd_info *cmd = get_cmd_from_tag(nvmeq, tag);
 308         void *ctx;
 309         if (tag >= nvmeq->q_depth) {
 310                 *fn = special_completion;
 311                 return CMD_CTX_INVALID;
 312         }
 313         if (fn)
 314                 *fn = cmd->fn;
 315         ctx = cmd->ctx;
 316         cmd->fn = special_completion;
 317         cmd->ctx = CMD_CTX_COMPLETED;
 318         return ctx;
 319 }
 320
 321 /**
 322  * nvme_submit_cmd() - Copy a command into a queue and ring the doorbell
 323  * @nvmeq: The queue to use
 324  * @cmd: The command to send
 325  *
 326  * Safe to use from interrupt context
 327  */
 328 static int __nvme_submit_cmd(struct nvme_queue *nvmeq, struct nvme_command *cmd)
 329 {
 330         u16 tail = nvmeq->sq_tail;
 331
 332         memcpy(&nvmeq->sq_cmds[tail], cmd, sizeof(*cmd));
 333         if (++tail == nvmeq->q_depth)
 334                 tail = 0;
 335         writel(tail, nvmeq->q_db);
 336         nvmeq->sq_tail = tail;
 337
 338         return 0;
 339 }
 340
 341 static int nvme_submit_cmd(struct nvme_queue *nvmeq, struct nvme_command *cmd)
 342 {
 343         unsigned long flags;
 344         int ret;
 345         spin_lock_irqsave(&nvmeq->q_lock, flags);
 346         ret = __nvme_submit_cmd(nvmeq, cmd);
 347         spin_unlock_irqrestore(&nvmeq->q_lock, flags);
 348         return ret;
 349 }
 350
 351 static __le64 **iod_list(struct nvme_iod *iod)
 352 {
 353         return ((void *)iod) + iod->offset;
 354 }
 355
 356 /*
 357  * Will slightly overestimate the number of pages needed.  This is OK
 358  * as it only leads to a small amount of wasted memory for the lifetime of
 359  * the I/O.
 360  */
 361 static int nvme_npages(unsigned size, struct nvme_dev *dev)
 362 {
 363         unsigned nprps = DIV_ROUND_UP(size + dev->page_size, dev->page_size);
 364         return DIV_ROUND_UP(8 * nprps, dev->page_size - 8);
 365 }
 366
 367 static struct nvme_iod *
 368 nvme_alloc_iod(unsigned nseg, unsigned nbytes, struct nvme_dev *dev, gfp_t gfp)
 369 {
 370         struct nvme_iod *iod = kmalloc(sizeof(struct nvme_iod) +
 371                                 sizeof(__le64 *) * nvme_npages(nbytes, dev) +
 372                                 sizeof(struct scatterlist) * nseg, gfp);
 373
 374         if (iod) {
 375                 iod->offset = offsetof(struct nvme_iod, sg[nseg]);
 376                 iod->npages = -1;
 377                 iod->length = nbytes;
 378                 iod->nents = 0;
 379                 iod->first_dma = 0ULL;
 380         }
 381
 382         return iod;
 383 }
 384
 385 void nvme_free_iod(struct nvme_dev *dev, struct nvme_iod *iod)
 386 {
 387         const int last_prp = dev->page_size / 8 - 1;
 388         int i;
 389         __le64 **list = iod_list(iod);
 390         dma_addr_t prp_dma = iod->first_dma;
 391
 392         if (iod->npages == 0)
 393                 dma_pool_free(dev->prp_small_pool, list[0], prp_dma);
 394         for (i = 0; i < iod->npages; i++) {
 395                 __le64 *prp_list = list[i];
 396                 dma_addr_t next_prp_dma = le64_to_cpu(prp_list[last_prp]);
 397                 dma_pool_free(dev->prp_page_pool, prp_list, prp_dma);
 398                 prp_dma = next_prp_dma;
 399         }
 400         kfree(iod);
 401 }
 402
 403 static int nvme_error_status(u16 status)
 404 {
 405         switch (status & 0x7ff) {
 406         case NVME_SC_SUCCESS:
 407                 return 0;
 408         case NVME_SC_CAP_EXCEEDED:
 409                 return -ENOSPC;
 410         default:
 411                 return -EIO;
 412         }
 413 }
 414
 415 static void req_completion(struct nvme_queue *nvmeq, void *ctx,
 416                                                 struct nvme_completion *cqe)
 417 {
 418         struct nvme_iod *iod = ctx;
 419         struct request *req = iod->private;
 420         struct nvme_cmd_info *cmd_rq = blk_mq_rq_to_pdu(req);
 421
 422         u16 status = le16_to_cpup(&cqe->status) >> 1;
 423
 424         if (unlikely(status)) {
 425                 if (!(status & NVME_SC_DNR || blk_noretry_request(req))
 426                     && (jiffies - req->start_time) < req->timeout) {
 427                         blk_mq_requeue_request(req);
 428                         blk_mq_kick_requeue_list(req->q);
 429                         return;
 430                 }
 431                 req->errors = nvme_error_status(status);
 432         } else
 433                 req->errors = 0;
 434
 435         if (cmd_rq->aborted)
 436                 dev_warn(&nvmeq->dev->pci_dev->dev,
 437                         "completing aborted command with status:%04x\n",
 438                         status);
 439
 440         if (iod->nents)
 441                 dma_unmap_sg(&nvmeq->dev->pci_dev->dev, iod->sg, iod->nents,
 442                         rq_data_dir(req) ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
 443         nvme_free_iod(nvmeq->dev, iod);
 444
 445         blk_mq_complete_request(req);
 446 }
 447
 448 /* length is in bytes.  gfp flags indicates whether we may sleep. */
 449 int nvme_setup_prps(struct nvme_dev *dev, struct nvme_iod *iod, int total_len,
 450                                                                 gfp_t gfp)
 451 {
 452         struct dma_pool *pool;
 453         int length = total_len;
 454         struct scatterlist *sg = iod->sg;
 455         int dma_len = sg_dma_len(sg);
 456         u64 dma_addr = sg_dma_address(sg);
 457         int offset = offset_in_page(dma_addr);
 458         __le64 *prp_list;
 459         __le64 **list = iod_list(iod);
 460         dma_addr_t prp_dma;
 461         int nprps, i;
 462         u32 page_size = dev->page_size;
 463
 464         length -= (page_size - offset);
 465         if (length <= 0)
 466                 return total_len;
 467
 468         dma_len -= (page_size - offset);
 469         if (dma_len) {
 470                 dma_addr += (page_size - offset);
 471         } else {
 472                 sg = sg_next(sg);
 473                 dma_addr = sg_dma_address(sg);
 474                 dma_len = sg_dma_len(sg);
 475         }
 476
 477         if (length <= page_size) {
 478                 iod->first_dma = dma_addr;
 479                 return total_len;
 480         }
 481
 482         nprps = DIV_ROUND_UP(length, page_size);
 483         if (nprps <= (256 / 8)) {
 484                 pool = dev->prp_small_pool;
 485                 iod->npages = 0;
 486         } else {
 487                 pool = dev->prp_page_pool;
 488                 iod->npages = 1;
 489         }
 490
 491         prp_list = dma_pool_alloc(pool, gfp, &prp_dma);
 492         if (!prp_list) {
 493                 iod->first_dma = dma_addr;
 494                 iod->npages = -1;
 495                 return (total_len - length) + page_size;
 496         }
 497         list[0] = prp_list;
 498         iod->first_dma = prp_dma;
 499         i = 0;
 500         for (;;) {
 501                 if (i == page_size >> 3) {
 502                         __le64 *old_prp_list = prp_list;
 503                         prp_list = dma_pool_alloc(pool, gfp, &prp_dma);
 504                         if (!prp_list)
 505                                 return total_len - length;
 506                         list[iod->npages++] = prp_list;
 507                         prp_list[0] = old_prp_list[i - 1];
 508                         old_prp_list[i - 1] = cpu_to_le64(prp_dma);
 509                         i = 1;
 510                 }
 511                 prp_list[i++] = cpu_to_le64(dma_addr);
 512                 dma_len -= page_size;
 513                 dma_addr += page_size;
 514                 length -= page_size;
 515                 if (length <= 0)
 516                         break;
 517                 if (dma_len > 0)
 518                         continue;
 519                 BUG_ON(dma_len < 0);
 520                 sg = sg_next(sg);
 521                 dma_addr = sg_dma_address(sg);
 522                 dma_len = sg_dma_len(sg);
 523         }
 524
 525         return total_len;
 526 }
 527
 528 /*
 529  * We reuse the small pool to allocate the 16-byte range here as it is not
 530  * worth having a special pool for these or additional cases to handle freeing
 531  * the iod.
 532  */
 533 static void nvme_submit_discard(struct nvme_queue *nvmeq, struct nvme_ns *ns,
 534                 struct request *req, struct nvme_iod *iod)
 535 {
 536         struct nvme_dsm_range *range =
 537                                 (struct nvme_dsm_range *)iod_list(iod)[0];
 538         struct nvme_command *cmnd = &nvmeq->sq_cmds[nvmeq->sq_tail];
 539
 540         range->cattr = cpu_to_le32(0);
 541         range->nlb = cpu_to_le32(blk_rq_bytes(req) >> ns->lba_shift);
 542         range->slba = cpu_to_le64(nvme_block_nr(ns, blk_rq_pos(req)));
 543
 544         memset(cmnd, 0, sizeof(*cmnd));
 545         cmnd->dsm.opcode = nvme_cmd_dsm;
 546         cmnd->dsm.command_id = req->tag;
 547         cmnd->dsm.nsid = cpu_to_le32(ns->ns_id);
 548         cmnd->dsm.prp1 = cpu_to_le64(iod->first_dma);
 549         cmnd->dsm.nr = 0;
 550         cmnd->dsm.attributes = cpu_to_le32(NVME_DSMGMT_AD);
 551
 552         if (++nvmeq->sq_tail == nvmeq->q_depth)
 553                 nvmeq->sq_tail = 0;
 554         writel(nvmeq->sq_tail, nvmeq->q_db);
 555 }
 556
 557 static void nvme_submit_flush(struct nvme_queue *nvmeq, struct nvme_ns *ns,
 558                                                                 int cmdid)
 559 {
 560         struct nvme_command *cmnd = &nvmeq->sq_cmds[nvmeq->sq_tail];
 561
 562         memset(cmnd, 0, sizeof(*cmnd));
 563         cmnd->common.opcode = nvme_cmd_flush;
 564         cmnd->common.command_id = cmdid;
 565         cmnd->common.nsid = cpu_to_le32(ns->ns_id);
 566
 567         if (++nvmeq->sq_tail == nvmeq->q_depth)
 568                 nvmeq->sq_tail = 0;
 569         writel(nvmeq->sq_tail, nvmeq->q_db);
 570 }
 571
 572 static int nvme_submit_iod(struct nvme_queue *nvmeq, struct nvme_iod *iod,
 573                                                         struct nvme_ns *ns)
 574 {
 575         struct request *req = iod->private;
 576         struct nvme_command *cmnd;
 577         u16 control = 0;
 578         u32 dsmgmt = 0;
 579
 580         if (req->cmd_flags & REQ_FUA)
 581                 control |= NVME_RW_FUA;
 582         if (req->cmd_flags & (REQ_FAILFAST_DEV | REQ_RAHEAD))
 583                 control |= NVME_RW_LR;
 584
 585         if (req->cmd_flags & REQ_RAHEAD)
 586                 dsmgmt |= NVME_RW_DSM_FREQ_PREFETCH;
 587
 588         cmnd = &nvmeq->sq_cmds[nvmeq->sq_tail];
 589         memset(cmnd, 0, sizeof(*cmnd));
 590
 591         cmnd->rw.opcode = (rq_data_dir(req) ? nvme_cmd_write : nvme_cmd_read);
 592         cmnd->rw.command_id = req->tag;
 593         cmnd->rw.nsid = cpu_to_le32(ns->ns_id);
 594         cmnd->rw.prp1 = cpu_to_le64(sg_dma_address(iod->sg));
 595         cmnd->rw.prp2 = cpu_to_le64(iod->first_dma);
 596         cmnd->rw.slba = cpu_to_le64(nvme_block_nr(ns, blk_rq_pos(req)));
 597         cmnd->rw.length = cpu_to_le16((blk_rq_bytes(req) >> ns->lba_shift) - 1);
 598         cmnd->rw.control = cpu_to_le16(control);
 599         cmnd->rw.dsmgmt = cpu_to_le32(dsmgmt);
 600
 601         if (++nvmeq->sq_tail == nvmeq->q_depth)
 602                 nvmeq->sq_tail = 0;
 603         writel(nvmeq->sq_tail, nvmeq->q_db);
 604
 605         return 0;
 606 }
 607
 608 static int nvme_queue_rq(struct blk_mq_hw_ctx *hctx,
 609                          const struct blk_mq_queue_data *bd)
 610 {
 611         struct nvme_ns *ns = hctx->queue->queuedata;
 612         struct nvme_queue *nvmeq = hctx->driver_data;
 613         struct request *req = bd->rq;
 614         struct nvme_cmd_info *cmd = blk_mq_rq_to_pdu(req);
 615         struct nvme_iod *iod;
 616         int psegs = req->nr_phys_segments;
 617         int result = BLK_MQ_RQ_QUEUE_BUSY;
 618         enum dma_data_direction dma_dir;
 619         unsigned size = !(req->cmd_flags & REQ_DISCARD) ? blk_rq_bytes(req) :
 620                                                 sizeof(struct nvme_dsm_range);
 621
 622         /*
 623          * Requeued IO has already been prepped
 624          */
 625         iod = req->special;
 626         if (iod)
 627                 goto submit_iod;
 628
 629         iod = nvme_alloc_iod(psegs, size, ns->dev, GFP_ATOMIC);
 630         if (!iod)
 631                 return result;
 632
 633         iod->private = req;
 634         req->special = iod;
 635
 636         nvme_set_info(cmd, iod, req_completion);
 637
 638         if (req->cmd_flags & REQ_DISCARD) {
 639                 void *range;
 640                 /*
 641                  * We reuse the small pool to allocate the 16-byte range here
 642                  * as it is not worth having a special pool for these or
 643                  * additional cases to handle freeing the iod.
 644                  */
 645                 range = dma_pool_alloc(nvmeq->dev->prp_small_pool,
 646                                                 GFP_ATOMIC,
 647                                                 &iod->first_dma);
 648                 if (!range)
 649                         goto finish_cmd;
 650                 iod_list(iod)[0] = (__le64 *)range;
 651                 iod->npages = 0;
 652         } else if (psegs) {
 653                 dma_dir = rq_data_dir(req) ? DMA_TO_DEVICE : DMA_FROM_DEVICE;
 654
 655                 sg_init_table(iod->sg, psegs);
 656                 iod->nents = blk_rq_map_sg(req->q, req, iod->sg);
 657                 if (!iod->nents) {
 658                         result = BLK_MQ_RQ_QUEUE_ERROR;
 659                         goto finish_cmd;
 660                 }
 661
 662                 if (!dma_map_sg(nvmeq->q_dmadev, iod->sg, iod->nents, dma_dir))
 663                         goto finish_cmd;
 664
 665                 if (blk_rq_bytes(req) != nvme_setup_prps(nvmeq->dev, iod,
 666                                                 blk_rq_bytes(req), GFP_ATOMIC))
 667                         goto finish_cmd;
 668         }
 669
 670         blk_mq_start_request(req);
 671
 672  submit_iod:
 673         spin_lock_irq(&nvmeq->q_lock);
 674         if (req->cmd_flags & REQ_DISCARD)
 675                 nvme_submit_discard(nvmeq, ns, req, iod);
 676         else if (req->cmd_flags & REQ_FLUSH)
 677                 nvme_submit_flush(nvmeq, ns, req->tag);
 678         else
 679                 nvme_submit_iod(nvmeq, iod, ns);
 680
 681         nvme_process_cq(nvmeq);
 682         spin_unlock_irq(&nvmeq->q_lock);
 683         return BLK_MQ_RQ_QUEUE_OK;
 684
 685  finish_cmd:
 686         nvme_finish_cmd(nvmeq, req->tag, NULL);
 687         nvme_free_iod(nvmeq->dev, iod);
 688         return result;
 689 }
 690
 691 static int nvme_process_cq(struct nvme_queue *nvmeq)
 692 {
 693         u16 head, phase;
 694
 695         head = nvmeq->cq_head;
 696         phase = nvmeq->cq_phase;
 697
 698         for (;;) {
 699                 void *ctx;
 700                 nvme_completion_fn fn;
 701                 struct nvme_completion cqe = nvmeq->cqes[head];
 702                 if ((le16_to_cpu(cqe.status) & 1) != phase)
 703                         break;
 704                 nvmeq->sq_head = le16_to_cpu(cqe.sq_head);
 705                 if (++head == nvmeq->q_depth) {
 706                         head = 0;
 707                         phase = !phase;
 708                 }
 709                 ctx = nvme_finish_cmd(nvmeq, cqe.command_id, &fn);
 710                 fn(nvmeq, ctx, &cqe);
 711         }
 712
 713         /* If the controller ignores the cq head doorbell and continuously
 714          * writes to the queue, it is theoretically possible to wrap around
 715          * the queue twice and mistakenly return IRQ_NONE.  Linux only
 716          * requires that 0.1% of your interrupts are handled, so this isn't
 717          * a big problem.
 718          */
 719         if (head == nvmeq->cq_head && phase == nvmeq->cq_phase)
 720                 return 0;
 721
 722         writel(head, nvmeq->q_db + nvmeq->dev->db_stride);
 723         nvmeq->cq_head = head;
 724         nvmeq->cq_phase = phase;
 725
 726         nvmeq->cqe_seen = 1;
 727         return 1;
 728 }
 729
 730 /* Admin queue isn't initialized as a request queue. If at some point this
 731  * happens anyway, make sure to notify the user */
 732 static int nvme_admin_queue_rq(struct blk_mq_hw_ctx *hctx,
 733                                const struct blk_mq_queue_data *bd)
 734 {
 735         WARN_ON_ONCE(1);
 736         return BLK_MQ_RQ_QUEUE_ERROR;
 737 }
 738
 739 static irqreturn_t nvme_irq(int irq, void *data)
 740 {
 741         irqreturn_t result;
 742         struct nvme_queue *nvmeq = data;
 743         spin_lock(&nvmeq->q_lock);
 744         nvme_process_cq(nvmeq);
 745         result = nvmeq->cqe_seen ? IRQ_HANDLED : IRQ_NONE;
 746         nvmeq->cqe_seen = 0;
 747         spin_unlock(&nvmeq->q_lock);
 748         return result;
 749 }
 750
 751 static irqreturn_t nvme_irq_check(int irq, void *data)
 752 {
 753         struct nvme_queue *nvmeq = data;
 754         struct nvme_completion cqe = nvmeq->cqes[nvmeq->cq_head];
 755         if ((le16_to_cpu(cqe.status) & 1) != nvmeq->cq_phase)
 756                 return IRQ_NONE;
 757         return IRQ_WAKE_THREAD;
 758 }
 759
 760 static void nvme_abort_cmd_info(struct nvme_queue *nvmeq, struct nvme_cmd_info *
 761                                                                 cmd_info)
 762 {
 763         spin_lock_irq(&nvmeq->q_lock);
 764         cancel_cmd_info(cmd_info, NULL);
 765         spin_unlock_irq(&nvmeq->q_lock);
 766 }
 767
 768 struct sync_cmd_info {
 769         struct task_struct *task;
 770         u32 result;
 771         int status;
 772 };
 773
 774 static void sync_completion(struct nvme_queue *nvmeq, void *ctx,
 775                                                 struct nvme_completion *cqe)
 776 {
 777         struct sync_cmd_info *cmdinfo = ctx;
 778         cmdinfo->result = le32_to_cpup(&cqe->result);
 779         cmdinfo->status = le16_to_cpup(&cqe->status) >> 1;
 780         wake_up_process(cmdinfo->task);
 781 }
 782
 783 /*
 784  * Returns 0 on success.  If the result is negative, it's a Linux error code;
 785  * if the result is positive, it's an NVM Express status code
 786  */
 787 static int nvme_submit_sync_cmd(struct request *req, struct nvme_command *cmd,
 788                                                 u32 *result, unsigned timeout)
 789 {
 790         int ret;
 791         struct sync_cmd_info cmdinfo;
 792         struct nvme_cmd_info *cmd_rq = blk_mq_rq_to_pdu(req);
 793         struct nvme_queue *nvmeq = cmd_rq->nvmeq;
 794
 795         cmdinfo.task = current;
 796         cmdinfo.status = -EINTR;
 797
 798         cmd->common.command_id = req->tag;
 799
 800         nvme_set_info(cmd_rq, &cmdinfo, sync_completion);
 801
 802         set_current_state(TASK_KILLABLE);
 803         ret = nvme_submit_cmd(nvmeq, cmd);
 804         if (ret) {
 805                 nvme_finish_cmd(nvmeq, req->tag, NULL);
 806                 set_current_state(TASK_RUNNING);
 807         }
 808         schedule_timeout(timeout);
 809
 810         if (cmdinfo.status == -EINTR) {
 811                 nvme_abort_cmd_info(nvmeq, blk_mq_rq_to_pdu(req));
 812                 return -EINTR;
 813         }
 814
 815         if (result)
 816                 *result = cmdinfo.result;
 817
 818         return cmdinfo.status;
 819 }
 820
 821 static int nvme_submit_async_admin_req(struct nvme_dev *dev)
 822 {
 823         struct nvme_queue *nvmeq = dev->queues[0];
 824         struct nvme_command c;
 825         struct nvme_cmd_info *cmd_info;
 826         struct request *req;
 827
 828         req = blk_mq_alloc_request(dev->admin_q, WRITE, GFP_KERNEL, false);
 829         if (IS_ERR(req))
 830                 return PTR_ERR(req);
 831
 832         cmd_info = blk_mq_rq_to_pdu(req);
 833         nvme_set_info(cmd_info, req, async_req_completion);
 834
 835         memset(&c, 0, sizeof(c));
 836         c.common.opcode = nvme_admin_async_event;
 837         c.common.command_id = req->tag;
 838
 839         return __nvme_submit_cmd(nvmeq, &c);
 840 }
 841
 842 static int nvme_submit_admin_async_cmd(struct nvme_dev *dev,
 843                         struct nvme_command *cmd,
 844                         struct async_cmd_info *cmdinfo, unsigned timeout)
 845 {
 846         struct nvme_queue *nvmeq = dev->queues[0];
 847         struct request *req;
 848         struct nvme_cmd_info *cmd_rq;
 849
 850         req = blk_mq_alloc_request(dev->admin_q, WRITE, GFP_KERNEL, false);
 851         if (IS_ERR(req))
 852                 return PTR_ERR(req);
 853
 854         req->timeout = timeout;
 855         cmd_rq = blk_mq_rq_to_pdu(req);
 856         cmdinfo->req = req;
 857         nvme_set_info(cmd_rq, cmdinfo, async_completion);
 858         cmdinfo->status = -EINTR;
 859
 860         cmd->common.command_id = req->tag;
 861
 862         return nvme_submit_cmd(nvmeq, cmd);
 863 }
 864
 865 static int __nvme_submit_admin_cmd(struct nvme_dev *dev, struct nvme_command *cmd,
 866                                                 u32 *result, unsigned timeout)
 867 {
 868         int res;
 869         struct request *req;
 870
 871         req = blk_mq_alloc_request(dev->admin_q, WRITE, GFP_KERNEL, false);
 872         if (!req)
 873                 return -ENOMEM;
 874         res = nvme_submit_sync_cmd(req, cmd, result, timeout);
 875         blk_put_request(req);
 876         return res;
 877 }
 878
 879 int nvme_submit_admin_cmd(struct nvme_dev *dev, struct nvme_command *cmd,
 880                                                                 u32 *result)
 881 {
 882         return __nvme_submit_admin_cmd(dev, cmd, result, ADMIN_TIMEOUT);
 883 }
 884
 885 int nvme_submit_io_cmd(struct nvme_dev *dev, struct nvme_ns *ns,
 886                                         struct nvme_command *cmd, u32 *result)
 887 {
 888         int res;
 889         struct request *req;
 890
 891         req = blk_mq_alloc_request(ns->queue, WRITE, (GFP_KERNEL|__GFP_WAIT),
 892                                                                         false);
 893         if (!req)
 894                 return -ENOMEM;
 895         res = nvme_submit_sync_cmd(req, cmd, result, NVME_IO_TIMEOUT);
 896         blk_put_request(req);
 897         return res;
 898 }
 899
 900 static int adapter_delete_queue(struct nvme_dev *dev, u8 opcode, u16 id)
 901 {
 902         struct nvme_command c;
 903
 904         memset(&c, 0, sizeof(c));
 905         c.delete_queue.opcode = opcode;
 906         c.delete_queue.qid = cpu_to_le16(id);
 907
 908         return nvme_submit_admin_cmd(dev, &c, NULL);
 909 }
 910
 911 static int adapter_alloc_cq(struct nvme_dev *dev, u16 qid,
 912                                                 struct nvme_queue *nvmeq)
 913 {
 914         struct nvme_command c;
 915         int flags = NVME_QUEUE_PHYS_CONTIG | NVME_CQ_IRQ_ENABLED;
 916
 917         memset(&c, 0, sizeof(c));
 918         c.create_cq.opcode = nvme_admin_create_cq;
 919         c.create_cq.prp1 = cpu_to_le64(nvmeq->cq_dma_addr);
 920         c.create_cq.cqid = cpu_to_le16(qid);
 921         c.create_cq.qsize = cpu_to_le16(nvmeq->q_depth - 1);
 922         c.create_cq.cq_flags = cpu_to_le16(flags);
 923         c.create_cq.irq_vector = cpu_to_le16(nvmeq->cq_vector);
 924
 925         return nvme_submit_admin_cmd(dev, &c, NULL);
 926 }
 927
 928 static int adapter_alloc_sq(struct nvme_dev *dev, u16 qid,
 929                                                 struct nvme_queue *nvmeq)
 930 {
 931         struct nvme_command c;
 932         int flags = NVME_QUEUE_PHYS_CONTIG | NVME_SQ_PRIO_MEDIUM;
 933
 934         memset(&c, 0, sizeof(c));
 935         c.create_sq.opcode = nvme_admin_create_sq;
 936         c.create_sq.prp1 = cpu_to_le64(nvmeq->sq_dma_addr);
 937         c.create_sq.sqid = cpu_to_le16(qid);
 938         c.create_sq.qsize = cpu_to_le16(nvmeq->q_depth - 1);
 939         c.create_sq.sq_flags = cpu_to_le16(flags);
 940         c.create_sq.cqid = cpu_to_le16(qid);
 941
 942         return nvme_submit_admin_cmd(dev, &c, NULL);
 943 }
 944
 945 static int adapter_delete_cq(struct nvme_dev *dev, u16 cqid)
 946 {
 947         return adapter_delete_queue(dev, nvme_admin_delete_cq, cqid);
 948 }
 949
 950 static int adapter_delete_sq(struct nvme_dev *dev, u16 sqid)
 951 {
 952         return adapter_delete_queue(dev, nvme_admin_delete_sq, sqid);
 953 }
 954
 955 int nvme_identify(struct nvme_dev *dev, unsigned nsid, unsigned cns,
 956                                                         dma_addr_t dma_addr)
 957 {
 958         struct nvme_command c;
 959
 960         memset(&c, 0, sizeof(c));
 961         c.identify.opcode = nvme_admin_identify;
 962         c.identify.nsid = cpu_to_le32(nsid);
 963         c.identify.prp1 = cpu_to_le64(dma_addr);
 964         c.identify.cns = cpu_to_le32(cns);
 965
 966         return nvme_submit_admin_cmd(dev, &c, NULL);
 967 }
 968
 969 int nvme_get_features(struct nvme_dev *dev, unsigned fid, unsigned nsid,
 970                                         dma_addr_t dma_addr, u32 *result)
 971 {
 972         struct nvme_command c;
 973
 974         memset(&c, 0, sizeof(c));
 975         c.features.opcode = nvme_admin_get_features;
 976         c.features.nsid = cpu_to_le32(nsid);
 977         c.features.prp1 = cpu_to_le64(dma_addr);
 978         c.features.fid = cpu_to_le32(fid);
 979
 980         return nvme_submit_admin_cmd(dev, &c, result);
 981 }
 982
 983 int nvme_set_features(struct nvme_dev *dev, unsigned fid, unsigned dword11,
 984                                         dma_addr_t dma_addr, u32 *result)
 985 {
 986         struct nvme_command c;
 987
 988         memset(&c, 0, sizeof(c));
 989         c.features.opcode = nvme_admin_set_features;
 990         c.features.prp1 = cpu_to_le64(dma_addr);
 991         c.features.fid = cpu_to_le32(fid);
 992         c.features.dword11 = cpu_to_le32(dword11);
 993
 994         return nvme_submit_admin_cmd(dev, &c, result);
 995 }
 996
 997 /**
 998  * nvme_abort_req - Attempt aborting a request
 999  *
1000  * Schedule controller reset if the command was already aborted once before and
1001  * still hasn't been returned to the driver, or if this is the admin queue.
1002  */
1003 static void nvme_abort_req(struct request *req)
1004 {
1005         struct nvme_cmd_info *cmd_rq = blk_mq_rq_to_pdu(req);
1006         struct nvme_queue *nvmeq = cmd_rq->nvmeq;
1007         struct nvme_dev *dev = nvmeq->dev;
1008         struct request *abort_req;
1009         struct nvme_cmd_info *abort_cmd;
1010         struct nvme_command cmd;
1011
1012         if (!nvmeq->qid || cmd_rq->aborted) {
1013                 if (work_busy(&dev->reset_work))
1014                         return;
1015                 list_del_init(&dev->node);
1016                 dev_warn(&dev->pci_dev->dev,
1017                         "I/O %d QID %d timeout, reset controller\n",
1018                                                         req->tag, nvmeq->qid);
1019                 dev->reset_workfn = nvme_reset_failed_dev;
1020                 queue_work(nvme_workq, &dev->reset_work);
1021                 return;
1022         }
1023
1024         if (!dev->abort_limit)
1025                 return;
1026
1027         abort_req = blk_mq_alloc_request(dev->admin_q, WRITE, GFP_ATOMIC,
1028                                                                         false);
1029         if (IS_ERR(abort_req))
1030                 return;
1031
1032         abort_cmd = blk_mq_rq_to_pdu(abort_req);
1033         nvme_set_info(abort_cmd, abort_req, abort_completion);
1034
1035         memset(&cmd, 0, sizeof(cmd));
1036         cmd.abort.opcode = nvme_admin_abort_cmd;
1037         cmd.abort.cid = req->tag;
1038         cmd.abort.sqid = cpu_to_le16(nvmeq->qid);
1039         cmd.abort.command_id = abort_req->tag;
1040
1041         --dev->abort_limit;
1042         cmd_rq->aborted = 1;
1043
1044         dev_warn(nvmeq->q_dmadev, "Aborting I/O %d QID %d\n", req->tag,
1045                                                         nvmeq->qid);
1046         if (nvme_submit_cmd(dev->queues[0], &cmd) < 0) {
1047                 dev_warn(nvmeq->q_dmadev,
1048                                 "Could not abort I/O %d QID %d",
1049                                 req->tag, nvmeq->qid);
1050                 blk_put_request(req);
1051         }
1052 }
1053
1054 static void nvme_cancel_queue_ios(struct blk_mq_hw_ctx *hctx,
1055                                 struct request *req, void *data, bool reserved)
1056 {
1057         struct nvme_queue *nvmeq = data;
1058         void *ctx;
1059         nvme_completion_fn fn;
1060         struct nvme_cmd_info *cmd;
1061         static struct nvme_completion cqe = {
1062                 .status = cpu_to_le16(NVME_SC_ABORT_REQ << 1),
1063         };
1064
1065         cmd = blk_mq_rq_to_pdu(req);
1066
1067         if (cmd->ctx == CMD_CTX_CANCELLED)
1068                 return;
1069
1070         dev_warn(nvmeq->q_dmadev, "Cancelling I/O %d QID %d\n",
1071                                                 req->tag, nvmeq->qid);
1072         ctx = cancel_cmd_info(cmd, &fn);
1073         fn(nvmeq, ctx, &cqe);
1074 }
1075
1076 static enum blk_eh_timer_return nvme_timeout(struct request *req, bool reserved)
1077 {
1078         struct nvme_cmd_info *cmd = blk_mq_rq_to_pdu(req);
1079         struct nvme_queue *nvmeq = cmd->nvmeq;
1080
1081         dev_warn(nvmeq->q_dmadev, "Timeout I/O %d QID %d\n", req->tag,
1082                                                         nvmeq->qid);
1083         if (nvmeq->dev->initialized)
1084                 nvme_abort_req(req);
1085
1086         /*
1087          * The aborted req will be completed on receiving the abort req.
1088          * We enable the timer again. If hit twice, it'll cause a device reset,
1089          * as the device then is in a faulty state.
1090          */
1091         return BLK_EH_RESET_TIMER;
1092 }
1093
1094 static void nvme_free_queue(struct nvme_queue *nvmeq)
1095 {
1096         dma_free_coherent(nvmeq->q_dmadev, CQ_SIZE(nvmeq->q_depth),
1097                                 (void *)nvmeq->cqes, nvmeq->cq_dma_addr);
1098         dma_free_coherent(nvmeq->q_dmadev, SQ_SIZE(nvmeq->q_depth),
1099                                         nvmeq->sq_cmds, nvmeq->sq_dma_addr);
1100         kfree(nvmeq);
1101 }
1102
1103 static void nvme_free_queues(struct nvme_dev *dev, int lowest)
1104 {
1105         LLIST_HEAD(q_list);
1106         struct nvme_queue *nvmeq, *next;
1107         struct llist_node *entry;
1108         int i;
1109
1110         for (i = dev->queue_count - 1; i >= lowest; i--) {
1111                 struct nvme_queue *nvmeq = dev->queues[i];
1112                 llist_add(&nvmeq->node, &q_list);
1113                 dev->queue_count--;
1114                 dev->queues[i] = NULL;
1115         }
1116         synchronize_rcu();
1117         entry = llist_del_all(&q_list);
1118         llist_for_each_entry_safe(nvmeq, next, entry, node)
1119                 nvme_free_queue(nvmeq);
1120 }
1121
1122 /**
1123  * nvme_suspend_queue - put queue into suspended state
1124  * @nvmeq - queue to suspend
1125  */
1126 static int nvme_suspend_queue(struct nvme_queue *nvmeq)
1127 {
1128         int vector = nvmeq->dev->entry[nvmeq->cq_vector].vector;
1129
1130         spin_lock_irq(&nvmeq->q_lock);
1131         nvmeq->dev->online_queues--;
1132         spin_unlock_irq(&nvmeq->q_lock);
1133
1134         irq_set_affinity_hint(vector, NULL);
1135         free_irq(vector, nvmeq);
1136
1137         return 0;
1138 }
1139
1140 static void nvme_clear_queue(struct nvme_queue *nvmeq)
1141 {
1142         struct blk_mq_hw_ctx *hctx = nvmeq->hctx;
1143
1144         spin_lock_irq(&nvmeq->q_lock);
1145         nvme_process_cq(nvmeq);
1146         if (hctx && hctx->tags)
1147                 blk_mq_tag_busy_iter(hctx, nvme_cancel_queue_ios, nvmeq);
1148         spin_unlock_irq(&nvmeq->q_lock);
1149 }
1150
1151 static void nvme_disable_queue(struct nvme_dev *dev, int qid)
1152 {
1153         struct nvme_queue *nvmeq = dev->queues[qid];
1154
1155         if (!nvmeq)
1156                 return;
1157         if (nvme_suspend_queue(nvmeq))
1158                 return;
1159
1160         /* Don't tell the adapter to delete the admin queue.
1161          * Don't tell a removed adapter to delete IO queues. */
1162         if (qid && readl(&dev->bar->csts) != -1) {
1163                 adapter_delete_sq(dev, qid);
1164                 adapter_delete_cq(dev, qid);
1165         }
1166         nvme_clear_queue(nvmeq);
1167 }
1168
1169 static struct nvme_queue *nvme_alloc_queue(struct nvme_dev *dev, int qid,
1170                                                         int depth, int vector)
1171 {
1172         struct device *dmadev = &dev->pci_dev->dev;
1173         struct nvme_queue *nvmeq = kzalloc(sizeof(*nvmeq), GFP_KERNEL);
1174         if (!nvmeq)
1175                 return NULL;
1176
1177         nvmeq->cqes = dma_zalloc_coherent(dmadev, CQ_SIZE(depth),
1178                                           &nvmeq->cq_dma_addr, GFP_KERNEL);
1179         if (!nvmeq->cqes)
1180                 goto free_nvmeq;
1181
1182         nvmeq->sq_cmds = dma_alloc_coherent(dmadev, SQ_SIZE(depth),
1183                                         &nvmeq->sq_dma_addr, GFP_KERNEL);
1184         if (!nvmeq->sq_cmds)
1185                 goto free_cqdma;
1186
1187         nvmeq->q_dmadev = dmadev;
1188         nvmeq->dev = dev;
1189         snprintf(nvmeq->irqname, sizeof(nvmeq->irqname), "nvme%dq%d",
1190                         dev->instance, qid);
1191         spin_lock_init(&nvmeq->q_lock);
1192         nvmeq->cq_head = 0;
1193         nvmeq->cq_phase = 1;
1194         nvmeq->q_db = &dev->dbs[qid * 2 * dev->db_stride];
1195         nvmeq->q_depth = depth;
1196         nvmeq->cq_vector = vector;
1197         nvmeq->qid = qid;
1198         dev->queue_count++;
1199         dev->queues[qid] = nvmeq;
1200
1201         return nvmeq;
1202
1203  free_cqdma:
1204         dma_free_coherent(dmadev, CQ_SIZE(depth), (void *)nvmeq->cqes,
1205                                                         nvmeq->cq_dma_addr);
1206  free_nvmeq:
1207         kfree(nvmeq);
1208         return NULL;
1209 }
1210
1211 static int queue_request_irq(struct nvme_dev *dev, struct nvme_queue *nvmeq,
1212                                                         const char *name)
1213 {
1214         if (use_threaded_interrupts)
1215                 return request_threaded_irq(dev->entry[nvmeq->cq_vector].vector,
1216                                         nvme_irq_check, nvme_irq, IRQF_SHARED,
1217                                         name, nvmeq);
1218         return request_irq(dev->entry[nvmeq->cq_vector].vector, nvme_irq,
1219                                 IRQF_SHARED, name, nvmeq);
1220 }
1221
1222 static void nvme_init_queue(struct nvme_queue *nvmeq, u16 qid)
1223 {
1224         struct nvme_dev *dev = nvmeq->dev;
1225
1226         spin_lock_irq(&nvmeq->q_lock);
1227         nvmeq->sq_tail = 0;
1228         nvmeq->cq_head = 0;
1229         nvmeq->cq_phase = 1;
1230         nvmeq->q_db = &dev->dbs[qid * 2 * dev->db_stride];
1231         memset((void *)nvmeq->cqes, 0, CQ_SIZE(nvmeq->q_depth));
1232         dev->online_queues++;
1233         spin_unlock_irq(&nvmeq->q_lock);
1234 }
1235
1236 static int nvme_create_queue(struct nvme_queue *nvmeq, int qid)
1237 {
1238         struct nvme_dev *dev = nvmeq->dev;
1239         int result;
1240
1241         result = adapter_alloc_cq(dev, qid, nvmeq);
1242         if (result < 0)
1243                 return result;
1244
1245         result = adapter_alloc_sq(dev, qid, nvmeq);
1246         if (result < 0)
1247                 goto release_cq;
1248
1249         result = queue_request_irq(dev, nvmeq, nvmeq->irqname);
1250         if (result < 0)
1251                 goto release_sq;
1252
1253         nvme_init_queue(nvmeq, qid);
1254         return result;
1255
1256  release_sq:
1257         adapter_delete_sq(dev, qid);
1258  release_cq:
1259         adapter_delete_cq(dev, qid);
1260         return result;
1261 }
1262
1263 static int nvme_wait_ready(struct nvme_dev *dev, u64 cap, bool enabled)
1264 {
1265         unsigned long timeout;
1266         u32 bit = enabled ? NVME_CSTS_RDY : 0;
1267
1268         timeout = ((NVME_CAP_TIMEOUT(cap) + 1) * HZ / 2) + jiffies;
1269
1270         while ((readl(&dev->bar->csts) & NVME_CSTS_RDY) != bit) {
1271                 msleep(100);
1272                 if (fatal_signal_pending(current))
1273                         return -EINTR;
1274                 if (time_after(jiffies, timeout)) {
1275                         dev_err(&dev->pci_dev->dev,
1276                                 "Device not ready; aborting %s\n", enabled ?
1277                                                 "initialisation" : "reset");
1278                         return -ENODEV;
1279                 }
1280         }
1281
1282         return 0;
1283 }
1284
1285 /*
1286  * If the device has been passed off to us in an enabled state, just clear
1287  * the enabled bit.  The spec says we should set the 'shutdown notification
1288  * bits', but doing so may cause the device to complete commands to the
1289  * admin queue ... and we don't know what memory that might be pointing at!
1290  */
1291 static int nvme_disable_ctrl(struct nvme_dev *dev, u64 cap)
1292 {
1293         dev->ctrl_config &= ~NVME_CC_SHN_MASK;
1294         dev->ctrl_config &= ~NVME_CC_ENABLE;
1295         writel(dev->ctrl_config, &dev->bar->cc);
1296
1297         return nvme_wait_ready(dev, cap, false);
1298 }
1299
1300 static int nvme_enable_ctrl(struct nvme_dev *dev, u64 cap)
1301 {
1302         dev->ctrl_config &= ~NVME_CC_SHN_MASK;
1303         dev->ctrl_config |= NVME_CC_ENABLE;
1304         writel(dev->ctrl_config, &dev->bar->cc);
1305
1306         return nvme_wait_ready(dev, cap, true);
1307 }
1308
1309 static int nvme_shutdown_ctrl(struct nvme_dev *dev)
1310 {
1311         unsigned long timeout;
1312
1313         dev->ctrl_config &= ~NVME_CC_SHN_MASK;
1314         dev->ctrl_config |= NVME_CC_SHN_NORMAL;
1315
1316         writel(dev->ctrl_config, &dev->bar->cc);
1317
1318         timeout = SHUTDOWN_TIMEOUT + jiffies;
1319         while ((readl(&dev->bar->csts) & NVME_CSTS_SHST_MASK) !=
1320                                                         NVME_CSTS_SHST_CMPLT) {
1321                 msleep(100);
1322                 if (fatal_signal_pending(current))
1323                         return -EINTR;
1324                 if (time_after(jiffies, timeout)) {
1325                         dev_err(&dev->pci_dev->dev,
1326                                 "Device shutdown incomplete; abort shutdown\n");
1327                         return -ENODEV;
1328                 }
1329         }
1330
1331         return 0;
1332 }
1333
1334 static struct blk_mq_ops nvme_mq_admin_ops = {
1335         .queue_rq       = nvme_admin_queue_rq,
1336         .map_queue      = blk_mq_map_queue,
1337         .init_hctx      = nvme_admin_init_hctx,
1338         .init_request   = nvme_admin_init_request,
1339         .timeout        = nvme_timeout,
1340 };
1341
1342 static struct blk_mq_ops nvme_mq_ops = {
1343         .queue_rq       = nvme_queue_rq,
1344         .map_queue      = blk_mq_map_queue,
1345         .init_hctx      = nvme_init_hctx,
1346         .init_request   = nvme_init_request,
1347         .timeout        = nvme_timeout,
1348 };
1349
1350 static int nvme_alloc_admin_tags(struct nvme_dev *dev)
1351 {
1352         if (!dev->admin_q) {
1353                 dev->admin_tagset.ops = &nvme_mq_admin_ops;
1354                 dev->admin_tagset.nr_hw_queues = 1;
1355                 dev->admin_tagset.queue_depth = NVME_AQ_DEPTH - 1;
1356                 dev->admin_tagset.timeout = ADMIN_TIMEOUT;
1357                 dev->admin_tagset.numa_node = dev_to_node(&dev->pci_dev->dev);
1358                 dev->admin_tagset.cmd_size = sizeof(struct nvme_cmd_info);
1359                 dev->admin_tagset.driver_data = dev;
1360
1361                 if (blk_mq_alloc_tag_set(&dev->admin_tagset))
1362                         return -ENOMEM;
1363
1364                 dev->admin_q = blk_mq_init_queue(&dev->admin_tagset);
1365                 if (!dev->admin_q) {
1366                         blk_mq_free_tag_set(&dev->admin_tagset);
1367                         return -ENOMEM;
1368                 }
1369         }
1370
1371         return 0;
1372 }
1373
1374 static void nvme_free_admin_tags(struct nvme_dev *dev)
1375 {
1376         if (dev->admin_q)
1377                 blk_mq_free_tag_set(&dev->admin_tagset);
1378 }
1379
1380 static int nvme_configure_admin_queue(struct nvme_dev *dev)
1381 {
1382         int result;
1383         u32 aqa;
1384         u64 cap = readq(&dev->bar->cap);
1385         struct nvme_queue *nvmeq;
1386         unsigned page_shift = PAGE_SHIFT;
1387         unsigned dev_page_min = NVME_CAP_MPSMIN(cap) + 12;
1388         unsigned dev_page_max = NVME_CAP_MPSMAX(cap) + 12;
1389
1390         if (page_shift < dev_page_min) {
1391                 dev_err(&dev->pci_dev->dev,
1392                                 "Minimum device page size (%u) too large for "
1393                                 "host (%u)\n", 1 << dev_page_min,
1394                                 1 << page_shift);
1395                 return -ENODEV;
1396         }
1397         if (page_shift > dev_page_max) {
1398                 dev_info(&dev->pci_dev->dev,
1399                                 "Device maximum page size (%u) smaller than "
1400                                 "host (%u); enabling work-around\n",
1401                                 1 << dev_page_max, 1 << page_shift);
1402                 page_shift = dev_page_max;
1403         }
1404
1405         result = nvme_disable_ctrl(dev, cap);
1406         if (result < 0)
1407                 return result;
1408
1409         nvmeq = dev->queues[0];
1410         if (!nvmeq) {
1411                 nvmeq = nvme_alloc_queue(dev, 0, NVME_AQ_DEPTH, 0);
1412                 if (!nvmeq)
1413                         return -ENOMEM;
1414         }
1415
1416         aqa = nvmeq->q_depth - 1;
1417         aqa |= aqa << 16;
1418
1419         dev->page_size = 1 << page_shift;
1420
1421         dev->ctrl_config = NVME_CC_CSS_NVM;
1422         dev->ctrl_config |= (page_shift - 12) << NVME_CC_MPS_SHIFT;
1423         dev->ctrl_config |= NVME_CC_ARB_RR | NVME_CC_SHN_NONE;
1424         dev->ctrl_config |= NVME_CC_IOSQES | NVME_CC_IOCQES;
1425
1426         writel(aqa, &dev->bar->aqa);
1427         writeq(nvmeq->sq_dma_addr, &dev->bar->asq);
1428         writeq(nvmeq->cq_dma_addr, &dev->bar->acq);
1429
1430         result = nvme_enable_ctrl(dev, cap);
1431         if (result)
1432                 goto free_nvmeq;
1433
1434         result = nvme_alloc_admin_tags(dev);
1435         if (result)
1436                 goto free_nvmeq;
1437
1438         result = queue_request_irq(dev, nvmeq, nvmeq->irqname);
1439         if (result)
1440                 goto free_tags;
1441
1442         return result;
1443
1444  free_tags:
1445         nvme_free_admin_tags(dev);
1446  free_nvmeq:
1447         nvme_free_queues(dev, 0);
1448         return result;
1449 }
1450
1451 struct nvme_iod *nvme_map_user_pages(struct nvme_dev *dev, int write,
1452                                 unsigned long addr, unsigned length)
1453 {
1454         int i, err, count, nents, offset;
1455         struct scatterlist *sg;
1456         struct page **pages;
1457         struct nvme_iod *iod;
1458
1459         if (addr & 3)
1460                 return ERR_PTR(-EINVAL);
1461         if (!length || length > INT_MAX - PAGE_SIZE)
1462                 return ERR_PTR(-EINVAL);
1463
1464         offset = offset_in_page(addr);
1465         count = DIV_ROUND_UP(offset + length, PAGE_SIZE);
1466         pages = kcalloc(count, sizeof(*pages), GFP_KERNEL);
1467         if (!pages)
1468                 return ERR_PTR(-ENOMEM);
1469
1470         err = get_user_pages_fast(addr, count, 1, pages);
1471         if (err < count) {
1472                 count = err;
1473                 err = -EFAULT;
1474                 goto put_pages;
1475         }
1476
1477         err = -ENOMEM;
1478         iod = nvme_alloc_iod(count, length, dev, GFP_KERNEL);
1479         if (!iod)
1480                 goto put_pages;
1481
1482         sg = iod->sg;
1483         sg_init_table(sg, count);
1484         for (i = 0; i < count; i++) {
1485                 sg_set_page(&sg[i], pages[i],
1486                             min_t(unsigned, length, PAGE_SIZE - offset),
1487                             offset);
1488                 length -= (PAGE_SIZE - offset);
1489                 offset = 0;
1490         }
1491         sg_mark_end(&sg[i - 1]);
1492         iod->nents = count;
1493
1494         nents = dma_map_sg(&dev->pci_dev->dev, sg, count,
1495                                 write ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
1496         if (!nents)
1497                 goto free_iod;
1498
1499         kfree(pages);
1500         return iod;
1501
1502  free_iod:
1503         kfree(iod);
1504  put_pages:
1505         for (i = 0; i < count; i++)
1506                 put_page(pages[i]);
1507         kfree(pages);
1508         return ERR_PTR(err);
1509 }
1510
1511 void nvme_unmap_user_pages(struct nvme_dev *dev, int write,
1512                         struct nvme_iod *iod)
1513 {
1514         int i;
1515
1516         dma_unmap_sg(&dev->pci_dev->dev, iod->sg, iod->nents,
1517                                 write ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
1518
1519         for (i = 0; i < iod->nents; i++)
1520                 put_page(sg_page(&iod->sg[i]));
1521 }
1522
1523 static int nvme_submit_io(struct nvme_ns *ns, struct nvme_user_io __user *uio)
1524 {
1525         struct nvme_dev *dev = ns->dev;
1526         struct nvme_user_io io;
1527         struct nvme_command c;
1528         unsigned length, meta_len;
1529         int status, i;
1530         struct nvme_iod *iod, *meta_iod = NULL;
1531         dma_addr_t meta_dma_addr;
1532         void *meta, *uninitialized_var(meta_mem);
1533
1534         if (copy_from_user(&io, uio, sizeof(io)))
1535                 return -EFAULT;
1536         length = (io.nblocks + 1) << ns->lba_shift;
1537         meta_len = (io.nblocks + 1) * ns->ms;
1538
1539         if (meta_len && ((io.metadata & 3) || !io.metadata))
1540                 return -EINVAL;
1541
1542         switch (io.opcode) {
1543         case nvme_cmd_write:
1544         case nvme_cmd_read:
1545         case nvme_cmd_compare:
1546                 iod = nvme_map_user_pages(dev, io.opcode & 1, io.addr, length);
1547                 break;
1548         default:
1549                 return -EINVAL;
1550         }
1551
1552         if (IS_ERR(iod))
1553                 return PTR_ERR(iod);
1554
1555         memset(&c, 0, sizeof(c));
1556         c.rw.opcode = io.opcode;
1557         c.rw.flags = io.flags;
1558         c.rw.nsid = cpu_to_le32(ns->ns_id);
1559         c.rw.slba = cpu_to_le64(io.slba);
1560         c.rw.length = cpu_to_le16(io.nblocks);
1561         c.rw.control = cpu_to_le16(io.control);
1562         c.rw.dsmgmt = cpu_to_le32(io.dsmgmt);
1563         c.rw.reftag = cpu_to_le32(io.reftag);
1564         c.rw.apptag = cpu_to_le16(io.apptag);
1565         c.rw.appmask = cpu_to_le16(io.appmask);
1566
1567         if (meta_len) {
1568                 meta_iod = nvme_map_user_pages(dev, io.opcode & 1, io.metadata,
1569                                                                 meta_len);
1570                 if (IS_ERR(meta_iod)) {
1571                         status = PTR_ERR(meta_iod);
1572                         meta_iod = NULL;
1573                         goto unmap;
1574                 }
1575
1576                 meta_mem = dma_alloc_coherent(&dev->pci_dev->dev, meta_len,
1577                                                 &meta_dma_addr, GFP_KERNEL);
1578                 if (!meta_mem) {
1579                         status = -ENOMEM;
1580                         goto unmap;
1581                 }
1582
1583                 if (io.opcode & 1) {
1584                         int meta_offset = 0;
1585
1586                         for (i = 0; i < meta_iod->nents; i++) {
1587                                 meta = kmap_atomic(sg_page(&meta_iod->sg[i])) +
1588                                                 meta_iod->sg[i].offset;
1589                                 memcpy(meta_mem + meta_offset, meta,
1590                                                 meta_iod->sg[i].length);
1591                                 kunmap_atomic(meta);
1592                                 meta_offset += meta_iod->sg[i].length;
1593                         }
1594                 }
1595
1596                 c.rw.metadata = cpu_to_le64(meta_dma_addr);
1597         }
1598
1599         length = nvme_setup_prps(dev, iod, length, GFP_KERNEL);
1600         c.rw.prp1 = cpu_to_le64(sg_dma_address(iod->sg));
1601         c.rw.prp2 = cpu_to_le64(iod->first_dma);
1602
1603         if (length != (io.nblocks + 1) << ns->lba_shift)
1604                 status = -ENOMEM;
1605         else
1606                 status = nvme_submit_io_cmd(dev, ns, &c, NULL);
1607
1608         if (meta_len) {
1609                 if (status == NVME_SC_SUCCESS && !(io.opcode & 1)) {
1610                         int meta_offset = 0;
1611
1612                         for (i = 0; i < meta_iod->nents; i++) {
1613                                 meta = kmap_atomic(sg_page(&meta_iod->sg[i])) +
1614                                                 meta_iod->sg[i].offset;
1615                                 memcpy(meta, meta_mem + meta_offset,
1616                                                 meta_iod->sg[i].length);
1617                                 kunmap_atomic(meta);
1618                                 meta_offset += meta_iod->sg[i].length;
1619                         }
1620                 }
1621
1622                 dma_free_coherent(&dev->pci_dev->dev, meta_len, meta_mem,
1623                                                                 meta_dma_addr);
1624         }
1625
1626  unmap:
1627         nvme_unmap_user_pages(dev, io.opcode & 1, iod);
1628         nvme_free_iod(dev, iod);
1629
1630         if (meta_iod) {
1631                 nvme_unmap_user_pages(dev, io.opcode & 1, meta_iod);
1632                 nvme_free_iod(dev, meta_iod);
1633         }
1634
1635         return status;
1636 }
1637
1638 static int nvme_user_cmd(struct nvme_dev *dev, struct nvme_ns *ns,
1639                         struct nvme_passthru_cmd __user *ucmd)
1640 {
1641         struct nvme_passthru_cmd cmd;
1642         struct nvme_command c;
1643         int status, length;
1644         struct nvme_iod *uninitialized_var(iod);
1645         unsigned timeout;
1646
1647         if (!capable(CAP_SYS_ADMIN))
1648                 return -EACCES;
1649         if (copy_from_user(&cmd, ucmd, sizeof(cmd)))
1650                 return -EFAULT;
1651
1652         memset(&c, 0, sizeof(c));
1653         c.common.opcode = cmd.opcode;
1654         c.common.flags = cmd.flags;
1655         c.common.nsid = cpu_to_le32(cmd.nsid);
1656         c.common.cdw2[0] = cpu_to_le32(cmd.cdw2);
1657         c.common.cdw2[1] = cpu_to_le32(cmd.cdw3);
1658         c.common.cdw10[0] = cpu_to_le32(cmd.cdw10);
1659         c.common.cdw10[1] = cpu_to_le32(cmd.cdw11);
1660         c.common.cdw10[2] = cpu_to_le32(cmd.cdw12);
1661         c.common.cdw10[3] = cpu_to_le32(cmd.cdw13);
1662         c.common.cdw10[4] = cpu_to_le32(cmd.cdw14);
1663         c.common.cdw10[5] = cpu_to_le32(cmd.cdw15);
1664
1665         length = cmd.data_len;
1666         if (cmd.data_len) {
1667                 iod = nvme_map_user_pages(dev, cmd.opcode & 1, cmd.addr,
1668                                                                 length);
1669                 if (IS_ERR(iod))
1670                         return PTR_ERR(iod);
1671                 length = nvme_setup_prps(dev, iod, length, GFP_KERNEL);
1672                 c.common.prp1 = cpu_to_le64(sg_dma_address(iod->sg));
1673                 c.common.prp2 = cpu_to_le64(iod->first_dma);
1674         }
1675
1676         timeout = cmd.timeout_ms ? msecs_to_jiffies(cmd.timeout_ms) :
1677                                                                 ADMIN_TIMEOUT;
1678
1679         if (length != cmd.data_len)
1680                 status = -ENOMEM;
1681         else if (ns) {
1682                 struct request *req;
1683
1684                 req = blk_mq_alloc_request(ns->queue, WRITE,
1685                                                 (GFP_KERNEL|__GFP_WAIT), false);
1686                 if (!req)
1687                         status = -ENOMEM;
1688                 else {
1689                         status = nvme_submit_sync_cmd(req, &c, &cmd.result,
1690                                                                 timeout);
1691                         blk_put_request(req);
1692                 }
1693         } else
1694                 status = __nvme_submit_admin_cmd(dev, &c, &cmd.result, timeout);
1695
1696         if (cmd.data_len) {
1697                 nvme_unmap_user_pages(dev, cmd.opcode & 1, iod);
1698                 nvme_free_iod(dev, iod);
1699         }
1700
1701         if ((status >= 0) && copy_to_user(&ucmd->result, &cmd.result,
1702                                                         sizeof(cmd.result)))
1703                 status = -EFAULT;
1704
1705         return status;
1706 }
1707
1708 static int nvme_ioctl(struct block_device *bdev, fmode_t mode, unsigned int cmd,
1709                                                         unsigned long arg)
1710 {
1711         struct nvme_ns *ns = bdev->bd_disk->private_data;
1712
1713         switch (cmd) {
1714         case NVME_IOCTL_ID:
1715                 force_successful_syscall_return();
1716                 return ns->ns_id;
1717         case NVME_IOCTL_ADMIN_CMD:
1718                 return nvme_user_cmd(ns->dev, NULL, (void __user *)arg);
1719         case NVME_IOCTL_IO_CMD:
1720                 return nvme_user_cmd(ns->dev, ns, (void __user *)arg);
1721         case NVME_IOCTL_SUBMIT_IO:
1722                 return nvme_submit_io(ns, (void __user *)arg);
1723         case SG_GET_VERSION_NUM:
1724                 return nvme_sg_get_version_num((void __user *)arg);
1725         case SG_IO:
1726                 return nvme_sg_io(ns, (void __user *)arg);
1727         default:
1728                 return -ENOTTY;
1729         }
1730 }
1731
1732 #ifdef CONFIG_COMPAT
1733 static int nvme_compat_ioctl(struct block_device *bdev, fmode_t mode,
1734                                         unsigned int cmd, unsigned long arg)
1735 {
1736         switch (cmd) {
1737         case SG_IO:
1738                 return -ENOIOCTLCMD;
1739         }
1740         return nvme_ioctl(bdev, mode, cmd, arg);
1741 }
1742 #else
1743 #define nvme_compat_ioctl       NULL
1744 #endif
1745
1746 static int nvme_open(struct block_device *bdev, fmode_t mode)
1747 {
1748         int ret = 0;
1749         struct nvme_ns *ns;
1750
1751         spin_lock(&dev_list_lock);
1752         ns = bdev->bd_disk->private_data;
1753         if (!ns)
1754                 ret = -ENXIO;
1755         else if (!kref_get_unless_zero(&ns->dev->kref))
1756                 ret = -ENXIO;
1757         spin_unlock(&dev_list_lock);
1758
1759         return ret;
1760 }
1761
1762 static void nvme_free_dev(struct kref *kref);
1763
1764 static void nvme_release(struct gendisk *disk, fmode_t mode)
1765 {
1766         struct nvme_ns *ns = disk->private_data;
1767         struct nvme_dev *dev = ns->dev;
1768
1769         kref_put(&dev->kref, nvme_free_dev);
1770 }
1771
1772 static int nvme_getgeo(struct block_device *bd, struct hd_geometry *geo)
1773 {
1774         /* some standard values */
1775         geo->heads = 1 << 6;
1776         geo->sectors = 1 << 5;
1777         geo->cylinders = get_capacity(bd->bd_disk) >> 11;
1778         return 0;
1779 }
1780
1781 static int nvme_revalidate_disk(struct gendisk *disk)
1782 {
1783         struct nvme_ns *ns = disk->private_data;
1784         struct nvme_dev *dev = ns->dev;
1785         struct nvme_id_ns *id;
1786         dma_addr_t dma_addr;
1787         int lbaf;
1788
1789         id = dma_alloc_coherent(&dev->pci_dev->dev, 4096, &dma_addr,
1790                                                                 GFP_KERNEL);
1791         if (!id) {
1792                 dev_warn(&dev->pci_dev->dev, "%s: Memory alocation failure\n",
1793                                                                 __func__);
1794                 return 0;
1795         }
1796
1797         if (nvme_identify(dev, ns->ns_id, 0, dma_addr))
1798                 goto free;
1799
1800         lbaf = id->flbas & 0xf;
1801         ns->lba_shift = id->lbaf[lbaf].ds;
1802
1803         blk_queue_logical_block_size(ns->queue, 1 << ns->lba_shift);
1804         set_capacity(disk, le64_to_cpup(&id->nsze) << (ns->lba_shift - 9));
1805  free:
1806         dma_free_coherent(&dev->pci_dev->dev, 4096, id, dma_addr);
1807         return 0;
1808 }
1809
1810 static const struct block_device_operations nvme_fops = {
1811         .owner          = THIS_MODULE,
1812         .ioctl          = nvme_ioctl,
1813         .compat_ioctl   = nvme_compat_ioctl,
1814         .open           = nvme_open,
1815         .release        = nvme_release,
1816         .getgeo         = nvme_getgeo,
1817         .revalidate_disk= nvme_revalidate_disk,
1818 };
1819
1820 static int nvme_kthread(void *data)
1821 {
1822         struct nvme_dev *dev, *next;
1823
1824         while (!kthread_should_stop()) {
1825                 set_current_state(TASK_INTERRUPTIBLE);
1826                 spin_lock(&dev_list_lock);
1827                 list_for_each_entry_safe(dev, next, &dev_list, node) {
1828                         int i;
1829                         if (readl(&dev->bar->csts) & NVME_CSTS_CFS &&
1830                                                         dev->initialized) {
1831                                 if (work_busy(&dev->reset_work))
1832                                         continue;
1833                                 list_del_init(&dev->node);
1834                                 dev_warn(&dev->pci_dev->dev,
1835                                         "Failed status: %x, reset controller\n",
1836                                         readl(&dev->bar->csts));
1837                                 dev->reset_workfn = nvme_reset_failed_dev;
1838                                 queue_work(nvme_workq, &dev->reset_work);
1839                                 continue;
1840                         }
1841                         for (i = 0; i < dev->queue_count; i++) {
1842                                 struct nvme_queue *nvmeq = dev->queues[i];
1843                                 if (!nvmeq)
1844                                         continue;
1845                                 spin_lock_irq(&nvmeq->q_lock);
1846                                 nvme_process_cq(nvmeq);
1847
1848                                 while ((i == 0) && (dev->event_limit > 0)) {
1849                                         if (nvme_submit_async_admin_req(dev))
1850                                                 break;
1851                                         dev->event_limit--;
1852                                 }
1853                                 spin_unlock_irq(&nvmeq->q_lock);
1854                         }
1855                 }
1856                 spin_unlock(&dev_list_lock);
1857                 schedule_timeout(round_jiffies_relative(HZ));
1858         }
1859         return 0;
1860 }
1861
1862 static void nvme_config_discard(struct nvme_ns *ns)
1863 {
1864         u32 logical_block_size = queue_logical_block_size(ns->queue);
1865         ns->queue->limits.discard_zeroes_data = 0;
1866         ns->queue->limits.discard_alignment = logical_block_size;
1867         ns->queue->limits.discard_granularity = logical_block_size;
1868         ns->queue->limits.max_discard_sectors = 0xffffffff;
1869         queue_flag_set_unlocked(QUEUE_FLAG_DISCARD, ns->queue);
1870 }
1871
1872 static struct nvme_ns *nvme_alloc_ns(struct nvme_dev *dev, unsigned nsid,
1873                         struct nvme_id_ns *id, struct nvme_lba_range_type *rt)
1874 {
1875         struct nvme_ns *ns;
1876         struct gendisk *disk;
1877         int node = dev_to_node(&dev->pci_dev->dev);
1878         int lbaf;
1879
1880         if (rt->attributes & NVME_LBART_ATTRIB_HIDE)
1881                 return NULL;
1882
1883         ns = kzalloc_node(sizeof(*ns), GFP_KERNEL, node);
1884         if (!ns)
1885                 return NULL;
1886         ns->queue = blk_mq_init_queue(&dev->tagset);
1887         if (IS_ERR(ns->queue))
1888                 goto out_free_ns;
1889         queue_flag_set_unlocked(QUEUE_FLAG_NOMERGES, ns->queue);
1890         queue_flag_set_unlocked(QUEUE_FLAG_NONROT, ns->queue);
1891         queue_flag_set_unlocked(QUEUE_FLAG_SG_GAPS, ns->queue);
1892         queue_flag_clear_unlocked(QUEUE_FLAG_IO_STAT, ns->queue);
1893         ns->dev = dev;
1894         ns->queue->queuedata = ns;
1895
1896         disk = alloc_disk_node(0, node);
1897         if (!disk)
1898                 goto out_free_queue;
1899
1900         ns->ns_id = nsid;
1901         ns->disk = disk;
1902         lbaf = id->flbas & 0xf;
1903         ns->lba_shift = id->lbaf[lbaf].ds;
1904         ns->ms = le16_to_cpu(id->lbaf[lbaf].ms);
1905         blk_queue_logical_block_size(ns->queue, 1 << ns->lba_shift);
1906         if (dev->max_hw_sectors)
1907                 blk_queue_max_hw_sectors(ns->queue, dev->max_hw_sectors);
1908         if (dev->stripe_size)
1909                 blk_queue_chunk_sectors(ns->queue, dev->stripe_size >> 9);
1910         if (dev->vwc & NVME_CTRL_VWC_PRESENT)
1911                 blk_queue_flush(ns->queue, REQ_FLUSH | REQ_FUA);
1912
1913         disk->major = nvme_major;
1914         disk->first_minor = 0;
1915         disk->fops = &nvme_fops;
1916         disk->private_data = ns;
1917         disk->queue = ns->queue;
1918         disk->driverfs_dev = &dev->pci_dev->dev;
1919         disk->flags = GENHD_FL_EXT_DEVT;
1920         sprintf(disk->disk_name, "nvme%dn%d", dev->instance, nsid);
1921         set_capacity(disk, le64_to_cpup(&id->nsze) << (ns->lba_shift - 9));
1922
1923         if (dev->oncs & NVME_CTRL_ONCS_DSM)
1924                 nvme_config_discard(ns);
1925
1926         return ns;
1927
1928  out_free_queue:
1929         blk_cleanup_queue(ns->queue);
1930  out_free_ns:
1931         kfree(ns);
1932         return NULL;
1933 }
1934
1935 static void nvme_create_io_queues(struct nvme_dev *dev)
1936 {
1937         unsigned i;
1938
1939         for (i = dev->queue_count; i <= dev->max_qid; i++)
1940                 if (!nvme_alloc_queue(dev, i, dev->q_depth, i - 1))
1941                         break;
1942
1943         for (i = dev->online_queues; i <= dev->queue_count - 1; i++)
1944                 if (nvme_create_queue(dev->queues[i], i))
1945                         break;
1946 }
1947
1948 static int set_queue_count(struct nvme_dev *dev, int count)
1949 {
1950         int status;
1951         u32 result;
1952         u32 q_count = (count - 1) | ((count - 1) << 16);
1953
1954         status = nvme_set_features(dev, NVME_FEAT_NUM_QUEUES, q_count, 0,
1955                                                                 &result);
1956         if (status < 0)
1957                 return status;
1958         if (status > 0) {
1959                 dev_err(&dev->pci_dev->dev, "Could not set queue count (%d)\n",
1960                                                                         status);
1961                 return 0;
1962         }
1963         return min(result & 0xffff, result >> 16) + 1;
1964 }
1965
1966 static size_t db_bar_size(struct nvme_dev *dev, unsigned nr_io_queues)
1967 {
1968         return 4096 + ((nr_io_queues + 1) * 8 * dev->db_stride);
1969 }
1970
1971 static int nvme_setup_io_queues(struct nvme_dev *dev)
1972 {
1973         struct nvme_queue *adminq = dev->queues[0];
1974         struct pci_dev *pdev = dev->pci_dev;
1975         int result, i, vecs, nr_io_queues, size;
1976
1977         nr_io_queues = num_possible_cpus();
1978         result = set_queue_count(dev, nr_io_queues);
1979         if (result <= 0)
1980                 return result;
1981         if (result < nr_io_queues)
1982                 nr_io_queues = result;
1983
1984         size = db_bar_size(dev, nr_io_queues);
1985         if (size > 8192) {
1986                 iounmap(dev->bar);
1987                 do {
1988                         dev->bar = ioremap(pci_resource_start(pdev, 0), size);
1989                         if (dev->bar)
1990                                 break;
1991                         if (!--nr_io_queues)
1992                                 return -ENOMEM;
1993                         size = db_bar_size(dev, nr_io_queues);
1994                 } while (1);
1995                 dev->dbs = ((void __iomem *)dev->bar) + 4096;
1996                 adminq->q_db = dev->dbs;
1997         }
1998
1999         /* Deregister the admin queue's interrupt */
2000         free_irq(dev->entry[0].vector, adminq);
2001
2002         for (i = 0; i < nr_io_queues; i++)
2003                 dev->entry[i].entry = i;
2004         vecs = pci_enable_msix_range(pdev, dev->entry, 1, nr_io_queues);
2005         if (vecs < 0) {
2006                 vecs = pci_enable_msi_range(pdev, 1, min(nr_io_queues, 32));
2007                 if (vecs < 0) {
2008                         vecs = 1;
2009                 } else {
2010                         for (i = 0; i < vecs; i++)
2011                                 dev->entry[i].vector = i + pdev->irq;
2012                 }
2013         }
2014
2015         /*
2016          * Should investigate if there's a performance win from allocating
2017          * more queues than interrupt vectors; it might allow the submission
2018          * path to scale better, even if the receive path is limited by the
2019          * number of interrupts.
2020          */
2021         nr_io_queues = vecs;
2022         dev->max_qid = nr_io_queues;
2023
2024         result = queue_request_irq(dev, adminq, adminq->irqname);
2025         if (result)
2026                 goto free_queues;
2027
2028         /* Free previously allocated queues that are no longer usable */
2029         nvme_free_queues(dev, nr_io_queues + 1);
2030         nvme_create_io_queues(dev);
2031
2032         return 0;
2033
2034  free_queues:
2035         nvme_free_queues(dev, 1);
2036         return result;
2037 }
2038
2039 /*
2040  * Return: error value if an error occurred setting up the queues or calling
2041  * Identify Device.  0 if these succeeded, even if adding some of the
2042  * namespaces failed.  At the moment, these failures are silent.  TBD which
2043  * failures should be reported.
2044  */
2045 static int nvme_dev_add(struct nvme_dev *dev)
2046 {
2047         struct pci_dev *pdev = dev->pci_dev;
2048         int res;
2049         unsigned nn, i;
2050         struct nvme_ns *ns;
2051         struct nvme_id_ctrl *ctrl;
2052         struct nvme_id_ns *id_ns;
2053         void *mem;
2054         dma_addr_t dma_addr;
2055         int shift = NVME_CAP_MPSMIN(readq(&dev->bar->cap)) + 12;
2056
2057         mem = dma_alloc_coherent(&pdev->dev, 8192, &dma_addr, GFP_KERNEL);
2058         if (!mem)
2059                 return -ENOMEM;
2060
2061         res = nvme_identify(dev, 0, 1, dma_addr);
2062         if (res) {
2063                 dev_err(&pdev->dev, "Identify Controller failed (%d)\n", res);
2064                 res = -EIO;
2065                 goto out;
2066         }
2067
2068         ctrl = mem;
2069         nn = le32_to_cpup(&ctrl->nn);
2070         dev->oncs = le16_to_cpup(&ctrl->oncs);
2071         dev->abort_limit = ctrl->acl + 1;
2072         dev->vwc = ctrl->vwc;
2073         dev->event_limit = min(ctrl->aerl + 1, 8);
2074         memcpy(dev->serial, ctrl->sn, sizeof(ctrl->sn));
2075         memcpy(dev->model, ctrl->mn, sizeof(ctrl->mn));
2076         memcpy(dev->firmware_rev, ctrl->fr, sizeof(ctrl->fr));
2077         if (ctrl->mdts)
2078                 dev->max_hw_sectors = 1 << (ctrl->mdts + shift - 9);
2079         if ((pdev->vendor == PCI_VENDOR_ID_INTEL) &&
2080                         (pdev->device == 0x0953) && ctrl->vs[3]) {
2081                 unsigned int max_hw_sectors;
2082
2083                 dev->stripe_size = 1 << (ctrl->vs[3] + shift);
2084                 max_hw_sectors = dev->stripe_size >> (shift - 9);
2085                 if (dev->max_hw_sectors) {
2086                         dev->max_hw_sectors = min(max_hw_sectors,
2087                                                         dev->max_hw_sectors);
2088                 } else
2089                         dev->max_hw_sectors = max_hw_sectors;
2090         }
2091
2092         dev->tagset.ops = &nvme_mq_ops;
2093         dev->tagset.nr_hw_queues = dev->online_queues - 1;
2094         dev->tagset.timeout = NVME_IO_TIMEOUT;
2095         dev->tagset.numa_node = dev_to_node(&dev->pci_dev->dev);
2096         dev->tagset.queue_depth =
2097                                 min_t(int, dev->q_depth, BLK_MQ_MAX_DEPTH) - 1;
2098         dev->tagset.cmd_size = sizeof(struct nvme_cmd_info);
2099         dev->tagset.flags = BLK_MQ_F_SHOULD_MERGE;
2100         dev->tagset.driver_data = dev;
2101
2102         if (blk_mq_alloc_tag_set(&dev->tagset))
2103                 goto out;
2104
2105         id_ns = mem;
2106         for (i = 1; i <= nn; i++) {
2107                 res = nvme_identify(dev, i, 0, dma_addr);
2108                 if (res)
2109                         continue;
2110
2111                 if (id_ns->ncap == 0)
2112                         continue;
2113
2114                 res = nvme_get_features(dev, NVME_FEAT_LBA_RANGE, i,
2115                                                         dma_addr + 4096, NULL);
2116                 if (res)
2117                         memset(mem + 4096, 0, 4096);
2118
2119                 ns = nvme_alloc_ns(dev, i, mem, mem + 4096);
2120                 if (ns)
2121                         list_add_tail(&ns->list, &dev->namespaces);
2122         }
2123         list_for_each_entry(ns, &dev->namespaces, list)
2124                 add_disk(ns->disk);
2125         res = 0;
2126
2127  out:
2128         dma_free_coherent(&dev->pci_dev->dev, 8192, mem, dma_addr);
2129         return res;
2130 }
2131
2132 static int nvme_dev_map(struct nvme_dev *dev)
2133 {
2134         u64 cap;
2135         int bars, result = -ENOMEM;
2136         struct pci_dev *pdev = dev->pci_dev;
2137
2138         if (pci_enable_device_mem(pdev))
2139                 return result;
2140
2141         dev->entry[0].vector = pdev->irq;
2142         pci_set_master(pdev);
2143         bars = pci_select_bars(pdev, IORESOURCE_MEM);
2144         if (pci_request_selected_regions(pdev, bars, "nvme"))
2145                 goto disable_pci;
2146
2147         if (dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64)) &&
2148             dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)))
2149                 goto disable;
2150
2151         dev->bar = ioremap(pci_resource_start(pdev, 0), 8192);
2152         if (!dev->bar)
2153                 goto disable;
2154         if (readl(&dev->bar->csts) == -1) {
2155                 result = -ENODEV;
2156                 goto unmap;
2157         }
2158         cap = readq(&dev->bar->cap);
2159         dev->q_depth = min_t(int, NVME_CAP_MQES(cap) + 1, NVME_Q_DEPTH);
2160         dev->db_stride = 1 << NVME_CAP_STRIDE(cap);
2161         dev->dbs = ((void __iomem *)dev->bar) + 4096;
2162
2163         return 0;
2164
2165  unmap:
2166         iounmap(dev->bar);
2167         dev->bar = NULL;
2168  disable:
2169         pci_release_regions(pdev);
2170  disable_pci:
2171         pci_disable_device(pdev);
2172         return result;
2173 }
2174
2175 static void nvme_dev_unmap(struct nvme_dev *dev)
2176 {
2177         if (dev->pci_dev->msi_enabled)
2178                 pci_disable_msi(dev->pci_dev);
2179         else if (dev->pci_dev->msix_enabled)
2180                 pci_disable_msix(dev->pci_dev);
2181
2182         if (dev->bar) {
2183                 iounmap(dev->bar);
2184                 dev->bar = NULL;
2185                 pci_release_regions(dev->pci_dev);
2186         }
2187
2188         if (pci_is_enabled(dev->pci_dev))
2189                 pci_disable_device(dev->pci_dev);
2190 }
2191
2192 struct nvme_delq_ctx {
2193         struct task_struct *waiter;
2194         struct kthread_worker *worker;
2195         atomic_t refcount;
2196 };
2197
2198 static void nvme_wait_dq(struct nvme_delq_ctx *dq, struct nvme_dev *dev)
2199 {
2200         dq->waiter = current;
2201         mb();
2202
2203         for (;;) {
2204                 set_current_state(TASK_KILLABLE);
2205                 if (!atomic_read(&dq->refcount))
2206                         break;
2207                 if (!schedule_timeout(ADMIN_TIMEOUT) ||
2208                                         fatal_signal_pending(current)) {
2209                         set_current_state(TASK_RUNNING);
2210
2211                         nvme_disable_ctrl(dev, readq(&dev->bar->cap));
2212                         nvme_disable_queue(dev, 0);
2213
2214                         send_sig(SIGKILL, dq->worker->task, 1);
2215                         flush_kthread_worker(dq->worker);
2216                         return;
2217                 }
2218         }
2219         set_current_state(TASK_RUNNING);
2220 }
2221
2222 static void nvme_put_dq(struct nvme_delq_ctx *dq)
2223 {
2224         atomic_dec(&dq->refcount);
2225         if (dq->waiter)
2226                 wake_up_process(dq->waiter);
2227 }
2228
2229 static struct nvme_delq_ctx *nvme_get_dq(struct nvme_delq_ctx *dq)
2230 {
2231         atomic_inc(&dq->refcount);
2232         return dq;
2233 }
2234
2235 static void nvme_del_queue_end(struct nvme_queue *nvmeq)
2236 {
2237         struct nvme_delq_ctx *dq = nvmeq->cmdinfo.ctx;
2238
2239         nvme_clear_queue(nvmeq);
2240         nvme_put_dq(dq);
2241 }
2242
2243 static int adapter_async_del_queue(struct nvme_queue *nvmeq, u8 opcode,
2244                                                 kthread_work_func_t fn)
2245 {
2246         struct nvme_command c;
2247
2248         memset(&c, 0, sizeof(c));
2249         c.delete_queue.opcode = opcode;
2250         c.delete_queue.qid = cpu_to_le16(nvmeq->qid);
2251
2252         init_kthread_work(&nvmeq->cmdinfo.work, fn);
2253         return nvme_submit_admin_async_cmd(nvmeq->dev, &c, &nvmeq->cmdinfo,
2254                                                                 ADMIN_TIMEOUT);
2255 }
2256
2257 static void nvme_del_cq_work_handler(struct kthread_work *work)
2258 {
2259         struct nvme_queue *nvmeq = container_of(work, struct nvme_queue,
2260                                                         cmdinfo.work);
2261         nvme_del_queue_end(nvmeq);
2262 }
2263
2264 static int nvme_delete_cq(struct nvme_queue *nvmeq)
2265 {
2266         return adapter_async_del_queue(nvmeq, nvme_admin_delete_cq,
2267                                                 nvme_del_cq_work_handler);
2268 }
2269
2270 static void nvme_del_sq_work_handler(struct kthread_work *work)
2271 {
2272         struct nvme_queue *nvmeq = container_of(work, struct nvme_queue,
2273                                                         cmdinfo.work);
2274         int status = nvmeq->cmdinfo.status;
2275
2276         if (!status)
2277                 status = nvme_delete_cq(nvmeq);
2278         if (status)
2279                 nvme_del_queue_end(nvmeq);
2280 }
2281
2282 static int nvme_delete_sq(struct nvme_queue *nvmeq)
2283 {
2284         return adapter_async_del_queue(nvmeq, nvme_admin_delete_sq,
2285                                                 nvme_del_sq_work_handler);
2286 }
2287
2288 static void nvme_del_queue_start(struct kthread_work *work)
2289 {
2290         struct nvme_queue *nvmeq = container_of(work, struct nvme_queue,
2291                                                         cmdinfo.work);
2292         allow_signal(SIGKILL);
2293         if (nvme_delete_sq(nvmeq))
2294                 nvme_del_queue_end(nvmeq);
2295 }
2296
2297 static void nvme_disable_io_queues(struct nvme_dev *dev)
2298 {
2299         int i;
2300         DEFINE_KTHREAD_WORKER_ONSTACK(worker);
2301         struct nvme_delq_ctx dq;
2302         struct task_struct *kworker_task = kthread_run(kthread_worker_fn,
2303                                         &worker, "nvme%d", dev->instance);
2304
2305         if (IS_ERR(kworker_task)) {
2306                 dev_err(&dev->pci_dev->dev,
2307                         "Failed to create queue del task\n");
2308                 for (i = dev->queue_count - 1; i > 0; i--)
2309                         nvme_disable_queue(dev, i);
2310                 return;
2311         }
2312
2313         dq.waiter = NULL;
2314         atomic_set(&dq.refcount, 0);
2315         dq.worker = &worker;
2316         for (i = dev->queue_count - 1; i > 0; i--) {
2317                 struct nvme_queue *nvmeq = dev->queues[i];
2318
2319                 if (nvme_suspend_queue(nvmeq))
2320                         continue;
2321                 nvmeq->cmdinfo.ctx = nvme_get_dq(&dq);
2322                 nvmeq->cmdinfo.worker = dq.worker;
2323                 init_kthread_work(&nvmeq->cmdinfo.work, nvme_del_queue_start);
2324                 queue_kthread_work(dq.worker, &nvmeq->cmdinfo.work);
2325         }
2326         nvme_wait_dq(&dq, dev);
2327         kthread_stop(kworker_task);
2328 }
2329
2330 /*
2331 * Remove the node from the device list and check
2332 * for whether or not we need to stop the nvme_thread.
2333 */
2334 static void nvme_dev_list_remove(struct nvme_dev *dev)
2335 {
2336         struct task_struct *tmp = NULL;
2337
2338         spin_lock(&dev_list_lock);
2339         list_del_init(&dev->node);
2340         if (list_empty(&dev_list) && !IS_ERR_OR_NULL(nvme_thread)) {
2341                 tmp = nvme_thread;
2342                 nvme_thread = NULL;
2343         }
2344         spin_unlock(&dev_list_lock);
2345
2346         if (tmp)
2347                 kthread_stop(tmp);
2348 }
2349
2350 static void nvme_dev_shutdown(struct nvme_dev *dev)
2351 {
2352         int i;
2353         u32 csts = -1;
2354
2355         dev->initialized = 0;
2356         nvme_dev_list_remove(dev);
2357
2358         if (dev->bar)
2359                 csts = readl(&dev->bar->csts);
2360         if (csts & NVME_CSTS_CFS || !(csts & NVME_CSTS_RDY)) {
2361                 for (i = dev->queue_count - 1; i >= 0; i--) {
2362                         struct nvme_queue *nvmeq = dev->queues[i];
2363                         nvme_suspend_queue(nvmeq);
2364                         nvme_clear_queue(nvmeq);
2365                 }
2366         } else {
2367                 nvme_disable_io_queues(dev);
2368                 nvme_shutdown_ctrl(dev);
2369                 nvme_disable_queue(dev, 0);
2370         }
2371         nvme_dev_unmap(dev);
2372 }
2373
2374 static void nvme_dev_remove_admin(struct nvme_dev *dev)
2375 {
2376         if (dev->admin_q && !blk_queue_dying(dev->admin_q))
2377                 blk_cleanup_queue(dev->admin_q);
2378 }
2379
2380 static void nvme_dev_remove(struct nvme_dev *dev)
2381 {
2382         struct nvme_ns *ns;
2383
2384         list_for_each_entry(ns, &dev->namespaces, list) {
2385                 if (ns->disk->flags & GENHD_FL_UP)
2386                         del_gendisk(ns->disk);
2387                 if (!blk_queue_dying(ns->queue))
2388                         blk_cleanup_queue(ns->queue);
2389         }
2390 }
2391
2392 static int nvme_setup_prp_pools(struct nvme_dev *dev)
2393 {
2394         struct device *dmadev = &dev->pci_dev->dev;
2395         dev->prp_page_pool = dma_pool_create("prp list page", dmadev,
2396                                                 PAGE_SIZE, PAGE_SIZE, 0);
2397         if (!dev->prp_page_pool)
2398                 return -ENOMEM;
2399
2400         /* Optimisation for I/Os between 4k and 128k */
2401         dev->prp_small_pool = dma_pool_create("prp list 256", dmadev,
2402                                                 256, 256, 0);
2403         if (!dev->prp_small_pool) {
2404                 dma_pool_destroy(dev->prp_page_pool);
2405                 return -ENOMEM;
2406         }
2407         return 0;
2408 }
2409
2410 static void nvme_release_prp_pools(struct nvme_dev *dev)
2411 {
2412         dma_pool_destroy(dev->prp_page_pool);
2413         dma_pool_destroy(dev->prp_small_pool);
2414 }
2415
2416 static DEFINE_IDA(nvme_instance_ida);
2417
2418 static int nvme_set_instance(struct nvme_dev *dev)
2419 {
2420         int instance, error;
2421
2422         do {
2423                 if (!ida_pre_get(&nvme_instance_ida, GFP_KERNEL))
2424                         return -ENODEV;
2425
2426                 spin_lock(&dev_list_lock);
2427                 error = ida_get_new(&nvme_instance_ida, &instance);
2428                 spin_unlock(&dev_list_lock);
2429         } while (error == -EAGAIN);
2430
2431         if (error)
2432                 return -ENODEV;
2433
2434         dev->instance = instance;
2435         return 0;
2436 }
2437
2438 static void nvme_release_instance(struct nvme_dev *dev)
2439 {
2440         spin_lock(&dev_list_lock);
2441         ida_remove(&nvme_instance_ida, dev->instance);
2442         spin_unlock(&dev_list_lock);
2443 }
2444
2445 static void nvme_free_namespaces(struct nvme_dev *dev)
2446 {
2447         struct nvme_ns *ns, *next;
2448
2449         list_for_each_entry_safe(ns, next, &dev->namespaces, list) {
2450                 list_del(&ns->list);
2451
2452                 spin_lock(&dev_list_lock);
2453                 ns->disk->private_data = NULL;
2454                 spin_unlock(&dev_list_lock);
2455
2456                 put_disk(ns->disk);
2457                 kfree(ns);
2458         }
2459 }
2460
2461 static void nvme_free_dev(struct kref *kref)
2462 {
2463         struct nvme_dev *dev = container_of(kref, struct nvme_dev, kref);
2464
2465         pci_dev_put(dev->pci_dev);
2466         nvme_free_namespaces(dev);
2467         blk_mq_free_tag_set(&dev->tagset);
2468         kfree(dev->queues);
2469         kfree(dev->entry);
2470         kfree(dev);
2471 }
2472
2473 static int nvme_dev_open(struct inode *inode, struct file *f)
2474 {
2475         struct nvme_dev *dev = container_of(f->private_data, struct nvme_dev,
2476                                                                 miscdev);
2477         kref_get(&dev->kref);
2478         f->private_data = dev;
2479         return 0;
2480 }
2481
2482 static int nvme_dev_release(struct inode *inode, struct file *f)
2483 {
2484         struct nvme_dev *dev = f->private_data;
2485         kref_put(&dev->kref, nvme_free_dev);
2486         return 0;
2487 }
2488
2489 static long nvme_dev_ioctl(struct file *f, unsigned int cmd, unsigned long arg)
2490 {
2491         struct nvme_dev *dev = f->private_data;
2492         struct nvme_ns *ns;
2493
2494         switch (cmd) {
2495         case NVME_IOCTL_ADMIN_CMD:
2496                 return nvme_user_cmd(dev, NULL, (void __user *)arg);
2497         case NVME_IOCTL_IO_CMD:
2498                 if (list_empty(&dev->namespaces))
2499                         return -ENOTTY;
2500                 ns = list_first_entry(&dev->namespaces, struct nvme_ns, list);
2501                 return nvme_user_cmd(dev, ns, (void __user *)arg);
2502         default:
2503                 return -ENOTTY;
2504         }
2505 }
2506
2507 static const struct file_operations nvme_dev_fops = {
2508         .owner          = THIS_MODULE,
2509         .open           = nvme_dev_open,
2510         .release        = nvme_dev_release,
2511         .unlocked_ioctl = nvme_dev_ioctl,
2512         .compat_ioctl   = nvme_dev_ioctl,
2513 };
2514
2515 static void nvme_set_irq_hints(struct nvme_dev *dev)
2516 {
2517         struct nvme_queue *nvmeq;
2518         int i;
2519
2520         for (i = 0; i < dev->online_queues; i++) {
2521                 nvmeq = dev->queues[i];
2522
2523                 if (!nvmeq->hctx)
2524                         continue;
2525
2526                 irq_set_affinity_hint(dev->entry[nvmeq->cq_vector].vector,
2527                                                         nvmeq->hctx->cpumask);
2528         }
2529 }
2530
2531 static int nvme_dev_start(struct nvme_dev *dev)
2532 {
2533         int result;
2534         bool start_thread = false;
2535
2536         result = nvme_dev_map(dev);
2537         if (result)
2538                 return result;
2539
2540         result = nvme_configure_admin_queue(dev);
2541         if (result)
2542                 goto unmap;
2543
2544         spin_lock(&dev_list_lock);
2545         if (list_empty(&dev_list) && IS_ERR_OR_NULL(nvme_thread)) {
2546                 start_thread = true;
2547                 nvme_thread = NULL;
2548         }
2549         list_add(&dev->node, &dev_list);
2550         spin_unlock(&dev_list_lock);
2551
2552         if (start_thread) {
2553                 nvme_thread = kthread_run(nvme_kthread, NULL, "nvme");
2554                 wake_up_all(&nvme_kthread_wait);
2555         } else
2556                 wait_event_killable(nvme_kthread_wait, nvme_thread);
2557
2558         if (IS_ERR_OR_NULL(nvme_thread)) {
2559                 result = nvme_thread ? PTR_ERR(nvme_thread) : -EINTR;
2560                 goto disable;
2561         }
2562
2563         nvme_init_queue(dev->queues[0], 0);
2564
2565         result = nvme_setup_io_queues(dev);
2566         if (result)
2567                 goto disable;
2568
2569         nvme_set_irq_hints(dev);
2570
2571         return result;
2572
2573  disable:
2574         nvme_disable_queue(dev, 0);
2575         nvme_dev_list_remove(dev);
2576  unmap:
2577         nvme_dev_unmap(dev);
2578         return result;
2579 }
2580
2581 static int nvme_remove_dead_ctrl(void *arg)
2582 {
2583         struct nvme_dev *dev = (struct nvme_dev *)arg;
2584         struct pci_dev *pdev = dev->pci_dev;
2585
2586         if (pci_get_drvdata(pdev))
2587                 pci_stop_and_remove_bus_device_locked(pdev);
2588         kref_put(&dev->kref, nvme_free_dev);
2589         return 0;
2590 }
2591
2592 static void nvme_remove_disks(struct work_struct *ws)
2593 {
2594         struct nvme_dev *dev = container_of(ws, struct nvme_dev, reset_work);
2595
2596         nvme_free_queues(dev, 1);
2597         nvme_dev_remove(dev);
2598 }
2599
2600 static int nvme_dev_resume(struct nvme_dev *dev)
2601 {
2602         int ret;
2603
2604         ret = nvme_dev_start(dev);
2605         if (ret)
2606                 return ret;
2607         if (dev->online_queues < 2) {
2608                 spin_lock(&dev_list_lock);
2609                 dev->reset_workfn = nvme_remove_disks;
2610                 queue_work(nvme_workq, &dev->reset_work);
2611                 spin_unlock(&dev_list_lock);
2612         }
2613         dev->initialized = 1;
2614         return 0;
2615 }
2616
2617 static void nvme_dev_reset(struct nvme_dev *dev)
2618 {
2619         nvme_dev_shutdown(dev);
2620         if (nvme_dev_resume(dev)) {
2621                 dev_warn(&dev->pci_dev->dev, "Device failed to resume\n");
2622                 kref_get(&dev->kref);
2623                 if (IS_ERR(kthread_run(nvme_remove_dead_ctrl, dev, "nvme%d",
2624                                                         dev->instance))) {
2625                         dev_err(&dev->pci_dev->dev,
2626                                 "Failed to start controller remove task\n");
2627                         kref_put(&dev->kref, nvme_free_dev);
2628                 }
2629         }
2630 }
2631
2632 static void nvme_reset_failed_dev(struct work_struct *ws)
2633 {
2634         struct nvme_dev *dev = container_of(ws, struct nvme_dev, reset_work);
2635         nvme_dev_reset(dev);
2636 }
2637
2638 static void nvme_reset_workfn(struct work_struct *work)
2639 {
2640         struct nvme_dev *dev = container_of(work, struct nvme_dev, reset_work);
2641         dev->reset_workfn(work);
2642 }
2643
2644 static int nvme_probe(struct pci_dev *pdev, const struct pci_device_id *id)
2645 {
2646         int node, result = -ENOMEM;
2647         struct nvme_dev *dev;
2648
2649         node = dev_to_node(&pdev->dev);
2650         if (node == NUMA_NO_NODE)
2651                 set_dev_node(&pdev->dev, 0);
2652
2653         dev = kzalloc_node(sizeof(*dev), GFP_KERNEL, node);
2654         if (!dev)
2655                 return -ENOMEM;
2656         dev->entry = kzalloc_node(num_possible_cpus() * sizeof(*dev->entry),
2657                                                         GFP_KERNEL, node);
2658         if (!dev->entry)
2659                 goto free;
2660         dev->queues = kzalloc_node((num_possible_cpus() + 1) * sizeof(void *),
2661                                                         GFP_KERNEL, node);
2662         if (!dev->queues)
2663                 goto free;
2664
2665         INIT_LIST_HEAD(&dev->namespaces);
2666         dev->reset_workfn = nvme_reset_failed_dev;
2667         INIT_WORK(&dev->reset_work, nvme_reset_workfn);
2668         dev->pci_dev = pci_dev_get(pdev);
2669         pci_set_drvdata(pdev, dev);
2670         result = nvme_set_instance(dev);
2671         if (result)
2672                 goto put_pci;
2673
2674         result = nvme_setup_prp_pools(dev);
2675         if (result)
2676                 goto release;
2677
2678         kref_init(&dev->kref);
2679         result = nvme_dev_start(dev);
2680         if (result)
2681                 goto release_pools;
2682
2683         if (dev->online_queues > 1)
2684                 result = nvme_dev_add(dev);
2685         if (result)
2686                 goto shutdown;
2687
2688         scnprintf(dev->name, sizeof(dev->name), "nvme%d", dev->instance);
2689         dev->miscdev.minor = MISC_DYNAMIC_MINOR;
2690         dev->miscdev.parent = &pdev->dev;
2691         dev->miscdev.name = dev->name;
2692         dev->miscdev.fops = &nvme_dev_fops;
2693         result = misc_register(&dev->miscdev);
2694         if (result)
2695                 goto remove;
2696
2697         nvme_set_irq_hints(dev);
2698
2699         dev->initialized = 1;
2700         return 0;
2701
2702  remove:
2703         nvme_dev_remove(dev);
2704         nvme_dev_remove_admin(dev);
2705         nvme_free_namespaces(dev);
2706  shutdown:
2707         nvme_dev_shutdown(dev);
2708  release_pools:
2709         nvme_free_queues(dev, 0);
2710         nvme_release_prp_pools(dev);
2711  release:
2712         nvme_release_instance(dev);
2713  put_pci:
2714         pci_dev_put(dev->pci_dev);
2715  free:
2716         kfree(dev->queues);
2717         kfree(dev->entry);
2718         kfree(dev);
2719         return result;
2720 }
2721
2722 static void nvme_reset_notify(struct pci_dev *pdev, bool prepare)
2723 {
2724         struct nvme_dev *dev = pci_get_drvdata(pdev);
2725
2726         if (prepare)
2727                 nvme_dev_shutdown(dev);
2728         else
2729                 nvme_dev_resume(dev);
2730 }
2731
2732 static void nvme_shutdown(struct pci_dev *pdev)
2733 {
2734         struct nvme_dev *dev = pci_get_drvdata(pdev);
2735         nvme_dev_shutdown(dev);
2736 }
2737
2738 static void nvme_remove(struct pci_dev *pdev)
2739 {
2740         struct nvme_dev *dev = pci_get_drvdata(pdev);
2741
2742         spin_lock(&dev_list_lock);
2743         list_del_init(&dev->node);
2744         spin_unlock(&dev_list_lock);
2745
2746         pci_set_drvdata(pdev, NULL);
2747         flush_work(&dev->reset_work);
2748         misc_deregister(&dev->miscdev);
2749         nvme_dev_remove(dev);
2750         nvme_dev_shutdown(dev);
2751         nvme_dev_remove_admin(dev);
2752         nvme_free_queues(dev, 0);
2753         nvme_free_admin_tags(dev);
2754         nvme_release_instance(dev);
2755         nvme_release_prp_pools(dev);
2756         kref_put(&dev->kref, nvme_free_dev);
2757 }
2758
2759 /* These functions are yet to be implemented */
2760 #define nvme_error_detected NULL
2761 #define nvme_dump_registers NULL
2762 #define nvme_link_reset NULL
2763 #define nvme_slot_reset NULL
2764 #define nvme_error_resume NULL
2765
2766 #ifdef CONFIG_PM_SLEEP
2767 static int nvme_suspend(struct device *dev)
2768 {
2769         struct pci_dev *pdev = to_pci_dev(dev);
2770         struct nvme_dev *ndev = pci_get_drvdata(pdev);
2771
2772         nvme_dev_shutdown(ndev);
2773         return 0;
2774 }
2775
2776 static int nvme_resume(struct device *dev)
2777 {
2778         struct pci_dev *pdev = to_pci_dev(dev);
2779         struct nvme_dev *ndev = pci_get_drvdata(pdev);
2780
2781         if (nvme_dev_resume(ndev) && !work_busy(&ndev->reset_work)) {
2782                 ndev->reset_workfn = nvme_reset_failed_dev;
2783                 queue_work(nvme_workq, &ndev->reset_work);
2784         }
2785         return 0;
2786 }
2787 #endif
2788
2789 static SIMPLE_DEV_PM_OPS(nvme_dev_pm_ops, nvme_suspend, nvme_resume);
2790
2791 static const struct pci_error_handlers nvme_err_handler = {
2792         .error_detected = nvme_error_detected,
2793         .mmio_enabled   = nvme_dump_registers,
2794         .link_reset     = nvme_link_reset,
2795         .slot_reset     = nvme_slot_reset,
2796         .resume         = nvme_error_resume,
2797         .reset_notify   = nvme_reset_notify,
2798 };
2799
2800 /* Move to pci_ids.h later */
2801 #define PCI_CLASS_STORAGE_EXPRESS       0x010802
2802
2803 static const struct pci_device_id nvme_id_table[] = {
2804         { PCI_DEVICE_CLASS(PCI_CLASS_STORAGE_EXPRESS, 0xffffff) },
2805         { 0, }
2806 };
2807 MODULE_DEVICE_TABLE(pci, nvme_id_table);
2808
2809 static struct pci_driver nvme_driver = {
2810         .name           = "nvme",
2811         .id_table       = nvme_id_table,
2812         .probe          = nvme_probe,
2813         .remove         = nvme_remove,
2814         .shutdown       = nvme_shutdown,
2815         .driver         = {
2816                 .pm     = &nvme_dev_pm_ops,
2817         },
2818         .err_handler    = &nvme_err_handler,
2819 };
2820
2821 static int __init nvme_init(void)
2822 {
2823         int result;
2824
2825         init_waitqueue_head(&nvme_kthread_wait);
2826
2827         nvme_workq = create_singlethread_workqueue("nvme");
2828         if (!nvme_workq)
2829                 return -ENOMEM;
2830
2831         result = register_blkdev(nvme_major, "nvme");
2832         if (result < 0)
2833                 goto kill_workq;
2834         else if (result > 0)
2835                 nvme_major = result;
2836
2837         result = pci_register_driver(&nvme_driver);
2838         if (result)
2839                 goto unregister_blkdev;
2840         return 0;
2841
2842  unregister_blkdev:
2843         unregister_blkdev(nvme_major, "nvme");
2844  kill_workq:
2845         destroy_workqueue(nvme_workq);
2846         return result;
2847 }
2848
2849 static void __exit nvme_exit(void)
2850 {
2851         pci_unregister_driver(&nvme_driver);
2852         unregister_hotcpu_notifier(&nvme_nb);
2853         unregister_blkdev(nvme_major, "nvme");
2854         destroy_workqueue(nvme_workq);
2855         BUG_ON(nvme_thread && !IS_ERR(nvme_thread));
2856         _nvme_check_size();
2857 }
2858
2859 MODULE_AUTHOR("Matthew Wilcox <willy@linux.intel.com>");
2860 MODULE_LICENSE("GPL");
2861 MODULE_VERSION("0.9");
2862 module_init(nvme_init);
2863 module_exit(nvme_exit);