1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2005, 2006 IBM Corporation
4 * Copyright (C) 2014, 2015 Intel Corporation
7 * Leendert van Doorn <leendert@watson.ibm.com>
8 * Kylene Hall <kjhall@us.ibm.com>
10 * Maintained by: <tpmdd-devel@lists.sourceforge.net>
12 * Device driver for TCG/TCPA TPM (trusted platform module).
13 * Specifications at www.trustedcomputinggroup.org
15 * This device driver implements the TPM interface as defined in
16 * the TCG TPM Interface Spec version 1.2, revision 1.0.
18 #include <linux/init.h>
19 #include <linux/module.h>
20 #include <linux/moduleparam.h>
21 #include <linux/pnp.h>
22 #include <linux/slab.h>
23 #include <linux/interrupt.h>
24 #include <linux/wait.h>
25 #include <linux/acpi.h>
26 #include <linux/freezer.h>
28 #include "tpm_tis_core.h"
30 static void tpm_tis_clkrun_enable(struct tpm_chip *chip, bool value);
32 static bool wait_for_tpm_stat_cond(struct tpm_chip *chip, u8 mask,
33 bool check_cancel, bool *canceled)
35 u8 status = chip->ops->status(chip);
38 if ((status & mask) == mask)
40 if (check_cancel && chip->ops->req_canceled(chip, status)) {
47 static int wait_for_tpm_stat(struct tpm_chip *chip, u8 mask,
48 unsigned long timeout, wait_queue_head_t *queue,
54 bool canceled = false;
56 /* check current status */
57 status = chip->ops->status(chip);
58 if ((status & mask) == mask)
61 stop = jiffies + timeout;
63 if (chip->flags & TPM_CHIP_FLAG_IRQ) {
65 timeout = stop - jiffies;
66 if ((long)timeout <= 0)
68 rc = wait_event_interruptible_timeout(*queue,
69 wait_for_tpm_stat_cond(chip, mask, check_cancel,
77 if (rc == -ERESTARTSYS && freezing(current)) {
78 clear_thread_flag(TIF_SIGPENDING);
83 usleep_range(TPM_TIMEOUT_USECS_MIN,
84 TPM_TIMEOUT_USECS_MAX);
85 status = chip->ops->status(chip);
86 if ((status & mask) == mask)
88 } while (time_before(jiffies, stop));
93 /* Before we attempt to access the TPM we must see that the valid bit is set.
94 * The specification says that this bit is 0 at reset and remains 0 until the
95 * 'TPM has gone through its self test and initialization and has established
96 * correct values in the other bits.'
98 static int wait_startup(struct tpm_chip *chip, int l)
100 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
101 unsigned long stop = jiffies + chip->timeout_a;
107 rc = tpm_tis_read8(priv, TPM_ACCESS(l), &access);
111 if (access & TPM_ACCESS_VALID)
113 tpm_msleep(TPM_TIMEOUT);
114 } while (time_before(jiffies, stop));
118 static bool check_locality(struct tpm_chip *chip, int l)
120 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
124 rc = tpm_tis_read8(priv, TPM_ACCESS(l), &access);
128 if ((access & (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID)) ==
129 (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID)) {
137 static bool locality_inactive(struct tpm_chip *chip, int l)
139 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
143 rc = tpm_tis_read8(priv, TPM_ACCESS(l), &access);
147 if ((access & (TPM_ACCESS_VALID | TPM_ACCESS_ACTIVE_LOCALITY))
154 static int release_locality(struct tpm_chip *chip, int l)
156 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
157 unsigned long stop, timeout;
160 tpm_tis_write8(priv, TPM_ACCESS(l), TPM_ACCESS_ACTIVE_LOCALITY);
162 stop = jiffies + chip->timeout_a;
164 if (chip->flags & TPM_CHIP_FLAG_IRQ) {
166 timeout = stop - jiffies;
167 if ((long)timeout <= 0)
170 rc = wait_event_interruptible_timeout(priv->int_queue,
171 (locality_inactive(chip, l)),
177 if (rc == -ERESTARTSYS && freezing(current)) {
178 clear_thread_flag(TIF_SIGPENDING);
183 if (locality_inactive(chip, l))
185 tpm_msleep(TPM_TIMEOUT);
186 } while (time_before(jiffies, stop));
191 static int request_locality(struct tpm_chip *chip, int l)
193 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
194 unsigned long stop, timeout;
197 if (check_locality(chip, l))
200 rc = tpm_tis_write8(priv, TPM_ACCESS(l), TPM_ACCESS_REQUEST_USE);
204 stop = jiffies + chip->timeout_a;
206 if (chip->flags & TPM_CHIP_FLAG_IRQ) {
208 timeout = stop - jiffies;
209 if ((long)timeout <= 0)
211 rc = wait_event_interruptible_timeout(priv->int_queue,
217 if (rc == -ERESTARTSYS && freezing(current)) {
218 clear_thread_flag(TIF_SIGPENDING);
222 /* wait for burstcount */
224 if (check_locality(chip, l))
226 tpm_msleep(TPM_TIMEOUT);
227 } while (time_before(jiffies, stop));
232 static u8 tpm_tis_status(struct tpm_chip *chip)
234 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
238 rc = tpm_tis_read8(priv, TPM_STS(priv->locality), &status);
245 static void tpm_tis_ready(struct tpm_chip *chip)
247 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
249 /* this causes the current command to be aborted */
250 tpm_tis_write8(priv, TPM_STS(priv->locality), TPM_STS_COMMAND_READY);
253 static int get_burstcount(struct tpm_chip *chip)
255 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
260 /* wait for burstcount */
261 if (chip->flags & TPM_CHIP_FLAG_TPM2)
262 stop = jiffies + chip->timeout_a;
264 stop = jiffies + chip->timeout_d;
266 rc = tpm_tis_read32(priv, TPM_STS(priv->locality), &value);
270 burstcnt = (value >> 8) & 0xFFFF;
273 usleep_range(TPM_TIMEOUT_USECS_MIN, TPM_TIMEOUT_USECS_MAX);
274 } while (time_before(jiffies, stop));
278 static int recv_data(struct tpm_chip *chip, u8 *buf, size_t count)
280 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
281 int size = 0, burstcnt, rc;
283 while (size < count) {
284 rc = wait_for_tpm_stat(chip,
285 TPM_STS_DATA_AVAIL | TPM_STS_VALID,
287 &priv->read_queue, true);
290 burstcnt = get_burstcount(chip);
292 dev_err(&chip->dev, "Unable to read burstcount\n");
295 burstcnt = min_t(int, burstcnt, count - size);
297 rc = tpm_tis_read_bytes(priv, TPM_DATA_FIFO(priv->locality),
298 burstcnt, buf + size);
307 static int tpm_tis_recv(struct tpm_chip *chip, u8 *buf, size_t count)
309 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
314 if (count < TPM_HEADER_SIZE) {
319 size = recv_data(chip, buf, TPM_HEADER_SIZE);
320 /* read first 10 bytes, including tag, paramsize, and result */
321 if (size < TPM_HEADER_SIZE) {
322 dev_err(&chip->dev, "Unable to read header\n");
326 expected = be32_to_cpu(*(__be32 *) (buf + 2));
327 if (expected > count || expected < TPM_HEADER_SIZE) {
332 size += recv_data(chip, &buf[TPM_HEADER_SIZE],
333 expected - TPM_HEADER_SIZE);
334 if (size < expected) {
335 dev_err(&chip->dev, "Unable to read remainder of result\n");
340 if (wait_for_tpm_stat(chip, TPM_STS_VALID, chip->timeout_c,
341 &priv->int_queue, false) < 0) {
345 status = tpm_tis_status(chip);
346 if (status & TPM_STS_DATA_AVAIL) { /* retry? */
347 dev_err(&chip->dev, "Error left over data\n");
358 * If interrupts are used (signaled by an irq set in the vendor structure)
359 * tpm.c can skip polling for the data to be available as the interrupt is
362 static int tpm_tis_send_data(struct tpm_chip *chip, const u8 *buf, size_t len)
364 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
365 int rc, status, burstcnt;
367 bool itpm = priv->flags & TPM_TIS_ITPM_WORKAROUND;
369 status = tpm_tis_status(chip);
370 if ((status & TPM_STS_COMMAND_READY) == 0) {
372 if (wait_for_tpm_stat
373 (chip, TPM_STS_COMMAND_READY, chip->timeout_b,
374 &priv->int_queue, false) < 0) {
380 while (count < len - 1) {
381 burstcnt = get_burstcount(chip);
383 dev_err(&chip->dev, "Unable to read burstcount\n");
387 burstcnt = min_t(int, burstcnt, len - count - 1);
388 rc = tpm_tis_write_bytes(priv, TPM_DATA_FIFO(priv->locality),
389 burstcnt, buf + count);
395 if (wait_for_tpm_stat(chip, TPM_STS_VALID, chip->timeout_c,
396 &priv->int_queue, false) < 0) {
400 status = tpm_tis_status(chip);
401 if (!itpm && (status & TPM_STS_DATA_EXPECT) == 0) {
407 /* write last byte */
408 rc = tpm_tis_write8(priv, TPM_DATA_FIFO(priv->locality), buf[count]);
412 if (wait_for_tpm_stat(chip, TPM_STS_VALID, chip->timeout_c,
413 &priv->int_queue, false) < 0) {
417 status = tpm_tis_status(chip);
418 if (!itpm && (status & TPM_STS_DATA_EXPECT) != 0) {
430 static void disable_interrupts(struct tpm_chip *chip)
432 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
439 rc = tpm_tis_read32(priv, TPM_INT_ENABLE(priv->locality), &intmask);
443 intmask &= ~TPM_GLOBAL_INT_ENABLE;
444 rc = tpm_tis_write32(priv, TPM_INT_ENABLE(priv->locality), intmask);
446 devm_free_irq(chip->dev.parent, priv->irq, chip);
448 chip->flags &= ~TPM_CHIP_FLAG_IRQ;
452 * If interrupts are used (signaled by an irq set in the vendor structure)
453 * tpm.c can skip polling for the data to be available as the interrupt is
456 static int tpm_tis_send_main(struct tpm_chip *chip, const u8 *buf, size_t len)
458 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
463 rc = tpm_tis_send_data(chip, buf, len);
468 rc = tpm_tis_write8(priv, TPM_STS(priv->locality), TPM_STS_GO);
472 if (chip->flags & TPM_CHIP_FLAG_IRQ) {
473 ordinal = be32_to_cpu(*((__be32 *) (buf + 6)));
475 dur = tpm_calc_ordinal_duration(chip, ordinal);
476 if (wait_for_tpm_stat
477 (chip, TPM_STS_DATA_AVAIL | TPM_STS_VALID, dur,
478 &priv->read_queue, false) < 0) {
489 static int tpm_tis_send(struct tpm_chip *chip, u8 *buf, size_t len)
492 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
494 if (!(chip->flags & TPM_CHIP_FLAG_IRQ) || priv->irq_tested)
495 return tpm_tis_send_main(chip, buf, len);
497 /* Verify receipt of the expected IRQ */
500 chip->flags &= ~TPM_CHIP_FLAG_IRQ;
501 rc = tpm_tis_send_main(chip, buf, len);
503 chip->flags |= TPM_CHIP_FLAG_IRQ;
504 if (!priv->irq_tested)
506 if (!priv->irq_tested)
507 disable_interrupts(chip);
508 priv->irq_tested = true;
512 struct tis_vendor_durations_override {
514 struct tpm1_version version;
515 unsigned long durations[3];
518 static const struct tis_vendor_durations_override vendor_dur_overrides[] = {
519 /* STMicroelectronics 0x104a */
522 { (2 * 60 * HZ), (2 * 60 * HZ), (2 * 60 * HZ) } },
525 static void tpm_tis_update_durations(struct tpm_chip *chip,
526 unsigned long *duration_cap)
528 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
529 struct tpm1_version *version;
534 chip->duration_adjusted = false;
536 if (chip->ops->clk_enable != NULL)
537 chip->ops->clk_enable(chip, true);
539 rc = tpm_tis_read32(priv, TPM_DID_VID(0), &did_vid);
541 dev_warn(&chip->dev, "%s: failed to read did_vid. %d\n",
546 /* Try to get a TPM version 1.2 or 1.1 TPM_CAP_VERSION_INFO */
547 rc = tpm1_getcap(chip, TPM_CAP_VERSION_1_2, &cap,
548 "attempting to determine the 1.2 version",
549 sizeof(cap.version2));
551 version = &cap.version2.version;
553 rc = tpm1_getcap(chip, TPM_CAP_VERSION_1_1, &cap,
554 "attempting to determine the 1.1 version",
555 sizeof(cap.version1));
560 version = &cap.version1;
563 for (i = 0; i != ARRAY_SIZE(vendor_dur_overrides); i++) {
564 if (vendor_dur_overrides[i].did_vid != did_vid)
567 if ((version->major ==
568 vendor_dur_overrides[i].version.major) &&
570 vendor_dur_overrides[i].version.minor) &&
571 (version->rev_major ==
572 vendor_dur_overrides[i].version.rev_major) &&
573 (version->rev_minor ==
574 vendor_dur_overrides[i].version.rev_minor)) {
577 vendor_dur_overrides[i].durations,
578 sizeof(vendor_dur_overrides[i].durations));
580 chip->duration_adjusted = true;
586 if (chip->ops->clk_enable != NULL)
587 chip->ops->clk_enable(chip, false);
590 struct tis_vendor_timeout_override {
592 unsigned long timeout_us[4];
595 static const struct tis_vendor_timeout_override vendor_timeout_overrides[] = {
597 { 0x32041114, { (TIS_SHORT_TIMEOUT*1000), (TIS_LONG_TIMEOUT*1000),
598 (TIS_SHORT_TIMEOUT*1000), (TIS_SHORT_TIMEOUT*1000) } },
601 static void tpm_tis_update_timeouts(struct tpm_chip *chip,
602 unsigned long *timeout_cap)
604 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
608 chip->timeout_adjusted = false;
610 if (chip->ops->clk_enable != NULL)
611 chip->ops->clk_enable(chip, true);
613 rc = tpm_tis_read32(priv, TPM_DID_VID(0), &did_vid);
615 dev_warn(&chip->dev, "%s: failed to read did_vid: %d\n",
620 for (i = 0; i != ARRAY_SIZE(vendor_timeout_overrides); i++) {
621 if (vendor_timeout_overrides[i].did_vid != did_vid)
623 memcpy(timeout_cap, vendor_timeout_overrides[i].timeout_us,
624 sizeof(vendor_timeout_overrides[i].timeout_us));
625 chip->timeout_adjusted = true;
629 if (chip->ops->clk_enable != NULL)
630 chip->ops->clk_enable(chip, false);
636 * Early probing for iTPM with STS_DATA_EXPECT flaw.
637 * Try sending command without itpm flag set and if that
638 * fails, repeat with itpm flag set.
640 static int probe_itpm(struct tpm_chip *chip)
642 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
644 static const u8 cmd_getticks[] = {
645 0x00, 0xc1, 0x00, 0x00, 0x00, 0x0a,
646 0x00, 0x00, 0x00, 0xf1
648 size_t len = sizeof(cmd_getticks);
651 if (priv->flags & TPM_TIS_ITPM_WORKAROUND)
654 rc = tpm_tis_read16(priv, TPM_DID_VID(0), &vendor);
658 /* probe only iTPMS */
659 if (vendor != TPM_VID_INTEL)
662 if (request_locality(chip, 0) != 0)
665 rc = tpm_tis_send_data(chip, cmd_getticks, len);
671 priv->flags |= TPM_TIS_ITPM_WORKAROUND;
673 rc = tpm_tis_send_data(chip, cmd_getticks, len);
675 dev_info(&chip->dev, "Detected an iTPM.\n");
677 priv->flags &= ~TPM_TIS_ITPM_WORKAROUND;
683 release_locality(chip, priv->locality);
688 static bool tpm_tis_req_canceled(struct tpm_chip *chip, u8 status)
690 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
692 switch (priv->manufacturer_id) {
693 case TPM_VID_WINBOND:
694 return ((status == TPM_STS_VALID) ||
695 (status == (TPM_STS_VALID | TPM_STS_COMMAND_READY)));
697 return (status == (TPM_STS_VALID | TPM_STS_COMMAND_READY));
699 return (status == TPM_STS_COMMAND_READY);
703 static irqreturn_t tis_int_handler(int dummy, void *dev_id)
705 struct tpm_chip *chip = dev_id;
706 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
710 rc = tpm_tis_read32(priv, TPM_INT_STATUS(priv->locality), &interrupt);
717 priv->irq_tested = true;
718 if (interrupt & TPM_INTF_DATA_AVAIL_INT)
719 wake_up_interruptible(&priv->read_queue);
720 if (interrupt & TPM_INTF_LOCALITY_CHANGE_INT)
721 for (i = 0; i < 5; i++)
722 if (check_locality(chip, i))
725 (TPM_INTF_LOCALITY_CHANGE_INT | TPM_INTF_STS_VALID_INT |
726 TPM_INTF_CMD_READY_INT))
727 wake_up_interruptible(&priv->int_queue);
729 /* Clear interrupts handled with TPM_EOI */
730 rc = tpm_tis_write32(priv, TPM_INT_STATUS(priv->locality), interrupt);
734 tpm_tis_read32(priv, TPM_INT_STATUS(priv->locality), &interrupt);
738 static int tpm_tis_gen_interrupt(struct tpm_chip *chip)
740 const char *desc = "attempting to generate an interrupt";
744 if (chip->flags & TPM_CHIP_FLAG_TPM2)
745 return tpm2_get_tpm_pt(chip, 0x100, &cap2, desc);
747 return tpm1_getcap(chip, TPM_CAP_PROP_TIS_TIMEOUT, &cap, desc,
751 /* Register the IRQ and issue a command that will cause an interrupt. If an
752 * irq is seen then leave the chip setup for IRQ operation, otherwise reverse
753 * everything and leave in polling mode. Returns 0 on success.
755 static int tpm_tis_probe_irq_single(struct tpm_chip *chip, u32 intmask,
758 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
763 if (devm_request_irq(chip->dev.parent, irq, tis_int_handler, flags,
764 dev_name(&chip->dev), chip) != 0) {
765 dev_info(&chip->dev, "Unable to request irq: %d for probe\n",
771 rc = tpm_tis_read8(priv, TPM_INT_VECTOR(priv->locality),
776 rc = tpm_tis_write8(priv, TPM_INT_VECTOR(priv->locality), irq);
780 rc = tpm_tis_read32(priv, TPM_INT_STATUS(priv->locality), &int_status);
784 /* Clear all existing */
785 rc = tpm_tis_write32(priv, TPM_INT_STATUS(priv->locality), int_status);
790 rc = tpm_tis_write32(priv, TPM_INT_ENABLE(priv->locality),
791 intmask | TPM_GLOBAL_INT_ENABLE);
795 priv->irq_tested = false;
797 /* Generate an interrupt by having the core call through to
800 rc = tpm_tis_gen_interrupt(chip);
804 /* tpm_tis_send will either confirm the interrupt is working or it
805 * will call disable_irq which undoes all of the above.
807 if (!(chip->flags & TPM_CHIP_FLAG_IRQ)) {
808 rc = tpm_tis_write8(priv, original_int_vec,
809 TPM_INT_VECTOR(priv->locality));
819 /* Try to find the IRQ the TPM is using. This is for legacy x86 systems that
820 * do not have ACPI/etc. We typically expect the interrupt to be declared if
823 static void tpm_tis_probe_irq(struct tpm_chip *chip, u32 intmask)
825 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
829 rc = tpm_tis_read8(priv, TPM_INT_VECTOR(priv->locality),
834 if (!original_int_vec) {
835 if (IS_ENABLED(CONFIG_X86))
836 for (i = 3; i <= 15; i++)
837 if (!tpm_tis_probe_irq_single(chip, intmask, 0,
840 } else if (!tpm_tis_probe_irq_single(chip, intmask, 0,
845 void tpm_tis_remove(struct tpm_chip *chip)
847 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
848 u32 reg = TPM_INT_ENABLE(priv->locality);
852 tpm_tis_clkrun_enable(chip, true);
854 rc = tpm_tis_read32(priv, reg, &interrupt);
858 tpm_tis_write32(priv, reg, ~TPM_GLOBAL_INT_ENABLE & interrupt);
860 tpm_tis_clkrun_enable(chip, false);
862 if (priv->ilb_base_addr)
863 iounmap(priv->ilb_base_addr);
865 EXPORT_SYMBOL_GPL(tpm_tis_remove);
868 * tpm_tis_clkrun_enable() - Keep clkrun protocol disabled for entire duration
869 * of a single TPM command
870 * @chip: TPM chip to use
871 * @value: 1 - Disable CLKRUN protocol, so that clocks are free running
872 * 0 - Enable CLKRUN protocol
873 * Call this function directly in tpm_tis_remove() in error or driver removal
874 * path, since the chip->ops is set to NULL in tpm_chip_unregister().
876 static void tpm_tis_clkrun_enable(struct tpm_chip *chip, bool value)
878 struct tpm_tis_data *data = dev_get_drvdata(&chip->dev);
881 if (!IS_ENABLED(CONFIG_X86) || !is_bsw() ||
882 !data->ilb_base_addr)
886 data->clkrun_enabled++;
887 if (data->clkrun_enabled > 1)
889 clkrun_val = ioread32(data->ilb_base_addr + LPC_CNTRL_OFFSET);
891 /* Disable LPC CLKRUN# */
892 clkrun_val &= ~LPC_CLKRUN_EN;
893 iowrite32(clkrun_val, data->ilb_base_addr + LPC_CNTRL_OFFSET);
896 * Write any random value on port 0x80 which is on LPC, to make
897 * sure LPC clock is running before sending any TPM command.
901 data->clkrun_enabled--;
902 if (data->clkrun_enabled)
905 clkrun_val = ioread32(data->ilb_base_addr + LPC_CNTRL_OFFSET);
907 /* Enable LPC CLKRUN# */
908 clkrun_val |= LPC_CLKRUN_EN;
909 iowrite32(clkrun_val, data->ilb_base_addr + LPC_CNTRL_OFFSET);
912 * Write any random value on port 0x80 which is on LPC, to make
913 * sure LPC clock is running before sending any TPM command.
919 static const struct tpm_class_ops tpm_tis = {
920 .flags = TPM_OPS_AUTO_STARTUP,
921 .status = tpm_tis_status,
922 .recv = tpm_tis_recv,
923 .send = tpm_tis_send,
924 .cancel = tpm_tis_ready,
925 .update_timeouts = tpm_tis_update_timeouts,
926 .update_durations = tpm_tis_update_durations,
927 .req_complete_mask = TPM_STS_DATA_AVAIL | TPM_STS_VALID,
928 .req_complete_val = TPM_STS_DATA_AVAIL | TPM_STS_VALID,
929 .req_canceled = tpm_tis_req_canceled,
930 .request_locality = request_locality,
931 .relinquish_locality = release_locality,
932 .clk_enable = tpm_tis_clkrun_enable,
935 int tpm_tis_core_init(struct device *dev, struct tpm_tis_data *priv, int irq,
936 const struct tpm_tis_phy_ops *phy_ops,
937 acpi_handle acpi_dev_handle)
945 struct tpm_chip *chip;
947 chip = tpmm_chip_alloc(dev, &tpm_tis);
949 return PTR_ERR(chip);
952 chip->acpi_dev_handle = acpi_dev_handle;
955 chip->hwrng.quality = priv->rng_quality;
957 /* Maximum timeouts */
958 chip->timeout_a = msecs_to_jiffies(TIS_TIMEOUT_A_MAX);
959 chip->timeout_b = msecs_to_jiffies(TIS_TIMEOUT_B_MAX);
960 chip->timeout_c = msecs_to_jiffies(TIS_TIMEOUT_C_MAX);
961 chip->timeout_d = msecs_to_jiffies(TIS_TIMEOUT_D_MAX);
962 priv->phy_ops = phy_ops;
963 dev_set_drvdata(&chip->dev, priv);
966 priv->ilb_base_addr = ioremap(INTEL_LEGACY_BLK_BASE_ADDR,
968 if (!priv->ilb_base_addr)
971 clkrun_val = ioread32(priv->ilb_base_addr + LPC_CNTRL_OFFSET);
972 /* Check if CLKRUN# is already not enabled in the LPC bus */
973 if (!(clkrun_val & LPC_CLKRUN_EN)) {
974 iounmap(priv->ilb_base_addr);
975 priv->ilb_base_addr = NULL;
979 if (chip->ops->clk_enable != NULL)
980 chip->ops->clk_enable(chip, true);
982 if (wait_startup(chip, 0) != 0) {
987 /* Take control of the TPM's interrupt hardware and shut it off */
988 rc = tpm_tis_read32(priv, TPM_INT_ENABLE(priv->locality), &intmask);
992 intmask |= TPM_INTF_CMD_READY_INT | TPM_INTF_LOCALITY_CHANGE_INT |
993 TPM_INTF_DATA_AVAIL_INT | TPM_INTF_STS_VALID_INT;
994 intmask &= ~TPM_GLOBAL_INT_ENABLE;
995 tpm_tis_write32(priv, TPM_INT_ENABLE(priv->locality), intmask);
997 rc = tpm_chip_start(chip);
1000 rc = tpm2_probe(chip);
1001 tpm_chip_stop(chip);
1005 rc = tpm_tis_read32(priv, TPM_DID_VID(0), &vendor);
1009 priv->manufacturer_id = vendor;
1011 rc = tpm_tis_read8(priv, TPM_RID(0), &rid);
1015 dev_info(dev, "%s TPM (device-id 0x%X, rev-id %d)\n",
1016 (chip->flags & TPM_CHIP_FLAG_TPM2) ? "2.0" : "1.2",
1019 probe = probe_itpm(chip);
1025 /* Figure out the capabilities */
1026 rc = tpm_tis_read32(priv, TPM_INTF_CAPS(priv->locality), &intfcaps);
1030 dev_dbg(dev, "TPM interface capabilities (0x%x):\n",
1032 if (intfcaps & TPM_INTF_BURST_COUNT_STATIC)
1033 dev_dbg(dev, "\tBurst Count Static\n");
1034 if (intfcaps & TPM_INTF_CMD_READY_INT)
1035 dev_dbg(dev, "\tCommand Ready Int Support\n");
1036 if (intfcaps & TPM_INTF_INT_EDGE_FALLING)
1037 dev_dbg(dev, "\tInterrupt Edge Falling\n");
1038 if (intfcaps & TPM_INTF_INT_EDGE_RISING)
1039 dev_dbg(dev, "\tInterrupt Edge Rising\n");
1040 if (intfcaps & TPM_INTF_INT_LEVEL_LOW)
1041 dev_dbg(dev, "\tInterrupt Level Low\n");
1042 if (intfcaps & TPM_INTF_INT_LEVEL_HIGH)
1043 dev_dbg(dev, "\tInterrupt Level High\n");
1044 if (intfcaps & TPM_INTF_LOCALITY_CHANGE_INT)
1045 dev_dbg(dev, "\tLocality Change Int Support\n");
1046 if (intfcaps & TPM_INTF_STS_VALID_INT)
1047 dev_dbg(dev, "\tSts Valid Int Support\n");
1048 if (intfcaps & TPM_INTF_DATA_AVAIL_INT)
1049 dev_dbg(dev, "\tData Avail Int Support\n");
1051 /* INTERRUPT Setup */
1052 init_waitqueue_head(&priv->read_queue);
1053 init_waitqueue_head(&priv->int_queue);
1055 /* Before doing irq testing issue a command to the TPM in polling mode
1056 * to make sure it works. May as well use that command to set the
1057 * proper timeouts for the driver.
1059 if (tpm_get_timeouts(chip)) {
1060 dev_err(dev, "Could not get TPM timeouts and durations\n");
1066 tpm_tis_probe_irq_single(chip, intmask, IRQF_SHARED,
1068 if (!(chip->flags & TPM_CHIP_FLAG_IRQ)) {
1069 dev_err(&chip->dev, FW_BUG
1070 "TPM interrupt not working, polling instead\n");
1072 disable_interrupts(chip);
1075 tpm_tis_probe_irq(chip, intmask);
1079 rc = tpm_chip_register(chip);
1083 if (chip->ops->clk_enable != NULL)
1084 chip->ops->clk_enable(chip, false);
1088 if ((chip->ops != NULL) && (chip->ops->clk_enable != NULL))
1089 chip->ops->clk_enable(chip, false);
1091 tpm_tis_remove(chip);
1095 EXPORT_SYMBOL_GPL(tpm_tis_core_init);
1097 #ifdef CONFIG_PM_SLEEP
1098 static void tpm_tis_reenable_interrupts(struct tpm_chip *chip)
1100 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
1104 if (chip->ops->clk_enable != NULL)
1105 chip->ops->clk_enable(chip, true);
1107 /* reenable interrupts that device may have lost or
1108 * BIOS/firmware may have disabled
1110 rc = tpm_tis_write8(priv, TPM_INT_VECTOR(priv->locality), priv->irq);
1114 rc = tpm_tis_read32(priv, TPM_INT_ENABLE(priv->locality), &intmask);
1118 intmask |= TPM_INTF_CMD_READY_INT
1119 | TPM_INTF_LOCALITY_CHANGE_INT | TPM_INTF_DATA_AVAIL_INT
1120 | TPM_INTF_STS_VALID_INT | TPM_GLOBAL_INT_ENABLE;
1122 tpm_tis_write32(priv, TPM_INT_ENABLE(priv->locality), intmask);
1125 if (chip->ops->clk_enable != NULL)
1126 chip->ops->clk_enable(chip, false);
1131 int tpm_tis_resume(struct device *dev)
1133 struct tpm_chip *chip = dev_get_drvdata(dev);
1136 if (chip->flags & TPM_CHIP_FLAG_IRQ)
1137 tpm_tis_reenable_interrupts(chip);
1139 ret = tpm_pm_resume(dev);
1143 /* TPM 1.2 requires self-test on resume. This function actually returns
1144 * an error code but for unknown reason it isn't handled.
1146 if (!(chip->flags & TPM_CHIP_FLAG_TPM2))
1147 tpm1_do_selftest(chip);
1151 EXPORT_SYMBOL_GPL(tpm_tis_resume);
1154 MODULE_AUTHOR("Leendert van Doorn (leendert@watson.ibm.com)");
1155 MODULE_DESCRIPTION("TPM Driver");
1156 MODULE_VERSION("2.0");
1157 MODULE_LICENSE("GPL");