1 // SPDX-License-Identifier: GPL-2.0
3 * System Control and Management Interface (SCMI) Performance Protocol
5 * Copyright (C) 2018 ARM Ltd.
8 #include <linux/bits.h>
11 #include <linux/io-64-nonatomic-hi-lo.h>
12 #include <linux/platform_device.h>
13 #include <linux/pm_opp.h>
14 #include <linux/sort.h>
18 enum scmi_performance_protocol_cmd {
19 PERF_DOMAIN_ATTRIBUTES = 0x3,
20 PERF_DESCRIBE_LEVELS = 0x4,
21 PERF_LIMITS_SET = 0x5,
22 PERF_LIMITS_GET = 0x6,
25 PERF_NOTIFY_LIMITS = 0x9,
26 PERF_NOTIFY_LEVEL = 0xa,
27 PERF_DESCRIBE_FASTCHANNEL = 0xb,
36 struct scmi_msg_resp_perf_attributes {
39 #define POWER_SCALE_IN_MILLIWATT(x) ((x) & BIT(0))
40 __le32 stats_addr_low;
41 __le32 stats_addr_high;
45 struct scmi_msg_resp_perf_domain_attributes {
47 #define SUPPORTS_SET_LIMITS(x) ((x) & BIT(31))
48 #define SUPPORTS_SET_PERF_LVL(x) ((x) & BIT(30))
49 #define SUPPORTS_PERF_LIMIT_NOTIFY(x) ((x) & BIT(29))
50 #define SUPPORTS_PERF_LEVEL_NOTIFY(x) ((x) & BIT(28))
51 #define SUPPORTS_PERF_FASTCHANNELS(x) ((x) & BIT(27))
53 __le32 sustained_freq_khz;
54 __le32 sustained_perf_level;
55 u8 name[SCMI_MAX_STR_SIZE];
58 struct scmi_msg_perf_describe_levels {
63 struct scmi_perf_set_limits {
69 struct scmi_perf_get_limits {
74 struct scmi_perf_set_level {
79 struct scmi_perf_notify_level_or_limits {
84 struct scmi_msg_resp_perf_describe_levels {
90 __le16 transition_latency_us;
95 struct scmi_perf_get_fc_info {
100 struct scmi_msg_resp_perf_desc_fc {
102 #define SUPPORTS_DOORBELL(x) ((x) & BIT(0))
103 #define DOORBELL_REG_WIDTH(x) FIELD_GET(GENMASK(2, 1), (x))
105 __le32 chan_addr_low;
106 __le32 chan_addr_high;
112 __le32 db_preserve_lmask;
113 __le32 db_preserve_hmask;
116 struct scmi_fc_db_info {
123 struct scmi_fc_info {
124 void __iomem *level_set_addr;
125 void __iomem *limit_set_addr;
126 void __iomem *level_get_addr;
127 void __iomem *limit_get_addr;
128 struct scmi_fc_db_info *level_set_db;
129 struct scmi_fc_db_info *limit_set_db;
132 struct perf_dom_info {
135 bool perf_limit_notify;
136 bool perf_level_notify;
137 bool perf_fastchannels;
139 u32 sustained_freq_khz;
140 u32 sustained_perf_level;
142 char name[SCMI_MAX_STR_SIZE];
143 struct scmi_opp opp[MAX_OPPS];
144 struct scmi_fc_info *fc_info;
147 struct scmi_perf_info {
153 struct perf_dom_info *dom_info;
156 static int scmi_perf_attributes_get(const struct scmi_handle *handle,
157 struct scmi_perf_info *pi)
161 struct scmi_msg_resp_perf_attributes *attr;
163 ret = scmi_xfer_get_init(handle, PROTOCOL_ATTRIBUTES,
164 SCMI_PROTOCOL_PERF, 0, sizeof(*attr), &t);
170 ret = scmi_do_xfer(handle, t);
172 u16 flags = le16_to_cpu(attr->flags);
174 pi->num_domains = le16_to_cpu(attr->num_domains);
175 pi->power_scale_mw = POWER_SCALE_IN_MILLIWATT(flags);
176 pi->stats_addr = le32_to_cpu(attr->stats_addr_low) |
177 (u64)le32_to_cpu(attr->stats_addr_high) << 32;
178 pi->stats_size = le32_to_cpu(attr->stats_size);
181 scmi_xfer_put(handle, t);
186 scmi_perf_domain_attributes_get(const struct scmi_handle *handle, u32 domain,
187 struct perf_dom_info *dom_info)
191 struct scmi_msg_resp_perf_domain_attributes *attr;
193 ret = scmi_xfer_get_init(handle, PERF_DOMAIN_ATTRIBUTES,
194 SCMI_PROTOCOL_PERF, sizeof(domain),
199 put_unaligned_le32(domain, t->tx.buf);
202 ret = scmi_do_xfer(handle, t);
204 u32 flags = le32_to_cpu(attr->flags);
206 dom_info->set_limits = SUPPORTS_SET_LIMITS(flags);
207 dom_info->set_perf = SUPPORTS_SET_PERF_LVL(flags);
208 dom_info->perf_limit_notify = SUPPORTS_PERF_LIMIT_NOTIFY(flags);
209 dom_info->perf_level_notify = SUPPORTS_PERF_LEVEL_NOTIFY(flags);
210 dom_info->perf_fastchannels = SUPPORTS_PERF_FASTCHANNELS(flags);
211 dom_info->sustained_freq_khz =
212 le32_to_cpu(attr->sustained_freq_khz);
213 dom_info->sustained_perf_level =
214 le32_to_cpu(attr->sustained_perf_level);
215 if (!dom_info->sustained_freq_khz ||
216 !dom_info->sustained_perf_level)
217 /* CPUFreq converts to kHz, hence default 1000 */
218 dom_info->mult_factor = 1000;
220 dom_info->mult_factor =
221 (dom_info->sustained_freq_khz * 1000) /
222 dom_info->sustained_perf_level;
223 strlcpy(dom_info->name, attr->name, SCMI_MAX_STR_SIZE);
226 scmi_xfer_put(handle, t);
230 static int opp_cmp_func(const void *opp1, const void *opp2)
232 const struct scmi_opp *t1 = opp1, *t2 = opp2;
234 return t1->perf - t2->perf;
238 scmi_perf_describe_levels_get(const struct scmi_handle *handle, u32 domain,
239 struct perf_dom_info *perf_dom)
243 u16 num_returned, num_remaining;
245 struct scmi_opp *opp;
246 struct scmi_msg_perf_describe_levels *dom_info;
247 struct scmi_msg_resp_perf_describe_levels *level_info;
249 ret = scmi_xfer_get_init(handle, PERF_DESCRIBE_LEVELS,
250 SCMI_PROTOCOL_PERF, sizeof(*dom_info), 0, &t);
254 dom_info = t->tx.buf;
255 level_info = t->rx.buf;
258 dom_info->domain = cpu_to_le32(domain);
259 /* Set the number of OPPs to be skipped/already read */
260 dom_info->level_index = cpu_to_le32(tot_opp_cnt);
262 ret = scmi_do_xfer(handle, t);
266 num_returned = le16_to_cpu(level_info->num_returned);
267 num_remaining = le16_to_cpu(level_info->num_remaining);
268 if (tot_opp_cnt + num_returned > MAX_OPPS) {
269 dev_err(handle->dev, "No. of OPPs exceeded MAX_OPPS");
273 opp = &perf_dom->opp[tot_opp_cnt];
274 for (cnt = 0; cnt < num_returned; cnt++, opp++) {
275 opp->perf = le32_to_cpu(level_info->opp[cnt].perf_val);
276 opp->power = le32_to_cpu(level_info->opp[cnt].power);
277 opp->trans_latency_us = le16_to_cpu
278 (level_info->opp[cnt].transition_latency_us);
280 dev_dbg(handle->dev, "Level %d Power %d Latency %dus\n",
281 opp->perf, opp->power, opp->trans_latency_us);
284 tot_opp_cnt += num_returned;
286 * check for both returned and remaining to avoid infinite
287 * loop due to buggy firmware
289 } while (num_returned && num_remaining);
291 perf_dom->opp_count = tot_opp_cnt;
292 scmi_xfer_put(handle, t);
294 sort(perf_dom->opp, tot_opp_cnt, sizeof(*opp), opp_cmp_func, NULL);
298 #define SCMI_PERF_FC_RING_DB(w) \
303 val = ioread##w(db->addr) & db->mask; \
304 iowrite##w((u##w)db->set | val, db->addr); \
307 static void scmi_perf_fc_ring_db(struct scmi_fc_db_info *db)
309 if (!db || !db->addr)
313 SCMI_PERF_FC_RING_DB(8);
314 else if (db->width == 2)
315 SCMI_PERF_FC_RING_DB(16);
316 else if (db->width == 4)
317 SCMI_PERF_FC_RING_DB(32);
318 else /* db->width == 8 */
320 SCMI_PERF_FC_RING_DB(64);
326 val = ioread64_hi_lo(db->addr) & db->mask;
327 iowrite64_hi_lo(db->set | val, db->addr);
332 static int scmi_perf_mb_limits_set(const struct scmi_handle *handle, u32 domain,
333 u32 max_perf, u32 min_perf)
337 struct scmi_perf_set_limits *limits;
339 ret = scmi_xfer_get_init(handle, PERF_LIMITS_SET, SCMI_PROTOCOL_PERF,
340 sizeof(*limits), 0, &t);
345 limits->domain = cpu_to_le32(domain);
346 limits->max_level = cpu_to_le32(max_perf);
347 limits->min_level = cpu_to_le32(min_perf);
349 ret = scmi_do_xfer(handle, t);
351 scmi_xfer_put(handle, t);
355 static int scmi_perf_limits_set(const struct scmi_handle *handle, u32 domain,
356 u32 max_perf, u32 min_perf)
358 struct scmi_perf_info *pi = handle->perf_priv;
359 struct perf_dom_info *dom = pi->dom_info + domain;
361 if (dom->fc_info && dom->fc_info->limit_set_addr) {
362 iowrite32(max_perf, dom->fc_info->limit_set_addr);
363 iowrite32(min_perf, dom->fc_info->limit_set_addr + 4);
364 scmi_perf_fc_ring_db(dom->fc_info->limit_set_db);
368 return scmi_perf_mb_limits_set(handle, domain, max_perf, min_perf);
371 static int scmi_perf_mb_limits_get(const struct scmi_handle *handle, u32 domain,
372 u32 *max_perf, u32 *min_perf)
376 struct scmi_perf_get_limits *limits;
378 ret = scmi_xfer_get_init(handle, PERF_LIMITS_GET, SCMI_PROTOCOL_PERF,
379 sizeof(__le32), 0, &t);
383 put_unaligned_le32(domain, t->tx.buf);
385 ret = scmi_do_xfer(handle, t);
389 *max_perf = le32_to_cpu(limits->max_level);
390 *min_perf = le32_to_cpu(limits->min_level);
393 scmi_xfer_put(handle, t);
397 static int scmi_perf_limits_get(const struct scmi_handle *handle, u32 domain,
398 u32 *max_perf, u32 *min_perf)
400 struct scmi_perf_info *pi = handle->perf_priv;
401 struct perf_dom_info *dom = pi->dom_info + domain;
403 if (dom->fc_info && dom->fc_info->limit_get_addr) {
404 *max_perf = ioread32(dom->fc_info->limit_get_addr);
405 *min_perf = ioread32(dom->fc_info->limit_get_addr + 4);
409 return scmi_perf_mb_limits_get(handle, domain, max_perf, min_perf);
412 static int scmi_perf_mb_level_set(const struct scmi_handle *handle, u32 domain,
413 u32 level, bool poll)
417 struct scmi_perf_set_level *lvl;
419 ret = scmi_xfer_get_init(handle, PERF_LEVEL_SET, SCMI_PROTOCOL_PERF,
420 sizeof(*lvl), 0, &t);
424 t->hdr.poll_completion = poll;
426 lvl->domain = cpu_to_le32(domain);
427 lvl->level = cpu_to_le32(level);
429 ret = scmi_do_xfer(handle, t);
431 scmi_xfer_put(handle, t);
435 static int scmi_perf_level_set(const struct scmi_handle *handle, u32 domain,
436 u32 level, bool poll)
438 struct scmi_perf_info *pi = handle->perf_priv;
439 struct perf_dom_info *dom = pi->dom_info + domain;
441 if (dom->fc_info && dom->fc_info->level_set_addr) {
442 iowrite32(level, dom->fc_info->level_set_addr);
443 scmi_perf_fc_ring_db(dom->fc_info->level_set_db);
447 return scmi_perf_mb_level_set(handle, domain, level, poll);
450 static int scmi_perf_mb_level_get(const struct scmi_handle *handle, u32 domain,
451 u32 *level, bool poll)
456 ret = scmi_xfer_get_init(handle, PERF_LEVEL_GET, SCMI_PROTOCOL_PERF,
457 sizeof(u32), sizeof(u32), &t);
461 t->hdr.poll_completion = poll;
462 put_unaligned_le32(domain, t->tx.buf);
464 ret = scmi_do_xfer(handle, t);
466 *level = get_unaligned_le32(t->rx.buf);
468 scmi_xfer_put(handle, t);
472 static int scmi_perf_level_get(const struct scmi_handle *handle, u32 domain,
473 u32 *level, bool poll)
475 struct scmi_perf_info *pi = handle->perf_priv;
476 struct perf_dom_info *dom = pi->dom_info + domain;
478 if (dom->fc_info && dom->fc_info->level_get_addr) {
479 *level = ioread32(dom->fc_info->level_get_addr);
483 return scmi_perf_mb_level_get(handle, domain, level, poll);
486 static bool scmi_perf_fc_size_is_valid(u32 msg, u32 size)
488 if ((msg == PERF_LEVEL_GET || msg == PERF_LEVEL_SET) && size == 4)
490 if ((msg == PERF_LIMITS_GET || msg == PERF_LIMITS_SET) && size == 8)
496 scmi_perf_domain_desc_fc(const struct scmi_handle *handle, u32 domain,
497 u32 message_id, void __iomem **p_addr,
498 struct scmi_fc_db_info **p_db)
506 struct scmi_fc_db_info *db;
507 struct scmi_perf_get_fc_info *info;
508 struct scmi_msg_resp_perf_desc_fc *resp;
513 ret = scmi_xfer_get_init(handle, PERF_DESCRIBE_FASTCHANNEL,
515 sizeof(*info), sizeof(*resp), &t);
520 info->domain = cpu_to_le32(domain);
521 info->message_id = cpu_to_le32(message_id);
523 ret = scmi_do_xfer(handle, t);
528 flags = le32_to_cpu(resp->attr);
529 size = le32_to_cpu(resp->chan_size);
530 if (!scmi_perf_fc_size_is_valid(message_id, size))
533 phys_addr = le32_to_cpu(resp->chan_addr_low);
534 phys_addr |= (u64)le32_to_cpu(resp->chan_addr_high) << 32;
535 addr = devm_ioremap(handle->dev, phys_addr, size);
540 if (p_db && SUPPORTS_DOORBELL(flags)) {
541 db = devm_kzalloc(handle->dev, sizeof(*db), GFP_KERNEL);
545 size = 1 << DOORBELL_REG_WIDTH(flags);
546 phys_addr = le32_to_cpu(resp->db_addr_low);
547 phys_addr |= (u64)le32_to_cpu(resp->db_addr_high) << 32;
548 addr = devm_ioremap(handle->dev, phys_addr, size);
554 db->set = le32_to_cpu(resp->db_set_lmask);
555 db->set |= (u64)le32_to_cpu(resp->db_set_hmask) << 32;
556 db->mask = le32_to_cpu(resp->db_preserve_lmask);
557 db->mask |= (u64)le32_to_cpu(resp->db_preserve_hmask) << 32;
561 scmi_xfer_put(handle, t);
564 static void scmi_perf_domain_init_fc(const struct scmi_handle *handle,
565 u32 domain, struct scmi_fc_info **p_fc)
567 struct scmi_fc_info *fc;
569 fc = devm_kzalloc(handle->dev, sizeof(*fc), GFP_KERNEL);
573 scmi_perf_domain_desc_fc(handle, domain, PERF_LEVEL_SET,
574 &fc->level_set_addr, &fc->level_set_db);
575 scmi_perf_domain_desc_fc(handle, domain, PERF_LEVEL_GET,
576 &fc->level_get_addr, NULL);
577 scmi_perf_domain_desc_fc(handle, domain, PERF_LIMITS_SET,
578 &fc->limit_set_addr, &fc->limit_set_db);
579 scmi_perf_domain_desc_fc(handle, domain, PERF_LIMITS_GET,
580 &fc->limit_get_addr, NULL);
584 /* Device specific ops */
585 static int scmi_dev_domain_id(struct device *dev)
587 struct of_phandle_args clkspec;
589 if (of_parse_phandle_with_args(dev->of_node, "clocks", "#clock-cells",
593 return clkspec.args[0];
596 static int scmi_dvfs_device_opps_add(const struct scmi_handle *handle,
599 int idx, ret, domain;
601 struct scmi_opp *opp;
602 struct perf_dom_info *dom;
603 struct scmi_perf_info *pi = handle->perf_priv;
605 domain = scmi_dev_domain_id(dev);
609 dom = pi->dom_info + domain;
611 for (opp = dom->opp, idx = 0; idx < dom->opp_count; idx++, opp++) {
612 freq = opp->perf * dom->mult_factor;
614 ret = dev_pm_opp_add(dev, freq, 0);
616 dev_warn(dev, "failed to add opp %luHz\n", freq);
619 freq = (--opp)->perf * dom->mult_factor;
620 dev_pm_opp_remove(dev, freq);
628 static int scmi_dvfs_transition_latency_get(const struct scmi_handle *handle,
631 struct perf_dom_info *dom;
632 struct scmi_perf_info *pi = handle->perf_priv;
633 int domain = scmi_dev_domain_id(dev);
638 dom = pi->dom_info + domain;
640 return dom->opp[dom->opp_count - 1].trans_latency_us * 1000;
643 static int scmi_dvfs_freq_set(const struct scmi_handle *handle, u32 domain,
644 unsigned long freq, bool poll)
646 struct scmi_perf_info *pi = handle->perf_priv;
647 struct perf_dom_info *dom = pi->dom_info + domain;
649 return scmi_perf_level_set(handle, domain, freq / dom->mult_factor,
653 static int scmi_dvfs_freq_get(const struct scmi_handle *handle, u32 domain,
654 unsigned long *freq, bool poll)
658 struct scmi_perf_info *pi = handle->perf_priv;
659 struct perf_dom_info *dom = pi->dom_info + domain;
661 ret = scmi_perf_level_get(handle, domain, &level, poll);
663 *freq = level * dom->mult_factor;
668 static int scmi_dvfs_est_power_get(const struct scmi_handle *handle, u32 domain,
669 unsigned long *freq, unsigned long *power)
671 struct scmi_perf_info *pi = handle->perf_priv;
672 struct perf_dom_info *dom;
673 unsigned long opp_freq;
674 int idx, ret = -EINVAL;
675 struct scmi_opp *opp;
677 dom = pi->dom_info + domain;
681 for (opp = dom->opp, idx = 0; idx < dom->opp_count; idx++, opp++) {
682 opp_freq = opp->perf * dom->mult_factor;
683 if (opp_freq < *freq)
695 static struct scmi_perf_ops perf_ops = {
696 .limits_set = scmi_perf_limits_set,
697 .limits_get = scmi_perf_limits_get,
698 .level_set = scmi_perf_level_set,
699 .level_get = scmi_perf_level_get,
700 .device_domain_id = scmi_dev_domain_id,
701 .transition_latency_get = scmi_dvfs_transition_latency_get,
702 .device_opps_add = scmi_dvfs_device_opps_add,
703 .freq_set = scmi_dvfs_freq_set,
704 .freq_get = scmi_dvfs_freq_get,
705 .est_power_get = scmi_dvfs_est_power_get,
708 static int scmi_perf_protocol_init(struct scmi_handle *handle)
712 struct scmi_perf_info *pinfo;
714 scmi_version_get(handle, SCMI_PROTOCOL_PERF, &version);
716 dev_dbg(handle->dev, "Performance Version %d.%d\n",
717 PROTOCOL_REV_MAJOR(version), PROTOCOL_REV_MINOR(version));
719 pinfo = devm_kzalloc(handle->dev, sizeof(*pinfo), GFP_KERNEL);
723 scmi_perf_attributes_get(handle, pinfo);
725 pinfo->dom_info = devm_kcalloc(handle->dev, pinfo->num_domains,
726 sizeof(*pinfo->dom_info), GFP_KERNEL);
727 if (!pinfo->dom_info)
730 for (domain = 0; domain < pinfo->num_domains; domain++) {
731 struct perf_dom_info *dom = pinfo->dom_info + domain;
733 scmi_perf_domain_attributes_get(handle, domain, dom);
734 scmi_perf_describe_levels_get(handle, domain, dom);
736 if (dom->perf_fastchannels)
737 scmi_perf_domain_init_fc(handle, domain, &dom->fc_info);
740 pinfo->version = version;
741 handle->perf_ops = &perf_ops;
742 handle->perf_priv = pinfo;
747 static int __init scmi_perf_init(void)
749 return scmi_protocol_register(SCMI_PROTOCOL_PERF,
750 &scmi_perf_protocol_init);
752 subsys_initcall(scmi_perf_init);