1 // SPDX-License-Identifier: GPL-2.0 OR MIT
3 * Copyright 2020-2021 Advanced Micro Devices, Inc.
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice shall be included in
13 * all copies or substantial portions of the Software.
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
19 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
21 * OTHER DEALINGS IN THE SOFTWARE.
24 #include <linux/types.h>
25 #include <linux/sched/task.h>
26 #include <linux/dynamic_debug.h>
27 #include <drm/ttm/ttm_tt.h>
28 #include <drm/drm_exec.h>
30 #include "amdgpu_sync.h"
31 #include "amdgpu_object.h"
32 #include "amdgpu_vm.h"
33 #include "amdgpu_hmm.h"
35 #include "amdgpu_xgmi.h"
38 #include "kfd_migrate.h"
39 #include "kfd_smi_events.h"
44 #define dev_fmt(fmt) "kfd_svm: %s: " fmt, __func__
46 #define AMDGPU_SVM_RANGE_RESTORE_DELAY_MS 1
48 /* Long enough to ensure no retry fault comes after svm range is restored and
49 * page table is updated.
51 #define AMDGPU_SVM_RANGE_RETRY_FAULT_PENDING (2UL * NSEC_PER_MSEC)
52 #if IS_ENABLED(CONFIG_DYNAMIC_DEBUG)
53 #define dynamic_svm_range_dump(svms) \
54 _dynamic_func_call_no_desc("svm_range_dump", svm_range_debug_dump, svms)
56 #define dynamic_svm_range_dump(svms) \
57 do { if (0) svm_range_debug_dump(svms); } while (0)
60 /* Giant svm range split into smaller ranges based on this, it is decided using
61 * minimum of all dGPU/APU 1/32 VRAM size, between 2MB to 1GB and alignment to
64 static uint64_t max_svm_range_pages;
66 struct criu_svm_metadata {
67 struct list_head list;
68 struct kfd_criu_svm_range_priv_data data;
71 static void svm_range_evict_svm_bo_worker(struct work_struct *work);
73 svm_range_cpu_invalidate_pagetables(struct mmu_interval_notifier *mni,
74 const struct mmu_notifier_range *range,
75 unsigned long cur_seq);
77 svm_range_check_vm(struct kfd_process *p, uint64_t start, uint64_t last,
78 uint64_t *bo_s, uint64_t *bo_l);
79 static const struct mmu_interval_notifier_ops svm_range_mn_ops = {
80 .invalidate = svm_range_cpu_invalidate_pagetables,
84 * svm_range_unlink - unlink svm_range from lists and interval tree
85 * @prange: svm range structure to be removed
87 * Remove the svm_range from the svms and svm_bo lists and the svms
90 * Context: The caller must hold svms->lock
92 static void svm_range_unlink(struct svm_range *prange)
94 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", prange->svms,
95 prange, prange->start, prange->last);
98 spin_lock(&prange->svm_bo->list_lock);
99 list_del(&prange->svm_bo_list);
100 spin_unlock(&prange->svm_bo->list_lock);
103 list_del(&prange->list);
104 if (prange->it_node.start != 0 && prange->it_node.last != 0)
105 interval_tree_remove(&prange->it_node, &prange->svms->objects);
109 svm_range_add_notifier_locked(struct mm_struct *mm, struct svm_range *prange)
111 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", prange->svms,
112 prange, prange->start, prange->last);
114 mmu_interval_notifier_insert_locked(&prange->notifier, mm,
115 prange->start << PAGE_SHIFT,
116 prange->npages << PAGE_SHIFT,
121 * svm_range_add_to_svms - add svm range to svms
122 * @prange: svm range structure to be added
124 * Add the svm range to svms interval tree and link list
126 * Context: The caller must hold svms->lock
128 static void svm_range_add_to_svms(struct svm_range *prange)
130 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", prange->svms,
131 prange, prange->start, prange->last);
133 list_move_tail(&prange->list, &prange->svms->list);
134 prange->it_node.start = prange->start;
135 prange->it_node.last = prange->last;
136 interval_tree_insert(&prange->it_node, &prange->svms->objects);
139 static void svm_range_remove_notifier(struct svm_range *prange)
141 pr_debug("remove notifier svms 0x%p prange 0x%p [0x%lx 0x%lx]\n",
142 prange->svms, prange,
143 prange->notifier.interval_tree.start >> PAGE_SHIFT,
144 prange->notifier.interval_tree.last >> PAGE_SHIFT);
146 if (prange->notifier.interval_tree.start != 0 &&
147 prange->notifier.interval_tree.last != 0)
148 mmu_interval_notifier_remove(&prange->notifier);
152 svm_is_valid_dma_mapping_addr(struct device *dev, dma_addr_t dma_addr)
154 return dma_addr && !dma_mapping_error(dev, dma_addr) &&
155 !(dma_addr & SVM_RANGE_VRAM_DOMAIN);
159 svm_range_dma_map_dev(struct amdgpu_device *adev, struct svm_range *prange,
160 unsigned long offset, unsigned long npages,
161 unsigned long *hmm_pfns, uint32_t gpuidx)
163 enum dma_data_direction dir = DMA_BIDIRECTIONAL;
164 dma_addr_t *addr = prange->dma_addr[gpuidx];
165 struct device *dev = adev->dev;
170 addr = kvcalloc(prange->npages, sizeof(*addr), GFP_KERNEL);
173 prange->dma_addr[gpuidx] = addr;
177 for (i = 0; i < npages; i++) {
178 if (svm_is_valid_dma_mapping_addr(dev, addr[i]))
179 dma_unmap_page(dev, addr[i], PAGE_SIZE, dir);
181 page = hmm_pfn_to_page(hmm_pfns[i]);
182 if (is_zone_device_page(page)) {
183 struct amdgpu_device *bo_adev = prange->svm_bo->node->adev;
185 addr[i] = (hmm_pfns[i] << PAGE_SHIFT) +
186 bo_adev->vm_manager.vram_base_offset -
187 bo_adev->kfd.pgmap.range.start;
188 addr[i] |= SVM_RANGE_VRAM_DOMAIN;
189 pr_debug_ratelimited("vram address: 0x%llx\n", addr[i]);
192 addr[i] = dma_map_page(dev, page, 0, PAGE_SIZE, dir);
193 r = dma_mapping_error(dev, addr[i]);
195 dev_err(dev, "failed %d dma_map_page\n", r);
198 pr_debug_ratelimited("dma mapping 0x%llx for page addr 0x%lx\n",
199 addr[i] >> PAGE_SHIFT, page_to_pfn(page));
205 svm_range_dma_map(struct svm_range *prange, unsigned long *bitmap,
206 unsigned long offset, unsigned long npages,
207 unsigned long *hmm_pfns)
209 struct kfd_process *p;
213 p = container_of(prange->svms, struct kfd_process, svms);
215 for_each_set_bit(gpuidx, bitmap, MAX_GPU_INSTANCE) {
216 struct kfd_process_device *pdd;
218 pr_debug("mapping to gpu idx 0x%x\n", gpuidx);
219 pdd = kfd_process_device_from_gpuidx(p, gpuidx);
221 pr_debug("failed to find device idx %d\n", gpuidx);
225 r = svm_range_dma_map_dev(pdd->dev->adev, prange, offset, npages,
234 void svm_range_dma_unmap(struct device *dev, dma_addr_t *dma_addr,
235 unsigned long offset, unsigned long npages)
237 enum dma_data_direction dir = DMA_BIDIRECTIONAL;
243 for (i = offset; i < offset + npages; i++) {
244 if (!svm_is_valid_dma_mapping_addr(dev, dma_addr[i]))
246 pr_debug_ratelimited("unmap 0x%llx\n", dma_addr[i] >> PAGE_SHIFT);
247 dma_unmap_page(dev, dma_addr[i], PAGE_SIZE, dir);
252 void svm_range_free_dma_mappings(struct svm_range *prange, bool unmap_dma)
254 struct kfd_process_device *pdd;
255 dma_addr_t *dma_addr;
257 struct kfd_process *p;
260 p = container_of(prange->svms, struct kfd_process, svms);
262 for (gpuidx = 0; gpuidx < MAX_GPU_INSTANCE; gpuidx++) {
263 dma_addr = prange->dma_addr[gpuidx];
267 pdd = kfd_process_device_from_gpuidx(p, gpuidx);
269 pr_debug("failed to find device idx %d\n", gpuidx);
272 dev = &pdd->dev->adev->pdev->dev;
274 svm_range_dma_unmap(dev, dma_addr, 0, prange->npages);
276 prange->dma_addr[gpuidx] = NULL;
280 static void svm_range_free(struct svm_range *prange, bool do_unmap)
282 uint64_t size = (prange->last - prange->start + 1) << PAGE_SHIFT;
283 struct kfd_process *p = container_of(prange->svms, struct kfd_process, svms);
285 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx]\n", prange->svms, prange,
286 prange->start, prange->last);
288 svm_range_vram_node_free(prange);
289 svm_range_free_dma_mappings(prange, do_unmap);
291 if (do_unmap && !p->xnack_enabled) {
292 pr_debug("unreserve prange 0x%p size: 0x%llx\n", prange, size);
293 amdgpu_amdkfd_unreserve_mem_limit(NULL, size,
294 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0);
296 mutex_destroy(&prange->lock);
297 mutex_destroy(&prange->migrate_mutex);
302 svm_range_set_default_attributes(int32_t *location, int32_t *prefetch_loc,
303 uint8_t *granularity, uint32_t *flags)
305 *location = KFD_IOCTL_SVM_LOCATION_UNDEFINED;
306 *prefetch_loc = KFD_IOCTL_SVM_LOCATION_UNDEFINED;
309 KFD_IOCTL_SVM_FLAG_HOST_ACCESS | KFD_IOCTL_SVM_FLAG_COHERENT;
313 svm_range *svm_range_new(struct svm_range_list *svms, uint64_t start,
314 uint64_t last, bool update_mem_usage)
316 uint64_t size = last - start + 1;
317 struct svm_range *prange;
318 struct kfd_process *p;
320 prange = kzalloc(sizeof(*prange), GFP_KERNEL);
324 p = container_of(svms, struct kfd_process, svms);
325 if (!p->xnack_enabled && update_mem_usage &&
326 amdgpu_amdkfd_reserve_mem_limit(NULL, size << PAGE_SHIFT,
327 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0)) {
328 pr_info("SVM mapping failed, exceeds resident system memory limit\n");
332 prange->npages = size;
334 prange->start = start;
336 INIT_LIST_HEAD(&prange->list);
337 INIT_LIST_HEAD(&prange->update_list);
338 INIT_LIST_HEAD(&prange->svm_bo_list);
339 INIT_LIST_HEAD(&prange->deferred_list);
340 INIT_LIST_HEAD(&prange->child_list);
341 atomic_set(&prange->invalid, 0);
342 prange->validate_timestamp = 0;
343 mutex_init(&prange->migrate_mutex);
344 mutex_init(&prange->lock);
346 if (p->xnack_enabled)
347 bitmap_copy(prange->bitmap_access, svms->bitmap_supported,
350 svm_range_set_default_attributes(&prange->preferred_loc,
351 &prange->prefetch_loc,
352 &prange->granularity, &prange->flags);
354 pr_debug("svms 0x%p [0x%llx 0x%llx]\n", svms, start, last);
359 static bool svm_bo_ref_unless_zero(struct svm_range_bo *svm_bo)
361 if (!svm_bo || !kref_get_unless_zero(&svm_bo->kref))
367 static void svm_range_bo_release(struct kref *kref)
369 struct svm_range_bo *svm_bo;
371 svm_bo = container_of(kref, struct svm_range_bo, kref);
372 pr_debug("svm_bo 0x%p\n", svm_bo);
374 spin_lock(&svm_bo->list_lock);
375 while (!list_empty(&svm_bo->range_list)) {
376 struct svm_range *prange =
377 list_first_entry(&svm_bo->range_list,
378 struct svm_range, svm_bo_list);
379 /* list_del_init tells a concurrent svm_range_vram_node_new when
380 * it's safe to reuse the svm_bo pointer and svm_bo_list head.
382 list_del_init(&prange->svm_bo_list);
383 spin_unlock(&svm_bo->list_lock);
385 pr_debug("svms 0x%p [0x%lx 0x%lx]\n", prange->svms,
386 prange->start, prange->last);
387 mutex_lock(&prange->lock);
388 prange->svm_bo = NULL;
389 mutex_unlock(&prange->lock);
391 spin_lock(&svm_bo->list_lock);
393 spin_unlock(&svm_bo->list_lock);
394 if (!dma_fence_is_signaled(&svm_bo->eviction_fence->base)) {
395 /* We're not in the eviction worker.
396 * Signal the fence and synchronize with any
397 * pending eviction work.
399 dma_fence_signal(&svm_bo->eviction_fence->base);
400 cancel_work_sync(&svm_bo->eviction_work);
402 dma_fence_put(&svm_bo->eviction_fence->base);
403 amdgpu_bo_unref(&svm_bo->bo);
407 static void svm_range_bo_wq_release(struct work_struct *work)
409 struct svm_range_bo *svm_bo;
411 svm_bo = container_of(work, struct svm_range_bo, release_work);
412 svm_range_bo_release(&svm_bo->kref);
415 static void svm_range_bo_release_async(struct kref *kref)
417 struct svm_range_bo *svm_bo;
419 svm_bo = container_of(kref, struct svm_range_bo, kref);
420 pr_debug("svm_bo 0x%p\n", svm_bo);
421 INIT_WORK(&svm_bo->release_work, svm_range_bo_wq_release);
422 schedule_work(&svm_bo->release_work);
425 void svm_range_bo_unref_async(struct svm_range_bo *svm_bo)
427 kref_put(&svm_bo->kref, svm_range_bo_release_async);
430 static void svm_range_bo_unref(struct svm_range_bo *svm_bo)
433 kref_put(&svm_bo->kref, svm_range_bo_release);
437 svm_range_validate_svm_bo(struct kfd_node *node, struct svm_range *prange)
439 mutex_lock(&prange->lock);
440 if (!prange->svm_bo) {
441 mutex_unlock(&prange->lock);
444 if (prange->ttm_res) {
445 /* We still have a reference, all is well */
446 mutex_unlock(&prange->lock);
449 if (svm_bo_ref_unless_zero(prange->svm_bo)) {
451 * Migrate from GPU to GPU, remove range from source svm_bo->node
452 * range list, and return false to allocate svm_bo from destination
455 if (prange->svm_bo->node != node) {
456 mutex_unlock(&prange->lock);
458 spin_lock(&prange->svm_bo->list_lock);
459 list_del_init(&prange->svm_bo_list);
460 spin_unlock(&prange->svm_bo->list_lock);
462 svm_range_bo_unref(prange->svm_bo);
465 if (READ_ONCE(prange->svm_bo->evicting)) {
467 struct svm_range_bo *svm_bo;
468 /* The BO is getting evicted,
469 * we need to get a new one
471 mutex_unlock(&prange->lock);
472 svm_bo = prange->svm_bo;
473 f = dma_fence_get(&svm_bo->eviction_fence->base);
474 svm_range_bo_unref(prange->svm_bo);
475 /* wait for the fence to avoid long spin-loop
476 * at list_empty_careful
478 dma_fence_wait(f, false);
481 /* The BO was still around and we got
482 * a new reference to it
484 mutex_unlock(&prange->lock);
485 pr_debug("reuse old bo svms 0x%p [0x%lx 0x%lx]\n",
486 prange->svms, prange->start, prange->last);
488 prange->ttm_res = prange->svm_bo->bo->tbo.resource;
493 mutex_unlock(&prange->lock);
496 /* We need a new svm_bo. Spin-loop to wait for concurrent
497 * svm_range_bo_release to finish removing this range from
498 * its range list. After this, it is safe to reuse the
499 * svm_bo pointer and svm_bo_list head.
501 while (!list_empty_careful(&prange->svm_bo_list))
507 static struct svm_range_bo *svm_range_bo_new(void)
509 struct svm_range_bo *svm_bo;
511 svm_bo = kzalloc(sizeof(*svm_bo), GFP_KERNEL);
515 kref_init(&svm_bo->kref);
516 INIT_LIST_HEAD(&svm_bo->range_list);
517 spin_lock_init(&svm_bo->list_lock);
523 svm_range_vram_node_new(struct kfd_node *node, struct svm_range *prange,
526 struct amdgpu_bo_param bp;
527 struct svm_range_bo *svm_bo;
528 struct amdgpu_bo_user *ubo;
529 struct amdgpu_bo *bo;
530 struct kfd_process *p;
531 struct mm_struct *mm;
534 p = container_of(prange->svms, struct kfd_process, svms);
535 pr_debug("pasid: %x svms 0x%p [0x%lx 0x%lx]\n", p->pasid, prange->svms,
536 prange->start, prange->last);
538 if (svm_range_validate_svm_bo(node, prange))
541 svm_bo = svm_range_bo_new();
543 pr_debug("failed to alloc svm bo\n");
546 mm = get_task_mm(p->lead_thread);
548 pr_debug("failed to get mm\n");
553 svm_bo->eviction_fence =
554 amdgpu_amdkfd_fence_create(dma_fence_context_alloc(1),
558 INIT_WORK(&svm_bo->eviction_work, svm_range_evict_svm_bo_worker);
559 svm_bo->evicting = 0;
560 memset(&bp, 0, sizeof(bp));
561 bp.size = prange->npages * PAGE_SIZE;
562 bp.byte_align = PAGE_SIZE;
563 bp.domain = AMDGPU_GEM_DOMAIN_VRAM;
564 bp.flags = AMDGPU_GEM_CREATE_NO_CPU_ACCESS;
565 bp.flags |= clear ? AMDGPU_GEM_CREATE_VRAM_CLEARED : 0;
566 bp.flags |= AMDGPU_GEM_CREATE_DISCARDABLE;
567 bp.type = ttm_bo_type_device;
570 bp.xcp_id_plus1 = node->xcp->id + 1;
572 r = amdgpu_bo_create_user(node->adev, &bp, &ubo);
574 pr_debug("failed %d to create bo\n", r);
575 goto create_bo_failed;
579 pr_debug("alloc bo at offset 0x%lx size 0x%lx on partition %d\n",
580 bo->tbo.resource->start << PAGE_SHIFT, bp.size,
581 bp.xcp_id_plus1 - 1);
583 r = amdgpu_bo_reserve(bo, true);
585 pr_debug("failed %d to reserve bo\n", r);
586 goto reserve_bo_failed;
590 r = amdgpu_bo_sync_wait(bo, AMDGPU_FENCE_OWNER_KFD, false);
592 pr_debug("failed %d to sync bo\n", r);
593 amdgpu_bo_unreserve(bo);
594 goto reserve_bo_failed;
598 r = dma_resv_reserve_fences(bo->tbo.base.resv, 1);
600 pr_debug("failed %d to reserve bo\n", r);
601 amdgpu_bo_unreserve(bo);
602 goto reserve_bo_failed;
604 amdgpu_bo_fence(bo, &svm_bo->eviction_fence->base, true);
606 amdgpu_bo_unreserve(bo);
609 prange->svm_bo = svm_bo;
610 prange->ttm_res = bo->tbo.resource;
613 spin_lock(&svm_bo->list_lock);
614 list_add(&prange->svm_bo_list, &svm_bo->range_list);
615 spin_unlock(&svm_bo->list_lock);
620 amdgpu_bo_unref(&bo);
622 dma_fence_put(&svm_bo->eviction_fence->base);
624 prange->ttm_res = NULL;
629 void svm_range_vram_node_free(struct svm_range *prange)
631 svm_range_bo_unref(prange->svm_bo);
632 prange->ttm_res = NULL;
636 svm_range_get_node_by_id(struct svm_range *prange, uint32_t gpu_id)
638 struct kfd_process *p;
639 struct kfd_process_device *pdd;
641 p = container_of(prange->svms, struct kfd_process, svms);
642 pdd = kfd_process_device_data_by_id(p, gpu_id);
644 pr_debug("failed to get kfd process device by id 0x%x\n", gpu_id);
651 struct kfd_process_device *
652 svm_range_get_pdd_by_node(struct svm_range *prange, struct kfd_node *node)
654 struct kfd_process *p;
656 p = container_of(prange->svms, struct kfd_process, svms);
658 return kfd_get_process_device_data(node, p);
661 static int svm_range_bo_validate(void *param, struct amdgpu_bo *bo)
663 struct ttm_operation_ctx ctx = { false, false };
665 amdgpu_bo_placement_from_domain(bo, AMDGPU_GEM_DOMAIN_VRAM);
667 return ttm_bo_validate(&bo->tbo, &bo->placement, &ctx);
671 svm_range_check_attr(struct kfd_process *p,
672 uint32_t nattr, struct kfd_ioctl_svm_attribute *attrs)
676 for (i = 0; i < nattr; i++) {
677 uint32_t val = attrs[i].value;
678 int gpuidx = MAX_GPU_INSTANCE;
680 switch (attrs[i].type) {
681 case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC:
682 if (val != KFD_IOCTL_SVM_LOCATION_SYSMEM &&
683 val != KFD_IOCTL_SVM_LOCATION_UNDEFINED)
684 gpuidx = kfd_process_gpuidx_from_gpuid(p, val);
686 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC:
687 if (val != KFD_IOCTL_SVM_LOCATION_SYSMEM)
688 gpuidx = kfd_process_gpuidx_from_gpuid(p, val);
690 case KFD_IOCTL_SVM_ATTR_ACCESS:
691 case KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE:
692 case KFD_IOCTL_SVM_ATTR_NO_ACCESS:
693 gpuidx = kfd_process_gpuidx_from_gpuid(p, val);
695 case KFD_IOCTL_SVM_ATTR_SET_FLAGS:
697 case KFD_IOCTL_SVM_ATTR_CLR_FLAGS:
699 case KFD_IOCTL_SVM_ATTR_GRANULARITY:
702 pr_debug("unknown attr type 0x%x\n", attrs[i].type);
707 pr_debug("no GPU 0x%x found\n", val);
709 } else if (gpuidx < MAX_GPU_INSTANCE &&
710 !test_bit(gpuidx, p->svms.bitmap_supported)) {
711 pr_debug("GPU 0x%x not supported\n", val);
720 svm_range_apply_attrs(struct kfd_process *p, struct svm_range *prange,
721 uint32_t nattr, struct kfd_ioctl_svm_attribute *attrs,
722 bool *update_mapping)
727 for (i = 0; i < nattr; i++) {
728 switch (attrs[i].type) {
729 case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC:
730 prange->preferred_loc = attrs[i].value;
732 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC:
733 prange->prefetch_loc = attrs[i].value;
735 case KFD_IOCTL_SVM_ATTR_ACCESS:
736 case KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE:
737 case KFD_IOCTL_SVM_ATTR_NO_ACCESS:
738 if (!p->xnack_enabled)
739 *update_mapping = true;
741 gpuidx = kfd_process_gpuidx_from_gpuid(p,
743 if (attrs[i].type == KFD_IOCTL_SVM_ATTR_NO_ACCESS) {
744 bitmap_clear(prange->bitmap_access, gpuidx, 1);
745 bitmap_clear(prange->bitmap_aip, gpuidx, 1);
746 } else if (attrs[i].type == KFD_IOCTL_SVM_ATTR_ACCESS) {
747 bitmap_set(prange->bitmap_access, gpuidx, 1);
748 bitmap_clear(prange->bitmap_aip, gpuidx, 1);
750 bitmap_clear(prange->bitmap_access, gpuidx, 1);
751 bitmap_set(prange->bitmap_aip, gpuidx, 1);
754 case KFD_IOCTL_SVM_ATTR_SET_FLAGS:
755 *update_mapping = true;
756 prange->flags |= attrs[i].value;
758 case KFD_IOCTL_SVM_ATTR_CLR_FLAGS:
759 *update_mapping = true;
760 prange->flags &= ~attrs[i].value;
762 case KFD_IOCTL_SVM_ATTR_GRANULARITY:
763 prange->granularity = attrs[i].value;
766 WARN_ONCE(1, "svm_range_check_attrs wasn't called?");
772 svm_range_is_same_attrs(struct kfd_process *p, struct svm_range *prange,
773 uint32_t nattr, struct kfd_ioctl_svm_attribute *attrs)
778 for (i = 0; i < nattr; i++) {
779 switch (attrs[i].type) {
780 case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC:
781 if (prange->preferred_loc != attrs[i].value)
784 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC:
785 /* Prefetch should always trigger a migration even
786 * if the value of the attribute didn't change.
789 case KFD_IOCTL_SVM_ATTR_ACCESS:
790 case KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE:
791 case KFD_IOCTL_SVM_ATTR_NO_ACCESS:
792 gpuidx = kfd_process_gpuidx_from_gpuid(p,
794 if (attrs[i].type == KFD_IOCTL_SVM_ATTR_NO_ACCESS) {
795 if (test_bit(gpuidx, prange->bitmap_access) ||
796 test_bit(gpuidx, prange->bitmap_aip))
798 } else if (attrs[i].type == KFD_IOCTL_SVM_ATTR_ACCESS) {
799 if (!test_bit(gpuidx, prange->bitmap_access))
802 if (!test_bit(gpuidx, prange->bitmap_aip))
806 case KFD_IOCTL_SVM_ATTR_SET_FLAGS:
807 if ((prange->flags & attrs[i].value) != attrs[i].value)
810 case KFD_IOCTL_SVM_ATTR_CLR_FLAGS:
811 if ((prange->flags & attrs[i].value) != 0)
814 case KFD_IOCTL_SVM_ATTR_GRANULARITY:
815 if (prange->granularity != attrs[i].value)
819 WARN_ONCE(1, "svm_range_check_attrs wasn't called?");
823 return !prange->is_error_flag;
827 * svm_range_debug_dump - print all range information from svms
828 * @svms: svm range list header
830 * debug output svm range start, end, prefetch location from svms
831 * interval tree and link list
833 * Context: The caller must hold svms->lock
835 static void svm_range_debug_dump(struct svm_range_list *svms)
837 struct interval_tree_node *node;
838 struct svm_range *prange;
840 pr_debug("dump svms 0x%p list\n", svms);
841 pr_debug("range\tstart\tpage\tend\t\tlocation\n");
843 list_for_each_entry(prange, &svms->list, list) {
844 pr_debug("0x%p 0x%lx\t0x%llx\t0x%llx\t0x%x\n",
845 prange, prange->start, prange->npages,
846 prange->start + prange->npages - 1,
850 pr_debug("dump svms 0x%p interval tree\n", svms);
851 pr_debug("range\tstart\tpage\tend\t\tlocation\n");
852 node = interval_tree_iter_first(&svms->objects, 0, ~0ULL);
854 prange = container_of(node, struct svm_range, it_node);
855 pr_debug("0x%p 0x%lx\t0x%llx\t0x%llx\t0x%x\n",
856 prange, prange->start, prange->npages,
857 prange->start + prange->npages - 1,
859 node = interval_tree_iter_next(node, 0, ~0ULL);
864 svm_range_copy_array(void *psrc, size_t size, uint64_t num_elements,
869 dst = kvmalloc_array(num_elements, size, GFP_KERNEL);
872 memcpy(dst, (unsigned char *)psrc + offset, num_elements * size);
878 svm_range_copy_dma_addrs(struct svm_range *dst, struct svm_range *src)
882 for (i = 0; i < MAX_GPU_INSTANCE; i++) {
883 if (!src->dma_addr[i])
885 dst->dma_addr[i] = svm_range_copy_array(src->dma_addr[i],
886 sizeof(*src->dma_addr[i]), src->npages, 0);
887 if (!dst->dma_addr[i])
895 svm_range_split_array(void *ppnew, void *ppold, size_t size,
896 uint64_t old_start, uint64_t old_n,
897 uint64_t new_start, uint64_t new_n)
899 unsigned char *new, *old, *pold;
904 pold = *(unsigned char **)ppold;
908 d = (new_start - old_start) * size;
909 new = svm_range_copy_array(pold, size, new_n, d);
912 d = (new_start == old_start) ? new_n * size : 0;
913 old = svm_range_copy_array(pold, size, old_n, d);
919 *(void **)ppold = old;
920 *(void **)ppnew = new;
926 svm_range_split_pages(struct svm_range *new, struct svm_range *old,
927 uint64_t start, uint64_t last)
929 uint64_t npages = last - start + 1;
932 for (i = 0; i < MAX_GPU_INSTANCE; i++) {
933 r = svm_range_split_array(&new->dma_addr[i], &old->dma_addr[i],
934 sizeof(*old->dma_addr[i]), old->start,
935 npages, new->start, new->npages);
944 svm_range_split_nodes(struct svm_range *new, struct svm_range *old,
945 uint64_t start, uint64_t last)
947 uint64_t npages = last - start + 1;
949 pr_debug("svms 0x%p new prange 0x%p start 0x%lx [0x%llx 0x%llx]\n",
950 new->svms, new, new->start, start, last);
952 if (new->start == old->start) {
953 new->offset = old->offset;
954 old->offset += new->npages;
956 new->offset = old->offset + npages;
959 new->svm_bo = svm_range_bo_ref(old->svm_bo);
960 new->ttm_res = old->ttm_res;
962 spin_lock(&new->svm_bo->list_lock);
963 list_add(&new->svm_bo_list, &new->svm_bo->range_list);
964 spin_unlock(&new->svm_bo->list_lock);
970 * svm_range_split_adjust - split range and adjust
973 * @old: the old range
974 * @start: the old range adjust to start address in pages
975 * @last: the old range adjust to last address in pages
977 * Copy system memory dma_addr or vram ttm_res in old range to new
978 * range from new_start up to size new->npages, the remaining old range is from
982 * 0 - OK, -ENOMEM - out of memory
985 svm_range_split_adjust(struct svm_range *new, struct svm_range *old,
986 uint64_t start, uint64_t last)
990 pr_debug("svms 0x%p new 0x%lx old [0x%lx 0x%lx] => [0x%llx 0x%llx]\n",
991 new->svms, new->start, old->start, old->last, start, last);
993 if (new->start < old->start ||
994 new->last > old->last) {
995 WARN_ONCE(1, "invalid new range start or last\n");
999 r = svm_range_split_pages(new, old, start, last);
1003 if (old->actual_loc && old->ttm_res) {
1004 r = svm_range_split_nodes(new, old, start, last);
1009 old->npages = last - start + 1;
1012 new->flags = old->flags;
1013 new->preferred_loc = old->preferred_loc;
1014 new->prefetch_loc = old->prefetch_loc;
1015 new->actual_loc = old->actual_loc;
1016 new->granularity = old->granularity;
1017 new->mapped_to_gpu = old->mapped_to_gpu;
1018 bitmap_copy(new->bitmap_access, old->bitmap_access, MAX_GPU_INSTANCE);
1019 bitmap_copy(new->bitmap_aip, old->bitmap_aip, MAX_GPU_INSTANCE);
1025 * svm_range_split - split a range in 2 ranges
1027 * @prange: the svm range to split
1028 * @start: the remaining range start address in pages
1029 * @last: the remaining range last address in pages
1030 * @new: the result new range generated
1033 * case 1: if start == prange->start
1034 * prange ==> prange[start, last]
1035 * new range [last + 1, prange->last]
1037 * case 2: if last == prange->last
1038 * prange ==> prange[start, last]
1039 * new range [prange->start, start - 1]
1042 * 0 - OK, -ENOMEM - out of memory, -EINVAL - invalid start, last
1045 svm_range_split(struct svm_range *prange, uint64_t start, uint64_t last,
1046 struct svm_range **new)
1048 uint64_t old_start = prange->start;
1049 uint64_t old_last = prange->last;
1050 struct svm_range_list *svms;
1053 pr_debug("svms 0x%p [0x%llx 0x%llx] to [0x%llx 0x%llx]\n", prange->svms,
1054 old_start, old_last, start, last);
1056 if (old_start != start && old_last != last)
1058 if (start < old_start || last > old_last)
1061 svms = prange->svms;
1062 if (old_start == start)
1063 *new = svm_range_new(svms, last + 1, old_last, false);
1065 *new = svm_range_new(svms, old_start, start - 1, false);
1069 r = svm_range_split_adjust(*new, prange, start, last);
1071 pr_debug("failed %d split [0x%llx 0x%llx] to [0x%llx 0x%llx]\n",
1072 r, old_start, old_last, start, last);
1073 svm_range_free(*new, false);
1081 svm_range_split_tail(struct svm_range *prange,
1082 uint64_t new_last, struct list_head *insert_list)
1084 struct svm_range *tail;
1085 int r = svm_range_split(prange, prange->start, new_last, &tail);
1088 list_add(&tail->list, insert_list);
1093 svm_range_split_head(struct svm_range *prange,
1094 uint64_t new_start, struct list_head *insert_list)
1096 struct svm_range *head;
1097 int r = svm_range_split(prange, new_start, prange->last, &head);
1100 list_add(&head->list, insert_list);
1105 svm_range_add_child(struct svm_range *prange, struct mm_struct *mm,
1106 struct svm_range *pchild, enum svm_work_list_ops op)
1108 pr_debug("add child 0x%p [0x%lx 0x%lx] to prange 0x%p child list %d\n",
1109 pchild, pchild->start, pchild->last, prange, op);
1111 pchild->work_item.mm = mm;
1112 pchild->work_item.op = op;
1113 list_add_tail(&pchild->child_list, &prange->child_list);
1117 * svm_range_split_by_granularity - collect ranges within granularity boundary
1119 * @p: the process with svms list
1121 * @addr: the vm fault address in pages, to split the prange
1122 * @parent: parent range if prange is from child list
1123 * @prange: prange to split
1125 * Trims @prange to be a single aligned block of prange->granularity if
1126 * possible. The head and tail are added to the child_list in @parent.
1128 * Context: caller must hold mmap_read_lock and prange->lock
1131 * 0 - OK, otherwise error code
1134 svm_range_split_by_granularity(struct kfd_process *p, struct mm_struct *mm,
1135 unsigned long addr, struct svm_range *parent,
1136 struct svm_range *prange)
1138 struct svm_range *head, *tail;
1139 unsigned long start, last, size;
1142 /* Align splited range start and size to granularity size, then a single
1143 * PTE will be used for whole range, this reduces the number of PTE
1144 * updated and the L1 TLB space used for translation.
1146 size = 1UL << prange->granularity;
1147 start = ALIGN_DOWN(addr, size);
1148 last = ALIGN(addr + 1, size) - 1;
1150 pr_debug("svms 0x%p split [0x%lx 0x%lx] to [0x%lx 0x%lx] size 0x%lx\n",
1151 prange->svms, prange->start, prange->last, start, last, size);
1153 if (start > prange->start) {
1154 r = svm_range_split(prange, start, prange->last, &head);
1157 svm_range_add_child(parent, mm, head, SVM_OP_ADD_RANGE);
1160 if (last < prange->last) {
1161 r = svm_range_split(prange, prange->start, last, &tail);
1164 svm_range_add_child(parent, mm, tail, SVM_OP_ADD_RANGE);
1167 /* xnack on, update mapping on GPUs with ACCESS_IN_PLACE */
1168 if (p->xnack_enabled && prange->work_item.op == SVM_OP_ADD_RANGE) {
1169 prange->work_item.op = SVM_OP_ADD_RANGE_AND_MAP;
1170 pr_debug("change prange 0x%p [0x%lx 0x%lx] op %d\n",
1171 prange, prange->start, prange->last,
1172 SVM_OP_ADD_RANGE_AND_MAP);
1177 svm_nodes_in_same_hive(struct kfd_node *node_a, struct kfd_node *node_b)
1179 return (node_a->adev == node_b->adev ||
1180 amdgpu_xgmi_same_hive(node_a->adev, node_b->adev));
1184 svm_range_get_pte_flags(struct kfd_node *node,
1185 struct svm_range *prange, int domain)
1187 struct kfd_node *bo_node;
1188 uint32_t flags = prange->flags;
1189 uint32_t mapping_flags = 0;
1191 bool snoop = (domain != SVM_RANGE_VRAM_DOMAIN);
1192 bool coherent = flags & KFD_IOCTL_SVM_FLAG_COHERENT;
1193 bool uncached = false; /*flags & KFD_IOCTL_SVM_FLAG_UNCACHED;*/
1194 unsigned int mtype_local;
1196 if (domain == SVM_RANGE_VRAM_DOMAIN)
1197 bo_node = prange->svm_bo->node;
1199 switch (node->adev->ip_versions[GC_HWIP][0]) {
1200 case IP_VERSION(9, 4, 1):
1201 if (domain == SVM_RANGE_VRAM_DOMAIN) {
1202 if (bo_node == node) {
1203 mapping_flags |= coherent ?
1204 AMDGPU_VM_MTYPE_CC : AMDGPU_VM_MTYPE_RW;
1206 mapping_flags |= coherent ?
1207 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC;
1208 if (svm_nodes_in_same_hive(node, bo_node))
1212 mapping_flags |= coherent ?
1213 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC;
1216 case IP_VERSION(9, 4, 2):
1217 if (domain == SVM_RANGE_VRAM_DOMAIN) {
1218 if (bo_node == node) {
1219 mapping_flags |= coherent ?
1220 AMDGPU_VM_MTYPE_CC : AMDGPU_VM_MTYPE_RW;
1221 if (node->adev->gmc.xgmi.connected_to_cpu)
1224 mapping_flags |= coherent ?
1225 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC;
1226 if (svm_nodes_in_same_hive(node, bo_node))
1230 mapping_flags |= coherent ?
1231 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC;
1234 case IP_VERSION(9, 4, 3):
1235 mtype_local = amdgpu_mtype_local == 1 ? AMDGPU_VM_MTYPE_NC :
1236 (amdgpu_mtype_local == 2 ? AMDGPU_VM_MTYPE_CC : AMDGPU_VM_MTYPE_RW);
1239 mapping_flags |= AMDGPU_VM_MTYPE_UC;
1240 } else if (domain == SVM_RANGE_VRAM_DOMAIN) {
1241 /* local HBM region close to partition */
1242 if (bo_node->adev == node->adev &&
1243 (!bo_node->xcp || !node->xcp || bo_node->xcp->mem_id == node->xcp->mem_id))
1244 mapping_flags |= mtype_local;
1245 /* local HBM region far from partition or remote XGMI GPU */
1246 else if (svm_nodes_in_same_hive(bo_node, node))
1247 mapping_flags |= AMDGPU_VM_MTYPE_NC;
1250 mapping_flags |= AMDGPU_VM_MTYPE_UC;
1251 /* system memory accessed by the APU */
1252 } else if (node->adev->flags & AMD_IS_APU) {
1253 /* On NUMA systems, locality is determined per-page
1254 * in amdgpu_gmc_override_vm_pte_flags
1256 if (num_possible_nodes() <= 1)
1257 mapping_flags |= mtype_local;
1259 mapping_flags |= AMDGPU_VM_MTYPE_NC;
1260 /* system memory accessed by the dGPU */
1262 mapping_flags |= AMDGPU_VM_MTYPE_UC;
1266 mapping_flags |= coherent ?
1267 AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC;
1270 mapping_flags |= AMDGPU_VM_PAGE_READABLE | AMDGPU_VM_PAGE_WRITEABLE;
1272 if (flags & KFD_IOCTL_SVM_FLAG_GPU_RO)
1273 mapping_flags &= ~AMDGPU_VM_PAGE_WRITEABLE;
1274 if (flags & KFD_IOCTL_SVM_FLAG_GPU_EXEC)
1275 mapping_flags |= AMDGPU_VM_PAGE_EXECUTABLE;
1277 pte_flags = AMDGPU_PTE_VALID;
1278 pte_flags |= (domain == SVM_RANGE_VRAM_DOMAIN) ? 0 : AMDGPU_PTE_SYSTEM;
1279 pte_flags |= snoop ? AMDGPU_PTE_SNOOPED : 0;
1281 pte_flags |= amdgpu_gem_va_map_flags(node->adev, mapping_flags);
1286 svm_range_unmap_from_gpu(struct amdgpu_device *adev, struct amdgpu_vm *vm,
1287 uint64_t start, uint64_t last,
1288 struct dma_fence **fence)
1290 uint64_t init_pte_value = 0;
1292 pr_debug("[0x%llx 0x%llx]\n", start, last);
1294 return amdgpu_vm_update_range(adev, vm, false, true, true, NULL, start,
1295 last, init_pte_value, 0, 0, NULL, NULL,
1300 svm_range_unmap_from_gpus(struct svm_range *prange, unsigned long start,
1301 unsigned long last, uint32_t trigger)
1303 DECLARE_BITMAP(bitmap, MAX_GPU_INSTANCE);
1304 struct kfd_process_device *pdd;
1305 struct dma_fence *fence = NULL;
1306 struct kfd_process *p;
1310 if (!prange->mapped_to_gpu) {
1311 pr_debug("prange 0x%p [0x%lx 0x%lx] not mapped to GPU\n",
1312 prange, prange->start, prange->last);
1316 if (prange->start == start && prange->last == last) {
1317 pr_debug("unmap svms 0x%p prange 0x%p\n", prange->svms, prange);
1318 prange->mapped_to_gpu = false;
1321 bitmap_or(bitmap, prange->bitmap_access, prange->bitmap_aip,
1323 p = container_of(prange->svms, struct kfd_process, svms);
1325 for_each_set_bit(gpuidx, bitmap, MAX_GPU_INSTANCE) {
1326 pr_debug("unmap from gpu idx 0x%x\n", gpuidx);
1327 pdd = kfd_process_device_from_gpuidx(p, gpuidx);
1329 pr_debug("failed to find device idx %d\n", gpuidx);
1333 kfd_smi_event_unmap_from_gpu(pdd->dev, p->lead_thread->pid,
1334 start, last, trigger);
1336 r = svm_range_unmap_from_gpu(pdd->dev->adev,
1337 drm_priv_to_vm(pdd->drm_priv),
1338 start, last, &fence);
1343 r = dma_fence_wait(fence, false);
1344 dma_fence_put(fence);
1349 kfd_flush_tlb(pdd, TLB_FLUSH_HEAVYWEIGHT);
1356 svm_range_map_to_gpu(struct kfd_process_device *pdd, struct svm_range *prange,
1357 unsigned long offset, unsigned long npages, bool readonly,
1358 dma_addr_t *dma_addr, struct amdgpu_device *bo_adev,
1359 struct dma_fence **fence, bool flush_tlb)
1361 struct amdgpu_device *adev = pdd->dev->adev;
1362 struct amdgpu_vm *vm = drm_priv_to_vm(pdd->drm_priv);
1364 unsigned long last_start;
1369 last_start = prange->start + offset;
1371 pr_debug("svms 0x%p [0x%lx 0x%lx] readonly %d\n", prange->svms,
1372 last_start, last_start + npages - 1, readonly);
1374 for (i = offset; i < offset + npages; i++) {
1375 last_domain = dma_addr[i] & SVM_RANGE_VRAM_DOMAIN;
1376 dma_addr[i] &= ~SVM_RANGE_VRAM_DOMAIN;
1378 /* Collect all pages in the same address range and memory domain
1379 * that can be mapped with a single call to update mapping.
1381 if (i < offset + npages - 1 &&
1382 last_domain == (dma_addr[i + 1] & SVM_RANGE_VRAM_DOMAIN))
1385 pr_debug("Mapping range [0x%lx 0x%llx] on domain: %s\n",
1386 last_start, prange->start + i, last_domain ? "GPU" : "CPU");
1388 pte_flags = svm_range_get_pte_flags(pdd->dev, prange, last_domain);
1390 pte_flags &= ~AMDGPU_PTE_WRITEABLE;
1392 pr_debug("svms 0x%p map [0x%lx 0x%llx] vram %d PTE 0x%llx\n",
1393 prange->svms, last_start, prange->start + i,
1394 (last_domain == SVM_RANGE_VRAM_DOMAIN) ? 1 : 0,
1397 /* For dGPU mode, we use same vm_manager to allocate VRAM for
1398 * different memory partition based on fpfn/lpfn, we should use
1399 * same vm_manager.vram_base_offset regardless memory partition.
1401 r = amdgpu_vm_update_range(adev, vm, false, false, flush_tlb, NULL,
1402 last_start, prange->start + i,
1404 (last_start - prange->start) << PAGE_SHIFT,
1405 bo_adev ? bo_adev->vm_manager.vram_base_offset : 0,
1406 NULL, dma_addr, &vm->last_update);
1408 for (j = last_start - prange->start; j <= i; j++)
1409 dma_addr[j] |= last_domain;
1412 pr_debug("failed %d to map to gpu 0x%lx\n", r, prange->start);
1415 last_start = prange->start + i + 1;
1418 r = amdgpu_vm_update_pdes(adev, vm, false);
1420 pr_debug("failed %d to update directories 0x%lx\n", r,
1426 *fence = dma_fence_get(vm->last_update);
1433 svm_range_map_to_gpus(struct svm_range *prange, unsigned long offset,
1434 unsigned long npages, bool readonly,
1435 unsigned long *bitmap, bool wait, bool flush_tlb)
1437 struct kfd_process_device *pdd;
1438 struct amdgpu_device *bo_adev = NULL;
1439 struct kfd_process *p;
1440 struct dma_fence *fence = NULL;
1444 if (prange->svm_bo && prange->ttm_res)
1445 bo_adev = prange->svm_bo->node->adev;
1447 p = container_of(prange->svms, struct kfd_process, svms);
1448 for_each_set_bit(gpuidx, bitmap, MAX_GPU_INSTANCE) {
1449 pr_debug("mapping to gpu idx 0x%x\n", gpuidx);
1450 pdd = kfd_process_device_from_gpuidx(p, gpuidx);
1452 pr_debug("failed to find device idx %d\n", gpuidx);
1456 pdd = kfd_bind_process_to_device(pdd->dev, p);
1460 if (bo_adev && pdd->dev->adev != bo_adev &&
1461 !amdgpu_xgmi_same_hive(pdd->dev->adev, bo_adev)) {
1462 pr_debug("cannot map to device idx %d\n", gpuidx);
1466 r = svm_range_map_to_gpu(pdd, prange, offset, npages, readonly,
1467 prange->dma_addr[gpuidx],
1468 bo_adev, wait ? &fence : NULL,
1474 r = dma_fence_wait(fence, false);
1475 dma_fence_put(fence);
1478 pr_debug("failed %d to dma fence wait\n", r);
1483 kfd_flush_tlb(pdd, TLB_FLUSH_LEGACY);
1489 struct svm_validate_context {
1490 struct kfd_process *process;
1491 struct svm_range *prange;
1493 DECLARE_BITMAP(bitmap, MAX_GPU_INSTANCE);
1494 struct drm_exec exec;
1497 static int svm_range_reserve_bos(struct svm_validate_context *ctx, bool intr)
1499 struct kfd_process_device *pdd;
1500 struct amdgpu_vm *vm;
1504 drm_exec_init(&ctx->exec, intr ? DRM_EXEC_INTERRUPTIBLE_WAIT: 0);
1505 drm_exec_until_all_locked(&ctx->exec) {
1506 for_each_set_bit(gpuidx, ctx->bitmap, MAX_GPU_INSTANCE) {
1507 pdd = kfd_process_device_from_gpuidx(ctx->process, gpuidx);
1509 pr_debug("failed to find device idx %d\n", gpuidx);
1513 vm = drm_priv_to_vm(pdd->drm_priv);
1515 r = amdgpu_vm_lock_pd(vm, &ctx->exec, 2);
1516 drm_exec_retry_on_contention(&ctx->exec);
1518 pr_debug("failed %d to reserve bo\n", r);
1524 for_each_set_bit(gpuidx, ctx->bitmap, MAX_GPU_INSTANCE) {
1525 pdd = kfd_process_device_from_gpuidx(ctx->process, gpuidx);
1527 pr_debug("failed to find device idx %d\n", gpuidx);
1532 r = amdgpu_vm_validate_pt_bos(pdd->dev->adev,
1533 drm_priv_to_vm(pdd->drm_priv),
1534 svm_range_bo_validate, NULL);
1536 pr_debug("failed %d validate pt bos\n", r);
1544 drm_exec_fini(&ctx->exec);
1548 static void svm_range_unreserve_bos(struct svm_validate_context *ctx)
1550 drm_exec_fini(&ctx->exec);
1553 static void *kfd_svm_page_owner(struct kfd_process *p, int32_t gpuidx)
1555 struct kfd_process_device *pdd;
1557 pdd = kfd_process_device_from_gpuidx(p, gpuidx);
1561 return SVM_ADEV_PGMAP_OWNER(pdd->dev->adev);
1565 * Validation+GPU mapping with concurrent invalidation (MMU notifiers)
1567 * To prevent concurrent destruction or change of range attributes, the
1568 * svm_read_lock must be held. The caller must not hold the svm_write_lock
1569 * because that would block concurrent evictions and lead to deadlocks. To
1570 * serialize concurrent migrations or validations of the same range, the
1571 * prange->migrate_mutex must be held.
1573 * For VRAM ranges, the SVM BO must be allocated and valid (protected by its
1576 * The following sequence ensures race-free validation and GPU mapping:
1578 * 1. Reserve page table (and SVM BO if range is in VRAM)
1579 * 2. hmm_range_fault to get page addresses (if system memory)
1580 * 3. DMA-map pages (if system memory)
1581 * 4-a. Take notifier lock
1582 * 4-b. Check that pages still valid (mmu_interval_read_retry)
1583 * 4-c. Check that the range was not split or otherwise invalidated
1584 * 4-d. Update GPU page table
1585 * 4.e. Release notifier lock
1586 * 5. Release page table (and SVM BO) reservation
1588 static int svm_range_validate_and_map(struct mm_struct *mm,
1589 struct svm_range *prange, int32_t gpuidx,
1590 bool intr, bool wait, bool flush_tlb)
1592 struct svm_validate_context *ctx;
1593 unsigned long start, end, addr;
1594 struct kfd_process *p;
1599 ctx = kzalloc(sizeof(struct svm_validate_context), GFP_KERNEL);
1602 ctx->process = container_of(prange->svms, struct kfd_process, svms);
1603 ctx->prange = prange;
1606 if (gpuidx < MAX_GPU_INSTANCE) {
1607 bitmap_zero(ctx->bitmap, MAX_GPU_INSTANCE);
1608 bitmap_set(ctx->bitmap, gpuidx, 1);
1609 } else if (ctx->process->xnack_enabled) {
1610 bitmap_copy(ctx->bitmap, prange->bitmap_aip, MAX_GPU_INSTANCE);
1612 /* If prefetch range to GPU, or GPU retry fault migrate range to
1613 * GPU, which has ACCESS attribute to the range, create mapping
1616 if (prange->actual_loc) {
1617 gpuidx = kfd_process_gpuidx_from_gpuid(ctx->process,
1618 prange->actual_loc);
1620 WARN_ONCE(1, "failed get device by id 0x%x\n",
1621 prange->actual_loc);
1625 if (test_bit(gpuidx, prange->bitmap_access))
1626 bitmap_set(ctx->bitmap, gpuidx, 1);
1629 bitmap_or(ctx->bitmap, prange->bitmap_access,
1630 prange->bitmap_aip, MAX_GPU_INSTANCE);
1633 if (bitmap_empty(ctx->bitmap, MAX_GPU_INSTANCE)) {
1634 bitmap_copy(ctx->bitmap, prange->bitmap_access, MAX_GPU_INSTANCE);
1635 if (!prange->mapped_to_gpu ||
1636 bitmap_empty(ctx->bitmap, MAX_GPU_INSTANCE)) {
1642 if (prange->actual_loc && !prange->ttm_res) {
1643 /* This should never happen. actual_loc gets set by
1644 * svm_migrate_ram_to_vram after allocating a BO.
1646 WARN_ONCE(1, "VRAM BO missing during validation\n");
1651 svm_range_reserve_bos(ctx, intr);
1653 p = container_of(prange->svms, struct kfd_process, svms);
1654 owner = kfd_svm_page_owner(p, find_first_bit(ctx->bitmap,
1656 for_each_set_bit(idx, ctx->bitmap, MAX_GPU_INSTANCE) {
1657 if (kfd_svm_page_owner(p, idx) != owner) {
1663 start = prange->start << PAGE_SHIFT;
1664 end = (prange->last + 1) << PAGE_SHIFT;
1665 for (addr = start; addr < end && !r; ) {
1666 struct hmm_range *hmm_range;
1667 struct vm_area_struct *vma;
1669 unsigned long offset;
1670 unsigned long npages;
1673 vma = vma_lookup(mm, addr);
1678 readonly = !(vma->vm_flags & VM_WRITE);
1680 next = min(vma->vm_end, end);
1681 npages = (next - addr) >> PAGE_SHIFT;
1682 WRITE_ONCE(p->svms.faulting_task, current);
1683 r = amdgpu_hmm_range_get_pages(&prange->notifier, addr, npages,
1684 readonly, owner, NULL,
1686 WRITE_ONCE(p->svms.faulting_task, NULL);
1688 pr_debug("failed %d to get svm range pages\n", r);
1692 offset = (addr - start) >> PAGE_SHIFT;
1693 r = svm_range_dma_map(prange, ctx->bitmap, offset, npages,
1694 hmm_range->hmm_pfns);
1696 pr_debug("failed %d to dma map range\n", r);
1700 svm_range_lock(prange);
1701 if (amdgpu_hmm_range_get_pages_done(hmm_range)) {
1702 pr_debug("hmm update the range, need validate again\n");
1706 if (!list_empty(&prange->child_list)) {
1707 pr_debug("range split by unmap in parallel, validate again\n");
1712 r = svm_range_map_to_gpus(prange, offset, npages, readonly,
1713 ctx->bitmap, wait, flush_tlb);
1716 svm_range_unlock(prange);
1722 prange->validated_once = true;
1723 prange->mapped_to_gpu = true;
1727 svm_range_unreserve_bos(ctx);
1729 prange->is_error_flag = !!r;
1731 prange->validate_timestamp = ktime_get_boottime();
1740 * svm_range_list_lock_and_flush_work - flush pending deferred work
1742 * @svms: the svm range list
1743 * @mm: the mm structure
1745 * Context: Returns with mmap write lock held, pending deferred work flushed
1749 svm_range_list_lock_and_flush_work(struct svm_range_list *svms,
1750 struct mm_struct *mm)
1753 flush_work(&svms->deferred_list_work);
1754 mmap_write_lock(mm);
1756 if (list_empty(&svms->deferred_range_list))
1758 mmap_write_unlock(mm);
1759 pr_debug("retry flush\n");
1760 goto retry_flush_work;
1763 static void svm_range_restore_work(struct work_struct *work)
1765 struct delayed_work *dwork = to_delayed_work(work);
1766 struct amdkfd_process_info *process_info;
1767 struct svm_range_list *svms;
1768 struct svm_range *prange;
1769 struct kfd_process *p;
1770 struct mm_struct *mm;
1775 svms = container_of(dwork, struct svm_range_list, restore_work);
1776 evicted_ranges = atomic_read(&svms->evicted_ranges);
1777 if (!evicted_ranges)
1780 pr_debug("restore svm ranges\n");
1782 p = container_of(svms, struct kfd_process, svms);
1783 process_info = p->kgd_process_info;
1785 /* Keep mm reference when svm_range_validate_and_map ranges */
1786 mm = get_task_mm(p->lead_thread);
1788 pr_debug("svms 0x%p process mm gone\n", svms);
1792 mutex_lock(&process_info->lock);
1793 svm_range_list_lock_and_flush_work(svms, mm);
1794 mutex_lock(&svms->lock);
1796 evicted_ranges = atomic_read(&svms->evicted_ranges);
1798 list_for_each_entry(prange, &svms->list, list) {
1799 invalid = atomic_read(&prange->invalid);
1803 pr_debug("restoring svms 0x%p prange 0x%p [0x%lx %lx] inv %d\n",
1804 prange->svms, prange, prange->start, prange->last,
1808 * If range is migrating, wait for migration is done.
1810 mutex_lock(&prange->migrate_mutex);
1812 r = svm_range_validate_and_map(mm, prange, MAX_GPU_INSTANCE,
1813 false, true, false);
1815 pr_debug("failed %d to map 0x%lx to gpus\n", r,
1818 mutex_unlock(&prange->migrate_mutex);
1820 goto out_reschedule;
1822 if (atomic_cmpxchg(&prange->invalid, invalid, 0) != invalid)
1823 goto out_reschedule;
1826 if (atomic_cmpxchg(&svms->evicted_ranges, evicted_ranges, 0) !=
1828 goto out_reschedule;
1832 r = kgd2kfd_resume_mm(mm);
1834 /* No recovery from this failure. Probably the CP is
1835 * hanging. No point trying again.
1837 pr_debug("failed %d to resume KFD\n", r);
1840 pr_debug("restore svm ranges successfully\n");
1843 mutex_unlock(&svms->lock);
1844 mmap_write_unlock(mm);
1845 mutex_unlock(&process_info->lock);
1847 /* If validation failed, reschedule another attempt */
1848 if (evicted_ranges) {
1849 pr_debug("reschedule to restore svm range\n");
1850 schedule_delayed_work(&svms->restore_work,
1851 msecs_to_jiffies(AMDGPU_SVM_RANGE_RESTORE_DELAY_MS));
1853 kfd_smi_event_queue_restore_rescheduled(mm);
1859 * svm_range_evict - evict svm range
1860 * @prange: svm range structure
1861 * @mm: current process mm_struct
1862 * @start: starting process queue number
1863 * @last: last process queue number
1864 * @event: mmu notifier event when range is evicted or migrated
1866 * Stop all queues of the process to ensure GPU doesn't access the memory, then
1867 * return to let CPU evict the buffer and proceed CPU pagetable update.
1869 * Don't need use lock to sync cpu pagetable invalidation with GPU execution.
1870 * If invalidation happens while restore work is running, restore work will
1871 * restart to ensure to get the latest CPU pages mapping to GPU, then start
1875 svm_range_evict(struct svm_range *prange, struct mm_struct *mm,
1876 unsigned long start, unsigned long last,
1877 enum mmu_notifier_event event)
1879 struct svm_range_list *svms = prange->svms;
1880 struct svm_range *pchild;
1881 struct kfd_process *p;
1884 p = container_of(svms, struct kfd_process, svms);
1886 pr_debug("invalidate svms 0x%p prange [0x%lx 0x%lx] [0x%lx 0x%lx]\n",
1887 svms, prange->start, prange->last, start, last);
1889 if (!p->xnack_enabled ||
1890 (prange->flags & KFD_IOCTL_SVM_FLAG_GPU_ALWAYS_MAPPED)) {
1892 bool mapped = prange->mapped_to_gpu;
1894 list_for_each_entry(pchild, &prange->child_list, child_list) {
1895 if (!pchild->mapped_to_gpu)
1898 mutex_lock_nested(&pchild->lock, 1);
1899 if (pchild->start <= last && pchild->last >= start) {
1900 pr_debug("increment pchild invalid [0x%lx 0x%lx]\n",
1901 pchild->start, pchild->last);
1902 atomic_inc(&pchild->invalid);
1904 mutex_unlock(&pchild->lock);
1910 if (prange->start <= last && prange->last >= start)
1911 atomic_inc(&prange->invalid);
1913 evicted_ranges = atomic_inc_return(&svms->evicted_ranges);
1914 if (evicted_ranges != 1)
1917 pr_debug("evicting svms 0x%p range [0x%lx 0x%lx]\n",
1918 prange->svms, prange->start, prange->last);
1920 /* First eviction, stop the queues */
1921 r = kgd2kfd_quiesce_mm(mm, KFD_QUEUE_EVICTION_TRIGGER_SVM);
1923 pr_debug("failed to quiesce KFD\n");
1925 pr_debug("schedule to restore svm %p ranges\n", svms);
1926 schedule_delayed_work(&svms->restore_work,
1927 msecs_to_jiffies(AMDGPU_SVM_RANGE_RESTORE_DELAY_MS));
1932 if (event == MMU_NOTIFY_MIGRATE)
1933 trigger = KFD_SVM_UNMAP_TRIGGER_MMU_NOTIFY_MIGRATE;
1935 trigger = KFD_SVM_UNMAP_TRIGGER_MMU_NOTIFY;
1937 pr_debug("invalidate unmap svms 0x%p [0x%lx 0x%lx] from GPUs\n",
1938 prange->svms, start, last);
1939 list_for_each_entry(pchild, &prange->child_list, child_list) {
1940 mutex_lock_nested(&pchild->lock, 1);
1941 s = max(start, pchild->start);
1942 l = min(last, pchild->last);
1944 svm_range_unmap_from_gpus(pchild, s, l, trigger);
1945 mutex_unlock(&pchild->lock);
1947 s = max(start, prange->start);
1948 l = min(last, prange->last);
1950 svm_range_unmap_from_gpus(prange, s, l, trigger);
1956 static struct svm_range *svm_range_clone(struct svm_range *old)
1958 struct svm_range *new;
1960 new = svm_range_new(old->svms, old->start, old->last, false);
1963 if (svm_range_copy_dma_addrs(new, old)) {
1964 svm_range_free(new, false);
1968 new->ttm_res = old->ttm_res;
1969 new->offset = old->offset;
1970 new->svm_bo = svm_range_bo_ref(old->svm_bo);
1971 spin_lock(&new->svm_bo->list_lock);
1972 list_add(&new->svm_bo_list, &new->svm_bo->range_list);
1973 spin_unlock(&new->svm_bo->list_lock);
1975 new->flags = old->flags;
1976 new->preferred_loc = old->preferred_loc;
1977 new->prefetch_loc = old->prefetch_loc;
1978 new->actual_loc = old->actual_loc;
1979 new->granularity = old->granularity;
1980 new->mapped_to_gpu = old->mapped_to_gpu;
1981 bitmap_copy(new->bitmap_access, old->bitmap_access, MAX_GPU_INSTANCE);
1982 bitmap_copy(new->bitmap_aip, old->bitmap_aip, MAX_GPU_INSTANCE);
1987 void svm_range_set_max_pages(struct amdgpu_device *adev)
1990 uint64_t pages, _pages;
1991 uint64_t min_pages = 0;
1994 for (i = 0; i < adev->kfd.dev->num_nodes; i++) {
1995 if (adev->kfd.dev->nodes[i]->xcp)
1996 id = adev->kfd.dev->nodes[i]->xcp->id;
1999 pages = KFD_XCP_MEMORY_SIZE(adev, id) >> 17;
2000 pages = clamp(pages, 1ULL << 9, 1ULL << 18);
2001 pages = rounddown_pow_of_two(pages);
2002 min_pages = min_not_zero(min_pages, pages);
2006 max_pages = READ_ONCE(max_svm_range_pages);
2007 _pages = min_not_zero(max_pages, min_pages);
2008 } while (cmpxchg(&max_svm_range_pages, max_pages, _pages) != max_pages);
2012 svm_range_split_new(struct svm_range_list *svms, uint64_t start, uint64_t last,
2013 uint64_t max_pages, struct list_head *insert_list,
2014 struct list_head *update_list)
2016 struct svm_range *prange;
2019 pr_debug("max_svm_range_pages 0x%llx adding [0x%llx 0x%llx]\n",
2020 max_pages, start, last);
2022 while (last >= start) {
2023 l = min(last, ALIGN_DOWN(start + max_pages, max_pages) - 1);
2025 prange = svm_range_new(svms, start, l, true);
2028 list_add(&prange->list, insert_list);
2029 list_add(&prange->update_list, update_list);
2037 * svm_range_add - add svm range and handle overlap
2038 * @p: the range add to this process svms
2039 * @start: page size aligned
2040 * @size: page size aligned
2041 * @nattr: number of attributes
2042 * @attrs: array of attributes
2043 * @update_list: output, the ranges need validate and update GPU mapping
2044 * @insert_list: output, the ranges need insert to svms
2045 * @remove_list: output, the ranges are replaced and need remove from svms
2047 * Check if the virtual address range has overlap with any existing ranges,
2048 * split partly overlapping ranges and add new ranges in the gaps. All changes
2049 * should be applied to the range_list and interval tree transactionally. If
2050 * any range split or allocation fails, the entire update fails. Therefore any
2051 * existing overlapping svm_ranges are cloned and the original svm_ranges left
2054 * If the transaction succeeds, the caller can update and insert clones and
2055 * new ranges, then free the originals.
2057 * Otherwise the caller can free the clones and new ranges, while the old
2058 * svm_ranges remain unchanged.
2060 * Context: Process context, caller must hold svms->lock
2063 * 0 - OK, otherwise error code
2066 svm_range_add(struct kfd_process *p, uint64_t start, uint64_t size,
2067 uint32_t nattr, struct kfd_ioctl_svm_attribute *attrs,
2068 struct list_head *update_list, struct list_head *insert_list,
2069 struct list_head *remove_list)
2071 unsigned long last = start + size - 1UL;
2072 struct svm_range_list *svms = &p->svms;
2073 struct interval_tree_node *node;
2074 struct svm_range *prange;
2075 struct svm_range *tmp;
2076 struct list_head new_list;
2079 pr_debug("svms 0x%p [0x%llx 0x%lx]\n", &p->svms, start, last);
2081 INIT_LIST_HEAD(update_list);
2082 INIT_LIST_HEAD(insert_list);
2083 INIT_LIST_HEAD(remove_list);
2084 INIT_LIST_HEAD(&new_list);
2086 node = interval_tree_iter_first(&svms->objects, start, last);
2088 struct interval_tree_node *next;
2089 unsigned long next_start;
2091 pr_debug("found overlap node [0x%lx 0x%lx]\n", node->start,
2094 prange = container_of(node, struct svm_range, it_node);
2095 next = interval_tree_iter_next(node, start, last);
2096 next_start = min(node->last, last) + 1;
2098 if (svm_range_is_same_attrs(p, prange, nattr, attrs)) {
2100 } else if (node->start < start || node->last > last) {
2101 /* node intersects the update range and its attributes
2102 * will change. Clone and split it, apply updates only
2103 * to the overlapping part
2105 struct svm_range *old = prange;
2107 prange = svm_range_clone(old);
2113 list_add(&old->update_list, remove_list);
2114 list_add(&prange->list, insert_list);
2115 list_add(&prange->update_list, update_list);
2117 if (node->start < start) {
2118 pr_debug("change old range start\n");
2119 r = svm_range_split_head(prange, start,
2124 if (node->last > last) {
2125 pr_debug("change old range last\n");
2126 r = svm_range_split_tail(prange, last,
2132 /* The node is contained within start..last,
2135 list_add(&prange->update_list, update_list);
2138 /* insert a new node if needed */
2139 if (node->start > start) {
2140 r = svm_range_split_new(svms, start, node->start - 1,
2141 READ_ONCE(max_svm_range_pages),
2142 &new_list, update_list);
2151 /* add a final range at the end if needed */
2153 r = svm_range_split_new(svms, start, last,
2154 READ_ONCE(max_svm_range_pages),
2155 &new_list, update_list);
2159 list_for_each_entry_safe(prange, tmp, insert_list, list)
2160 svm_range_free(prange, false);
2161 list_for_each_entry_safe(prange, tmp, &new_list, list)
2162 svm_range_free(prange, true);
2164 list_splice(&new_list, insert_list);
2171 svm_range_update_notifier_and_interval_tree(struct mm_struct *mm,
2172 struct svm_range *prange)
2174 unsigned long start;
2177 start = prange->notifier.interval_tree.start >> PAGE_SHIFT;
2178 last = prange->notifier.interval_tree.last >> PAGE_SHIFT;
2180 if (prange->start == start && prange->last == last)
2183 pr_debug("up notifier 0x%p prange 0x%p [0x%lx 0x%lx] [0x%lx 0x%lx]\n",
2184 prange->svms, prange, start, last, prange->start,
2187 if (start != 0 && last != 0) {
2188 interval_tree_remove(&prange->it_node, &prange->svms->objects);
2189 svm_range_remove_notifier(prange);
2191 prange->it_node.start = prange->start;
2192 prange->it_node.last = prange->last;
2194 interval_tree_insert(&prange->it_node, &prange->svms->objects);
2195 svm_range_add_notifier_locked(mm, prange);
2199 svm_range_handle_list_op(struct svm_range_list *svms, struct svm_range *prange,
2200 struct mm_struct *mm)
2202 switch (prange->work_item.op) {
2204 pr_debug("NULL OP 0x%p prange 0x%p [0x%lx 0x%lx]\n",
2205 svms, prange, prange->start, prange->last);
2207 case SVM_OP_UNMAP_RANGE:
2208 pr_debug("remove 0x%p prange 0x%p [0x%lx 0x%lx]\n",
2209 svms, prange, prange->start, prange->last);
2210 svm_range_unlink(prange);
2211 svm_range_remove_notifier(prange);
2212 svm_range_free(prange, true);
2214 case SVM_OP_UPDATE_RANGE_NOTIFIER:
2215 pr_debug("update notifier 0x%p prange 0x%p [0x%lx 0x%lx]\n",
2216 svms, prange, prange->start, prange->last);
2217 svm_range_update_notifier_and_interval_tree(mm, prange);
2219 case SVM_OP_UPDATE_RANGE_NOTIFIER_AND_MAP:
2220 pr_debug("update and map 0x%p prange 0x%p [0x%lx 0x%lx]\n",
2221 svms, prange, prange->start, prange->last);
2222 svm_range_update_notifier_and_interval_tree(mm, prange);
2223 /* TODO: implement deferred validation and mapping */
2225 case SVM_OP_ADD_RANGE:
2226 pr_debug("add 0x%p prange 0x%p [0x%lx 0x%lx]\n", svms, prange,
2227 prange->start, prange->last);
2228 svm_range_add_to_svms(prange);
2229 svm_range_add_notifier_locked(mm, prange);
2231 case SVM_OP_ADD_RANGE_AND_MAP:
2232 pr_debug("add and map 0x%p prange 0x%p [0x%lx 0x%lx]\n", svms,
2233 prange, prange->start, prange->last);
2234 svm_range_add_to_svms(prange);
2235 svm_range_add_notifier_locked(mm, prange);
2236 /* TODO: implement deferred validation and mapping */
2239 WARN_ONCE(1, "Unknown prange 0x%p work op %d\n", prange,
2240 prange->work_item.op);
2244 static void svm_range_drain_retry_fault(struct svm_range_list *svms)
2246 struct kfd_process_device *pdd;
2247 struct kfd_process *p;
2251 p = container_of(svms, struct kfd_process, svms);
2254 drain = atomic_read(&svms->drain_pagefaults);
2258 for_each_set_bit(i, svms->bitmap_supported, p->n_pdds) {
2263 pr_debug("drain retry fault gpu %d svms %p\n", i, svms);
2265 amdgpu_ih_wait_on_checkpoint_process_ts(pdd->dev->adev,
2266 pdd->dev->adev->irq.retry_cam_enabled ?
2267 &pdd->dev->adev->irq.ih :
2268 &pdd->dev->adev->irq.ih1);
2270 if (pdd->dev->adev->irq.retry_cam_enabled)
2271 amdgpu_ih_wait_on_checkpoint_process_ts(pdd->dev->adev,
2272 &pdd->dev->adev->irq.ih_soft);
2275 pr_debug("drain retry fault gpu %d svms 0x%p done\n", i, svms);
2277 if (atomic_cmpxchg(&svms->drain_pagefaults, drain, 0) != drain)
2281 static void svm_range_deferred_list_work(struct work_struct *work)
2283 struct svm_range_list *svms;
2284 struct svm_range *prange;
2285 struct mm_struct *mm;
2287 svms = container_of(work, struct svm_range_list, deferred_list_work);
2288 pr_debug("enter svms 0x%p\n", svms);
2290 spin_lock(&svms->deferred_list_lock);
2291 while (!list_empty(&svms->deferred_range_list)) {
2292 prange = list_first_entry(&svms->deferred_range_list,
2293 struct svm_range, deferred_list);
2294 spin_unlock(&svms->deferred_list_lock);
2296 pr_debug("prange 0x%p [0x%lx 0x%lx] op %d\n", prange,
2297 prange->start, prange->last, prange->work_item.op);
2299 mm = prange->work_item.mm;
2301 mmap_write_lock(mm);
2303 /* Checking for the need to drain retry faults must be inside
2304 * mmap write lock to serialize with munmap notifiers.
2306 if (unlikely(atomic_read(&svms->drain_pagefaults))) {
2307 mmap_write_unlock(mm);
2308 svm_range_drain_retry_fault(svms);
2312 /* Remove from deferred_list must be inside mmap write lock, for
2314 * 1. unmap_from_cpu may change work_item.op and add the range
2315 * to deferred_list again, cause use after free bug.
2316 * 2. svm_range_list_lock_and_flush_work may hold mmap write
2317 * lock and continue because deferred_list is empty, but
2318 * deferred_list work is actually waiting for mmap lock.
2320 spin_lock(&svms->deferred_list_lock);
2321 list_del_init(&prange->deferred_list);
2322 spin_unlock(&svms->deferred_list_lock);
2324 mutex_lock(&svms->lock);
2325 mutex_lock(&prange->migrate_mutex);
2326 while (!list_empty(&prange->child_list)) {
2327 struct svm_range *pchild;
2329 pchild = list_first_entry(&prange->child_list,
2330 struct svm_range, child_list);
2331 pr_debug("child prange 0x%p op %d\n", pchild,
2332 pchild->work_item.op);
2333 list_del_init(&pchild->child_list);
2334 svm_range_handle_list_op(svms, pchild, mm);
2336 mutex_unlock(&prange->migrate_mutex);
2338 svm_range_handle_list_op(svms, prange, mm);
2339 mutex_unlock(&svms->lock);
2340 mmap_write_unlock(mm);
2342 /* Pairs with mmget in svm_range_add_list_work */
2345 spin_lock(&svms->deferred_list_lock);
2347 spin_unlock(&svms->deferred_list_lock);
2348 pr_debug("exit svms 0x%p\n", svms);
2352 svm_range_add_list_work(struct svm_range_list *svms, struct svm_range *prange,
2353 struct mm_struct *mm, enum svm_work_list_ops op)
2355 spin_lock(&svms->deferred_list_lock);
2356 /* if prange is on the deferred list */
2357 if (!list_empty(&prange->deferred_list)) {
2358 pr_debug("update exist prange 0x%p work op %d\n", prange, op);
2359 WARN_ONCE(prange->work_item.mm != mm, "unmatch mm\n");
2360 if (op != SVM_OP_NULL &&
2361 prange->work_item.op != SVM_OP_UNMAP_RANGE)
2362 prange->work_item.op = op;
2364 prange->work_item.op = op;
2366 /* Pairs with mmput in deferred_list_work */
2368 prange->work_item.mm = mm;
2369 list_add_tail(&prange->deferred_list,
2370 &prange->svms->deferred_range_list);
2371 pr_debug("add prange 0x%p [0x%lx 0x%lx] to work list op %d\n",
2372 prange, prange->start, prange->last, op);
2374 spin_unlock(&svms->deferred_list_lock);
2377 void schedule_deferred_list_work(struct svm_range_list *svms)
2379 spin_lock(&svms->deferred_list_lock);
2380 if (!list_empty(&svms->deferred_range_list))
2381 schedule_work(&svms->deferred_list_work);
2382 spin_unlock(&svms->deferred_list_lock);
2386 svm_range_unmap_split(struct mm_struct *mm, struct svm_range *parent,
2387 struct svm_range *prange, unsigned long start,
2390 struct svm_range *head;
2391 struct svm_range *tail;
2393 if (prange->work_item.op == SVM_OP_UNMAP_RANGE) {
2394 pr_debug("prange 0x%p [0x%lx 0x%lx] is already freed\n", prange,
2395 prange->start, prange->last);
2398 if (start > prange->last || last < prange->start)
2401 head = tail = prange;
2402 if (start > prange->start)
2403 svm_range_split(prange, prange->start, start - 1, &tail);
2404 if (last < tail->last)
2405 svm_range_split(tail, last + 1, tail->last, &head);
2407 if (head != prange && tail != prange) {
2408 svm_range_add_child(parent, mm, head, SVM_OP_UNMAP_RANGE);
2409 svm_range_add_child(parent, mm, tail, SVM_OP_ADD_RANGE);
2410 } else if (tail != prange) {
2411 svm_range_add_child(parent, mm, tail, SVM_OP_UNMAP_RANGE);
2412 } else if (head != prange) {
2413 svm_range_add_child(parent, mm, head, SVM_OP_UNMAP_RANGE);
2414 } else if (parent != prange) {
2415 prange->work_item.op = SVM_OP_UNMAP_RANGE;
2420 svm_range_unmap_from_cpu(struct mm_struct *mm, struct svm_range *prange,
2421 unsigned long start, unsigned long last)
2423 uint32_t trigger = KFD_SVM_UNMAP_TRIGGER_UNMAP_FROM_CPU;
2424 struct svm_range_list *svms;
2425 struct svm_range *pchild;
2426 struct kfd_process *p;
2430 p = kfd_lookup_process_by_mm(mm);
2435 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx] [0x%lx 0x%lx]\n", svms,
2436 prange, prange->start, prange->last, start, last);
2438 /* Make sure pending page faults are drained in the deferred worker
2439 * before the range is freed to avoid straggler interrupts on
2440 * unmapped memory causing "phantom faults".
2442 atomic_inc(&svms->drain_pagefaults);
2444 unmap_parent = start <= prange->start && last >= prange->last;
2446 list_for_each_entry(pchild, &prange->child_list, child_list) {
2447 mutex_lock_nested(&pchild->lock, 1);
2448 s = max(start, pchild->start);
2449 l = min(last, pchild->last);
2451 svm_range_unmap_from_gpus(pchild, s, l, trigger);
2452 svm_range_unmap_split(mm, prange, pchild, start, last);
2453 mutex_unlock(&pchild->lock);
2455 s = max(start, prange->start);
2456 l = min(last, prange->last);
2458 svm_range_unmap_from_gpus(prange, s, l, trigger);
2459 svm_range_unmap_split(mm, prange, prange, start, last);
2462 svm_range_add_list_work(svms, prange, mm, SVM_OP_UNMAP_RANGE);
2464 svm_range_add_list_work(svms, prange, mm,
2465 SVM_OP_UPDATE_RANGE_NOTIFIER);
2466 schedule_deferred_list_work(svms);
2468 kfd_unref_process(p);
2472 * svm_range_cpu_invalidate_pagetables - interval notifier callback
2473 * @mni: mmu_interval_notifier struct
2474 * @range: mmu_notifier_range struct
2475 * @cur_seq: value to pass to mmu_interval_set_seq()
2477 * If event is MMU_NOTIFY_UNMAP, this is from CPU unmap range, otherwise, it
2478 * is from migration, or CPU page invalidation callback.
2480 * For unmap event, unmap range from GPUs, remove prange from svms in a delayed
2481 * work thread, and split prange if only part of prange is unmapped.
2483 * For invalidation event, if GPU retry fault is not enabled, evict the queues,
2484 * then schedule svm_range_restore_work to update GPU mapping and resume queues.
2485 * If GPU retry fault is enabled, unmap the svm range from GPU, retry fault will
2486 * update GPU mapping to recover.
2488 * Context: mmap lock, notifier_invalidate_start lock are held
2489 * for invalidate event, prange lock is held if this is from migration
2492 svm_range_cpu_invalidate_pagetables(struct mmu_interval_notifier *mni,
2493 const struct mmu_notifier_range *range,
2494 unsigned long cur_seq)
2496 struct svm_range *prange;
2497 unsigned long start;
2500 if (range->event == MMU_NOTIFY_RELEASE)
2502 if (!mmget_not_zero(mni->mm))
2505 start = mni->interval_tree.start;
2506 last = mni->interval_tree.last;
2507 start = max(start, range->start) >> PAGE_SHIFT;
2508 last = min(last, range->end - 1) >> PAGE_SHIFT;
2509 pr_debug("[0x%lx 0x%lx] range[0x%lx 0x%lx] notifier[0x%lx 0x%lx] %d\n",
2510 start, last, range->start >> PAGE_SHIFT,
2511 (range->end - 1) >> PAGE_SHIFT,
2512 mni->interval_tree.start >> PAGE_SHIFT,
2513 mni->interval_tree.last >> PAGE_SHIFT, range->event);
2515 prange = container_of(mni, struct svm_range, notifier);
2517 svm_range_lock(prange);
2518 mmu_interval_set_seq(mni, cur_seq);
2520 switch (range->event) {
2521 case MMU_NOTIFY_UNMAP:
2522 svm_range_unmap_from_cpu(mni->mm, prange, start, last);
2525 svm_range_evict(prange, mni->mm, start, last, range->event);
2529 svm_range_unlock(prange);
2536 * svm_range_from_addr - find svm range from fault address
2537 * @svms: svm range list header
2538 * @addr: address to search range interval tree, in pages
2539 * @parent: parent range if range is on child list
2541 * Context: The caller must hold svms->lock
2543 * Return: the svm_range found or NULL
2546 svm_range_from_addr(struct svm_range_list *svms, unsigned long addr,
2547 struct svm_range **parent)
2549 struct interval_tree_node *node;
2550 struct svm_range *prange;
2551 struct svm_range *pchild;
2553 node = interval_tree_iter_first(&svms->objects, addr, addr);
2557 prange = container_of(node, struct svm_range, it_node);
2558 pr_debug("address 0x%lx prange [0x%lx 0x%lx] node [0x%lx 0x%lx]\n",
2559 addr, prange->start, prange->last, node->start, node->last);
2561 if (addr >= prange->start && addr <= prange->last) {
2566 list_for_each_entry(pchild, &prange->child_list, child_list)
2567 if (addr >= pchild->start && addr <= pchild->last) {
2568 pr_debug("found address 0x%lx pchild [0x%lx 0x%lx]\n",
2569 addr, pchild->start, pchild->last);
2578 /* svm_range_best_restore_location - decide the best fault restore location
2579 * @prange: svm range structure
2580 * @adev: the GPU on which vm fault happened
2582 * This is only called when xnack is on, to decide the best location to restore
2583 * the range mapping after GPU vm fault. Caller uses the best location to do
2584 * migration if actual loc is not best location, then update GPU page table
2585 * mapping to the best location.
2587 * If the preferred loc is accessible by faulting GPU, use preferred loc.
2588 * If vm fault gpu idx is on range ACCESSIBLE bitmap, best_loc is vm fault gpu
2589 * If vm fault gpu idx is on range ACCESSIBLE_IN_PLACE bitmap, then
2590 * if range actual loc is cpu, best_loc is cpu
2591 * if vm fault gpu is on xgmi same hive of range actual loc gpu, best_loc is
2593 * Otherwise, GPU no access, best_loc is -1.
2596 * -1 means vm fault GPU no access
2597 * 0 for CPU or GPU id
2600 svm_range_best_restore_location(struct svm_range *prange,
2601 struct kfd_node *node,
2604 struct kfd_node *bo_node, *preferred_node;
2605 struct kfd_process *p;
2609 p = container_of(prange->svms, struct kfd_process, svms);
2611 r = kfd_process_gpuid_from_node(p, node, &gpuid, gpuidx);
2613 pr_debug("failed to get gpuid from kgd\n");
2617 if (node->adev->gmc.is_app_apu)
2620 if (prange->preferred_loc == gpuid ||
2621 prange->preferred_loc == KFD_IOCTL_SVM_LOCATION_SYSMEM) {
2622 return prange->preferred_loc;
2623 } else if (prange->preferred_loc != KFD_IOCTL_SVM_LOCATION_UNDEFINED) {
2624 preferred_node = svm_range_get_node_by_id(prange, prange->preferred_loc);
2625 if (preferred_node && svm_nodes_in_same_hive(node, preferred_node))
2626 return prange->preferred_loc;
2630 if (test_bit(*gpuidx, prange->bitmap_access))
2633 if (test_bit(*gpuidx, prange->bitmap_aip)) {
2634 if (!prange->actual_loc)
2637 bo_node = svm_range_get_node_by_id(prange, prange->actual_loc);
2638 if (bo_node && svm_nodes_in_same_hive(node, bo_node))
2639 return prange->actual_loc;
2648 svm_range_get_range_boundaries(struct kfd_process *p, int64_t addr,
2649 unsigned long *start, unsigned long *last,
2650 bool *is_heap_stack)
2652 struct vm_area_struct *vma;
2653 struct interval_tree_node *node;
2654 unsigned long start_limit, end_limit;
2656 vma = vma_lookup(p->mm, addr << PAGE_SHIFT);
2658 pr_debug("VMA does not exist in address [0x%llx]\n", addr);
2662 *is_heap_stack = vma_is_initial_heap(vma) || vma_is_initial_stack(vma);
2664 start_limit = max(vma->vm_start >> PAGE_SHIFT,
2665 (unsigned long)ALIGN_DOWN(addr, 2UL << 8));
2666 end_limit = min(vma->vm_end >> PAGE_SHIFT,
2667 (unsigned long)ALIGN(addr + 1, 2UL << 8));
2668 /* First range that starts after the fault address */
2669 node = interval_tree_iter_first(&p->svms.objects, addr + 1, ULONG_MAX);
2671 end_limit = min(end_limit, node->start);
2672 /* Last range that ends before the fault address */
2673 node = container_of(rb_prev(&node->rb),
2674 struct interval_tree_node, rb);
2676 /* Last range must end before addr because
2677 * there was no range after addr
2679 node = container_of(rb_last(&p->svms.objects.rb_root),
2680 struct interval_tree_node, rb);
2683 if (node->last >= addr) {
2684 WARN(1, "Overlap with prev node and page fault addr\n");
2687 start_limit = max(start_limit, node->last + 1);
2690 *start = start_limit;
2691 *last = end_limit - 1;
2693 pr_debug("vma [0x%lx 0x%lx] range [0x%lx 0x%lx] is_heap_stack %d\n",
2694 vma->vm_start >> PAGE_SHIFT, vma->vm_end >> PAGE_SHIFT,
2695 *start, *last, *is_heap_stack);
2701 svm_range_check_vm_userptr(struct kfd_process *p, uint64_t start, uint64_t last,
2702 uint64_t *bo_s, uint64_t *bo_l)
2704 struct amdgpu_bo_va_mapping *mapping;
2705 struct interval_tree_node *node;
2706 struct amdgpu_bo *bo = NULL;
2707 unsigned long userptr;
2711 for (i = 0; i < p->n_pdds; i++) {
2712 struct amdgpu_vm *vm;
2714 if (!p->pdds[i]->drm_priv)
2717 vm = drm_priv_to_vm(p->pdds[i]->drm_priv);
2718 r = amdgpu_bo_reserve(vm->root.bo, false);
2722 /* Check userptr by searching entire vm->va interval tree */
2723 node = interval_tree_iter_first(&vm->va, 0, ~0ULL);
2725 mapping = container_of((struct rb_node *)node,
2726 struct amdgpu_bo_va_mapping, rb);
2727 bo = mapping->bo_va->base.bo;
2729 if (!amdgpu_ttm_tt_affect_userptr(bo->tbo.ttm,
2730 start << PAGE_SHIFT,
2733 node = interval_tree_iter_next(node, 0, ~0ULL);
2737 pr_debug("[0x%llx 0x%llx] already userptr mapped\n",
2740 *bo_s = userptr >> PAGE_SHIFT;
2741 *bo_l = *bo_s + bo->tbo.ttm->num_pages - 1;
2743 amdgpu_bo_unreserve(vm->root.bo);
2746 amdgpu_bo_unreserve(vm->root.bo);
2752 svm_range *svm_range_create_unregistered_range(struct kfd_node *node,
2753 struct kfd_process *p,
2754 struct mm_struct *mm,
2757 struct svm_range *prange = NULL;
2758 unsigned long start, last;
2759 uint32_t gpuid, gpuidx;
2765 if (svm_range_get_range_boundaries(p, addr, &start, &last,
2769 r = svm_range_check_vm(p, start, last, &bo_s, &bo_l);
2770 if (r != -EADDRINUSE)
2771 r = svm_range_check_vm_userptr(p, start, last, &bo_s, &bo_l);
2773 if (r == -EADDRINUSE) {
2774 if (addr >= bo_s && addr <= bo_l)
2777 /* Create one page svm range if 2MB range overlapping */
2782 prange = svm_range_new(&p->svms, start, last, true);
2784 pr_debug("Failed to create prange in address [0x%llx]\n", addr);
2787 if (kfd_process_gpuid_from_node(p, node, &gpuid, &gpuidx)) {
2788 pr_debug("failed to get gpuid from kgd\n");
2789 svm_range_free(prange, true);
2794 prange->preferred_loc = KFD_IOCTL_SVM_LOCATION_SYSMEM;
2796 svm_range_add_to_svms(prange);
2797 svm_range_add_notifier_locked(mm, prange);
2802 /* svm_range_skip_recover - decide if prange can be recovered
2803 * @prange: svm range structure
2805 * GPU vm retry fault handle skip recover the range for cases:
2806 * 1. prange is on deferred list to be removed after unmap, it is stale fault,
2807 * deferred list work will drain the stale fault before free the prange.
2808 * 2. prange is on deferred list to add interval notifier after split, or
2809 * 3. prange is child range, it is split from parent prange, recover later
2810 * after interval notifier is added.
2812 * Return: true to skip recover, false to recover
2814 static bool svm_range_skip_recover(struct svm_range *prange)
2816 struct svm_range_list *svms = prange->svms;
2818 spin_lock(&svms->deferred_list_lock);
2819 if (list_empty(&prange->deferred_list) &&
2820 list_empty(&prange->child_list)) {
2821 spin_unlock(&svms->deferred_list_lock);
2824 spin_unlock(&svms->deferred_list_lock);
2826 if (prange->work_item.op == SVM_OP_UNMAP_RANGE) {
2827 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx] unmapped\n",
2828 svms, prange, prange->start, prange->last);
2831 if (prange->work_item.op == SVM_OP_ADD_RANGE_AND_MAP ||
2832 prange->work_item.op == SVM_OP_ADD_RANGE) {
2833 pr_debug("svms 0x%p prange 0x%p [0x%lx 0x%lx] not added yet\n",
2834 svms, prange, prange->start, prange->last);
2841 svm_range_count_fault(struct kfd_node *node, struct kfd_process *p,
2844 struct kfd_process_device *pdd;
2846 /* fault is on different page of same range
2847 * or fault is skipped to recover later
2848 * or fault is on invalid virtual address
2850 if (gpuidx == MAX_GPU_INSTANCE) {
2854 r = kfd_process_gpuid_from_node(p, node, &gpuid, &gpuidx);
2859 /* fault is recovered
2860 * or fault cannot recover because GPU no access on the range
2862 pdd = kfd_process_device_from_gpuidx(p, gpuidx);
2864 WRITE_ONCE(pdd->faults, pdd->faults + 1);
2868 svm_fault_allowed(struct vm_area_struct *vma, bool write_fault)
2870 unsigned long requested = VM_READ;
2873 requested |= VM_WRITE;
2875 pr_debug("requested 0x%lx, vma permission flags 0x%lx\n", requested,
2877 return (vma->vm_flags & requested) == requested;
2881 svm_range_restore_pages(struct amdgpu_device *adev, unsigned int pasid,
2882 uint32_t vmid, uint32_t node_id,
2883 uint64_t addr, bool write_fault)
2885 struct mm_struct *mm = NULL;
2886 struct svm_range_list *svms;
2887 struct svm_range *prange;
2888 struct kfd_process *p;
2889 ktime_t timestamp = ktime_get_boottime();
2890 struct kfd_node *node;
2892 int32_t gpuidx = MAX_GPU_INSTANCE;
2893 bool write_locked = false;
2894 struct vm_area_struct *vma;
2895 bool migration = false;
2898 if (!KFD_IS_SVM_API_SUPPORTED(adev)) {
2899 pr_debug("device does not support SVM\n");
2903 p = kfd_lookup_process_by_pasid(pasid);
2905 pr_debug("kfd process not founded pasid 0x%x\n", pasid);
2910 pr_debug("restoring svms 0x%p fault address 0x%llx\n", svms, addr);
2912 if (atomic_read(&svms->drain_pagefaults)) {
2913 pr_debug("draining retry fault, drop fault 0x%llx\n", addr);
2918 if (!p->xnack_enabled) {
2919 pr_debug("XNACK not enabled for pasid 0x%x\n", pasid);
2924 /* p->lead_thread is available as kfd_process_wq_release flush the work
2925 * before releasing task ref.
2927 mm = get_task_mm(p->lead_thread);
2929 pr_debug("svms 0x%p failed to get mm\n", svms);
2934 node = kfd_node_by_irq_ids(adev, node_id, vmid);
2936 pr_debug("kfd node does not exist node_id: %d, vmid: %d\n", node_id,
2943 mutex_lock(&svms->lock);
2944 prange = svm_range_from_addr(svms, addr, NULL);
2946 pr_debug("failed to find prange svms 0x%p address [0x%llx]\n",
2948 if (!write_locked) {
2949 /* Need the write lock to create new range with MMU notifier.
2950 * Also flush pending deferred work to make sure the interval
2951 * tree is up to date before we add a new range
2953 mutex_unlock(&svms->lock);
2954 mmap_read_unlock(mm);
2955 mmap_write_lock(mm);
2956 write_locked = true;
2957 goto retry_write_locked;
2959 prange = svm_range_create_unregistered_range(node, p, mm, addr);
2961 pr_debug("failed to create unregistered range svms 0x%p address [0x%llx]\n",
2963 mmap_write_downgrade(mm);
2965 goto out_unlock_svms;
2969 mmap_write_downgrade(mm);
2971 mutex_lock(&prange->migrate_mutex);
2973 if (svm_range_skip_recover(prange)) {
2974 amdgpu_gmc_filter_faults_remove(node->adev, addr, pasid);
2976 goto out_unlock_range;
2979 /* skip duplicate vm fault on different pages of same range */
2980 if (ktime_before(timestamp, ktime_add_ns(prange->validate_timestamp,
2981 AMDGPU_SVM_RANGE_RETRY_FAULT_PENDING))) {
2982 pr_debug("svms 0x%p [0x%lx %lx] already restored\n",
2983 svms, prange->start, prange->last);
2985 goto out_unlock_range;
2988 /* __do_munmap removed VMA, return success as we are handling stale
2991 vma = vma_lookup(mm, addr << PAGE_SHIFT);
2993 pr_debug("address 0x%llx VMA is removed\n", addr);
2995 goto out_unlock_range;
2998 if (!svm_fault_allowed(vma, write_fault)) {
2999 pr_debug("fault addr 0x%llx no %s permission\n", addr,
3000 write_fault ? "write" : "read");
3002 goto out_unlock_range;
3005 best_loc = svm_range_best_restore_location(prange, node, &gpuidx);
3006 if (best_loc == -1) {
3007 pr_debug("svms %p failed get best restore loc [0x%lx 0x%lx]\n",
3008 svms, prange->start, prange->last);
3010 goto out_unlock_range;
3013 pr_debug("svms %p [0x%lx 0x%lx] best restore 0x%x, actual loc 0x%x\n",
3014 svms, prange->start, prange->last, best_loc,
3015 prange->actual_loc);
3017 kfd_smi_event_page_fault_start(node, p->lead_thread->pid, addr,
3018 write_fault, timestamp);
3020 if (prange->actual_loc != best_loc) {
3023 r = svm_migrate_to_vram(prange, best_loc, mm,
3024 KFD_MIGRATE_TRIGGER_PAGEFAULT_GPU);
3026 pr_debug("svm_migrate_to_vram failed (%d) at %llx, falling back to system memory\n",
3028 /* Fallback to system memory if migration to
3031 if (prange->actual_loc)
3032 r = svm_migrate_vram_to_ram(prange, mm,
3033 KFD_MIGRATE_TRIGGER_PAGEFAULT_GPU,
3039 r = svm_migrate_vram_to_ram(prange, mm,
3040 KFD_MIGRATE_TRIGGER_PAGEFAULT_GPU,
3044 pr_debug("failed %d to migrate svms %p [0x%lx 0x%lx]\n",
3045 r, svms, prange->start, prange->last);
3046 goto out_unlock_range;
3050 r = svm_range_validate_and_map(mm, prange, gpuidx, false, false, false);
3052 pr_debug("failed %d to map svms 0x%p [0x%lx 0x%lx] to gpus\n",
3053 r, svms, prange->start, prange->last);
3055 kfd_smi_event_page_fault_end(node, p->lead_thread->pid, addr,
3059 mutex_unlock(&prange->migrate_mutex);
3061 mutex_unlock(&svms->lock);
3062 mmap_read_unlock(mm);
3064 svm_range_count_fault(node, p, gpuidx);
3068 kfd_unref_process(p);
3071 pr_debug("recover vm fault later\n");
3072 amdgpu_gmc_filter_faults_remove(node->adev, addr, pasid);
3079 svm_range_switch_xnack_reserve_mem(struct kfd_process *p, bool xnack_enabled)
3081 struct svm_range *prange, *pchild;
3082 uint64_t reserved_size = 0;
3086 pr_debug("switching xnack from %d to %d\n", p->xnack_enabled, xnack_enabled);
3088 mutex_lock(&p->svms.lock);
3090 list_for_each_entry(prange, &p->svms.list, list) {
3091 svm_range_lock(prange);
3092 list_for_each_entry(pchild, &prange->child_list, child_list) {
3093 size = (pchild->last - pchild->start + 1) << PAGE_SHIFT;
3094 if (xnack_enabled) {
3095 amdgpu_amdkfd_unreserve_mem_limit(NULL, size,
3096 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0);
3098 r = amdgpu_amdkfd_reserve_mem_limit(NULL, size,
3099 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0);
3102 reserved_size += size;
3106 size = (prange->last - prange->start + 1) << PAGE_SHIFT;
3107 if (xnack_enabled) {
3108 amdgpu_amdkfd_unreserve_mem_limit(NULL, size,
3109 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0);
3111 r = amdgpu_amdkfd_reserve_mem_limit(NULL, size,
3112 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0);
3115 reserved_size += size;
3118 svm_range_unlock(prange);
3124 amdgpu_amdkfd_unreserve_mem_limit(NULL, reserved_size,
3125 KFD_IOC_ALLOC_MEM_FLAGS_USERPTR, 0);
3127 /* Change xnack mode must be inside svms lock, to avoid race with
3128 * svm_range_deferred_list_work unreserve memory in parallel.
3130 p->xnack_enabled = xnack_enabled;
3132 mutex_unlock(&p->svms.lock);
3136 void svm_range_list_fini(struct kfd_process *p)
3138 struct svm_range *prange;
3139 struct svm_range *next;
3141 pr_debug("pasid 0x%x svms 0x%p\n", p->pasid, &p->svms);
3143 cancel_delayed_work_sync(&p->svms.restore_work);
3145 /* Ensure list work is finished before process is destroyed */
3146 flush_work(&p->svms.deferred_list_work);
3149 * Ensure no retry fault comes in afterwards, as page fault handler will
3150 * not find kfd process and take mm lock to recover fault.
3152 atomic_inc(&p->svms.drain_pagefaults);
3153 svm_range_drain_retry_fault(&p->svms);
3155 list_for_each_entry_safe(prange, next, &p->svms.list, list) {
3156 svm_range_unlink(prange);
3157 svm_range_remove_notifier(prange);
3158 svm_range_free(prange, true);
3161 mutex_destroy(&p->svms.lock);
3163 pr_debug("pasid 0x%x svms 0x%p done\n", p->pasid, &p->svms);
3166 int svm_range_list_init(struct kfd_process *p)
3168 struct svm_range_list *svms = &p->svms;
3171 svms->objects = RB_ROOT_CACHED;
3172 mutex_init(&svms->lock);
3173 INIT_LIST_HEAD(&svms->list);
3174 atomic_set(&svms->evicted_ranges, 0);
3175 atomic_set(&svms->drain_pagefaults, 0);
3176 INIT_DELAYED_WORK(&svms->restore_work, svm_range_restore_work);
3177 INIT_WORK(&svms->deferred_list_work, svm_range_deferred_list_work);
3178 INIT_LIST_HEAD(&svms->deferred_range_list);
3179 INIT_LIST_HEAD(&svms->criu_svm_metadata_list);
3180 spin_lock_init(&svms->deferred_list_lock);
3182 for (i = 0; i < p->n_pdds; i++)
3183 if (KFD_IS_SVM_API_SUPPORTED(p->pdds[i]->dev->adev))
3184 bitmap_set(svms->bitmap_supported, i, 1);
3190 * svm_range_check_vm - check if virtual address range mapped already
3191 * @p: current kfd_process
3192 * @start: range start address, in pages
3193 * @last: range last address, in pages
3194 * @bo_s: mapping start address in pages if address range already mapped
3195 * @bo_l: mapping last address in pages if address range already mapped
3197 * The purpose is to avoid virtual address ranges already allocated by
3198 * kfd_ioctl_alloc_memory_of_gpu ioctl.
3199 * It looks for each pdd in the kfd_process.
3201 * Context: Process context
3203 * Return 0 - OK, if the range is not mapped.
3204 * Otherwise error code:
3205 * -EADDRINUSE - if address is mapped already by kfd_ioctl_alloc_memory_of_gpu
3206 * -ERESTARTSYS - A wait for the buffer to become unreserved was interrupted by
3207 * a signal. Release all buffer reservations and return to user-space.
3210 svm_range_check_vm(struct kfd_process *p, uint64_t start, uint64_t last,
3211 uint64_t *bo_s, uint64_t *bo_l)
3213 struct amdgpu_bo_va_mapping *mapping;
3214 struct interval_tree_node *node;
3218 for (i = 0; i < p->n_pdds; i++) {
3219 struct amdgpu_vm *vm;
3221 if (!p->pdds[i]->drm_priv)
3224 vm = drm_priv_to_vm(p->pdds[i]->drm_priv);
3225 r = amdgpu_bo_reserve(vm->root.bo, false);
3229 node = interval_tree_iter_first(&vm->va, start, last);
3231 pr_debug("range [0x%llx 0x%llx] already TTM mapped\n",
3233 mapping = container_of((struct rb_node *)node,
3234 struct amdgpu_bo_va_mapping, rb);
3236 *bo_s = mapping->start;
3237 *bo_l = mapping->last;
3239 amdgpu_bo_unreserve(vm->root.bo);
3242 amdgpu_bo_unreserve(vm->root.bo);
3249 * svm_range_is_valid - check if virtual address range is valid
3250 * @p: current kfd_process
3251 * @start: range start address, in pages
3252 * @size: range size, in pages
3254 * Valid virtual address range means it belongs to one or more VMAs
3256 * Context: Process context
3259 * 0 - OK, otherwise error code
3262 svm_range_is_valid(struct kfd_process *p, uint64_t start, uint64_t size)
3264 const unsigned long device_vma = VM_IO | VM_PFNMAP | VM_MIXEDMAP;
3265 struct vm_area_struct *vma;
3267 unsigned long start_unchg = start;
3269 start <<= PAGE_SHIFT;
3270 end = start + (size << PAGE_SHIFT);
3272 vma = vma_lookup(p->mm, start);
3273 if (!vma || (vma->vm_flags & device_vma))
3275 start = min(end, vma->vm_end);
3276 } while (start < end);
3278 return svm_range_check_vm(p, start_unchg, (end - 1) >> PAGE_SHIFT, NULL,
3283 * svm_range_best_prefetch_location - decide the best prefetch location
3284 * @prange: svm range structure
3287 * If range map to single GPU, the best prefetch location is prefetch_loc, which
3288 * can be CPU or GPU.
3290 * If range is ACCESS or ACCESS_IN_PLACE by mGPUs, only if mGPU connection on
3291 * XGMI same hive, the best prefetch location is prefetch_loc GPU, othervise
3292 * the best prefetch location is always CPU, because GPU can not have coherent
3293 * mapping VRAM of other GPUs even with large-BAR PCIe connection.
3296 * If range is not ACCESS_IN_PLACE by mGPUs, the best prefetch location is
3297 * prefetch_loc, other GPU access will generate vm fault and trigger migration.
3299 * If range is ACCESS_IN_PLACE by mGPUs, only if mGPU connection on XGMI same
3300 * hive, the best prefetch location is prefetch_loc GPU, otherwise the best
3301 * prefetch location is always CPU.
3303 * Context: Process context
3306 * 0 for CPU or GPU id
3309 svm_range_best_prefetch_location(struct svm_range *prange)
3311 DECLARE_BITMAP(bitmap, MAX_GPU_INSTANCE);
3312 uint32_t best_loc = prange->prefetch_loc;
3313 struct kfd_process_device *pdd;
3314 struct kfd_node *bo_node;
3315 struct kfd_process *p;
3318 p = container_of(prange->svms, struct kfd_process, svms);
3320 if (!best_loc || best_loc == KFD_IOCTL_SVM_LOCATION_UNDEFINED)
3323 bo_node = svm_range_get_node_by_id(prange, best_loc);
3325 WARN_ONCE(1, "failed to get valid kfd node at id%x\n", best_loc);
3330 if (bo_node->adev->gmc.is_app_apu) {
3335 if (p->xnack_enabled)
3336 bitmap_copy(bitmap, prange->bitmap_aip, MAX_GPU_INSTANCE);
3338 bitmap_or(bitmap, prange->bitmap_access, prange->bitmap_aip,
3341 for_each_set_bit(gpuidx, bitmap, MAX_GPU_INSTANCE) {
3342 pdd = kfd_process_device_from_gpuidx(p, gpuidx);
3344 pr_debug("failed to get device by idx 0x%x\n", gpuidx);
3348 if (pdd->dev->adev == bo_node->adev)
3351 if (!svm_nodes_in_same_hive(pdd->dev, bo_node)) {
3358 pr_debug("xnack %d svms 0x%p [0x%lx 0x%lx] best loc 0x%x\n",
3359 p->xnack_enabled, &p->svms, prange->start, prange->last,
3365 /* svm_range_trigger_migration - start page migration if prefetch loc changed
3366 * @mm: current process mm_struct
3367 * @prange: svm range structure
3368 * @migrated: output, true if migration is triggered
3370 * If range perfetch_loc is GPU, actual loc is cpu 0, then migrate the range
3372 * If range prefetch_loc is cpu 0, actual loc is GPU, then migrate the range
3375 * If GPU vm fault retry is not enabled, migration interact with MMU notifier
3377 * 1. migrate_vma_setup invalidate pages, MMU notifier callback svm_range_evict
3378 * stops all queues, schedule restore work
3379 * 2. svm_range_restore_work wait for migration is done by
3380 * a. svm_range_validate_vram takes prange->migrate_mutex
3381 * b. svm_range_validate_ram HMM get pages wait for CPU fault handle returns
3382 * 3. restore work update mappings of GPU, resume all queues.
3384 * Context: Process context
3387 * 0 - OK, otherwise - error code of migration
3390 svm_range_trigger_migration(struct mm_struct *mm, struct svm_range *prange,
3397 best_loc = svm_range_best_prefetch_location(prange);
3399 if (best_loc == KFD_IOCTL_SVM_LOCATION_UNDEFINED ||
3400 best_loc == prange->actual_loc)
3404 r = svm_migrate_vram_to_ram(prange, mm,
3405 KFD_MIGRATE_TRIGGER_PREFETCH, NULL);
3410 r = svm_migrate_to_vram(prange, best_loc, mm, KFD_MIGRATE_TRIGGER_PREFETCH);
3416 int svm_range_schedule_evict_svm_bo(struct amdgpu_amdkfd_fence *fence)
3421 if (dma_fence_is_signaled(&fence->base))
3424 if (fence->svm_bo) {
3425 WRITE_ONCE(fence->svm_bo->evicting, 1);
3426 schedule_work(&fence->svm_bo->eviction_work);
3432 static void svm_range_evict_svm_bo_worker(struct work_struct *work)
3434 struct svm_range_bo *svm_bo;
3435 struct mm_struct *mm;
3438 svm_bo = container_of(work, struct svm_range_bo, eviction_work);
3439 if (!svm_bo_ref_unless_zero(svm_bo))
3440 return; /* svm_bo was freed while eviction was pending */
3442 if (mmget_not_zero(svm_bo->eviction_fence->mm)) {
3443 mm = svm_bo->eviction_fence->mm;
3445 svm_range_bo_unref(svm_bo);
3450 spin_lock(&svm_bo->list_lock);
3451 while (!list_empty(&svm_bo->range_list) && !r) {
3452 struct svm_range *prange =
3453 list_first_entry(&svm_bo->range_list,
3454 struct svm_range, svm_bo_list);
3457 list_del_init(&prange->svm_bo_list);
3458 spin_unlock(&svm_bo->list_lock);
3460 pr_debug("svms 0x%p [0x%lx 0x%lx]\n", prange->svms,
3461 prange->start, prange->last);
3463 mutex_lock(&prange->migrate_mutex);
3465 r = svm_migrate_vram_to_ram(prange, mm,
3466 KFD_MIGRATE_TRIGGER_TTM_EVICTION, NULL);
3467 } while (!r && prange->actual_loc && --retries);
3469 if (!r && prange->actual_loc)
3470 pr_info_once("Migration failed during eviction");
3472 if (!prange->actual_loc) {
3473 mutex_lock(&prange->lock);
3474 prange->svm_bo = NULL;
3475 mutex_unlock(&prange->lock);
3477 mutex_unlock(&prange->migrate_mutex);
3479 spin_lock(&svm_bo->list_lock);
3481 spin_unlock(&svm_bo->list_lock);
3482 mmap_read_unlock(mm);
3485 dma_fence_signal(&svm_bo->eviction_fence->base);
3487 /* This is the last reference to svm_bo, after svm_range_vram_node_free
3488 * has been called in svm_migrate_vram_to_ram
3490 WARN_ONCE(!r && kref_read(&svm_bo->kref) != 1, "This was not the last reference\n");
3491 svm_range_bo_unref(svm_bo);
3495 svm_range_set_attr(struct kfd_process *p, struct mm_struct *mm,
3496 uint64_t start, uint64_t size, uint32_t nattr,
3497 struct kfd_ioctl_svm_attribute *attrs)
3499 struct amdkfd_process_info *process_info = p->kgd_process_info;
3500 struct list_head update_list;
3501 struct list_head insert_list;
3502 struct list_head remove_list;
3503 struct svm_range_list *svms;
3504 struct svm_range *prange;
3505 struct svm_range *next;
3506 bool update_mapping = false;
3510 pr_debug("pasid 0x%x svms 0x%p [0x%llx 0x%llx] pages 0x%llx\n",
3511 p->pasid, &p->svms, start, start + size - 1, size);
3513 r = svm_range_check_attr(p, nattr, attrs);
3519 mutex_lock(&process_info->lock);
3521 svm_range_list_lock_and_flush_work(svms, mm);
3523 r = svm_range_is_valid(p, start, size);
3525 pr_debug("invalid range r=%d\n", r);
3526 mmap_write_unlock(mm);
3530 mutex_lock(&svms->lock);
3532 /* Add new range and split existing ranges as needed */
3533 r = svm_range_add(p, start, size, nattr, attrs, &update_list,
3534 &insert_list, &remove_list);
3536 mutex_unlock(&svms->lock);
3537 mmap_write_unlock(mm);
3540 /* Apply changes as a transaction */
3541 list_for_each_entry_safe(prange, next, &insert_list, list) {
3542 svm_range_add_to_svms(prange);
3543 svm_range_add_notifier_locked(mm, prange);
3545 list_for_each_entry(prange, &update_list, update_list) {
3546 svm_range_apply_attrs(p, prange, nattr, attrs, &update_mapping);
3547 /* TODO: unmap ranges from GPU that lost access */
3549 list_for_each_entry_safe(prange, next, &remove_list, update_list) {
3550 pr_debug("unlink old 0x%p prange 0x%p [0x%lx 0x%lx]\n",
3551 prange->svms, prange, prange->start,
3553 svm_range_unlink(prange);
3554 svm_range_remove_notifier(prange);
3555 svm_range_free(prange, false);
3558 mmap_write_downgrade(mm);
3559 /* Trigger migrations and revalidate and map to GPUs as needed. If
3560 * this fails we may be left with partially completed actions. There
3561 * is no clean way of rolling back to the previous state in such a
3562 * case because the rollback wouldn't be guaranteed to work either.
3564 list_for_each_entry(prange, &update_list, update_list) {
3567 mutex_lock(&prange->migrate_mutex);
3569 r = svm_range_trigger_migration(mm, prange, &migrated);
3571 goto out_unlock_range;
3573 if (migrated && (!p->xnack_enabled ||
3574 (prange->flags & KFD_IOCTL_SVM_FLAG_GPU_ALWAYS_MAPPED)) &&
3575 prange->mapped_to_gpu) {
3576 pr_debug("restore_work will update mappings of GPUs\n");
3577 mutex_unlock(&prange->migrate_mutex);
3581 if (!migrated && !update_mapping) {
3582 mutex_unlock(&prange->migrate_mutex);
3586 flush_tlb = !migrated && update_mapping && prange->mapped_to_gpu;
3588 r = svm_range_validate_and_map(mm, prange, MAX_GPU_INSTANCE,
3589 true, true, flush_tlb);
3591 pr_debug("failed %d to map svm range\n", r);
3594 mutex_unlock(&prange->migrate_mutex);
3599 dynamic_svm_range_dump(svms);
3601 mutex_unlock(&svms->lock);
3602 mmap_read_unlock(mm);
3604 mutex_unlock(&process_info->lock);
3606 pr_debug("pasid 0x%x svms 0x%p [0x%llx 0x%llx] done, r=%d\n", p->pasid,
3607 &p->svms, start, start + size - 1, r);
3613 svm_range_get_attr(struct kfd_process *p, struct mm_struct *mm,
3614 uint64_t start, uint64_t size, uint32_t nattr,
3615 struct kfd_ioctl_svm_attribute *attrs)
3617 DECLARE_BITMAP(bitmap_access, MAX_GPU_INSTANCE);
3618 DECLARE_BITMAP(bitmap_aip, MAX_GPU_INSTANCE);
3619 bool get_preferred_loc = false;
3620 bool get_prefetch_loc = false;
3621 bool get_granularity = false;
3622 bool get_accessible = false;
3623 bool get_flags = false;
3624 uint64_t last = start + size - 1UL;
3625 uint8_t granularity = 0xff;
3626 struct interval_tree_node *node;
3627 struct svm_range_list *svms;
3628 struct svm_range *prange;
3629 uint32_t prefetch_loc = KFD_IOCTL_SVM_LOCATION_UNDEFINED;
3630 uint32_t location = KFD_IOCTL_SVM_LOCATION_UNDEFINED;
3631 uint32_t flags_and = 0xffffffff;
3632 uint32_t flags_or = 0;
3637 pr_debug("svms 0x%p [0x%llx 0x%llx] nattr 0x%x\n", &p->svms, start,
3638 start + size - 1, nattr);
3640 /* Flush pending deferred work to avoid racing with deferred actions from
3641 * previous memory map changes (e.g. munmap). Concurrent memory map changes
3642 * can still race with get_attr because we don't hold the mmap lock. But that
3643 * would be a race condition in the application anyway, and undefined
3644 * behaviour is acceptable in that case.
3646 flush_work(&p->svms.deferred_list_work);
3649 r = svm_range_is_valid(p, start, size);
3650 mmap_read_unlock(mm);
3652 pr_debug("invalid range r=%d\n", r);
3656 for (i = 0; i < nattr; i++) {
3657 switch (attrs[i].type) {
3658 case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC:
3659 get_preferred_loc = true;
3661 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC:
3662 get_prefetch_loc = true;
3664 case KFD_IOCTL_SVM_ATTR_ACCESS:
3665 get_accessible = true;
3667 case KFD_IOCTL_SVM_ATTR_SET_FLAGS:
3668 case KFD_IOCTL_SVM_ATTR_CLR_FLAGS:
3671 case KFD_IOCTL_SVM_ATTR_GRANULARITY:
3672 get_granularity = true;
3674 case KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE:
3675 case KFD_IOCTL_SVM_ATTR_NO_ACCESS:
3678 pr_debug("get invalid attr type 0x%x\n", attrs[i].type);
3685 mutex_lock(&svms->lock);
3687 node = interval_tree_iter_first(&svms->objects, start, last);
3689 pr_debug("range attrs not found return default values\n");
3690 svm_range_set_default_attributes(&location, &prefetch_loc,
3691 &granularity, &flags_and);
3692 flags_or = flags_and;
3693 if (p->xnack_enabled)
3694 bitmap_copy(bitmap_access, svms->bitmap_supported,
3697 bitmap_zero(bitmap_access, MAX_GPU_INSTANCE);
3698 bitmap_zero(bitmap_aip, MAX_GPU_INSTANCE);
3701 bitmap_copy(bitmap_access, svms->bitmap_supported, MAX_GPU_INSTANCE);
3702 bitmap_copy(bitmap_aip, svms->bitmap_supported, MAX_GPU_INSTANCE);
3705 struct interval_tree_node *next;
3707 prange = container_of(node, struct svm_range, it_node);
3708 next = interval_tree_iter_next(node, start, last);
3710 if (get_preferred_loc) {
3711 if (prange->preferred_loc ==
3712 KFD_IOCTL_SVM_LOCATION_UNDEFINED ||
3713 (location != KFD_IOCTL_SVM_LOCATION_UNDEFINED &&
3714 location != prange->preferred_loc)) {
3715 location = KFD_IOCTL_SVM_LOCATION_UNDEFINED;
3716 get_preferred_loc = false;
3718 location = prange->preferred_loc;
3721 if (get_prefetch_loc) {
3722 if (prange->prefetch_loc ==
3723 KFD_IOCTL_SVM_LOCATION_UNDEFINED ||
3724 (prefetch_loc != KFD_IOCTL_SVM_LOCATION_UNDEFINED &&
3725 prefetch_loc != prange->prefetch_loc)) {
3726 prefetch_loc = KFD_IOCTL_SVM_LOCATION_UNDEFINED;
3727 get_prefetch_loc = false;
3729 prefetch_loc = prange->prefetch_loc;
3732 if (get_accessible) {
3733 bitmap_and(bitmap_access, bitmap_access,
3734 prange->bitmap_access, MAX_GPU_INSTANCE);
3735 bitmap_and(bitmap_aip, bitmap_aip,
3736 prange->bitmap_aip, MAX_GPU_INSTANCE);
3739 flags_and &= prange->flags;
3740 flags_or |= prange->flags;
3743 if (get_granularity && prange->granularity < granularity)
3744 granularity = prange->granularity;
3749 mutex_unlock(&svms->lock);
3751 for (i = 0; i < nattr; i++) {
3752 switch (attrs[i].type) {
3753 case KFD_IOCTL_SVM_ATTR_PREFERRED_LOC:
3754 attrs[i].value = location;
3756 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC:
3757 attrs[i].value = prefetch_loc;
3759 case KFD_IOCTL_SVM_ATTR_ACCESS:
3760 gpuidx = kfd_process_gpuidx_from_gpuid(p,
3763 pr_debug("invalid gpuid %x\n", attrs[i].value);
3766 if (test_bit(gpuidx, bitmap_access))
3767 attrs[i].type = KFD_IOCTL_SVM_ATTR_ACCESS;
3768 else if (test_bit(gpuidx, bitmap_aip))
3770 KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE;
3772 attrs[i].type = KFD_IOCTL_SVM_ATTR_NO_ACCESS;
3774 case KFD_IOCTL_SVM_ATTR_SET_FLAGS:
3775 attrs[i].value = flags_and;
3777 case KFD_IOCTL_SVM_ATTR_CLR_FLAGS:
3778 attrs[i].value = ~flags_or;
3780 case KFD_IOCTL_SVM_ATTR_GRANULARITY:
3781 attrs[i].value = (uint32_t)granularity;
3789 int kfd_criu_resume_svm(struct kfd_process *p)
3791 struct kfd_ioctl_svm_attribute *set_attr_new, *set_attr = NULL;
3792 int nattr_common = 4, nattr_accessibility = 1;
3793 struct criu_svm_metadata *criu_svm_md = NULL;
3794 struct svm_range_list *svms = &p->svms;
3795 struct criu_svm_metadata *next = NULL;
3796 uint32_t set_flags = 0xffffffff;
3797 int i, j, num_attrs, ret = 0;
3798 uint64_t set_attr_size;
3799 struct mm_struct *mm;
3801 if (list_empty(&svms->criu_svm_metadata_list)) {
3802 pr_debug("No SVM data from CRIU restore stage 2\n");
3806 mm = get_task_mm(p->lead_thread);
3808 pr_err("failed to get mm for the target process\n");
3812 num_attrs = nattr_common + (nattr_accessibility * p->n_pdds);
3815 list_for_each_entry(criu_svm_md, &svms->criu_svm_metadata_list, list) {
3816 pr_debug("criu_svm_md[%d]\n\tstart: 0x%llx size: 0x%llx (npages)\n",
3817 i, criu_svm_md->data.start_addr, criu_svm_md->data.size);
3819 for (j = 0; j < num_attrs; j++) {
3820 pr_debug("\ncriu_svm_md[%d]->attrs[%d].type : 0x%x\ncriu_svm_md[%d]->attrs[%d].value : 0x%x\n",
3821 i, j, criu_svm_md->data.attrs[j].type,
3822 i, j, criu_svm_md->data.attrs[j].value);
3823 switch (criu_svm_md->data.attrs[j].type) {
3824 /* During Checkpoint operation, the query for
3825 * KFD_IOCTL_SVM_ATTR_PREFETCH_LOC attribute might
3826 * return KFD_IOCTL_SVM_LOCATION_UNDEFINED if they were
3827 * not used by the range which was checkpointed. Care
3828 * must be taken to not restore with an invalid value
3829 * otherwise the gpuidx value will be invalid and
3830 * set_attr would eventually fail so just replace those
3831 * with another dummy attribute such as
3832 * KFD_IOCTL_SVM_ATTR_SET_FLAGS.
3834 case KFD_IOCTL_SVM_ATTR_PREFETCH_LOC:
3835 if (criu_svm_md->data.attrs[j].value ==
3836 KFD_IOCTL_SVM_LOCATION_UNDEFINED) {
3837 criu_svm_md->data.attrs[j].type =
3838 KFD_IOCTL_SVM_ATTR_SET_FLAGS;
3839 criu_svm_md->data.attrs[j].value = 0;
3842 case KFD_IOCTL_SVM_ATTR_SET_FLAGS:
3843 set_flags = criu_svm_md->data.attrs[j].value;
3850 /* CLR_FLAGS is not available via get_attr during checkpoint but
3851 * it needs to be inserted before restoring the ranges so
3852 * allocate extra space for it before calling set_attr
3854 set_attr_size = sizeof(struct kfd_ioctl_svm_attribute) *
3856 set_attr_new = krealloc(set_attr, set_attr_size,
3858 if (!set_attr_new) {
3862 set_attr = set_attr_new;
3864 memcpy(set_attr, criu_svm_md->data.attrs, num_attrs *
3865 sizeof(struct kfd_ioctl_svm_attribute));
3866 set_attr[num_attrs].type = KFD_IOCTL_SVM_ATTR_CLR_FLAGS;
3867 set_attr[num_attrs].value = ~set_flags;
3869 ret = svm_range_set_attr(p, mm, criu_svm_md->data.start_addr,
3870 criu_svm_md->data.size, num_attrs + 1,
3873 pr_err("CRIU: failed to set range attributes\n");
3881 list_for_each_entry_safe(criu_svm_md, next, &svms->criu_svm_metadata_list, list) {
3882 pr_debug("freeing criu_svm_md[]\n\tstart: 0x%llx\n",
3883 criu_svm_md->data.start_addr);
3892 int kfd_criu_restore_svm(struct kfd_process *p,
3893 uint8_t __user *user_priv_ptr,
3894 uint64_t *priv_data_offset,
3895 uint64_t max_priv_data_size)
3897 uint64_t svm_priv_data_size, svm_object_md_size, svm_attrs_size;
3898 int nattr_common = 4, nattr_accessibility = 1;
3899 struct criu_svm_metadata *criu_svm_md = NULL;
3900 struct svm_range_list *svms = &p->svms;
3901 uint32_t num_devices;
3904 num_devices = p->n_pdds;
3905 /* Handle one SVM range object at a time, also the number of gpus are
3906 * assumed to be same on the restore node, checking must be done while
3907 * evaluating the topology earlier
3910 svm_attrs_size = sizeof(struct kfd_ioctl_svm_attribute) *
3911 (nattr_common + nattr_accessibility * num_devices);
3912 svm_object_md_size = sizeof(struct criu_svm_metadata) + svm_attrs_size;
3914 svm_priv_data_size = sizeof(struct kfd_criu_svm_range_priv_data) +
3917 criu_svm_md = kzalloc(svm_object_md_size, GFP_KERNEL);
3919 pr_err("failed to allocate memory to store svm metadata\n");
3922 if (*priv_data_offset + svm_priv_data_size > max_priv_data_size) {
3927 ret = copy_from_user(&criu_svm_md->data, user_priv_ptr + *priv_data_offset,
3928 svm_priv_data_size);
3933 *priv_data_offset += svm_priv_data_size;
3935 list_add_tail(&criu_svm_md->list, &svms->criu_svm_metadata_list);
3945 int svm_range_get_info(struct kfd_process *p, uint32_t *num_svm_ranges,
3946 uint64_t *svm_priv_data_size)
3948 uint64_t total_size, accessibility_size, common_attr_size;
3949 int nattr_common = 4, nattr_accessibility = 1;
3950 int num_devices = p->n_pdds;
3951 struct svm_range_list *svms;
3952 struct svm_range *prange;
3955 *svm_priv_data_size = 0;
3961 mutex_lock(&svms->lock);
3962 list_for_each_entry(prange, &svms->list, list) {
3963 pr_debug("prange: 0x%p start: 0x%lx\t npages: 0x%llx\t end: 0x%llx\n",
3964 prange, prange->start, prange->npages,
3965 prange->start + prange->npages - 1);
3968 mutex_unlock(&svms->lock);
3970 *num_svm_ranges = count;
3971 /* Only the accessbility attributes need to be queried for all the gpus
3972 * individually, remaining ones are spanned across the entire process
3973 * regardless of the various gpu nodes. Of the remaining attributes,
3974 * KFD_IOCTL_SVM_ATTR_CLR_FLAGS need not be saved.
3976 * KFD_IOCTL_SVM_ATTR_PREFERRED_LOC
3977 * KFD_IOCTL_SVM_ATTR_PREFETCH_LOC
3978 * KFD_IOCTL_SVM_ATTR_SET_FLAGS
3979 * KFD_IOCTL_SVM_ATTR_GRANULARITY
3981 * ** ACCESSBILITY ATTRIBUTES **
3982 * (Considered as one, type is altered during query, value is gpuid)
3983 * KFD_IOCTL_SVM_ATTR_ACCESS
3984 * KFD_IOCTL_SVM_ATTR_ACCESS_IN_PLACE
3985 * KFD_IOCTL_SVM_ATTR_NO_ACCESS
3987 if (*num_svm_ranges > 0) {
3988 common_attr_size = sizeof(struct kfd_ioctl_svm_attribute) *
3990 accessibility_size = sizeof(struct kfd_ioctl_svm_attribute) *
3991 nattr_accessibility * num_devices;
3993 total_size = sizeof(struct kfd_criu_svm_range_priv_data) +
3994 common_attr_size + accessibility_size;
3996 *svm_priv_data_size = *num_svm_ranges * total_size;
3999 pr_debug("num_svm_ranges %u total_priv_size %llu\n", *num_svm_ranges,
4000 *svm_priv_data_size);
4004 int kfd_criu_checkpoint_svm(struct kfd_process *p,
4005 uint8_t __user *user_priv_data,
4006 uint64_t *priv_data_offset)
4008 struct kfd_criu_svm_range_priv_data *svm_priv = NULL;
4009 struct kfd_ioctl_svm_attribute *query_attr = NULL;
4010 uint64_t svm_priv_data_size, query_attr_size = 0;
4011 int index, nattr_common = 4, ret = 0;
4012 struct svm_range_list *svms;
4013 int num_devices = p->n_pdds;
4014 struct svm_range *prange;
4015 struct mm_struct *mm;
4021 mm = get_task_mm(p->lead_thread);
4023 pr_err("failed to get mm for the target process\n");
4027 query_attr_size = sizeof(struct kfd_ioctl_svm_attribute) *
4028 (nattr_common + num_devices);
4030 query_attr = kzalloc(query_attr_size, GFP_KERNEL);
4036 query_attr[0].type = KFD_IOCTL_SVM_ATTR_PREFERRED_LOC;
4037 query_attr[1].type = KFD_IOCTL_SVM_ATTR_PREFETCH_LOC;
4038 query_attr[2].type = KFD_IOCTL_SVM_ATTR_SET_FLAGS;
4039 query_attr[3].type = KFD_IOCTL_SVM_ATTR_GRANULARITY;
4041 for (index = 0; index < num_devices; index++) {
4042 struct kfd_process_device *pdd = p->pdds[index];
4044 query_attr[index + nattr_common].type =
4045 KFD_IOCTL_SVM_ATTR_ACCESS;
4046 query_attr[index + nattr_common].value = pdd->user_gpu_id;
4049 svm_priv_data_size = sizeof(*svm_priv) + query_attr_size;
4051 svm_priv = kzalloc(svm_priv_data_size, GFP_KERNEL);
4058 list_for_each_entry(prange, &svms->list, list) {
4060 svm_priv->object_type = KFD_CRIU_OBJECT_TYPE_SVM_RANGE;
4061 svm_priv->start_addr = prange->start;
4062 svm_priv->size = prange->npages;
4063 memcpy(&svm_priv->attrs, query_attr, query_attr_size);
4064 pr_debug("CRIU: prange: 0x%p start: 0x%lx\t npages: 0x%llx end: 0x%llx\t size: 0x%llx\n",
4065 prange, prange->start, prange->npages,
4066 prange->start + prange->npages - 1,
4067 prange->npages * PAGE_SIZE);
4069 ret = svm_range_get_attr(p, mm, svm_priv->start_addr,
4071 (nattr_common + num_devices),
4074 pr_err("CRIU: failed to obtain range attributes\n");
4078 if (copy_to_user(user_priv_data + *priv_data_offset, svm_priv,
4079 svm_priv_data_size)) {
4080 pr_err("Failed to copy svm priv to user\n");
4085 *priv_data_offset += svm_priv_data_size;
4100 svm_ioctl(struct kfd_process *p, enum kfd_ioctl_svm_op op, uint64_t start,
4101 uint64_t size, uint32_t nattrs, struct kfd_ioctl_svm_attribute *attrs)
4103 struct mm_struct *mm = current->mm;
4106 start >>= PAGE_SHIFT;
4107 size >>= PAGE_SHIFT;
4110 case KFD_IOCTL_SVM_OP_SET_ATTR:
4111 r = svm_range_set_attr(p, mm, start, size, nattrs, attrs);
4113 case KFD_IOCTL_SVM_OP_GET_ATTR:
4114 r = svm_range_get_attr(p, mm, start, size, nattrs, attrs);