2 * Copyright 2019 Advanced Micro Devices, Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
24 #ifndef __MES_API_DEF_H__
25 #define __MES_API_DEF_H__
29 #define MES_API_VERSION 1
31 /* Driver submits one API(cmd) as a single Frame and this command size is same
32 * for all API to ease the debugging and parsing of ring buffer.
34 enum { API_FRAME_SIZE_IN_DWORDS = 64 };
36 /* To avoid command in scheduler context to be overwritten whenever multiple
37 * interrupts come in, this creates another queue.
39 enum { API_NUMBER_OF_COMMAND_MAX = 32 };
42 MES_API_TYPE_SCHEDULER = 1,
46 enum MES_SCH_API_OPCODE {
47 MES_SCH_API_SET_HW_RSRC = 0,
48 MES_SCH_API_SET_SCHEDULING_CONFIG = 1, /* agreegated db, quantums, etc */
49 MES_SCH_API_ADD_QUEUE = 2,
50 MES_SCH_API_REMOVE_QUEUE = 3,
51 MES_SCH_API_PERFORM_YIELD = 4,
52 MES_SCH_API_SET_GANG_PRIORITY_LEVEL = 5,
53 MES_SCH_API_SUSPEND = 6,
54 MES_SCH_API_RESUME = 7,
55 MES_SCH_API_RESET = 8,
56 MES_SCH_API_SET_LOG_BUFFER = 9,
57 MES_SCH_API_CHANGE_GANG_PRORITY = 10,
58 MES_SCH_API_QUERY_SCHEDULER_STATUS = 11,
59 MES_SCH_API_PROGRAM_GDS = 12,
60 MES_SCH_API_SET_DEBUG_VMID = 13,
61 MES_SCH_API_MISC = 14,
62 MES_SCH_API_UPDATE_ROOT_PAGE_TABLE = 15,
63 MES_SCH_API_AMD_LOG = 16,
64 MES_SCH_API_MAX = 0xFF
67 union MES_API_HEADER {
69 uint32_t type : 4; /* 0 - Invalid; 1 - Scheduling; 2 - TBD */
71 uint32_t dwsize : 8; /* including header */
72 uint32_t reserved : 12;
78 enum MES_AMD_PRIORITY_LEVEL {
79 AMD_PRIORITY_LEVEL_LOW = 0,
80 AMD_PRIORITY_LEVEL_NORMAL = 1,
81 AMD_PRIORITY_LEVEL_MEDIUM = 2,
82 AMD_PRIORITY_LEVEL_HIGH = 3,
83 AMD_PRIORITY_LEVEL_REALTIME = 4,
84 AMD_PRIORITY_NUM_LEVELS
89 MES_QUEUE_TYPE_COMPUTE,
94 struct MES_API_STATUS {
95 uint64_t api_completion_fence_addr;
96 uint64_t api_completion_fence_value;
99 enum { MAX_COMPUTE_PIPES = 8 };
100 enum { MAX_GFX_PIPES = 2 };
101 enum { MAX_SDMA_PIPES = 2 };
103 enum { MAX_COMPUTE_HQD_PER_PIPE = 8 };
104 enum { MAX_GFX_HQD_PER_PIPE = 8 };
105 enum { MAX_SDMA_HQD_PER_PIPE = 10 };
107 enum { MAX_QUEUES_IN_A_GANG = 8 };
115 enum { VMID_INVALID = 0xffff };
117 enum { MAX_VMID_GCHUB = 16 };
118 enum { MAX_VMID_MMHUB = 16 };
120 enum MES_LOG_OPERATION {
121 MES_LOG_OPERATION_CONTEXT_STATE_CHANGE = 0,
122 MES_LOG_OPERATION_QUEUE_NEW_WORK = 1,
123 MES_LOG_OPERATION_QUEUE_UNWAIT_SYNC_OBJECT = 2,
124 MES_LOG_OPERATION_QUEUE_NO_MORE_WORK = 3,
125 MES_LOG_OPERATION_QUEUE_WAIT_SYNC_OBJECT = 4,
126 MES_LOG_OPERATION_QUEUE_INVALID = 0xF,
129 enum MES_LOG_CONTEXT_STATE {
130 MES_LOG_CONTEXT_STATE_IDLE = 0,
131 MES_LOG_CONTEXT_STATE_RUNNING = 1,
132 MES_LOG_CONTEXT_STATE_READY = 2,
133 MES_LOG_CONTEXT_STATE_READY_STANDBY = 3,
134 MES_LOG_CONTEXT_STATE_INVALID = 0xF,
137 struct MES_LOG_CONTEXT_STATE_CHANGE {
139 enum MES_LOG_CONTEXT_STATE new_context_state;
142 struct MES_LOG_QUEUE_NEW_WORK {
147 struct MES_LOG_QUEUE_UNWAIT_SYNC_OBJECT {
149 uint64_t h_sync_object;
152 struct MES_LOG_QUEUE_NO_MORE_WORK {
157 struct MES_LOG_QUEUE_WAIT_SYNC_OBJECT {
159 uint64_t h_sync_object;
162 struct MES_LOG_ENTRY_HEADER {
163 uint32_t first_free_entry_index;
164 uint32_t wraparound_count;
165 uint64_t number_of_entries;
166 uint64_t reserved[2];
169 struct MES_LOG_ENTRY_DATA {
170 uint64_t gpu_time_stamp;
171 uint32_t operation_type; /* operation_type is of MES_LOG_OPERATION type */
172 uint32_t reserved_operation_type_bits;
174 struct MES_LOG_CONTEXT_STATE_CHANGE context_state_change;
175 struct MES_LOG_QUEUE_NEW_WORK queue_new_work;
176 struct MES_LOG_QUEUE_UNWAIT_SYNC_OBJECT queue_unwait_sync_object;
177 struct MES_LOG_QUEUE_NO_MORE_WORK queue_no_more_work;
178 struct MES_LOG_QUEUE_WAIT_SYNC_OBJECT queue_wait_sync_object;
183 struct MES_LOG_BUFFER {
184 struct MES_LOG_ENTRY_HEADER header;
185 struct MES_LOG_ENTRY_DATA entries[1];
188 enum MES_SWIP_TO_HWIP_DEF {
189 MES_MAX_HWIP_SEGMENT = 6,
192 union MESAPI_SET_HW_RESOURCES {
194 union MES_API_HEADER header;
195 uint32_t vmid_mask_mmhub;
196 uint32_t vmid_mask_gfxhub;
198 uint32_t paging_vmid;
199 uint32_t compute_hqd_mask[MAX_COMPUTE_PIPES];
200 uint32_t gfx_hqd_mask[MAX_GFX_PIPES];
201 uint32_t sdma_hqd_mask[MAX_SDMA_PIPES];
202 uint32_t aggregated_doorbells[AMD_PRIORITY_NUM_LEVELS];
203 uint64_t g_sch_ctx_gpu_mc_ptr;
204 uint64_t query_status_fence_gpu_mc_ptr;
205 uint32_t gc_base[MES_MAX_HWIP_SEGMENT];
206 uint32_t mmhub_base[MES_MAX_HWIP_SEGMENT];
207 uint32_t osssys_base[MES_MAX_HWIP_SEGMENT];
208 struct MES_API_STATUS api_status;
211 uint32_t disable_reset : 1;
212 uint32_t use_different_vmid_compute : 1;
213 uint32_t disable_mes_log : 1;
214 uint32_t apply_mmhub_pgvm_invalidate_ack_loss_wa : 1;
215 uint32_t apply_grbm_remote_register_dummy_read_wa : 1;
216 uint32_t second_gfx_pipe_enabled : 1;
217 uint32_t enable_level_process_quantum_check : 1;
218 uint32_t apply_cwsr_program_all_vmid_sq_shader_tba_registers_wa : 1;
219 uint32_t enable_mqd_active_poll : 1;
220 uint32_t disable_timer_int : 1;
221 uint32_t reserved : 22;
223 uint32_t uint32_t_all;
227 uint32_t max_dwords_in_api[API_FRAME_SIZE_IN_DWORDS];
230 union MESAPI__ADD_QUEUE {
232 union MES_API_HEADER header;
234 uint64_t page_table_base_addr;
235 uint64_t process_va_start;
236 uint64_t process_va_end;
237 uint64_t process_quantum;
238 uint64_t process_context_addr;
239 uint64_t gang_quantum;
240 uint64_t gang_context_addr;
241 uint32_t inprocess_gang_priority;
242 enum MES_AMD_PRIORITY_LEVEL gang_global_priority_level;
243 uint32_t doorbell_offset;
248 enum MES_QUEUE_TYPE queue_type;
254 uint64_t trap_handler_addr;
255 uint32_t vm_context_cntl;
259 uint32_t debug_vmid : 4;
260 uint32_t program_gds : 1;
261 uint32_t is_gang_suspended : 1;
262 uint32_t is_tmz_queue : 1;
263 uint32_t map_kiq_utility_queue : 1;
264 uint32_t reserved : 23;
266 struct MES_API_STATUS api_status;
269 uint32_t max_dwords_in_api[API_FRAME_SIZE_IN_DWORDS];
272 union MESAPI__REMOVE_QUEUE {
274 union MES_API_HEADER header;
275 uint32_t doorbell_offset;
276 uint64_t gang_context_addr;
279 uint32_t unmap_legacy_gfx_queue : 1;
280 uint32_t unmap_kiq_utility_queue : 1;
281 uint32_t preempt_legacy_gfx_queue : 1;
282 uint32_t reserved : 29;
284 struct MES_API_STATUS api_status;
293 uint32_t max_dwords_in_api[API_FRAME_SIZE_IN_DWORDS];
296 union MESAPI__SET_SCHEDULING_CONFIG {
298 union MES_API_HEADER header;
299 /* Grace period when preempting another priority band for this
300 * priority band. The value for idle priority band is ignored,
301 * as it never preempts other bands.
303 uint64_t grace_period_other_levels[AMD_PRIORITY_NUM_LEVELS];
304 /* Default quantum for scheduling across processes within
307 uint64_t process_quantum_for_level[AMD_PRIORITY_NUM_LEVELS];
308 /* Default grace period for processes that preempt each other
309 * within a priority band.
311 uint64_t process_grace_period_same_level[AMD_PRIORITY_NUM_LEVELS];
312 /* For normal level this field specifies the target GPU
313 * percentage in situations when it's starved by the high level.
314 * Valid values are between 0 and 50, with the default being 10.
316 uint32_t normal_yield_percent;
317 struct MES_API_STATUS api_status;
320 uint32_t max_dwords_in_api[API_FRAME_SIZE_IN_DWORDS];
323 union MESAPI__PERFORM_YIELD {
325 union MES_API_HEADER header;
327 struct MES_API_STATUS api_status;
330 uint32_t max_dwords_in_api[API_FRAME_SIZE_IN_DWORDS];
333 union MESAPI__CHANGE_GANG_PRIORITY_LEVEL {
335 union MES_API_HEADER header;
336 uint32_t inprocess_gang_priority;
337 enum MES_AMD_PRIORITY_LEVEL gang_global_priority_level;
338 uint64_t gang_quantum;
339 uint64_t gang_context_addr;
340 struct MES_API_STATUS api_status;
343 uint32_t max_dwords_in_api[API_FRAME_SIZE_IN_DWORDS];
346 union MESAPI__SUSPEND {
348 union MES_API_HEADER header;
349 /* false - suspend all gangs; true - specific gang */
351 uint32_t suspend_all_gangs : 1;
352 uint32_t reserved : 31;
354 /* gang_context_addr is valid only if suspend_all = false */
355 uint64_t gang_context_addr;
357 uint64_t suspend_fence_addr;
358 uint32_t suspend_fence_value;
360 struct MES_API_STATUS api_status;
363 uint32_t max_dwords_in_api[API_FRAME_SIZE_IN_DWORDS];
366 union MESAPI__RESUME {
368 union MES_API_HEADER header;
369 /* false - resume all gangs; true - specified gang */
371 uint32_t resume_all_gangs : 1;
372 uint32_t reserved : 31;
374 /* valid only if resume_all_gangs = false */
375 uint64_t gang_context_addr;
377 struct MES_API_STATUS api_status;
380 uint32_t max_dwords_in_api[API_FRAME_SIZE_IN_DWORDS];
383 union MESAPI__RESET {
385 union MES_API_HEADER header;
388 /* Only reset the queue given by doorbell_offset (not entire gang) */
389 uint32_t reset_queue_only : 1;
390 /* Hang detection first then reset any queues that are hung */
391 uint32_t hang_detect_then_reset : 1;
392 /* Only do hang detection (no reset) */
393 uint32_t hang_detect_only : 1;
394 /* Rest HP and LP kernel queues not managed by MES */
395 uint32_t reset_legacy_gfx : 1;
396 uint32_t reserved : 28;
399 uint64_t gang_context_addr;
401 /* valid only if reset_queue_only = true */
402 uint32_t doorbell_offset;
404 /* valid only if hang_detect_then_reset = true */
405 uint64_t doorbell_offset_addr;
406 enum MES_QUEUE_TYPE queue_type;
408 /* valid only if reset_legacy_gfx = true */
410 uint32_t queue_id_lp;
412 uint64_t mqd_mc_addr_lp;
413 uint32_t doorbell_offset_lp;
414 uint64_t wptr_addr_lp;
417 uint32_t queue_id_hp;
419 uint64_t mqd_mc_addr_hp;
420 uint32_t doorbell_offset_hp;
421 uint64_t wptr_addr_hp;
423 struct MES_API_STATUS api_status;
426 uint32_t max_dwords_in_api[API_FRAME_SIZE_IN_DWORDS];
429 union MESAPI__SET_LOGGING_BUFFER {
431 union MES_API_HEADER header;
432 /* There are separate log buffers for each queue type */
433 enum MES_QUEUE_TYPE log_type;
434 /* Log buffer GPU Address */
435 uint64_t logging_buffer_addr;
436 /* number of entries in the log buffer */
437 uint32_t number_of_entries;
438 /* Entry index at which CPU interrupt needs to be signalled */
439 uint32_t interrupt_entry;
441 struct MES_API_STATUS api_status;
444 uint32_t max_dwords_in_api[API_FRAME_SIZE_IN_DWORDS];
447 union MESAPI__QUERY_MES_STATUS {
449 union MES_API_HEADER header;
450 bool mes_healthy; /* 0 - not healthy, 1 - healthy */
451 struct MES_API_STATUS api_status;
454 uint32_t max_dwords_in_api[API_FRAME_SIZE_IN_DWORDS];
457 union MESAPI__PROGRAM_GDS {
459 union MES_API_HEADER header;
460 uint64_t process_context_addr;
466 struct MES_API_STATUS api_status;
469 uint32_t max_dwords_in_api[API_FRAME_SIZE_IN_DWORDS];
472 union MESAPI__SET_DEBUG_VMID {
474 union MES_API_HEADER header;
475 struct MES_API_STATUS api_status;
478 uint32_t use_gds : 1;
479 uint32_t reserved : 31;
485 uint64_t process_context_addr;
486 uint64_t page_table_base_addr;
487 uint64_t process_va_start;
488 uint64_t process_va_end;
496 uint32_t max_dwords_in_api[API_FRAME_SIZE_IN_DWORDS];
499 enum MESAPI_MISC_OPCODE {
500 MESAPI_MISC__MODIFY_REG,
501 MESAPI_MISC__INV_GART,
502 MESAPI_MISC__QUERY_STATUS,
506 enum MODIFY_REG_SUBCODE {
507 MODIFY_REG__OVERWRITE,
513 enum { MISC_DATA_MAX_SIZE_IN_DWORDS = 20 };
516 enum MODIFY_REG_SUBCODE subcode;
522 uint64_t inv_range_va_start;
523 uint64_t inv_range_size;
526 struct QUERY_STATUS {
532 union MES_API_HEADER header;
533 enum MESAPI_MISC_OPCODE opcode;
534 struct MES_API_STATUS api_status;
537 struct MODIFY_REG modify_reg;
538 struct INV_GART inv_gart;
539 struct QUERY_STATUS query_status;
540 uint32_t data[MISC_DATA_MAX_SIZE_IN_DWORDS];
544 uint32_t max_dwords_in_api[API_FRAME_SIZE_IN_DWORDS];
547 union MESAPI__UPDATE_ROOT_PAGE_TABLE {
549 union MES_API_HEADER header;
550 uint64_t page_table_base_addr;
551 uint64_t process_context_addr;
552 struct MES_API_STATUS api_status;
555 uint32_t max_dwords_in_api[API_FRAME_SIZE_IN_DWORDS];
558 union MESAPI_AMD_LOG {
560 union MES_API_HEADER header;
561 uint64_t p_buffer_memory;
562 uint64_t p_buffer_size_used;
563 struct MES_API_STATUS api_status;
566 uint32_t max_dwords_in_api[API_FRAME_SIZE_IN_DWORDS];