drivers/gpu/drm/amd/powerplay/smumgr/smumgr.c

   1 /*
   2  * Copyright 2015 Advanced Micro Devices, Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20  * OTHER DEALINGS IN THE SOFTWARE.
  21  *
  22  */
  23
  24 #include <linux/delay.h>
  25 #include <linux/kernel.h>
  26 #include <linux/module.h>
  27 #include <linux/slab.h>
  28 #include <linux/types.h>
  29 #include <drm/amdgpu_drm.h>
  30 #include "smumgr.h"
  31
  32 MODULE_FIRMWARE("amdgpu/topaz_smc.bin");
  33 MODULE_FIRMWARE("amdgpu/topaz_k_smc.bin");
  34 MODULE_FIRMWARE("amdgpu/tonga_smc.bin");
  35 MODULE_FIRMWARE("amdgpu/tonga_k_smc.bin");
  36 MODULE_FIRMWARE("amdgpu/fiji_smc.bin");
  37 MODULE_FIRMWARE("amdgpu/polaris10_smc.bin");
  38 MODULE_FIRMWARE("amdgpu/polaris10_smc_sk.bin");
  39 MODULE_FIRMWARE("amdgpu/polaris10_k_smc.bin");
  40 MODULE_FIRMWARE("amdgpu/polaris11_smc.bin");
  41 MODULE_FIRMWARE("amdgpu/polaris11_smc_sk.bin");
  42 MODULE_FIRMWARE("amdgpu/polaris11_k_smc.bin");
  43 MODULE_FIRMWARE("amdgpu/polaris12_smc.bin");
  44 MODULE_FIRMWARE("amdgpu/vegam_smc.bin");
  45 MODULE_FIRMWARE("amdgpu/vega10_smc.bin");
  46 MODULE_FIRMWARE("amdgpu/vega10_acg_smc.bin");
  47 MODULE_FIRMWARE("amdgpu/vega12_smc.bin");
  48 MODULE_FIRMWARE("amdgpu/vega20_smc.bin");
  49
  50 int smum_thermal_avfs_enable(struct pp_hwmgr *hwmgr)
  51 {
  52         if (NULL != hwmgr->smumgr_funcs->thermal_avfs_enable)
  53                 return hwmgr->smumgr_funcs->thermal_avfs_enable(hwmgr);
  54
  55         return 0;
  56 }
  57
  58 int smum_thermal_setup_fan_table(struct pp_hwmgr *hwmgr)
  59 {
  60         if (NULL != hwmgr->smumgr_funcs->thermal_setup_fan_table)
  61                 return hwmgr->smumgr_funcs->thermal_setup_fan_table(hwmgr);
  62
  63         return 0;
  64 }
  65
  66 int smum_update_sclk_threshold(struct pp_hwmgr *hwmgr)
  67 {
  68
  69         if (NULL != hwmgr->smumgr_funcs->update_sclk_threshold)
  70                 return hwmgr->smumgr_funcs->update_sclk_threshold(hwmgr);
  71
  72         return 0;
  73 }
  74
  75 int smum_update_smc_table(struct pp_hwmgr *hwmgr, uint32_t type)
  76 {
  77
  78         if (NULL != hwmgr->smumgr_funcs->update_smc_table)
  79                 return hwmgr->smumgr_funcs->update_smc_table(hwmgr, type);
  80
  81         return 0;
  82 }
  83
  84 uint32_t smum_get_offsetof(struct pp_hwmgr *hwmgr, uint32_t type, uint32_t member)
  85 {
  86         if (NULL != hwmgr->smumgr_funcs->get_offsetof)
  87                 return hwmgr->smumgr_funcs->get_offsetof(type, member);
  88
  89         return 0;
  90 }
  91
  92 int smum_process_firmware_header(struct pp_hwmgr *hwmgr)
  93 {
  94         if (NULL != hwmgr->smumgr_funcs->process_firmware_header)
  95                 return hwmgr->smumgr_funcs->process_firmware_header(hwmgr);
  96         return 0;
  97 }
  98
  99 int smum_get_argument(struct pp_hwmgr *hwmgr)
 100 {
 101         if (NULL != hwmgr->smumgr_funcs->get_argument)
 102                 return hwmgr->smumgr_funcs->get_argument(hwmgr);
 103
 104         return 0;
 105 }
 106
 107 uint32_t smum_get_mac_definition(struct pp_hwmgr *hwmgr, uint32_t value)
 108 {
 109         if (NULL != hwmgr->smumgr_funcs->get_mac_definition)
 110                 return hwmgr->smumgr_funcs->get_mac_definition(value);
 111
 112         return 0;
 113 }
 114
 115 int smum_download_powerplay_table(struct pp_hwmgr *hwmgr, void **table)
 116 {
 117         if (NULL != hwmgr->smumgr_funcs->download_pptable_settings)
 118                 return hwmgr->smumgr_funcs->download_pptable_settings(hwmgr,
 119                                                                         table);
 120         return 0;
 121 }
 122
 123 int smum_upload_powerplay_table(struct pp_hwmgr *hwmgr)
 124 {
 125         if (NULL != hwmgr->smumgr_funcs->upload_pptable_settings)
 126                 return hwmgr->smumgr_funcs->upload_pptable_settings(hwmgr);
 127
 128         return 0;
 129 }
 130
 131 int smum_send_msg_to_smc(struct pp_hwmgr *hwmgr, uint16_t msg)
 132 {
 133         if (hwmgr == NULL || hwmgr->smumgr_funcs->send_msg_to_smc == NULL)
 134                 return -EINVAL;
 135
 136         return hwmgr->smumgr_funcs->send_msg_to_smc(hwmgr, msg);
 137 }
 138
 139 int smum_send_msg_to_smc_with_parameter(struct pp_hwmgr *hwmgr,
 140                                         uint16_t msg, uint32_t parameter)
 141 {
 142         if (hwmgr == NULL ||
 143                 hwmgr->smumgr_funcs->send_msg_to_smc_with_parameter == NULL)
 144                 return -EINVAL;
 145         return hwmgr->smumgr_funcs->send_msg_to_smc_with_parameter(
 146                                                 hwmgr, msg, parameter);
 147 }
 148
 149 int smum_init_smc_table(struct pp_hwmgr *hwmgr)
 150 {
 151         if (NULL != hwmgr->smumgr_funcs->init_smc_table)
 152                 return hwmgr->smumgr_funcs->init_smc_table(hwmgr);
 153
 154         return 0;
 155 }
 156
 157 int smum_populate_all_graphic_levels(struct pp_hwmgr *hwmgr)
 158 {
 159         if (NULL != hwmgr->smumgr_funcs->populate_all_graphic_levels)
 160                 return hwmgr->smumgr_funcs->populate_all_graphic_levels(hwmgr);
 161
 162         return 0;
 163 }
 164
 165 int smum_populate_all_memory_levels(struct pp_hwmgr *hwmgr)
 166 {
 167         if (NULL != hwmgr->smumgr_funcs->populate_all_memory_levels)
 168                 return hwmgr->smumgr_funcs->populate_all_memory_levels(hwmgr);
 169
 170         return 0;
 171 }
 172
 173 /*this interface is needed by island ci/vi */
 174 int smum_initialize_mc_reg_table(struct pp_hwmgr *hwmgr)
 175 {
 176         if (NULL != hwmgr->smumgr_funcs->initialize_mc_reg_table)
 177                 return hwmgr->smumgr_funcs->initialize_mc_reg_table(hwmgr);
 178
 179         return 0;
 180 }
 181
 182 bool smum_is_dpm_running(struct pp_hwmgr *hwmgr)
 183 {
 184         if (NULL != hwmgr->smumgr_funcs->is_dpm_running)
 185                 return hwmgr->smumgr_funcs->is_dpm_running(hwmgr);
 186
 187         return true;
 188 }
 189
 190 bool smum_is_hw_avfs_present(struct pp_hwmgr *hwmgr)
 191 {
 192         if (hwmgr->smumgr_funcs->is_hw_avfs_present)
 193                 return hwmgr->smumgr_funcs->is_hw_avfs_present(hwmgr);
 194
 195         return false;
 196 }
 197
 198 int smum_update_dpm_settings(struct pp_hwmgr *hwmgr, void *profile_setting)
 199 {
 200         if (hwmgr->smumgr_funcs->update_dpm_settings)
 201                 return hwmgr->smumgr_funcs->update_dpm_settings(hwmgr, profile_setting);
 202
 203         return -EINVAL;
 204 }
 205
 206 int smum_smc_table_manager(struct pp_hwmgr *hwmgr, uint8_t *table, uint16_t table_id, bool rw)
 207 {
 208         if (hwmgr->smumgr_funcs->smc_table_manager)
 209                 return hwmgr->smumgr_funcs->smc_table_manager(hwmgr, table, table_id, rw);
 210
 211         return -EINVAL;
 212 }