1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2015-2018 Etnaviv Project
6 #include <linux/component.h>
7 #include <linux/dma-mapping.h>
8 #include <linux/module.h>
9 #include <linux/of_platform.h>
10 #include <linux/uaccess.h>
12 #include <drm/drm_debugfs.h>
13 #include <drm/drm_drv.h>
14 #include <drm/drm_file.h>
15 #include <drm/drm_ioctl.h>
16 #include <drm/drm_of.h>
17 #include <drm/drm_prime.h>
19 #include "etnaviv_cmdbuf.h"
20 #include "etnaviv_drv.h"
21 #include "etnaviv_gpu.h"
22 #include "etnaviv_gem.h"
23 #include "etnaviv_mmu.h"
24 #include "etnaviv_perfmon.h"
31 static void load_gpu(struct drm_device *dev)
33 struct etnaviv_drm_private *priv = dev->dev_private;
36 for (i = 0; i < ETNA_MAX_PIPES; i++) {
37 struct etnaviv_gpu *g = priv->gpu[i];
42 ret = etnaviv_gpu_init(g);
49 static int etnaviv_open(struct drm_device *dev, struct drm_file *file)
51 struct etnaviv_drm_private *priv = dev->dev_private;
52 struct etnaviv_file_private *ctx;
55 ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
59 ret = xa_alloc_cyclic(&priv->active_contexts, &ctx->id, ctx,
60 xa_limit_32b, &priv->next_context_id, GFP_KERNEL);
64 ctx->mmu = etnaviv_iommu_context_init(priv->mmu_global,
65 priv->cmdbuf_suballoc);
71 for (i = 0; i < ETNA_MAX_PIPES; i++) {
72 struct etnaviv_gpu *gpu = priv->gpu[i];
73 struct drm_gpu_scheduler *sched;
77 drm_sched_entity_init(&ctx->sched_entity[i],
78 DRM_SCHED_PRIORITY_NORMAL, &sched,
83 file->driver_priv = ctx;
92 static void etnaviv_postclose(struct drm_device *dev, struct drm_file *file)
94 struct etnaviv_drm_private *priv = dev->dev_private;
95 struct etnaviv_file_private *ctx = file->driver_priv;
98 for (i = 0; i < ETNA_MAX_PIPES; i++) {
99 struct etnaviv_gpu *gpu = priv->gpu[i];
102 drm_sched_entity_destroy(&ctx->sched_entity[i]);
105 etnaviv_iommu_context_put(ctx->mmu);
107 xa_erase(&priv->active_contexts, ctx->id);
116 #ifdef CONFIG_DEBUG_FS
117 static int etnaviv_gem_show(struct drm_device *dev, struct seq_file *m)
119 struct etnaviv_drm_private *priv = dev->dev_private;
121 etnaviv_gem_describe_objects(priv, m);
126 static int etnaviv_mm_show(struct drm_device *dev, struct seq_file *m)
128 struct drm_printer p = drm_seq_file_printer(m);
130 read_lock(&dev->vma_offset_manager->vm_lock);
131 drm_mm_print(&dev->vma_offset_manager->vm_addr_space_mm, &p);
132 read_unlock(&dev->vma_offset_manager->vm_lock);
137 static int etnaviv_mmu_show(struct etnaviv_gpu *gpu, struct seq_file *m)
139 struct drm_printer p = drm_seq_file_printer(m);
140 struct etnaviv_iommu_context *mmu_context;
142 seq_printf(m, "Active Objects (%s):\n", dev_name(gpu->dev));
145 * Lock the GPU to avoid a MMU context switch just now and elevate
146 * the refcount of the current context to avoid it disappearing from
149 mutex_lock(&gpu->lock);
150 mmu_context = gpu->mmu_context;
152 etnaviv_iommu_context_get(mmu_context);
153 mutex_unlock(&gpu->lock);
158 mutex_lock(&mmu_context->lock);
159 drm_mm_print(&mmu_context->mm, &p);
160 mutex_unlock(&mmu_context->lock);
162 etnaviv_iommu_context_put(mmu_context);
167 static void etnaviv_buffer_dump(struct etnaviv_gpu *gpu, struct seq_file *m)
169 struct etnaviv_cmdbuf *buf = &gpu->buffer;
170 u32 size = buf->size;
171 u32 *ptr = buf->vaddr;
174 seq_printf(m, "virt %p - phys 0x%llx - free 0x%08x\n",
175 buf->vaddr, (u64)etnaviv_cmdbuf_get_pa(buf),
176 size - buf->user_size);
178 for (i = 0; i < size / 4; i++) {
182 seq_printf(m, "\t0x%p: ", ptr + i);
183 seq_printf(m, "%08x ", *(ptr + i));
188 static int etnaviv_ring_show(struct etnaviv_gpu *gpu, struct seq_file *m)
190 seq_printf(m, "Ring Buffer (%s): ", dev_name(gpu->dev));
192 mutex_lock(&gpu->lock);
193 etnaviv_buffer_dump(gpu, m);
194 mutex_unlock(&gpu->lock);
199 static int show_unlocked(struct seq_file *m, void *arg)
201 struct drm_info_node *node = (struct drm_info_node *) m->private;
202 struct drm_device *dev = node->minor->dev;
203 int (*show)(struct drm_device *dev, struct seq_file *m) =
204 node->info_ent->data;
209 static int show_each_gpu(struct seq_file *m, void *arg)
211 struct drm_info_node *node = (struct drm_info_node *) m->private;
212 struct drm_device *dev = node->minor->dev;
213 struct etnaviv_drm_private *priv = dev->dev_private;
214 struct etnaviv_gpu *gpu;
215 int (*show)(struct etnaviv_gpu *gpu, struct seq_file *m) =
216 node->info_ent->data;
220 for (i = 0; i < ETNA_MAX_PIPES; i++) {
233 static struct drm_info_list etnaviv_debugfs_list[] = {
234 {"gpu", show_each_gpu, 0, etnaviv_gpu_debugfs},
235 {"gem", show_unlocked, 0, etnaviv_gem_show},
236 { "mm", show_unlocked, 0, etnaviv_mm_show },
237 {"mmu", show_each_gpu, 0, etnaviv_mmu_show},
238 {"ring", show_each_gpu, 0, etnaviv_ring_show},
241 static void etnaviv_debugfs_init(struct drm_minor *minor)
243 drm_debugfs_create_files(etnaviv_debugfs_list,
244 ARRAY_SIZE(etnaviv_debugfs_list),
245 minor->debugfs_root, minor);
253 static int etnaviv_ioctl_get_param(struct drm_device *dev, void *data,
254 struct drm_file *file)
256 struct etnaviv_drm_private *priv = dev->dev_private;
257 struct drm_etnaviv_param *args = data;
258 struct etnaviv_gpu *gpu;
260 if (args->pipe >= ETNA_MAX_PIPES)
263 gpu = priv->gpu[args->pipe];
267 return etnaviv_gpu_get_param(gpu, args->param, &args->value);
270 static int etnaviv_ioctl_gem_new(struct drm_device *dev, void *data,
271 struct drm_file *file)
273 struct drm_etnaviv_gem_new *args = data;
275 if (args->flags & ~(ETNA_BO_CACHED | ETNA_BO_WC | ETNA_BO_UNCACHED |
279 return etnaviv_gem_new_handle(dev, file, args->size,
280 args->flags, &args->handle);
283 static int etnaviv_ioctl_gem_cpu_prep(struct drm_device *dev, void *data,
284 struct drm_file *file)
286 struct drm_etnaviv_gem_cpu_prep *args = data;
287 struct drm_gem_object *obj;
290 if (args->op & ~(ETNA_PREP_READ | ETNA_PREP_WRITE | ETNA_PREP_NOSYNC))
293 obj = drm_gem_object_lookup(file, args->handle);
297 ret = etnaviv_gem_cpu_prep(obj, args->op, &args->timeout);
299 drm_gem_object_put(obj);
304 static int etnaviv_ioctl_gem_cpu_fini(struct drm_device *dev, void *data,
305 struct drm_file *file)
307 struct drm_etnaviv_gem_cpu_fini *args = data;
308 struct drm_gem_object *obj;
314 obj = drm_gem_object_lookup(file, args->handle);
318 ret = etnaviv_gem_cpu_fini(obj);
320 drm_gem_object_put(obj);
325 static int etnaviv_ioctl_gem_info(struct drm_device *dev, void *data,
326 struct drm_file *file)
328 struct drm_etnaviv_gem_info *args = data;
329 struct drm_gem_object *obj;
335 obj = drm_gem_object_lookup(file, args->handle);
339 ret = etnaviv_gem_mmap_offset(obj, &args->offset);
340 drm_gem_object_put(obj);
345 static int etnaviv_ioctl_wait_fence(struct drm_device *dev, void *data,
346 struct drm_file *file)
348 struct drm_etnaviv_wait_fence *args = data;
349 struct etnaviv_drm_private *priv = dev->dev_private;
350 struct drm_etnaviv_timespec *timeout = &args->timeout;
351 struct etnaviv_gpu *gpu;
353 if (args->flags & ~(ETNA_WAIT_NONBLOCK))
356 if (args->pipe >= ETNA_MAX_PIPES)
359 gpu = priv->gpu[args->pipe];
363 if (args->flags & ETNA_WAIT_NONBLOCK)
366 return etnaviv_gpu_wait_fence_interruptible(gpu, args->fence,
370 static int etnaviv_ioctl_gem_userptr(struct drm_device *dev, void *data,
371 struct drm_file *file)
373 struct drm_etnaviv_gem_userptr *args = data;
375 if (args->flags & ~(ETNA_USERPTR_READ|ETNA_USERPTR_WRITE) ||
379 if (offset_in_page(args->user_ptr | args->user_size) ||
380 (uintptr_t)args->user_ptr != args->user_ptr ||
381 (u32)args->user_size != args->user_size ||
382 args->user_ptr & ~PAGE_MASK)
385 if (!access_ok((void __user *)(unsigned long)args->user_ptr,
389 return etnaviv_gem_new_userptr(dev, file, args->user_ptr,
390 args->user_size, args->flags,
394 static int etnaviv_ioctl_gem_wait(struct drm_device *dev, void *data,
395 struct drm_file *file)
397 struct etnaviv_drm_private *priv = dev->dev_private;
398 struct drm_etnaviv_gem_wait *args = data;
399 struct drm_etnaviv_timespec *timeout = &args->timeout;
400 struct drm_gem_object *obj;
401 struct etnaviv_gpu *gpu;
404 if (args->flags & ~(ETNA_WAIT_NONBLOCK))
407 if (args->pipe >= ETNA_MAX_PIPES)
410 gpu = priv->gpu[args->pipe];
414 obj = drm_gem_object_lookup(file, args->handle);
418 if (args->flags & ETNA_WAIT_NONBLOCK)
421 ret = etnaviv_gem_wait_bo(gpu, obj, timeout);
423 drm_gem_object_put(obj);
428 static int etnaviv_ioctl_pm_query_dom(struct drm_device *dev, void *data,
429 struct drm_file *file)
431 struct etnaviv_drm_private *priv = dev->dev_private;
432 struct drm_etnaviv_pm_domain *args = data;
433 struct etnaviv_gpu *gpu;
435 if (args->pipe >= ETNA_MAX_PIPES)
438 gpu = priv->gpu[args->pipe];
442 return etnaviv_pm_query_dom(gpu, args);
445 static int etnaviv_ioctl_pm_query_sig(struct drm_device *dev, void *data,
446 struct drm_file *file)
448 struct etnaviv_drm_private *priv = dev->dev_private;
449 struct drm_etnaviv_pm_signal *args = data;
450 struct etnaviv_gpu *gpu;
452 if (args->pipe >= ETNA_MAX_PIPES)
455 gpu = priv->gpu[args->pipe];
459 return etnaviv_pm_query_sig(gpu, args);
462 static const struct drm_ioctl_desc etnaviv_ioctls[] = {
463 #define ETNA_IOCTL(n, func, flags) \
464 DRM_IOCTL_DEF_DRV(ETNAVIV_##n, etnaviv_ioctl_##func, flags)
465 ETNA_IOCTL(GET_PARAM, get_param, DRM_RENDER_ALLOW),
466 ETNA_IOCTL(GEM_NEW, gem_new, DRM_RENDER_ALLOW),
467 ETNA_IOCTL(GEM_INFO, gem_info, DRM_RENDER_ALLOW),
468 ETNA_IOCTL(GEM_CPU_PREP, gem_cpu_prep, DRM_RENDER_ALLOW),
469 ETNA_IOCTL(GEM_CPU_FINI, gem_cpu_fini, DRM_RENDER_ALLOW),
470 ETNA_IOCTL(GEM_SUBMIT, gem_submit, DRM_RENDER_ALLOW),
471 ETNA_IOCTL(WAIT_FENCE, wait_fence, DRM_RENDER_ALLOW),
472 ETNA_IOCTL(GEM_USERPTR, gem_userptr, DRM_RENDER_ALLOW),
473 ETNA_IOCTL(GEM_WAIT, gem_wait, DRM_RENDER_ALLOW),
474 ETNA_IOCTL(PM_QUERY_DOM, pm_query_dom, DRM_RENDER_ALLOW),
475 ETNA_IOCTL(PM_QUERY_SIG, pm_query_sig, DRM_RENDER_ALLOW),
478 DEFINE_DRM_GEM_FOPS(fops);
480 static const struct drm_driver etnaviv_drm_driver = {
481 .driver_features = DRIVER_GEM | DRIVER_RENDER,
482 .open = etnaviv_open,
483 .postclose = etnaviv_postclose,
484 .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
485 .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
486 .gem_prime_import_sg_table = etnaviv_gem_prime_import_sg_table,
487 .gem_prime_mmap = drm_gem_prime_mmap,
488 #ifdef CONFIG_DEBUG_FS
489 .debugfs_init = etnaviv_debugfs_init,
491 .ioctls = etnaviv_ioctls,
492 .num_ioctls = DRM_ETNAVIV_NUM_IOCTLS,
495 .desc = "etnaviv DRM",
504 static int etnaviv_bind(struct device *dev)
506 struct etnaviv_drm_private *priv;
507 struct drm_device *drm;
510 drm = drm_dev_alloc(&etnaviv_drm_driver, dev);
514 priv = kzalloc(sizeof(*priv), GFP_KERNEL);
516 dev_err(dev, "failed to allocate private data\n");
520 drm->dev_private = priv;
522 dma_set_max_seg_size(dev, SZ_2G);
524 xa_init_flags(&priv->active_contexts, XA_FLAGS_ALLOC);
526 mutex_init(&priv->gem_lock);
527 INIT_LIST_HEAD(&priv->gem_list);
529 priv->shm_gfp_mask = GFP_HIGHUSER | __GFP_RETRY_MAYFAIL | __GFP_NOWARN;
531 priv->cmdbuf_suballoc = etnaviv_cmdbuf_suballoc_new(drm->dev);
532 if (IS_ERR(priv->cmdbuf_suballoc)) {
533 dev_err(drm->dev, "Failed to create cmdbuf suballocator\n");
534 ret = PTR_ERR(priv->cmdbuf_suballoc);
538 dev_set_drvdata(dev, drm);
540 ret = component_bind_all(dev, drm);
542 goto out_destroy_suballoc;
546 ret = drm_dev_register(drm, 0);
553 component_unbind_all(dev, drm);
554 out_destroy_suballoc:
555 etnaviv_cmdbuf_suballoc_destroy(priv->cmdbuf_suballoc);
564 static void etnaviv_unbind(struct device *dev)
566 struct drm_device *drm = dev_get_drvdata(dev);
567 struct etnaviv_drm_private *priv = drm->dev_private;
569 drm_dev_unregister(drm);
571 component_unbind_all(dev, drm);
573 etnaviv_cmdbuf_suballoc_destroy(priv->cmdbuf_suballoc);
575 xa_destroy(&priv->active_contexts);
577 drm->dev_private = NULL;
583 static const struct component_master_ops etnaviv_master_ops = {
584 .bind = etnaviv_bind,
585 .unbind = etnaviv_unbind,
588 static int etnaviv_pdev_probe(struct platform_device *pdev)
590 struct device *dev = &pdev->dev;
591 struct device_node *first_node = NULL;
592 struct component_match *match = NULL;
594 if (!dev->platform_data) {
595 struct device_node *core_node;
597 for_each_compatible_node(core_node, NULL, "vivante,gc") {
598 if (!of_device_is_available(core_node))
602 first_node = core_node;
604 drm_of_component_match_add(&pdev->dev, &match,
605 component_compare_of, core_node);
608 char **names = dev->platform_data;
611 for (i = 0; names[i]; i++)
612 component_match_add(dev, &match, component_compare_dev_name, names[i]);
616 * PTA and MTLB can have 40 bit base addresses, but
617 * unfortunately, an entry in the MTLB can only point to a
618 * 32 bit base address of a STLB. Moreover, to initialize the
619 * MMU we need a command buffer with a 32 bit address because
620 * without an MMU there is only an indentity mapping between
621 * the internal 32 bit addresses and the bus addresses.
623 * To make things easy, we set the dma_coherent_mask to 32
624 * bit to make sure we are allocating the command buffers and
625 * TLBs in the lower 4 GiB address space.
627 if (dma_set_mask(&pdev->dev, DMA_BIT_MASK(40)) ||
628 dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32))) {
629 dev_dbg(&pdev->dev, "No suitable DMA available\n");
634 * Apply the same DMA configuration to the virtual etnaviv
635 * device as the GPU we found. This assumes that all Vivante
636 * GPUs in the system share the same DMA constraints.
639 of_dma_configure(&pdev->dev, first_node, true);
641 return component_master_add_with_match(dev, &etnaviv_master_ops, match);
644 static int etnaviv_pdev_remove(struct platform_device *pdev)
646 component_master_del(&pdev->dev, &etnaviv_master_ops);
651 static struct platform_driver etnaviv_platform_driver = {
652 .probe = etnaviv_pdev_probe,
653 .remove = etnaviv_pdev_remove,
659 static struct platform_device *etnaviv_drm;
661 static int __init etnaviv_init(void)
663 struct platform_device *pdev;
665 struct device_node *np;
667 etnaviv_validate_init();
669 ret = platform_driver_register(&etnaviv_gpu_driver);
673 ret = platform_driver_register(&etnaviv_platform_driver);
675 goto unregister_gpu_driver;
678 * If the DT contains at least one available GPU device, instantiate
679 * the DRM platform device.
681 for_each_compatible_node(np, NULL, "vivante,gc") {
682 if (!of_device_is_available(np))
685 pdev = platform_device_alloc("etnaviv", PLATFORM_DEVID_NONE);
689 goto unregister_platform_driver;
692 ret = platform_device_add(pdev);
694 platform_device_put(pdev);
696 goto unregister_platform_driver;
706 unregister_platform_driver:
707 platform_driver_unregister(&etnaviv_platform_driver);
708 unregister_gpu_driver:
709 platform_driver_unregister(&etnaviv_gpu_driver);
712 module_init(etnaviv_init);
714 static void __exit etnaviv_exit(void)
716 platform_device_unregister(etnaviv_drm);
717 platform_driver_unregister(&etnaviv_platform_driver);
718 platform_driver_unregister(&etnaviv_gpu_driver);
720 module_exit(etnaviv_exit);
722 MODULE_AUTHOR("Christian Gmeiner <christian.gmeiner@gmail.com>");
723 MODULE_AUTHOR("Russell King <rmk+kernel@armlinux.org.uk>");
724 MODULE_AUTHOR("Lucas Stach <l.stach@pengutronix.de>");
725 MODULE_DESCRIPTION("etnaviv DRM Driver");
726 MODULE_LICENSE("GPL v2");
727 MODULE_ALIAS("platform:etnaviv");