2 * Copyright © 2006 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
24 * Eric Anholt <eric@anholt.net>
27 #include <linux/dmi.h>
28 #include <drm/drm_dp_helper.h>
30 #include <drm/i915_drm.h>
32 #include "intel_bios.h"
34 #define SLAVE_ADDR1 0x70
35 #define SLAVE_ADDR2 0x72
37 static int panel_type;
40 find_section(const void *_bdb, int section_id)
42 const struct bdb_header *bdb = _bdb;
43 const u8 *base = _bdb;
45 u16 total, current_size;
48 /* skip to first section */
49 index += bdb->header_size;
50 total = bdb->bdb_size;
52 /* walk the sections looking for section_id */
53 while (index + 3 < total) {
54 current_id = *(base + index);
57 current_size = *((const u16 *)(base + index));
60 if (index + current_size > total)
63 if (current_id == section_id)
66 index += current_size;
73 get_blocksize(const void *p)
75 u16 *block_ptr, block_size;
77 block_ptr = (u16 *)((char *)p - 2);
78 block_size = *block_ptr;
83 fill_detail_timing_data(struct drm_display_mode *panel_fixed_mode,
84 const struct lvds_dvo_timing *dvo_timing)
86 panel_fixed_mode->hdisplay = (dvo_timing->hactive_hi << 8) |
87 dvo_timing->hactive_lo;
88 panel_fixed_mode->hsync_start = panel_fixed_mode->hdisplay +
89 ((dvo_timing->hsync_off_hi << 8) | dvo_timing->hsync_off_lo);
90 panel_fixed_mode->hsync_end = panel_fixed_mode->hsync_start +
91 dvo_timing->hsync_pulse_width;
92 panel_fixed_mode->htotal = panel_fixed_mode->hdisplay +
93 ((dvo_timing->hblank_hi << 8) | dvo_timing->hblank_lo);
95 panel_fixed_mode->vdisplay = (dvo_timing->vactive_hi << 8) |
96 dvo_timing->vactive_lo;
97 panel_fixed_mode->vsync_start = panel_fixed_mode->vdisplay +
98 dvo_timing->vsync_off;
99 panel_fixed_mode->vsync_end = panel_fixed_mode->vsync_start +
100 dvo_timing->vsync_pulse_width;
101 panel_fixed_mode->vtotal = panel_fixed_mode->vdisplay +
102 ((dvo_timing->vblank_hi << 8) | dvo_timing->vblank_lo);
103 panel_fixed_mode->clock = dvo_timing->clock * 10;
104 panel_fixed_mode->type = DRM_MODE_TYPE_PREFERRED;
106 if (dvo_timing->hsync_positive)
107 panel_fixed_mode->flags |= DRM_MODE_FLAG_PHSYNC;
109 panel_fixed_mode->flags |= DRM_MODE_FLAG_NHSYNC;
111 if (dvo_timing->vsync_positive)
112 panel_fixed_mode->flags |= DRM_MODE_FLAG_PVSYNC;
114 panel_fixed_mode->flags |= DRM_MODE_FLAG_NVSYNC;
116 /* Some VBTs have bogus h/vtotal values */
117 if (panel_fixed_mode->hsync_end > panel_fixed_mode->htotal)
118 panel_fixed_mode->htotal = panel_fixed_mode->hsync_end + 1;
119 if (panel_fixed_mode->vsync_end > panel_fixed_mode->vtotal)
120 panel_fixed_mode->vtotal = panel_fixed_mode->vsync_end + 1;
122 drm_mode_set_name(panel_fixed_mode);
126 lvds_dvo_timing_equal_size(const struct lvds_dvo_timing *a,
127 const struct lvds_dvo_timing *b)
129 if (a->hactive_hi != b->hactive_hi ||
130 a->hactive_lo != b->hactive_lo)
133 if (a->hsync_off_hi != b->hsync_off_hi ||
134 a->hsync_off_lo != b->hsync_off_lo)
137 if (a->hsync_pulse_width != b->hsync_pulse_width)
140 if (a->hblank_hi != b->hblank_hi ||
141 a->hblank_lo != b->hblank_lo)
144 if (a->vactive_hi != b->vactive_hi ||
145 a->vactive_lo != b->vactive_lo)
148 if (a->vsync_off != b->vsync_off)
151 if (a->vsync_pulse_width != b->vsync_pulse_width)
154 if (a->vblank_hi != b->vblank_hi ||
155 a->vblank_lo != b->vblank_lo)
161 static const struct lvds_dvo_timing *
162 get_lvds_dvo_timing(const struct bdb_lvds_lfp_data *lvds_lfp_data,
163 const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs,
167 * the size of fp_timing varies on the different platform.
168 * So calculate the DVO timing relative offset in LVDS data
169 * entry to get the DVO timing entry
173 lvds_lfp_data_ptrs->ptr[1].dvo_timing_offset -
174 lvds_lfp_data_ptrs->ptr[0].dvo_timing_offset;
175 int dvo_timing_offset =
176 lvds_lfp_data_ptrs->ptr[0].dvo_timing_offset -
177 lvds_lfp_data_ptrs->ptr[0].fp_timing_offset;
178 char *entry = (char *)lvds_lfp_data->data + lfp_data_size * index;
180 return (struct lvds_dvo_timing *)(entry + dvo_timing_offset);
183 /* get lvds_fp_timing entry
184 * this function may return NULL if the corresponding entry is invalid
186 static const struct lvds_fp_timing *
187 get_lvds_fp_timing(const struct bdb_header *bdb,
188 const struct bdb_lvds_lfp_data *data,
189 const struct bdb_lvds_lfp_data_ptrs *ptrs,
192 size_t data_ofs = (const u8 *)data - (const u8 *)bdb;
193 u16 data_size = ((const u16 *)data)[-1]; /* stored in header */
196 if (index >= ARRAY_SIZE(ptrs->ptr))
198 ofs = ptrs->ptr[index].fp_timing_offset;
199 if (ofs < data_ofs ||
200 ofs + sizeof(struct lvds_fp_timing) > data_ofs + data_size)
202 return (const struct lvds_fp_timing *)((const u8 *)bdb + ofs);
205 /* Try to find integrated panel data */
207 parse_lfp_panel_data(struct drm_i915_private *dev_priv,
208 struct bdb_header *bdb)
210 const struct bdb_lvds_options *lvds_options;
211 const struct bdb_lvds_lfp_data *lvds_lfp_data;
212 const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs;
213 const struct lvds_dvo_timing *panel_dvo_timing;
214 const struct lvds_fp_timing *fp_timing;
215 struct drm_display_mode *panel_fixed_mode;
216 int i, downclock, drrs_mode;
218 lvds_options = find_section(bdb, BDB_LVDS_OPTIONS);
222 dev_priv->vbt.lvds_dither = lvds_options->pixel_dither;
223 if (lvds_options->panel_type == 0xff)
226 panel_type = lvds_options->panel_type;
228 drrs_mode = (lvds_options->dps_panel_type_bits
229 >> (panel_type * 2)) & MODE_MASK;
231 * VBT has static DRRS = 0 and seamless DRRS = 2.
232 * The below piece of code is required to adjust vbt.drrs_type
233 * to match the enum drrs_support_type.
237 dev_priv->vbt.drrs_type = STATIC_DRRS_SUPPORT;
238 DRM_DEBUG_KMS("DRRS supported mode is static\n");
241 dev_priv->vbt.drrs_type = SEAMLESS_DRRS_SUPPORT;
242 DRM_DEBUG_KMS("DRRS supported mode is seamless\n");
245 dev_priv->vbt.drrs_type = DRRS_NOT_SUPPORTED;
246 DRM_DEBUG_KMS("DRRS not supported (VBT input)\n");
250 lvds_lfp_data = find_section(bdb, BDB_LVDS_LFP_DATA);
254 lvds_lfp_data_ptrs = find_section(bdb, BDB_LVDS_LFP_DATA_PTRS);
255 if (!lvds_lfp_data_ptrs)
258 dev_priv->vbt.lvds_vbt = 1;
260 panel_dvo_timing = get_lvds_dvo_timing(lvds_lfp_data,
262 lvds_options->panel_type);
264 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
265 if (!panel_fixed_mode)
268 fill_detail_timing_data(panel_fixed_mode, panel_dvo_timing);
270 dev_priv->vbt.lfp_lvds_vbt_mode = panel_fixed_mode;
272 DRM_DEBUG_KMS("Found panel mode in BIOS VBT tables:\n");
273 drm_mode_debug_printmodeline(panel_fixed_mode);
276 * Iterate over the LVDS panel timing info to find the lowest clock
277 * for the native resolution.
279 downclock = panel_dvo_timing->clock;
280 for (i = 0; i < 16; i++) {
281 const struct lvds_dvo_timing *dvo_timing;
283 dvo_timing = get_lvds_dvo_timing(lvds_lfp_data,
286 if (lvds_dvo_timing_equal_size(dvo_timing, panel_dvo_timing) &&
287 dvo_timing->clock < downclock)
288 downclock = dvo_timing->clock;
291 if (downclock < panel_dvo_timing->clock && i915.lvds_downclock) {
292 dev_priv->lvds_downclock_avail = 1;
293 dev_priv->lvds_downclock = downclock * 10;
294 DRM_DEBUG_KMS("LVDS downclock is found in VBT. "
295 "Normal Clock %dKHz, downclock %dKHz\n",
296 panel_fixed_mode->clock, 10*downclock);
299 fp_timing = get_lvds_fp_timing(bdb, lvds_lfp_data,
301 lvds_options->panel_type);
303 /* check the resolution, just to be sure */
304 if (fp_timing->x_res == panel_fixed_mode->hdisplay &&
305 fp_timing->y_res == panel_fixed_mode->vdisplay) {
306 dev_priv->vbt.bios_lvds_val = fp_timing->lvds_reg_val;
307 DRM_DEBUG_KMS("VBT initial LVDS value %x\n",
308 dev_priv->vbt.bios_lvds_val);
314 parse_lfp_backlight(struct drm_i915_private *dev_priv, struct bdb_header *bdb)
316 const struct bdb_lfp_backlight_data *backlight_data;
317 const struct bdb_lfp_backlight_data_entry *entry;
319 backlight_data = find_section(bdb, BDB_LVDS_BACKLIGHT);
323 if (backlight_data->entry_size != sizeof(backlight_data->data[0])) {
324 DRM_DEBUG_KMS("Unsupported backlight data entry size %u\n",
325 backlight_data->entry_size);
329 entry = &backlight_data->data[panel_type];
331 dev_priv->vbt.backlight.present = entry->type == BDB_BACKLIGHT_TYPE_PWM;
332 if (!dev_priv->vbt.backlight.present) {
333 DRM_DEBUG_KMS("PWM backlight not present in VBT (type %u)\n",
338 dev_priv->vbt.backlight.pwm_freq_hz = entry->pwm_freq_hz;
339 dev_priv->vbt.backlight.active_low_pwm = entry->active_low_pwm;
340 dev_priv->vbt.backlight.min_brightness = entry->min_brightness;
341 DRM_DEBUG_KMS("VBT backlight PWM modulation frequency %u Hz, "
342 "active %s, min brightness %u, level %u\n",
343 dev_priv->vbt.backlight.pwm_freq_hz,
344 dev_priv->vbt.backlight.active_low_pwm ? "low" : "high",
345 dev_priv->vbt.backlight.min_brightness,
346 backlight_data->level[panel_type]);
349 /* Try to find sdvo panel data */
351 parse_sdvo_panel_data(struct drm_i915_private *dev_priv,
352 struct bdb_header *bdb)
354 const struct lvds_dvo_timing *dvo_timing;
355 struct drm_display_mode *panel_fixed_mode;
358 index = i915.vbt_sdvo_panel_type;
360 DRM_DEBUG_KMS("Ignore SDVO panel mode from BIOS VBT tables.\n");
365 const struct bdb_sdvo_lvds_options *sdvo_lvds_options;
367 sdvo_lvds_options = find_section(bdb, BDB_SDVO_LVDS_OPTIONS);
368 if (!sdvo_lvds_options)
371 index = sdvo_lvds_options->panel_type;
374 dvo_timing = find_section(bdb, BDB_SDVO_PANEL_DTDS);
378 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
379 if (!panel_fixed_mode)
382 fill_detail_timing_data(panel_fixed_mode, dvo_timing + index);
384 dev_priv->vbt.sdvo_lvds_vbt_mode = panel_fixed_mode;
386 DRM_DEBUG_KMS("Found SDVO panel mode in BIOS VBT tables:\n");
387 drm_mode_debug_printmodeline(panel_fixed_mode);
390 static int intel_bios_ssc_frequency(struct drm_device *dev,
393 switch (INTEL_INFO(dev)->gen) {
395 return alternate ? 66667 : 48000;
398 return alternate ? 100000 : 96000;
400 return alternate ? 100000 : 120000;
405 parse_general_features(struct drm_i915_private *dev_priv,
406 struct bdb_header *bdb)
408 struct drm_device *dev = dev_priv->dev;
409 const struct bdb_general_features *general;
411 general = find_section(bdb, BDB_GENERAL_FEATURES);
413 dev_priv->vbt.int_tv_support = general->int_tv_support;
414 dev_priv->vbt.int_crt_support = general->int_crt_support;
415 dev_priv->vbt.lvds_use_ssc = general->enable_ssc;
416 dev_priv->vbt.lvds_ssc_freq =
417 intel_bios_ssc_frequency(dev, general->ssc_freq);
418 dev_priv->vbt.display_clock_mode = general->display_clock_mode;
419 dev_priv->vbt.fdi_rx_polarity_inverted = general->fdi_rx_polarity_inverted;
420 DRM_DEBUG_KMS("BDB_GENERAL_FEATURES int_tv_support %d int_crt_support %d lvds_use_ssc %d lvds_ssc_freq %d display_clock_mode %d fdi_rx_polarity_inverted %d\n",
421 dev_priv->vbt.int_tv_support,
422 dev_priv->vbt.int_crt_support,
423 dev_priv->vbt.lvds_use_ssc,
424 dev_priv->vbt.lvds_ssc_freq,
425 dev_priv->vbt.display_clock_mode,
426 dev_priv->vbt.fdi_rx_polarity_inverted);
431 parse_general_definitions(struct drm_i915_private *dev_priv,
432 struct bdb_header *bdb)
434 const struct bdb_general_definitions *general;
436 general = find_section(bdb, BDB_GENERAL_DEFINITIONS);
438 u16 block_size = get_blocksize(general);
439 if (block_size >= sizeof(*general)) {
440 int bus_pin = general->crt_ddc_gmbus_pin;
441 DRM_DEBUG_KMS("crt_ddc_bus_pin: %d\n", bus_pin);
442 if (intel_gmbus_is_valid_pin(dev_priv, bus_pin))
443 dev_priv->vbt.crt_ddc_pin = bus_pin;
445 DRM_DEBUG_KMS("BDB_GD too small (%d). Invalid.\n",
451 static const union child_device_config *
452 child_device_ptr(const struct bdb_general_definitions *p_defs, int i)
454 return (const void *) &p_defs->devices[i * p_defs->child_dev_size];
458 parse_sdvo_device_mapping(struct drm_i915_private *dev_priv,
459 struct bdb_header *bdb)
461 struct sdvo_device_mapping *p_mapping;
462 const struct bdb_general_definitions *p_defs;
463 const union child_device_config *p_child;
464 int i, child_device_num, count;
467 p_defs = find_section(bdb, BDB_GENERAL_DEFINITIONS);
469 DRM_DEBUG_KMS("No general definition block is found, unable to construct sdvo mapping.\n");
472 /* judge whether the size of child device meets the requirements.
473 * If the child device size obtained from general definition block
474 * is different with sizeof(struct child_device_config), skip the
475 * parsing of sdvo device info
477 if (p_defs->child_dev_size != sizeof(*p_child)) {
478 /* different child dev size . Ignore it */
479 DRM_DEBUG_KMS("different child size is found. Invalid.\n");
482 /* get the block size of general definitions */
483 block_size = get_blocksize(p_defs);
484 /* get the number of child device */
485 child_device_num = (block_size - sizeof(*p_defs)) /
486 p_defs->child_dev_size;
488 for (i = 0; i < child_device_num; i++) {
489 p_child = child_device_ptr(p_defs, i);
490 if (!p_child->old.device_type) {
491 /* skip the device block if device type is invalid */
494 if (p_child->old.slave_addr != SLAVE_ADDR1 &&
495 p_child->old.slave_addr != SLAVE_ADDR2) {
497 * If the slave address is neither 0x70 nor 0x72,
498 * it is not a SDVO device. Skip it.
502 if (p_child->old.dvo_port != DEVICE_PORT_DVOB &&
503 p_child->old.dvo_port != DEVICE_PORT_DVOC) {
504 /* skip the incorrect SDVO port */
505 DRM_DEBUG_KMS("Incorrect SDVO port. Skip it\n");
508 DRM_DEBUG_KMS("the SDVO device with slave addr %2x is found on"
510 p_child->old.slave_addr,
511 (p_child->old.dvo_port == DEVICE_PORT_DVOB) ?
513 p_mapping = &(dev_priv->sdvo_mappings[p_child->old.dvo_port - 1]);
514 if (!p_mapping->initialized) {
515 p_mapping->dvo_port = p_child->old.dvo_port;
516 p_mapping->slave_addr = p_child->old.slave_addr;
517 p_mapping->dvo_wiring = p_child->old.dvo_wiring;
518 p_mapping->ddc_pin = p_child->old.ddc_pin;
519 p_mapping->i2c_pin = p_child->old.i2c_pin;
520 p_mapping->initialized = 1;
521 DRM_DEBUG_KMS("SDVO device: dvo=%x, addr=%x, wiring=%d, ddc_pin=%d, i2c_pin=%d\n",
523 p_mapping->slave_addr,
524 p_mapping->dvo_wiring,
528 DRM_DEBUG_KMS("Maybe one SDVO port is shared by "
529 "two SDVO device.\n");
531 if (p_child->old.slave2_addr) {
532 /* Maybe this is a SDVO device with multiple inputs */
533 /* And the mapping info is not added */
534 DRM_DEBUG_KMS("there exists the slave2_addr. Maybe this"
535 " is a SDVO device with multiple inputs.\n");
541 /* No SDVO device info is found */
542 DRM_DEBUG_KMS("No SDVO device info is found in VBT\n");
548 parse_driver_features(struct drm_i915_private *dev_priv,
549 struct bdb_header *bdb)
551 const struct bdb_driver_features *driver;
553 driver = find_section(bdb, BDB_DRIVER_FEATURES);
557 if (driver->lvds_config == BDB_DRIVER_FEATURE_EDP)
558 dev_priv->vbt.edp_support = 1;
560 if (driver->dual_frequency)
561 dev_priv->render_reclock_avail = true;
563 DRM_DEBUG_KMS("DRRS State Enabled:%d\n", driver->drrs_enabled);
565 * If DRRS is not supported, drrs_type has to be set to 0.
566 * This is because, VBT is configured in such a way that
567 * static DRRS is 0 and DRRS not supported is represented by
568 * driver->drrs_enabled=false
570 if (!driver->drrs_enabled)
571 dev_priv->vbt.drrs_type = DRRS_NOT_SUPPORTED;
575 parse_edp(struct drm_i915_private *dev_priv, struct bdb_header *bdb)
577 const struct bdb_edp *edp;
578 const struct edp_power_seq *edp_pps;
579 const struct edp_link_params *edp_link_params;
581 edp = find_section(bdb, BDB_EDP);
583 if (dev_priv->vbt.edp_support)
584 DRM_DEBUG_KMS("No eDP BDB found but eDP panel supported.\n");
588 switch ((edp->color_depth >> (panel_type * 2)) & 3) {
590 dev_priv->vbt.edp_bpp = 18;
593 dev_priv->vbt.edp_bpp = 24;
596 dev_priv->vbt.edp_bpp = 30;
600 /* Get the eDP sequencing and link info */
601 edp_pps = &edp->power_seqs[panel_type];
602 edp_link_params = &edp->link_params[panel_type];
604 dev_priv->vbt.edp_pps = *edp_pps;
606 switch (edp_link_params->rate) {
608 dev_priv->vbt.edp_rate = DP_LINK_BW_1_62;
611 dev_priv->vbt.edp_rate = DP_LINK_BW_2_7;
614 DRM_DEBUG_KMS("VBT has unknown eDP link rate value %u\n",
615 edp_link_params->rate);
619 switch (edp_link_params->lanes) {
621 dev_priv->vbt.edp_lanes = 1;
624 dev_priv->vbt.edp_lanes = 2;
627 dev_priv->vbt.edp_lanes = 4;
630 DRM_DEBUG_KMS("VBT has unknown eDP lane count value %u\n",
631 edp_link_params->lanes);
635 switch (edp_link_params->preemphasis) {
636 case EDP_PREEMPHASIS_NONE:
637 dev_priv->vbt.edp_preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_0;
639 case EDP_PREEMPHASIS_3_5dB:
640 dev_priv->vbt.edp_preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_1;
642 case EDP_PREEMPHASIS_6dB:
643 dev_priv->vbt.edp_preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_2;
645 case EDP_PREEMPHASIS_9_5dB:
646 dev_priv->vbt.edp_preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_3;
649 DRM_DEBUG_KMS("VBT has unknown eDP pre-emphasis value %u\n",
650 edp_link_params->preemphasis);
654 switch (edp_link_params->vswing) {
655 case EDP_VSWING_0_4V:
656 dev_priv->vbt.edp_vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_0;
658 case EDP_VSWING_0_6V:
659 dev_priv->vbt.edp_vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_1;
661 case EDP_VSWING_0_8V:
662 dev_priv->vbt.edp_vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_2;
664 case EDP_VSWING_1_2V:
665 dev_priv->vbt.edp_vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_3;
668 DRM_DEBUG_KMS("VBT has unknown eDP voltage swing value %u\n",
669 edp_link_params->vswing);
673 if (bdb->version >= 173) {
676 /* Don't read from VBT if module parameter has valid value*/
677 if (i915.edp_vswing) {
678 dev_priv->edp_low_vswing = i915.edp_vswing == 1;
680 vswing = (edp->edp_vswing_preemph >> (panel_type * 4)) & 0xF;
681 dev_priv->edp_low_vswing = vswing == 0;
687 parse_psr(struct drm_i915_private *dev_priv, struct bdb_header *bdb)
689 const struct bdb_psr *psr;
690 const struct psr_table *psr_table;
692 psr = find_section(bdb, BDB_PSR);
694 DRM_DEBUG_KMS("No PSR BDB found.\n");
698 psr_table = &psr->psr_table[panel_type];
700 dev_priv->vbt.psr.full_link = psr_table->full_link;
701 dev_priv->vbt.psr.require_aux_wakeup = psr_table->require_aux_to_wakeup;
703 /* Allowed VBT values goes from 0 to 15 */
704 dev_priv->vbt.psr.idle_frames = psr_table->idle_frames < 0 ? 0 :
705 psr_table->idle_frames > 15 ? 15 : psr_table->idle_frames;
707 switch (psr_table->lines_to_wait) {
709 dev_priv->vbt.psr.lines_to_wait = PSR_0_LINES_TO_WAIT;
712 dev_priv->vbt.psr.lines_to_wait = PSR_1_LINE_TO_WAIT;
715 dev_priv->vbt.psr.lines_to_wait = PSR_4_LINES_TO_WAIT;
718 dev_priv->vbt.psr.lines_to_wait = PSR_8_LINES_TO_WAIT;
721 DRM_DEBUG_KMS("VBT has unknown PSR lines to wait %u\n",
722 psr_table->lines_to_wait);
726 dev_priv->vbt.psr.tp1_wakeup_time = psr_table->tp1_wakeup_time;
727 dev_priv->vbt.psr.tp2_tp3_wakeup_time = psr_table->tp2_tp3_wakeup_time;
730 static u8 *goto_next_sequence(u8 *data, int *size)
738 /* goto first element */
742 case MIPI_SEQ_ELEM_SEND_PKT:
744 * skip by this element payload size
745 * skip elem id, command flag and data type
752 len = *((u16 *)data);
759 data = data + 2 + len;
761 case MIPI_SEQ_ELEM_DELAY:
762 /* skip by elem id, and delay is 4 bytes */
769 case MIPI_SEQ_ELEM_GPIO:
777 DRM_ERROR("Unknown element\n");
781 /* end of sequence ? */
786 /* goto next sequence or end of block byte */
792 /* update amount of data left for the sequence block to be parsed */
798 parse_mipi(struct drm_i915_private *dev_priv, struct bdb_header *bdb)
800 const struct bdb_mipi_config *start;
801 const struct bdb_mipi_sequence *sequence;
802 const struct mipi_config *config;
803 const struct mipi_pps_data *pps;
806 int i, panel_id, seq_size;
809 /* parse MIPI blocks only if LFP type is MIPI */
810 if (!dev_priv->vbt.has_mipi)
813 /* Initialize this to undefined indicating no generic MIPI support */
814 dev_priv->vbt.dsi.panel_id = MIPI_DSI_UNDEFINED_PANEL_ID;
816 /* Block #40 is already parsed and panel_fixed_mode is
817 * stored in dev_priv->lfp_lvds_vbt_mode
818 * resuse this when needed
821 /* Parse #52 for panel index used from panel_type already
824 start = find_section(bdb, BDB_MIPI_CONFIG);
826 DRM_DEBUG_KMS("No MIPI config BDB found");
830 DRM_DEBUG_DRIVER("Found MIPI Config block, panel index = %d\n",
834 * get hold of the correct configuration block and pps data as per
835 * the panel_type as index
837 config = &start->config[panel_type];
838 pps = &start->pps[panel_type];
840 /* store as of now full data. Trim when we realise all is not needed */
841 dev_priv->vbt.dsi.config = kmemdup(config, sizeof(struct mipi_config), GFP_KERNEL);
842 if (!dev_priv->vbt.dsi.config)
845 dev_priv->vbt.dsi.pps = kmemdup(pps, sizeof(struct mipi_pps_data), GFP_KERNEL);
846 if (!dev_priv->vbt.dsi.pps) {
847 kfree(dev_priv->vbt.dsi.config);
851 /* We have mandatory mipi config blocks. Initialize as generic panel */
852 dev_priv->vbt.dsi.panel_id = MIPI_DSI_GENERIC_PANEL_ID;
854 /* Check if we have sequence block as well */
855 sequence = find_section(bdb, BDB_MIPI_SEQUENCE);
857 DRM_DEBUG_KMS("No MIPI Sequence found, parsing complete\n");
861 DRM_DEBUG_DRIVER("Found MIPI sequence block\n");
863 block_size = get_blocksize(sequence);
866 * parse the sequence block for individual sequences
868 dev_priv->vbt.dsi.seq_version = sequence->version;
870 seq_data = &sequence->data[0];
873 * sequence block is variable length and hence we need to parse and
874 * get the sequence data for specific panel id
876 for (i = 0; i < MAX_MIPI_CONFIGURATIONS; i++) {
877 panel_id = *seq_data;
878 seq_size = *((u16 *) (seq_data + 1));
879 if (panel_id == panel_type)
882 /* skip the sequence including seq header of 3 bytes */
883 seq_data = seq_data + 3 + seq_size;
884 if ((seq_data - &sequence->data[0]) > block_size) {
885 DRM_ERROR("Sequence start is beyond sequence block size, corrupted sequence block\n");
890 if (i == MAX_MIPI_CONFIGURATIONS) {
891 DRM_ERROR("Sequence block detected but no valid configuration\n");
895 /* check if found sequence is completely within the sequence block
896 * just being paranoid */
897 if (seq_size > block_size) {
898 DRM_ERROR("Corrupted sequence/size, bailing out\n");
902 /* skip the panel id(1 byte) and seq size(2 bytes) */
903 dev_priv->vbt.dsi.data = kmemdup(seq_data + 3, seq_size, GFP_KERNEL);
904 if (!dev_priv->vbt.dsi.data)
908 * loop into the sequence data and split into multiple sequneces
909 * There are only 5 types of sequences as of now
911 data = dev_priv->vbt.dsi.data;
912 dev_priv->vbt.dsi.size = seq_size;
914 /* two consecutive 0x00 indicate end of all sequences */
917 if (MIPI_SEQ_MAX > seq_id && seq_id > MIPI_SEQ_UNDEFINED) {
918 dev_priv->vbt.dsi.sequence[seq_id] = data;
919 DRM_DEBUG_DRIVER("Found mipi sequence - %d\n", seq_id);
921 DRM_ERROR("undefined sequence\n");
925 /* partial parsing to skip elements */
926 data = goto_next_sequence(data, &seq_size);
929 DRM_ERROR("Sequence elements going beyond block itself. Sequence block parsing failed\n");
934 break; /* end of sequence reached */
937 DRM_DEBUG_DRIVER("MIPI related vbt parsing complete\n");
940 kfree(dev_priv->vbt.dsi.data);
941 dev_priv->vbt.dsi.data = NULL;
943 /* error during parsing so set all pointers to null
944 * because of partial parsing */
945 memset(dev_priv->vbt.dsi.sequence, 0, sizeof(dev_priv->vbt.dsi.sequence));
948 static void parse_ddi_port(struct drm_i915_private *dev_priv, enum port port,
949 struct bdb_header *bdb)
951 union child_device_config *it, *child = NULL;
952 struct ddi_vbt_port_info *info = &dev_priv->vbt.ddi_port_info[port];
953 uint8_t hdmi_level_shift;
955 bool is_dvi, is_hdmi, is_dp, is_edp, is_crt;
957 /* Each DDI port can have more than one value on the "DVO Port" field,
958 * so look for all the possible values for each port and abort if more
959 * than one is found. */
960 int dvo_ports[][2] = {
961 {DVO_PORT_HDMIA, DVO_PORT_DPA},
962 {DVO_PORT_HDMIB, DVO_PORT_DPB},
963 {DVO_PORT_HDMIC, DVO_PORT_DPC},
964 {DVO_PORT_HDMID, DVO_PORT_DPD},
965 {DVO_PORT_CRT, -1 /* Port E can only be DVO_PORT_CRT */ },
968 /* Find the child device to use, abort if more than one found. */
969 for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
970 it = dev_priv->vbt.child_dev + i;
972 for (j = 0; j < 2; j++) {
973 if (dvo_ports[port][j] == -1)
976 if (it->common.dvo_port == dvo_ports[port][j]) {
978 DRM_DEBUG_KMS("More than one child device for port %c in VBT.\n",
989 aux_channel = child->raw[25];
991 is_dvi = child->common.device_type & DEVICE_TYPE_TMDS_DVI_SIGNALING;
992 is_dp = child->common.device_type & DEVICE_TYPE_DISPLAYPORT_OUTPUT;
993 is_crt = child->common.device_type & DEVICE_TYPE_ANALOG_OUTPUT;
994 is_hdmi = is_dvi && (child->common.device_type & DEVICE_TYPE_NOT_HDMI_OUTPUT) == 0;
995 is_edp = is_dp && (child->common.device_type & DEVICE_TYPE_INTERNAL_CONNECTOR);
997 info->supports_dvi = is_dvi;
998 info->supports_hdmi = is_hdmi;
999 info->supports_dp = is_dp;
1001 DRM_DEBUG_KMS("Port %c VBT info: DP:%d HDMI:%d DVI:%d EDP:%d CRT:%d\n",
1002 port_name(port), is_dp, is_hdmi, is_dvi, is_edp, is_crt);
1004 if (is_edp && is_dvi)
1005 DRM_DEBUG_KMS("Internal DP port %c is TMDS compatible\n",
1007 if (is_crt && port != PORT_E)
1008 DRM_DEBUG_KMS("Port %c is analog\n", port_name(port));
1009 if (is_crt && (is_dvi || is_dp))
1010 DRM_DEBUG_KMS("Analog port %c is also DP or TMDS compatible\n",
1012 if (is_dvi && (port == PORT_A || port == PORT_E))
1013 DRM_DEBUG_KMS("Port %c is TMDS compatible\n", port_name(port));
1014 if (!is_dvi && !is_dp && !is_crt)
1015 DRM_DEBUG_KMS("Port %c is not DP/TMDS/CRT compatible\n",
1017 if (is_edp && (port == PORT_B || port == PORT_C || port == PORT_E))
1018 DRM_DEBUG_KMS("Port %c is internal DP\n", port_name(port));
1021 if (child->common.ddc_pin == 0x05 && port != PORT_B)
1022 DRM_DEBUG_KMS("Unexpected DDC pin for port B\n");
1023 if (child->common.ddc_pin == 0x04 && port != PORT_C)
1024 DRM_DEBUG_KMS("Unexpected DDC pin for port C\n");
1025 if (child->common.ddc_pin == 0x06 && port != PORT_D)
1026 DRM_DEBUG_KMS("Unexpected DDC pin for port D\n");
1030 if (aux_channel == 0x40 && port != PORT_A)
1031 DRM_DEBUG_KMS("Unexpected AUX channel for port A\n");
1032 if (aux_channel == 0x10 && port != PORT_B)
1033 DRM_DEBUG_KMS("Unexpected AUX channel for port B\n");
1034 if (aux_channel == 0x20 && port != PORT_C)
1035 DRM_DEBUG_KMS("Unexpected AUX channel for port C\n");
1036 if (aux_channel == 0x30 && port != PORT_D)
1037 DRM_DEBUG_KMS("Unexpected AUX channel for port D\n");
1040 if (bdb->version >= 158) {
1041 /* The VBT HDMI level shift values match the table we have. */
1042 hdmi_level_shift = child->raw[7] & 0xF;
1043 DRM_DEBUG_KMS("VBT HDMI level shift for port %c: %d\n",
1046 info->hdmi_level_shift = hdmi_level_shift;
1050 static void parse_ddi_ports(struct drm_i915_private *dev_priv,
1051 struct bdb_header *bdb)
1053 struct drm_device *dev = dev_priv->dev;
1059 if (!dev_priv->vbt.child_dev_num)
1062 if (bdb->version < 155)
1065 for (port = PORT_A; port < I915_MAX_PORTS; port++)
1066 parse_ddi_port(dev_priv, port, bdb);
1070 parse_device_mapping(struct drm_i915_private *dev_priv,
1071 struct bdb_header *bdb)
1073 const struct bdb_general_definitions *p_defs;
1074 const union child_device_config *p_child;
1075 union child_device_config *child_dev_ptr;
1076 int i, child_device_num, count;
1079 p_defs = find_section(bdb, BDB_GENERAL_DEFINITIONS);
1081 DRM_DEBUG_KMS("No general definition block is found, no devices defined.\n");
1084 if (p_defs->child_dev_size < sizeof(*p_child)) {
1085 DRM_ERROR("General definiton block child device size is too small.\n");
1088 /* get the block size of general definitions */
1089 block_size = get_blocksize(p_defs);
1090 /* get the number of child device */
1091 child_device_num = (block_size - sizeof(*p_defs)) /
1092 p_defs->child_dev_size;
1094 /* get the number of child device that is present */
1095 for (i = 0; i < child_device_num; i++) {
1096 p_child = child_device_ptr(p_defs, i);
1097 if (!p_child->common.device_type) {
1098 /* skip the device block if device type is invalid */
1104 DRM_DEBUG_KMS("no child dev is parsed from VBT\n");
1107 dev_priv->vbt.child_dev = kcalloc(count, sizeof(*p_child), GFP_KERNEL);
1108 if (!dev_priv->vbt.child_dev) {
1109 DRM_DEBUG_KMS("No memory space for child device\n");
1113 dev_priv->vbt.child_dev_num = count;
1115 for (i = 0; i < child_device_num; i++) {
1116 p_child = child_device_ptr(p_defs, i);
1117 if (!p_child->common.device_type) {
1118 /* skip the device block if device type is invalid */
1122 if (p_child->common.dvo_port >= DVO_PORT_MIPIA
1123 && p_child->common.dvo_port <= DVO_PORT_MIPID
1124 &&p_child->common.device_type & DEVICE_TYPE_MIPI_OUTPUT) {
1125 DRM_DEBUG_KMS("Found MIPI as LFP\n");
1126 dev_priv->vbt.has_mipi = 1;
1127 dev_priv->vbt.dsi.port = p_child->common.dvo_port;
1130 child_dev_ptr = dev_priv->vbt.child_dev + count;
1132 memcpy(child_dev_ptr, p_child, sizeof(*p_child));
1138 init_vbt_defaults(struct drm_i915_private *dev_priv)
1140 struct drm_device *dev = dev_priv->dev;
1143 dev_priv->vbt.crt_ddc_pin = GMBUS_PIN_VGADDC;
1145 /* Default to having backlight */
1146 dev_priv->vbt.backlight.present = true;
1148 /* LFP panel data */
1149 dev_priv->vbt.lvds_dither = 1;
1150 dev_priv->vbt.lvds_vbt = 0;
1152 /* SDVO panel data */
1153 dev_priv->vbt.sdvo_lvds_vbt_mode = NULL;
1155 /* general features */
1156 dev_priv->vbt.int_tv_support = 1;
1157 dev_priv->vbt.int_crt_support = 1;
1159 /* Default to using SSC */
1160 dev_priv->vbt.lvds_use_ssc = 1;
1162 * Core/SandyBridge/IvyBridge use alternative (120MHz) reference
1165 dev_priv->vbt.lvds_ssc_freq = intel_bios_ssc_frequency(dev,
1166 !HAS_PCH_SPLIT(dev));
1167 DRM_DEBUG_KMS("Set default to SSC at %d kHz\n", dev_priv->vbt.lvds_ssc_freq);
1169 for (port = PORT_A; port < I915_MAX_PORTS; port++) {
1170 struct ddi_vbt_port_info *info =
1171 &dev_priv->vbt.ddi_port_info[port];
1173 info->hdmi_level_shift = HDMI_LEVEL_SHIFT_UNKNOWN;
1175 info->supports_dvi = (port != PORT_A && port != PORT_E);
1176 info->supports_hdmi = info->supports_dvi;
1177 info->supports_dp = (port != PORT_E);
1181 static int intel_no_opregion_vbt_callback(const struct dmi_system_id *id)
1183 DRM_DEBUG_KMS("Falling back to manually reading VBT from "
1184 "VBIOS ROM for %s\n",
1189 static const struct dmi_system_id intel_no_opregion_vbt[] = {
1191 .callback = intel_no_opregion_vbt_callback,
1192 .ident = "ThinkCentre A57",
1194 DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"),
1195 DMI_MATCH(DMI_PRODUCT_NAME, "97027RG"),
1201 static struct bdb_header *validate_vbt(char *base, size_t size,
1202 struct vbt_header *vbt,
1206 struct bdb_header *bdb;
1209 DRM_DEBUG_DRIVER("VBT signature missing\n");
1213 offset = (char *)vbt - base;
1214 if (offset + sizeof(struct vbt_header) > size) {
1215 DRM_DEBUG_DRIVER("VBT header incomplete\n");
1219 if (memcmp(vbt->signature, "$VBT", 4)) {
1220 DRM_DEBUG_DRIVER("VBT invalid signature\n");
1224 offset += vbt->bdb_offset;
1225 if (offset + sizeof(struct bdb_header) > size) {
1226 DRM_DEBUG_DRIVER("BDB header incomplete\n");
1230 bdb = (struct bdb_header *)(base + offset);
1231 if (offset + bdb->bdb_size > size) {
1232 DRM_DEBUG_DRIVER("BDB incomplete\n");
1236 DRM_DEBUG_KMS("Using VBT from %s: %20s\n",
1237 source, vbt->signature);
1242 * intel_parse_bios - find VBT and initialize settings from the BIOS
1245 * Loads the Video BIOS and checks that the VBT exists. Sets scratch registers
1246 * to appropriate values.
1248 * Returns 0 on success, nonzero on failure.
1251 intel_parse_bios(struct drm_device *dev)
1253 struct drm_i915_private *dev_priv = dev->dev_private;
1254 struct pci_dev *pdev = dev->pdev;
1255 struct bdb_header *bdb = NULL;
1256 u8 __iomem *bios = NULL;
1258 if (HAS_PCH_NOP(dev))
1261 init_vbt_defaults(dev_priv);
1263 /* XXX Should this validation be moved to intel_opregion.c? */
1264 if (!dmi_check_system(intel_no_opregion_vbt) && dev_priv->opregion.vbt)
1265 bdb = validate_vbt((char *)dev_priv->opregion.header, OPREGION_SIZE,
1266 (struct vbt_header *)dev_priv->opregion.vbt,
1272 bios = pci_map_rom(pdev, &size);
1276 /* Scour memory looking for the VBT signature */
1277 for (i = 0; i + 4 < size; i++) {
1278 if (memcmp(bios + i, "$VBT", 4) == 0) {
1279 bdb = validate_vbt(bios, size,
1280 (struct vbt_header *)(bios + i),
1287 pci_unmap_rom(pdev, bios);
1292 /* Grab useful general definitions */
1293 parse_general_features(dev_priv, bdb);
1294 parse_general_definitions(dev_priv, bdb);
1295 parse_lfp_panel_data(dev_priv, bdb);
1296 parse_lfp_backlight(dev_priv, bdb);
1297 parse_sdvo_panel_data(dev_priv, bdb);
1298 parse_sdvo_device_mapping(dev_priv, bdb);
1299 parse_device_mapping(dev_priv, bdb);
1300 parse_driver_features(dev_priv, bdb);
1301 parse_edp(dev_priv, bdb);
1302 parse_psr(dev_priv, bdb);
1303 parse_mipi(dev_priv, bdb);
1304 parse_ddi_ports(dev_priv, bdb);
1307 pci_unmap_rom(pdev, bios);
1312 /* Ensure that vital registers have been initialised, even if the BIOS
1313 * is absent or just failing to do its job.
1315 void intel_setup_bios(struct drm_device *dev)
1317 struct drm_i915_private *dev_priv = dev->dev_private;
1319 /* Set the Panel Power On/Off timings if uninitialized. */
1320 if (!HAS_PCH_SPLIT(dev) &&
1321 I915_READ(PP_ON_DELAYS) == 0 && I915_READ(PP_OFF_DELAYS) == 0) {
1322 /* Set T2 to 40ms and T5 to 200ms */
1323 I915_WRITE(PP_ON_DELAYS, 0x019007d0);
1325 /* Set T3 to 35ms and Tx to 200ms */
1326 I915_WRITE(PP_OFF_DELAYS, 0x015e07d0);