drivers/gpu/drm/mediatek/mtk_drm_drv.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Copyright (c) 2015 MediaTek Inc.
   4  * Author: YT SHEN <yt.shen@mediatek.com>
   5  */
   6
   7 #include <linux/component.h>
   8 #include <linux/iommu.h>
   9 #include <linux/module.h>
  10 #include <linux/of.h>
  11 #include <linux/of_platform.h>
  12 #include <linux/platform_device.h>
  13 #include <linux/pm_runtime.h>
  14 #include <linux/dma-mapping.h>
  15
  16 #include <drm/drm_atomic.h>
  17 #include <drm/drm_atomic_helper.h>
  18 #include <drm/drm_drv.h>
  19 #include <drm/drm_fbdev_generic.h>
  20 #include <drm/drm_fourcc.h>
  21 #include <drm/drm_gem.h>
  22 #include <drm/drm_gem_framebuffer_helper.h>
  23 #include <drm/drm_ioctl.h>
  24 #include <drm/drm_of.h>
  25 #include <drm/drm_probe_helper.h>
  26 #include <drm/drm_vblank.h>
  27
  28 #include "mtk_drm_crtc.h"
  29 #include "mtk_drm_ddp_comp.h"
  30 #include "mtk_drm_drv.h"
  31 #include "mtk_drm_gem.h"
  32
  33 #define DRIVER_NAME "mediatek"
  34 #define DRIVER_DESC "Mediatek SoC DRM"
  35 #define DRIVER_DATE "20150513"
  36 #define DRIVER_MAJOR 1
  37 #define DRIVER_MINOR 0
  38
  39 static const struct drm_mode_config_helper_funcs mtk_drm_mode_config_helpers = {
  40         .atomic_commit_tail = drm_atomic_helper_commit_tail_rpm,
  41 };
  42
  43 static struct drm_framebuffer *
  44 mtk_drm_mode_fb_create(struct drm_device *dev,
  45                        struct drm_file *file,
  46                        const struct drm_mode_fb_cmd2 *cmd)
  47 {
  48         const struct drm_format_info *info = drm_get_format_info(dev, cmd);
  49
  50         if (info->num_planes != 1)
  51                 return ERR_PTR(-EINVAL);
  52
  53         return drm_gem_fb_create(dev, file, cmd);
  54 }
  55
  56 static const struct drm_mode_config_funcs mtk_drm_mode_config_funcs = {
  57         .fb_create = mtk_drm_mode_fb_create,
  58         .atomic_check = drm_atomic_helper_check,
  59         .atomic_commit = drm_atomic_helper_commit,
  60 };
  61
  62 static const unsigned int mt2701_mtk_ddp_main[] = {
  63         DDP_COMPONENT_OVL0,
  64         DDP_COMPONENT_RDMA0,
  65         DDP_COMPONENT_COLOR0,
  66         DDP_COMPONENT_BLS,
  67         DDP_COMPONENT_DSI0,
  68 };
  69
  70 static const unsigned int mt2701_mtk_ddp_ext[] = {
  71         DDP_COMPONENT_RDMA1,
  72         DDP_COMPONENT_DPI0,
  73 };
  74
  75 static const unsigned int mt7623_mtk_ddp_main[] = {
  76         DDP_COMPONENT_OVL0,
  77         DDP_COMPONENT_RDMA0,
  78         DDP_COMPONENT_COLOR0,
  79         DDP_COMPONENT_BLS,
  80         DDP_COMPONENT_DPI0,
  81 };
  82
  83 static const unsigned int mt7623_mtk_ddp_ext[] = {
  84         DDP_COMPONENT_RDMA1,
  85         DDP_COMPONENT_DSI0,
  86 };
  87
  88 static const unsigned int mt2712_mtk_ddp_main[] = {
  89         DDP_COMPONENT_OVL0,
  90         DDP_COMPONENT_COLOR0,
  91         DDP_COMPONENT_AAL0,
  92         DDP_COMPONENT_OD0,
  93         DDP_COMPONENT_RDMA0,
  94         DDP_COMPONENT_DPI0,
  95         DDP_COMPONENT_PWM0,
  96 };
  97
  98 static const unsigned int mt2712_mtk_ddp_ext[] = {
  99         DDP_COMPONENT_OVL1,
 100         DDP_COMPONENT_COLOR1,
 101         DDP_COMPONENT_AAL1,
 102         DDP_COMPONENT_OD1,
 103         DDP_COMPONENT_RDMA1,
 104         DDP_COMPONENT_DPI1,
 105         DDP_COMPONENT_PWM1,
 106 };
 107
 108 static const unsigned int mt2712_mtk_ddp_third[] = {
 109         DDP_COMPONENT_RDMA2,
 110         DDP_COMPONENT_DSI3,
 111         DDP_COMPONENT_PWM2,
 112 };
 113
 114 static unsigned int mt8167_mtk_ddp_main[] = {
 115         DDP_COMPONENT_OVL0,
 116         DDP_COMPONENT_COLOR0,
 117         DDP_COMPONENT_CCORR,
 118         DDP_COMPONENT_AAL0,
 119         DDP_COMPONENT_GAMMA,
 120         DDP_COMPONENT_DITHER0,
 121         DDP_COMPONENT_RDMA0,
 122         DDP_COMPONENT_DSI0,
 123 };
 124
 125 static const unsigned int mt8173_mtk_ddp_main[] = {
 126         DDP_COMPONENT_OVL0,
 127         DDP_COMPONENT_COLOR0,
 128         DDP_COMPONENT_AAL0,
 129         DDP_COMPONENT_OD0,
 130         DDP_COMPONENT_RDMA0,
 131         DDP_COMPONENT_UFOE,
 132         DDP_COMPONENT_DSI0,
 133         DDP_COMPONENT_PWM0,
 134 };
 135
 136 static const unsigned int mt8173_mtk_ddp_ext[] = {
 137         DDP_COMPONENT_OVL1,
 138         DDP_COMPONENT_COLOR1,
 139         DDP_COMPONENT_GAMMA,
 140         DDP_COMPONENT_RDMA1,
 141         DDP_COMPONENT_DPI0,
 142 };
 143
 144 static const unsigned int mt8183_mtk_ddp_main[] = {
 145         DDP_COMPONENT_OVL0,
 146         DDP_COMPONENT_OVL_2L0,
 147         DDP_COMPONENT_RDMA0,
 148         DDP_COMPONENT_COLOR0,
 149         DDP_COMPONENT_CCORR,
 150         DDP_COMPONENT_AAL0,
 151         DDP_COMPONENT_GAMMA,
 152         DDP_COMPONENT_DITHER0,
 153         DDP_COMPONENT_DSI0,
 154 };
 155
 156 static const unsigned int mt8183_mtk_ddp_ext[] = {
 157         DDP_COMPONENT_OVL_2L1,
 158         DDP_COMPONENT_RDMA1,
 159         DDP_COMPONENT_DPI0,
 160 };
 161
 162 static const unsigned int mt8186_mtk_ddp_main[] = {
 163         DDP_COMPONENT_OVL0,
 164         DDP_COMPONENT_RDMA0,
 165         DDP_COMPONENT_COLOR0,
 166         DDP_COMPONENT_CCORR,
 167         DDP_COMPONENT_AAL0,
 168         DDP_COMPONENT_GAMMA,
 169         DDP_COMPONENT_POSTMASK0,
 170         DDP_COMPONENT_DITHER0,
 171         DDP_COMPONENT_DSI0,
 172 };
 173
 174 static const unsigned int mt8186_mtk_ddp_ext[] = {
 175         DDP_COMPONENT_OVL_2L0,
 176         DDP_COMPONENT_RDMA1,
 177         DDP_COMPONENT_DPI0,
 178 };
 179
 180 static const unsigned int mt8188_mtk_ddp_main[] = {
 181         DDP_COMPONENT_OVL0,
 182         DDP_COMPONENT_RDMA0,
 183         DDP_COMPONENT_COLOR0,
 184         DDP_COMPONENT_CCORR,
 185         DDP_COMPONENT_AAL0,
 186         DDP_COMPONENT_GAMMA,
 187         DDP_COMPONENT_POSTMASK0,
 188         DDP_COMPONENT_DITHER0,
 189         DDP_COMPONENT_DP_INTF0,
 190 };
 191
 192 static const unsigned int mt8192_mtk_ddp_main[] = {
 193         DDP_COMPONENT_OVL0,
 194         DDP_COMPONENT_OVL_2L0,
 195         DDP_COMPONENT_RDMA0,
 196         DDP_COMPONENT_COLOR0,
 197         DDP_COMPONENT_CCORR,
 198         DDP_COMPONENT_AAL0,
 199         DDP_COMPONENT_GAMMA,
 200         DDP_COMPONENT_POSTMASK0,
 201         DDP_COMPONENT_DITHER0,
 202         DDP_COMPONENT_DSI0,
 203 };
 204
 205 static const unsigned int mt8192_mtk_ddp_ext[] = {
 206         DDP_COMPONENT_OVL_2L2,
 207         DDP_COMPONENT_RDMA4,
 208         DDP_COMPONENT_DPI0,
 209 };
 210
 211 static const unsigned int mt8195_mtk_ddp_main[] = {
 212         DDP_COMPONENT_OVL0,
 213         DDP_COMPONENT_RDMA0,
 214         DDP_COMPONENT_COLOR0,
 215         DDP_COMPONENT_CCORR,
 216         DDP_COMPONENT_AAL0,
 217         DDP_COMPONENT_GAMMA,
 218         DDP_COMPONENT_DITHER0,
 219         DDP_COMPONENT_DSC0,
 220         DDP_COMPONENT_MERGE0,
 221         DDP_COMPONENT_DP_INTF0,
 222 };
 223
 224 static const unsigned int mt8195_mtk_ddp_ext[] = {
 225         DDP_COMPONENT_DRM_OVL_ADAPTOR,
 226         DDP_COMPONENT_MERGE5,
 227         DDP_COMPONENT_DP_INTF1,
 228 };
 229
 230 static const struct mtk_mmsys_driver_data mt2701_mmsys_driver_data = {
 231         .main_path = mt2701_mtk_ddp_main,
 232         .main_len = ARRAY_SIZE(mt2701_mtk_ddp_main),
 233         .ext_path = mt2701_mtk_ddp_ext,
 234         .ext_len = ARRAY_SIZE(mt2701_mtk_ddp_ext),
 235         .shadow_register = true,
 236         .mmsys_dev_num = 1,
 237 };
 238
 239 static const struct mtk_mmsys_driver_data mt7623_mmsys_driver_data = {
 240         .main_path = mt7623_mtk_ddp_main,
 241         .main_len = ARRAY_SIZE(mt7623_mtk_ddp_main),
 242         .ext_path = mt7623_mtk_ddp_ext,
 243         .ext_len = ARRAY_SIZE(mt7623_mtk_ddp_ext),
 244         .shadow_register = true,
 245         .mmsys_dev_num = 1,
 246 };
 247
 248 static const struct mtk_mmsys_driver_data mt2712_mmsys_driver_data = {
 249         .main_path = mt2712_mtk_ddp_main,
 250         .main_len = ARRAY_SIZE(mt2712_mtk_ddp_main),
 251         .ext_path = mt2712_mtk_ddp_ext,
 252         .ext_len = ARRAY_SIZE(mt2712_mtk_ddp_ext),
 253         .third_path = mt2712_mtk_ddp_third,
 254         .third_len = ARRAY_SIZE(mt2712_mtk_ddp_third),
 255         .mmsys_dev_num = 1,
 256 };
 257
 258 static const struct mtk_mmsys_driver_data mt8167_mmsys_driver_data = {
 259         .main_path = mt8167_mtk_ddp_main,
 260         .main_len = ARRAY_SIZE(mt8167_mtk_ddp_main),
 261         .mmsys_dev_num = 1,
 262 };
 263
 264 static const struct mtk_mmsys_driver_data mt8173_mmsys_driver_data = {
 265         .main_path = mt8173_mtk_ddp_main,
 266         .main_len = ARRAY_SIZE(mt8173_mtk_ddp_main),
 267         .ext_path = mt8173_mtk_ddp_ext,
 268         .ext_len = ARRAY_SIZE(mt8173_mtk_ddp_ext),
 269         .mmsys_dev_num = 1,
 270 };
 271
 272 static const struct mtk_mmsys_driver_data mt8183_mmsys_driver_data = {
 273         .main_path = mt8183_mtk_ddp_main,
 274         .main_len = ARRAY_SIZE(mt8183_mtk_ddp_main),
 275         .ext_path = mt8183_mtk_ddp_ext,
 276         .ext_len = ARRAY_SIZE(mt8183_mtk_ddp_ext),
 277         .mmsys_dev_num = 1,
 278 };
 279
 280 static const struct mtk_mmsys_driver_data mt8186_mmsys_driver_data = {
 281         .main_path = mt8186_mtk_ddp_main,
 282         .main_len = ARRAY_SIZE(mt8186_mtk_ddp_main),
 283         .ext_path = mt8186_mtk_ddp_ext,
 284         .ext_len = ARRAY_SIZE(mt8186_mtk_ddp_ext),
 285         .mmsys_dev_num = 1,
 286 };
 287
 288 static const struct mtk_mmsys_driver_data mt8188_vdosys0_driver_data = {
 289         .main_path = mt8188_mtk_ddp_main,
 290         .main_len = ARRAY_SIZE(mt8188_mtk_ddp_main),
 291 };
 292
 293 static const struct mtk_mmsys_driver_data mt8192_mmsys_driver_data = {
 294         .main_path = mt8192_mtk_ddp_main,
 295         .main_len = ARRAY_SIZE(mt8192_mtk_ddp_main),
 296         .ext_path = mt8192_mtk_ddp_ext,
 297         .ext_len = ARRAY_SIZE(mt8192_mtk_ddp_ext),
 298         .mmsys_dev_num = 1,
 299 };
 300
 301 static const struct mtk_mmsys_driver_data mt8195_vdosys0_driver_data = {
 302         .main_path = mt8195_mtk_ddp_main,
 303         .main_len = ARRAY_SIZE(mt8195_mtk_ddp_main),
 304         .mmsys_dev_num = 2,
 305 };
 306
 307 static const struct mtk_mmsys_driver_data mt8195_vdosys1_driver_data = {
 308         .ext_path = mt8195_mtk_ddp_ext,
 309         .ext_len = ARRAY_SIZE(mt8195_mtk_ddp_ext),
 310         .mmsys_id = 1,
 311         .mmsys_dev_num = 2,
 312 };
 313
 314 static const struct of_device_id mtk_drm_of_ids[] = {
 315         { .compatible = "mediatek,mt2701-mmsys",
 316           .data = &mt2701_mmsys_driver_data},
 317         { .compatible = "mediatek,mt7623-mmsys",
 318           .data = &mt7623_mmsys_driver_data},
 319         { .compatible = "mediatek,mt2712-mmsys",
 320           .data = &mt2712_mmsys_driver_data},
 321         { .compatible = "mediatek,mt8167-mmsys",
 322           .data = &mt8167_mmsys_driver_data},
 323         { .compatible = "mediatek,mt8173-mmsys",
 324           .data = &mt8173_mmsys_driver_data},
 325         { .compatible = "mediatek,mt8183-mmsys",
 326           .data = &mt8183_mmsys_driver_data},
 327         { .compatible = "mediatek,mt8186-mmsys",
 328           .data = &mt8186_mmsys_driver_data},
 329         { .compatible = "mediatek,mt8188-vdosys0",
 330           .data = &mt8188_vdosys0_driver_data},
 331         { .compatible = "mediatek,mt8192-mmsys",
 332           .data = &mt8192_mmsys_driver_data},
 333         { .compatible = "mediatek,mt8195-mmsys",
 334           .data = &mt8195_vdosys0_driver_data},
 335         { .compatible = "mediatek,mt8195-vdosys0",
 336           .data = &mt8195_vdosys0_driver_data},
 337         { .compatible = "mediatek,mt8195-vdosys1",
 338           .data = &mt8195_vdosys1_driver_data},
 339         { }
 340 };
 341 MODULE_DEVICE_TABLE(of, mtk_drm_of_ids);
 342
 343 static int mtk_drm_match(struct device *dev, void *data)
 344 {
 345         if (!strncmp(dev_name(dev), "mediatek-drm", sizeof("mediatek-drm") - 1))
 346                 return true;
 347         return false;
 348 }
 349
 350 static bool mtk_drm_get_all_drm_priv(struct device *dev)
 351 {
 352         struct mtk_drm_private *drm_priv = dev_get_drvdata(dev);
 353         struct mtk_drm_private *all_drm_priv[MAX_CRTC];
 354         struct device_node *phandle = dev->parent->of_node;
 355         const struct of_device_id *of_id;
 356         struct device_node *node;
 357         struct device *drm_dev;
 358         unsigned int cnt = 0;
 359         int i, j;
 360
 361         for_each_child_of_node(phandle->parent, node) {
 362                 struct platform_device *pdev;
 363
 364                 of_id = of_match_node(mtk_drm_of_ids, node);
 365                 if (!of_id)
 366                         continue;
 367
 368                 pdev = of_find_device_by_node(node);
 369                 if (!pdev)
 370                         continue;
 371
 372                 drm_dev = device_find_child(&pdev->dev, NULL, mtk_drm_match);
 373                 if (!drm_dev || !dev_get_drvdata(drm_dev))
 374                         continue;
 375
 376                 all_drm_priv[cnt] = dev_get_drvdata(drm_dev);
 377                 if (all_drm_priv[cnt] && all_drm_priv[cnt]->mtk_drm_bound)
 378                         cnt++;
 379
 380                 if (cnt == MAX_CRTC)
 381                         break;
 382         }
 383
 384         if (drm_priv->data->mmsys_dev_num == cnt) {
 385                 for (i = 0; i < cnt; i++)
 386                         for (j = 0; j < cnt; j++)
 387                                 all_drm_priv[j]->all_drm_private[i] = all_drm_priv[i];
 388
 389                 return true;
 390         }
 391
 392         return false;
 393 }
 394
 395 static bool mtk_drm_find_mmsys_comp(struct mtk_drm_private *private, int comp_id)
 396 {
 397         const struct mtk_mmsys_driver_data *drv_data = private->data;
 398         int i;
 399
 400         if (drv_data->main_path)
 401                 for (i = 0; i < drv_data->main_len; i++)
 402                         if (drv_data->main_path[i] == comp_id)
 403                                 return true;
 404
 405         if (drv_data->ext_path)
 406                 for (i = 0; i < drv_data->ext_len; i++)
 407                         if (drv_data->ext_path[i] == comp_id)
 408                                 return true;
 409
 410         if (drv_data->third_path)
 411                 for (i = 0; i < drv_data->third_len; i++)
 412                         if (drv_data->third_path[i] == comp_id)
 413                                 return true;
 414
 415         return false;
 416 }
 417
 418 static int mtk_drm_kms_init(struct drm_device *drm)
 419 {
 420         struct mtk_drm_private *private = drm->dev_private;
 421         struct mtk_drm_private *priv_n;
 422         struct device *dma_dev = NULL;
 423         int ret, i, j;
 424
 425         if (drm_firmware_drivers_only())
 426                 return -ENODEV;
 427
 428         ret = drmm_mode_config_init(drm);
 429         if (ret)
 430                 goto put_mutex_dev;
 431
 432         drm->mode_config.min_width = 64;
 433         drm->mode_config.min_height = 64;
 434
 435         /*
 436          * set max width and height as default value(4096x4096).
 437          * this value would be used to check framebuffer size limitation
 438          * at drm_mode_addfb().
 439          */
 440         drm->mode_config.max_width = 4096;
 441         drm->mode_config.max_height = 4096;
 442         drm->mode_config.funcs = &mtk_drm_mode_config_funcs;
 443         drm->mode_config.helper_private = &mtk_drm_mode_config_helpers;
 444
 445         for (i = 0; i < private->data->mmsys_dev_num; i++) {
 446                 drm->dev_private = private->all_drm_private[i];
 447                 ret = component_bind_all(private->all_drm_private[i]->dev, drm);
 448                 if (ret)
 449                         goto put_mutex_dev;
 450         }
 451
 452         /*
 453          * Ensure internal panels are at the top of the connector list before
 454          * crtc creation.
 455          */
 456         drm_helper_move_panel_connectors_to_head(drm);
 457
 458         /*
 459          * 1. We currently support two fixed data streams, each optional,
 460          *    and each statically assigned to a crtc:
 461          *    OVL0 -> COLOR0 -> AAL -> OD -> RDMA0 -> UFOE -> DSI0 ...
 462          * 2. For multi mmsys architecture, crtc path data are located in
 463          *    different drm private data structures. Loop through crtc index to
 464          *    create crtc from the main path and then ext_path and finally the
 465          *    third path.
 466          */
 467         for (i = 0; i < MAX_CRTC; i++) {
 468                 for (j = 0; j < private->data->mmsys_dev_num; j++) {
 469                         priv_n = private->all_drm_private[j];
 470
 471                         if (i == 0 && priv_n->data->main_len) {
 472                                 ret = mtk_drm_crtc_create(drm, priv_n->data->main_path,
 473                                                           priv_n->data->main_len, j);
 474                                 if (ret)
 475                                         goto err_component_unbind;
 476
 477                                 continue;
 478                         } else if (i == 1 && priv_n->data->ext_len) {
 479                                 ret = mtk_drm_crtc_create(drm, priv_n->data->ext_path,
 480                                                           priv_n->data->ext_len, j);
 481                                 if (ret)
 482                                         goto err_component_unbind;
 483
 484                                 continue;
 485                         } else if (i == 2 && priv_n->data->third_len) {
 486                                 ret = mtk_drm_crtc_create(drm, priv_n->data->third_path,
 487                                                           priv_n->data->third_len, j);
 488                                 if (ret)
 489                                         goto err_component_unbind;
 490
 491                                 continue;
 492                         }
 493                 }
 494         }
 495
 496         /* Use OVL device for all DMA memory allocations */
 497         dma_dev = mtk_drm_crtc_dma_dev_get(drm_crtc_from_index(drm, 0));
 498         if (!dma_dev) {
 499                 ret = -ENODEV;
 500                 dev_err(drm->dev, "Need at least one OVL device\n");
 501                 goto err_component_unbind;
 502         }
 503
 504         for (i = 0; i < private->data->mmsys_dev_num; i++)
 505                 private->all_drm_private[i]->dma_dev = dma_dev;
 506
 507         /*
 508          * Configure the DMA segment size to make sure we get contiguous IOVA
 509          * when importing PRIME buffers.
 510          */
 511         ret = dma_set_max_seg_size(dma_dev, UINT_MAX);
 512         if (ret) {
 513                 dev_err(dma_dev, "Failed to set DMA segment size\n");
 514                 goto err_component_unbind;
 515         }
 516
 517         ret = drm_vblank_init(drm, MAX_CRTC);
 518         if (ret < 0)
 519                 goto err_component_unbind;
 520
 521         drm_kms_helper_poll_init(drm);
 522         drm_mode_config_reset(drm);
 523
 524         return 0;
 525
 526 err_component_unbind:
 527         for (i = 0; i < private->data->mmsys_dev_num; i++)
 528                 component_unbind_all(private->all_drm_private[i]->dev, drm);
 529 put_mutex_dev:
 530         for (i = 0; i < private->data->mmsys_dev_num; i++)
 531                 put_device(private->all_drm_private[i]->mutex_dev);
 532
 533         return ret;
 534 }
 535
 536 static void mtk_drm_kms_deinit(struct drm_device *drm)
 537 {
 538         drm_kms_helper_poll_fini(drm);
 539         drm_atomic_helper_shutdown(drm);
 540
 541         component_unbind_all(drm->dev, drm);
 542 }
 543
 544 DEFINE_DRM_GEM_FOPS(mtk_drm_fops);
 545
 546 /*
 547  * We need to override this because the device used to import the memory is
 548  * not dev->dev, as drm_gem_prime_import() expects.
 549  */
 550 static struct drm_gem_object *mtk_drm_gem_prime_import(struct drm_device *dev,
 551                                                        struct dma_buf *dma_buf)
 552 {
 553         struct mtk_drm_private *private = dev->dev_private;
 554
 555         return drm_gem_prime_import_dev(dev, dma_buf, private->dma_dev);
 556 }
 557
 558 static const struct drm_driver mtk_drm_driver = {
 559         .driver_features = DRIVER_MODESET | DRIVER_GEM | DRIVER_ATOMIC,
 560
 561         .dumb_create = mtk_drm_gem_dumb_create,
 562
 563         .gem_prime_import = mtk_drm_gem_prime_import,
 564         .gem_prime_import_sg_table = mtk_gem_prime_import_sg_table,
 565         .fops = &mtk_drm_fops,
 566
 567         .name = DRIVER_NAME,
 568         .desc = DRIVER_DESC,
 569         .date = DRIVER_DATE,
 570         .major = DRIVER_MAJOR,
 571         .minor = DRIVER_MINOR,
 572 };
 573
 574 static int compare_dev(struct device *dev, void *data)
 575 {
 576         return dev == (struct device *)data;
 577 }
 578
 579 static int mtk_drm_bind(struct device *dev)
 580 {
 581         struct mtk_drm_private *private = dev_get_drvdata(dev);
 582         struct platform_device *pdev;
 583         struct drm_device *drm;
 584         int ret, i;
 585
 586         if (!iommu_present(&platform_bus_type))
 587                 return -EPROBE_DEFER;
 588
 589         pdev = of_find_device_by_node(private->mutex_node);
 590         if (!pdev) {
 591                 dev_err(dev, "Waiting for disp-mutex device %pOF\n",
 592                         private->mutex_node);
 593                 of_node_put(private->mutex_node);
 594                 return -EPROBE_DEFER;
 595         }
 596
 597         private->mutex_dev = &pdev->dev;
 598         private->mtk_drm_bound = true;
 599         private->dev = dev;
 600
 601         if (!mtk_drm_get_all_drm_priv(dev))
 602                 return 0;
 603
 604         drm = drm_dev_alloc(&mtk_drm_driver, dev);
 605         if (IS_ERR(drm))
 606                 return PTR_ERR(drm);
 607
 608         private->drm_master = true;
 609         drm->dev_private = private;
 610         for (i = 0; i < private->data->mmsys_dev_num; i++)
 611                 private->all_drm_private[i]->drm = drm;
 612
 613         ret = mtk_drm_kms_init(drm);
 614         if (ret < 0)
 615                 goto err_free;
 616
 617         ret = drm_dev_register(drm, 0);
 618         if (ret < 0)
 619                 goto err_deinit;
 620
 621         drm_fbdev_generic_setup(drm, 32);
 622
 623         return 0;
 624
 625 err_deinit:
 626         mtk_drm_kms_deinit(drm);
 627 err_free:
 628         private->drm = NULL;
 629         drm_dev_put(drm);
 630         return ret;
 631 }
 632
 633 static void mtk_drm_unbind(struct device *dev)
 634 {
 635         struct mtk_drm_private *private = dev_get_drvdata(dev);
 636
 637         /* for multi mmsys dev, unregister drm dev in mmsys master */
 638         if (private->drm_master) {
 639                 drm_dev_unregister(private->drm);
 640                 mtk_drm_kms_deinit(private->drm);
 641                 drm_dev_put(private->drm);
 642         }
 643         private->mtk_drm_bound = false;
 644         private->drm_master = false;
 645         private->drm = NULL;
 646 }
 647
 648 static const struct component_master_ops mtk_drm_ops = {
 649         .bind           = mtk_drm_bind,
 650         .unbind         = mtk_drm_unbind,
 651 };
 652
 653 static const struct of_device_id mtk_ddp_comp_dt_ids[] = {
 654         { .compatible = "mediatek,mt8167-disp-aal",
 655           .data = (void *)MTK_DISP_AAL},
 656         { .compatible = "mediatek,mt8173-disp-aal",
 657           .data = (void *)MTK_DISP_AAL},
 658         { .compatible = "mediatek,mt8183-disp-aal",
 659           .data = (void *)MTK_DISP_AAL},
 660         { .compatible = "mediatek,mt8192-disp-aal",
 661           .data = (void *)MTK_DISP_AAL},
 662         { .compatible = "mediatek,mt8167-disp-ccorr",
 663           .data = (void *)MTK_DISP_CCORR },
 664         { .compatible = "mediatek,mt8183-disp-ccorr",
 665           .data = (void *)MTK_DISP_CCORR },
 666         { .compatible = "mediatek,mt8192-disp-ccorr",
 667           .data = (void *)MTK_DISP_CCORR },
 668         { .compatible = "mediatek,mt2701-disp-color",
 669           .data = (void *)MTK_DISP_COLOR },
 670         { .compatible = "mediatek,mt8167-disp-color",
 671           .data = (void *)MTK_DISP_COLOR },
 672         { .compatible = "mediatek,mt8173-disp-color",
 673           .data = (void *)MTK_DISP_COLOR },
 674         { .compatible = "mediatek,mt8167-disp-dither",
 675           .data = (void *)MTK_DISP_DITHER },
 676         { .compatible = "mediatek,mt8183-disp-dither",
 677           .data = (void *)MTK_DISP_DITHER },
 678         { .compatible = "mediatek,mt8195-disp-dsc",
 679           .data = (void *)MTK_DISP_DSC },
 680         { .compatible = "mediatek,mt8167-disp-gamma",
 681           .data = (void *)MTK_DISP_GAMMA, },
 682         { .compatible = "mediatek,mt8173-disp-gamma",
 683           .data = (void *)MTK_DISP_GAMMA, },
 684         { .compatible = "mediatek,mt8183-disp-gamma",
 685           .data = (void *)MTK_DISP_GAMMA, },
 686         { .compatible = "mediatek,mt8195-disp-merge",
 687           .data = (void *)MTK_DISP_MERGE },
 688         { .compatible = "mediatek,mt2701-disp-mutex",
 689           .data = (void *)MTK_DISP_MUTEX },
 690         { .compatible = "mediatek,mt2712-disp-mutex",
 691           .data = (void *)MTK_DISP_MUTEX },
 692         { .compatible = "mediatek,mt8167-disp-mutex",
 693           .data = (void *)MTK_DISP_MUTEX },
 694         { .compatible = "mediatek,mt8173-disp-mutex",
 695           .data = (void *)MTK_DISP_MUTEX },
 696         { .compatible = "mediatek,mt8183-disp-mutex",
 697           .data = (void *)MTK_DISP_MUTEX },
 698         { .compatible = "mediatek,mt8186-disp-mutex",
 699           .data = (void *)MTK_DISP_MUTEX },
 700         { .compatible = "mediatek,mt8188-disp-mutex",
 701           .data = (void *)MTK_DISP_MUTEX },
 702         { .compatible = "mediatek,mt8192-disp-mutex",
 703           .data = (void *)MTK_DISP_MUTEX },
 704         { .compatible = "mediatek,mt8195-disp-mutex",
 705           .data = (void *)MTK_DISP_MUTEX },
 706         { .compatible = "mediatek,mt8173-disp-od",
 707           .data = (void *)MTK_DISP_OD },
 708         { .compatible = "mediatek,mt2701-disp-ovl",
 709           .data = (void *)MTK_DISP_OVL },
 710         { .compatible = "mediatek,mt8167-disp-ovl",
 711           .data = (void *)MTK_DISP_OVL },
 712         { .compatible = "mediatek,mt8173-disp-ovl",
 713           .data = (void *)MTK_DISP_OVL },
 714         { .compatible = "mediatek,mt8183-disp-ovl",
 715           .data = (void *)MTK_DISP_OVL },
 716         { .compatible = "mediatek,mt8192-disp-ovl",
 717           .data = (void *)MTK_DISP_OVL },
 718         { .compatible = "mediatek,mt8183-disp-ovl-2l",
 719           .data = (void *)MTK_DISP_OVL_2L },
 720         { .compatible = "mediatek,mt8192-disp-ovl-2l",
 721           .data = (void *)MTK_DISP_OVL_2L },
 722         { .compatible = "mediatek,mt8192-disp-postmask",
 723           .data = (void *)MTK_DISP_POSTMASK },
 724         { .compatible = "mediatek,mt2701-disp-pwm",
 725           .data = (void *)MTK_DISP_BLS },
 726         { .compatible = "mediatek,mt8167-disp-pwm",
 727           .data = (void *)MTK_DISP_PWM },
 728         { .compatible = "mediatek,mt8173-disp-pwm",
 729           .data = (void *)MTK_DISP_PWM },
 730         { .compatible = "mediatek,mt2701-disp-rdma",
 731           .data = (void *)MTK_DISP_RDMA },
 732         { .compatible = "mediatek,mt8167-disp-rdma",
 733           .data = (void *)MTK_DISP_RDMA },
 734         { .compatible = "mediatek,mt8173-disp-rdma",
 735           .data = (void *)MTK_DISP_RDMA },
 736         { .compatible = "mediatek,mt8183-disp-rdma",
 737           .data = (void *)MTK_DISP_RDMA },
 738         { .compatible = "mediatek,mt8195-disp-rdma",
 739           .data = (void *)MTK_DISP_RDMA },
 740         { .compatible = "mediatek,mt8173-disp-ufoe",
 741           .data = (void *)MTK_DISP_UFOE },
 742         { .compatible = "mediatek,mt8173-disp-wdma",
 743           .data = (void *)MTK_DISP_WDMA },
 744         { .compatible = "mediatek,mt2701-dpi",
 745           .data = (void *)MTK_DPI },
 746         { .compatible = "mediatek,mt8167-dsi",
 747           .data = (void *)MTK_DSI },
 748         { .compatible = "mediatek,mt8173-dpi",
 749           .data = (void *)MTK_DPI },
 750         { .compatible = "mediatek,mt8183-dpi",
 751           .data = (void *)MTK_DPI },
 752         { .compatible = "mediatek,mt8186-dpi",
 753           .data = (void *)MTK_DPI },
 754         { .compatible = "mediatek,mt8188-dp-intf",
 755           .data = (void *)MTK_DP_INTF },
 756         { .compatible = "mediatek,mt8192-dpi",
 757           .data = (void *)MTK_DPI },
 758         { .compatible = "mediatek,mt8195-dp-intf",
 759           .data = (void *)MTK_DP_INTF },
 760         { .compatible = "mediatek,mt2701-dsi",
 761           .data = (void *)MTK_DSI },
 762         { .compatible = "mediatek,mt8173-dsi",
 763           .data = (void *)MTK_DSI },
 764         { .compatible = "mediatek,mt8183-dsi",
 765           .data = (void *)MTK_DSI },
 766         { .compatible = "mediatek,mt8186-dsi",
 767           .data = (void *)MTK_DSI },
 768         { }
 769 };
 770
 771 static int mtk_drm_probe(struct platform_device *pdev)
 772 {
 773         struct device *dev = &pdev->dev;
 774         struct device_node *phandle = dev->parent->of_node;
 775         const struct of_device_id *of_id;
 776         struct mtk_drm_private *private;
 777         struct device_node *node;
 778         struct component_match *match = NULL;
 779         struct platform_device *ovl_adaptor;
 780         int ret;
 781         int i;
 782
 783         private = devm_kzalloc(dev, sizeof(*private), GFP_KERNEL);
 784         if (!private)
 785                 return -ENOMEM;
 786
 787         private->mmsys_dev = dev->parent;
 788         if (!private->mmsys_dev) {
 789                 dev_err(dev, "Failed to get MMSYS device\n");
 790                 return -ENODEV;
 791         }
 792
 793         of_id = of_match_node(mtk_drm_of_ids, phandle);
 794         if (!of_id)
 795                 return -ENODEV;
 796
 797         private->data = of_id->data;
 798
 799         private->all_drm_private = devm_kmalloc_array(dev, private->data->mmsys_dev_num,
 800                                                       sizeof(*private->all_drm_private),
 801                                                       GFP_KERNEL);
 802         if (!private->all_drm_private)
 803                 return -ENOMEM;
 804
 805         /* Bringup ovl_adaptor */
 806         if (mtk_drm_find_mmsys_comp(private, DDP_COMPONENT_DRM_OVL_ADAPTOR)) {
 807                 ovl_adaptor = platform_device_register_data(dev, "mediatek-disp-ovl-adaptor",
 808                                                             PLATFORM_DEVID_AUTO,
 809                                                             (void *)private->mmsys_dev,
 810                                                             sizeof(*private->mmsys_dev));
 811                 private->ddp_comp[DDP_COMPONENT_DRM_OVL_ADAPTOR].dev = &ovl_adaptor->dev;
 812                 mtk_ddp_comp_init(NULL, &private->ddp_comp[DDP_COMPONENT_DRM_OVL_ADAPTOR],
 813                                   DDP_COMPONENT_DRM_OVL_ADAPTOR);
 814                 component_match_add(dev, &match, compare_dev, &ovl_adaptor->dev);
 815         }
 816
 817         /* Iterate over sibling DISP function blocks */
 818         for_each_child_of_node(phandle->parent, node) {
 819                 const struct of_device_id *of_id;
 820                 enum mtk_ddp_comp_type comp_type;
 821                 int comp_id;
 822
 823                 of_id = of_match_node(mtk_ddp_comp_dt_ids, node);
 824                 if (!of_id)
 825                         continue;
 826
 827                 if (!of_device_is_available(node)) {
 828                         dev_dbg(dev, "Skipping disabled component %pOF\n",
 829                                 node);
 830                         continue;
 831                 }
 832
 833                 comp_type = (enum mtk_ddp_comp_type)(uintptr_t)of_id->data;
 834
 835                 if (comp_type == MTK_DISP_MUTEX) {
 836                         int id;
 837
 838                         id = of_alias_get_id(node, "mutex");
 839                         if (id < 0 || id == private->data->mmsys_id) {
 840                                 private->mutex_node = of_node_get(node);
 841                                 dev_dbg(dev, "get mutex for mmsys %d", private->data->mmsys_id);
 842                         }
 843                         continue;
 844                 }
 845
 846                 comp_id = mtk_ddp_comp_get_id(node, comp_type);
 847                 if (comp_id < 0) {
 848                         dev_warn(dev, "Skipping unknown component %pOF\n",
 849                                  node);
 850                         continue;
 851                 }
 852
 853                 if (!mtk_drm_find_mmsys_comp(private, comp_id))
 854                         continue;
 855
 856                 private->comp_node[comp_id] = of_node_get(node);
 857
 858                 /*
 859                  * Currently only the AAL, CCORR, COLOR, GAMMA, MERGE, OVL, RDMA, DSI, and DPI
 860                  * blocks have separate component platform drivers and initialize their own
 861                  * DDP component structure. The others are initialized here.
 862                  */
 863                 if (comp_type == MTK_DISP_AAL ||
 864                     comp_type == MTK_DISP_CCORR ||
 865                     comp_type == MTK_DISP_COLOR ||
 866                     comp_type == MTK_DISP_GAMMA ||
 867                     comp_type == MTK_DISP_MERGE ||
 868                     comp_type == MTK_DISP_OVL ||
 869                     comp_type == MTK_DISP_OVL_2L ||
 870                     comp_type == MTK_DISP_OVL_ADAPTOR ||
 871                     comp_type == MTK_DISP_RDMA ||
 872                     comp_type == MTK_DP_INTF ||
 873                     comp_type == MTK_DPI ||
 874                     comp_type == MTK_DSI) {
 875                         dev_info(dev, "Adding component match for %pOF\n",
 876                                  node);
 877                         drm_of_component_match_add(dev, &match, component_compare_of,
 878                                                    node);
 879                 }
 880
 881                 ret = mtk_ddp_comp_init(node, &private->ddp_comp[comp_id], comp_id);
 882                 if (ret) {
 883                         of_node_put(node);
 884                         goto err_node;
 885                 }
 886         }
 887
 888         if (!private->mutex_node) {
 889                 dev_err(dev, "Failed to find disp-mutex node\n");
 890                 ret = -ENODEV;
 891                 goto err_node;
 892         }
 893
 894         pm_runtime_enable(dev);
 895
 896         platform_set_drvdata(pdev, private);
 897
 898         ret = component_master_add_with_match(dev, &mtk_drm_ops, match);
 899         if (ret)
 900                 goto err_pm;
 901
 902         return 0;
 903
 904 err_pm:
 905         pm_runtime_disable(dev);
 906 err_node:
 907         of_node_put(private->mutex_node);
 908         for (i = 0; i < DDP_COMPONENT_DRM_ID_MAX; i++)
 909                 of_node_put(private->comp_node[i]);
 910         return ret;
 911 }
 912
 913 static void mtk_drm_remove(struct platform_device *pdev)
 914 {
 915         struct mtk_drm_private *private = platform_get_drvdata(pdev);
 916         int i;
 917
 918         component_master_del(&pdev->dev, &mtk_drm_ops);
 919         pm_runtime_disable(&pdev->dev);
 920         of_node_put(private->mutex_node);
 921         for (i = 0; i < DDP_COMPONENT_DRM_ID_MAX; i++)
 922                 of_node_put(private->comp_node[i]);
 923 }
 924
 925 static int mtk_drm_sys_prepare(struct device *dev)
 926 {
 927         struct mtk_drm_private *private = dev_get_drvdata(dev);
 928         struct drm_device *drm = private->drm;
 929
 930         if (private->drm_master)
 931                 return drm_mode_config_helper_suspend(drm);
 932         else
 933                 return 0;
 934 }
 935
 936 static void mtk_drm_sys_complete(struct device *dev)
 937 {
 938         struct mtk_drm_private *private = dev_get_drvdata(dev);
 939         struct drm_device *drm = private->drm;
 940         int ret = 0;
 941
 942         if (private->drm_master)
 943                 ret = drm_mode_config_helper_resume(drm);
 944         if (ret)
 945                 dev_err(dev, "Failed to resume\n");
 946 }
 947
 948 static const struct dev_pm_ops mtk_drm_pm_ops = {
 949         .prepare = mtk_drm_sys_prepare,
 950         .complete = mtk_drm_sys_complete,
 951 };
 952
 953 static struct platform_driver mtk_drm_platform_driver = {
 954         .probe  = mtk_drm_probe,
 955         .remove_new = mtk_drm_remove,
 956         .driver = {
 957                 .name   = "mediatek-drm",
 958                 .pm     = &mtk_drm_pm_ops,
 959         },
 960 };
 961
 962 static struct platform_driver * const mtk_drm_drivers[] = {
 963         &mtk_disp_aal_driver,
 964         &mtk_disp_ccorr_driver,
 965         &mtk_disp_color_driver,
 966         &mtk_disp_gamma_driver,
 967         &mtk_disp_merge_driver,
 968         &mtk_disp_ovl_adaptor_driver,
 969         &mtk_disp_ovl_driver,
 970         &mtk_disp_rdma_driver,
 971         &mtk_dpi_driver,
 972         &mtk_drm_platform_driver,
 973         &mtk_dsi_driver,
 974         &mtk_ethdr_driver,
 975         &mtk_mdp_rdma_driver,
 976 };
 977
 978 static int __init mtk_drm_init(void)
 979 {
 980         return platform_register_drivers(mtk_drm_drivers,
 981                                          ARRAY_SIZE(mtk_drm_drivers));
 982 }
 983
 984 static void __exit mtk_drm_exit(void)
 985 {
 986         platform_unregister_drivers(mtk_drm_drivers,
 987                                     ARRAY_SIZE(mtk_drm_drivers));
 988 }
 989
 990 module_init(mtk_drm_init);
 991 module_exit(mtk_drm_exit);
 992
 993 MODULE_AUTHOR("YT SHEN <yt.shen@mediatek.com>");
 994 MODULE_DESCRIPTION("Mediatek SoC DRM driver");
 995 MODULE_LICENSE("GPL v2");