2 * Copyright (C) 2013 Red Hat
3 * Author: Rob Clark <robdclark@gmail.com>
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 as published by
7 * the Free Software Foundation.
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * You should have received a copy of the GNU General Public License along with
15 * this program. If not, see <http://www.gnu.org/licenses/>.
21 #include <linux/kref.h>
22 #include <linux/reservation.h>
23 #include <linux/mmu_notifier.h>
24 #include <linux/interval_tree.h>
27 /* Additional internal-use only BO flags: */
28 #define MSM_BO_STOLEN 0x10000000 /* try to use stolen/splash memory */
29 #define MSM_BO_LOCKED 0x20000000 /* Pages have been securely locked */
30 #define MSM_BO_SVM 0x40000000 /* bo is SVM */
32 struct msm_gem_address_space {
37 spinlock_t lock; /* Protects drm_mm node allocation/removal */
42 /* Node used by the GPU address space, but not the SDE address space */
43 struct drm_mm_node node;
44 struct msm_gem_address_space *aspace;
46 struct list_head list;
49 struct msm_gem_object {
50 struct drm_gem_object base;
54 /* And object is either:
55 * inactive - on priv->inactive_list
56 * active - on one one of the gpu's active_list.. well, at
57 * least for now we don't have (I don't think) hw sync between
58 * 2d and 3d one devices which have both, meaning we need to
59 * block on submit if a bo is already on other ring
62 struct list_head mm_list;
63 struct msm_gpu *gpu; /* non-null if active */
64 uint32_t read_fence, write_fence;
66 /* Transiently in the process of submit ioctl, objects associated
67 * with the submit are on submit->bo_list.. this only lasts for
68 * the duration of the ioctl, so one bo can never be on multiple
71 struct list_head submit_entry;
77 struct list_head domains;
79 /* normally (resv == &_resv) except for imported bo's */
80 struct reservation_object *resv;
81 struct reservation_object _resv;
83 /* For physically contiguous buffers. Used when we don't have
84 * an IOMMU. Also used for stolen/splashscreen buffer.
86 struct drm_mm_node *vram_node;
87 struct mutex lock; /* Protects resources associated with bo */
89 #define to_msm_bo(x) container_of(x, struct msm_gem_object, base)
91 struct msm_mmu_notifier {
92 struct mmu_notifier mn;
93 struct mm_struct *mm; /* mm_struct owning the mmu notifier mn */
94 struct hlist_node node;
95 struct rb_root svm_tree; /* interval tree holding all svm bos */
96 spinlock_t svm_tree_lock; /* Protects svm_tree*/
97 struct msm_drm_private *msm_dev;
101 struct msm_gem_svm_object {
102 struct msm_gem_object msm_obj_base;
104 struct mm_struct *mm; /* mm_struct the svm bo belongs to */
105 struct interval_tree_node svm_node;
106 struct msm_mmu_notifier *msm_mn;
107 struct list_head lnode;
108 /* bo has been unmapped on CPU, cannot be part of GPU submits */
112 #define to_msm_svm_obj(x) \
113 ((struct msm_gem_svm_object *) \
114 container_of(x, struct msm_gem_svm_object, msm_obj_base))
117 static inline bool is_active(struct msm_gem_object *msm_obj)
119 return msm_obj->gpu != NULL;
122 static inline uint32_t msm_gem_fence(struct msm_gem_object *msm_obj,
127 if (op & MSM_PREP_READ)
128 fence = msm_obj->write_fence;
129 if (op & MSM_PREP_WRITE)
130 fence = max(fence, msm_obj->read_fence);
135 /* Internal submit flags */
136 #define SUBMIT_FLAG_SKIP_HANGCHECK 0x00000001
138 /* Created per submit-ioctl, to track bo's and cmdstream bufs, etc,
139 * associated with the cmdstream submission for synchronization (and
140 * make it easier to unwind when things go wrong, etc). This only
141 * lasts for the duration of the submit-ioctl.
143 struct msm_gem_submit {
144 struct drm_device *dev;
145 struct msm_gem_address_space *aspace;
146 struct list_head node; /* node in ring submit list */
147 struct list_head bo_list;
148 struct ww_acquire_ctx ticket;
152 uint64_t profile_buf_iova;
153 struct drm_msm_gem_submit_profile_buffer *profile_buf;
155 struct msm_gpu_submitqueue *queue;
157 unsigned int nr_cmds;
161 uint32_t size; /* in dwords */
163 uint32_t idx; /* cmdstream buffer idx in bos[] */
164 } *cmd; /* array of size nr_cmds */
167 struct msm_gem_object *obj;
172 #endif /* __MSM_GEM_H__ */