drivers/gpu/drm/nouveau/nvkm/engine/mpeg/nv50.c

   1 /*
   2  * Copyright 2012 Red Hat Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20  * OTHER DEALINGS IN THE SOFTWARE.
  21  *
  22  * Authors: Ben Skeggs
  23  */
  24 #include <engine/mpeg.h>
  25
  26 #include <subdev/bar.h>
  27 #include <subdev/timer.h>
  28
  29 struct nv50_mpeg_chan {
  30         struct nvkm_mpeg_chan base;
  31 };
  32
  33 /*******************************************************************************
  34  * MPEG object classes
  35  ******************************************************************************/
  36
  37 static int
  38 nv50_mpeg_object_ctor(struct nvkm_object *parent,
  39                       struct nvkm_object *engine,
  40                       struct nvkm_oclass *oclass, void *data, u32 size,
  41                       struct nvkm_object **pobject)
  42 {
  43         struct nvkm_gpuobj *obj;
  44         int ret;
  45
  46         ret = nvkm_gpuobj_create(parent, engine, oclass, 0, parent,
  47                                  16, 16, 0, &obj);
  48         *pobject = nv_object(obj);
  49         if (ret)
  50                 return ret;
  51
  52         nvkm_kmap(obj);
  53         nvkm_wo32(obj, 0x00, nv_mclass(obj));
  54         nvkm_wo32(obj, 0x04, 0x00000000);
  55         nvkm_wo32(obj, 0x08, 0x00000000);
  56         nvkm_wo32(obj, 0x0c, 0x00000000);
  57         nvkm_done(obj);
  58         return 0;
  59 }
  60
  61 struct nvkm_ofuncs
  62 nv50_mpeg_ofuncs = {
  63         .ctor = nv50_mpeg_object_ctor,
  64         .dtor = _nvkm_gpuobj_dtor,
  65         .init = _nvkm_gpuobj_init,
  66         .fini = _nvkm_gpuobj_fini,
  67         .rd32 = _nvkm_gpuobj_rd32,
  68         .wr32 = _nvkm_gpuobj_wr32,
  69 };
  70
  71 static struct nvkm_oclass
  72 nv50_mpeg_sclass[] = {
  73         { 0x3174, &nv50_mpeg_ofuncs },
  74         {}
  75 };
  76
  77 /*******************************************************************************
  78  * PMPEG context
  79  ******************************************************************************/
  80
  81 int
  82 nv50_mpeg_context_ctor(struct nvkm_object *parent,
  83                        struct nvkm_object *engine,
  84                        struct nvkm_oclass *oclass, void *data, u32 size,
  85                        struct nvkm_object **pobject)
  86 {
  87         struct nvkm_bar *bar = nvkm_bar(parent);
  88         struct nv50_mpeg_chan *chan;
  89         struct nvkm_gpuobj *image;
  90         int ret;
  91
  92         ret = nvkm_mpeg_context_create(parent, engine, oclass, NULL, 128 * 4,
  93                                        0, NVOBJ_FLAG_ZERO_ALLOC, &chan);
  94         *pobject = nv_object(chan);
  95         if (ret)
  96                 return ret;
  97
  98         image = &chan->base.base.gpuobj;
  99
 100         nvkm_kmap(image);
 101         nvkm_wo32(image, 0x0070, 0x00801ec1);
 102         nvkm_wo32(image, 0x007c, 0x0000037c);
 103         bar->flush(bar);
 104         nvkm_done(image);
 105         return 0;
 106 }
 107
 108 static struct nvkm_oclass
 109 nv50_mpeg_cclass = {
 110         .handle = NV_ENGCTX(MPEG, 0x50),
 111         .ofuncs = &(struct nvkm_ofuncs) {
 112                 .ctor = nv50_mpeg_context_ctor,
 113                 .dtor = _nvkm_mpeg_context_dtor,
 114                 .init = _nvkm_mpeg_context_init,
 115                 .fini = _nvkm_mpeg_context_fini,
 116                 .rd32 = _nvkm_mpeg_context_rd32,
 117                 .wr32 = _nvkm_mpeg_context_wr32,
 118         },
 119 };
 120
 121 /*******************************************************************************
 122  * PMPEG engine/subdev functions
 123  ******************************************************************************/
 124
 125 void
 126 nv50_mpeg_intr(struct nvkm_subdev *subdev)
 127 {
 128         struct nvkm_mpeg *mpeg = (void *)subdev;
 129         struct nvkm_device *device = mpeg->engine.subdev.device;
 130         u32 stat = nvkm_rd32(device, 0x00b100);
 131         u32 type = nvkm_rd32(device, 0x00b230);
 132         u32 mthd = nvkm_rd32(device, 0x00b234);
 133         u32 data = nvkm_rd32(device, 0x00b238);
 134         u32 show = stat;
 135
 136         if (stat & 0x01000000) {
 137                 /* happens on initial binding of the object */
 138                 if (type == 0x00000020 && mthd == 0x0000) {
 139                         nvkm_wr32(device, 0x00b308, 0x00000100);
 140                         show &= ~0x01000000;
 141                 }
 142         }
 143
 144         if (show) {
 145                 nvkm_info(subdev, "%08x %08x %08x %08x\n",
 146                           stat, type, mthd, data);
 147         }
 148
 149         nvkm_wr32(device, 0x00b100, stat);
 150         nvkm_wr32(device, 0x00b230, 0x00000001);
 151 }
 152
 153 static void
 154 nv50_vpe_intr(struct nvkm_subdev *subdev)
 155 {
 156         struct nvkm_device *device = subdev->device;
 157
 158         if (nvkm_rd32(device, 0x00b100))
 159                 nv50_mpeg_intr(subdev);
 160
 161         if (nvkm_rd32(device, 0x00b800)) {
 162                 u32 stat = nvkm_rd32(device, 0x00b800);
 163                 nvkm_info(subdev, "PMSRCH: %08x\n", stat);
 164                 nvkm_wr32(device, 0xb800, stat);
 165         }
 166 }
 167
 168 static int
 169 nv50_mpeg_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
 170                struct nvkm_oclass *oclass, void *data, u32 size,
 171                struct nvkm_object **pobject)
 172 {
 173         struct nvkm_mpeg *mpeg;
 174         int ret;
 175
 176         ret = nvkm_mpeg_create(parent, engine, oclass, &mpeg);
 177         *pobject = nv_object(mpeg);
 178         if (ret)
 179                 return ret;
 180
 181         nv_subdev(mpeg)->unit = 0x00400002;
 182         nv_subdev(mpeg)->intr = nv50_vpe_intr;
 183         nv_engine(mpeg)->cclass = &nv50_mpeg_cclass;
 184         nv_engine(mpeg)->sclass = nv50_mpeg_sclass;
 185         return 0;
 186 }
 187
 188 int
 189 nv50_mpeg_init(struct nvkm_object *object)
 190 {
 191         struct nvkm_mpeg *mpeg = (void *)object;
 192         struct nvkm_subdev *subdev = &mpeg->engine.subdev;
 193         struct nvkm_device *device = subdev->device;
 194         int ret;
 195
 196         ret = nvkm_mpeg_init(mpeg);
 197         if (ret)
 198                 return ret;
 199
 200         nvkm_wr32(device, 0x00b32c, 0x00000000);
 201         nvkm_wr32(device, 0x00b314, 0x00000100);
 202         nvkm_wr32(device, 0x00b0e0, 0x0000001a);
 203
 204         nvkm_wr32(device, 0x00b220, 0x00000044);
 205         nvkm_wr32(device, 0x00b300, 0x00801ec1);
 206         nvkm_wr32(device, 0x00b390, 0x00000000);
 207         nvkm_wr32(device, 0x00b394, 0x00000000);
 208         nvkm_wr32(device, 0x00b398, 0x00000000);
 209         nvkm_mask(device, 0x00b32c, 0x00000001, 0x00000001);
 210
 211         nvkm_wr32(device, 0x00b100, 0xffffffff);
 212         nvkm_wr32(device, 0x00b140, 0xffffffff);
 213
 214         if (nvkm_msec(device, 2000,
 215                 if (!(nvkm_rd32(device, 0x00b200) & 0x00000001))
 216                         break;
 217         ) < 0) {
 218                 nvkm_error(subdev, "timeout %08x\n",
 219                            nvkm_rd32(device, 0x00b200));
 220                 return -EBUSY;
 221         }
 222
 223         return 0;
 224 }
 225
 226 struct nvkm_oclass
 227 nv50_mpeg_oclass = {
 228         .handle = NV_ENGINE(MPEG, 0x50),
 229         .ofuncs = &(struct nvkm_ofuncs) {
 230                 .ctor = nv50_mpeg_ctor,
 231                 .dtor = _nvkm_mpeg_dtor,
 232                 .init = nv50_mpeg_init,
 233                 .fini = _nvkm_mpeg_fini,
 234         },
 235 };