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24 #include <subdev/mmu.h>
25 #include <subdev/fb.h>
26 #include <subdev/ltc.h>
27 #include <subdev/timer.h>
29 #include <core/gpuobj.h>
31 /* Map from compressed to corresponding uncompressed storage type.
32 * The value 0xff represents an invalid storage type.
34 const u8 gf100_pte_storage_type_map[256] =
36 0x00, 0x01, 0x01, 0x01, 0x01, 0x01, 0xff, 0x01, /* 0x00 */
37 0x01, 0x01, 0x01, 0xff, 0xff, 0xff, 0xff, 0xff,
38 0xff, 0x11, 0xff, 0xff, 0xff, 0xff, 0xff, 0x11, /* 0x10 */
39 0x11, 0x11, 0x11, 0xff, 0xff, 0xff, 0xff, 0xff,
40 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x26, 0x27, /* 0x20 */
41 0x28, 0x29, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
42 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 0x30 */
43 0xff, 0xff, 0x26, 0x27, 0x28, 0x29, 0x26, 0x27,
44 0x28, 0x29, 0xff, 0xff, 0xff, 0xff, 0x46, 0xff, /* 0x40 */
45 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
46 0xff, 0x46, 0x46, 0x46, 0x46, 0xff, 0xff, 0xff, /* 0x50 */
47 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
48 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 0x60 */
49 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
50 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 0x70 */
51 0xff, 0xff, 0xff, 0x7b, 0xff, 0xff, 0xff, 0xff,
52 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x7b, 0x7b, /* 0x80 */
53 0x7b, 0x7b, 0xff, 0x8b, 0x8c, 0x8d, 0x8e, 0xff,
54 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 0x90 */
55 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
56 0xff, 0xff, 0xff, 0x8b, 0x8c, 0x8d, 0x8e, 0xa7, /* 0xa0 */
57 0xa8, 0xa9, 0xaa, 0xff, 0xff, 0xff, 0xff, 0xff,
58 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 0xb0 */
59 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xa7,
60 0xa8, 0xa9, 0xaa, 0xc3, 0xff, 0xff, 0xff, 0xff, /* 0xc0 */
61 0xff, 0xff, 0xff, 0xff, 0xfe, 0xfe, 0xc3, 0xc3,
62 0xc3, 0xc3, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 0xd0 */
63 0xfe, 0xff, 0xff, 0xfe, 0xff, 0xfe, 0xff, 0xfe,
64 0xfe, 0xff, 0xfe, 0xfe, 0xfe, 0xfe, 0xfe, 0xff, /* 0xe0 */
65 0xff, 0xfe, 0xff, 0xfe, 0xff, 0xfe, 0xfe, 0xff,
66 0xfe, 0xfe, 0xfe, 0xfe, 0xfe, 0xfe, 0xfe, 0xfe, /* 0xf0 */
67 0xfe, 0xfe, 0xfe, 0xfe, 0xff, 0xfd, 0xfe, 0xff
72 gf100_vm_map_pgt(struct nvkm_gpuobj *pgd, u32 index, struct nvkm_memory *pgt[2])
74 u32 pde[2] = { 0, 0 };
77 pde[1] = 0x00000001 | (nvkm_memory_addr(pgt[0]) >> 8);
79 pde[0] = 0x00000001 | (nvkm_memory_addr(pgt[1]) >> 8);
82 nvkm_wo32(pgd, (index * 8) + 0, pde[0]);
83 nvkm_wo32(pgd, (index * 8) + 4, pde[1]);
88 gf100_vm_addr(struct nvkm_vma *vma, u64 phys, u32 memtype, u32 target)
92 phys |= 0x00000001; /* present */
93 if (vma->access & NV_MEM_ACCESS_SYS)
96 phys |= ((u64)target << 32);
97 phys |= ((u64)memtype << 36);
102 gf100_vm_map(struct nvkm_vma *vma, struct nvkm_memory *pgt,
103 struct nvkm_mem *mem, u32 pte, u32 cnt, u64 phys, u64 delta)
105 u64 next = 1 << (vma->node->type - 8);
107 phys = gf100_vm_addr(vma, phys, mem->memtype, 0);
111 struct nvkm_ltc *ltc = nvkm_ltc(vma->vm->mmu);
112 u32 tag = mem->tag->offset + (delta >> 17);
113 phys |= (u64)tag << (32 + 12);
114 next |= (u64)1 << (32 + 12);
115 ltc->tags_clear(ltc, tag, cnt);
120 nvkm_wo32(pgt, pte + 0, lower_32_bits(phys));
121 nvkm_wo32(pgt, pte + 4, upper_32_bits(phys));
129 gf100_vm_map_sg(struct nvkm_vma *vma, struct nvkm_memory *pgt,
130 struct nvkm_mem *mem, u32 pte, u32 cnt, dma_addr_t *list)
132 u32 target = (vma->access & NV_MEM_ACCESS_NOSNOOP) ? 7 : 5;
133 /* compressed storage types are invalid for system memory */
134 u32 memtype = gf100_pte_storage_type_map[mem->memtype & 0xff];
139 u64 phys = gf100_vm_addr(vma, *list++, memtype, target);
140 nvkm_wo32(pgt, pte + 0, lower_32_bits(phys));
141 nvkm_wo32(pgt, pte + 4, upper_32_bits(phys));
148 gf100_vm_unmap(struct nvkm_vma *vma, struct nvkm_memory *pgt, u32 pte, u32 cnt)
153 nvkm_wo32(pgt, pte + 0, 0x00000000);
154 nvkm_wo32(pgt, pte + 4, 0x00000000);
161 gf100_vm_flush(struct nvkm_vm *vm)
163 struct nvkm_mmu *mmu = (void *)vm->mmu;
164 struct nvkm_device *device = mmu->subdev.device;
165 struct nvkm_vm_pgd *vpgd;
168 type = 0x00000001; /* PAGE_ALL */
169 if (atomic_read(&vm->engref[NVDEV_SUBDEV_BAR]))
170 type |= 0x00000004; /* HUB_ONLY */
172 mutex_lock(&nv_subdev(mmu)->mutex);
173 list_for_each_entry(vpgd, &vm->pgd_list, head) {
174 /* looks like maybe a "free flush slots" counter, the
175 * faster you write to 0x100cbc to more it decreases
177 nvkm_msec(device, 2000,
178 if (nvkm_rd32(device, 0x100c80) & 0x00ff0000)
182 nvkm_wr32(device, 0x100cb8, vpgd->obj->addr >> 8);
183 nvkm_wr32(device, 0x100cbc, 0x80000000 | type);
185 /* wait for flush to be queued? */
186 nvkm_msec(device, 2000,
187 if (nvkm_rd32(device, 0x100c80) & 0x00008000)
191 mutex_unlock(&nv_subdev(mmu)->mutex);
195 gf100_vm_create(struct nvkm_mmu *mmu, u64 offset, u64 length, u64 mm_offset,
196 struct lock_class_key *key, struct nvkm_vm **pvm)
198 return nvkm_vm_create(mmu, offset, length, mm_offset, 4096, key, pvm);
202 gf100_mmu_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
203 struct nvkm_oclass *oclass, void *data, u32 size,
204 struct nvkm_object **pobject)
206 struct nvkm_mmu *mmu;
209 ret = nvkm_mmu_create(parent, engine, oclass, "VM", "mmu", &mmu);
210 *pobject = nv_object(mmu);
214 mmu->limit = 1ULL << 40;
216 mmu->pgt_bits = 27 - 12;
219 mmu->create = gf100_vm_create;
220 mmu->map_pgt = gf100_vm_map_pgt;
221 mmu->map = gf100_vm_map;
222 mmu->map_sg = gf100_vm_map_sg;
223 mmu->unmap = gf100_vm_unmap;
224 mmu->flush = gf100_vm_flush;
230 .handle = NV_SUBDEV(MMU, 0xc0),
231 .ofuncs = &(struct nvkm_ofuncs) {
232 .ctor = gf100_mmu_ctor,
233 .dtor = _nvkm_mmu_dtor,
234 .init = _nvkm_mmu_init,
235 .fini = _nvkm_mmu_fini,