2 * drivers/gpu/drm/omapdrm/omap_crtc.c
4 * Copyright (C) 2011 Texas Instruments
5 * Author: Rob Clark <rob@ti.com>
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published by
9 * the Free Software Foundation.
11 * This program is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
16 * You should have received a copy of the GNU General Public License along with
17 * this program. If not, see <http://www.gnu.org/licenses/>.
20 #include <linux/completion.h>
22 #include <drm/drm_atomic.h>
23 #include <drm/drm_atomic_helper.h>
24 #include <drm/drm_crtc.h>
25 #include <drm/drm_crtc_helper.h>
26 #include <drm/drm_mode.h>
27 #include <drm/drm_plane_helper.h>
31 #define to_omap_crtc(x) container_of(x, struct omap_crtc, base)
37 enum omap_channel channel;
40 * Temporary: eventually this will go away, but it is needed
41 * for now to keep the output's happy. (They only need
42 * mgr->id.) Eventually this will be replaced w/ something
43 * more common-panel-framework-y
45 struct omap_overlay_manager *mgr;
47 struct omap_video_timings timings;
49 struct omap_drm_irq vblank_irq;
50 struct omap_drm_irq error_irq;
53 struct drm_pending_vblank_event *event;
54 wait_queue_head_t flip_wait;
56 struct completion completion;
58 bool ignore_digit_sync_lost;
61 /* -----------------------------------------------------------------------------
65 uint32_t pipe2vbl(struct drm_crtc *crtc)
67 struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
69 return dispc_mgr_get_vsync_irq(omap_crtc->channel);
72 struct omap_video_timings *omap_crtc_timings(struct drm_crtc *crtc)
74 struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
75 return &omap_crtc->timings;
78 enum omap_channel omap_crtc_channel(struct drm_crtc *crtc)
80 struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
81 return omap_crtc->channel;
84 /* -----------------------------------------------------------------------------
85 * DSS Manager Functions
89 * Manager-ops, callbacks from output when they need to configure
90 * the upstream part of the video pipe.
92 * Most of these we can ignore until we add support for command-mode
93 * panels.. for video-mode the crtc-helpers already do an adequate
94 * job of sequencing the setup of the video pipe in the proper order
97 /* ovl-mgr-id -> crtc */
98 static struct omap_crtc *omap_crtcs[8];
100 /* we can probably ignore these until we support command-mode panels: */
101 static int omap_crtc_dss_connect(struct omap_overlay_manager *mgr,
102 struct omap_dss_device *dst)
107 if ((mgr->supported_outputs & dst->id) == 0)
116 static void omap_crtc_dss_disconnect(struct omap_overlay_manager *mgr,
117 struct omap_dss_device *dst)
119 mgr->output->manager = NULL;
123 static void omap_crtc_dss_start_update(struct omap_overlay_manager *mgr)
127 /* Called only from the encoder enable/disable and suspend/resume handlers. */
128 static void omap_crtc_set_enabled(struct drm_crtc *crtc, bool enable)
130 struct drm_device *dev = crtc->dev;
131 struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
132 enum omap_channel channel = omap_crtc->channel;
133 struct omap_irq_wait *wait;
134 u32 framedone_irq, vsync_irq;
137 if (dispc_mgr_is_enabled(channel) == enable)
140 if (omap_crtc->channel == OMAP_DSS_CHANNEL_DIGIT) {
142 * Digit output produces some sync lost interrupts during the
143 * first frame when enabling, so we need to ignore those.
145 omap_crtc->ignore_digit_sync_lost = true;
148 framedone_irq = dispc_mgr_get_framedone_irq(channel);
149 vsync_irq = dispc_mgr_get_vsync_irq(channel);
152 wait = omap_irq_wait_init(dev, vsync_irq, 1);
155 * When we disable the digit output, we need to wait for
156 * FRAMEDONE to know that DISPC has finished with the output.
158 * OMAP2/3 does not have FRAMEDONE irq for digit output, and in
159 * that case we need to use vsync interrupt, and wait for both
160 * even and odd frames.
164 wait = omap_irq_wait_init(dev, framedone_irq, 1);
166 wait = omap_irq_wait_init(dev, vsync_irq, 2);
169 dispc_mgr_enable(channel, enable);
171 ret = omap_irq_wait(dev, wait, msecs_to_jiffies(100));
173 dev_err(dev->dev, "%s: timeout waiting for %s\n",
174 omap_crtc->name, enable ? "enable" : "disable");
177 if (omap_crtc->channel == OMAP_DSS_CHANNEL_DIGIT) {
178 omap_crtc->ignore_digit_sync_lost = false;
179 /* make sure the irq handler sees the value above */
185 static int omap_crtc_dss_enable(struct omap_overlay_manager *mgr)
187 struct omap_crtc *omap_crtc = omap_crtcs[mgr->id];
188 struct omap_overlay_manager_info info;
190 memset(&info, 0, sizeof(info));
191 info.default_color = 0x00000000;
192 info.trans_key = 0x00000000;
193 info.trans_key_type = OMAP_DSS_COLOR_KEY_GFX_DST;
194 info.trans_enabled = false;
196 dispc_mgr_setup(omap_crtc->channel, &info);
197 dispc_mgr_set_timings(omap_crtc->channel,
198 &omap_crtc->timings);
199 omap_crtc_set_enabled(&omap_crtc->base, true);
204 static void omap_crtc_dss_disable(struct omap_overlay_manager *mgr)
206 struct omap_crtc *omap_crtc = omap_crtcs[mgr->id];
208 omap_crtc_set_enabled(&omap_crtc->base, false);
211 static void omap_crtc_dss_set_timings(struct omap_overlay_manager *mgr,
212 const struct omap_video_timings *timings)
214 struct omap_crtc *omap_crtc = omap_crtcs[mgr->id];
215 DBG("%s", omap_crtc->name);
216 omap_crtc->timings = *timings;
219 static void omap_crtc_dss_set_lcd_config(struct omap_overlay_manager *mgr,
220 const struct dss_lcd_mgr_config *config)
222 struct omap_crtc *omap_crtc = omap_crtcs[mgr->id];
223 DBG("%s", omap_crtc->name);
224 dispc_mgr_set_lcd_config(omap_crtc->channel, config);
227 static int omap_crtc_dss_register_framedone(
228 struct omap_overlay_manager *mgr,
229 void (*handler)(void *), void *data)
234 static void omap_crtc_dss_unregister_framedone(
235 struct omap_overlay_manager *mgr,
236 void (*handler)(void *), void *data)
240 static const struct dss_mgr_ops mgr_ops = {
241 .connect = omap_crtc_dss_connect,
242 .disconnect = omap_crtc_dss_disconnect,
243 .start_update = omap_crtc_dss_start_update,
244 .enable = omap_crtc_dss_enable,
245 .disable = omap_crtc_dss_disable,
246 .set_timings = omap_crtc_dss_set_timings,
247 .set_lcd_config = omap_crtc_dss_set_lcd_config,
248 .register_framedone_handler = omap_crtc_dss_register_framedone,
249 .unregister_framedone_handler = omap_crtc_dss_unregister_framedone,
252 /* -----------------------------------------------------------------------------
253 * Setup, Flush and Page Flip
256 static void omap_crtc_complete_page_flip(struct drm_crtc *crtc)
258 struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
259 struct drm_pending_vblank_event *event;
260 struct drm_device *dev = crtc->dev;
263 spin_lock_irqsave(&dev->event_lock, flags);
265 event = omap_crtc->event;
266 omap_crtc->event = NULL;
269 list_del(&event->base.link);
272 * Queue the event for delivery if it's still linked to a file
273 * handle, otherwise just destroy it.
275 if (event->base.file_priv)
276 drm_crtc_send_vblank_event(crtc, event);
278 event->base.destroy(&event->base);
280 wake_up(&omap_crtc->flip_wait);
281 drm_crtc_vblank_put(crtc);
284 spin_unlock_irqrestore(&dev->event_lock, flags);
287 static bool omap_crtc_page_flip_pending(struct drm_crtc *crtc)
289 struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
290 struct drm_device *dev = crtc->dev;
294 spin_lock_irqsave(&dev->event_lock, flags);
295 pending = omap_crtc->event != NULL;
296 spin_unlock_irqrestore(&dev->event_lock, flags);
301 static void omap_crtc_wait_page_flip(struct drm_crtc *crtc)
303 struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
305 if (wait_event_timeout(omap_crtc->flip_wait,
306 !omap_crtc_page_flip_pending(crtc),
307 msecs_to_jiffies(50)))
310 dev_warn(crtc->dev->dev, "page flip timeout!\n");
312 omap_crtc_complete_page_flip(crtc);
315 static void omap_crtc_error_irq(struct omap_drm_irq *irq, uint32_t irqstatus)
317 struct omap_crtc *omap_crtc =
318 container_of(irq, struct omap_crtc, error_irq);
320 if (omap_crtc->ignore_digit_sync_lost) {
321 irqstatus &= ~DISPC_IRQ_SYNC_LOST_DIGIT;
326 DRM_ERROR_RATELIMITED("%s: errors: %08x\n", omap_crtc->name, irqstatus);
329 static void omap_crtc_vblank_irq(struct omap_drm_irq *irq, uint32_t irqstatus)
331 struct omap_crtc *omap_crtc =
332 container_of(irq, struct omap_crtc, vblank_irq);
333 struct drm_device *dev = omap_crtc->base.dev;
335 if (dispc_mgr_go_busy(omap_crtc->channel))
338 DBG("%s: apply done", omap_crtc->name);
339 __omap_irq_unregister(dev, &omap_crtc->vblank_irq);
341 /* wakeup userspace */
342 omap_crtc_complete_page_flip(&omap_crtc->base);
344 complete(&omap_crtc->completion);
347 static int omap_crtc_flush(struct drm_crtc *crtc)
349 struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
351 DBG("%s: GO", omap_crtc->name);
353 WARN_ON(omap_crtc->vblank_irq.registered);
355 if (dispc_mgr_is_enabled(omap_crtc->channel)) {
356 dispc_mgr_go(omap_crtc->channel);
357 omap_irq_register(crtc->dev, &omap_crtc->vblank_irq);
359 WARN_ON(!wait_for_completion_timeout(&omap_crtc->completion,
360 msecs_to_jiffies(100)));
361 reinit_completion(&omap_crtc->completion);
367 /* -----------------------------------------------------------------------------
371 static void omap_crtc_destroy(struct drm_crtc *crtc)
373 struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
375 DBG("%s", omap_crtc->name);
377 WARN_ON(omap_crtc->vblank_irq.registered);
378 omap_irq_unregister(crtc->dev, &omap_crtc->error_irq);
380 drm_crtc_cleanup(crtc);
385 static bool omap_crtc_mode_fixup(struct drm_crtc *crtc,
386 const struct drm_display_mode *mode,
387 struct drm_display_mode *adjusted_mode)
392 static void omap_crtc_enable(struct drm_crtc *crtc)
394 struct omap_drm_private *priv = crtc->dev->dev_private;
395 struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
398 DBG("%s", omap_crtc->name);
400 /* Enable all planes associated with the CRTC. */
401 for (i = 0; i < priv->num_planes; i++) {
402 struct drm_plane *plane = priv->planes[i];
404 if (plane->crtc == crtc)
405 WARN_ON(omap_plane_setup(plane));
408 omap_crtc_flush(crtc);
410 drm_crtc_vblank_on(crtc);
413 static void omap_crtc_disable(struct drm_crtc *crtc)
415 struct omap_drm_private *priv = crtc->dev->dev_private;
416 struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
419 DBG("%s", omap_crtc->name);
421 omap_crtc_wait_page_flip(crtc);
422 drm_crtc_vblank_off(crtc);
424 /* Disable all planes associated with the CRTC. */
425 for (i = 0; i < priv->num_planes; i++) {
426 struct drm_plane *plane = priv->planes[i];
428 if (plane->crtc == crtc)
429 WARN_ON(omap_plane_setup(plane));
432 omap_crtc_flush(crtc);
435 static void omap_crtc_mode_set_nofb(struct drm_crtc *crtc)
437 struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
438 struct drm_display_mode *mode = &crtc->state->adjusted_mode;
440 DBG("%s: set mode: %d:\"%s\" %d %d %d %d %d %d %d %d %d %d 0x%x 0x%x",
441 omap_crtc->name, mode->base.id, mode->name,
442 mode->vrefresh, mode->clock,
443 mode->hdisplay, mode->hsync_start, mode->hsync_end, mode->htotal,
444 mode->vdisplay, mode->vsync_start, mode->vsync_end, mode->vtotal,
445 mode->type, mode->flags);
447 copy_timings_drm_to_omap(&omap_crtc->timings, mode);
450 static void omap_crtc_atomic_begin(struct drm_crtc *crtc)
452 struct drm_pending_vblank_event *event = crtc->state->event;
453 struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
454 struct drm_device *dev = crtc->dev;
458 WARN_ON(omap_crtc->event);
459 WARN_ON(drm_crtc_vblank_get(crtc) != 0);
461 spin_lock_irqsave(&dev->event_lock, flags);
462 omap_crtc->event = event;
463 spin_unlock_irqrestore(&dev->event_lock, flags);
467 static void omap_crtc_atomic_flush(struct drm_crtc *crtc)
469 omap_crtc_flush(crtc);
471 crtc->invert_dimensions = !!(crtc->primary->state->rotation &
472 (BIT(DRM_ROTATE_90) | BIT(DRM_ROTATE_270)));
475 static int omap_crtc_atomic_set_property(struct drm_crtc *crtc,
476 struct drm_crtc_state *state,
477 struct drm_property *property,
480 struct drm_plane_state *plane_state;
481 struct drm_plane *plane = crtc->primary;
484 * Delegate property set to the primary plane. Get the plane state and
485 * set the property directly.
488 plane_state = drm_atomic_get_plane_state(state->state, plane);
492 return drm_atomic_plane_set_property(plane, plane_state, property, val);
495 static int omap_crtc_atomic_get_property(struct drm_crtc *crtc,
496 const struct drm_crtc_state *state,
497 struct drm_property *property,
501 * Delegate property get to the primary plane. The
502 * drm_atomic_plane_get_property() function isn't exported, but can be
503 * called through drm_object_property_get_value() as that will call
504 * drm_atomic_get_property() for atomic drivers.
506 return drm_object_property_get_value(&crtc->primary->base, property,
510 static const struct drm_crtc_funcs omap_crtc_funcs = {
511 .reset = drm_atomic_helper_crtc_reset,
512 .set_config = drm_atomic_helper_set_config,
513 .destroy = omap_crtc_destroy,
514 .page_flip = drm_atomic_helper_page_flip,
515 .set_property = drm_atomic_helper_crtc_set_property,
516 .atomic_duplicate_state = drm_atomic_helper_crtc_duplicate_state,
517 .atomic_destroy_state = drm_atomic_helper_crtc_destroy_state,
518 .atomic_set_property = omap_crtc_atomic_set_property,
519 .atomic_get_property = omap_crtc_atomic_get_property,
522 static const struct drm_crtc_helper_funcs omap_crtc_helper_funcs = {
523 .mode_fixup = omap_crtc_mode_fixup,
524 .mode_set_nofb = omap_crtc_mode_set_nofb,
525 .disable = omap_crtc_disable,
526 .enable = omap_crtc_enable,
527 .atomic_begin = omap_crtc_atomic_begin,
528 .atomic_flush = omap_crtc_atomic_flush,
531 /* -----------------------------------------------------------------------------
535 static const char *channel_names[] = {
536 [OMAP_DSS_CHANNEL_LCD] = "lcd",
537 [OMAP_DSS_CHANNEL_DIGIT] = "tv",
538 [OMAP_DSS_CHANNEL_LCD2] = "lcd2",
539 [OMAP_DSS_CHANNEL_LCD3] = "lcd3",
542 void omap_crtc_pre_init(void)
544 dss_install_mgr_ops(&mgr_ops);
547 void omap_crtc_pre_uninit(void)
549 dss_uninstall_mgr_ops();
552 /* initialize crtc */
553 struct drm_crtc *omap_crtc_init(struct drm_device *dev,
554 struct drm_plane *plane, enum omap_channel channel, int id)
556 struct drm_crtc *crtc = NULL;
557 struct omap_crtc *omap_crtc;
560 DBG("%s", channel_names[channel]);
562 omap_crtc = kzalloc(sizeof(*omap_crtc), GFP_KERNEL);
566 crtc = &omap_crtc->base;
568 init_waitqueue_head(&omap_crtc->flip_wait);
569 init_completion(&omap_crtc->completion);
571 omap_crtc->channel = channel;
572 omap_crtc->name = channel_names[channel];
574 omap_crtc->vblank_irq.irqmask = pipe2vbl(crtc);
575 omap_crtc->vblank_irq.irq = omap_crtc_vblank_irq;
577 omap_crtc->error_irq.irqmask =
578 dispc_mgr_get_sync_lost_irq(channel);
579 omap_crtc->error_irq.irq = omap_crtc_error_irq;
580 omap_irq_register(dev, &omap_crtc->error_irq);
583 omap_crtc->mgr = omap_dss_get_overlay_manager(channel);
585 ret = drm_crtc_init_with_planes(dev, crtc, plane, NULL,
592 drm_crtc_helper_add(crtc, &omap_crtc_helper_funcs);
594 omap_plane_install_properties(crtc->primary, &crtc->base);
596 omap_crtcs[channel] = omap_crtc;