2 * Copyright 2000 ATI Technologies Inc., Markham, Ontario, and
3 * VA Linux Systems Inc., Fremont, California.
4 * Copyright 2008 Red Hat Inc.
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22 * OTHER DEALINGS IN THE SOFTWARE.
25 * Kevin E. Martin, Rickard E. Faith, Alan Hourihane
27 * Kernel port Author: Dave Airlie
33 #include <drm/drm_crtc.h>
34 #include <drm/drm_edid.h>
35 #include <drm/drm_dp_helper.h>
36 #include <drm/drm_fixed.h>
37 #include <drm/drm_crtc_helper.h>
38 #include <linux/i2c.h>
39 #include <linux/i2c-algo-bit.h>
44 #define to_radeon_crtc(x) container_of(x, struct radeon_crtc, base)
45 #define to_radeon_connector(x) container_of(x, struct radeon_connector, base)
46 #define to_radeon_encoder(x) container_of(x, struct radeon_encoder, base)
47 #define to_radeon_framebuffer(x) container_of(x, struct radeon_framebuffer, base)
49 #define RADEON_MAX_HPD_PINS 7
50 #define RADEON_MAX_CRTCS 6
51 #define RADEON_MAX_AFMT_BLOCKS 7
53 enum radeon_rmx_type {
72 enum radeon_underscan_type {
85 RADEON_HPD_NONE = 0xff,
88 #define RADEON_MAX_I2C_BUS 16
90 /* radeon gpio-based i2c
91 * 1. "mask" reg and bits
92 * grabs the gpio pins for software use
97 * 3. "en" reg and bits
98 * sets the pin direction
100 * 4. "y" reg and bits
104 struct radeon_i2c_bus_rec {
106 /* id used by atom */
108 /* id used by atom */
109 enum radeon_hpd_id hpd;
110 /* can be used with hw i2c engine */
112 /* uses multi-media i2c engine */
115 uint32_t mask_clk_reg;
116 uint32_t mask_data_reg;
120 uint32_t en_data_reg;
123 uint32_t mask_clk_mask;
124 uint32_t mask_data_mask;
126 uint32_t a_data_mask;
127 uint32_t en_clk_mask;
128 uint32_t en_data_mask;
130 uint32_t y_data_mask;
133 struct radeon_tmds_pll {
138 #define RADEON_MAX_BIOS_CONNECTOR 16
141 #define RADEON_PLL_USE_BIOS_DIVS (1 << 0)
142 #define RADEON_PLL_NO_ODD_POST_DIV (1 << 1)
143 #define RADEON_PLL_USE_REF_DIV (1 << 2)
144 #define RADEON_PLL_LEGACY (1 << 3)
145 #define RADEON_PLL_PREFER_LOW_REF_DIV (1 << 4)
146 #define RADEON_PLL_PREFER_HIGH_REF_DIV (1 << 5)
147 #define RADEON_PLL_PREFER_LOW_FB_DIV (1 << 6)
148 #define RADEON_PLL_PREFER_HIGH_FB_DIV (1 << 7)
149 #define RADEON_PLL_PREFER_LOW_POST_DIV (1 << 8)
150 #define RADEON_PLL_PREFER_HIGH_POST_DIV (1 << 9)
151 #define RADEON_PLL_USE_FRAC_FB_DIV (1 << 10)
152 #define RADEON_PLL_PREFER_CLOSEST_LOWER (1 << 11)
153 #define RADEON_PLL_USE_POST_DIV (1 << 12)
154 #define RADEON_PLL_IS_LCD (1 << 13)
155 #define RADEON_PLL_PREFER_MINM_OVER_MAXP (1 << 14)
158 /* reference frequency */
159 uint32_t reference_freq;
162 uint32_t reference_div;
165 /* pll in/out limits */
168 uint32_t pll_out_min;
169 uint32_t pll_out_max;
170 uint32_t lcd_pll_out_min;
171 uint32_t lcd_pll_out_max;
175 uint32_t min_ref_div;
176 uint32_t max_ref_div;
177 uint32_t min_post_div;
178 uint32_t max_post_div;
179 uint32_t min_feedback_div;
180 uint32_t max_feedback_div;
181 uint32_t min_frac_feedback_div;
182 uint32_t max_frac_feedback_div;
184 /* flags for the current clock */
191 struct radeon_i2c_chan {
192 struct i2c_adapter adapter;
193 struct drm_device *dev;
194 struct i2c_algo_bit_data bit;
195 struct radeon_i2c_bus_rec rec;
196 struct drm_dp_aux aux;
201 /* mostly for macs, but really any system without connector tables */
202 enum radeon_connector_table {
206 CT_POWERBOOK_EXTERNAL,
207 CT_POWERBOOK_INTERNAL,
220 enum radeon_dvo_chip {
230 bool last_buffer_filled_status;
232 struct r600_audio_pin *pin;
235 struct radeon_mode_info {
236 struct atom_context *atom_context;
237 struct card_info *atom_card_info;
238 enum radeon_connector_table connector_table;
239 bool mode_config_initialized;
240 struct radeon_crtc *crtcs[RADEON_MAX_CRTCS];
241 struct radeon_afmt *afmt[RADEON_MAX_AFMT_BLOCKS];
242 /* DVI-I properties */
243 struct drm_property *coherent_mode_property;
244 /* DAC enable load detect */
245 struct drm_property *load_detect_property;
247 struct drm_property *tv_std_property;
248 /* legacy TMDS PLL detect */
249 struct drm_property *tmds_pll_property;
251 struct drm_property *underscan_property;
252 struct drm_property *underscan_hborder_property;
253 struct drm_property *underscan_vborder_property;
255 struct drm_property *audio_property;
257 struct drm_property *dither_property;
258 /* hardcoded DFP edid from BIOS */
259 struct edid *bios_hardcoded_edid;
260 int bios_hardcoded_edid_size;
262 /* pointer to fbdev info structure */
263 struct radeon_fbdev *rfbdev;
266 /* pointer to backlight encoder */
267 struct radeon_encoder *bl_encoder;
270 #define RADEON_MAX_BL_LEVEL 0xFF
272 #if defined(CONFIG_BACKLIGHT_CLASS_DEVICE) || defined(CONFIG_BACKLIGHT_CLASS_DEVICE_MODULE)
274 struct radeon_backlight_privdata {
275 struct radeon_encoder *encoder;
281 #define MAX_H_CODE_TIMING_LEN 32
282 #define MAX_V_CODE_TIMING_LEN 32
284 /* need to store these as reading
285 back code tables is excessive */
286 struct radeon_tv_regs {
288 uint32_t timing_cntl;
292 uint16_t h_code_timing[MAX_H_CODE_TIMING_LEN];
293 uint16_t v_code_timing[MAX_V_CODE_TIMING_LEN];
296 struct radeon_atom_ss {
298 uint16_t percentage_divider;
310 struct drm_crtc base;
312 u16 lut_r[256], lut_g[256], lut_b[256];
315 uint32_t crtc_offset;
316 struct drm_gem_object *cursor_bo;
317 uint64_t cursor_addr;
320 int max_cursor_width;
321 int max_cursor_height;
322 uint32_t legacy_display_base_addr;
323 uint32_t legacy_cursor_offset;
324 enum radeon_rmx_type rmx_type;
329 struct drm_display_mode native_mode;
332 struct workqueue_struct *flip_queue;
333 struct radeon_flip_work *flip_work;
335 struct radeon_atom_ss ss;
339 u32 pll_reference_div;
342 struct drm_encoder *encoder;
343 struct drm_connector *connector;
348 struct drm_display_mode hw_mode;
351 struct radeon_encoder_primary_dac {
352 /* legacy primary dac */
353 uint32_t ps2_pdac_adj;
356 struct radeon_encoder_lvds {
358 uint16_t panel_vcc_delay;
359 uint8_t panel_pwr_delay;
360 uint8_t panel_digon_delay;
361 uint8_t panel_blon_delay;
362 uint16_t panel_ref_divider;
363 uint8_t panel_post_divider;
364 uint16_t panel_fb_divider;
365 bool use_bios_dividers;
366 uint32_t lvds_gen_cntl;
368 struct drm_display_mode native_mode;
369 struct backlight_device *bl_dev;
371 uint8_t backlight_level;
374 struct radeon_encoder_tv_dac {
376 uint32_t ps2_tvdac_adj;
377 uint32_t ntsc_tvdac_adj;
378 uint32_t pal_tvdac_adj;
383 int supported_tv_stds;
385 enum radeon_tv_std tv_std;
386 struct radeon_tv_regs tv;
389 struct radeon_encoder_int_tmds {
390 /* legacy int tmds */
391 struct radeon_tmds_pll tmds_pll[4];
394 struct radeon_encoder_ext_tmds {
396 struct radeon_i2c_chan *i2c_bus;
398 enum radeon_dvo_chip dvo_chip;
401 /* spread spectrum */
402 struct radeon_encoder_atom_dig {
406 int dig_encoder; /* -1 disabled, 0 DIGA, 1 DIGB, etc. */
409 uint16_t panel_pwr_delay;
412 struct drm_display_mode native_mode;
413 struct backlight_device *bl_dev;
415 uint8_t backlight_level;
417 struct radeon_afmt *afmt;
420 struct radeon_encoder_atom_dac {
421 enum radeon_tv_std tv_std;
424 struct radeon_encoder {
425 struct drm_encoder base;
426 uint32_t encoder_enum;
429 uint32_t active_device;
431 uint32_t pixel_clock;
432 enum radeon_rmx_type rmx_type;
433 enum radeon_underscan_type underscan_type;
434 uint32_t underscan_hborder;
435 uint32_t underscan_vborder;
436 struct drm_display_mode native_mode;
438 int audio_polling_active;
443 struct radeon_connector_atom_dig {
444 uint32_t igp_lane_info;
446 u8 dpcd[DP_RECEIVER_CAP_SIZE];
453 struct radeon_gpio_rec {
461 enum radeon_hpd_id hpd;
463 struct radeon_gpio_rec gpio;
466 struct radeon_router {
468 struct radeon_i2c_bus_rec i2c_info;
473 u8 ddc_mux_control_pin;
478 u8 cd_mux_control_pin;
482 enum radeon_connector_audio {
483 RADEON_AUDIO_DISABLE = 0,
484 RADEON_AUDIO_ENABLE = 1,
485 RADEON_AUDIO_AUTO = 2
488 enum radeon_connector_dither {
489 RADEON_FMT_DITHER_DISABLE = 0,
490 RADEON_FMT_DITHER_ENABLE = 1,
493 struct radeon_connector {
494 struct drm_connector base;
495 uint32_t connector_id;
497 struct radeon_i2c_chan *ddc_bus;
498 /* some systems have an hdmi and vga port with a shared ddc line */
501 /* we need to mind the EDID between detect
502 and get modes due to analog/digital/tvencoder */
505 bool dac_load_detect;
506 bool detected_by_load; /* if the connection status was determined by load */
507 uint16_t connector_object_id;
508 struct radeon_hpd hpd;
509 struct radeon_router router;
510 struct radeon_i2c_chan *router_bus;
511 enum radeon_connector_audio audio;
512 enum radeon_connector_dither dither;
513 int pixelclock_for_modeset;
516 struct radeon_framebuffer {
517 struct drm_framebuffer base;
518 struct drm_gem_object *obj;
521 #define ENCODER_MODE_IS_DP(em) (((em) == ATOM_ENCODER_MODE_DP) || \
522 ((em) == ATOM_ENCODER_MODE_DP_MST))
524 struct atom_clock_dividers {
530 u32 whole_fb_div : 12;
531 u32 frac_fb_div : 14;
533 u32 frac_fb_div : 14;
534 u32 whole_fb_div : 12;
541 bool enable_post_div;
550 struct atom_mpll_param {
574 #define MEM_TYPE_GDDR5 0x50
575 #define MEM_TYPE_GDDR4 0x40
576 #define MEM_TYPE_GDDR3 0x30
577 #define MEM_TYPE_DDR2 0x20
578 #define MEM_TYPE_GDDR1 0x10
579 #define MEM_TYPE_DDR3 0xb0
580 #define MEM_TYPE_MASK 0xf0
582 struct atom_memory_info {
587 #define MAX_AC_TIMING_ENTRIES 16
589 struct atom_memory_clock_range_table
593 u32 mclk[MAX_AC_TIMING_ENTRIES];
596 #define VBIOS_MC_REGISTER_ARRAY_SIZE 32
597 #define VBIOS_MAX_AC_TIMING_ENTRIES 20
599 struct atom_mc_reg_entry {
601 u32 mc_data[VBIOS_MC_REGISTER_ARRAY_SIZE];
604 struct atom_mc_register_address {
609 struct atom_mc_reg_table {
612 struct atom_mc_reg_entry mc_reg_table_entry[VBIOS_MAX_AC_TIMING_ENTRIES];
613 struct atom_mc_register_address mc_reg_address[VBIOS_MC_REGISTER_ARRAY_SIZE];
616 #define MAX_VOLTAGE_ENTRIES 32
618 struct atom_voltage_table_entry
624 struct atom_voltage_table
629 struct atom_voltage_table_entry entries[MAX_VOLTAGE_ENTRIES];
634 radeon_add_atom_connector(struct drm_device *dev,
635 uint32_t connector_id,
636 uint32_t supported_device,
638 struct radeon_i2c_bus_rec *i2c_bus,
639 uint32_t igp_lane_info,
640 uint16_t connector_object_id,
641 struct radeon_hpd *hpd,
642 struct radeon_router *router);
644 radeon_add_legacy_connector(struct drm_device *dev,
645 uint32_t connector_id,
646 uint32_t supported_device,
648 struct radeon_i2c_bus_rec *i2c_bus,
649 uint16_t connector_object_id,
650 struct radeon_hpd *hpd);
652 radeon_get_encoder_enum(struct drm_device *dev, uint32_t supported_device,
654 extern void radeon_link_encoder_connector(struct drm_device *dev);
656 extern enum radeon_tv_std
657 radeon_combios_get_tv_info(struct radeon_device *rdev);
658 extern enum radeon_tv_std
659 radeon_atombios_get_tv_info(struct radeon_device *rdev);
660 extern void radeon_atombios_get_default_voltages(struct radeon_device *rdev,
661 u16 *vddc, u16 *vddci, u16 *mvdd);
664 radeon_combios_connected_scratch_regs(struct drm_connector *connector,
665 struct drm_encoder *encoder,
668 radeon_atombios_connected_scratch_regs(struct drm_connector *connector,
669 struct drm_encoder *encoder,
672 extern struct drm_connector *
673 radeon_get_connector_for_encoder(struct drm_encoder *encoder);
674 extern struct drm_connector *
675 radeon_get_connector_for_encoder_init(struct drm_encoder *encoder);
676 extern bool radeon_dig_monitor_is_duallink(struct drm_encoder *encoder,
679 extern u16 radeon_encoder_get_dp_bridge_encoder_id(struct drm_encoder *encoder);
680 extern u16 radeon_connector_encoder_get_dp_bridge_encoder_id(struct drm_connector *connector);
681 extern bool radeon_connector_encoder_is_hbr2(struct drm_connector *connector);
682 extern bool radeon_connector_is_dp12_capable(struct drm_connector *connector);
683 extern int radeon_get_monitor_bpc(struct drm_connector *connector);
685 extern void radeon_connector_hotplug(struct drm_connector *connector);
686 extern int radeon_dp_mode_valid_helper(struct drm_connector *connector,
687 struct drm_display_mode *mode);
688 extern void radeon_dp_set_link_config(struct drm_connector *connector,
689 const struct drm_display_mode *mode);
690 extern void radeon_dp_link_train(struct drm_encoder *encoder,
691 struct drm_connector *connector);
692 extern bool radeon_dp_needs_link_train(struct radeon_connector *radeon_connector);
693 extern u8 radeon_dp_getsinktype(struct radeon_connector *radeon_connector);
694 extern bool radeon_dp_getdpcd(struct radeon_connector *radeon_connector);
695 extern int radeon_dp_get_panel_mode(struct drm_encoder *encoder,
696 struct drm_connector *connector);
697 extern void radeon_dp_set_rx_power_state(struct drm_connector *connector,
699 extern void radeon_dp_aux_init(struct radeon_connector *radeon_connector);
700 extern void atombios_dig_encoder_setup(struct drm_encoder *encoder, int action, int panel_mode);
701 extern void radeon_atom_encoder_init(struct radeon_device *rdev);
702 extern void radeon_atom_disp_eng_pll_init(struct radeon_device *rdev);
703 extern void atombios_dig_transmitter_setup(struct drm_encoder *encoder,
704 int action, uint8_t lane_num,
706 extern void radeon_atom_ext_encoder_setup_ddc(struct drm_encoder *encoder);
707 extern struct drm_encoder *radeon_get_external_encoder(struct drm_encoder *encoder);
708 void radeon_atom_copy_swap(u8 *dst, u8 *src, u8 num_bytes, bool to_le);
710 extern void radeon_i2c_init(struct radeon_device *rdev);
711 extern void radeon_i2c_fini(struct radeon_device *rdev);
712 extern void radeon_combios_i2c_init(struct radeon_device *rdev);
713 extern void radeon_atombios_i2c_init(struct radeon_device *rdev);
714 extern void radeon_i2c_add(struct radeon_device *rdev,
715 struct radeon_i2c_bus_rec *rec,
717 extern struct radeon_i2c_chan *radeon_i2c_lookup(struct radeon_device *rdev,
718 struct radeon_i2c_bus_rec *i2c_bus);
719 extern struct radeon_i2c_chan *radeon_i2c_create(struct drm_device *dev,
720 struct radeon_i2c_bus_rec *rec,
722 extern void radeon_i2c_destroy(struct radeon_i2c_chan *i2c);
723 extern void radeon_i2c_get_byte(struct radeon_i2c_chan *i2c_bus,
727 extern void radeon_i2c_put_byte(struct radeon_i2c_chan *i2c,
731 extern void radeon_router_select_ddc_port(struct radeon_connector *radeon_connector);
732 extern void radeon_router_select_cd_port(struct radeon_connector *radeon_connector);
733 extern bool radeon_ddc_probe(struct radeon_connector *radeon_connector, bool use_aux);
734 extern int radeon_ddc_get_modes(struct radeon_connector *radeon_connector);
736 extern struct drm_encoder *radeon_best_encoder(struct drm_connector *connector);
738 extern bool radeon_atombios_get_ppll_ss_info(struct radeon_device *rdev,
739 struct radeon_atom_ss *ss,
741 extern bool radeon_atombios_get_asic_ss_info(struct radeon_device *rdev,
742 struct radeon_atom_ss *ss,
745 extern void radeon_compute_pll_legacy(struct radeon_pll *pll,
747 uint32_t *dot_clock_p,
749 uint32_t *frac_fb_div_p,
751 uint32_t *post_div_p);
753 extern void radeon_compute_pll_avivo(struct radeon_pll *pll,
761 extern void radeon_setup_encoder_clones(struct drm_device *dev);
763 struct drm_encoder *radeon_encoder_legacy_lvds_add(struct drm_device *dev, int bios_index);
764 struct drm_encoder *radeon_encoder_legacy_primary_dac_add(struct drm_device *dev, int bios_index, int with_tv);
765 struct drm_encoder *radeon_encoder_legacy_tv_dac_add(struct drm_device *dev, int bios_index, int with_tv);
766 struct drm_encoder *radeon_encoder_legacy_tmds_int_add(struct drm_device *dev, int bios_index);
767 struct drm_encoder *radeon_encoder_legacy_tmds_ext_add(struct drm_device *dev, int bios_index);
768 extern void atombios_dvo_setup(struct drm_encoder *encoder, int action);
769 extern void atombios_digital_setup(struct drm_encoder *encoder, int action);
770 extern int atombios_get_encoder_mode(struct drm_encoder *encoder);
771 extern bool atombios_set_edp_panel_power(struct drm_connector *connector, int action);
772 extern void radeon_encoder_set_active_device(struct drm_encoder *encoder);
774 extern void radeon_crtc_load_lut(struct drm_crtc *crtc);
775 extern int atombios_crtc_set_base(struct drm_crtc *crtc, int x, int y,
776 struct drm_framebuffer *old_fb);
777 extern int atombios_crtc_set_base_atomic(struct drm_crtc *crtc,
778 struct drm_framebuffer *fb,
780 enum mode_set_atomic state);
781 extern int atombios_crtc_mode_set(struct drm_crtc *crtc,
782 struct drm_display_mode *mode,
783 struct drm_display_mode *adjusted_mode,
785 struct drm_framebuffer *old_fb);
786 extern void atombios_crtc_dpms(struct drm_crtc *crtc, int mode);
788 extern int radeon_crtc_set_base(struct drm_crtc *crtc, int x, int y,
789 struct drm_framebuffer *old_fb);
790 extern int radeon_crtc_set_base_atomic(struct drm_crtc *crtc,
791 struct drm_framebuffer *fb,
793 enum mode_set_atomic state);
794 extern int radeon_crtc_do_set_base(struct drm_crtc *crtc,
795 struct drm_framebuffer *fb,
796 int x, int y, int atomic);
797 extern int radeon_crtc_cursor_set(struct drm_crtc *crtc,
798 struct drm_file *file_priv,
802 extern int radeon_crtc_cursor_move(struct drm_crtc *crtc,
805 extern int radeon_get_crtc_scanoutpos(struct drm_device *dev, int crtc,
807 int *vpos, int *hpos, ktime_t *stime,
810 extern bool radeon_combios_check_hardcoded_edid(struct radeon_device *rdev);
812 radeon_bios_get_hardcoded_edid(struct radeon_device *rdev);
813 extern bool radeon_atom_get_clock_info(struct drm_device *dev);
814 extern bool radeon_combios_get_clock_info(struct drm_device *dev);
815 extern struct radeon_encoder_atom_dig *
816 radeon_atombios_get_lvds_info(struct radeon_encoder *encoder);
817 extern bool radeon_atombios_get_tmds_info(struct radeon_encoder *encoder,
818 struct radeon_encoder_int_tmds *tmds);
819 extern bool radeon_legacy_get_tmds_info_from_combios(struct radeon_encoder *encoder,
820 struct radeon_encoder_int_tmds *tmds);
821 extern bool radeon_legacy_get_tmds_info_from_table(struct radeon_encoder *encoder,
822 struct radeon_encoder_int_tmds *tmds);
823 extern bool radeon_legacy_get_ext_tmds_info_from_combios(struct radeon_encoder *encoder,
824 struct radeon_encoder_ext_tmds *tmds);
825 extern bool radeon_legacy_get_ext_tmds_info_from_table(struct radeon_encoder *encoder,
826 struct radeon_encoder_ext_tmds *tmds);
827 extern struct radeon_encoder_primary_dac *
828 radeon_atombios_get_primary_dac_info(struct radeon_encoder *encoder);
829 extern struct radeon_encoder_tv_dac *
830 radeon_atombios_get_tv_dac_info(struct radeon_encoder *encoder);
831 extern struct radeon_encoder_lvds *
832 radeon_combios_get_lvds_info(struct radeon_encoder *encoder);
833 extern void radeon_combios_get_ext_tmds_info(struct radeon_encoder *encoder);
834 extern struct radeon_encoder_tv_dac *
835 radeon_combios_get_tv_dac_info(struct radeon_encoder *encoder);
836 extern struct radeon_encoder_primary_dac *
837 radeon_combios_get_primary_dac_info(struct radeon_encoder *encoder);
838 extern bool radeon_combios_external_tmds_setup(struct drm_encoder *encoder);
839 extern void radeon_external_tmds_setup(struct drm_encoder *encoder);
840 extern void radeon_combios_output_lock(struct drm_encoder *encoder, bool lock);
841 extern void radeon_combios_initialize_bios_scratch_regs(struct drm_device *dev);
842 extern void radeon_atom_output_lock(struct drm_encoder *encoder, bool lock);
843 extern void radeon_atom_initialize_bios_scratch_regs(struct drm_device *dev);
844 extern void radeon_save_bios_scratch_regs(struct radeon_device *rdev);
845 extern void radeon_restore_bios_scratch_regs(struct radeon_device *rdev);
847 radeon_atombios_encoder_crtc_scratch_regs(struct drm_encoder *encoder, int crtc);
849 radeon_atombios_encoder_dpms_scratch_regs(struct drm_encoder *encoder, bool on);
851 radeon_combios_encoder_crtc_scratch_regs(struct drm_encoder *encoder, int crtc);
853 radeon_combios_encoder_dpms_scratch_regs(struct drm_encoder *encoder, bool on);
854 extern void radeon_crtc_fb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green,
855 u16 blue, int regno);
856 extern void radeon_crtc_fb_gamma_get(struct drm_crtc *crtc, u16 *red, u16 *green,
857 u16 *blue, int regno);
858 int radeon_framebuffer_init(struct drm_device *dev,
859 struct radeon_framebuffer *rfb,
860 struct drm_mode_fb_cmd2 *mode_cmd,
861 struct drm_gem_object *obj);
863 int radeonfb_remove(struct drm_device *dev, struct drm_framebuffer *fb);
864 bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev);
865 bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev);
866 void radeon_atombios_init_crtc(struct drm_device *dev,
867 struct radeon_crtc *radeon_crtc);
868 void radeon_legacy_init_crtc(struct drm_device *dev,
869 struct radeon_crtc *radeon_crtc);
871 void radeon_get_clock_info(struct drm_device *dev);
873 extern bool radeon_get_atom_connector_info_from_object_table(struct drm_device *dev);
874 extern bool radeon_get_atom_connector_info_from_supported_devices_table(struct drm_device *dev);
876 void radeon_enc_destroy(struct drm_encoder *encoder);
877 void radeon_copy_fb(struct drm_device *dev, struct drm_gem_object *dst_obj);
878 void radeon_combios_asic_init(struct drm_device *dev);
879 bool radeon_crtc_scaling_mode_fixup(struct drm_crtc *crtc,
880 const struct drm_display_mode *mode,
881 struct drm_display_mode *adjusted_mode);
882 void radeon_panel_mode_fixup(struct drm_encoder *encoder,
883 struct drm_display_mode *adjusted_mode);
884 void atom_rv515_force_tv_scaler(struct radeon_device *rdev, struct radeon_crtc *radeon_crtc);
887 void radeon_legacy_tv_adjust_crtc_reg(struct drm_encoder *encoder,
888 uint32_t *h_total_disp, uint32_t *h_sync_strt_wid,
889 uint32_t *v_total_disp, uint32_t *v_sync_strt_wid);
890 void radeon_legacy_tv_adjust_pll1(struct drm_encoder *encoder,
891 uint32_t *htotal_cntl, uint32_t *ppll_ref_div,
892 uint32_t *ppll_div_3, uint32_t *pixclks_cntl);
893 void radeon_legacy_tv_adjust_pll2(struct drm_encoder *encoder,
894 uint32_t *htotal2_cntl, uint32_t *p2pll_ref_div,
895 uint32_t *p2pll_div_0, uint32_t *pixclks_cntl);
896 void radeon_legacy_tv_mode_set(struct drm_encoder *encoder,
897 struct drm_display_mode *mode,
898 struct drm_display_mode *adjusted_mode);
901 void avivo_program_fmt(struct drm_encoder *encoder);
902 void dce3_program_fmt(struct drm_encoder *encoder);
903 void dce4_program_fmt(struct drm_encoder *encoder);
904 void dce8_program_fmt(struct drm_encoder *encoder);
907 int radeon_fbdev_init(struct radeon_device *rdev);
908 void radeon_fbdev_fini(struct radeon_device *rdev);
909 void radeon_fbdev_set_suspend(struct radeon_device *rdev, int state);
910 int radeon_fbdev_total_size(struct radeon_device *rdev);
911 bool radeon_fbdev_robj_is_fb(struct radeon_device *rdev, struct radeon_bo *robj);
913 void radeon_fb_output_poll_changed(struct radeon_device *rdev);
915 void radeon_crtc_handle_vblank(struct radeon_device *rdev, int crtc_id);
916 void radeon_crtc_handle_flip(struct radeon_device *rdev, int crtc_id);
918 int radeon_align_pitch(struct radeon_device *rdev, int width, int bpp, bool tiled);