drivers/iio/accel/bmc150-accel.c

   1 /*
   2  * 3-axis accelerometer driver supporting following Bosch-Sensortec chips:
   3  *  - BMC150
   4  *  - BMI055
   5  *  - BMA255
   6  *  - BMA250E
   7  *  - BMA222E
   8  *  - BMA280
   9  *
  10  * Copyright (c) 2014, Intel Corporation.
  11  *
  12  * This program is free software; you can redistribute it and/or modify it
  13  * under the terms and conditions of the GNU General Public License,
  14  * version 2, as published by the Free Software Foundation.
  15  *
  16  * This program is distributed in the hope it will be useful, but WITHOUT
  17  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  18  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  19  * more details.
  20  */
  21
  22 #include <linux/module.h>
  23 #include <linux/i2c.h>
  24 #include <linux/interrupt.h>
  25 #include <linux/delay.h>
  26 #include <linux/slab.h>
  27 #include <linux/acpi.h>
  28 #include <linux/gpio/consumer.h>
  29 #include <linux/pm.h>
  30 #include <linux/pm_runtime.h>
  31 #include <linux/iio/iio.h>
  32 #include <linux/iio/sysfs.h>
  33 #include <linux/iio/buffer.h>
  34 #include <linux/iio/events.h>
  35 #include <linux/iio/trigger.h>
  36 #include <linux/iio/trigger_consumer.h>
  37 #include <linux/iio/triggered_buffer.h>
  38
  39 #define BMC150_ACCEL_DRV_NAME                   "bmc150_accel"
  40 #define BMC150_ACCEL_IRQ_NAME                   "bmc150_accel_event"
  41 #define BMC150_ACCEL_GPIO_NAME                  "bmc150_accel_int"
  42
  43 #define BMC150_ACCEL_REG_CHIP_ID                0x00
  44
  45 #define BMC150_ACCEL_REG_INT_STATUS_2           0x0B
  46 #define BMC150_ACCEL_ANY_MOTION_MASK            0x07
  47 #define BMC150_ACCEL_ANY_MOTION_BIT_SIGN        BIT(3)
  48
  49 #define BMC150_ACCEL_REG_PMU_LPW                0x11
  50 #define BMC150_ACCEL_PMU_MODE_MASK              0xE0
  51 #define BMC150_ACCEL_PMU_MODE_SHIFT             5
  52 #define BMC150_ACCEL_PMU_BIT_SLEEP_DUR_MASK     0x17
  53 #define BMC150_ACCEL_PMU_BIT_SLEEP_DUR_SHIFT    1
  54
  55 #define BMC150_ACCEL_REG_PMU_RANGE              0x0F
  56
  57 #define BMC150_ACCEL_DEF_RANGE_2G               0x03
  58 #define BMC150_ACCEL_DEF_RANGE_4G               0x05
  59 #define BMC150_ACCEL_DEF_RANGE_8G               0x08
  60 #define BMC150_ACCEL_DEF_RANGE_16G              0x0C
  61
  62 /* Default BW: 125Hz */
  63 #define BMC150_ACCEL_REG_PMU_BW         0x10
  64 #define BMC150_ACCEL_DEF_BW                     125
  65
  66 #define BMC150_ACCEL_REG_INT_MAP_0              0x19
  67 #define BMC150_ACCEL_INT_MAP_0_BIT_SLOPE        BIT(2)
  68
  69 #define BMC150_ACCEL_REG_INT_MAP_1              0x1A
  70 #define BMC150_ACCEL_INT_MAP_1_BIT_DATA BIT(0)
  71
  72 #define BMC150_ACCEL_REG_INT_RST_LATCH          0x21
  73 #define BMC150_ACCEL_INT_MODE_LATCH_RESET       0x80
  74 #define BMC150_ACCEL_INT_MODE_LATCH_INT 0x0F
  75 #define BMC150_ACCEL_INT_MODE_NON_LATCH_INT     0x00
  76
  77 #define BMC150_ACCEL_REG_INT_EN_0               0x16
  78 #define BMC150_ACCEL_INT_EN_BIT_SLP_X           BIT(0)
  79 #define BMC150_ACCEL_INT_EN_BIT_SLP_Y           BIT(1)
  80 #define BMC150_ACCEL_INT_EN_BIT_SLP_Z           BIT(2)
  81
  82 #define BMC150_ACCEL_REG_INT_EN_1               0x17
  83 #define BMC150_ACCEL_INT_EN_BIT_DATA_EN BIT(4)
  84
  85 #define BMC150_ACCEL_REG_INT_OUT_CTRL           0x20
  86 #define BMC150_ACCEL_INT_OUT_CTRL_INT1_LVL      BIT(0)
  87
  88 #define BMC150_ACCEL_REG_INT_5                  0x27
  89 #define BMC150_ACCEL_SLOPE_DUR_MASK             0x03
  90
  91 #define BMC150_ACCEL_REG_INT_6                  0x28
  92 #define BMC150_ACCEL_SLOPE_THRES_MASK           0xFF
  93
  94 /* Slope duration in terms of number of samples */
  95 #define BMC150_ACCEL_DEF_SLOPE_DURATION 2
  96 /* in terms of multiples of g's/LSB, based on range */
  97 #define BMC150_ACCEL_DEF_SLOPE_THRESHOLD        5
  98
  99 #define BMC150_ACCEL_REG_XOUT_L         0x02
 100
 101 #define BMC150_ACCEL_MAX_STARTUP_TIME_MS        100
 102
 103 /* Sleep Duration values */
 104 #define BMC150_ACCEL_SLEEP_500_MICRO            0x05
 105 #define BMC150_ACCEL_SLEEP_1_MS         0x06
 106 #define BMC150_ACCEL_SLEEP_2_MS         0x07
 107 #define BMC150_ACCEL_SLEEP_4_MS         0x08
 108 #define BMC150_ACCEL_SLEEP_6_MS         0x09
 109 #define BMC150_ACCEL_SLEEP_10_MS                0x0A
 110 #define BMC150_ACCEL_SLEEP_25_MS                0x0B
 111 #define BMC150_ACCEL_SLEEP_50_MS                0x0C
 112 #define BMC150_ACCEL_SLEEP_100_MS               0x0D
 113 #define BMC150_ACCEL_SLEEP_500_MS               0x0E
 114 #define BMC150_ACCEL_SLEEP_1_SEC                0x0F
 115
 116 #define BMC150_ACCEL_REG_TEMP                   0x08
 117 #define BMC150_ACCEL_TEMP_CENTER_VAL            24
 118
 119 #define BMC150_ACCEL_AXIS_TO_REG(axis)  (BMC150_ACCEL_REG_XOUT_L + (axis * 2))
 120 #define BMC150_AUTO_SUSPEND_DELAY_MS            2000
 121
 122 enum bmc150_accel_axis {
 123         AXIS_X,
 124         AXIS_Y,
 125         AXIS_Z,
 126 };
 127
 128 enum bmc150_power_modes {
 129         BMC150_ACCEL_SLEEP_MODE_NORMAL,
 130         BMC150_ACCEL_SLEEP_MODE_DEEP_SUSPEND,
 131         BMC150_ACCEL_SLEEP_MODE_LPM,
 132         BMC150_ACCEL_SLEEP_MODE_SUSPEND = 0x04,
 133 };
 134
 135 struct bmc150_scale_info {
 136         int scale;
 137         u8 reg_range;
 138 };
 139
 140 struct bmc150_accel_chip_info {
 141         u8 chip_id;
 142         const struct iio_chan_spec *channels;
 143         int num_channels;
 144         const struct bmc150_scale_info scale_table[4];
 145 };
 146
 147 struct bmc150_accel_data {
 148         struct i2c_client *client;
 149         struct iio_trigger *dready_trig;
 150         struct iio_trigger *motion_trig;
 151         struct mutex mutex;
 152         s16 buffer[8];
 153         u8 bw_bits;
 154         u32 slope_dur;
 155         u32 slope_thres;
 156         u32 range;
 157         int ev_enable_state;
 158         bool dready_trigger_on;
 159         bool motion_trigger_on;
 160         int64_t timestamp;
 161         const struct bmc150_accel_chip_info *chip_info;
 162 };
 163
 164 static const struct {
 165         int val;
 166         int val2;
 167         u8 bw_bits;
 168 } bmc150_accel_samp_freq_table[] = { {7, 810000, 0x08},
 169                                      {15, 630000, 0x09},
 170                                      {31, 250000, 0x0A},
 171                                      {62, 500000, 0x0B},
 172                                      {125, 0, 0x0C},
 173                                      {250, 0, 0x0D},
 174                                      {500, 0, 0x0E},
 175                                      {1000, 0, 0x0F} };
 176
 177 static const struct {
 178         int bw_bits;
 179         int msec;
 180 } bmc150_accel_sample_upd_time[] = { {0x08, 64},
 181                                      {0x09, 32},
 182                                      {0x0A, 16},
 183                                      {0x0B, 8},
 184                                      {0x0C, 4},
 185                                      {0x0D, 2},
 186                                      {0x0E, 1},
 187                                      {0x0F, 1} };
 188
 189 static const struct {
 190         int sleep_dur;
 191         u8 reg_value;
 192 } bmc150_accel_sleep_value_table[] = { {0, 0},
 193                                        {500, BMC150_ACCEL_SLEEP_500_MICRO},
 194                                        {1000, BMC150_ACCEL_SLEEP_1_MS},
 195                                        {2000, BMC150_ACCEL_SLEEP_2_MS},
 196                                        {4000, BMC150_ACCEL_SLEEP_4_MS},
 197                                        {6000, BMC150_ACCEL_SLEEP_6_MS},
 198                                        {10000, BMC150_ACCEL_SLEEP_10_MS},
 199                                        {25000, BMC150_ACCEL_SLEEP_25_MS},
 200                                        {50000, BMC150_ACCEL_SLEEP_50_MS},
 201                                        {100000, BMC150_ACCEL_SLEEP_100_MS},
 202                                        {500000, BMC150_ACCEL_SLEEP_500_MS},
 203                                        {1000000, BMC150_ACCEL_SLEEP_1_SEC} };
 204
 205
 206 static int bmc150_accel_set_mode(struct bmc150_accel_data *data,
 207                                  enum bmc150_power_modes mode,
 208                                  int dur_us)
 209 {
 210         int i;
 211         int ret;
 212         u8 lpw_bits;
 213         int dur_val = -1;
 214
 215         if (dur_us > 0) {
 216                 for (i = 0; i < ARRAY_SIZE(bmc150_accel_sleep_value_table);
 217                                                                          ++i) {
 218                         if (bmc150_accel_sleep_value_table[i].sleep_dur ==
 219                                                                         dur_us)
 220                                 dur_val =
 221                                 bmc150_accel_sleep_value_table[i].reg_value;
 222                 }
 223         } else
 224                 dur_val = 0;
 225
 226         if (dur_val < 0)
 227                 return -EINVAL;
 228
 229         lpw_bits = mode << BMC150_ACCEL_PMU_MODE_SHIFT;
 230         lpw_bits |= (dur_val << BMC150_ACCEL_PMU_BIT_SLEEP_DUR_SHIFT);
 231
 232         dev_dbg(&data->client->dev, "Set Mode bits %x\n", lpw_bits);
 233
 234         ret = i2c_smbus_write_byte_data(data->client,
 235                                         BMC150_ACCEL_REG_PMU_LPW, lpw_bits);
 236         if (ret < 0) {
 237                 dev_err(&data->client->dev, "Error writing reg_pmu_lpw\n");
 238                 return ret;
 239         }
 240
 241         return 0;
 242 }
 243
 244 static int bmc150_accel_set_bw(struct bmc150_accel_data *data, int val,
 245                                int val2)
 246 {
 247         int i;
 248         int ret;
 249
 250         for (i = 0; i < ARRAY_SIZE(bmc150_accel_samp_freq_table); ++i) {
 251                 if (bmc150_accel_samp_freq_table[i].val == val &&
 252                                 bmc150_accel_samp_freq_table[i].val2 == val2) {
 253                         ret = i2c_smbus_write_byte_data(
 254                                 data->client,
 255                                 BMC150_ACCEL_REG_PMU_BW,
 256                                 bmc150_accel_samp_freq_table[i].bw_bits);
 257                         if (ret < 0)
 258                                 return ret;
 259
 260                         data->bw_bits =
 261                                 bmc150_accel_samp_freq_table[i].bw_bits;
 262                         return 0;
 263                 }
 264         }
 265
 266         return -EINVAL;
 267 }
 268
 269 static int bmc150_accel_chip_init(struct bmc150_accel_data *data)
 270 {
 271         int ret;
 272
 273         ret = i2c_smbus_read_byte_data(data->client, BMC150_ACCEL_REG_CHIP_ID);
 274         if (ret < 0) {
 275                 dev_err(&data->client->dev,
 276                         "Error: Reading chip id\n");
 277                 return ret;
 278         }
 279
 280         dev_dbg(&data->client->dev, "Chip Id %x\n", ret);
 281         if (ret != data->chip_info->chip_id) {
 282                 dev_err(&data->client->dev, "Invalid chip %x\n", ret);
 283                 return -ENODEV;
 284         }
 285
 286         ret = bmc150_accel_set_mode(data, BMC150_ACCEL_SLEEP_MODE_NORMAL, 0);
 287         if (ret < 0)
 288                 return ret;
 289
 290         /* Set Bandwidth */
 291         ret = bmc150_accel_set_bw(data, BMC150_ACCEL_DEF_BW, 0);
 292         if (ret < 0)
 293                 return ret;
 294
 295         /* Set Default Range */
 296         ret = i2c_smbus_write_byte_data(data->client,
 297                                         BMC150_ACCEL_REG_PMU_RANGE,
 298                                         BMC150_ACCEL_DEF_RANGE_4G);
 299         if (ret < 0) {
 300                 dev_err(&data->client->dev,
 301                                         "Error writing reg_pmu_range\n");
 302                 return ret;
 303         }
 304
 305         data->range = BMC150_ACCEL_DEF_RANGE_4G;
 306
 307         /* Set default slope duration */
 308         ret = i2c_smbus_read_byte_data(data->client, BMC150_ACCEL_REG_INT_5);
 309         if (ret < 0) {
 310                 dev_err(&data->client->dev, "Error reading reg_int_5\n");
 311                 return ret;
 312         }
 313         data->slope_dur |= BMC150_ACCEL_DEF_SLOPE_DURATION;
 314         ret = i2c_smbus_write_byte_data(data->client,
 315                                         BMC150_ACCEL_REG_INT_5,
 316                                         data->slope_dur);
 317         if (ret < 0) {
 318                 dev_err(&data->client->dev, "Error writing reg_int_5\n");
 319                 return ret;
 320         }
 321         dev_dbg(&data->client->dev, "slope_dur %x\n", data->slope_dur);
 322
 323         /* Set default slope thresholds */
 324         ret = i2c_smbus_write_byte_data(data->client,
 325                                         BMC150_ACCEL_REG_INT_6,
 326                                         BMC150_ACCEL_DEF_SLOPE_THRESHOLD);
 327         if (ret < 0) {
 328                 dev_err(&data->client->dev, "Error writing reg_int_6\n");
 329                 return ret;
 330         }
 331         data->slope_thres = BMC150_ACCEL_DEF_SLOPE_THRESHOLD;
 332         dev_dbg(&data->client->dev, "slope_thres %x\n", data->slope_thres);
 333
 334         /* Set default as latched interrupts */
 335         ret = i2c_smbus_write_byte_data(data->client,
 336                                         BMC150_ACCEL_REG_INT_RST_LATCH,
 337                                         BMC150_ACCEL_INT_MODE_LATCH_INT |
 338                                         BMC150_ACCEL_INT_MODE_LATCH_RESET);
 339         if (ret < 0) {
 340                 dev_err(&data->client->dev,
 341                         "Error writing reg_int_rst_latch\n");
 342                 return ret;
 343         }
 344
 345         return 0;
 346 }
 347
 348 static int bmc150_accel_setup_any_motion_interrupt(
 349                                         struct bmc150_accel_data *data,
 350                                         bool status)
 351 {
 352         int ret;
 353
 354         /* Enable/Disable INT1 mapping */
 355         ret = i2c_smbus_read_byte_data(data->client,
 356                                        BMC150_ACCEL_REG_INT_MAP_0);
 357         if (ret < 0) {
 358                 dev_err(&data->client->dev, "Error reading reg_int_map_0\n");
 359                 return ret;
 360         }
 361         if (status)
 362                 ret |= BMC150_ACCEL_INT_MAP_0_BIT_SLOPE;
 363         else
 364                 ret &= ~BMC150_ACCEL_INT_MAP_0_BIT_SLOPE;
 365
 366         ret = i2c_smbus_write_byte_data(data->client,
 367                                         BMC150_ACCEL_REG_INT_MAP_0,
 368                                         ret);
 369         if (ret < 0) {
 370                 dev_err(&data->client->dev, "Error writing reg_int_map_0\n");
 371                 return ret;
 372         }
 373
 374         if (status) {
 375                 /* Set slope duration (no of samples) */
 376                 ret = i2c_smbus_write_byte_data(data->client,
 377                                                 BMC150_ACCEL_REG_INT_5,
 378                                                 data->slope_dur);
 379                 if (ret < 0) {
 380                         dev_err(&data->client->dev, "Error write reg_int_5\n");
 381                         return ret;
 382                 }
 383
 384                 /* Set slope thresholds */
 385                 ret = i2c_smbus_write_byte_data(data->client,
 386                                                 BMC150_ACCEL_REG_INT_6,
 387                                                 data->slope_thres);
 388                 if (ret < 0) {
 389                         dev_err(&data->client->dev, "Error write reg_int_6\n");
 390                         return ret;
 391                 }
 392
 393                 /*
 394                  * New data interrupt is always non-latched,
 395                  * which will have higher priority, so no need
 396                  * to set latched mode, we will be flooded anyway with INTR
 397                  */
 398                 if (!data->dready_trigger_on) {
 399                         ret = i2c_smbus_write_byte_data(data->client,
 400                                         BMC150_ACCEL_REG_INT_RST_LATCH,
 401                                         BMC150_ACCEL_INT_MODE_LATCH_INT |
 402                                         BMC150_ACCEL_INT_MODE_LATCH_RESET);
 403                         if (ret < 0) {
 404                                 dev_err(&data->client->dev,
 405                                         "Error writing reg_int_rst_latch\n");
 406                                 return ret;
 407                         }
 408                 }
 409
 410                 ret = i2c_smbus_write_byte_data(data->client,
 411                                                 BMC150_ACCEL_REG_INT_EN_0,
 412                                                 BMC150_ACCEL_INT_EN_BIT_SLP_X |
 413                                                 BMC150_ACCEL_INT_EN_BIT_SLP_Y |
 414                                                 BMC150_ACCEL_INT_EN_BIT_SLP_Z);
 415         } else
 416                 ret = i2c_smbus_write_byte_data(data->client,
 417                                                 BMC150_ACCEL_REG_INT_EN_0,
 418                                                 0);
 419
 420         if (ret < 0) {
 421                 dev_err(&data->client->dev, "Error writing reg_int_en_0\n");
 422                 return ret;
 423         }
 424
 425         return 0;
 426 }
 427
 428 static int bmc150_accel_setup_new_data_interrupt(struct bmc150_accel_data *data,
 429                                            bool status)
 430 {
 431         int ret;
 432
 433         /* Enable/Disable INT1 mapping */
 434         ret = i2c_smbus_read_byte_data(data->client,
 435                                        BMC150_ACCEL_REG_INT_MAP_1);
 436         if (ret < 0) {
 437                 dev_err(&data->client->dev, "Error reading reg_int_map_1\n");
 438                 return ret;
 439         }
 440         if (status)
 441                 ret |= BMC150_ACCEL_INT_MAP_1_BIT_DATA;
 442         else
 443                 ret &= ~BMC150_ACCEL_INT_MAP_1_BIT_DATA;
 444
 445         ret = i2c_smbus_write_byte_data(data->client,
 446                                         BMC150_ACCEL_REG_INT_MAP_1,
 447                                         ret);
 448         if (ret < 0) {
 449                 dev_err(&data->client->dev, "Error writing reg_int_map_1\n");
 450                 return ret;
 451         }
 452
 453         if (status) {
 454                 /*
 455                  * Set non latched mode interrupt and clear any latched
 456                  * interrupt
 457                  */
 458                 ret = i2c_smbus_write_byte_data(data->client,
 459                                         BMC150_ACCEL_REG_INT_RST_LATCH,
 460                                         BMC150_ACCEL_INT_MODE_NON_LATCH_INT |
 461                                         BMC150_ACCEL_INT_MODE_LATCH_RESET);
 462                 if (ret < 0) {
 463                         dev_err(&data->client->dev,
 464                                 "Error writing reg_int_rst_latch\n");
 465                         return ret;
 466                 }
 467
 468                 ret = i2c_smbus_write_byte_data(data->client,
 469                                         BMC150_ACCEL_REG_INT_EN_1,
 470                                         BMC150_ACCEL_INT_EN_BIT_DATA_EN);
 471
 472         } else {
 473                 /* Restore default interrupt mode */
 474                 ret = i2c_smbus_write_byte_data(data->client,
 475                                         BMC150_ACCEL_REG_INT_RST_LATCH,
 476                                         BMC150_ACCEL_INT_MODE_LATCH_INT |
 477                                         BMC150_ACCEL_INT_MODE_LATCH_RESET);
 478                 if (ret < 0) {
 479                         dev_err(&data->client->dev,
 480                                 "Error writing reg_int_rst_latch\n");
 481                         return ret;
 482                 }
 483
 484                 ret = i2c_smbus_write_byte_data(data->client,
 485                                                 BMC150_ACCEL_REG_INT_EN_1,
 486                                                 0);
 487         }
 488
 489         if (ret < 0) {
 490                 dev_err(&data->client->dev, "Error writing reg_int_en_1\n");
 491                 return ret;
 492         }
 493
 494         return 0;
 495 }
 496
 497 static int bmc150_accel_get_bw(struct bmc150_accel_data *data, int *val,
 498                                int *val2)
 499 {
 500         int i;
 501
 502         for (i = 0; i < ARRAY_SIZE(bmc150_accel_samp_freq_table); ++i) {
 503                 if (bmc150_accel_samp_freq_table[i].bw_bits == data->bw_bits) {
 504                         *val = bmc150_accel_samp_freq_table[i].val;
 505                         *val2 = bmc150_accel_samp_freq_table[i].val2;
 506                         return IIO_VAL_INT_PLUS_MICRO;
 507                 }
 508         }
 509
 510         return -EINVAL;
 511 }
 512
 513 #ifdef CONFIG_PM_RUNTIME
 514 static int bmc150_accel_get_startup_times(struct bmc150_accel_data *data)
 515 {
 516         int i;
 517
 518         for (i = 0; i < ARRAY_SIZE(bmc150_accel_sample_upd_time); ++i) {
 519                 if (bmc150_accel_sample_upd_time[i].bw_bits == data->bw_bits)
 520                         return bmc150_accel_sample_upd_time[i].msec;
 521         }
 522
 523         return BMC150_ACCEL_MAX_STARTUP_TIME_MS;
 524 }
 525
 526 static int bmc150_accel_set_power_state(struct bmc150_accel_data *data, bool on)
 527 {
 528         int ret;
 529
 530         if (on)
 531                 ret = pm_runtime_get_sync(&data->client->dev);
 532         else {
 533                 pm_runtime_mark_last_busy(&data->client->dev);
 534                 ret = pm_runtime_put_autosuspend(&data->client->dev);
 535         }
 536         if (ret < 0) {
 537                 dev_err(&data->client->dev,
 538                         "Failed: bmc150_accel_set_power_state for %d\n", on);
 539                 if (on)
 540                         pm_runtime_put_noidle(&data->client->dev);
 541
 542                 return ret;
 543         }
 544
 545         return 0;
 546 }
 547 #else
 548 static int bmc150_accel_set_power_state(struct bmc150_accel_data *data, bool on)
 549 {
 550         return 0;
 551 }
 552 #endif
 553
 554 static int bmc150_accel_set_scale(struct bmc150_accel_data *data, int val)
 555 {
 556         int ret, i;
 557
 558         for (i = 0; i < ARRAY_SIZE(data->chip_info->scale_table); ++i) {
 559                 if (data->chip_info->scale_table[i].scale == val) {
 560                         ret = i2c_smbus_write_byte_data(
 561                                      data->client,
 562                                      BMC150_ACCEL_REG_PMU_RANGE,
 563                                      data->chip_info->scale_table[i].reg_range);
 564                         if (ret < 0) {
 565                                 dev_err(&data->client->dev,
 566                                         "Error writing pmu_range\n");
 567                                 return ret;
 568                         }
 569
 570                         data->range = data->chip_info->scale_table[i].reg_range;
 571                         return 0;
 572                 }
 573         }
 574
 575         return -EINVAL;
 576 }
 577
 578 static int bmc150_accel_get_temp(struct bmc150_accel_data *data, int *val)
 579 {
 580         int ret;
 581
 582         mutex_lock(&data->mutex);
 583
 584         ret = i2c_smbus_read_byte_data(data->client, BMC150_ACCEL_REG_TEMP);
 585         if (ret < 0) {
 586                 dev_err(&data->client->dev, "Error reading reg_temp\n");
 587                 mutex_unlock(&data->mutex);
 588                 return ret;
 589         }
 590         *val = sign_extend32(ret, 7);
 591
 592         mutex_unlock(&data->mutex);
 593
 594         return IIO_VAL_INT;
 595 }
 596
 597 static int bmc150_accel_get_axis(struct bmc150_accel_data *data,
 598                                  struct iio_chan_spec const *chan,
 599                                  int *val)
 600 {
 601         int ret;
 602         int axis = chan->scan_index;
 603
 604         mutex_lock(&data->mutex);
 605         ret = bmc150_accel_set_power_state(data, true);
 606         if (ret < 0) {
 607                 mutex_unlock(&data->mutex);
 608                 return ret;
 609         }
 610
 611         ret = i2c_smbus_read_word_data(data->client,
 612                                        BMC150_ACCEL_AXIS_TO_REG(axis));
 613         if (ret < 0) {
 614                 dev_err(&data->client->dev, "Error reading axis %d\n", axis);
 615                 bmc150_accel_set_power_state(data, false);
 616                 mutex_unlock(&data->mutex);
 617                 return ret;
 618         }
 619         *val = sign_extend32(ret >> chan->scan_type.shift,
 620                              chan->scan_type.realbits - 1);
 621         ret = bmc150_accel_set_power_state(data, false);
 622         mutex_unlock(&data->mutex);
 623         if (ret < 0)
 624                 return ret;
 625
 626         return IIO_VAL_INT;
 627 }
 628
 629 static int bmc150_accel_read_raw(struct iio_dev *indio_dev,
 630                                  struct iio_chan_spec const *chan,
 631                                  int *val, int *val2, long mask)
 632 {
 633         struct bmc150_accel_data *data = iio_priv(indio_dev);
 634         int ret;
 635
 636         switch (mask) {
 637         case IIO_CHAN_INFO_RAW:
 638                 switch (chan->type) {
 639                 case IIO_TEMP:
 640                         return bmc150_accel_get_temp(data, val);
 641                 case IIO_ACCEL:
 642                         if (iio_buffer_enabled(indio_dev))
 643                                 return -EBUSY;
 644                         else
 645                                 return bmc150_accel_get_axis(data, chan, val);
 646                 default:
 647                         return -EINVAL;
 648                 }
 649         case IIO_CHAN_INFO_OFFSET:
 650                 if (chan->type == IIO_TEMP) {
 651                         *val = BMC150_ACCEL_TEMP_CENTER_VAL;
 652                         return IIO_VAL_INT;
 653                 } else
 654                         return -EINVAL;
 655         case IIO_CHAN_INFO_SCALE:
 656                 *val = 0;
 657                 switch (chan->type) {
 658                 case IIO_TEMP:
 659                         *val2 = 500000;
 660                         return IIO_VAL_INT_PLUS_MICRO;
 661                 case IIO_ACCEL:
 662                 {
 663                         int i;
 664                         const struct bmc150_scale_info *si;
 665                         int st_size = ARRAY_SIZE(data->chip_info->scale_table);
 666
 667                         for (i = 0; i < st_size; ++i) {
 668                                 si = &data->chip_info->scale_table[i];
 669                                 if (si->reg_range == data->range) {
 670                                         *val2 = si->scale;
 671                                         return IIO_VAL_INT_PLUS_MICRO;
 672                                 }
 673                         }
 674                         return -EINVAL;
 675                 }
 676                 default:
 677                         return -EINVAL;
 678                 }
 679         case IIO_CHAN_INFO_SAMP_FREQ:
 680                 mutex_lock(&data->mutex);
 681                 ret = bmc150_accel_get_bw(data, val, val2);
 682                 mutex_unlock(&data->mutex);
 683                 return ret;
 684         default:
 685                 return -EINVAL;
 686         }
 687 }
 688
 689 static int bmc150_accel_write_raw(struct iio_dev *indio_dev,
 690                                   struct iio_chan_spec const *chan,
 691                                   int val, int val2, long mask)
 692 {
 693         struct bmc150_accel_data *data = iio_priv(indio_dev);
 694         int ret;
 695
 696         switch (mask) {
 697         case IIO_CHAN_INFO_SAMP_FREQ:
 698                 mutex_lock(&data->mutex);
 699                 ret = bmc150_accel_set_bw(data, val, val2);
 700                 mutex_unlock(&data->mutex);
 701                 break;
 702         case IIO_CHAN_INFO_SCALE:
 703                 if (val)
 704                         return -EINVAL;
 705
 706                 mutex_lock(&data->mutex);
 707                 ret = bmc150_accel_set_scale(data, val2);
 708                 mutex_unlock(&data->mutex);
 709                 return ret;
 710         default:
 711                 ret = -EINVAL;
 712         }
 713
 714         return ret;
 715 }
 716
 717 static int bmc150_accel_read_event(struct iio_dev *indio_dev,
 718                                    const struct iio_chan_spec *chan,
 719                                    enum iio_event_type type,
 720                                    enum iio_event_direction dir,
 721                                    enum iio_event_info info,
 722                                    int *val, int *val2)
 723 {
 724         struct bmc150_accel_data *data = iio_priv(indio_dev);
 725
 726         *val2 = 0;
 727         switch (info) {
 728         case IIO_EV_INFO_VALUE:
 729                 *val = data->slope_thres;
 730                 break;
 731         case IIO_EV_INFO_PERIOD:
 732                 *val = data->slope_dur & BMC150_ACCEL_SLOPE_DUR_MASK;
 733                 break;
 734         default:
 735                 return -EINVAL;
 736         }
 737
 738         return IIO_VAL_INT;
 739 }
 740
 741 static int bmc150_accel_write_event(struct iio_dev *indio_dev,
 742                                     const struct iio_chan_spec *chan,
 743                                     enum iio_event_type type,
 744                                     enum iio_event_direction dir,
 745                                     enum iio_event_info info,
 746                                     int val, int val2)
 747 {
 748         struct bmc150_accel_data *data = iio_priv(indio_dev);
 749
 750         if (data->ev_enable_state)
 751                 return -EBUSY;
 752
 753         switch (info) {
 754         case IIO_EV_INFO_VALUE:
 755                 data->slope_thres = val;
 756                 break;
 757         case IIO_EV_INFO_PERIOD:
 758                 data->slope_dur &= ~BMC150_ACCEL_SLOPE_DUR_MASK;
 759                 data->slope_dur |= val & BMC150_ACCEL_SLOPE_DUR_MASK;
 760                 break;
 761         default:
 762                 return -EINVAL;
 763         }
 764
 765         return 0;
 766 }
 767
 768 static int bmc150_accel_read_event_config(struct iio_dev *indio_dev,
 769                                           const struct iio_chan_spec *chan,
 770                                           enum iio_event_type type,
 771                                           enum iio_event_direction dir)
 772 {
 773
 774         struct bmc150_accel_data *data = iio_priv(indio_dev);
 775
 776         return data->ev_enable_state;
 777 }
 778
 779 static int bmc150_accel_write_event_config(struct iio_dev *indio_dev,
 780                                            const struct iio_chan_spec *chan,
 781                                            enum iio_event_type type,
 782                                            enum iio_event_direction dir,
 783                                            int state)
 784 {
 785         struct bmc150_accel_data *data = iio_priv(indio_dev);
 786         int ret;
 787
 788         if (state && data->ev_enable_state)
 789                 return 0;
 790
 791         mutex_lock(&data->mutex);
 792
 793         if (!state && data->motion_trigger_on) {
 794                 data->ev_enable_state = 0;
 795                 mutex_unlock(&data->mutex);
 796                 return 0;
 797         }
 798
 799         /*
 800          * We will expect the enable and disable to do operation in
 801          * in reverse order. This will happen here anyway as our
 802          * resume operation uses sync mode runtime pm calls, the
 803          * suspend operation will be delayed by autosuspend delay
 804          * So the disable operation will still happen in reverse of
 805          * enable operation. When runtime pm is disabled the mode
 806          * is always on so sequence doesn't matter
 807          */
 808
 809         ret = bmc150_accel_set_power_state(data, state);
 810         if (ret < 0) {
 811                 mutex_unlock(&data->mutex);
 812                 return ret;
 813         }
 814
 815         ret =  bmc150_accel_setup_any_motion_interrupt(data, state);
 816         if (ret < 0) {
 817                 bmc150_accel_set_power_state(data, false);
 818                 mutex_unlock(&data->mutex);
 819                 return ret;
 820         }
 821
 822         data->ev_enable_state = state;
 823         mutex_unlock(&data->mutex);
 824
 825         return 0;
 826 }
 827
 828 static int bmc150_accel_validate_trigger(struct iio_dev *indio_dev,
 829                                    struct iio_trigger *trig)
 830 {
 831         struct bmc150_accel_data *data = iio_priv(indio_dev);
 832
 833         if (data->dready_trig != trig && data->motion_trig != trig)
 834                 return -EINVAL;
 835
 836         return 0;
 837 }
 838
 839 static IIO_CONST_ATTR_SAMP_FREQ_AVAIL(
 840                 "7.810000 15.630000 31.250000 62.500000 125 250 500 1000");
 841
 842 static struct attribute *bmc150_accel_attributes[] = {
 843         &iio_const_attr_sampling_frequency_available.dev_attr.attr,
 844         NULL,
 845 };
 846
 847 static const struct attribute_group bmc150_accel_attrs_group = {
 848         .attrs = bmc150_accel_attributes,
 849 };
 850
 851 static const struct iio_event_spec bmc150_accel_event = {
 852                 .type = IIO_EV_TYPE_ROC,
 853                 .dir = IIO_EV_DIR_RISING | IIO_EV_DIR_FALLING,
 854                 .mask_separate = BIT(IIO_EV_INFO_VALUE) |
 855                                  BIT(IIO_EV_INFO_ENABLE) |
 856                                  BIT(IIO_EV_INFO_PERIOD)
 857 };
 858
 859 #define BMC150_ACCEL_CHANNEL(_axis, bits) {                             \
 860         .type = IIO_ACCEL,                                              \
 861         .modified = 1,                                                  \
 862         .channel2 = IIO_MOD_##_axis,                                    \
 863         .info_mask_separate = BIT(IIO_CHAN_INFO_RAW),                   \
 864         .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) |          \
 865                                 BIT(IIO_CHAN_INFO_SAMP_FREQ),           \
 866         .scan_index = AXIS_##_axis,                                     \
 867         .scan_type = {                                                  \
 868                 .sign = 's',                                            \
 869                 .realbits = (bits),                                     \
 870                 .storagebits = 16,                                      \
 871                 .shift = 16 - (bits),                                   \
 872         },                                                              \
 873         .event_spec = &bmc150_accel_event,                              \
 874         .num_event_specs = 1                                            \
 875 }
 876
 877 #define BMC150_ACCEL_CHANNELS(bits) {                                   \
 878         {                                                               \
 879                 .type = IIO_TEMP,                                       \
 880                 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |          \
 881                                       BIT(IIO_CHAN_INFO_SCALE) |        \
 882                                       BIT(IIO_CHAN_INFO_OFFSET),        \
 883                 .scan_index = -1,                                       \
 884         },                                                              \
 885         BMC150_ACCEL_CHANNEL(X, bits),                                  \
 886         BMC150_ACCEL_CHANNEL(Y, bits),                                  \
 887         BMC150_ACCEL_CHANNEL(Z, bits),                                  \
 888         IIO_CHAN_SOFT_TIMESTAMP(3),                                     \
 889 }
 890
 891 static const struct iio_chan_spec bma222e_accel_channels[] =
 892         BMC150_ACCEL_CHANNELS(8);
 893 static const struct iio_chan_spec bma250e_accel_channels[] =
 894         BMC150_ACCEL_CHANNELS(10);
 895 static const struct iio_chan_spec bmc150_accel_channels[] =
 896         BMC150_ACCEL_CHANNELS(12);
 897 static const struct iio_chan_spec bma280_accel_channels[] =
 898         BMC150_ACCEL_CHANNELS(14);
 899
 900 enum {
 901         bmc150,
 902         bmi055,
 903         bma255,
 904         bma250e,
 905         bma222e,
 906         bma280,
 907 };
 908
 909 static const struct bmc150_accel_chip_info bmc150_accel_chip_info_tbl[] = {
 910         [bmc150] = {
 911                 .chip_id = 0xFA,
 912                 .channels = bmc150_accel_channels,
 913                 .num_channels = ARRAY_SIZE(bmc150_accel_channels),
 914                 .scale_table = { {9610, BMC150_ACCEL_DEF_RANGE_2G},
 915                                  {19122, BMC150_ACCEL_DEF_RANGE_4G},
 916                                  {38344, BMC150_ACCEL_DEF_RANGE_8G},
 917                                  {76590, BMC150_ACCEL_DEF_RANGE_16G} },
 918         },
 919         [bmi055] = {
 920                 .chip_id = 0xFA,
 921                 .channels = bmc150_accel_channels,
 922                 .num_channels = ARRAY_SIZE(bmc150_accel_channels),
 923                 .scale_table = { {9610, BMC150_ACCEL_DEF_RANGE_2G},
 924                                  {19122, BMC150_ACCEL_DEF_RANGE_4G},
 925                                  {38344, BMC150_ACCEL_DEF_RANGE_8G},
 926                                  {76590, BMC150_ACCEL_DEF_RANGE_16G} },
 927         },
 928         [bma255] = {
 929                 .chip_id = 0xFA,
 930                 .channels = bmc150_accel_channels,
 931                 .num_channels = ARRAY_SIZE(bmc150_accel_channels),
 932                 .scale_table = { {9610, BMC150_ACCEL_DEF_RANGE_2G},
 933                                  {19122, BMC150_ACCEL_DEF_RANGE_4G},
 934                                  {38344, BMC150_ACCEL_DEF_RANGE_8G},
 935                                  {76590, BMC150_ACCEL_DEF_RANGE_16G} },
 936         },
 937         [bma250e] = {
 938                 .chip_id = 0xF9,
 939                 .channels = bma250e_accel_channels,
 940                 .num_channels = ARRAY_SIZE(bma250e_accel_channels),
 941                 .scale_table = { {38344, BMC150_ACCEL_DEF_RANGE_2G},
 942                                  {76590, BMC150_ACCEL_DEF_RANGE_4G},
 943                                  {153277, BMC150_ACCEL_DEF_RANGE_8G},
 944                                  {306457, BMC150_ACCEL_DEF_RANGE_16G} },
 945         },
 946         [bma222e] = {
 947                 .chip_id = 0xF8,
 948                 .channels = bma222e_accel_channels,
 949                 .num_channels = ARRAY_SIZE(bma222e_accel_channels),
 950                 .scale_table = { {153277, BMC150_ACCEL_DEF_RANGE_2G},
 951                                  {306457, BMC150_ACCEL_DEF_RANGE_4G},
 952                                  {612915, BMC150_ACCEL_DEF_RANGE_8G},
 953                                  {1225831, BMC150_ACCEL_DEF_RANGE_16G} },
 954         },
 955         [bma280] = {
 956                 .chip_id = 0xFB,
 957                 .channels = bma280_accel_channels,
 958                 .num_channels = ARRAY_SIZE(bma280_accel_channels),
 959                 .scale_table = { {2392, BMC150_ACCEL_DEF_RANGE_2G},
 960                                  {4785, BMC150_ACCEL_DEF_RANGE_4G},
 961                                  {9581, BMC150_ACCEL_DEF_RANGE_8G},
 962                                  {19152, BMC150_ACCEL_DEF_RANGE_16G} },
 963         },
 964 };
 965
 966 static const struct iio_info bmc150_accel_info = {
 967         .attrs                  = &bmc150_accel_attrs_group,
 968         .read_raw               = bmc150_accel_read_raw,
 969         .write_raw              = bmc150_accel_write_raw,
 970         .read_event_value       = bmc150_accel_read_event,
 971         .write_event_value      = bmc150_accel_write_event,
 972         .write_event_config     = bmc150_accel_write_event_config,
 973         .read_event_config      = bmc150_accel_read_event_config,
 974         .validate_trigger       = bmc150_accel_validate_trigger,
 975         .driver_module          = THIS_MODULE,
 976 };
 977
 978 static irqreturn_t bmc150_accel_trigger_handler(int irq, void *p)
 979 {
 980         struct iio_poll_func *pf = p;
 981         struct iio_dev *indio_dev = pf->indio_dev;
 982         struct bmc150_accel_data *data = iio_priv(indio_dev);
 983         int bit, ret, i = 0;
 984
 985         mutex_lock(&data->mutex);
 986         for_each_set_bit(bit, indio_dev->buffer->scan_mask,
 987                          indio_dev->masklength) {
 988                 ret = i2c_smbus_read_word_data(data->client,
 989                                                BMC150_ACCEL_AXIS_TO_REG(bit));
 990                 if (ret < 0) {
 991                         mutex_unlock(&data->mutex);
 992                         goto err_read;
 993                 }
 994                 data->buffer[i++] = ret;
 995         }
 996         mutex_unlock(&data->mutex);
 997
 998         iio_push_to_buffers_with_timestamp(indio_dev, data->buffer,
 999                                            data->timestamp);
1000 err_read:
1001         iio_trigger_notify_done(indio_dev->trig);
1002
1003         return IRQ_HANDLED;
1004 }
1005
1006 static int bmc150_accel_trig_try_reen(struct iio_trigger *trig)
1007 {
1008         struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
1009         struct bmc150_accel_data *data = iio_priv(indio_dev);
1010         int ret;
1011
1012         /* new data interrupts don't need ack */
1013         if (data->dready_trigger_on)
1014                 return 0;
1015
1016         mutex_lock(&data->mutex);
1017         /* clear any latched interrupt */
1018         ret = i2c_smbus_write_byte_data(data->client,
1019                                         BMC150_ACCEL_REG_INT_RST_LATCH,
1020                                         BMC150_ACCEL_INT_MODE_LATCH_INT |
1021                                         BMC150_ACCEL_INT_MODE_LATCH_RESET);
1022         mutex_unlock(&data->mutex);
1023         if (ret < 0) {
1024                 dev_err(&data->client->dev,
1025                         "Error writing reg_int_rst_latch\n");
1026                 return ret;
1027         }
1028
1029         return 0;
1030 }
1031
1032 static int bmc150_accel_data_rdy_trigger_set_state(struct iio_trigger *trig,
1033                                                    bool state)
1034 {
1035         struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
1036         struct bmc150_accel_data *data = iio_priv(indio_dev);
1037         int ret;
1038
1039         mutex_lock(&data->mutex);
1040
1041         if (!state && data->ev_enable_state && data->motion_trigger_on) {
1042                 data->motion_trigger_on = false;
1043                 mutex_unlock(&data->mutex);
1044                 return 0;
1045         }
1046
1047         /*
1048          * Refer to comment in bmc150_accel_write_event_config for
1049          * enable/disable operation order
1050          */
1051         ret = bmc150_accel_set_power_state(data, state);
1052         if (ret < 0) {
1053                 mutex_unlock(&data->mutex);
1054                 return ret;
1055         }
1056         if (data->motion_trig == trig)
1057                 ret =  bmc150_accel_setup_any_motion_interrupt(data, state);
1058         else
1059                 ret = bmc150_accel_setup_new_data_interrupt(data, state);
1060         if (ret < 0) {
1061                 bmc150_accel_set_power_state(data, false);
1062                 mutex_unlock(&data->mutex);
1063                 return ret;
1064         }
1065         if (data->motion_trig == trig)
1066                 data->motion_trigger_on = state;
1067         else
1068                 data->dready_trigger_on = state;
1069
1070         mutex_unlock(&data->mutex);
1071
1072         return ret;
1073 }
1074
1075 static const struct iio_trigger_ops bmc150_accel_trigger_ops = {
1076         .set_trigger_state = bmc150_accel_data_rdy_trigger_set_state,
1077         .try_reenable = bmc150_accel_trig_try_reen,
1078         .owner = THIS_MODULE,
1079 };
1080
1081 static irqreturn_t bmc150_accel_event_handler(int irq, void *private)
1082 {
1083         struct iio_dev *indio_dev = private;
1084         struct bmc150_accel_data *data = iio_priv(indio_dev);
1085         int ret;
1086         int dir;
1087
1088         ret = i2c_smbus_read_byte_data(data->client,
1089                                        BMC150_ACCEL_REG_INT_STATUS_2);
1090         if (ret < 0) {
1091                 dev_err(&data->client->dev, "Error reading reg_int_status_2\n");
1092                 goto ack_intr_status;
1093         }
1094
1095         if (ret & BMC150_ACCEL_ANY_MOTION_BIT_SIGN)
1096                 dir = IIO_EV_DIR_FALLING;
1097         else
1098                 dir = IIO_EV_DIR_RISING;
1099
1100         if (ret & BMC150_ACCEL_ANY_MOTION_MASK)
1101                 iio_push_event(indio_dev, IIO_MOD_EVENT_CODE(IIO_ACCEL,
1102                                                         0,
1103                                                         IIO_MOD_X_OR_Y_OR_Z,
1104                                                         IIO_EV_TYPE_ROC,
1105                                                         IIO_EV_DIR_EITHER),
1106                                                         data->timestamp);
1107 ack_intr_status:
1108         if (!data->dready_trigger_on)
1109                 ret = i2c_smbus_write_byte_data(data->client,
1110                                         BMC150_ACCEL_REG_INT_RST_LATCH,
1111                                         BMC150_ACCEL_INT_MODE_LATCH_INT |
1112                                         BMC150_ACCEL_INT_MODE_LATCH_RESET);
1113
1114         return IRQ_HANDLED;
1115 }
1116
1117 static irqreturn_t bmc150_accel_data_rdy_trig_poll(int irq, void *private)
1118 {
1119         struct iio_dev *indio_dev = private;
1120         struct bmc150_accel_data *data = iio_priv(indio_dev);
1121
1122         data->timestamp = iio_get_time_ns();
1123
1124         if (data->dready_trigger_on)
1125                 iio_trigger_poll(data->dready_trig);
1126         else if (data->motion_trigger_on)
1127                 iio_trigger_poll(data->motion_trig);
1128
1129         if (data->ev_enable_state)
1130                 return IRQ_WAKE_THREAD;
1131         else
1132                 return IRQ_HANDLED;
1133 }
1134
1135 static const char *bmc150_accel_match_acpi_device(struct device *dev, int *data)
1136 {
1137         const struct acpi_device_id *id;
1138
1139         id = acpi_match_device(dev->driver->acpi_match_table, dev);
1140
1141         if (!id)
1142                 return NULL;
1143
1144         *data = (int) id->driver_data;
1145
1146         return dev_name(dev);
1147 }
1148
1149 static int bmc150_accel_gpio_probe(struct i2c_client *client,
1150                                         struct bmc150_accel_data *data)
1151 {
1152         struct device *dev;
1153         struct gpio_desc *gpio;
1154         int ret;
1155
1156         if (!client)
1157                 return -EINVAL;
1158
1159         dev = &client->dev;
1160
1161         /* data ready gpio interrupt pin */
1162         gpio = devm_gpiod_get_index(dev, BMC150_ACCEL_GPIO_NAME, 0);
1163         if (IS_ERR(gpio)) {
1164                 dev_err(dev, "Failed: gpio get index\n");
1165                 return PTR_ERR(gpio);
1166         }
1167
1168         ret = gpiod_direction_input(gpio);
1169         if (ret)
1170                 return ret;
1171
1172         ret = gpiod_to_irq(gpio);
1173
1174         dev_dbg(dev, "GPIO resource, no:%d irq:%d\n", desc_to_gpio(gpio), ret);
1175
1176         return ret;
1177 }
1178
1179 static int bmc150_accel_probe(struct i2c_client *client,
1180                               const struct i2c_device_id *id)
1181 {
1182         struct bmc150_accel_data *data;
1183         struct iio_dev *indio_dev;
1184         int ret;
1185         const char *name = NULL;
1186         int chip_id = 0;
1187
1188         indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
1189         if (!indio_dev)
1190                 return -ENOMEM;
1191
1192         data = iio_priv(indio_dev);
1193         i2c_set_clientdata(client, indio_dev);
1194         data->client = client;
1195
1196         if (id) {
1197                 name = id->name;
1198                 chip_id = id->driver_data;
1199         }
1200
1201         if (ACPI_HANDLE(&client->dev))
1202                 name = bmc150_accel_match_acpi_device(&client->dev, &chip_id);
1203
1204         data->chip_info = &bmc150_accel_chip_info_tbl[chip_id];
1205
1206         ret = bmc150_accel_chip_init(data);
1207         if (ret < 0)
1208                 return ret;
1209
1210         mutex_init(&data->mutex);
1211
1212         indio_dev->dev.parent = &client->dev;
1213         indio_dev->channels = data->chip_info->channels;
1214         indio_dev->num_channels = data->chip_info->num_channels;
1215         indio_dev->name = name;
1216         indio_dev->modes = INDIO_DIRECT_MODE;
1217         indio_dev->info = &bmc150_accel_info;
1218
1219         if (client->irq < 0)
1220                 client->irq = bmc150_accel_gpio_probe(client, data);
1221
1222         if (client->irq >= 0) {
1223                 ret = devm_request_threaded_irq(
1224                                                 &client->dev, client->irq,
1225                                                 bmc150_accel_data_rdy_trig_poll,
1226                                                 bmc150_accel_event_handler,
1227                                                 IRQF_TRIGGER_RISING,
1228                                                 BMC150_ACCEL_IRQ_NAME,
1229                                                 indio_dev);
1230                 if (ret)
1231                         return ret;
1232
1233                 data->dready_trig = devm_iio_trigger_alloc(&client->dev,
1234                                                            "%s-dev%d",
1235                                                            indio_dev->name,
1236                                                            indio_dev->id);
1237                 if (!data->dready_trig)
1238                         return -ENOMEM;
1239
1240                 data->motion_trig = devm_iio_trigger_alloc(&client->dev,
1241                                                           "%s-any-motion-dev%d",
1242                                                           indio_dev->name,
1243                                                           indio_dev->id);
1244                 if (!data->motion_trig)
1245                         return -ENOMEM;
1246
1247                 data->dready_trig->dev.parent = &client->dev;
1248                 data->dready_trig->ops = &bmc150_accel_trigger_ops;
1249                 iio_trigger_set_drvdata(data->dready_trig, indio_dev);
1250                 ret = iio_trigger_register(data->dready_trig);
1251                 if (ret)
1252                         return ret;
1253
1254                 data->motion_trig->dev.parent = &client->dev;
1255                 data->motion_trig->ops = &bmc150_accel_trigger_ops;
1256                 iio_trigger_set_drvdata(data->motion_trig, indio_dev);
1257                 ret = iio_trigger_register(data->motion_trig);
1258                 if (ret) {
1259                         data->motion_trig = NULL;
1260                         goto err_trigger_unregister;
1261                 }
1262
1263                 ret = iio_triggered_buffer_setup(indio_dev,
1264                                                  &iio_pollfunc_store_time,
1265                                                  bmc150_accel_trigger_handler,
1266                                                  NULL);
1267                 if (ret < 0) {
1268                         dev_err(&client->dev,
1269                                 "Failed: iio triggered buffer setup\n");
1270                         goto err_trigger_unregister;
1271                 }
1272         }
1273
1274         ret = iio_device_register(indio_dev);
1275         if (ret < 0) {
1276                 dev_err(&client->dev, "Unable to register iio device\n");
1277                 goto err_buffer_cleanup;
1278         }
1279
1280         ret = pm_runtime_set_active(&client->dev);
1281         if (ret)
1282                 goto err_iio_unregister;
1283
1284         pm_runtime_enable(&client->dev);
1285         pm_runtime_set_autosuspend_delay(&client->dev,
1286                                          BMC150_AUTO_SUSPEND_DELAY_MS);
1287         pm_runtime_use_autosuspend(&client->dev);
1288
1289         return 0;
1290
1291 err_iio_unregister:
1292         iio_device_unregister(indio_dev);
1293 err_buffer_cleanup:
1294         if (data->dready_trig)
1295                 iio_triggered_buffer_cleanup(indio_dev);
1296 err_trigger_unregister:
1297         if (data->dready_trig)
1298                 iio_trigger_unregister(data->dready_trig);
1299         if (data->motion_trig)
1300                 iio_trigger_unregister(data->motion_trig);
1301
1302         return ret;
1303 }
1304
1305 static int bmc150_accel_remove(struct i2c_client *client)
1306 {
1307         struct iio_dev *indio_dev = i2c_get_clientdata(client);
1308         struct bmc150_accel_data *data = iio_priv(indio_dev);
1309
1310         pm_runtime_disable(&client->dev);
1311         pm_runtime_set_suspended(&client->dev);
1312         pm_runtime_put_noidle(&client->dev);
1313
1314         iio_device_unregister(indio_dev);
1315
1316         if (data->dready_trig) {
1317                 iio_triggered_buffer_cleanup(indio_dev);
1318                 iio_trigger_unregister(data->dready_trig);
1319                 iio_trigger_unregister(data->motion_trig);
1320         }
1321
1322         mutex_lock(&data->mutex);
1323         bmc150_accel_set_mode(data, BMC150_ACCEL_SLEEP_MODE_DEEP_SUSPEND, 0);
1324         mutex_unlock(&data->mutex);
1325
1326         return 0;
1327 }
1328
1329 #ifdef CONFIG_PM_SLEEP
1330 static int bmc150_accel_suspend(struct device *dev)
1331 {
1332         struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
1333         struct bmc150_accel_data *data = iio_priv(indio_dev);
1334
1335         mutex_lock(&data->mutex);
1336         bmc150_accel_set_mode(data, BMC150_ACCEL_SLEEP_MODE_SUSPEND, 0);
1337         mutex_unlock(&data->mutex);
1338
1339         return 0;
1340 }
1341
1342 static int bmc150_accel_resume(struct device *dev)
1343 {
1344         struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
1345         struct bmc150_accel_data *data = iio_priv(indio_dev);
1346
1347         mutex_lock(&data->mutex);
1348         if (data->dready_trigger_on || data->motion_trigger_on ||
1349                                                         data->ev_enable_state)
1350                 bmc150_accel_set_mode(data, BMC150_ACCEL_SLEEP_MODE_NORMAL, 0);
1351         mutex_unlock(&data->mutex);
1352
1353         return 0;
1354 }
1355 #endif
1356
1357 #ifdef CONFIG_PM_RUNTIME
1358 static int bmc150_accel_runtime_suspend(struct device *dev)
1359 {
1360         struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
1361         struct bmc150_accel_data *data = iio_priv(indio_dev);
1362         int ret;
1363
1364         dev_dbg(&data->client->dev,  __func__);
1365         ret = bmc150_accel_set_mode(data, BMC150_ACCEL_SLEEP_MODE_SUSPEND, 0);
1366         if (ret < 0)
1367                 return -EAGAIN;
1368
1369         return 0;
1370 }
1371
1372 static int bmc150_accel_runtime_resume(struct device *dev)
1373 {
1374         struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
1375         struct bmc150_accel_data *data = iio_priv(indio_dev);
1376         int ret;
1377         int sleep_val;
1378
1379         dev_dbg(&data->client->dev,  __func__);
1380
1381         ret = bmc150_accel_set_mode(data, BMC150_ACCEL_SLEEP_MODE_NORMAL, 0);
1382         if (ret < 0)
1383                 return ret;
1384
1385         sleep_val = bmc150_accel_get_startup_times(data);
1386         if (sleep_val < 20)
1387                 usleep_range(sleep_val * 1000, 20000);
1388         else
1389                 msleep_interruptible(sleep_val);
1390
1391         return 0;
1392 }
1393 #endif
1394
1395 static const struct dev_pm_ops bmc150_accel_pm_ops = {
1396         SET_SYSTEM_SLEEP_PM_OPS(bmc150_accel_suspend, bmc150_accel_resume)
1397         SET_RUNTIME_PM_OPS(bmc150_accel_runtime_suspend,
1398                            bmc150_accel_runtime_resume, NULL)
1399 };
1400
1401 static const struct acpi_device_id bmc150_accel_acpi_match[] = {
1402         {"BSBA0150",    bmc150},
1403         {"BMC150A",     bmc150},
1404         {"BMI055A",     bmi055},
1405         {"BMA0255",     bma255},
1406         {"BMA250E",     bma250e},
1407         {"BMA222E",     bma222e},
1408         {"BMA0280",     bma280},
1409         { },
1410 };
1411 MODULE_DEVICE_TABLE(acpi, bmc150_accel_acpi_match);
1412
1413 static const struct i2c_device_id bmc150_accel_id[] = {
1414         {"bmc150_accel",        bmc150},
1415         {"bmi055_accel",        bmi055},
1416         {"bma255",              bma255},
1417         {"bma250e",             bma250e},
1418         {"bma222e",             bma222e},
1419         {"bma280",              bma280},
1420         {}
1421 };
1422
1423 MODULE_DEVICE_TABLE(i2c, bmc150_accel_id);
1424
1425 static struct i2c_driver bmc150_accel_driver = {
1426         .driver = {
1427                 .name   = BMC150_ACCEL_DRV_NAME,
1428                 .acpi_match_table = ACPI_PTR(bmc150_accel_acpi_match),
1429                 .pm     = &bmc150_accel_pm_ops,
1430         },
1431         .probe          = bmc150_accel_probe,
1432         .remove         = bmc150_accel_remove,
1433         .id_table       = bmc150_accel_id,
1434 };
1435 module_i2c_driver(bmc150_accel_driver);
1436
1437 MODULE_AUTHOR("Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>");
1438 MODULE_LICENSE("GPL v2");
1439 MODULE_DESCRIPTION("BMC150 accelerometer driver");