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SCSI: Fix NULL pointer dereference in runtime PM
[uclinux-h8/linux.git] / drivers / infiniband / hw / mlx4 / mad.c
1 /*
2  * Copyright (c) 2007 Cisco Systems, Inc. All rights reserved.
3  *
4  * This software is available to you under a choice of one of two
5  * licenses.  You may choose to be licensed under the terms of the GNU
6  * General Public License (GPL) Version 2, available from the file
7  * COPYING in the main directory of this source tree, or the
8  * OpenIB.org BSD license below:
9  *
10  *     Redistribution and use in source and binary forms, with or
11  *     without modification, are permitted provided that the following
12  *     conditions are met:
13  *
14  *      - Redistributions of source code must retain the above
15  *        copyright notice, this list of conditions and the following
16  *        disclaimer.
17  *
18  *      - Redistributions in binary form must reproduce the above
19  *        copyright notice, this list of conditions and the following
20  *        disclaimer in the documentation and/or other materials
21  *        provided with the distribution.
22  *
23  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30  * SOFTWARE.
31  */
32
33 #include <rdma/ib_mad.h>
34 #include <rdma/ib_smi.h>
35 #include <rdma/ib_sa.h>
36 #include <rdma/ib_cache.h>
37
38 #include <linux/random.h>
39 #include <linux/mlx4/cmd.h>
40 #include <linux/gfp.h>
41 #include <rdma/ib_pma.h>
42
43 #include "mlx4_ib.h"
44
45 enum {
46         MLX4_IB_VENDOR_CLASS1 = 0x9,
47         MLX4_IB_VENDOR_CLASS2 = 0xa
48 };
49
50 #define MLX4_TUN_SEND_WRID_SHIFT 34
51 #define MLX4_TUN_QPN_SHIFT 32
52 #define MLX4_TUN_WRID_RECV (((u64) 1) << MLX4_TUN_SEND_WRID_SHIFT)
53 #define MLX4_TUN_SET_WRID_QPN(a) (((u64) ((a) & 0x3)) << MLX4_TUN_QPN_SHIFT)
54
55 #define MLX4_TUN_IS_RECV(a)  (((a) >>  MLX4_TUN_SEND_WRID_SHIFT) & 0x1)
56 #define MLX4_TUN_WRID_QPN(a) (((a) >> MLX4_TUN_QPN_SHIFT) & 0x3)
57
58  /* Port mgmt change event handling */
59
60 #define GET_BLK_PTR_FROM_EQE(eqe) be32_to_cpu(eqe->event.port_mgmt_change.params.tbl_change_info.block_ptr)
61 #define GET_MASK_FROM_EQE(eqe) be32_to_cpu(eqe->event.port_mgmt_change.params.tbl_change_info.tbl_entries_mask)
62 #define NUM_IDX_IN_PKEY_TBL_BLK 32
63 #define GUID_TBL_ENTRY_SIZE 8      /* size in bytes */
64 #define GUID_TBL_BLK_NUM_ENTRIES 8
65 #define GUID_TBL_BLK_SIZE (GUID_TBL_ENTRY_SIZE * GUID_TBL_BLK_NUM_ENTRIES)
66
67 struct mlx4_mad_rcv_buf {
68         struct ib_grh grh;
69         u8 payload[256];
70 } __packed;
71
72 struct mlx4_mad_snd_buf {
73         u8 payload[256];
74 } __packed;
75
76 struct mlx4_tunnel_mad {
77         struct ib_grh grh;
78         struct mlx4_ib_tunnel_header hdr;
79         struct ib_mad mad;
80 } __packed;
81
82 struct mlx4_rcv_tunnel_mad {
83         struct mlx4_rcv_tunnel_hdr hdr;
84         struct ib_grh grh;
85         struct ib_mad mad;
86 } __packed;
87
88 static void handle_client_rereg_event(struct mlx4_ib_dev *dev, u8 port_num);
89 static void handle_lid_change_event(struct mlx4_ib_dev *dev, u8 port_num);
90 static void __propagate_pkey_ev(struct mlx4_ib_dev *dev, int port_num,
91                                 int block, u32 change_bitmap);
92
93 __be64 mlx4_ib_gen_node_guid(void)
94 {
95 #define NODE_GUID_HI    ((u64) (((u64)IB_OPENIB_OUI) << 40))
96         return cpu_to_be64(NODE_GUID_HI | prandom_u32());
97 }
98
99 __be64 mlx4_ib_get_new_demux_tid(struct mlx4_ib_demux_ctx *ctx)
100 {
101         return cpu_to_be64(atomic_inc_return(&ctx->tid)) |
102                 cpu_to_be64(0xff00000000000000LL);
103 }
104
105 int mlx4_MAD_IFC(struct mlx4_ib_dev *dev, int mad_ifc_flags,
106                  int port, const struct ib_wc *in_wc,
107                  const struct ib_grh *in_grh,
108                  const void *in_mad, void *response_mad)
109 {
110         struct mlx4_cmd_mailbox *inmailbox, *outmailbox;
111         void *inbox;
112         int err;
113         u32 in_modifier = port;
114         u8 op_modifier = 0;
115
116         inmailbox = mlx4_alloc_cmd_mailbox(dev->dev);
117         if (IS_ERR(inmailbox))
118                 return PTR_ERR(inmailbox);
119         inbox = inmailbox->buf;
120
121         outmailbox = mlx4_alloc_cmd_mailbox(dev->dev);
122         if (IS_ERR(outmailbox)) {
123                 mlx4_free_cmd_mailbox(dev->dev, inmailbox);
124                 return PTR_ERR(outmailbox);
125         }
126
127         memcpy(inbox, in_mad, 256);
128
129         /*
130          * Key check traps can't be generated unless we have in_wc to
131          * tell us where to send the trap.
132          */
133         if ((mad_ifc_flags & MLX4_MAD_IFC_IGNORE_MKEY) || !in_wc)
134                 op_modifier |= 0x1;
135         if ((mad_ifc_flags & MLX4_MAD_IFC_IGNORE_BKEY) || !in_wc)
136                 op_modifier |= 0x2;
137         if (mlx4_is_mfunc(dev->dev) &&
138             (mad_ifc_flags & MLX4_MAD_IFC_NET_VIEW || in_wc))
139                 op_modifier |= 0x8;
140
141         if (in_wc) {
142                 struct {
143                         __be32          my_qpn;
144                         u32             reserved1;
145                         __be32          rqpn;
146                         u8              sl;
147                         u8              g_path;
148                         u16             reserved2[2];
149                         __be16          pkey;
150                         u32             reserved3[11];
151                         u8              grh[40];
152                 } *ext_info;
153
154                 memset(inbox + 256, 0, 256);
155                 ext_info = inbox + 256;
156
157                 ext_info->my_qpn = cpu_to_be32(in_wc->qp->qp_num);
158                 ext_info->rqpn   = cpu_to_be32(in_wc->src_qp);
159                 ext_info->sl     = in_wc->sl << 4;
160                 ext_info->g_path = in_wc->dlid_path_bits |
161                         (in_wc->wc_flags & IB_WC_GRH ? 0x80 : 0);
162                 ext_info->pkey   = cpu_to_be16(in_wc->pkey_index);
163
164                 if (in_grh)
165                         memcpy(ext_info->grh, in_grh, 40);
166
167                 op_modifier |= 0x4;
168
169                 in_modifier |= in_wc->slid << 16;
170         }
171
172         err = mlx4_cmd_box(dev->dev, inmailbox->dma, outmailbox->dma, in_modifier,
173                            mlx4_is_master(dev->dev) ? (op_modifier & ~0x8) : op_modifier,
174                            MLX4_CMD_MAD_IFC, MLX4_CMD_TIME_CLASS_C,
175                            (op_modifier & 0x8) ? MLX4_CMD_NATIVE : MLX4_CMD_WRAPPED);
176
177         if (!err)
178                 memcpy(response_mad, outmailbox->buf, 256);
179
180         mlx4_free_cmd_mailbox(dev->dev, inmailbox);
181         mlx4_free_cmd_mailbox(dev->dev, outmailbox);
182
183         return err;
184 }
185
186 static void update_sm_ah(struct mlx4_ib_dev *dev, u8 port_num, u16 lid, u8 sl)
187 {
188         struct ib_ah *new_ah;
189         struct ib_ah_attr ah_attr;
190         unsigned long flags;
191
192         if (!dev->send_agent[port_num - 1][0])
193                 return;
194
195         memset(&ah_attr, 0, sizeof ah_attr);
196         ah_attr.dlid     = lid;
197         ah_attr.sl       = sl;
198         ah_attr.port_num = port_num;
199
200         new_ah = ib_create_ah(dev->send_agent[port_num - 1][0]->qp->pd,
201                               &ah_attr);
202         if (IS_ERR(new_ah))
203                 return;
204
205         spin_lock_irqsave(&dev->sm_lock, flags);
206         if (dev->sm_ah[port_num - 1])
207                 ib_destroy_ah(dev->sm_ah[port_num - 1]);
208         dev->sm_ah[port_num - 1] = new_ah;
209         spin_unlock_irqrestore(&dev->sm_lock, flags);
210 }
211
212 /*
213  * Snoop SM MADs for port info, GUID info, and  P_Key table sets, so we can
214  * synthesize LID change, Client-Rereg, GID change, and P_Key change events.
215  */
216 static void smp_snoop(struct ib_device *ibdev, u8 port_num, const struct ib_mad *mad,
217                       u16 prev_lid)
218 {
219         struct ib_port_info *pinfo;
220         u16 lid;
221         __be16 *base;
222         u32 bn, pkey_change_bitmap;
223         int i;
224
225
226         struct mlx4_ib_dev *dev = to_mdev(ibdev);
227         if ((mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_LID_ROUTED ||
228              mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE) &&
229             mad->mad_hdr.method == IB_MGMT_METHOD_SET)
230                 switch (mad->mad_hdr.attr_id) {
231                 case IB_SMP_ATTR_PORT_INFO:
232                         pinfo = (struct ib_port_info *) ((struct ib_smp *) mad)->data;
233                         lid = be16_to_cpu(pinfo->lid);
234
235                         update_sm_ah(dev, port_num,
236                                      be16_to_cpu(pinfo->sm_lid),
237                                      pinfo->neighbormtu_mastersmsl & 0xf);
238
239                         if (pinfo->clientrereg_resv_subnetto & 0x80)
240                                 handle_client_rereg_event(dev, port_num);
241
242                         if (prev_lid != lid)
243                                 handle_lid_change_event(dev, port_num);
244                         break;
245
246                 case IB_SMP_ATTR_PKEY_TABLE:
247                         if (!mlx4_is_mfunc(dev->dev)) {
248                                 mlx4_ib_dispatch_event(dev, port_num,
249                                                        IB_EVENT_PKEY_CHANGE);
250                                 break;
251                         }
252
253                         /* at this point, we are running in the master.
254                          * Slaves do not receive SMPs.
255                          */
256                         bn  = be32_to_cpu(((struct ib_smp *)mad)->attr_mod) & 0xFFFF;
257                         base = (__be16 *) &(((struct ib_smp *)mad)->data[0]);
258                         pkey_change_bitmap = 0;
259                         for (i = 0; i < 32; i++) {
260                                 pr_debug("PKEY[%d] = x%x\n",
261                                          i + bn*32, be16_to_cpu(base[i]));
262                                 if (be16_to_cpu(base[i]) !=
263                                     dev->pkeys.phys_pkey_cache[port_num - 1][i + bn*32]) {
264                                         pkey_change_bitmap |= (1 << i);
265                                         dev->pkeys.phys_pkey_cache[port_num - 1][i + bn*32] =
266                                                 be16_to_cpu(base[i]);
267                                 }
268                         }
269                         pr_debug("PKEY Change event: port=%d, "
270                                  "block=0x%x, change_bitmap=0x%x\n",
271                                  port_num, bn, pkey_change_bitmap);
272
273                         if (pkey_change_bitmap) {
274                                 mlx4_ib_dispatch_event(dev, port_num,
275                                                        IB_EVENT_PKEY_CHANGE);
276                                 if (!dev->sriov.is_going_down)
277                                         __propagate_pkey_ev(dev, port_num, bn,
278                                                             pkey_change_bitmap);
279                         }
280                         break;
281
282                 case IB_SMP_ATTR_GUID_INFO:
283                         /* paravirtualized master's guid is guid 0 -- does not change */
284                         if (!mlx4_is_master(dev->dev))
285                                 mlx4_ib_dispatch_event(dev, port_num,
286                                                        IB_EVENT_GID_CHANGE);
287                         /*if master, notify relevant slaves*/
288                         if (mlx4_is_master(dev->dev) &&
289                             !dev->sriov.is_going_down) {
290                                 bn = be32_to_cpu(((struct ib_smp *)mad)->attr_mod);
291                                 mlx4_ib_update_cache_on_guid_change(dev, bn, port_num,
292                                                                     (u8 *)(&((struct ib_smp *)mad)->data));
293                                 mlx4_ib_notify_slaves_on_guid_change(dev, bn, port_num,
294                                                                      (u8 *)(&((struct ib_smp *)mad)->data));
295                         }
296                         break;
297
298                 default:
299                         break;
300                 }
301 }
302
303 static void __propagate_pkey_ev(struct mlx4_ib_dev *dev, int port_num,
304                                 int block, u32 change_bitmap)
305 {
306         int i, ix, slave, err;
307         int have_event = 0;
308
309         for (slave = 0; slave < dev->dev->caps.sqp_demux; slave++) {
310                 if (slave == mlx4_master_func_num(dev->dev))
311                         continue;
312                 if (!mlx4_is_slave_active(dev->dev, slave))
313                         continue;
314
315                 have_event = 0;
316                 for (i = 0; i < 32; i++) {
317                         if (!(change_bitmap & (1 << i)))
318                                 continue;
319                         for (ix = 0;
320                              ix < dev->dev->caps.pkey_table_len[port_num]; ix++) {
321                                 if (dev->pkeys.virt2phys_pkey[slave][port_num - 1]
322                                     [ix] == i + 32 * block) {
323                                         err = mlx4_gen_pkey_eqe(dev->dev, slave, port_num);
324                                         pr_debug("propagate_pkey_ev: slave %d,"
325                                                  " port %d, ix %d (%d)\n",
326                                                  slave, port_num, ix, err);
327                                         have_event = 1;
328                                         break;
329                                 }
330                         }
331                         if (have_event)
332                                 break;
333                 }
334         }
335 }
336
337 static void node_desc_override(struct ib_device *dev,
338                                struct ib_mad *mad)
339 {
340         unsigned long flags;
341
342         if ((mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_LID_ROUTED ||
343              mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE) &&
344             mad->mad_hdr.method == IB_MGMT_METHOD_GET_RESP &&
345             mad->mad_hdr.attr_id == IB_SMP_ATTR_NODE_DESC) {
346                 spin_lock_irqsave(&to_mdev(dev)->sm_lock, flags);
347                 memcpy(((struct ib_smp *) mad)->data, dev->node_desc, 64);
348                 spin_unlock_irqrestore(&to_mdev(dev)->sm_lock, flags);
349         }
350 }
351
352 static void forward_trap(struct mlx4_ib_dev *dev, u8 port_num, const struct ib_mad *mad)
353 {
354         int qpn = mad->mad_hdr.mgmt_class != IB_MGMT_CLASS_SUBN_LID_ROUTED;
355         struct ib_mad_send_buf *send_buf;
356         struct ib_mad_agent *agent = dev->send_agent[port_num - 1][qpn];
357         int ret;
358         unsigned long flags;
359
360         if (agent) {
361                 send_buf = ib_create_send_mad(agent, qpn, 0, 0, IB_MGMT_MAD_HDR,
362                                               IB_MGMT_MAD_DATA, GFP_ATOMIC,
363                                               IB_MGMT_BASE_VERSION);
364                 if (IS_ERR(send_buf))
365                         return;
366                 /*
367                  * We rely here on the fact that MLX QPs don't use the
368                  * address handle after the send is posted (this is
369                  * wrong following the IB spec strictly, but we know
370                  * it's OK for our devices).
371                  */
372                 spin_lock_irqsave(&dev->sm_lock, flags);
373                 memcpy(send_buf->mad, mad, sizeof *mad);
374                 if ((send_buf->ah = dev->sm_ah[port_num - 1]))
375                         ret = ib_post_send_mad(send_buf, NULL);
376                 else
377                         ret = -EINVAL;
378                 spin_unlock_irqrestore(&dev->sm_lock, flags);
379
380                 if (ret)
381                         ib_free_send_mad(send_buf);
382         }
383 }
384
385 static int mlx4_ib_demux_sa_handler(struct ib_device *ibdev, int port, int slave,
386                                                              struct ib_sa_mad *sa_mad)
387 {
388         int ret = 0;
389
390         /* dispatch to different sa handlers */
391         switch (be16_to_cpu(sa_mad->mad_hdr.attr_id)) {
392         case IB_SA_ATTR_MC_MEMBER_REC:
393                 ret = mlx4_ib_mcg_demux_handler(ibdev, port, slave, sa_mad);
394                 break;
395         default:
396                 break;
397         }
398         return ret;
399 }
400
401 int mlx4_ib_find_real_gid(struct ib_device *ibdev, u8 port, __be64 guid)
402 {
403         struct mlx4_ib_dev *dev = to_mdev(ibdev);
404         int i;
405
406         for (i = 0; i < dev->dev->caps.sqp_demux; i++) {
407                 if (dev->sriov.demux[port - 1].guid_cache[i] == guid)
408                         return i;
409         }
410         return -1;
411 }
412
413
414 static int find_slave_port_pkey_ix(struct mlx4_ib_dev *dev, int slave,
415                                    u8 port, u16 pkey, u16 *ix)
416 {
417         int i, ret;
418         u8 unassigned_pkey_ix, pkey_ix, partial_ix = 0xFF;
419         u16 slot_pkey;
420
421         if (slave == mlx4_master_func_num(dev->dev))
422                 return ib_find_cached_pkey(&dev->ib_dev, port, pkey, ix);
423
424         unassigned_pkey_ix = dev->dev->phys_caps.pkey_phys_table_len[port] - 1;
425
426         for (i = 0; i < dev->dev->caps.pkey_table_len[port]; i++) {
427                 if (dev->pkeys.virt2phys_pkey[slave][port - 1][i] == unassigned_pkey_ix)
428                         continue;
429
430                 pkey_ix = dev->pkeys.virt2phys_pkey[slave][port - 1][i];
431
432                 ret = ib_get_cached_pkey(&dev->ib_dev, port, pkey_ix, &slot_pkey);
433                 if (ret)
434                         continue;
435                 if ((slot_pkey & 0x7FFF) == (pkey & 0x7FFF)) {
436                         if (slot_pkey & 0x8000) {
437                                 *ix = (u16) pkey_ix;
438                                 return 0;
439                         } else {
440                                 /* take first partial pkey index found */
441                                 if (partial_ix == 0xFF)
442                                         partial_ix = pkey_ix;
443                         }
444                 }
445         }
446
447         if (partial_ix < 0xFF) {
448                 *ix = (u16) partial_ix;
449                 return 0;
450         }
451
452         return -EINVAL;
453 }
454
455 int mlx4_ib_send_to_slave(struct mlx4_ib_dev *dev, int slave, u8 port,
456                           enum ib_qp_type dest_qpt, struct ib_wc *wc,
457                           struct ib_grh *grh, struct ib_mad *mad)
458 {
459         struct ib_sge list;
460         struct ib_send_wr wr, *bad_wr;
461         struct mlx4_ib_demux_pv_ctx *tun_ctx;
462         struct mlx4_ib_demux_pv_qp *tun_qp;
463         struct mlx4_rcv_tunnel_mad *tun_mad;
464         struct ib_ah_attr attr;
465         struct ib_ah *ah;
466         struct ib_qp *src_qp = NULL;
467         unsigned tun_tx_ix = 0;
468         int dqpn;
469         int ret = 0;
470         u16 tun_pkey_ix;
471         u16 cached_pkey;
472         u8 is_eth = dev->dev->caps.port_type[port] == MLX4_PORT_TYPE_ETH;
473
474         if (dest_qpt > IB_QPT_GSI)
475                 return -EINVAL;
476
477         tun_ctx = dev->sriov.demux[port-1].tun[slave];
478
479         /* check if proxy qp created */
480         if (!tun_ctx || tun_ctx->state != DEMUX_PV_STATE_ACTIVE)
481                 return -EAGAIN;
482
483         if (!dest_qpt)
484                 tun_qp = &tun_ctx->qp[0];
485         else
486                 tun_qp = &tun_ctx->qp[1];
487
488         /* compute P_Key index to put in tunnel header for slave */
489         if (dest_qpt) {
490                 u16 pkey_ix;
491                 ret = ib_get_cached_pkey(&dev->ib_dev, port, wc->pkey_index, &cached_pkey);
492                 if (ret)
493                         return -EINVAL;
494
495                 ret = find_slave_port_pkey_ix(dev, slave, port, cached_pkey, &pkey_ix);
496                 if (ret)
497                         return -EINVAL;
498                 tun_pkey_ix = pkey_ix;
499         } else
500                 tun_pkey_ix = dev->pkeys.virt2phys_pkey[slave][port - 1][0];
501
502         dqpn = dev->dev->phys_caps.base_proxy_sqpn + 8 * slave + port + (dest_qpt * 2) - 1;
503
504         /* get tunnel tx data buf for slave */
505         src_qp = tun_qp->qp;
506
507         /* create ah. Just need an empty one with the port num for the post send.
508          * The driver will set the force loopback bit in post_send */
509         memset(&attr, 0, sizeof attr);
510         attr.port_num = port;
511         if (is_eth) {
512                 memcpy(&attr.grh.dgid.raw[0], &grh->dgid.raw[0], 16);
513                 attr.ah_flags = IB_AH_GRH;
514         }
515         ah = ib_create_ah(tun_ctx->pd, &attr);
516         if (IS_ERR(ah))
517                 return -ENOMEM;
518
519         /* allocate tunnel tx buf after pass failure returns */
520         spin_lock(&tun_qp->tx_lock);
521         if (tun_qp->tx_ix_head - tun_qp->tx_ix_tail >=
522             (MLX4_NUM_TUNNEL_BUFS - 1))
523                 ret = -EAGAIN;
524         else
525                 tun_tx_ix = (++tun_qp->tx_ix_head) & (MLX4_NUM_TUNNEL_BUFS - 1);
526         spin_unlock(&tun_qp->tx_lock);
527         if (ret)
528                 goto out;
529
530         tun_mad = (struct mlx4_rcv_tunnel_mad *) (tun_qp->tx_ring[tun_tx_ix].buf.addr);
531         if (tun_qp->tx_ring[tun_tx_ix].ah)
532                 ib_destroy_ah(tun_qp->tx_ring[tun_tx_ix].ah);
533         tun_qp->tx_ring[tun_tx_ix].ah = ah;
534         ib_dma_sync_single_for_cpu(&dev->ib_dev,
535                                    tun_qp->tx_ring[tun_tx_ix].buf.map,
536                                    sizeof (struct mlx4_rcv_tunnel_mad),
537                                    DMA_TO_DEVICE);
538
539         /* copy over to tunnel buffer */
540         if (grh)
541                 memcpy(&tun_mad->grh, grh, sizeof *grh);
542         memcpy(&tun_mad->mad, mad, sizeof *mad);
543
544         /* adjust tunnel data */
545         tun_mad->hdr.pkey_index = cpu_to_be16(tun_pkey_ix);
546         tun_mad->hdr.flags_src_qp = cpu_to_be32(wc->src_qp & 0xFFFFFF);
547         tun_mad->hdr.g_ml_path = (grh && (wc->wc_flags & IB_WC_GRH)) ? 0x80 : 0;
548
549         if (is_eth) {
550                 u16 vlan = 0;
551                 if (mlx4_get_slave_default_vlan(dev->dev, port, slave, &vlan,
552                                                 NULL)) {
553                         /* VST mode */
554                         if (vlan != wc->vlan_id)
555                                 /* Packet vlan is not the VST-assigned vlan.
556                                  * Drop the packet.
557                                  */
558                                 goto out;
559                          else
560                                 /* Remove the vlan tag before forwarding
561                                  * the packet to the VF.
562                                  */
563                                 vlan = 0xffff;
564                 } else {
565                         vlan = wc->vlan_id;
566                 }
567
568                 tun_mad->hdr.sl_vid = cpu_to_be16(vlan);
569                 memcpy((char *)&tun_mad->hdr.mac_31_0, &(wc->smac[0]), 4);
570                 memcpy((char *)&tun_mad->hdr.slid_mac_47_32, &(wc->smac[4]), 2);
571         } else {
572                 tun_mad->hdr.sl_vid = cpu_to_be16(((u16)(wc->sl)) << 12);
573                 tun_mad->hdr.slid_mac_47_32 = cpu_to_be16(wc->slid);
574         }
575
576         ib_dma_sync_single_for_device(&dev->ib_dev,
577                                       tun_qp->tx_ring[tun_tx_ix].buf.map,
578                                       sizeof (struct mlx4_rcv_tunnel_mad),
579                                       DMA_TO_DEVICE);
580
581         list.addr = tun_qp->tx_ring[tun_tx_ix].buf.map;
582         list.length = sizeof (struct mlx4_rcv_tunnel_mad);
583         list.lkey = tun_ctx->mr->lkey;
584
585         wr.wr.ud.ah = ah;
586         wr.wr.ud.port_num = port;
587         wr.wr.ud.remote_qkey = IB_QP_SET_QKEY;
588         wr.wr.ud.remote_qpn = dqpn;
589         wr.next = NULL;
590         wr.wr_id = ((u64) tun_tx_ix) | MLX4_TUN_SET_WRID_QPN(dest_qpt);
591         wr.sg_list = &list;
592         wr.num_sge = 1;
593         wr.opcode = IB_WR_SEND;
594         wr.send_flags = IB_SEND_SIGNALED;
595
596         ret = ib_post_send(src_qp, &wr, &bad_wr);
597 out:
598         if (ret)
599                 ib_destroy_ah(ah);
600         return ret;
601 }
602
603 static int mlx4_ib_demux_mad(struct ib_device *ibdev, u8 port,
604                         struct ib_wc *wc, struct ib_grh *grh,
605                         struct ib_mad *mad)
606 {
607         struct mlx4_ib_dev *dev = to_mdev(ibdev);
608         int err;
609         int slave;
610         u8 *slave_id;
611         int is_eth = 0;
612
613         if (rdma_port_get_link_layer(ibdev, port) == IB_LINK_LAYER_INFINIBAND)
614                 is_eth = 0;
615         else
616                 is_eth = 1;
617
618         if (is_eth) {
619                 if (!(wc->wc_flags & IB_WC_GRH)) {
620                         mlx4_ib_warn(ibdev, "RoCE grh not present.\n");
621                         return -EINVAL;
622                 }
623                 if (mad->mad_hdr.mgmt_class != IB_MGMT_CLASS_CM) {
624                         mlx4_ib_warn(ibdev, "RoCE mgmt class is not CM\n");
625                         return -EINVAL;
626                 }
627                 if (mlx4_get_slave_from_roce_gid(dev->dev, port, grh->dgid.raw, &slave)) {
628                         mlx4_ib_warn(ibdev, "failed matching grh\n");
629                         return -ENOENT;
630                 }
631                 if (slave >= dev->dev->caps.sqp_demux) {
632                         mlx4_ib_warn(ibdev, "slave id: %d is bigger than allowed:%d\n",
633                                      slave, dev->dev->caps.sqp_demux);
634                         return -ENOENT;
635                 }
636
637                 if (mlx4_ib_demux_cm_handler(ibdev, port, NULL, mad))
638                         return 0;
639
640                 err = mlx4_ib_send_to_slave(dev, slave, port, wc->qp->qp_type, wc, grh, mad);
641                 if (err)
642                         pr_debug("failed sending to slave %d via tunnel qp (%d)\n",
643                                  slave, err);
644                 return 0;
645         }
646
647         /* Initially assume that this mad is for us */
648         slave = mlx4_master_func_num(dev->dev);
649
650         /* See if the slave id is encoded in a response mad */
651         if (mad->mad_hdr.method & 0x80) {
652                 slave_id = (u8 *) &mad->mad_hdr.tid;
653                 slave = *slave_id;
654                 if (slave != 255) /*255 indicates the dom0*/
655                         *slave_id = 0; /* remap tid */
656         }
657
658         /* If a grh is present, we demux according to it */
659         if (wc->wc_flags & IB_WC_GRH) {
660                 slave = mlx4_ib_find_real_gid(ibdev, port, grh->dgid.global.interface_id);
661                 if (slave < 0) {
662                         mlx4_ib_warn(ibdev, "failed matching grh\n");
663                         return -ENOENT;
664                 }
665         }
666         /* Class-specific handling */
667         switch (mad->mad_hdr.mgmt_class) {
668         case IB_MGMT_CLASS_SUBN_LID_ROUTED:
669         case IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE:
670                 /* 255 indicates the dom0 */
671                 if (slave != 255 && slave != mlx4_master_func_num(dev->dev)) {
672                         if (!mlx4_vf_smi_enabled(dev->dev, slave, port))
673                                 return -EPERM;
674                         /* for a VF. drop unsolicited MADs */
675                         if (!(mad->mad_hdr.method & IB_MGMT_METHOD_RESP)) {
676                                 mlx4_ib_warn(ibdev, "demux QP0. rejecting unsolicited mad for slave %d class 0x%x, method 0x%x\n",
677                                              slave, mad->mad_hdr.mgmt_class,
678                                              mad->mad_hdr.method);
679                                 return -EINVAL;
680                         }
681                 }
682                 break;
683         case IB_MGMT_CLASS_SUBN_ADM:
684                 if (mlx4_ib_demux_sa_handler(ibdev, port, slave,
685                                              (struct ib_sa_mad *) mad))
686                         return 0;
687                 break;
688         case IB_MGMT_CLASS_CM:
689                 if (mlx4_ib_demux_cm_handler(ibdev, port, &slave, mad))
690                         return 0;
691                 break;
692         case IB_MGMT_CLASS_DEVICE_MGMT:
693                 if (mad->mad_hdr.method != IB_MGMT_METHOD_GET_RESP)
694                         return 0;
695                 break;
696         default:
697                 /* Drop unsupported classes for slaves in tunnel mode */
698                 if (slave != mlx4_master_func_num(dev->dev)) {
699                         pr_debug("dropping unsupported ingress mad from class:%d "
700                                  "for slave:%d\n", mad->mad_hdr.mgmt_class, slave);
701                         return 0;
702                 }
703         }
704         /*make sure that no slave==255 was not handled yet.*/
705         if (slave >= dev->dev->caps.sqp_demux) {
706                 mlx4_ib_warn(ibdev, "slave id: %d is bigger than allowed:%d\n",
707                              slave, dev->dev->caps.sqp_demux);
708                 return -ENOENT;
709         }
710
711         err = mlx4_ib_send_to_slave(dev, slave, port, wc->qp->qp_type, wc, grh, mad);
712         if (err)
713                 pr_debug("failed sending to slave %d via tunnel qp (%d)\n",
714                          slave, err);
715         return 0;
716 }
717
718 static int ib_process_mad(struct ib_device *ibdev, int mad_flags, u8 port_num,
719                         const struct ib_wc *in_wc, const struct ib_grh *in_grh,
720                         const struct ib_mad *in_mad, struct ib_mad *out_mad)
721 {
722         u16 slid, prev_lid = 0;
723         int err;
724         struct ib_port_attr pattr;
725
726         if (in_wc && in_wc->qp->qp_num) {
727                 pr_debug("received MAD: slid:%d sqpn:%d "
728                         "dlid_bits:%d dqpn:%d wc_flags:0x%x, cls %x, mtd %x, atr %x\n",
729                         in_wc->slid, in_wc->src_qp,
730                         in_wc->dlid_path_bits,
731                         in_wc->qp->qp_num,
732                         in_wc->wc_flags,
733                         in_mad->mad_hdr.mgmt_class, in_mad->mad_hdr.method,
734                         be16_to_cpu(in_mad->mad_hdr.attr_id));
735                 if (in_wc->wc_flags & IB_WC_GRH) {
736                         pr_debug("sgid_hi:0x%016llx sgid_lo:0x%016llx\n",
737                                  be64_to_cpu(in_grh->sgid.global.subnet_prefix),
738                                  be64_to_cpu(in_grh->sgid.global.interface_id));
739                         pr_debug("dgid_hi:0x%016llx dgid_lo:0x%016llx\n",
740                                  be64_to_cpu(in_grh->dgid.global.subnet_prefix),
741                                  be64_to_cpu(in_grh->dgid.global.interface_id));
742                 }
743         }
744
745         slid = in_wc ? in_wc->slid : be16_to_cpu(IB_LID_PERMISSIVE);
746
747         if (in_mad->mad_hdr.method == IB_MGMT_METHOD_TRAP && slid == 0) {
748                 forward_trap(to_mdev(ibdev), port_num, in_mad);
749                 return IB_MAD_RESULT_SUCCESS | IB_MAD_RESULT_CONSUMED;
750         }
751
752         if (in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_LID_ROUTED ||
753             in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE) {
754                 if (in_mad->mad_hdr.method   != IB_MGMT_METHOD_GET &&
755                     in_mad->mad_hdr.method   != IB_MGMT_METHOD_SET &&
756                     in_mad->mad_hdr.method   != IB_MGMT_METHOD_TRAP_REPRESS)
757                         return IB_MAD_RESULT_SUCCESS;
758
759                 /*
760                  * Don't process SMInfo queries -- the SMA can't handle them.
761                  */
762                 if (in_mad->mad_hdr.attr_id == IB_SMP_ATTR_SM_INFO)
763                         return IB_MAD_RESULT_SUCCESS;
764         } else if (in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_PERF_MGMT ||
765                    in_mad->mad_hdr.mgmt_class == MLX4_IB_VENDOR_CLASS1   ||
766                    in_mad->mad_hdr.mgmt_class == MLX4_IB_VENDOR_CLASS2   ||
767                    in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_CONG_MGMT) {
768                 if (in_mad->mad_hdr.method  != IB_MGMT_METHOD_GET &&
769                     in_mad->mad_hdr.method  != IB_MGMT_METHOD_SET)
770                         return IB_MAD_RESULT_SUCCESS;
771         } else
772                 return IB_MAD_RESULT_SUCCESS;
773
774         if ((in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_LID_ROUTED ||
775              in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE) &&
776             in_mad->mad_hdr.method == IB_MGMT_METHOD_SET &&
777             in_mad->mad_hdr.attr_id == IB_SMP_ATTR_PORT_INFO &&
778             !ib_query_port(ibdev, port_num, &pattr))
779                 prev_lid = pattr.lid;
780
781         err = mlx4_MAD_IFC(to_mdev(ibdev),
782                            (mad_flags & IB_MAD_IGNORE_MKEY ? MLX4_MAD_IFC_IGNORE_MKEY : 0) |
783                            (mad_flags & IB_MAD_IGNORE_BKEY ? MLX4_MAD_IFC_IGNORE_BKEY : 0) |
784                            MLX4_MAD_IFC_NET_VIEW,
785                            port_num, in_wc, in_grh, in_mad, out_mad);
786         if (err)
787                 return IB_MAD_RESULT_FAILURE;
788
789         if (!out_mad->mad_hdr.status) {
790                 if (!(to_mdev(ibdev)->dev->caps.flags & MLX4_DEV_CAP_FLAG_PORT_MNG_CHG_EV))
791                         smp_snoop(ibdev, port_num, in_mad, prev_lid);
792                 /* slaves get node desc from FW */
793                 if (!mlx4_is_slave(to_mdev(ibdev)->dev))
794                         node_desc_override(ibdev, out_mad);
795         }
796
797         /* set return bit in status of directed route responses */
798         if (in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE)
799                 out_mad->mad_hdr.status |= cpu_to_be16(1 << 15);
800
801         if (in_mad->mad_hdr.method == IB_MGMT_METHOD_TRAP_REPRESS)
802                 /* no response for trap repress */
803                 return IB_MAD_RESULT_SUCCESS | IB_MAD_RESULT_CONSUMED;
804
805         return IB_MAD_RESULT_SUCCESS | IB_MAD_RESULT_REPLY;
806 }
807
808 static void edit_counter(struct mlx4_counter *cnt,
809                                         struct ib_pma_portcounters *pma_cnt)
810 {
811         ASSIGN_32BIT_COUNTER(pma_cnt->port_xmit_data,
812                              (be64_to_cpu(cnt->tx_bytes) >> 2));
813         ASSIGN_32BIT_COUNTER(pma_cnt->port_rcv_data,
814                              (be64_to_cpu(cnt->rx_bytes) >> 2));
815         ASSIGN_32BIT_COUNTER(pma_cnt->port_xmit_packets,
816                              be64_to_cpu(cnt->tx_frames));
817         ASSIGN_32BIT_COUNTER(pma_cnt->port_rcv_packets,
818                              be64_to_cpu(cnt->rx_frames));
819 }
820
821 static int iboe_process_mad(struct ib_device *ibdev, int mad_flags, u8 port_num,
822                         const struct ib_wc *in_wc, const struct ib_grh *in_grh,
823                         const struct ib_mad *in_mad, struct ib_mad *out_mad)
824 {
825         struct mlx4_counter counter_stats;
826         struct mlx4_ib_dev *dev = to_mdev(ibdev);
827         int err;
828
829         if (in_mad->mad_hdr.mgmt_class != IB_MGMT_CLASS_PERF_MGMT)
830                 return -EINVAL;
831
832         memset(&counter_stats, 0, sizeof(counter_stats));
833         err = mlx4_get_counter_stats(dev->dev,
834                                      dev->counters[port_num - 1].index,
835                                      &counter_stats, 0);
836         if (err)
837                 err = IB_MAD_RESULT_FAILURE;
838         else {
839                 memset(out_mad->data, 0, sizeof out_mad->data);
840                 switch (counter_stats.counter_mode & 0xf) {
841                 case 0:
842                         edit_counter(&counter_stats,
843                                      (void *)(out_mad->data + 40));
844                         err = IB_MAD_RESULT_SUCCESS | IB_MAD_RESULT_REPLY;
845                         break;
846                 default:
847                         err = IB_MAD_RESULT_FAILURE;
848                 }
849         }
850
851         return err;
852 }
853
854 int mlx4_ib_process_mad(struct ib_device *ibdev, int mad_flags, u8 port_num,
855                         const struct ib_wc *in_wc, const struct ib_grh *in_grh,
856                         const struct ib_mad_hdr *in, size_t in_mad_size,
857                         struct ib_mad_hdr *out, size_t *out_mad_size,
858                         u16 *out_mad_pkey_index)
859 {
860         struct mlx4_ib_dev *dev = to_mdev(ibdev);
861         const struct ib_mad *in_mad = (const struct ib_mad *)in;
862         struct ib_mad *out_mad = (struct ib_mad *)out;
863
864         BUG_ON(in_mad_size != sizeof(*in_mad) ||
865                *out_mad_size != sizeof(*out_mad));
866
867         switch (rdma_port_get_link_layer(ibdev, port_num)) {
868         case IB_LINK_LAYER_INFINIBAND:
869                 if (!mlx4_is_slave(dev->dev))
870                         return ib_process_mad(ibdev, mad_flags, port_num, in_wc,
871                                               in_grh, in_mad, out_mad);
872         case IB_LINK_LAYER_ETHERNET:
873                 return iboe_process_mad(ibdev, mad_flags, port_num, in_wc,
874                                           in_grh, in_mad, out_mad);
875         default:
876                 return -EINVAL;
877         }
878 }
879
880 static void send_handler(struct ib_mad_agent *agent,
881                          struct ib_mad_send_wc *mad_send_wc)
882 {
883         if (mad_send_wc->send_buf->context[0])
884                 ib_destroy_ah(mad_send_wc->send_buf->context[0]);
885         ib_free_send_mad(mad_send_wc->send_buf);
886 }
887
888 int mlx4_ib_mad_init(struct mlx4_ib_dev *dev)
889 {
890         struct ib_mad_agent *agent;
891         int p, q;
892         int ret;
893         enum rdma_link_layer ll;
894
895         for (p = 0; p < dev->num_ports; ++p) {
896                 ll = rdma_port_get_link_layer(&dev->ib_dev, p + 1);
897                 for (q = 0; q <= 1; ++q) {
898                         if (ll == IB_LINK_LAYER_INFINIBAND) {
899                                 agent = ib_register_mad_agent(&dev->ib_dev, p + 1,
900                                                               q ? IB_QPT_GSI : IB_QPT_SMI,
901                                                               NULL, 0, send_handler,
902                                                               NULL, NULL, 0);
903                                 if (IS_ERR(agent)) {
904                                         ret = PTR_ERR(agent);
905                                         goto err;
906                                 }
907                                 dev->send_agent[p][q] = agent;
908                         } else
909                                 dev->send_agent[p][q] = NULL;
910                 }
911         }
912
913         return 0;
914
915 err:
916         for (p = 0; p < dev->num_ports; ++p)
917                 for (q = 0; q <= 1; ++q)
918                         if (dev->send_agent[p][q])
919                                 ib_unregister_mad_agent(dev->send_agent[p][q]);
920
921         return ret;
922 }
923
924 void mlx4_ib_mad_cleanup(struct mlx4_ib_dev *dev)
925 {
926         struct ib_mad_agent *agent;
927         int p, q;
928
929         for (p = 0; p < dev->num_ports; ++p) {
930                 for (q = 0; q <= 1; ++q) {
931                         agent = dev->send_agent[p][q];
932                         if (agent) {
933                                 dev->send_agent[p][q] = NULL;
934                                 ib_unregister_mad_agent(agent);
935                         }
936                 }
937
938                 if (dev->sm_ah[p])
939                         ib_destroy_ah(dev->sm_ah[p]);
940         }
941 }
942
943 static void handle_lid_change_event(struct mlx4_ib_dev *dev, u8 port_num)
944 {
945         mlx4_ib_dispatch_event(dev, port_num, IB_EVENT_LID_CHANGE);
946
947         if (mlx4_is_master(dev->dev) && !dev->sriov.is_going_down)
948                 mlx4_gen_slaves_port_mgt_ev(dev->dev, port_num,
949                                             MLX4_EQ_PORT_INFO_LID_CHANGE_MASK);
950 }
951
952 static void handle_client_rereg_event(struct mlx4_ib_dev *dev, u8 port_num)
953 {
954         /* re-configure the alias-guid and mcg's */
955         if (mlx4_is_master(dev->dev)) {
956                 mlx4_ib_invalidate_all_guid_record(dev, port_num);
957
958                 if (!dev->sriov.is_going_down) {
959                         mlx4_ib_mcg_port_cleanup(&dev->sriov.demux[port_num - 1], 0);
960                         mlx4_gen_slaves_port_mgt_ev(dev->dev, port_num,
961                                                     MLX4_EQ_PORT_INFO_CLIENT_REREG_MASK);
962                 }
963         }
964         mlx4_ib_dispatch_event(dev, port_num, IB_EVENT_CLIENT_REREGISTER);
965 }
966
967 static void propagate_pkey_ev(struct mlx4_ib_dev *dev, int port_num,
968                               struct mlx4_eqe *eqe)
969 {
970         __propagate_pkey_ev(dev, port_num, GET_BLK_PTR_FROM_EQE(eqe),
971                             GET_MASK_FROM_EQE(eqe));
972 }
973
974 static void handle_slaves_guid_change(struct mlx4_ib_dev *dev, u8 port_num,
975                                       u32 guid_tbl_blk_num, u32 change_bitmap)
976 {
977         struct ib_smp *in_mad  = NULL;
978         struct ib_smp *out_mad  = NULL;
979         u16 i;
980
981         if (!mlx4_is_mfunc(dev->dev) || !mlx4_is_master(dev->dev))
982                 return;
983
984         in_mad  = kmalloc(sizeof *in_mad, GFP_KERNEL);
985         out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
986         if (!in_mad || !out_mad) {
987                 mlx4_ib_warn(&dev->ib_dev, "failed to allocate memory for guid info mads\n");
988                 goto out;
989         }
990
991         guid_tbl_blk_num  *= 4;
992
993         for (i = 0; i < 4; i++) {
994                 if (change_bitmap && (!((change_bitmap >> (8 * i)) & 0xff)))
995                         continue;
996                 memset(in_mad, 0, sizeof *in_mad);
997                 memset(out_mad, 0, sizeof *out_mad);
998
999                 in_mad->base_version  = 1;
1000                 in_mad->mgmt_class    = IB_MGMT_CLASS_SUBN_LID_ROUTED;
1001                 in_mad->class_version = 1;
1002                 in_mad->method        = IB_MGMT_METHOD_GET;
1003                 in_mad->attr_id       = IB_SMP_ATTR_GUID_INFO;
1004                 in_mad->attr_mod      = cpu_to_be32(guid_tbl_blk_num + i);
1005
1006                 if (mlx4_MAD_IFC(dev,
1007                                  MLX4_MAD_IFC_IGNORE_KEYS | MLX4_MAD_IFC_NET_VIEW,
1008                                  port_num, NULL, NULL, in_mad, out_mad)) {
1009                         mlx4_ib_warn(&dev->ib_dev, "Failed in get GUID INFO MAD_IFC\n");
1010                         goto out;
1011                 }
1012
1013                 mlx4_ib_update_cache_on_guid_change(dev, guid_tbl_blk_num + i,
1014                                                     port_num,
1015                                                     (u8 *)(&((struct ib_smp *)out_mad)->data));
1016                 mlx4_ib_notify_slaves_on_guid_change(dev, guid_tbl_blk_num + i,
1017                                                      port_num,
1018                                                      (u8 *)(&((struct ib_smp *)out_mad)->data));
1019         }
1020
1021 out:
1022         kfree(in_mad);
1023         kfree(out_mad);
1024         return;
1025 }
1026
1027 void handle_port_mgmt_change_event(struct work_struct *work)
1028 {
1029         struct ib_event_work *ew = container_of(work, struct ib_event_work, work);
1030         struct mlx4_ib_dev *dev = ew->ib_dev;
1031         struct mlx4_eqe *eqe = &(ew->ib_eqe);
1032         u8 port = eqe->event.port_mgmt_change.port;
1033         u32 changed_attr;
1034         u32 tbl_block;
1035         u32 change_bitmap;
1036
1037         switch (eqe->subtype) {
1038         case MLX4_DEV_PMC_SUBTYPE_PORT_INFO:
1039                 changed_attr = be32_to_cpu(eqe->event.port_mgmt_change.params.port_info.changed_attr);
1040
1041                 /* Update the SM ah - This should be done before handling
1042                    the other changed attributes so that MADs can be sent to the SM */
1043                 if (changed_attr & MSTR_SM_CHANGE_MASK) {
1044                         u16 lid = be16_to_cpu(eqe->event.port_mgmt_change.params.port_info.mstr_sm_lid);
1045                         u8 sl = eqe->event.port_mgmt_change.params.port_info.mstr_sm_sl & 0xf;
1046                         update_sm_ah(dev, port, lid, sl);
1047                 }
1048
1049                 /* Check if it is a lid change event */
1050                 if (changed_attr & MLX4_EQ_PORT_INFO_LID_CHANGE_MASK)
1051                         handle_lid_change_event(dev, port);
1052
1053                 /* Generate GUID changed event */
1054                 if (changed_attr & MLX4_EQ_PORT_INFO_GID_PFX_CHANGE_MASK) {
1055                         mlx4_ib_dispatch_event(dev, port, IB_EVENT_GID_CHANGE);
1056                         /*if master, notify all slaves*/
1057                         if (mlx4_is_master(dev->dev))
1058                                 mlx4_gen_slaves_port_mgt_ev(dev->dev, port,
1059                                                             MLX4_EQ_PORT_INFO_GID_PFX_CHANGE_MASK);
1060                 }
1061
1062                 if (changed_attr & MLX4_EQ_PORT_INFO_CLIENT_REREG_MASK)
1063                         handle_client_rereg_event(dev, port);
1064                 break;
1065
1066         case MLX4_DEV_PMC_SUBTYPE_PKEY_TABLE:
1067                 mlx4_ib_dispatch_event(dev, port, IB_EVENT_PKEY_CHANGE);
1068                 if (mlx4_is_master(dev->dev) && !dev->sriov.is_going_down)
1069                         propagate_pkey_ev(dev, port, eqe);
1070                 break;
1071         case MLX4_DEV_PMC_SUBTYPE_GUID_INFO:
1072                 /* paravirtualized master's guid is guid 0 -- does not change */
1073                 if (!mlx4_is_master(dev->dev))
1074                         mlx4_ib_dispatch_event(dev, port, IB_EVENT_GID_CHANGE);
1075                 /*if master, notify relevant slaves*/
1076                 else if (!dev->sriov.is_going_down) {
1077                         tbl_block = GET_BLK_PTR_FROM_EQE(eqe);
1078                         change_bitmap = GET_MASK_FROM_EQE(eqe);
1079                         handle_slaves_guid_change(dev, port, tbl_block, change_bitmap);
1080                 }
1081                 break;
1082         default:
1083                 pr_warn("Unsupported subtype 0x%x for "
1084                         "Port Management Change event\n", eqe->subtype);
1085         }
1086
1087         kfree(ew);
1088 }
1089
1090 void mlx4_ib_dispatch_event(struct mlx4_ib_dev *dev, u8 port_num,
1091                             enum ib_event_type type)
1092 {
1093         struct ib_event event;
1094
1095         event.device            = &dev->ib_dev;
1096         event.element.port_num  = port_num;
1097         event.event             = type;
1098
1099         ib_dispatch_event(&event);
1100 }
1101
1102 static void mlx4_ib_tunnel_comp_handler(struct ib_cq *cq, void *arg)
1103 {
1104         unsigned long flags;
1105         struct mlx4_ib_demux_pv_ctx *ctx = cq->cq_context;
1106         struct mlx4_ib_dev *dev = to_mdev(ctx->ib_dev);
1107         spin_lock_irqsave(&dev->sriov.going_down_lock, flags);
1108         if (!dev->sriov.is_going_down && ctx->state == DEMUX_PV_STATE_ACTIVE)
1109                 queue_work(ctx->wq, &ctx->work);
1110         spin_unlock_irqrestore(&dev->sriov.going_down_lock, flags);
1111 }
1112
1113 static int mlx4_ib_post_pv_qp_buf(struct mlx4_ib_demux_pv_ctx *ctx,
1114                                   struct mlx4_ib_demux_pv_qp *tun_qp,
1115                                   int index)
1116 {
1117         struct ib_sge sg_list;
1118         struct ib_recv_wr recv_wr, *bad_recv_wr;
1119         int size;
1120
1121         size = (tun_qp->qp->qp_type == IB_QPT_UD) ?
1122                 sizeof (struct mlx4_tunnel_mad) : sizeof (struct mlx4_mad_rcv_buf);
1123
1124         sg_list.addr = tun_qp->ring[index].map;
1125         sg_list.length = size;
1126         sg_list.lkey = ctx->mr->lkey;
1127
1128         recv_wr.next = NULL;
1129         recv_wr.sg_list = &sg_list;
1130         recv_wr.num_sge = 1;
1131         recv_wr.wr_id = (u64) index | MLX4_TUN_WRID_RECV |
1132                 MLX4_TUN_SET_WRID_QPN(tun_qp->proxy_qpt);
1133         ib_dma_sync_single_for_device(ctx->ib_dev, tun_qp->ring[index].map,
1134                                       size, DMA_FROM_DEVICE);
1135         return ib_post_recv(tun_qp->qp, &recv_wr, &bad_recv_wr);
1136 }
1137
1138 static int mlx4_ib_multiplex_sa_handler(struct ib_device *ibdev, int port,
1139                 int slave, struct ib_sa_mad *sa_mad)
1140 {
1141         int ret = 0;
1142
1143         /* dispatch to different sa handlers */
1144         switch (be16_to_cpu(sa_mad->mad_hdr.attr_id)) {
1145         case IB_SA_ATTR_MC_MEMBER_REC:
1146                 ret = mlx4_ib_mcg_multiplex_handler(ibdev, port, slave, sa_mad);
1147                 break;
1148         default:
1149                 break;
1150         }
1151         return ret;
1152 }
1153
1154 static int is_proxy_qp0(struct mlx4_ib_dev *dev, int qpn, int slave)
1155 {
1156         int proxy_start = dev->dev->phys_caps.base_proxy_sqpn + 8 * slave;
1157
1158         return (qpn >= proxy_start && qpn <= proxy_start + 1);
1159 }
1160
1161
1162 int mlx4_ib_send_to_wire(struct mlx4_ib_dev *dev, int slave, u8 port,
1163                          enum ib_qp_type dest_qpt, u16 pkey_index,
1164                          u32 remote_qpn, u32 qkey, struct ib_ah_attr *attr,
1165                          u8 *s_mac, struct ib_mad *mad)
1166 {
1167         struct ib_sge list;
1168         struct ib_send_wr wr, *bad_wr;
1169         struct mlx4_ib_demux_pv_ctx *sqp_ctx;
1170         struct mlx4_ib_demux_pv_qp *sqp;
1171         struct mlx4_mad_snd_buf *sqp_mad;
1172         struct ib_ah *ah;
1173         struct ib_qp *send_qp = NULL;
1174         unsigned wire_tx_ix = 0;
1175         int ret = 0;
1176         u16 wire_pkey_ix;
1177         int src_qpnum;
1178         u8 sgid_index;
1179
1180
1181         sqp_ctx = dev->sriov.sqps[port-1];
1182
1183         /* check if proxy qp created */
1184         if (!sqp_ctx || sqp_ctx->state != DEMUX_PV_STATE_ACTIVE)
1185                 return -EAGAIN;
1186
1187         if (dest_qpt == IB_QPT_SMI) {
1188                 src_qpnum = 0;
1189                 sqp = &sqp_ctx->qp[0];
1190                 wire_pkey_ix = dev->pkeys.virt2phys_pkey[slave][port - 1][0];
1191         } else {
1192                 src_qpnum = 1;
1193                 sqp = &sqp_ctx->qp[1];
1194                 wire_pkey_ix = dev->pkeys.virt2phys_pkey[slave][port - 1][pkey_index];
1195         }
1196
1197         send_qp = sqp->qp;
1198
1199         /* create ah */
1200         sgid_index = attr->grh.sgid_index;
1201         attr->grh.sgid_index = 0;
1202         ah = ib_create_ah(sqp_ctx->pd, attr);
1203         if (IS_ERR(ah))
1204                 return -ENOMEM;
1205         attr->grh.sgid_index = sgid_index;
1206         to_mah(ah)->av.ib.gid_index = sgid_index;
1207         /* get rid of force-loopback bit */
1208         to_mah(ah)->av.ib.port_pd &= cpu_to_be32(0x7FFFFFFF);
1209         spin_lock(&sqp->tx_lock);
1210         if (sqp->tx_ix_head - sqp->tx_ix_tail >=
1211             (MLX4_NUM_TUNNEL_BUFS - 1))
1212                 ret = -EAGAIN;
1213         else
1214                 wire_tx_ix = (++sqp->tx_ix_head) & (MLX4_NUM_TUNNEL_BUFS - 1);
1215         spin_unlock(&sqp->tx_lock);
1216         if (ret)
1217                 goto out;
1218
1219         sqp_mad = (struct mlx4_mad_snd_buf *) (sqp->tx_ring[wire_tx_ix].buf.addr);
1220         if (sqp->tx_ring[wire_tx_ix].ah)
1221                 ib_destroy_ah(sqp->tx_ring[wire_tx_ix].ah);
1222         sqp->tx_ring[wire_tx_ix].ah = ah;
1223         ib_dma_sync_single_for_cpu(&dev->ib_dev,
1224                                    sqp->tx_ring[wire_tx_ix].buf.map,
1225                                    sizeof (struct mlx4_mad_snd_buf),
1226                                    DMA_TO_DEVICE);
1227
1228         memcpy(&sqp_mad->payload, mad, sizeof *mad);
1229
1230         ib_dma_sync_single_for_device(&dev->ib_dev,
1231                                       sqp->tx_ring[wire_tx_ix].buf.map,
1232                                       sizeof (struct mlx4_mad_snd_buf),
1233                                       DMA_TO_DEVICE);
1234
1235         list.addr = sqp->tx_ring[wire_tx_ix].buf.map;
1236         list.length = sizeof (struct mlx4_mad_snd_buf);
1237         list.lkey = sqp_ctx->mr->lkey;
1238
1239         wr.wr.ud.ah = ah;
1240         wr.wr.ud.port_num = port;
1241         wr.wr.ud.pkey_index = wire_pkey_ix;
1242         wr.wr.ud.remote_qkey = qkey;
1243         wr.wr.ud.remote_qpn = remote_qpn;
1244         wr.next = NULL;
1245         wr.wr_id = ((u64) wire_tx_ix) | MLX4_TUN_SET_WRID_QPN(src_qpnum);
1246         wr.sg_list = &list;
1247         wr.num_sge = 1;
1248         wr.opcode = IB_WR_SEND;
1249         wr.send_flags = IB_SEND_SIGNALED;
1250         if (s_mac)
1251                 memcpy(to_mah(ah)->av.eth.s_mac, s_mac, 6);
1252
1253
1254         ret = ib_post_send(send_qp, &wr, &bad_wr);
1255 out:
1256         if (ret)
1257                 ib_destroy_ah(ah);
1258         return ret;
1259 }
1260
1261 static int get_slave_base_gid_ix(struct mlx4_ib_dev *dev, int slave, int port)
1262 {
1263         if (rdma_port_get_link_layer(&dev->ib_dev, port) == IB_LINK_LAYER_INFINIBAND)
1264                 return slave;
1265         return mlx4_get_base_gid_ix(dev->dev, slave, port);
1266 }
1267
1268 static void fill_in_real_sgid_index(struct mlx4_ib_dev *dev, int slave, int port,
1269                                     struct ib_ah_attr *ah_attr)
1270 {
1271         if (rdma_port_get_link_layer(&dev->ib_dev, port) == IB_LINK_LAYER_INFINIBAND)
1272                 ah_attr->grh.sgid_index = slave;
1273         else
1274                 ah_attr->grh.sgid_index += get_slave_base_gid_ix(dev, slave, port);
1275 }
1276
1277 static void mlx4_ib_multiplex_mad(struct mlx4_ib_demux_pv_ctx *ctx, struct ib_wc *wc)
1278 {
1279         struct mlx4_ib_dev *dev = to_mdev(ctx->ib_dev);
1280         struct mlx4_ib_demux_pv_qp *tun_qp = &ctx->qp[MLX4_TUN_WRID_QPN(wc->wr_id)];
1281         int wr_ix = wc->wr_id & (MLX4_NUM_TUNNEL_BUFS - 1);
1282         struct mlx4_tunnel_mad *tunnel = tun_qp->ring[wr_ix].addr;
1283         struct mlx4_ib_ah ah;
1284         struct ib_ah_attr ah_attr;
1285         u8 *slave_id;
1286         int slave;
1287         int port;
1288
1289         /* Get slave that sent this packet */
1290         if (wc->src_qp < dev->dev->phys_caps.base_proxy_sqpn ||
1291             wc->src_qp >= dev->dev->phys_caps.base_proxy_sqpn + 8 * MLX4_MFUNC_MAX ||
1292             (wc->src_qp & 0x1) != ctx->port - 1 ||
1293             wc->src_qp & 0x4) {
1294                 mlx4_ib_warn(ctx->ib_dev, "can't multiplex bad sqp:%d\n", wc->src_qp);
1295                 return;
1296         }
1297         slave = ((wc->src_qp & ~0x7) - dev->dev->phys_caps.base_proxy_sqpn) / 8;
1298         if (slave != ctx->slave) {
1299                 mlx4_ib_warn(ctx->ib_dev, "can't multiplex bad sqp:%d: "
1300                              "belongs to another slave\n", wc->src_qp);
1301                 return;
1302         }
1303
1304         /* Map transaction ID */
1305         ib_dma_sync_single_for_cpu(ctx->ib_dev, tun_qp->ring[wr_ix].map,
1306                                    sizeof (struct mlx4_tunnel_mad),
1307                                    DMA_FROM_DEVICE);
1308         switch (tunnel->mad.mad_hdr.method) {
1309         case IB_MGMT_METHOD_SET:
1310         case IB_MGMT_METHOD_GET:
1311         case IB_MGMT_METHOD_REPORT:
1312         case IB_SA_METHOD_GET_TABLE:
1313         case IB_SA_METHOD_DELETE:
1314         case IB_SA_METHOD_GET_MULTI:
1315         case IB_SA_METHOD_GET_TRACE_TBL:
1316                 slave_id = (u8 *) &tunnel->mad.mad_hdr.tid;
1317                 if (*slave_id) {
1318                         mlx4_ib_warn(ctx->ib_dev, "egress mad has non-null tid msb:%d "
1319                                      "class:%d slave:%d\n", *slave_id,
1320                                      tunnel->mad.mad_hdr.mgmt_class, slave);
1321                         return;
1322                 } else
1323                         *slave_id = slave;
1324         default:
1325                 /* nothing */;
1326         }
1327
1328         /* Class-specific handling */
1329         switch (tunnel->mad.mad_hdr.mgmt_class) {
1330         case IB_MGMT_CLASS_SUBN_LID_ROUTED:
1331         case IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE:
1332                 if (slave != mlx4_master_func_num(dev->dev) &&
1333                     !mlx4_vf_smi_enabled(dev->dev, slave, ctx->port))
1334                         return;
1335                 break;
1336         case IB_MGMT_CLASS_SUBN_ADM:
1337                 if (mlx4_ib_multiplex_sa_handler(ctx->ib_dev, ctx->port, slave,
1338                               (struct ib_sa_mad *) &tunnel->mad))
1339                         return;
1340                 break;
1341         case IB_MGMT_CLASS_CM:
1342                 if (mlx4_ib_multiplex_cm_handler(ctx->ib_dev, ctx->port, slave,
1343                               (struct ib_mad *) &tunnel->mad))
1344                         return;
1345                 break;
1346         case IB_MGMT_CLASS_DEVICE_MGMT:
1347                 if (tunnel->mad.mad_hdr.method != IB_MGMT_METHOD_GET &&
1348                     tunnel->mad.mad_hdr.method != IB_MGMT_METHOD_SET)
1349                         return;
1350                 break;
1351         default:
1352                 /* Drop unsupported classes for slaves in tunnel mode */
1353                 if (slave != mlx4_master_func_num(dev->dev)) {
1354                         mlx4_ib_warn(ctx->ib_dev, "dropping unsupported egress mad from class:%d "
1355                                      "for slave:%d\n", tunnel->mad.mad_hdr.mgmt_class, slave);
1356                         return;
1357                 }
1358         }
1359
1360         /* We are using standard ib_core services to send the mad, so generate a
1361          * stadard address handle by decoding the tunnelled mlx4_ah fields */
1362         memcpy(&ah.av, &tunnel->hdr.av, sizeof (struct mlx4_av));
1363         ah.ibah.device = ctx->ib_dev;
1364
1365         port = be32_to_cpu(ah.av.ib.port_pd) >> 24;
1366         port = mlx4_slave_convert_port(dev->dev, slave, port);
1367         if (port < 0)
1368                 return;
1369         ah.av.ib.port_pd = cpu_to_be32(port << 24 | (be32_to_cpu(ah.av.ib.port_pd) & 0xffffff));
1370
1371         mlx4_ib_query_ah(&ah.ibah, &ah_attr);
1372         if (ah_attr.ah_flags & IB_AH_GRH)
1373                 fill_in_real_sgid_index(dev, slave, ctx->port, &ah_attr);
1374
1375         memcpy(ah_attr.dmac, tunnel->hdr.mac, 6);
1376         ah_attr.vlan_id = be16_to_cpu(tunnel->hdr.vlan);
1377         /* if slave have default vlan use it */
1378         mlx4_get_slave_default_vlan(dev->dev, ctx->port, slave,
1379                                     &ah_attr.vlan_id, &ah_attr.sl);
1380
1381         mlx4_ib_send_to_wire(dev, slave, ctx->port,
1382                              is_proxy_qp0(dev, wc->src_qp, slave) ?
1383                              IB_QPT_SMI : IB_QPT_GSI,
1384                              be16_to_cpu(tunnel->hdr.pkey_index),
1385                              be32_to_cpu(tunnel->hdr.remote_qpn),
1386                              be32_to_cpu(tunnel->hdr.qkey),
1387                              &ah_attr, wc->smac, &tunnel->mad);
1388 }
1389
1390 static int mlx4_ib_alloc_pv_bufs(struct mlx4_ib_demux_pv_ctx *ctx,
1391                                  enum ib_qp_type qp_type, int is_tun)
1392 {
1393         int i;
1394         struct mlx4_ib_demux_pv_qp *tun_qp;
1395         int rx_buf_size, tx_buf_size;
1396
1397         if (qp_type > IB_QPT_GSI)
1398                 return -EINVAL;
1399
1400         tun_qp = &ctx->qp[qp_type];
1401
1402         tun_qp->ring = kzalloc(sizeof (struct mlx4_ib_buf) * MLX4_NUM_TUNNEL_BUFS,
1403                                GFP_KERNEL);
1404         if (!tun_qp->ring)
1405                 return -ENOMEM;
1406
1407         tun_qp->tx_ring = kcalloc(MLX4_NUM_TUNNEL_BUFS,
1408                                   sizeof (struct mlx4_ib_tun_tx_buf),
1409                                   GFP_KERNEL);
1410         if (!tun_qp->tx_ring) {
1411                 kfree(tun_qp->ring);
1412                 tun_qp->ring = NULL;
1413                 return -ENOMEM;
1414         }
1415
1416         if (is_tun) {
1417                 rx_buf_size = sizeof (struct mlx4_tunnel_mad);
1418                 tx_buf_size = sizeof (struct mlx4_rcv_tunnel_mad);
1419         } else {
1420                 rx_buf_size = sizeof (struct mlx4_mad_rcv_buf);
1421                 tx_buf_size = sizeof (struct mlx4_mad_snd_buf);
1422         }
1423
1424         for (i = 0; i < MLX4_NUM_TUNNEL_BUFS; i++) {
1425                 tun_qp->ring[i].addr = kmalloc(rx_buf_size, GFP_KERNEL);
1426                 if (!tun_qp->ring[i].addr)
1427                         goto err;
1428                 tun_qp->ring[i].map = ib_dma_map_single(ctx->ib_dev,
1429                                                         tun_qp->ring[i].addr,
1430                                                         rx_buf_size,
1431                                                         DMA_FROM_DEVICE);
1432                 if (ib_dma_mapping_error(ctx->ib_dev, tun_qp->ring[i].map)) {
1433                         kfree(tun_qp->ring[i].addr);
1434                         goto err;
1435                 }
1436         }
1437
1438         for (i = 0; i < MLX4_NUM_TUNNEL_BUFS; i++) {
1439                 tun_qp->tx_ring[i].buf.addr =
1440                         kmalloc(tx_buf_size, GFP_KERNEL);
1441                 if (!tun_qp->tx_ring[i].buf.addr)
1442                         goto tx_err;
1443                 tun_qp->tx_ring[i].buf.map =
1444                         ib_dma_map_single(ctx->ib_dev,
1445                                           tun_qp->tx_ring[i].buf.addr,
1446                                           tx_buf_size,
1447                                           DMA_TO_DEVICE);
1448                 if (ib_dma_mapping_error(ctx->ib_dev,
1449                                          tun_qp->tx_ring[i].buf.map)) {
1450                         kfree(tun_qp->tx_ring[i].buf.addr);
1451                         goto tx_err;
1452                 }
1453                 tun_qp->tx_ring[i].ah = NULL;
1454         }
1455         spin_lock_init(&tun_qp->tx_lock);
1456         tun_qp->tx_ix_head = 0;
1457         tun_qp->tx_ix_tail = 0;
1458         tun_qp->proxy_qpt = qp_type;
1459
1460         return 0;
1461
1462 tx_err:
1463         while (i > 0) {
1464                 --i;
1465                 ib_dma_unmap_single(ctx->ib_dev, tun_qp->tx_ring[i].buf.map,
1466                                     tx_buf_size, DMA_TO_DEVICE);
1467                 kfree(tun_qp->tx_ring[i].buf.addr);
1468         }
1469         kfree(tun_qp->tx_ring);
1470         tun_qp->tx_ring = NULL;
1471         i = MLX4_NUM_TUNNEL_BUFS;
1472 err:
1473         while (i > 0) {
1474                 --i;
1475                 ib_dma_unmap_single(ctx->ib_dev, tun_qp->ring[i].map,
1476                                     rx_buf_size, DMA_FROM_DEVICE);
1477                 kfree(tun_qp->ring[i].addr);
1478         }
1479         kfree(tun_qp->ring);
1480         tun_qp->ring = NULL;
1481         return -ENOMEM;
1482 }
1483
1484 static void mlx4_ib_free_pv_qp_bufs(struct mlx4_ib_demux_pv_ctx *ctx,
1485                                      enum ib_qp_type qp_type, int is_tun)
1486 {
1487         int i;
1488         struct mlx4_ib_demux_pv_qp *tun_qp;
1489         int rx_buf_size, tx_buf_size;
1490
1491         if (qp_type > IB_QPT_GSI)
1492                 return;
1493
1494         tun_qp = &ctx->qp[qp_type];
1495         if (is_tun) {
1496                 rx_buf_size = sizeof (struct mlx4_tunnel_mad);
1497                 tx_buf_size = sizeof (struct mlx4_rcv_tunnel_mad);
1498         } else {
1499                 rx_buf_size = sizeof (struct mlx4_mad_rcv_buf);
1500                 tx_buf_size = sizeof (struct mlx4_mad_snd_buf);
1501         }
1502
1503
1504         for (i = 0; i < MLX4_NUM_TUNNEL_BUFS; i++) {
1505                 ib_dma_unmap_single(ctx->ib_dev, tun_qp->ring[i].map,
1506                                     rx_buf_size, DMA_FROM_DEVICE);
1507                 kfree(tun_qp->ring[i].addr);
1508         }
1509
1510         for (i = 0; i < MLX4_NUM_TUNNEL_BUFS; i++) {
1511                 ib_dma_unmap_single(ctx->ib_dev, tun_qp->tx_ring[i].buf.map,
1512                                     tx_buf_size, DMA_TO_DEVICE);
1513                 kfree(tun_qp->tx_ring[i].buf.addr);
1514                 if (tun_qp->tx_ring[i].ah)
1515                         ib_destroy_ah(tun_qp->tx_ring[i].ah);
1516         }
1517         kfree(tun_qp->tx_ring);
1518         kfree(tun_qp->ring);
1519 }
1520
1521 static void mlx4_ib_tunnel_comp_worker(struct work_struct *work)
1522 {
1523         struct mlx4_ib_demux_pv_ctx *ctx;
1524         struct mlx4_ib_demux_pv_qp *tun_qp;
1525         struct ib_wc wc;
1526         int ret;
1527         ctx = container_of(work, struct mlx4_ib_demux_pv_ctx, work);
1528         ib_req_notify_cq(ctx->cq, IB_CQ_NEXT_COMP);
1529
1530         while (ib_poll_cq(ctx->cq, 1, &wc) == 1) {
1531                 tun_qp = &ctx->qp[MLX4_TUN_WRID_QPN(wc.wr_id)];
1532                 if (wc.status == IB_WC_SUCCESS) {
1533                         switch (wc.opcode) {
1534                         case IB_WC_RECV:
1535                                 mlx4_ib_multiplex_mad(ctx, &wc);
1536                                 ret = mlx4_ib_post_pv_qp_buf(ctx, tun_qp,
1537                                                              wc.wr_id &
1538                                                              (MLX4_NUM_TUNNEL_BUFS - 1));
1539                                 if (ret)
1540                                         pr_err("Failed reposting tunnel "
1541                                                "buf:%lld\n", wc.wr_id);
1542                                 break;
1543                         case IB_WC_SEND:
1544                                 pr_debug("received tunnel send completion:"
1545                                          "wrid=0x%llx, status=0x%x\n",
1546                                          wc.wr_id, wc.status);
1547                                 ib_destroy_ah(tun_qp->tx_ring[wc.wr_id &
1548                                               (MLX4_NUM_TUNNEL_BUFS - 1)].ah);
1549                                 tun_qp->tx_ring[wc.wr_id & (MLX4_NUM_TUNNEL_BUFS - 1)].ah
1550                                         = NULL;
1551                                 spin_lock(&tun_qp->tx_lock);
1552                                 tun_qp->tx_ix_tail++;
1553                                 spin_unlock(&tun_qp->tx_lock);
1554
1555                                 break;
1556                         default:
1557                                 break;
1558                         }
1559                 } else  {
1560                         pr_debug("mlx4_ib: completion error in tunnel: %d."
1561                                  " status = %d, wrid = 0x%llx\n",
1562                                  ctx->slave, wc.status, wc.wr_id);
1563                         if (!MLX4_TUN_IS_RECV(wc.wr_id)) {
1564                                 ib_destroy_ah(tun_qp->tx_ring[wc.wr_id &
1565                                               (MLX4_NUM_TUNNEL_BUFS - 1)].ah);
1566                                 tun_qp->tx_ring[wc.wr_id & (MLX4_NUM_TUNNEL_BUFS - 1)].ah
1567                                         = NULL;
1568                                 spin_lock(&tun_qp->tx_lock);
1569                                 tun_qp->tx_ix_tail++;
1570                                 spin_unlock(&tun_qp->tx_lock);
1571                         }
1572                 }
1573         }
1574 }
1575
1576 static void pv_qp_event_handler(struct ib_event *event, void *qp_context)
1577 {
1578         struct mlx4_ib_demux_pv_ctx *sqp = qp_context;
1579
1580         /* It's worse than that! He's dead, Jim! */
1581         pr_err("Fatal error (%d) on a MAD QP on port %d\n",
1582                event->event, sqp->port);
1583 }
1584
1585 static int create_pv_sqp(struct mlx4_ib_demux_pv_ctx *ctx,
1586                             enum ib_qp_type qp_type, int create_tun)
1587 {
1588         int i, ret;
1589         struct mlx4_ib_demux_pv_qp *tun_qp;
1590         struct mlx4_ib_qp_tunnel_init_attr qp_init_attr;
1591         struct ib_qp_attr attr;
1592         int qp_attr_mask_INIT;
1593
1594         if (qp_type > IB_QPT_GSI)
1595                 return -EINVAL;
1596
1597         tun_qp = &ctx->qp[qp_type];
1598
1599         memset(&qp_init_attr, 0, sizeof qp_init_attr);
1600         qp_init_attr.init_attr.send_cq = ctx->cq;
1601         qp_init_attr.init_attr.recv_cq = ctx->cq;
1602         qp_init_attr.init_attr.sq_sig_type = IB_SIGNAL_ALL_WR;
1603         qp_init_attr.init_attr.cap.max_send_wr = MLX4_NUM_TUNNEL_BUFS;
1604         qp_init_attr.init_attr.cap.max_recv_wr = MLX4_NUM_TUNNEL_BUFS;
1605         qp_init_attr.init_attr.cap.max_send_sge = 1;
1606         qp_init_attr.init_attr.cap.max_recv_sge = 1;
1607         if (create_tun) {
1608                 qp_init_attr.init_attr.qp_type = IB_QPT_UD;
1609                 qp_init_attr.init_attr.create_flags = MLX4_IB_SRIOV_TUNNEL_QP;
1610                 qp_init_attr.port = ctx->port;
1611                 qp_init_attr.slave = ctx->slave;
1612                 qp_init_attr.proxy_qp_type = qp_type;
1613                 qp_attr_mask_INIT = IB_QP_STATE | IB_QP_PKEY_INDEX |
1614                            IB_QP_QKEY | IB_QP_PORT;
1615         } else {
1616                 qp_init_attr.init_attr.qp_type = qp_type;
1617                 qp_init_attr.init_attr.create_flags = MLX4_IB_SRIOV_SQP;
1618                 qp_attr_mask_INIT = IB_QP_STATE | IB_QP_PKEY_INDEX | IB_QP_QKEY;
1619         }
1620         qp_init_attr.init_attr.port_num = ctx->port;
1621         qp_init_attr.init_attr.qp_context = ctx;
1622         qp_init_attr.init_attr.event_handler = pv_qp_event_handler;
1623         tun_qp->qp = ib_create_qp(ctx->pd, &qp_init_attr.init_attr);
1624         if (IS_ERR(tun_qp->qp)) {
1625                 ret = PTR_ERR(tun_qp->qp);
1626                 tun_qp->qp = NULL;
1627                 pr_err("Couldn't create %s QP (%d)\n",
1628                        create_tun ? "tunnel" : "special", ret);
1629                 return ret;
1630         }
1631
1632         memset(&attr, 0, sizeof attr);
1633         attr.qp_state = IB_QPS_INIT;
1634         ret = 0;
1635         if (create_tun)
1636                 ret = find_slave_port_pkey_ix(to_mdev(ctx->ib_dev), ctx->slave,
1637                                               ctx->port, IB_DEFAULT_PKEY_FULL,
1638                                               &attr.pkey_index);
1639         if (ret || !create_tun)
1640                 attr.pkey_index =
1641                         to_mdev(ctx->ib_dev)->pkeys.virt2phys_pkey[ctx->slave][ctx->port - 1][0];
1642         attr.qkey = IB_QP1_QKEY;
1643         attr.port_num = ctx->port;
1644         ret = ib_modify_qp(tun_qp->qp, &attr, qp_attr_mask_INIT);
1645         if (ret) {
1646                 pr_err("Couldn't change %s qp state to INIT (%d)\n",
1647                        create_tun ? "tunnel" : "special", ret);
1648                 goto err_qp;
1649         }
1650         attr.qp_state = IB_QPS_RTR;
1651         ret = ib_modify_qp(tun_qp->qp, &attr, IB_QP_STATE);
1652         if (ret) {
1653                 pr_err("Couldn't change %s qp state to RTR (%d)\n",
1654                        create_tun ? "tunnel" : "special", ret);
1655                 goto err_qp;
1656         }
1657         attr.qp_state = IB_QPS_RTS;
1658         attr.sq_psn = 0;
1659         ret = ib_modify_qp(tun_qp->qp, &attr, IB_QP_STATE | IB_QP_SQ_PSN);
1660         if (ret) {
1661                 pr_err("Couldn't change %s qp state to RTS (%d)\n",
1662                        create_tun ? "tunnel" : "special", ret);
1663                 goto err_qp;
1664         }
1665
1666         for (i = 0; i < MLX4_NUM_TUNNEL_BUFS; i++) {
1667                 ret = mlx4_ib_post_pv_qp_buf(ctx, tun_qp, i);
1668                 if (ret) {
1669                         pr_err(" mlx4_ib_post_pv_buf error"
1670                                " (err = %d, i = %d)\n", ret, i);
1671                         goto err_qp;
1672                 }
1673         }
1674         return 0;
1675
1676 err_qp:
1677         ib_destroy_qp(tun_qp->qp);
1678         tun_qp->qp = NULL;
1679         return ret;
1680 }
1681
1682 /*
1683  * IB MAD completion callback for real SQPs
1684  */
1685 static void mlx4_ib_sqp_comp_worker(struct work_struct *work)
1686 {
1687         struct mlx4_ib_demux_pv_ctx *ctx;
1688         struct mlx4_ib_demux_pv_qp *sqp;
1689         struct ib_wc wc;
1690         struct ib_grh *grh;
1691         struct ib_mad *mad;
1692
1693         ctx = container_of(work, struct mlx4_ib_demux_pv_ctx, work);
1694         ib_req_notify_cq(ctx->cq, IB_CQ_NEXT_COMP);
1695
1696         while (mlx4_ib_poll_cq(ctx->cq, 1, &wc) == 1) {
1697                 sqp = &ctx->qp[MLX4_TUN_WRID_QPN(wc.wr_id)];
1698                 if (wc.status == IB_WC_SUCCESS) {
1699                         switch (wc.opcode) {
1700                         case IB_WC_SEND:
1701                                 ib_destroy_ah(sqp->tx_ring[wc.wr_id &
1702                                               (MLX4_NUM_TUNNEL_BUFS - 1)].ah);
1703                                 sqp->tx_ring[wc.wr_id & (MLX4_NUM_TUNNEL_BUFS - 1)].ah
1704                                         = NULL;
1705                                 spin_lock(&sqp->tx_lock);
1706                                 sqp->tx_ix_tail++;
1707                                 spin_unlock(&sqp->tx_lock);
1708                                 break;
1709                         case IB_WC_RECV:
1710                                 mad = (struct ib_mad *) &(((struct mlx4_mad_rcv_buf *)
1711                                                 (sqp->ring[wc.wr_id &
1712                                                 (MLX4_NUM_TUNNEL_BUFS - 1)].addr))->payload);
1713                                 grh = &(((struct mlx4_mad_rcv_buf *)
1714                                                 (sqp->ring[wc.wr_id &
1715                                                 (MLX4_NUM_TUNNEL_BUFS - 1)].addr))->grh);
1716                                 mlx4_ib_demux_mad(ctx->ib_dev, ctx->port, &wc, grh, mad);
1717                                 if (mlx4_ib_post_pv_qp_buf(ctx, sqp, wc.wr_id &
1718                                                            (MLX4_NUM_TUNNEL_BUFS - 1)))
1719                                         pr_err("Failed reposting SQP "
1720                                                "buf:%lld\n", wc.wr_id);
1721                                 break;
1722                         default:
1723                                 BUG_ON(1);
1724                                 break;
1725                         }
1726                 } else  {
1727                         pr_debug("mlx4_ib: completion error in tunnel: %d."
1728                                  " status = %d, wrid = 0x%llx\n",
1729                                  ctx->slave, wc.status, wc.wr_id);
1730                         if (!MLX4_TUN_IS_RECV(wc.wr_id)) {
1731                                 ib_destroy_ah(sqp->tx_ring[wc.wr_id &
1732                                               (MLX4_NUM_TUNNEL_BUFS - 1)].ah);
1733                                 sqp->tx_ring[wc.wr_id & (MLX4_NUM_TUNNEL_BUFS - 1)].ah
1734                                         = NULL;
1735                                 spin_lock(&sqp->tx_lock);
1736                                 sqp->tx_ix_tail++;
1737                                 spin_unlock(&sqp->tx_lock);
1738                         }
1739                 }
1740         }
1741 }
1742
1743 static int alloc_pv_object(struct mlx4_ib_dev *dev, int slave, int port,
1744                                struct mlx4_ib_demux_pv_ctx **ret_ctx)
1745 {
1746         struct mlx4_ib_demux_pv_ctx *ctx;
1747
1748         *ret_ctx = NULL;
1749         ctx = kzalloc(sizeof (struct mlx4_ib_demux_pv_ctx), GFP_KERNEL);
1750         if (!ctx) {
1751                 pr_err("failed allocating pv resource context "
1752                        "for port %d, slave %d\n", port, slave);
1753                 return -ENOMEM;
1754         }
1755
1756         ctx->ib_dev = &dev->ib_dev;
1757         ctx->port = port;
1758         ctx->slave = slave;
1759         *ret_ctx = ctx;
1760         return 0;
1761 }
1762
1763 static void free_pv_object(struct mlx4_ib_dev *dev, int slave, int port)
1764 {
1765         if (dev->sriov.demux[port - 1].tun[slave]) {
1766                 kfree(dev->sriov.demux[port - 1].tun[slave]);
1767                 dev->sriov.demux[port - 1].tun[slave] = NULL;
1768         }
1769 }
1770
1771 static int create_pv_resources(struct ib_device *ibdev, int slave, int port,
1772                                int create_tun, struct mlx4_ib_demux_pv_ctx *ctx)
1773 {
1774         int ret, cq_size;
1775         struct ib_cq_init_attr cq_attr = {};
1776
1777         if (ctx->state != DEMUX_PV_STATE_DOWN)
1778                 return -EEXIST;
1779
1780         ctx->state = DEMUX_PV_STATE_STARTING;
1781         /* have QP0 only if link layer is IB */
1782         if (rdma_port_get_link_layer(ibdev, ctx->port) ==
1783             IB_LINK_LAYER_INFINIBAND)
1784                 ctx->has_smi = 1;
1785
1786         if (ctx->has_smi) {
1787                 ret = mlx4_ib_alloc_pv_bufs(ctx, IB_QPT_SMI, create_tun);
1788                 if (ret) {
1789                         pr_err("Failed allocating qp0 tunnel bufs (%d)\n", ret);
1790                         goto err_out;
1791                 }
1792         }
1793
1794         ret = mlx4_ib_alloc_pv_bufs(ctx, IB_QPT_GSI, create_tun);
1795         if (ret) {
1796                 pr_err("Failed allocating qp1 tunnel bufs (%d)\n", ret);
1797                 goto err_out_qp0;
1798         }
1799
1800         cq_size = 2 * MLX4_NUM_TUNNEL_BUFS;
1801         if (ctx->has_smi)
1802                 cq_size *= 2;
1803
1804         cq_attr.cqe = cq_size;
1805         ctx->cq = ib_create_cq(ctx->ib_dev, mlx4_ib_tunnel_comp_handler,
1806                                NULL, ctx, &cq_attr);
1807         if (IS_ERR(ctx->cq)) {
1808                 ret = PTR_ERR(ctx->cq);
1809                 pr_err("Couldn't create tunnel CQ (%d)\n", ret);
1810                 goto err_buf;
1811         }
1812
1813         ctx->pd = ib_alloc_pd(ctx->ib_dev);
1814         if (IS_ERR(ctx->pd)) {
1815                 ret = PTR_ERR(ctx->pd);
1816                 pr_err("Couldn't create tunnel PD (%d)\n", ret);
1817                 goto err_cq;
1818         }
1819
1820         ctx->mr = ib_get_dma_mr(ctx->pd, IB_ACCESS_LOCAL_WRITE);
1821         if (IS_ERR(ctx->mr)) {
1822                 ret = PTR_ERR(ctx->mr);
1823                 pr_err("Couldn't get tunnel DMA MR (%d)\n", ret);
1824                 goto err_pd;
1825         }
1826
1827         if (ctx->has_smi) {
1828                 ret = create_pv_sqp(ctx, IB_QPT_SMI, create_tun);
1829                 if (ret) {
1830                         pr_err("Couldn't create %s QP0 (%d)\n",
1831                                create_tun ? "tunnel for" : "",  ret);
1832                         goto err_mr;
1833                 }
1834         }
1835
1836         ret = create_pv_sqp(ctx, IB_QPT_GSI, create_tun);
1837         if (ret) {
1838                 pr_err("Couldn't create %s QP1 (%d)\n",
1839                        create_tun ? "tunnel for" : "",  ret);
1840                 goto err_qp0;
1841         }
1842
1843         if (create_tun)
1844                 INIT_WORK(&ctx->work, mlx4_ib_tunnel_comp_worker);
1845         else
1846                 INIT_WORK(&ctx->work, mlx4_ib_sqp_comp_worker);
1847
1848         ctx->wq = to_mdev(ibdev)->sriov.demux[port - 1].wq;
1849
1850         ret = ib_req_notify_cq(ctx->cq, IB_CQ_NEXT_COMP);
1851         if (ret) {
1852                 pr_err("Couldn't arm tunnel cq (%d)\n", ret);
1853                 goto err_wq;
1854         }
1855         ctx->state = DEMUX_PV_STATE_ACTIVE;
1856         return 0;
1857
1858 err_wq:
1859         ctx->wq = NULL;
1860         ib_destroy_qp(ctx->qp[1].qp);
1861         ctx->qp[1].qp = NULL;
1862
1863
1864 err_qp0:
1865         if (ctx->has_smi)
1866                 ib_destroy_qp(ctx->qp[0].qp);
1867         ctx->qp[0].qp = NULL;
1868
1869 err_mr:
1870         ib_dereg_mr(ctx->mr);
1871         ctx->mr = NULL;
1872
1873 err_pd:
1874         ib_dealloc_pd(ctx->pd);
1875         ctx->pd = NULL;
1876
1877 err_cq:
1878         ib_destroy_cq(ctx->cq);
1879         ctx->cq = NULL;
1880
1881 err_buf:
1882         mlx4_ib_free_pv_qp_bufs(ctx, IB_QPT_GSI, create_tun);
1883
1884 err_out_qp0:
1885         if (ctx->has_smi)
1886                 mlx4_ib_free_pv_qp_bufs(ctx, IB_QPT_SMI, create_tun);
1887 err_out:
1888         ctx->state = DEMUX_PV_STATE_DOWN;
1889         return ret;
1890 }
1891
1892 static void destroy_pv_resources(struct mlx4_ib_dev *dev, int slave, int port,
1893                                  struct mlx4_ib_demux_pv_ctx *ctx, int flush)
1894 {
1895         if (!ctx)
1896                 return;
1897         if (ctx->state > DEMUX_PV_STATE_DOWN) {
1898                 ctx->state = DEMUX_PV_STATE_DOWNING;
1899                 if (flush)
1900                         flush_workqueue(ctx->wq);
1901                 if (ctx->has_smi) {
1902                         ib_destroy_qp(ctx->qp[0].qp);
1903                         ctx->qp[0].qp = NULL;
1904                         mlx4_ib_free_pv_qp_bufs(ctx, IB_QPT_SMI, 1);
1905                 }
1906                 ib_destroy_qp(ctx->qp[1].qp);
1907                 ctx->qp[1].qp = NULL;
1908                 mlx4_ib_free_pv_qp_bufs(ctx, IB_QPT_GSI, 1);
1909                 ib_dereg_mr(ctx->mr);
1910                 ctx->mr = NULL;
1911                 ib_dealloc_pd(ctx->pd);
1912                 ctx->pd = NULL;
1913                 ib_destroy_cq(ctx->cq);
1914                 ctx->cq = NULL;
1915                 ctx->state = DEMUX_PV_STATE_DOWN;
1916         }
1917 }
1918
1919 static int mlx4_ib_tunnels_update(struct mlx4_ib_dev *dev, int slave,
1920                                   int port, int do_init)
1921 {
1922         int ret = 0;
1923
1924         if (!do_init) {
1925                 clean_vf_mcast(&dev->sriov.demux[port - 1], slave);
1926                 /* for master, destroy real sqp resources */
1927                 if (slave == mlx4_master_func_num(dev->dev))
1928                         destroy_pv_resources(dev, slave, port,
1929                                              dev->sriov.sqps[port - 1], 1);
1930                 /* destroy the tunnel qp resources */
1931                 destroy_pv_resources(dev, slave, port,
1932                                      dev->sriov.demux[port - 1].tun[slave], 1);
1933                 return 0;
1934         }
1935
1936         /* create the tunnel qp resources */
1937         ret = create_pv_resources(&dev->ib_dev, slave, port, 1,
1938                                   dev->sriov.demux[port - 1].tun[slave]);
1939
1940         /* for master, create the real sqp resources */
1941         if (!ret && slave == mlx4_master_func_num(dev->dev))
1942                 ret = create_pv_resources(&dev->ib_dev, slave, port, 0,
1943                                           dev->sriov.sqps[port - 1]);
1944         return ret;
1945 }
1946
1947 void mlx4_ib_tunnels_update_work(struct work_struct *work)
1948 {
1949         struct mlx4_ib_demux_work *dmxw;
1950
1951         dmxw = container_of(work, struct mlx4_ib_demux_work, work);
1952         mlx4_ib_tunnels_update(dmxw->dev, dmxw->slave, (int) dmxw->port,
1953                                dmxw->do_init);
1954         kfree(dmxw);
1955         return;
1956 }
1957
1958 static int mlx4_ib_alloc_demux_ctx(struct mlx4_ib_dev *dev,
1959                                        struct mlx4_ib_demux_ctx *ctx,
1960                                        int port)
1961 {
1962         char name[12];
1963         int ret = 0;
1964         int i;
1965
1966         ctx->tun = kcalloc(dev->dev->caps.sqp_demux,
1967                            sizeof (struct mlx4_ib_demux_pv_ctx *), GFP_KERNEL);
1968         if (!ctx->tun)
1969                 return -ENOMEM;
1970
1971         ctx->dev = dev;
1972         ctx->port = port;
1973         ctx->ib_dev = &dev->ib_dev;
1974
1975         for (i = 0;
1976              i < min(dev->dev->caps.sqp_demux,
1977              (u16)(dev->dev->persist->num_vfs + 1));
1978              i++) {
1979                 struct mlx4_active_ports actv_ports =
1980                         mlx4_get_active_ports(dev->dev, i);
1981
1982                 if (!test_bit(port - 1, actv_ports.ports))
1983                         continue;
1984
1985                 ret = alloc_pv_object(dev, i, port, &ctx->tun[i]);
1986                 if (ret) {
1987                         ret = -ENOMEM;
1988                         goto err_mcg;
1989                 }
1990         }
1991
1992         ret = mlx4_ib_mcg_port_init(ctx);
1993         if (ret) {
1994                 pr_err("Failed initializing mcg para-virt (%d)\n", ret);
1995                 goto err_mcg;
1996         }
1997
1998         snprintf(name, sizeof name, "mlx4_ibt%d", port);
1999         ctx->wq = create_singlethread_workqueue(name);
2000         if (!ctx->wq) {
2001                 pr_err("Failed to create tunnelling WQ for port %d\n", port);
2002                 ret = -ENOMEM;
2003                 goto err_wq;
2004         }
2005
2006         snprintf(name, sizeof name, "mlx4_ibud%d", port);
2007         ctx->ud_wq = create_singlethread_workqueue(name);
2008         if (!ctx->ud_wq) {
2009                 pr_err("Failed to create up/down WQ for port %d\n", port);
2010                 ret = -ENOMEM;
2011                 goto err_udwq;
2012         }
2013
2014         return 0;
2015
2016 err_udwq:
2017         destroy_workqueue(ctx->wq);
2018         ctx->wq = NULL;
2019
2020 err_wq:
2021         mlx4_ib_mcg_port_cleanup(ctx, 1);
2022 err_mcg:
2023         for (i = 0; i < dev->dev->caps.sqp_demux; i++)
2024                 free_pv_object(dev, i, port);
2025         kfree(ctx->tun);
2026         ctx->tun = NULL;
2027         return ret;
2028 }
2029
2030 static void mlx4_ib_free_sqp_ctx(struct mlx4_ib_demux_pv_ctx *sqp_ctx)
2031 {
2032         if (sqp_ctx->state > DEMUX_PV_STATE_DOWN) {
2033                 sqp_ctx->state = DEMUX_PV_STATE_DOWNING;
2034                 flush_workqueue(sqp_ctx->wq);
2035                 if (sqp_ctx->has_smi) {
2036                         ib_destroy_qp(sqp_ctx->qp[0].qp);
2037                         sqp_ctx->qp[0].qp = NULL;
2038                         mlx4_ib_free_pv_qp_bufs(sqp_ctx, IB_QPT_SMI, 0);
2039                 }
2040                 ib_destroy_qp(sqp_ctx->qp[1].qp);
2041                 sqp_ctx->qp[1].qp = NULL;
2042                 mlx4_ib_free_pv_qp_bufs(sqp_ctx, IB_QPT_GSI, 0);
2043                 ib_dereg_mr(sqp_ctx->mr);
2044                 sqp_ctx->mr = NULL;
2045                 ib_dealloc_pd(sqp_ctx->pd);
2046                 sqp_ctx->pd = NULL;
2047                 ib_destroy_cq(sqp_ctx->cq);
2048                 sqp_ctx->cq = NULL;
2049                 sqp_ctx->state = DEMUX_PV_STATE_DOWN;
2050         }
2051 }
2052
2053 static void mlx4_ib_free_demux_ctx(struct mlx4_ib_demux_ctx *ctx)
2054 {
2055         int i;
2056         if (ctx) {
2057                 struct mlx4_ib_dev *dev = to_mdev(ctx->ib_dev);
2058                 mlx4_ib_mcg_port_cleanup(ctx, 1);
2059                 for (i = 0; i < dev->dev->caps.sqp_demux; i++) {
2060                         if (!ctx->tun[i])
2061                                 continue;
2062                         if (ctx->tun[i]->state > DEMUX_PV_STATE_DOWN)
2063                                 ctx->tun[i]->state = DEMUX_PV_STATE_DOWNING;
2064                 }
2065                 flush_workqueue(ctx->wq);
2066                 for (i = 0; i < dev->dev->caps.sqp_demux; i++) {
2067                         destroy_pv_resources(dev, i, ctx->port, ctx->tun[i], 0);
2068                         free_pv_object(dev, i, ctx->port);
2069                 }
2070                 kfree(ctx->tun);
2071                 destroy_workqueue(ctx->ud_wq);
2072                 destroy_workqueue(ctx->wq);
2073         }
2074 }
2075
2076 static void mlx4_ib_master_tunnels(struct mlx4_ib_dev *dev, int do_init)
2077 {
2078         int i;
2079
2080         if (!mlx4_is_master(dev->dev))
2081                 return;
2082         /* initialize or tear down tunnel QPs for the master */
2083         for (i = 0; i < dev->dev->caps.num_ports; i++)
2084                 mlx4_ib_tunnels_update(dev, mlx4_master_func_num(dev->dev), i + 1, do_init);
2085         return;
2086 }
2087
2088 int mlx4_ib_init_sriov(struct mlx4_ib_dev *dev)
2089 {
2090         int i = 0;
2091         int err;
2092
2093         if (!mlx4_is_mfunc(dev->dev))
2094                 return 0;
2095
2096         dev->sriov.is_going_down = 0;
2097         spin_lock_init(&dev->sriov.going_down_lock);
2098         mlx4_ib_cm_paravirt_init(dev);
2099
2100         mlx4_ib_warn(&dev->ib_dev, "multi-function enabled\n");
2101
2102         if (mlx4_is_slave(dev->dev)) {
2103                 mlx4_ib_warn(&dev->ib_dev, "operating in qp1 tunnel mode\n");
2104                 return 0;
2105         }
2106
2107         for (i = 0; i < dev->dev->caps.sqp_demux; i++) {
2108                 if (i == mlx4_master_func_num(dev->dev))
2109                         mlx4_put_slave_node_guid(dev->dev, i, dev->ib_dev.node_guid);
2110                 else
2111                         mlx4_put_slave_node_guid(dev->dev, i, mlx4_ib_gen_node_guid());
2112         }
2113
2114         err = mlx4_ib_init_alias_guid_service(dev);
2115         if (err) {
2116                 mlx4_ib_warn(&dev->ib_dev, "Failed init alias guid process.\n");
2117                 goto paravirt_err;
2118         }
2119         err = mlx4_ib_device_register_sysfs(dev);
2120         if (err) {
2121                 mlx4_ib_warn(&dev->ib_dev, "Failed to register sysfs\n");
2122                 goto sysfs_err;
2123         }
2124
2125         mlx4_ib_warn(&dev->ib_dev, "initializing demux service for %d qp1 clients\n",
2126                      dev->dev->caps.sqp_demux);
2127         for (i = 0; i < dev->num_ports; i++) {
2128                 union ib_gid gid;
2129                 err = __mlx4_ib_query_gid(&dev->ib_dev, i + 1, 0, &gid, 1);
2130                 if (err)
2131                         goto demux_err;
2132                 dev->sriov.demux[i].guid_cache[0] = gid.global.interface_id;
2133                 err = alloc_pv_object(dev, mlx4_master_func_num(dev->dev), i + 1,
2134                                       &dev->sriov.sqps[i]);
2135                 if (err)
2136                         goto demux_err;
2137                 err = mlx4_ib_alloc_demux_ctx(dev, &dev->sriov.demux[i], i + 1);
2138                 if (err)
2139                         goto free_pv;
2140         }
2141         mlx4_ib_master_tunnels(dev, 1);
2142         return 0;
2143
2144 free_pv:
2145         free_pv_object(dev, mlx4_master_func_num(dev->dev), i + 1);
2146 demux_err:
2147         while (--i >= 0) {
2148                 free_pv_object(dev, mlx4_master_func_num(dev->dev), i + 1);
2149                 mlx4_ib_free_demux_ctx(&dev->sriov.demux[i]);
2150         }
2151         mlx4_ib_device_unregister_sysfs(dev);
2152
2153 sysfs_err:
2154         mlx4_ib_destroy_alias_guid_service(dev);
2155
2156 paravirt_err:
2157         mlx4_ib_cm_paravirt_clean(dev, -1);
2158
2159         return err;
2160 }
2161
2162 void mlx4_ib_close_sriov(struct mlx4_ib_dev *dev)
2163 {
2164         int i;
2165         unsigned long flags;
2166
2167         if (!mlx4_is_mfunc(dev->dev))
2168                 return;
2169
2170         spin_lock_irqsave(&dev->sriov.going_down_lock, flags);
2171         dev->sriov.is_going_down = 1;
2172         spin_unlock_irqrestore(&dev->sriov.going_down_lock, flags);
2173         if (mlx4_is_master(dev->dev)) {
2174                 for (i = 0; i < dev->num_ports; i++) {
2175                         flush_workqueue(dev->sriov.demux[i].ud_wq);
2176                         mlx4_ib_free_sqp_ctx(dev->sriov.sqps[i]);
2177                         kfree(dev->sriov.sqps[i]);
2178                         dev->sriov.sqps[i] = NULL;
2179                         mlx4_ib_free_demux_ctx(&dev->sriov.demux[i]);
2180                 }
2181
2182                 mlx4_ib_cm_paravirt_clean(dev, -1);
2183                 mlx4_ib_destroy_alias_guid_service(dev);
2184                 mlx4_ib_device_unregister_sysfs(dev);
2185         }
2186 }