1 # IOMMU_API always gets selected by whoever wants it.
5 menuconfig IOMMU_SUPPORT
6 bool "IOMMU Hardware Support"
10 Say Y here if you want to compile device drivers for IO Memory
11 Management Units into the kernel. These devices usually allow to
12 remap DMA requests and/or remap interrupts from other devices on the
22 depends on OF && IOMMU_API
25 bool "Freescale IOMMU support"
27 depends on PPC_E500MC || COMPILE_TEST
29 select GENERIC_ALLOCATOR
31 Freescale PAMU support. PAMU is the IOMMU present on Freescale QorIQ platforms.
32 PAMU can authorize memory access, remap the memory address, and remap I/O
37 bool "MSM IOMMU Support"
39 depends on ARCH_MSM8X60 || ARCH_MSM8960 || COMPILE_TEST
42 Support for the IOMMUs found on certain Qualcomm SOCs.
43 These IOMMUs allow virtualization of the address space used by most
44 cores within the multimedia subsystem.
46 If unsure, say N here.
48 config IOMMU_PGTABLES_L2
50 depends on MSM_IOMMU && MMU && SMP && CPU_DCACHE_DISABLE=n
54 bool "AMD IOMMU support"
61 depends on X86_64 && PCI && ACPI
63 With this option you can enable support for AMD IOMMU hardware in
64 your system. An IOMMU is a hardware component which provides
65 remapping of DMA memory accesses from devices. With an AMD IOMMU you
66 can isolate the DMA memory of different devices and protect the
67 system from misbehaving device drivers or hardware.
69 You can find out if your system has an AMD IOMMU if you look into
70 your BIOS for an option to enable it or if you have an IVRS ACPI
73 config AMD_IOMMU_STATS
74 bool "Export AMD IOMMU statistics to debugfs"
78 This option enables code in the AMD IOMMU driver to collect various
79 statistics about whats happening in the driver and exports that
80 information to userspace via debugfs.
84 tristate "AMD IOMMU Version 2 driver"
88 This option enables support for the AMD IOMMUv2 features of the IOMMU
89 hardware. Select this option if you want to use devices that support
90 the PCI PRI and PASID interface.
97 bool "Support for Intel IOMMU using DMA Remapping Devices"
98 depends on PCI_MSI && ACPI && (X86 || IA64_GENERIC)
103 DMA remapping (DMAR) devices support enables independent address
104 translations for Direct Memory Access (DMA) from devices.
105 These DMA remapping devices are reported via ACPI tables
106 and include PCI device scope covered by these DMA
109 config INTEL_IOMMU_DEFAULT_ON
111 prompt "Enable Intel DMA Remapping Devices by default"
112 depends on INTEL_IOMMU
114 Selecting this option will enable a DMAR device at boot time if
115 one is found. If this option is not selected, DMAR support can
116 be enabled by passing intel_iommu=on to the kernel.
118 config INTEL_IOMMU_BROKEN_GFX_WA
119 bool "Workaround broken graphics drivers (going away soon)"
120 depends on INTEL_IOMMU && BROKEN && X86
122 Current Graphics drivers tend to use physical address
123 for DMA and avoid using DMA APIs. Setting this config
124 option permits the IOMMU driver to set a unity map for
125 all the OS-visible memory. Hence the driver can continue
126 to use physical addresses for DMA, at least until this
127 option is removed in the 2.6.32 kernel.
129 config INTEL_IOMMU_FLOPPY_WA
131 depends on INTEL_IOMMU && X86
133 Floppy disk drivers are known to bypass DMA API calls
134 thereby failing to work when IOMMU is enabled. This
135 workaround will setup a 1:1 mapping for the first
136 16MiB to make floppy (an ISA device) work.
139 bool "Support for Interrupt Remapping"
140 depends on X86_64 && X86_IO_APIC && PCI_MSI && ACPI
143 Supports Interrupt remapping for IO-APIC and MSI devices.
144 To use x2apic mode in the CPU's which support x2APIC enhancements or
145 to support platforms with CPU's having > 8 bit APIC ID, say Y.
149 bool "OMAP IOMMU Support"
150 depends on ARM && MMU
151 depends on ARCH_OMAP2PLUS || COMPILE_TEST
154 config OMAP_IOMMU_DEBUG
155 bool "Export OMAP IOMMU internals in DebugFS"
156 depends on OMAP_IOMMU && DEBUG_FS
158 Select this to see extensive information about
159 the internal state of OMAP IOMMU in debugfs.
161 Say N unless you know you need this.
163 config ROCKCHIP_IOMMU
164 bool "Rockchip IOMMU Support"
166 depends on ARCH_ROCKCHIP || COMPILE_TEST
168 select ARM_DMA_USE_IOMMU
170 Support for IOMMUs found on Rockchip rk32xx SOCs.
171 These IOMMUs allow virtualization of the address space used by most
172 cores within the multimedia subsystem.
173 Say Y here if you are using a Rockchip SoC that includes an IOMMU
176 config TEGRA_IOMMU_GART
177 bool "Tegra GART IOMMU Support"
178 depends on ARCH_TEGRA_2x_SOC
181 Enables support for remapping discontiguous physical memory
182 shared with the operating system into contiguous I/O virtual
183 space through the GART (Graphics Address Relocation Table)
184 hardware included on Tegra SoCs.
186 config TEGRA_IOMMU_SMMU
187 bool "NVIDIA Tegra SMMU Support"
188 depends on ARCH_TEGRA
193 This driver supports the IOMMU hardware (SMMU) found on NVIDIA Tegra
194 SoCs (Tegra30 up to Tegra124).
197 bool "Exynos IOMMU Support"
198 depends on ARCH_EXYNOS && ARM && MMU
200 select ARM_DMA_USE_IOMMU
202 Support for the IOMMU (System MMU) of Samsung Exynos application
203 processor family. This enables H/W multimedia accelerators to see
204 non-linear physical memory chunks as linear memory in their
207 If unsure, say N here.
209 config EXYNOS_IOMMU_DEBUG
210 bool "Debugging log for Exynos IOMMU"
211 depends on EXYNOS_IOMMU
213 Select this to see the detailed log message that shows what
214 happens in the IOMMU driver.
216 Say N unless you need kernel log message for IOMMU debugging.
218 config SHMOBILE_IPMMU
221 config SHMOBILE_IPMMU_TLB
224 config SHMOBILE_IOMMU
225 bool "IOMMU for Renesas IPMMU/IPMMUI"
227 depends on ARM && MMU
228 depends on ARCH_SHMOBILE || COMPILE_TEST
230 select ARM_DMA_USE_IOMMU
231 select SHMOBILE_IPMMU
232 select SHMOBILE_IPMMU_TLB
234 Support for Renesas IPMMU/IPMMUI. This option enables
235 remapping of DMA memory accesses from all of the IP blocks
238 Warning: Drivers (including userspace drivers of UIO
239 devices) of the IP blocks on the ICB *must* use addresses
240 allocated from the IPMMU (iova) for DMA with this option
246 prompt "IPMMU/IPMMUI address space size"
247 default SHMOBILE_IOMMU_ADDRSIZE_2048MB
248 depends on SHMOBILE_IOMMU
250 This option sets IPMMU/IPMMUI address space size by
251 adjusting the 1st level page table size. The page table size
252 is calculated as follows:
254 page table size = number of page table entries * 4 bytes
255 number of page table entries = address space size / 1 MiB
257 For example, when the address space size is 2048 MiB, the
258 1st level page table size is 8192 bytes.
260 config SHMOBILE_IOMMU_ADDRSIZE_2048MB
263 config SHMOBILE_IOMMU_ADDRSIZE_1024MB
266 config SHMOBILE_IOMMU_ADDRSIZE_512MB
269 config SHMOBILE_IOMMU_ADDRSIZE_256MB
272 config SHMOBILE_IOMMU_ADDRSIZE_128MB
275 config SHMOBILE_IOMMU_ADDRSIZE_64MB
278 config SHMOBILE_IOMMU_ADDRSIZE_32MB
283 config SHMOBILE_IOMMU_L1SIZE
285 default 8192 if SHMOBILE_IOMMU_ADDRSIZE_2048MB
286 default 4096 if SHMOBILE_IOMMU_ADDRSIZE_1024MB
287 default 2048 if SHMOBILE_IOMMU_ADDRSIZE_512MB
288 default 1024 if SHMOBILE_IOMMU_ADDRSIZE_256MB
289 default 512 if SHMOBILE_IOMMU_ADDRSIZE_128MB
290 default 256 if SHMOBILE_IOMMU_ADDRSIZE_64MB
291 default 128 if SHMOBILE_IOMMU_ADDRSIZE_32MB
294 bool "Renesas VMSA-compatible IPMMU"
296 depends on ARCH_SHMOBILE || COMPILE_TEST
298 select ARM_DMA_USE_IOMMU
300 Support for the Renesas VMSA-compatible IPMMU Renesas found in the
301 R-Mobile APE6 and R-Car H2/M2 SoCs.
305 config SPAPR_TCE_IOMMU
306 bool "sPAPR TCE IOMMU Support"
307 depends on PPC_POWERNV || PPC_PSERIES
310 Enables bits of IOMMU API required by VFIO. The iommu_ops
311 is not implemented as it is not necessary for VFIO.
314 bool "ARM Ltd. System MMU (SMMU) Support"
315 depends on ARM64 || (ARM_LPAE && OF)
318 select ARM_DMA_USE_IOMMU if ARM
320 Support for implementations of the ARM System MMU architecture
321 versions 1 and 2. The driver supports both v7l and v8l table
322 formats with 4k and 64k page sizes.
324 Say Y here if your SoC includes an IOMMU device implementing
325 the ARM SMMU architecture.
327 endif # IOMMU_SUPPORT