2 * Kernel-based Virtual Machine driver for Linux
4 * This module enables machines with Intel VT-x extensions to run virtual
5 * machines without emulation or binary translation.
9 * Copyright (C) 2006 Qumranet, Inc.
12 * Yaniv Kamay <yaniv@qumranet.com>
13 * Avi Kivity <avi@qumranet.com>
15 * This work is licensed under the terms of the GNU GPL, version 2. See
16 * the COPYING file in the top-level directory.
19 #include <linux/types.h>
20 #include <linux/string.h>
23 #include <linux/highmem.h>
24 #include <linux/module.h>
34 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg);
36 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {}
41 #define pgprintk(x...) do { if (dbg) printk(x); } while (0)
42 #define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
46 #define pgprintk(x...) do { } while (0)
47 #define rmap_printk(x...) do { } while (0)
51 #if defined(MMU_DEBUG) || defined(AUDIT)
57 printk(KERN_WARNING "assertion failed %s:%d: %s\n", \
58 __FILE__, __LINE__, #x); \
61 #define PT64_PT_BITS 9
62 #define PT64_ENT_PER_PAGE (1 << PT64_PT_BITS)
63 #define PT32_PT_BITS 10
64 #define PT32_ENT_PER_PAGE (1 << PT32_PT_BITS)
66 #define PT_WRITABLE_SHIFT 1
68 #define PT_PRESENT_MASK (1ULL << 0)
69 #define PT_WRITABLE_MASK (1ULL << PT_WRITABLE_SHIFT)
70 #define PT_USER_MASK (1ULL << 2)
71 #define PT_PWT_MASK (1ULL << 3)
72 #define PT_PCD_MASK (1ULL << 4)
73 #define PT_ACCESSED_MASK (1ULL << 5)
74 #define PT_DIRTY_MASK (1ULL << 6)
75 #define PT_PAGE_SIZE_MASK (1ULL << 7)
76 #define PT_PAT_MASK (1ULL << 7)
77 #define PT_GLOBAL_MASK (1ULL << 8)
78 #define PT64_NX_MASK (1ULL << 63)
80 #define PT_PAT_SHIFT 7
81 #define PT_DIR_PAT_SHIFT 12
82 #define PT_DIR_PAT_MASK (1ULL << PT_DIR_PAT_SHIFT)
84 #define PT32_DIR_PSE36_SIZE 4
85 #define PT32_DIR_PSE36_SHIFT 13
86 #define PT32_DIR_PSE36_MASK (((1ULL << PT32_DIR_PSE36_SIZE) - 1) << PT32_DIR_PSE36_SHIFT)
89 #define PT32_PTE_COPY_MASK \
90 (PT_PRESENT_MASK | PT_ACCESSED_MASK | PT_DIRTY_MASK | PT_GLOBAL_MASK)
92 #define PT64_PTE_COPY_MASK (PT64_NX_MASK | PT32_PTE_COPY_MASK)
94 #define PT_FIRST_AVAIL_BITS_SHIFT 9
95 #define PT64_SECOND_AVAIL_BITS_SHIFT 52
97 #define PT_SHADOW_PS_MARK (1ULL << PT_FIRST_AVAIL_BITS_SHIFT)
98 #define PT_SHADOW_IO_MARK (1ULL << PT_FIRST_AVAIL_BITS_SHIFT)
100 #define PT_SHADOW_WRITABLE_SHIFT (PT_FIRST_AVAIL_BITS_SHIFT + 1)
101 #define PT_SHADOW_WRITABLE_MASK (1ULL << PT_SHADOW_WRITABLE_SHIFT)
103 #define PT_SHADOW_USER_SHIFT (PT_SHADOW_WRITABLE_SHIFT + 1)
104 #define PT_SHADOW_USER_MASK (1ULL << (PT_SHADOW_USER_SHIFT))
106 #define PT_SHADOW_BITS_OFFSET (PT_SHADOW_WRITABLE_SHIFT - PT_WRITABLE_SHIFT)
108 #define VALID_PAGE(x) ((x) != INVALID_PAGE)
110 #define PT64_LEVEL_BITS 9
112 #define PT64_LEVEL_SHIFT(level) \
113 ( PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS )
115 #define PT64_LEVEL_MASK(level) \
116 (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
118 #define PT64_INDEX(address, level)\
119 (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
122 #define PT32_LEVEL_BITS 10
124 #define PT32_LEVEL_SHIFT(level) \
125 ( PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS )
127 #define PT32_LEVEL_MASK(level) \
128 (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
130 #define PT32_INDEX(address, level)\
131 (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
134 #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
135 #define PT64_DIR_BASE_ADDR_MASK \
136 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
138 #define PT32_BASE_ADDR_MASK PAGE_MASK
139 #define PT32_DIR_BASE_ADDR_MASK \
140 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
143 #define PFERR_PRESENT_MASK (1U << 0)
144 #define PFERR_WRITE_MASK (1U << 1)
145 #define PFERR_USER_MASK (1U << 2)
146 #define PFERR_FETCH_MASK (1U << 4)
148 #define PT64_ROOT_LEVEL 4
149 #define PT32_ROOT_LEVEL 2
150 #define PT32E_ROOT_LEVEL 3
152 #define PT_DIRECTORY_LEVEL 2
153 #define PT_PAGE_TABLE_LEVEL 1
157 struct kvm_rmap_desc {
158 u64 *shadow_ptes[RMAP_EXT];
159 struct kvm_rmap_desc *more;
162 static struct kmem_cache *pte_chain_cache;
163 static struct kmem_cache *rmap_desc_cache;
165 static int is_write_protection(struct kvm_vcpu *vcpu)
167 return vcpu->cr0 & CR0_WP_MASK;
170 static int is_cpuid_PSE36(void)
175 static int is_nx(struct kvm_vcpu *vcpu)
177 return vcpu->shadow_efer & EFER_NX;
180 static int is_present_pte(unsigned long pte)
182 return pte & PT_PRESENT_MASK;
185 static int is_writeble_pte(unsigned long pte)
187 return pte & PT_WRITABLE_MASK;
190 static int is_io_pte(unsigned long pte)
192 return pte & PT_SHADOW_IO_MARK;
195 static int is_rmap_pte(u64 pte)
197 return (pte & (PT_WRITABLE_MASK | PT_PRESENT_MASK))
198 == (PT_WRITABLE_MASK | PT_PRESENT_MASK);
201 static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
202 struct kmem_cache *base_cache, int min)
206 if (cache->nobjs >= min)
208 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
209 obj = kmem_cache_zalloc(base_cache, GFP_NOWAIT);
212 cache->objects[cache->nobjs++] = obj;
217 static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc)
220 kfree(mc->objects[--mc->nobjs]);
223 static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
227 r = mmu_topup_memory_cache(&vcpu->mmu_pte_chain_cache,
231 r = mmu_topup_memory_cache(&vcpu->mmu_rmap_desc_cache,
237 static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
239 mmu_free_memory_cache(&vcpu->mmu_pte_chain_cache);
240 mmu_free_memory_cache(&vcpu->mmu_rmap_desc_cache);
243 static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc,
249 p = mc->objects[--mc->nobjs];
254 static void mmu_memory_cache_free(struct kvm_mmu_memory_cache *mc, void *obj)
256 if (mc->nobjs < KVM_NR_MEM_OBJS)
257 mc->objects[mc->nobjs++] = obj;
262 static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu)
264 return mmu_memory_cache_alloc(&vcpu->mmu_pte_chain_cache,
265 sizeof(struct kvm_pte_chain));
268 static void mmu_free_pte_chain(struct kvm_vcpu *vcpu,
269 struct kvm_pte_chain *pc)
271 mmu_memory_cache_free(&vcpu->mmu_pte_chain_cache, pc);
274 static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu)
276 return mmu_memory_cache_alloc(&vcpu->mmu_rmap_desc_cache,
277 sizeof(struct kvm_rmap_desc));
280 static void mmu_free_rmap_desc(struct kvm_vcpu *vcpu,
281 struct kvm_rmap_desc *rd)
283 mmu_memory_cache_free(&vcpu->mmu_rmap_desc_cache, rd);
287 * Reverse mapping data structures:
289 * If page->private bit zero is zero, then page->private points to the
290 * shadow page table entry that points to page_address(page).
292 * If page->private bit zero is one, (then page->private & ~1) points
293 * to a struct kvm_rmap_desc containing more mappings.
295 static void rmap_add(struct kvm_vcpu *vcpu, u64 *spte)
298 struct kvm_rmap_desc *desc;
301 if (!is_rmap_pte(*spte))
303 page = pfn_to_page((*spte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT);
304 if (!page_private(page)) {
305 rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte);
306 set_page_private(page,(unsigned long)spte);
307 } else if (!(page_private(page) & 1)) {
308 rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte);
309 desc = mmu_alloc_rmap_desc(vcpu);
310 desc->shadow_ptes[0] = (u64 *)page_private(page);
311 desc->shadow_ptes[1] = spte;
312 set_page_private(page,(unsigned long)desc | 1);
314 rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
315 desc = (struct kvm_rmap_desc *)(page_private(page) & ~1ul);
316 while (desc->shadow_ptes[RMAP_EXT-1] && desc->more)
318 if (desc->shadow_ptes[RMAP_EXT-1]) {
319 desc->more = mmu_alloc_rmap_desc(vcpu);
322 for (i = 0; desc->shadow_ptes[i]; ++i)
324 desc->shadow_ptes[i] = spte;
328 static void rmap_desc_remove_entry(struct kvm_vcpu *vcpu,
330 struct kvm_rmap_desc *desc,
332 struct kvm_rmap_desc *prev_desc)
336 for (j = RMAP_EXT - 1; !desc->shadow_ptes[j] && j > i; --j)
338 desc->shadow_ptes[i] = desc->shadow_ptes[j];
339 desc->shadow_ptes[j] = NULL;
342 if (!prev_desc && !desc->more)
343 set_page_private(page,(unsigned long)desc->shadow_ptes[0]);
346 prev_desc->more = desc->more;
348 set_page_private(page,(unsigned long)desc->more | 1);
349 mmu_free_rmap_desc(vcpu, desc);
352 static void rmap_remove(struct kvm_vcpu *vcpu, u64 *spte)
355 struct kvm_rmap_desc *desc;
356 struct kvm_rmap_desc *prev_desc;
359 if (!is_rmap_pte(*spte))
361 page = pfn_to_page((*spte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT);
362 if (!page_private(page)) {
363 printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte);
365 } else if (!(page_private(page) & 1)) {
366 rmap_printk("rmap_remove: %p %llx 1->0\n", spte, *spte);
367 if ((u64 *)page_private(page) != spte) {
368 printk(KERN_ERR "rmap_remove: %p %llx 1->BUG\n",
372 set_page_private(page,0);
374 rmap_printk("rmap_remove: %p %llx many->many\n", spte, *spte);
375 desc = (struct kvm_rmap_desc *)(page_private(page) & ~1ul);
378 for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i)
379 if (desc->shadow_ptes[i] == spte) {
380 rmap_desc_remove_entry(vcpu, page,
392 static void rmap_write_protect(struct kvm_vcpu *vcpu, u64 gfn)
394 struct kvm *kvm = vcpu->kvm;
396 struct kvm_rmap_desc *desc;
399 page = gfn_to_page(kvm, gfn);
402 while (page_private(page)) {
403 if (!(page_private(page) & 1))
404 spte = (u64 *)page_private(page);
406 desc = (struct kvm_rmap_desc *)(page_private(page) & ~1ul);
407 spte = desc->shadow_ptes[0];
410 BUG_ON((*spte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT
411 != page_to_pfn(page));
412 BUG_ON(!(*spte & PT_PRESENT_MASK));
413 BUG_ON(!(*spte & PT_WRITABLE_MASK));
414 rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
415 rmap_remove(vcpu, spte);
416 kvm_arch_ops->tlb_flush(vcpu);
417 *spte &= ~(u64)PT_WRITABLE_MASK;
421 static int is_empty_shadow_page(hpa_t page_hpa)
426 for (pos = __va(page_hpa), end = pos + PAGE_SIZE / sizeof(u64);
429 printk(KERN_ERR "%s: %p %llx\n", __FUNCTION__,
436 static void kvm_mmu_free_page(struct kvm_vcpu *vcpu, hpa_t page_hpa)
438 struct kvm_mmu_page *page_head = page_header(page_hpa);
440 ASSERT(is_empty_shadow_page(page_hpa));
441 page_head->page_hpa = page_hpa;
442 list_move(&page_head->link, &vcpu->free_pages);
443 ++vcpu->kvm->n_free_mmu_pages;
446 static unsigned kvm_page_table_hashfn(gfn_t gfn)
451 static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
454 struct kvm_mmu_page *page;
456 if (list_empty(&vcpu->free_pages))
459 page = list_entry(vcpu->free_pages.next, struct kvm_mmu_page, link);
460 list_move(&page->link, &vcpu->kvm->active_mmu_pages);
461 ASSERT(is_empty_shadow_page(page->page_hpa));
462 page->slot_bitmap = 0;
463 page->multimapped = 0;
464 page->parent_pte = parent_pte;
465 --vcpu->kvm->n_free_mmu_pages;
469 static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
470 struct kvm_mmu_page *page, u64 *parent_pte)
472 struct kvm_pte_chain *pte_chain;
473 struct hlist_node *node;
478 if (!page->multimapped) {
479 u64 *old = page->parent_pte;
482 page->parent_pte = parent_pte;
485 page->multimapped = 1;
486 pte_chain = mmu_alloc_pte_chain(vcpu);
487 INIT_HLIST_HEAD(&page->parent_ptes);
488 hlist_add_head(&pte_chain->link, &page->parent_ptes);
489 pte_chain->parent_ptes[0] = old;
491 hlist_for_each_entry(pte_chain, node, &page->parent_ptes, link) {
492 if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1])
494 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i)
495 if (!pte_chain->parent_ptes[i]) {
496 pte_chain->parent_ptes[i] = parent_pte;
500 pte_chain = mmu_alloc_pte_chain(vcpu);
502 hlist_add_head(&pte_chain->link, &page->parent_ptes);
503 pte_chain->parent_ptes[0] = parent_pte;
506 static void mmu_page_remove_parent_pte(struct kvm_vcpu *vcpu,
507 struct kvm_mmu_page *page,
510 struct kvm_pte_chain *pte_chain;
511 struct hlist_node *node;
514 if (!page->multimapped) {
515 BUG_ON(page->parent_pte != parent_pte);
516 page->parent_pte = NULL;
519 hlist_for_each_entry(pte_chain, node, &page->parent_ptes, link)
520 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
521 if (!pte_chain->parent_ptes[i])
523 if (pte_chain->parent_ptes[i] != parent_pte)
525 while (i + 1 < NR_PTE_CHAIN_ENTRIES
526 && pte_chain->parent_ptes[i + 1]) {
527 pte_chain->parent_ptes[i]
528 = pte_chain->parent_ptes[i + 1];
531 pte_chain->parent_ptes[i] = NULL;
533 hlist_del(&pte_chain->link);
534 mmu_free_pte_chain(vcpu, pte_chain);
535 if (hlist_empty(&page->parent_ptes)) {
536 page->multimapped = 0;
537 page->parent_pte = NULL;
545 static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm_vcpu *vcpu,
549 struct hlist_head *bucket;
550 struct kvm_mmu_page *page;
551 struct hlist_node *node;
553 pgprintk("%s: looking for gfn %lx\n", __FUNCTION__, gfn);
554 index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
555 bucket = &vcpu->kvm->mmu_page_hash[index];
556 hlist_for_each_entry(page, node, bucket, hash_link)
557 if (page->gfn == gfn && !page->role.metaphysical) {
558 pgprintk("%s: found role %x\n",
559 __FUNCTION__, page->role.word);
565 static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
570 unsigned hugepage_access,
573 union kvm_mmu_page_role role;
576 struct hlist_head *bucket;
577 struct kvm_mmu_page *page;
578 struct hlist_node *node;
581 role.glevels = vcpu->mmu.root_level;
583 role.metaphysical = metaphysical;
584 role.hugepage_access = hugepage_access;
585 if (vcpu->mmu.root_level <= PT32_ROOT_LEVEL) {
586 quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
587 quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
588 role.quadrant = quadrant;
590 pgprintk("%s: looking gfn %lx role %x\n", __FUNCTION__,
592 index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
593 bucket = &vcpu->kvm->mmu_page_hash[index];
594 hlist_for_each_entry(page, node, bucket, hash_link)
595 if (page->gfn == gfn && page->role.word == role.word) {
596 mmu_page_add_parent_pte(vcpu, page, parent_pte);
597 pgprintk("%s: found\n", __FUNCTION__);
600 page = kvm_mmu_alloc_page(vcpu, parent_pte);
603 pgprintk("%s: adding gfn %lx role %x\n", __FUNCTION__, gfn, role.word);
606 hlist_add_head(&page->hash_link, bucket);
608 rmap_write_protect(vcpu, gfn);
612 static void kvm_mmu_page_unlink_children(struct kvm_vcpu *vcpu,
613 struct kvm_mmu_page *page)
619 pt = __va(page->page_hpa);
621 if (page->role.level == PT_PAGE_TABLE_LEVEL) {
622 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
623 if (pt[i] & PT_PRESENT_MASK)
624 rmap_remove(vcpu, &pt[i]);
627 kvm_arch_ops->tlb_flush(vcpu);
631 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
635 if (!(ent & PT_PRESENT_MASK))
637 ent &= PT64_BASE_ADDR_MASK;
638 mmu_page_remove_parent_pte(vcpu, page_header(ent), &pt[i]);
642 static void kvm_mmu_put_page(struct kvm_vcpu *vcpu,
643 struct kvm_mmu_page *page,
646 mmu_page_remove_parent_pte(vcpu, page, parent_pte);
649 static void kvm_mmu_zap_page(struct kvm_vcpu *vcpu,
650 struct kvm_mmu_page *page)
654 while (page->multimapped || page->parent_pte) {
655 if (!page->multimapped)
656 parent_pte = page->parent_pte;
658 struct kvm_pte_chain *chain;
660 chain = container_of(page->parent_ptes.first,
661 struct kvm_pte_chain, link);
662 parent_pte = chain->parent_ptes[0];
665 kvm_mmu_put_page(vcpu, page, parent_pte);
668 kvm_mmu_page_unlink_children(vcpu, page);
669 if (!page->root_count) {
670 hlist_del(&page->hash_link);
671 kvm_mmu_free_page(vcpu, page->page_hpa);
673 list_move(&page->link, &vcpu->kvm->active_mmu_pages);
676 static int kvm_mmu_unprotect_page(struct kvm_vcpu *vcpu, gfn_t gfn)
679 struct hlist_head *bucket;
680 struct kvm_mmu_page *page;
681 struct hlist_node *node, *n;
684 pgprintk("%s: looking for gfn %lx\n", __FUNCTION__, gfn);
686 index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
687 bucket = &vcpu->kvm->mmu_page_hash[index];
688 hlist_for_each_entry_safe(page, node, n, bucket, hash_link)
689 if (page->gfn == gfn && !page->role.metaphysical) {
690 pgprintk("%s: gfn %lx role %x\n", __FUNCTION__, gfn,
692 kvm_mmu_zap_page(vcpu, page);
698 static void page_header_update_slot(struct kvm *kvm, void *pte, gpa_t gpa)
700 int slot = memslot_id(kvm, gfn_to_memslot(kvm, gpa >> PAGE_SHIFT));
701 struct kvm_mmu_page *page_head = page_header(__pa(pte));
703 __set_bit(slot, &page_head->slot_bitmap);
706 hpa_t safe_gpa_to_hpa(struct kvm_vcpu *vcpu, gpa_t gpa)
708 hpa_t hpa = gpa_to_hpa(vcpu, gpa);
710 return is_error_hpa(hpa) ? bad_page_address | (gpa & ~PAGE_MASK): hpa;
713 hpa_t gpa_to_hpa(struct kvm_vcpu *vcpu, gpa_t gpa)
717 ASSERT((gpa & HPA_ERR_MASK) == 0);
718 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
720 return gpa | HPA_ERR_MASK;
721 return ((hpa_t)page_to_pfn(page) << PAGE_SHIFT)
722 | (gpa & (PAGE_SIZE-1));
725 hpa_t gva_to_hpa(struct kvm_vcpu *vcpu, gva_t gva)
727 gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, gva);
729 if (gpa == UNMAPPED_GVA)
731 return gpa_to_hpa(vcpu, gpa);
734 struct page *gva_to_page(struct kvm_vcpu *vcpu, gva_t gva)
736 gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, gva);
738 if (gpa == UNMAPPED_GVA)
740 return pfn_to_page(gpa_to_hpa(vcpu, gpa) >> PAGE_SHIFT);
743 static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
747 static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, hpa_t p)
749 int level = PT32E_ROOT_LEVEL;
750 hpa_t table_addr = vcpu->mmu.root_hpa;
753 u32 index = PT64_INDEX(v, level);
757 ASSERT(VALID_PAGE(table_addr));
758 table = __va(table_addr);
762 if (is_present_pte(pte) && is_writeble_pte(pte))
764 mark_page_dirty(vcpu->kvm, v >> PAGE_SHIFT);
765 page_header_update_slot(vcpu->kvm, table, v);
766 table[index] = p | PT_PRESENT_MASK | PT_WRITABLE_MASK |
768 rmap_add(vcpu, &table[index]);
772 if (table[index] == 0) {
773 struct kvm_mmu_page *new_table;
776 pseudo_gfn = (v & PT64_DIR_BASE_ADDR_MASK)
778 new_table = kvm_mmu_get_page(vcpu, pseudo_gfn,
780 1, 0, &table[index]);
782 pgprintk("nonpaging_map: ENOMEM\n");
786 table[index] = new_table->page_hpa | PT_PRESENT_MASK
787 | PT_WRITABLE_MASK | PT_USER_MASK;
789 table_addr = table[index] & PT64_BASE_ADDR_MASK;
793 static void mmu_free_roots(struct kvm_vcpu *vcpu)
796 struct kvm_mmu_page *page;
799 if (vcpu->mmu.shadow_root_level == PT64_ROOT_LEVEL) {
800 hpa_t root = vcpu->mmu.root_hpa;
802 ASSERT(VALID_PAGE(root));
803 page = page_header(root);
805 vcpu->mmu.root_hpa = INVALID_PAGE;
809 for (i = 0; i < 4; ++i) {
810 hpa_t root = vcpu->mmu.pae_root[i];
813 ASSERT(VALID_PAGE(root));
814 root &= PT64_BASE_ADDR_MASK;
815 page = page_header(root);
818 vcpu->mmu.pae_root[i] = INVALID_PAGE;
820 vcpu->mmu.root_hpa = INVALID_PAGE;
823 static void mmu_alloc_roots(struct kvm_vcpu *vcpu)
827 struct kvm_mmu_page *page;
829 root_gfn = vcpu->cr3 >> PAGE_SHIFT;
832 if (vcpu->mmu.shadow_root_level == PT64_ROOT_LEVEL) {
833 hpa_t root = vcpu->mmu.root_hpa;
835 ASSERT(!VALID_PAGE(root));
836 page = kvm_mmu_get_page(vcpu, root_gfn, 0,
837 PT64_ROOT_LEVEL, 0, 0, NULL);
838 root = page->page_hpa;
840 vcpu->mmu.root_hpa = root;
844 for (i = 0; i < 4; ++i) {
845 hpa_t root = vcpu->mmu.pae_root[i];
847 ASSERT(!VALID_PAGE(root));
848 if (vcpu->mmu.root_level == PT32E_ROOT_LEVEL) {
849 if (!is_present_pte(vcpu->pdptrs[i])) {
850 vcpu->mmu.pae_root[i] = 0;
853 root_gfn = vcpu->pdptrs[i] >> PAGE_SHIFT;
854 } else if (vcpu->mmu.root_level == 0)
856 page = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
857 PT32_ROOT_LEVEL, !is_paging(vcpu),
859 root = page->page_hpa;
861 vcpu->mmu.pae_root[i] = root | PT_PRESENT_MASK;
863 vcpu->mmu.root_hpa = __pa(vcpu->mmu.pae_root);
866 static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr)
871 static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
878 r = mmu_topup_memory_caches(vcpu);
883 ASSERT(VALID_PAGE(vcpu->mmu.root_hpa));
886 paddr = gpa_to_hpa(vcpu , addr & PT64_BASE_ADDR_MASK);
888 if (is_error_hpa(paddr))
891 return nonpaging_map(vcpu, addr & PAGE_MASK, paddr);
894 static void nonpaging_free(struct kvm_vcpu *vcpu)
896 mmu_free_roots(vcpu);
899 static int nonpaging_init_context(struct kvm_vcpu *vcpu)
901 struct kvm_mmu *context = &vcpu->mmu;
903 context->new_cr3 = nonpaging_new_cr3;
904 context->page_fault = nonpaging_page_fault;
905 context->gva_to_gpa = nonpaging_gva_to_gpa;
906 context->free = nonpaging_free;
907 context->root_level = 0;
908 context->shadow_root_level = PT32E_ROOT_LEVEL;
909 mmu_alloc_roots(vcpu);
910 ASSERT(VALID_PAGE(context->root_hpa));
911 kvm_arch_ops->set_cr3(vcpu, context->root_hpa);
915 static void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
917 ++kvm_stat.tlb_flush;
918 kvm_arch_ops->tlb_flush(vcpu);
921 static void paging_new_cr3(struct kvm_vcpu *vcpu)
923 pgprintk("%s: cr3 %lx\n", __FUNCTION__, vcpu->cr3);
924 mmu_free_roots(vcpu);
925 if (unlikely(vcpu->kvm->n_free_mmu_pages < KVM_MIN_FREE_MMU_PAGES))
926 kvm_mmu_free_some_pages(vcpu);
927 mmu_alloc_roots(vcpu);
928 kvm_mmu_flush_tlb(vcpu);
929 kvm_arch_ops->set_cr3(vcpu, vcpu->mmu.root_hpa);
932 static inline void set_pte_common(struct kvm_vcpu *vcpu,
941 *shadow_pte |= access_bits << PT_SHADOW_BITS_OFFSET;
943 access_bits &= ~PT_WRITABLE_MASK;
945 paddr = gpa_to_hpa(vcpu, gaddr & PT64_BASE_ADDR_MASK);
947 *shadow_pte |= access_bits;
949 if (is_error_hpa(paddr)) {
950 *shadow_pte |= gaddr;
951 *shadow_pte |= PT_SHADOW_IO_MARK;
952 *shadow_pte &= ~PT_PRESENT_MASK;
956 *shadow_pte |= paddr;
958 if (access_bits & PT_WRITABLE_MASK) {
959 struct kvm_mmu_page *shadow;
961 shadow = kvm_mmu_lookup_page(vcpu, gfn);
963 pgprintk("%s: found shadow page for %lx, marking ro\n",
965 access_bits &= ~PT_WRITABLE_MASK;
966 if (is_writeble_pte(*shadow_pte)) {
967 *shadow_pte &= ~PT_WRITABLE_MASK;
968 kvm_arch_ops->tlb_flush(vcpu);
973 if (access_bits & PT_WRITABLE_MASK)
974 mark_page_dirty(vcpu->kvm, gaddr >> PAGE_SHIFT);
976 page_header_update_slot(vcpu->kvm, shadow_pte, gaddr);
977 rmap_add(vcpu, shadow_pte);
980 static void inject_page_fault(struct kvm_vcpu *vcpu,
984 kvm_arch_ops->inject_page_fault(vcpu, addr, err_code);
987 static inline int fix_read_pf(u64 *shadow_ent)
989 if ((*shadow_ent & PT_SHADOW_USER_MASK) &&
990 !(*shadow_ent & PT_USER_MASK)) {
992 * If supervisor write protect is disabled, we shadow kernel
993 * pages as user pages so we can trap the write access.
995 *shadow_ent |= PT_USER_MASK;
996 *shadow_ent &= ~PT_WRITABLE_MASK;
1004 static void paging_free(struct kvm_vcpu *vcpu)
1006 nonpaging_free(vcpu);
1010 #include "paging_tmpl.h"
1014 #include "paging_tmpl.h"
1017 static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
1019 struct kvm_mmu *context = &vcpu->mmu;
1021 ASSERT(is_pae(vcpu));
1022 context->new_cr3 = paging_new_cr3;
1023 context->page_fault = paging64_page_fault;
1024 context->gva_to_gpa = paging64_gva_to_gpa;
1025 context->free = paging_free;
1026 context->root_level = level;
1027 context->shadow_root_level = level;
1028 mmu_alloc_roots(vcpu);
1029 ASSERT(VALID_PAGE(context->root_hpa));
1030 kvm_arch_ops->set_cr3(vcpu, context->root_hpa |
1031 (vcpu->cr3 & (CR3_PCD_MASK | CR3_WPT_MASK)));
1035 static int paging64_init_context(struct kvm_vcpu *vcpu)
1037 return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL);
1040 static int paging32_init_context(struct kvm_vcpu *vcpu)
1042 struct kvm_mmu *context = &vcpu->mmu;
1044 context->new_cr3 = paging_new_cr3;
1045 context->page_fault = paging32_page_fault;
1046 context->gva_to_gpa = paging32_gva_to_gpa;
1047 context->free = paging_free;
1048 context->root_level = PT32_ROOT_LEVEL;
1049 context->shadow_root_level = PT32E_ROOT_LEVEL;
1050 mmu_alloc_roots(vcpu);
1051 ASSERT(VALID_PAGE(context->root_hpa));
1052 kvm_arch_ops->set_cr3(vcpu, context->root_hpa |
1053 (vcpu->cr3 & (CR3_PCD_MASK | CR3_WPT_MASK)));
1057 static int paging32E_init_context(struct kvm_vcpu *vcpu)
1059 return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL);
1062 static int init_kvm_mmu(struct kvm_vcpu *vcpu)
1065 ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa));
1067 if (!is_paging(vcpu))
1068 return nonpaging_init_context(vcpu);
1069 else if (is_long_mode(vcpu))
1070 return paging64_init_context(vcpu);
1071 else if (is_pae(vcpu))
1072 return paging32E_init_context(vcpu);
1074 return paging32_init_context(vcpu);
1077 static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
1080 if (VALID_PAGE(vcpu->mmu.root_hpa)) {
1081 vcpu->mmu.free(vcpu);
1082 vcpu->mmu.root_hpa = INVALID_PAGE;
1086 int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
1090 destroy_kvm_mmu(vcpu);
1091 r = init_kvm_mmu(vcpu);
1094 r = mmu_topup_memory_caches(vcpu);
1099 static void mmu_pre_write_zap_pte(struct kvm_vcpu *vcpu,
1100 struct kvm_mmu_page *page,
1104 struct kvm_mmu_page *child;
1107 if (is_present_pte(pte)) {
1108 if (page->role.level == PT_PAGE_TABLE_LEVEL)
1109 rmap_remove(vcpu, spte);
1111 child = page_header(pte & PT64_BASE_ADDR_MASK);
1112 mmu_page_remove_parent_pte(vcpu, child, spte);
1118 void kvm_mmu_pre_write(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes)
1120 gfn_t gfn = gpa >> PAGE_SHIFT;
1121 struct kvm_mmu_page *page;
1122 struct hlist_node *node, *n;
1123 struct hlist_head *bucket;
1126 unsigned offset = offset_in_page(gpa);
1128 unsigned page_offset;
1129 unsigned misaligned;
1134 pgprintk("%s: gpa %llx bytes %d\n", __FUNCTION__, gpa, bytes);
1135 if (gfn == vcpu->last_pt_write_gfn) {
1136 ++vcpu->last_pt_write_count;
1137 if (vcpu->last_pt_write_count >= 3)
1140 vcpu->last_pt_write_gfn = gfn;
1141 vcpu->last_pt_write_count = 1;
1143 index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
1144 bucket = &vcpu->kvm->mmu_page_hash[index];
1145 hlist_for_each_entry_safe(page, node, n, bucket, hash_link) {
1146 if (page->gfn != gfn || page->role.metaphysical)
1148 pte_size = page->role.glevels == PT32_ROOT_LEVEL ? 4 : 8;
1149 misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
1150 if (misaligned || flooded) {
1152 * Misaligned accesses are too much trouble to fix
1153 * up; also, they usually indicate a page is not used
1156 * If we're seeing too many writes to a page,
1157 * it may no longer be a page table, or we may be
1158 * forking, in which case it is better to unmap the
1161 pgprintk("misaligned: gpa %llx bytes %d role %x\n",
1162 gpa, bytes, page->role.word);
1163 kvm_mmu_zap_page(vcpu, page);
1166 page_offset = offset;
1167 level = page->role.level;
1169 if (page->role.glevels == PT32_ROOT_LEVEL) {
1170 page_offset <<= 1; /* 32->64 */
1172 * A 32-bit pde maps 4MB while the shadow pdes map
1173 * only 2MB. So we need to double the offset again
1174 * and zap two pdes instead of one.
1176 if (level == PT32_ROOT_LEVEL) {
1177 page_offset &= ~7; /* kill rounding error */
1181 page_offset &= ~PAGE_MASK;
1183 spte = __va(page->page_hpa);
1184 spte += page_offset / sizeof(*spte);
1186 mmu_pre_write_zap_pte(vcpu, page, spte);
1192 void kvm_mmu_post_write(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes)
1196 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
1198 gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, gva);
1200 return kvm_mmu_unprotect_page(vcpu, gpa >> PAGE_SHIFT);
1203 void kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
1205 while (vcpu->kvm->n_free_mmu_pages < KVM_REFILL_PAGES) {
1206 struct kvm_mmu_page *page;
1208 page = container_of(vcpu->kvm->active_mmu_pages.prev,
1209 struct kvm_mmu_page, link);
1210 kvm_mmu_zap_page(vcpu, page);
1213 EXPORT_SYMBOL_GPL(kvm_mmu_free_some_pages);
1215 static void free_mmu_pages(struct kvm_vcpu *vcpu)
1217 struct kvm_mmu_page *page;
1219 while (!list_empty(&vcpu->kvm->active_mmu_pages)) {
1220 page = container_of(vcpu->kvm->active_mmu_pages.next,
1221 struct kvm_mmu_page, link);
1222 kvm_mmu_zap_page(vcpu, page);
1224 while (!list_empty(&vcpu->free_pages)) {
1225 page = list_entry(vcpu->free_pages.next,
1226 struct kvm_mmu_page, link);
1227 list_del(&page->link);
1228 __free_page(pfn_to_page(page->page_hpa >> PAGE_SHIFT));
1229 page->page_hpa = INVALID_PAGE;
1231 free_page((unsigned long)vcpu->mmu.pae_root);
1234 static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
1241 for (i = 0; i < KVM_NUM_MMU_PAGES; i++) {
1242 struct kvm_mmu_page *page_header = &vcpu->page_header_buf[i];
1244 INIT_LIST_HEAD(&page_header->link);
1245 if ((page = alloc_page(GFP_KERNEL)) == NULL)
1247 set_page_private(page, (unsigned long)page_header);
1248 page_header->page_hpa = (hpa_t)page_to_pfn(page) << PAGE_SHIFT;
1249 memset(__va(page_header->page_hpa), 0, PAGE_SIZE);
1250 list_add(&page_header->link, &vcpu->free_pages);
1251 ++vcpu->kvm->n_free_mmu_pages;
1255 * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
1256 * Therefore we need to allocate shadow page tables in the first
1257 * 4GB of memory, which happens to fit the DMA32 zone.
1259 page = alloc_page(GFP_KERNEL | __GFP_DMA32);
1262 vcpu->mmu.pae_root = page_address(page);
1263 for (i = 0; i < 4; ++i)
1264 vcpu->mmu.pae_root[i] = INVALID_PAGE;
1269 free_mmu_pages(vcpu);
1273 int kvm_mmu_create(struct kvm_vcpu *vcpu)
1276 ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa));
1277 ASSERT(list_empty(&vcpu->free_pages));
1279 return alloc_mmu_pages(vcpu);
1282 int kvm_mmu_setup(struct kvm_vcpu *vcpu)
1285 ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa));
1286 ASSERT(!list_empty(&vcpu->free_pages));
1288 return init_kvm_mmu(vcpu);
1291 void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
1295 destroy_kvm_mmu(vcpu);
1296 free_mmu_pages(vcpu);
1297 mmu_free_memory_caches(vcpu);
1300 void kvm_mmu_slot_remove_write_access(struct kvm_vcpu *vcpu, int slot)
1302 struct kvm *kvm = vcpu->kvm;
1303 struct kvm_mmu_page *page;
1305 list_for_each_entry(page, &kvm->active_mmu_pages, link) {
1309 if (!test_bit(slot, &page->slot_bitmap))
1312 pt = __va(page->page_hpa);
1313 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
1315 if (pt[i] & PT_WRITABLE_MASK) {
1316 rmap_remove(vcpu, &pt[i]);
1317 pt[i] &= ~PT_WRITABLE_MASK;
1322 void kvm_mmu_zap_all(struct kvm_vcpu *vcpu)
1324 destroy_kvm_mmu(vcpu);
1326 while (!list_empty(&vcpu->kvm->active_mmu_pages)) {
1327 struct kvm_mmu_page *page;
1329 page = container_of(vcpu->kvm->active_mmu_pages.next,
1330 struct kvm_mmu_page, link);
1331 kvm_mmu_zap_page(vcpu, page);
1334 mmu_free_memory_caches(vcpu);
1335 kvm_arch_ops->tlb_flush(vcpu);
1339 void kvm_mmu_module_exit(void)
1341 if (pte_chain_cache)
1342 kmem_cache_destroy(pte_chain_cache);
1343 if (rmap_desc_cache)
1344 kmem_cache_destroy(rmap_desc_cache);
1347 int kvm_mmu_module_init(void)
1349 pte_chain_cache = kmem_cache_create("kvm_pte_chain",
1350 sizeof(struct kvm_pte_chain),
1352 if (!pte_chain_cache)
1354 rmap_desc_cache = kmem_cache_create("kvm_rmap_desc",
1355 sizeof(struct kvm_rmap_desc),
1357 if (!rmap_desc_cache)
1363 kvm_mmu_module_exit();
1369 static const char *audit_msg;
1371 static gva_t canonicalize(gva_t gva)
1373 #ifdef CONFIG_X86_64
1374 gva = (long long)(gva << 16) >> 16;
1379 static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte,
1380 gva_t va, int level)
1382 u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK);
1384 gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1));
1386 for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) {
1389 if (!ent & PT_PRESENT_MASK)
1392 va = canonicalize(va);
1394 audit_mappings_page(vcpu, ent, va, level - 1);
1396 gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, va);
1397 hpa_t hpa = gpa_to_hpa(vcpu, gpa);
1399 if ((ent & PT_PRESENT_MASK)
1400 && (ent & PT64_BASE_ADDR_MASK) != hpa)
1401 printk(KERN_ERR "audit error: (%s) levels %d"
1402 " gva %lx gpa %llx hpa %llx ent %llx\n",
1403 audit_msg, vcpu->mmu.root_level,
1409 static void audit_mappings(struct kvm_vcpu *vcpu)
1413 if (vcpu->mmu.root_level == 4)
1414 audit_mappings_page(vcpu, vcpu->mmu.root_hpa, 0, 4);
1416 for (i = 0; i < 4; ++i)
1417 if (vcpu->mmu.pae_root[i] & PT_PRESENT_MASK)
1418 audit_mappings_page(vcpu,
1419 vcpu->mmu.pae_root[i],
1424 static int count_rmaps(struct kvm_vcpu *vcpu)
1429 for (i = 0; i < KVM_MEMORY_SLOTS; ++i) {
1430 struct kvm_memory_slot *m = &vcpu->kvm->memslots[i];
1431 struct kvm_rmap_desc *d;
1433 for (j = 0; j < m->npages; ++j) {
1434 struct page *page = m->phys_mem[j];
1438 if (!(page->private & 1)) {
1442 d = (struct kvm_rmap_desc *)(page->private & ~1ul);
1444 for (k = 0; k < RMAP_EXT; ++k)
1445 if (d->shadow_ptes[k])
1456 static int count_writable_mappings(struct kvm_vcpu *vcpu)
1459 struct kvm_mmu_page *page;
1462 list_for_each_entry(page, &vcpu->kvm->active_mmu_pages, link) {
1463 u64 *pt = __va(page->page_hpa);
1465 if (page->role.level != PT_PAGE_TABLE_LEVEL)
1468 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1471 if (!(ent & PT_PRESENT_MASK))
1473 if (!(ent & PT_WRITABLE_MASK))
1481 static void audit_rmap(struct kvm_vcpu *vcpu)
1483 int n_rmap = count_rmaps(vcpu);
1484 int n_actual = count_writable_mappings(vcpu);
1486 if (n_rmap != n_actual)
1487 printk(KERN_ERR "%s: (%s) rmap %d actual %d\n",
1488 __FUNCTION__, audit_msg, n_rmap, n_actual);
1491 static void audit_write_protection(struct kvm_vcpu *vcpu)
1493 struct kvm_mmu_page *page;
1495 list_for_each_entry(page, &vcpu->kvm->active_mmu_pages, link) {
1499 if (page->role.metaphysical)
1502 hfn = gpa_to_hpa(vcpu, (gpa_t)page->gfn << PAGE_SHIFT)
1504 pg = pfn_to_page(hfn);
1506 printk(KERN_ERR "%s: (%s) shadow page has writable"
1507 " mappings: gfn %lx role %x\n",
1508 __FUNCTION__, audit_msg, page->gfn,
1513 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg)
1520 audit_write_protection(vcpu);
1521 audit_mappings(vcpu);