drivers/kvm/vmx.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * This module enables machines with Intel VT-x extensions to run virtual
   5  * machines without emulation or binary translation.
   6  *
   7  * Copyright (C) 2006 Qumranet, Inc.
   8  *
   9  * Authors:
  10  *   Avi Kivity   <avi@qumranet.com>
  11  *   Yaniv Kamay  <yaniv@qumranet.com>
  12  *
  13  * This work is licensed under the terms of the GNU GPL, version 2.  See
  14  * the COPYING file in the top-level directory.
  15  *
  16  */
  17
  18 #include "kvm.h"
  19 #include "vmx.h"
  20 #include <linux/module.h>
  21 #include <linux/kernel.h>
  22 #include <linux/mm.h>
  23 #include <linux/highmem.h>
  24 #include <linux/profile.h>
  25 #include <linux/sched.h>
  26 #include <asm/io.h>
  27 #include <asm/desc.h>
  28
  29 #include "segment_descriptor.h"
  30
  31 MODULE_AUTHOR("Qumranet");
  32 MODULE_LICENSE("GPL");
  33
  34 static DEFINE_PER_CPU(struct vmcs *, vmxarea);
  35 static DEFINE_PER_CPU(struct vmcs *, current_vmcs);
  36
  37 #ifdef CONFIG_X86_64
  38 #define HOST_IS_64 1
  39 #else
  40 #define HOST_IS_64 0
  41 #endif
  42
  43 static struct vmcs_descriptor {
  44         int size;
  45         int order;
  46         u32 revision_id;
  47 } vmcs_descriptor;
  48
  49 #define VMX_SEGMENT_FIELD(seg)                                  \
  50         [VCPU_SREG_##seg] = {                                   \
  51                 .selector = GUEST_##seg##_SELECTOR,             \
  52                 .base = GUEST_##seg##_BASE,                     \
  53                 .limit = GUEST_##seg##_LIMIT,                   \
  54                 .ar_bytes = GUEST_##seg##_AR_BYTES,             \
  55         }
  56
  57 static struct kvm_vmx_segment_field {
  58         unsigned selector;
  59         unsigned base;
  60         unsigned limit;
  61         unsigned ar_bytes;
  62 } kvm_vmx_segment_fields[] = {
  63         VMX_SEGMENT_FIELD(CS),
  64         VMX_SEGMENT_FIELD(DS),
  65         VMX_SEGMENT_FIELD(ES),
  66         VMX_SEGMENT_FIELD(FS),
  67         VMX_SEGMENT_FIELD(GS),
  68         VMX_SEGMENT_FIELD(SS),
  69         VMX_SEGMENT_FIELD(TR),
  70         VMX_SEGMENT_FIELD(LDTR),
  71 };
  72
  73 /*
  74  * Keep MSR_K6_STAR at the end, as setup_msrs() will try to optimize it
  75  * away by decrementing the array size.
  76  */
  77 static const u32 vmx_msr_index[] = {
  78 #ifdef CONFIG_X86_64
  79         MSR_SYSCALL_MASK, MSR_LSTAR, MSR_CSTAR, MSR_KERNEL_GS_BASE,
  80 #endif
  81         MSR_EFER, MSR_K6_STAR,
  82 };
  83 #define NR_VMX_MSR ARRAY_SIZE(vmx_msr_index)
  84
  85 #ifdef CONFIG_X86_64
  86 static unsigned msr_offset_kernel_gs_base;
  87 #define NR_64BIT_MSRS 4
  88 /*
  89  * avoid save/load MSR_SYSCALL_MASK and MSR_LSTAR by std vt
  90  * mechanism (cpu bug AA24)
  91  */
  92 #define NR_BAD_MSRS 2
  93 #else
  94 #define NR_64BIT_MSRS 0
  95 #define NR_BAD_MSRS 0
  96 #endif
  97
  98 static inline int is_page_fault(u32 intr_info)
  99 {
 100         return (intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VECTOR_MASK |
 101                              INTR_INFO_VALID_MASK)) ==
 102                 (INTR_TYPE_EXCEPTION | PF_VECTOR | INTR_INFO_VALID_MASK);
 103 }
 104
 105 static inline int is_no_device(u32 intr_info)
 106 {
 107         return (intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VECTOR_MASK |
 108                              INTR_INFO_VALID_MASK)) ==
 109                 (INTR_TYPE_EXCEPTION | NM_VECTOR | INTR_INFO_VALID_MASK);
 110 }
 111
 112 static inline int is_external_interrupt(u32 intr_info)
 113 {
 114         return (intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VALID_MASK))
 115                 == (INTR_TYPE_EXT_INTR | INTR_INFO_VALID_MASK);
 116 }
 117
 118 static struct vmx_msr_entry *find_msr_entry(struct kvm_vcpu *vcpu, u32 msr)
 119 {
 120         int i;
 121
 122         for (i = 0; i < vcpu->nmsrs; ++i)
 123                 if (vcpu->guest_msrs[i].index == msr)
 124                         return &vcpu->guest_msrs[i];
 125         return NULL;
 126 }
 127
 128 static void vmcs_clear(struct vmcs *vmcs)
 129 {
 130         u64 phys_addr = __pa(vmcs);
 131         u8 error;
 132
 133         asm volatile (ASM_VMX_VMCLEAR_RAX "; setna %0"
 134                       : "=g"(error) : "a"(&phys_addr), "m"(phys_addr)
 135                       : "cc", "memory");
 136         if (error)
 137                 printk(KERN_ERR "kvm: vmclear fail: %p/%llx\n",
 138                        vmcs, phys_addr);
 139 }
 140
 141 static void __vcpu_clear(void *arg)
 142 {
 143         struct kvm_vcpu *vcpu = arg;
 144         int cpu = raw_smp_processor_id();
 145
 146         if (vcpu->cpu == cpu)
 147                 vmcs_clear(vcpu->vmcs);
 148         if (per_cpu(current_vmcs, cpu) == vcpu->vmcs)
 149                 per_cpu(current_vmcs, cpu) = NULL;
 150 }
 151
 152 static void vcpu_clear(struct kvm_vcpu *vcpu)
 153 {
 154         if (vcpu->cpu != raw_smp_processor_id() && vcpu->cpu != -1)
 155                 smp_call_function_single(vcpu->cpu, __vcpu_clear, vcpu, 0, 1);
 156         else
 157                 __vcpu_clear(vcpu);
 158         vcpu->launched = 0;
 159 }
 160
 161 static unsigned long vmcs_readl(unsigned long field)
 162 {
 163         unsigned long value;
 164
 165         asm volatile (ASM_VMX_VMREAD_RDX_RAX
 166                       : "=a"(value) : "d"(field) : "cc");
 167         return value;
 168 }
 169
 170 static u16 vmcs_read16(unsigned long field)
 171 {
 172         return vmcs_readl(field);
 173 }
 174
 175 static u32 vmcs_read32(unsigned long field)
 176 {
 177         return vmcs_readl(field);
 178 }
 179
 180 static u64 vmcs_read64(unsigned long field)
 181 {
 182 #ifdef CONFIG_X86_64
 183         return vmcs_readl(field);
 184 #else
 185         return vmcs_readl(field) | ((u64)vmcs_readl(field+1) << 32);
 186 #endif
 187 }
 188
 189 static noinline void vmwrite_error(unsigned long field, unsigned long value)
 190 {
 191         printk(KERN_ERR "vmwrite error: reg %lx value %lx (err %d)\n",
 192                field, value, vmcs_read32(VM_INSTRUCTION_ERROR));
 193         dump_stack();
 194 }
 195
 196 static void vmcs_writel(unsigned long field, unsigned long value)
 197 {
 198         u8 error;
 199
 200         asm volatile (ASM_VMX_VMWRITE_RAX_RDX "; setna %0"
 201                        : "=q"(error) : "a"(value), "d"(field) : "cc" );
 202         if (unlikely(error))
 203                 vmwrite_error(field, value);
 204 }
 205
 206 static void vmcs_write16(unsigned long field, u16 value)
 207 {
 208         vmcs_writel(field, value);
 209 }
 210
 211 static void vmcs_write32(unsigned long field, u32 value)
 212 {
 213         vmcs_writel(field, value);
 214 }
 215
 216 static void vmcs_write64(unsigned long field, u64 value)
 217 {
 218 #ifdef CONFIG_X86_64
 219         vmcs_writel(field, value);
 220 #else
 221         vmcs_writel(field, value);
 222         asm volatile ("");
 223         vmcs_writel(field+1, value >> 32);
 224 #endif
 225 }
 226
 227 static void vmcs_clear_bits(unsigned long field, u32 mask)
 228 {
 229         vmcs_writel(field, vmcs_readl(field) & ~mask);
 230 }
 231
 232 static void vmcs_set_bits(unsigned long field, u32 mask)
 233 {
 234         vmcs_writel(field, vmcs_readl(field) | mask);
 235 }
 236
 237 /*
 238  * Switches to specified vcpu, until a matching vcpu_put(), but assumes
 239  * vcpu mutex is already taken.
 240  */
 241 static void vmx_vcpu_load(struct kvm_vcpu *vcpu)
 242 {
 243         u64 phys_addr = __pa(vcpu->vmcs);
 244         int cpu;
 245
 246         cpu = get_cpu();
 247
 248         if (vcpu->cpu != cpu)
 249                 vcpu_clear(vcpu);
 250
 251         if (per_cpu(current_vmcs, cpu) != vcpu->vmcs) {
 252                 u8 error;
 253
 254                 per_cpu(current_vmcs, cpu) = vcpu->vmcs;
 255                 asm volatile (ASM_VMX_VMPTRLD_RAX "; setna %0"
 256                               : "=g"(error) : "a"(&phys_addr), "m"(phys_addr)
 257                               : "cc");
 258                 if (error)
 259                         printk(KERN_ERR "kvm: vmptrld %p/%llx fail\n",
 260                                vcpu->vmcs, phys_addr);
 261         }
 262
 263         if (vcpu->cpu != cpu) {
 264                 struct descriptor_table dt;
 265                 unsigned long sysenter_esp;
 266
 267                 vcpu->cpu = cpu;
 268                 /*
 269                  * Linux uses per-cpu TSS and GDT, so set these when switching
 270                  * processors.
 271                  */
 272                 vmcs_writel(HOST_TR_BASE, read_tr_base()); /* 22.2.4 */
 273                 get_gdt(&dt);
 274                 vmcs_writel(HOST_GDTR_BASE, dt.base);   /* 22.2.4 */
 275
 276                 rdmsrl(MSR_IA32_SYSENTER_ESP, sysenter_esp);
 277                 vmcs_writel(HOST_IA32_SYSENTER_ESP, sysenter_esp); /* 22.2.3 */
 278         }
 279 }
 280
 281 static void vmx_vcpu_put(struct kvm_vcpu *vcpu)
 282 {
 283         put_cpu();
 284 }
 285
 286 static void vmx_vcpu_decache(struct kvm_vcpu *vcpu)
 287 {
 288         vcpu_clear(vcpu);
 289 }
 290
 291 static unsigned long vmx_get_rflags(struct kvm_vcpu *vcpu)
 292 {
 293         return vmcs_readl(GUEST_RFLAGS);
 294 }
 295
 296 static void vmx_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
 297 {
 298         vmcs_writel(GUEST_RFLAGS, rflags);
 299 }
 300
 301 static void skip_emulated_instruction(struct kvm_vcpu *vcpu)
 302 {
 303         unsigned long rip;
 304         u32 interruptibility;
 305
 306         rip = vmcs_readl(GUEST_RIP);
 307         rip += vmcs_read32(VM_EXIT_INSTRUCTION_LEN);
 308         vmcs_writel(GUEST_RIP, rip);
 309
 310         /*
 311          * We emulated an instruction, so temporary interrupt blocking
 312          * should be removed, if set.
 313          */
 314         interruptibility = vmcs_read32(GUEST_INTERRUPTIBILITY_INFO);
 315         if (interruptibility & 3)
 316                 vmcs_write32(GUEST_INTERRUPTIBILITY_INFO,
 317                              interruptibility & ~3);
 318         vcpu->interrupt_window_open = 1;
 319 }
 320
 321 static void vmx_inject_gp(struct kvm_vcpu *vcpu, unsigned error_code)
 322 {
 323         printk(KERN_DEBUG "inject_general_protection: rip 0x%lx\n",
 324                vmcs_readl(GUEST_RIP));
 325         vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE, error_code);
 326         vmcs_write32(VM_ENTRY_INTR_INFO_FIELD,
 327                      GP_VECTOR |
 328                      INTR_TYPE_EXCEPTION |
 329                      INTR_INFO_DELIEVER_CODE_MASK |
 330                      INTR_INFO_VALID_MASK);
 331 }
 332
 333 /*
 334  * Set up the vmcs to automatically save and restore system
 335  * msrs.  Don't touch the 64-bit msrs if the guest is in legacy
 336  * mode, as fiddling with msrs is very expensive.
 337  */
 338 static void setup_msrs(struct kvm_vcpu *vcpu)
 339 {
 340         int nr_skip, nr_good_msrs;
 341
 342         if (is_long_mode(vcpu))
 343                 nr_skip = NR_BAD_MSRS;
 344         else
 345                 nr_skip = NR_64BIT_MSRS;
 346         nr_good_msrs = vcpu->nmsrs - nr_skip;
 347
 348         /*
 349          * MSR_K6_STAR is only needed on long mode guests, and only
 350          * if efer.sce is enabled.
 351          */
 352         if (find_msr_entry(vcpu, MSR_K6_STAR)) {
 353                 --nr_good_msrs;
 354 #ifdef CONFIG_X86_64
 355                 if (is_long_mode(vcpu) && (vcpu->shadow_efer & EFER_SCE))
 356                         ++nr_good_msrs;
 357 #endif
 358         }
 359
 360         vmcs_writel(VM_ENTRY_MSR_LOAD_ADDR,
 361                     virt_to_phys(vcpu->guest_msrs + nr_skip));
 362         vmcs_writel(VM_EXIT_MSR_STORE_ADDR,
 363                     virt_to_phys(vcpu->guest_msrs + nr_skip));
 364         vmcs_writel(VM_EXIT_MSR_LOAD_ADDR,
 365                     virt_to_phys(vcpu->host_msrs + nr_skip));
 366         vmcs_write32(VM_EXIT_MSR_STORE_COUNT, nr_good_msrs); /* 22.2.2 */
 367         vmcs_write32(VM_EXIT_MSR_LOAD_COUNT, nr_good_msrs);  /* 22.2.2 */
 368         vmcs_write32(VM_ENTRY_MSR_LOAD_COUNT, nr_good_msrs); /* 22.2.2 */
 369 }
 370
 371 /*
 372  * reads and returns guest's timestamp counter "register"
 373  * guest_tsc = host_tsc + tsc_offset    -- 21.3
 374  */
 375 static u64 guest_read_tsc(void)
 376 {
 377         u64 host_tsc, tsc_offset;
 378
 379         rdtscll(host_tsc);
 380         tsc_offset = vmcs_read64(TSC_OFFSET);
 381         return host_tsc + tsc_offset;
 382 }
 383
 384 /*
 385  * writes 'guest_tsc' into guest's timestamp counter "register"
 386  * guest_tsc = host_tsc + tsc_offset ==> tsc_offset = guest_tsc - host_tsc
 387  */
 388 static void guest_write_tsc(u64 guest_tsc)
 389 {
 390         u64 host_tsc;
 391
 392         rdtscll(host_tsc);
 393         vmcs_write64(TSC_OFFSET, guest_tsc - host_tsc);
 394 }
 395
 396 static void reload_tss(void)
 397 {
 398 #ifndef CONFIG_X86_64
 399
 400         /*
 401          * VT restores TR but not its size.  Useless.
 402          */
 403         struct descriptor_table gdt;
 404         struct segment_descriptor *descs;
 405
 406         get_gdt(&gdt);
 407         descs = (void *)gdt.base;
 408         descs[GDT_ENTRY_TSS].type = 9; /* available TSS */
 409         load_TR_desc();
 410 #endif
 411 }
 412
 413 /*
 414  * Reads an msr value (of 'msr_index') into 'pdata'.
 415  * Returns 0 on success, non-0 otherwise.
 416  * Assumes vcpu_load() was already called.
 417  */
 418 static int vmx_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
 419 {
 420         u64 data;
 421         struct vmx_msr_entry *msr;
 422
 423         if (!pdata) {
 424                 printk(KERN_ERR "BUG: get_msr called with NULL pdata\n");
 425                 return -EINVAL;
 426         }
 427
 428         switch (msr_index) {
 429 #ifdef CONFIG_X86_64
 430         case MSR_FS_BASE:
 431                 data = vmcs_readl(GUEST_FS_BASE);
 432                 break;
 433         case MSR_GS_BASE:
 434                 data = vmcs_readl(GUEST_GS_BASE);
 435                 break;
 436         case MSR_EFER:
 437                 return kvm_get_msr_common(vcpu, msr_index, pdata);
 438 #endif
 439         case MSR_IA32_TIME_STAMP_COUNTER:
 440                 data = guest_read_tsc();
 441                 break;
 442         case MSR_IA32_SYSENTER_CS:
 443                 data = vmcs_read32(GUEST_SYSENTER_CS);
 444                 break;
 445         case MSR_IA32_SYSENTER_EIP:
 446                 data = vmcs_readl(GUEST_SYSENTER_EIP);
 447                 break;
 448         case MSR_IA32_SYSENTER_ESP:
 449                 data = vmcs_readl(GUEST_SYSENTER_ESP);
 450                 break;
 451         default:
 452                 msr = find_msr_entry(vcpu, msr_index);
 453                 if (msr) {
 454                         data = msr->data;
 455                         break;
 456                 }
 457                 return kvm_get_msr_common(vcpu, msr_index, pdata);
 458         }
 459
 460         *pdata = data;
 461         return 0;
 462 }
 463
 464 /*
 465  * Writes msr value into into the appropriate "register".
 466  * Returns 0 on success, non-0 otherwise.
 467  * Assumes vcpu_load() was already called.
 468  */
 469 static int vmx_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
 470 {
 471         struct vmx_msr_entry *msr;
 472         switch (msr_index) {
 473 #ifdef CONFIG_X86_64
 474         case MSR_EFER:
 475                 return kvm_set_msr_common(vcpu, msr_index, data);
 476         case MSR_FS_BASE:
 477                 vmcs_writel(GUEST_FS_BASE, data);
 478                 break;
 479         case MSR_GS_BASE:
 480                 vmcs_writel(GUEST_GS_BASE, data);
 481                 break;
 482 #endif
 483         case MSR_IA32_SYSENTER_CS:
 484                 vmcs_write32(GUEST_SYSENTER_CS, data);
 485                 break;
 486         case MSR_IA32_SYSENTER_EIP:
 487                 vmcs_writel(GUEST_SYSENTER_EIP, data);
 488                 break;
 489         case MSR_IA32_SYSENTER_ESP:
 490                 vmcs_writel(GUEST_SYSENTER_ESP, data);
 491                 break;
 492         case MSR_IA32_TIME_STAMP_COUNTER:
 493                 guest_write_tsc(data);
 494                 break;
 495         default:
 496                 msr = find_msr_entry(vcpu, msr_index);
 497                 if (msr) {
 498                         msr->data = data;
 499                         break;
 500                 }
 501                 return kvm_set_msr_common(vcpu, msr_index, data);
 502                 msr->data = data;
 503                 break;
 504         }
 505
 506         return 0;
 507 }
 508
 509 /*
 510  * Sync the rsp and rip registers into the vcpu structure.  This allows
 511  * registers to be accessed by indexing vcpu->regs.
 512  */
 513 static void vcpu_load_rsp_rip(struct kvm_vcpu *vcpu)
 514 {
 515         vcpu->regs[VCPU_REGS_RSP] = vmcs_readl(GUEST_RSP);
 516         vcpu->rip = vmcs_readl(GUEST_RIP);
 517 }
 518
 519 /*
 520  * Syncs rsp and rip back into the vmcs.  Should be called after possible
 521  * modification.
 522  */
 523 static void vcpu_put_rsp_rip(struct kvm_vcpu *vcpu)
 524 {
 525         vmcs_writel(GUEST_RSP, vcpu->regs[VCPU_REGS_RSP]);
 526         vmcs_writel(GUEST_RIP, vcpu->rip);
 527 }
 528
 529 static int set_guest_debug(struct kvm_vcpu *vcpu, struct kvm_debug_guest *dbg)
 530 {
 531         unsigned long dr7 = 0x400;
 532         u32 exception_bitmap;
 533         int old_singlestep;
 534
 535         exception_bitmap = vmcs_read32(EXCEPTION_BITMAP);
 536         old_singlestep = vcpu->guest_debug.singlestep;
 537
 538         vcpu->guest_debug.enabled = dbg->enabled;
 539         if (vcpu->guest_debug.enabled) {
 540                 int i;
 541
 542                 dr7 |= 0x200;  /* exact */
 543                 for (i = 0; i < 4; ++i) {
 544                         if (!dbg->breakpoints[i].enabled)
 545                                 continue;
 546                         vcpu->guest_debug.bp[i] = dbg->breakpoints[i].address;
 547                         dr7 |= 2 << (i*2);    /* global enable */
 548                         dr7 |= 0 << (i*4+16); /* execution breakpoint */
 549                 }
 550
 551                 exception_bitmap |= (1u << 1);  /* Trap debug exceptions */
 552
 553                 vcpu->guest_debug.singlestep = dbg->singlestep;
 554         } else {
 555                 exception_bitmap &= ~(1u << 1); /* Ignore debug exceptions */
 556                 vcpu->guest_debug.singlestep = 0;
 557         }
 558
 559         if (old_singlestep && !vcpu->guest_debug.singlestep) {
 560                 unsigned long flags;
 561
 562                 flags = vmcs_readl(GUEST_RFLAGS);
 563                 flags &= ~(X86_EFLAGS_TF | X86_EFLAGS_RF);
 564                 vmcs_writel(GUEST_RFLAGS, flags);
 565         }
 566
 567         vmcs_write32(EXCEPTION_BITMAP, exception_bitmap);
 568         vmcs_writel(GUEST_DR7, dr7);
 569
 570         return 0;
 571 }
 572
 573 static __init int cpu_has_kvm_support(void)
 574 {
 575         unsigned long ecx = cpuid_ecx(1);
 576         return test_bit(5, &ecx); /* CPUID.1:ECX.VMX[bit 5] -> VT */
 577 }
 578
 579 static __init int vmx_disabled_by_bios(void)
 580 {
 581         u64 msr;
 582
 583         rdmsrl(MSR_IA32_FEATURE_CONTROL, msr);
 584         return (msr & 5) == 1; /* locked but not enabled */
 585 }
 586
 587 static void hardware_enable(void *garbage)
 588 {
 589         int cpu = raw_smp_processor_id();
 590         u64 phys_addr = __pa(per_cpu(vmxarea, cpu));
 591         u64 old;
 592
 593         rdmsrl(MSR_IA32_FEATURE_CONTROL, old);
 594         if ((old & 5) != 5)
 595                 /* enable and lock */
 596                 wrmsrl(MSR_IA32_FEATURE_CONTROL, old | 5);
 597         write_cr4(read_cr4() | CR4_VMXE); /* FIXME: not cpu hotplug safe */
 598         asm volatile (ASM_VMX_VMXON_RAX : : "a"(&phys_addr), "m"(phys_addr)
 599                       : "memory", "cc");
 600 }
 601
 602 static void hardware_disable(void *garbage)
 603 {
 604         asm volatile (ASM_VMX_VMXOFF : : : "cc");
 605 }
 606
 607 static __init void setup_vmcs_descriptor(void)
 608 {
 609         u32 vmx_msr_low, vmx_msr_high;
 610
 611         rdmsr(MSR_IA32_VMX_BASIC, vmx_msr_low, vmx_msr_high);
 612         vmcs_descriptor.size = vmx_msr_high & 0x1fff;
 613         vmcs_descriptor.order = get_order(vmcs_descriptor.size);
 614         vmcs_descriptor.revision_id = vmx_msr_low;
 615 }
 616
 617 static struct vmcs *alloc_vmcs_cpu(int cpu)
 618 {
 619         int node = cpu_to_node(cpu);
 620         struct page *pages;
 621         struct vmcs *vmcs;
 622
 623         pages = alloc_pages_node(node, GFP_KERNEL, vmcs_descriptor.order);
 624         if (!pages)
 625                 return NULL;
 626         vmcs = page_address(pages);
 627         memset(vmcs, 0, vmcs_descriptor.size);
 628         vmcs->revision_id = vmcs_descriptor.revision_id; /* vmcs revision id */
 629         return vmcs;
 630 }
 631
 632 static struct vmcs *alloc_vmcs(void)
 633 {
 634         return alloc_vmcs_cpu(raw_smp_processor_id());
 635 }
 636
 637 static void free_vmcs(struct vmcs *vmcs)
 638 {
 639         free_pages((unsigned long)vmcs, vmcs_descriptor.order);
 640 }
 641
 642 static void free_kvm_area(void)
 643 {
 644         int cpu;
 645
 646         for_each_online_cpu(cpu)
 647                 free_vmcs(per_cpu(vmxarea, cpu));
 648 }
 649
 650 extern struct vmcs *alloc_vmcs_cpu(int cpu);
 651
 652 static __init int alloc_kvm_area(void)
 653 {
 654         int cpu;
 655
 656         for_each_online_cpu(cpu) {
 657                 struct vmcs *vmcs;
 658
 659                 vmcs = alloc_vmcs_cpu(cpu);
 660                 if (!vmcs) {
 661                         free_kvm_area();
 662                         return -ENOMEM;
 663                 }
 664
 665                 per_cpu(vmxarea, cpu) = vmcs;
 666         }
 667         return 0;
 668 }
 669
 670 static __init int hardware_setup(void)
 671 {
 672         setup_vmcs_descriptor();
 673         return alloc_kvm_area();
 674 }
 675
 676 static __exit void hardware_unsetup(void)
 677 {
 678         free_kvm_area();
 679 }
 680
 681 static void update_exception_bitmap(struct kvm_vcpu *vcpu)
 682 {
 683         if (vcpu->rmode.active)
 684                 vmcs_write32(EXCEPTION_BITMAP, ~0);
 685         else
 686                 vmcs_write32(EXCEPTION_BITMAP, 1 << PF_VECTOR);
 687 }
 688
 689 static void fix_pmode_dataseg(int seg, struct kvm_save_segment *save)
 690 {
 691         struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
 692
 693         if (vmcs_readl(sf->base) == save->base && (save->base & AR_S_MASK)) {
 694                 vmcs_write16(sf->selector, save->selector);
 695                 vmcs_writel(sf->base, save->base);
 696                 vmcs_write32(sf->limit, save->limit);
 697                 vmcs_write32(sf->ar_bytes, save->ar);
 698         } else {
 699                 u32 dpl = (vmcs_read16(sf->selector) & SELECTOR_RPL_MASK)
 700                         << AR_DPL_SHIFT;
 701                 vmcs_write32(sf->ar_bytes, 0x93 | dpl);
 702         }
 703 }
 704
 705 static void enter_pmode(struct kvm_vcpu *vcpu)
 706 {
 707         unsigned long flags;
 708
 709         vcpu->rmode.active = 0;
 710
 711         vmcs_writel(GUEST_TR_BASE, vcpu->rmode.tr.base);
 712         vmcs_write32(GUEST_TR_LIMIT, vcpu->rmode.tr.limit);
 713         vmcs_write32(GUEST_TR_AR_BYTES, vcpu->rmode.tr.ar);
 714
 715         flags = vmcs_readl(GUEST_RFLAGS);
 716         flags &= ~(IOPL_MASK | X86_EFLAGS_VM);
 717         flags |= (vcpu->rmode.save_iopl << IOPL_SHIFT);
 718         vmcs_writel(GUEST_RFLAGS, flags);
 719
 720         vmcs_writel(GUEST_CR4, (vmcs_readl(GUEST_CR4) & ~CR4_VME_MASK) |
 721                         (vmcs_readl(CR4_READ_SHADOW) & CR4_VME_MASK));
 722
 723         update_exception_bitmap(vcpu);
 724
 725         fix_pmode_dataseg(VCPU_SREG_ES, &vcpu->rmode.es);
 726         fix_pmode_dataseg(VCPU_SREG_DS, &vcpu->rmode.ds);
 727         fix_pmode_dataseg(VCPU_SREG_GS, &vcpu->rmode.gs);
 728         fix_pmode_dataseg(VCPU_SREG_FS, &vcpu->rmode.fs);
 729
 730         vmcs_write16(GUEST_SS_SELECTOR, 0);
 731         vmcs_write32(GUEST_SS_AR_BYTES, 0x93);
 732
 733         vmcs_write16(GUEST_CS_SELECTOR,
 734                      vmcs_read16(GUEST_CS_SELECTOR) & ~SELECTOR_RPL_MASK);
 735         vmcs_write32(GUEST_CS_AR_BYTES, 0x9b);
 736 }
 737
 738 static int rmode_tss_base(struct kvm* kvm)
 739 {
 740         gfn_t base_gfn = kvm->memslots[0].base_gfn + kvm->memslots[0].npages - 3;
 741         return base_gfn << PAGE_SHIFT;
 742 }
 743
 744 static void fix_rmode_seg(int seg, struct kvm_save_segment *save)
 745 {
 746         struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
 747
 748         save->selector = vmcs_read16(sf->selector);
 749         save->base = vmcs_readl(sf->base);
 750         save->limit = vmcs_read32(sf->limit);
 751         save->ar = vmcs_read32(sf->ar_bytes);
 752         vmcs_write16(sf->selector, vmcs_readl(sf->base) >> 4);
 753         vmcs_write32(sf->limit, 0xffff);
 754         vmcs_write32(sf->ar_bytes, 0xf3);
 755 }
 756
 757 static void enter_rmode(struct kvm_vcpu *vcpu)
 758 {
 759         unsigned long flags;
 760
 761         vcpu->rmode.active = 1;
 762
 763         vcpu->rmode.tr.base = vmcs_readl(GUEST_TR_BASE);
 764         vmcs_writel(GUEST_TR_BASE, rmode_tss_base(vcpu->kvm));
 765
 766         vcpu->rmode.tr.limit = vmcs_read32(GUEST_TR_LIMIT);
 767         vmcs_write32(GUEST_TR_LIMIT, RMODE_TSS_SIZE - 1);
 768
 769         vcpu->rmode.tr.ar = vmcs_read32(GUEST_TR_AR_BYTES);
 770         vmcs_write32(GUEST_TR_AR_BYTES, 0x008b);
 771
 772         flags = vmcs_readl(GUEST_RFLAGS);
 773         vcpu->rmode.save_iopl = (flags & IOPL_MASK) >> IOPL_SHIFT;
 774
 775         flags |= IOPL_MASK | X86_EFLAGS_VM;
 776
 777         vmcs_writel(GUEST_RFLAGS, flags);
 778         vmcs_writel(GUEST_CR4, vmcs_readl(GUEST_CR4) | CR4_VME_MASK);
 779         update_exception_bitmap(vcpu);
 780
 781         vmcs_write16(GUEST_SS_SELECTOR, vmcs_readl(GUEST_SS_BASE) >> 4);
 782         vmcs_write32(GUEST_SS_LIMIT, 0xffff);
 783         vmcs_write32(GUEST_SS_AR_BYTES, 0xf3);
 784
 785         vmcs_write32(GUEST_CS_AR_BYTES, 0xf3);
 786         vmcs_write32(GUEST_CS_LIMIT, 0xffff);
 787         if (vmcs_readl(GUEST_CS_BASE) == 0xffff0000)
 788                 vmcs_writel(GUEST_CS_BASE, 0xf0000);
 789         vmcs_write16(GUEST_CS_SELECTOR, vmcs_readl(GUEST_CS_BASE) >> 4);
 790
 791         fix_rmode_seg(VCPU_SREG_ES, &vcpu->rmode.es);
 792         fix_rmode_seg(VCPU_SREG_DS, &vcpu->rmode.ds);
 793         fix_rmode_seg(VCPU_SREG_GS, &vcpu->rmode.gs);
 794         fix_rmode_seg(VCPU_SREG_FS, &vcpu->rmode.fs);
 795 }
 796
 797 #ifdef CONFIG_X86_64
 798
 799 static void enter_lmode(struct kvm_vcpu *vcpu)
 800 {
 801         u32 guest_tr_ar;
 802
 803         guest_tr_ar = vmcs_read32(GUEST_TR_AR_BYTES);
 804         if ((guest_tr_ar & AR_TYPE_MASK) != AR_TYPE_BUSY_64_TSS) {
 805                 printk(KERN_DEBUG "%s: tss fixup for long mode. \n",
 806                        __FUNCTION__);
 807                 vmcs_write32(GUEST_TR_AR_BYTES,
 808                              (guest_tr_ar & ~AR_TYPE_MASK)
 809                              | AR_TYPE_BUSY_64_TSS);
 810         }
 811
 812         vcpu->shadow_efer |= EFER_LMA;
 813
 814         find_msr_entry(vcpu, MSR_EFER)->data |= EFER_LMA | EFER_LME;
 815         vmcs_write32(VM_ENTRY_CONTROLS,
 816                      vmcs_read32(VM_ENTRY_CONTROLS)
 817                      | VM_ENTRY_CONTROLS_IA32E_MASK);
 818 }
 819
 820 static void exit_lmode(struct kvm_vcpu *vcpu)
 821 {
 822         vcpu->shadow_efer &= ~EFER_LMA;
 823
 824         vmcs_write32(VM_ENTRY_CONTROLS,
 825                      vmcs_read32(VM_ENTRY_CONTROLS)
 826                      & ~VM_ENTRY_CONTROLS_IA32E_MASK);
 827 }
 828
 829 #endif
 830
 831 static void vmx_decache_cr4_guest_bits(struct kvm_vcpu *vcpu)
 832 {
 833         vcpu->cr4 &= KVM_GUEST_CR4_MASK;
 834         vcpu->cr4 |= vmcs_readl(GUEST_CR4) & ~KVM_GUEST_CR4_MASK;
 835 }
 836
 837 static void vmx_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 838 {
 839         if (vcpu->rmode.active && (cr0 & CR0_PE_MASK))
 840                 enter_pmode(vcpu);
 841
 842         if (!vcpu->rmode.active && !(cr0 & CR0_PE_MASK))
 843                 enter_rmode(vcpu);
 844
 845 #ifdef CONFIG_X86_64
 846         if (vcpu->shadow_efer & EFER_LME) {
 847                 if (!is_paging(vcpu) && (cr0 & CR0_PG_MASK))
 848                         enter_lmode(vcpu);
 849                 if (is_paging(vcpu) && !(cr0 & CR0_PG_MASK))
 850                         exit_lmode(vcpu);
 851         }
 852 #endif
 853
 854         if (!(cr0 & CR0_TS_MASK)) {
 855                 vcpu->fpu_active = 1;
 856                 vmcs_clear_bits(EXCEPTION_BITMAP, CR0_TS_MASK);
 857         }
 858
 859         vmcs_writel(CR0_READ_SHADOW, cr0);
 860         vmcs_writel(GUEST_CR0,
 861                     (cr0 & ~KVM_GUEST_CR0_MASK) | KVM_VM_CR0_ALWAYS_ON);
 862         vcpu->cr0 = cr0;
 863 }
 864
 865 static void vmx_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 866 {
 867         vmcs_writel(GUEST_CR3, cr3);
 868
 869         if (!(vcpu->cr0 & CR0_TS_MASK)) {
 870                 vcpu->fpu_active = 0;
 871                 vmcs_set_bits(GUEST_CR0, CR0_TS_MASK);
 872                 vmcs_set_bits(EXCEPTION_BITMAP, 1 << NM_VECTOR);
 873         }
 874 }
 875
 876 static void vmx_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 877 {
 878         vmcs_writel(CR4_READ_SHADOW, cr4);
 879         vmcs_writel(GUEST_CR4, cr4 | (vcpu->rmode.active ?
 880                     KVM_RMODE_VM_CR4_ALWAYS_ON : KVM_PMODE_VM_CR4_ALWAYS_ON));
 881         vcpu->cr4 = cr4;
 882 }
 883
 884 #ifdef CONFIG_X86_64
 885
 886 static void vmx_set_efer(struct kvm_vcpu *vcpu, u64 efer)
 887 {
 888         struct vmx_msr_entry *msr = find_msr_entry(vcpu, MSR_EFER);
 889
 890         vcpu->shadow_efer = efer;
 891         if (efer & EFER_LMA) {
 892                 vmcs_write32(VM_ENTRY_CONTROLS,
 893                                      vmcs_read32(VM_ENTRY_CONTROLS) |
 894                                      VM_ENTRY_CONTROLS_IA32E_MASK);
 895                 msr->data = efer;
 896
 897         } else {
 898                 vmcs_write32(VM_ENTRY_CONTROLS,
 899                                      vmcs_read32(VM_ENTRY_CONTROLS) &
 900                                      ~VM_ENTRY_CONTROLS_IA32E_MASK);
 901
 902                 msr->data = efer & ~EFER_LME;
 903         }
 904         setup_msrs(vcpu);
 905 }
 906
 907 #endif
 908
 909 static u64 vmx_get_segment_base(struct kvm_vcpu *vcpu, int seg)
 910 {
 911         struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
 912
 913         return vmcs_readl(sf->base);
 914 }
 915
 916 static void vmx_get_segment(struct kvm_vcpu *vcpu,
 917                             struct kvm_segment *var, int seg)
 918 {
 919         struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
 920         u32 ar;
 921
 922         var->base = vmcs_readl(sf->base);
 923         var->limit = vmcs_read32(sf->limit);
 924         var->selector = vmcs_read16(sf->selector);
 925         ar = vmcs_read32(sf->ar_bytes);
 926         if (ar & AR_UNUSABLE_MASK)
 927                 ar = 0;
 928         var->type = ar & 15;
 929         var->s = (ar >> 4) & 1;
 930         var->dpl = (ar >> 5) & 3;
 931         var->present = (ar >> 7) & 1;
 932         var->avl = (ar >> 12) & 1;
 933         var->l = (ar >> 13) & 1;
 934         var->db = (ar >> 14) & 1;
 935         var->g = (ar >> 15) & 1;
 936         var->unusable = (ar >> 16) & 1;
 937 }
 938
 939 static void vmx_set_segment(struct kvm_vcpu *vcpu,
 940                             struct kvm_segment *var, int seg)
 941 {
 942         struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
 943         u32 ar;
 944
 945         vmcs_writel(sf->base, var->base);
 946         vmcs_write32(sf->limit, var->limit);
 947         vmcs_write16(sf->selector, var->selector);
 948         if (vcpu->rmode.active && var->s) {
 949                 /*
 950                  * Hack real-mode segments into vm86 compatibility.
 951                  */
 952                 if (var->base == 0xffff0000 && var->selector == 0xf000)
 953                         vmcs_writel(sf->base, 0xf0000);
 954                 ar = 0xf3;
 955         } else if (var->unusable)
 956                 ar = 1 << 16;
 957         else {
 958                 ar = var->type & 15;
 959                 ar |= (var->s & 1) << 4;
 960                 ar |= (var->dpl & 3) << 5;
 961                 ar |= (var->present & 1) << 7;
 962                 ar |= (var->avl & 1) << 12;
 963                 ar |= (var->l & 1) << 13;
 964                 ar |= (var->db & 1) << 14;
 965                 ar |= (var->g & 1) << 15;
 966         }
 967         if (ar == 0) /* a 0 value means unusable */
 968                 ar = AR_UNUSABLE_MASK;
 969         vmcs_write32(sf->ar_bytes, ar);
 970 }
 971
 972 static void vmx_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
 973 {
 974         u32 ar = vmcs_read32(GUEST_CS_AR_BYTES);
 975
 976         *db = (ar >> 14) & 1;
 977         *l = (ar >> 13) & 1;
 978 }
 979
 980 static void vmx_get_idt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
 981 {
 982         dt->limit = vmcs_read32(GUEST_IDTR_LIMIT);
 983         dt->base = vmcs_readl(GUEST_IDTR_BASE);
 984 }
 985
 986 static void vmx_set_idt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
 987 {
 988         vmcs_write32(GUEST_IDTR_LIMIT, dt->limit);
 989         vmcs_writel(GUEST_IDTR_BASE, dt->base);
 990 }
 991
 992 static void vmx_get_gdt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
 993 {
 994         dt->limit = vmcs_read32(GUEST_GDTR_LIMIT);
 995         dt->base = vmcs_readl(GUEST_GDTR_BASE);
 996 }
 997
 998 static void vmx_set_gdt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
 999 {
1000         vmcs_write32(GUEST_GDTR_LIMIT, dt->limit);
1001         vmcs_writel(GUEST_GDTR_BASE, dt->base);
1002 }
1003
1004 static int init_rmode_tss(struct kvm* kvm)
1005 {
1006         struct page *p1, *p2, *p3;
1007         gfn_t fn = rmode_tss_base(kvm) >> PAGE_SHIFT;
1008         char *page;
1009
1010         p1 = gfn_to_page(kvm, fn++);
1011         p2 = gfn_to_page(kvm, fn++);
1012         p3 = gfn_to_page(kvm, fn);
1013
1014         if (!p1 || !p2 || !p3) {
1015                 kvm_printf(kvm,"%s: gfn_to_page failed\n", __FUNCTION__);
1016                 return 0;
1017         }
1018
1019         page = kmap_atomic(p1, KM_USER0);
1020         memset(page, 0, PAGE_SIZE);
1021         *(u16*)(page + 0x66) = TSS_BASE_SIZE + TSS_REDIRECTION_SIZE;
1022         kunmap_atomic(page, KM_USER0);
1023
1024         page = kmap_atomic(p2, KM_USER0);
1025         memset(page, 0, PAGE_SIZE);
1026         kunmap_atomic(page, KM_USER0);
1027
1028         page = kmap_atomic(p3, KM_USER0);
1029         memset(page, 0, PAGE_SIZE);
1030         *(page + RMODE_TSS_SIZE - 2 * PAGE_SIZE - 1) = ~0;
1031         kunmap_atomic(page, KM_USER0);
1032
1033         return 1;
1034 }
1035
1036 static void vmcs_write32_fixedbits(u32 msr, u32 vmcs_field, u32 val)
1037 {
1038         u32 msr_high, msr_low;
1039
1040         rdmsr(msr, msr_low, msr_high);
1041
1042         val &= msr_high;
1043         val |= msr_low;
1044         vmcs_write32(vmcs_field, val);
1045 }
1046
1047 static void seg_setup(int seg)
1048 {
1049         struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
1050
1051         vmcs_write16(sf->selector, 0);
1052         vmcs_writel(sf->base, 0);
1053         vmcs_write32(sf->limit, 0xffff);
1054         vmcs_write32(sf->ar_bytes, 0x93);
1055 }
1056
1057 /*
1058  * Sets up the vmcs for emulated real mode.
1059  */
1060 static int vmx_vcpu_setup(struct kvm_vcpu *vcpu)
1061 {
1062         u32 host_sysenter_cs;
1063         u32 junk;
1064         unsigned long a;
1065         struct descriptor_table dt;
1066         int i;
1067         int ret = 0;
1068         extern asmlinkage void kvm_vmx_return(void);
1069
1070         if (!init_rmode_tss(vcpu->kvm)) {
1071                 ret = -ENOMEM;
1072                 goto out;
1073         }
1074
1075         memset(vcpu->regs, 0, sizeof(vcpu->regs));
1076         vcpu->regs[VCPU_REGS_RDX] = get_rdx_init_val();
1077         vcpu->cr8 = 0;
1078         vcpu->apic_base = 0xfee00000 |
1079                         /*for vcpu 0*/ MSR_IA32_APICBASE_BSP |
1080                         MSR_IA32_APICBASE_ENABLE;
1081
1082         fx_init(vcpu);
1083
1084         /*
1085          * GUEST_CS_BASE should really be 0xffff0000, but VT vm86 mode
1086          * insists on having GUEST_CS_BASE == GUEST_CS_SELECTOR << 4.  Sigh.
1087          */
1088         vmcs_write16(GUEST_CS_SELECTOR, 0xf000);
1089         vmcs_writel(GUEST_CS_BASE, 0x000f0000);
1090         vmcs_write32(GUEST_CS_LIMIT, 0xffff);
1091         vmcs_write32(GUEST_CS_AR_BYTES, 0x9b);
1092
1093         seg_setup(VCPU_SREG_DS);
1094         seg_setup(VCPU_SREG_ES);
1095         seg_setup(VCPU_SREG_FS);
1096         seg_setup(VCPU_SREG_GS);
1097         seg_setup(VCPU_SREG_SS);
1098
1099         vmcs_write16(GUEST_TR_SELECTOR, 0);
1100         vmcs_writel(GUEST_TR_BASE, 0);
1101         vmcs_write32(GUEST_TR_LIMIT, 0xffff);
1102         vmcs_write32(GUEST_TR_AR_BYTES, 0x008b);
1103
1104         vmcs_write16(GUEST_LDTR_SELECTOR, 0);
1105         vmcs_writel(GUEST_LDTR_BASE, 0);
1106         vmcs_write32(GUEST_LDTR_LIMIT, 0xffff);
1107         vmcs_write32(GUEST_LDTR_AR_BYTES, 0x00082);
1108
1109         vmcs_write32(GUEST_SYSENTER_CS, 0);
1110         vmcs_writel(GUEST_SYSENTER_ESP, 0);
1111         vmcs_writel(GUEST_SYSENTER_EIP, 0);
1112
1113         vmcs_writel(GUEST_RFLAGS, 0x02);
1114         vmcs_writel(GUEST_RIP, 0xfff0);
1115         vmcs_writel(GUEST_RSP, 0);
1116
1117         //todo: dr0 = dr1 = dr2 = dr3 = 0; dr6 = 0xffff0ff0
1118         vmcs_writel(GUEST_DR7, 0x400);
1119
1120         vmcs_writel(GUEST_GDTR_BASE, 0);
1121         vmcs_write32(GUEST_GDTR_LIMIT, 0xffff);
1122
1123         vmcs_writel(GUEST_IDTR_BASE, 0);
1124         vmcs_write32(GUEST_IDTR_LIMIT, 0xffff);
1125
1126         vmcs_write32(GUEST_ACTIVITY_STATE, 0);
1127         vmcs_write32(GUEST_INTERRUPTIBILITY_INFO, 0);
1128         vmcs_write32(GUEST_PENDING_DBG_EXCEPTIONS, 0);
1129
1130         /* I/O */
1131         vmcs_write64(IO_BITMAP_A, 0);
1132         vmcs_write64(IO_BITMAP_B, 0);
1133
1134         guest_write_tsc(0);
1135
1136         vmcs_write64(VMCS_LINK_POINTER, -1ull); /* 22.3.1.5 */
1137
1138         /* Special registers */
1139         vmcs_write64(GUEST_IA32_DEBUGCTL, 0);
1140
1141         /* Control */
1142         vmcs_write32_fixedbits(MSR_IA32_VMX_PINBASED_CTLS,
1143                                PIN_BASED_VM_EXEC_CONTROL,
1144                                PIN_BASED_EXT_INTR_MASK   /* 20.6.1 */
1145                                | PIN_BASED_NMI_EXITING   /* 20.6.1 */
1146                         );
1147         vmcs_write32_fixedbits(MSR_IA32_VMX_PROCBASED_CTLS,
1148                                CPU_BASED_VM_EXEC_CONTROL,
1149                                CPU_BASED_HLT_EXITING         /* 20.6.2 */
1150                                | CPU_BASED_CR8_LOAD_EXITING    /* 20.6.2 */
1151                                | CPU_BASED_CR8_STORE_EXITING   /* 20.6.2 */
1152                                | CPU_BASED_UNCOND_IO_EXITING   /* 20.6.2 */
1153                                | CPU_BASED_MOV_DR_EXITING
1154                                | CPU_BASED_USE_TSC_OFFSETING   /* 21.3 */
1155                         );
1156
1157         vmcs_write32(EXCEPTION_BITMAP, 1 << PF_VECTOR);
1158         vmcs_write32(PAGE_FAULT_ERROR_CODE_MASK, 0);
1159         vmcs_write32(PAGE_FAULT_ERROR_CODE_MATCH, 0);
1160         vmcs_write32(CR3_TARGET_COUNT, 0);           /* 22.2.1 */
1161
1162         vmcs_writel(HOST_CR0, read_cr0());  /* 22.2.3 */
1163         vmcs_writel(HOST_CR4, read_cr4());  /* 22.2.3, 22.2.5 */
1164         vmcs_writel(HOST_CR3, read_cr3());  /* 22.2.3  FIXME: shadow tables */
1165
1166         vmcs_write16(HOST_CS_SELECTOR, __KERNEL_CS);  /* 22.2.4 */
1167         vmcs_write16(HOST_DS_SELECTOR, __KERNEL_DS);  /* 22.2.4 */
1168         vmcs_write16(HOST_ES_SELECTOR, __KERNEL_DS);  /* 22.2.4 */
1169         vmcs_write16(HOST_FS_SELECTOR, read_fs());    /* 22.2.4 */
1170         vmcs_write16(HOST_GS_SELECTOR, read_gs());    /* 22.2.4 */
1171         vmcs_write16(HOST_SS_SELECTOR, __KERNEL_DS);  /* 22.2.4 */
1172 #ifdef CONFIG_X86_64
1173         rdmsrl(MSR_FS_BASE, a);
1174         vmcs_writel(HOST_FS_BASE, a); /* 22.2.4 */
1175         rdmsrl(MSR_GS_BASE, a);
1176         vmcs_writel(HOST_GS_BASE, a); /* 22.2.4 */
1177 #else
1178         vmcs_writel(HOST_FS_BASE, 0); /* 22.2.4 */
1179         vmcs_writel(HOST_GS_BASE, 0); /* 22.2.4 */
1180 #endif
1181
1182         vmcs_write16(HOST_TR_SELECTOR, GDT_ENTRY_TSS*8);  /* 22.2.4 */
1183
1184         get_idt(&dt);
1185         vmcs_writel(HOST_IDTR_BASE, dt.base);   /* 22.2.4 */
1186
1187
1188         vmcs_writel(HOST_RIP, (unsigned long)kvm_vmx_return); /* 22.2.5 */
1189
1190         rdmsr(MSR_IA32_SYSENTER_CS, host_sysenter_cs, junk);
1191         vmcs_write32(HOST_IA32_SYSENTER_CS, host_sysenter_cs);
1192         rdmsrl(MSR_IA32_SYSENTER_ESP, a);
1193         vmcs_writel(HOST_IA32_SYSENTER_ESP, a);   /* 22.2.3 */
1194         rdmsrl(MSR_IA32_SYSENTER_EIP, a);
1195         vmcs_writel(HOST_IA32_SYSENTER_EIP, a);   /* 22.2.3 */
1196
1197         for (i = 0; i < NR_VMX_MSR; ++i) {
1198                 u32 index = vmx_msr_index[i];
1199                 u32 data_low, data_high;
1200                 u64 data;
1201                 int j = vcpu->nmsrs;
1202
1203                 if (rdmsr_safe(index, &data_low, &data_high) < 0)
1204                         continue;
1205                 if (wrmsr_safe(index, data_low, data_high) < 0)
1206                         continue;
1207                 data = data_low | ((u64)data_high << 32);
1208                 vcpu->host_msrs[j].index = index;
1209                 vcpu->host_msrs[j].reserved = 0;
1210                 vcpu->host_msrs[j].data = data;
1211                 vcpu->guest_msrs[j] = vcpu->host_msrs[j];
1212 #ifdef CONFIG_X86_64
1213                 if (index == MSR_KERNEL_GS_BASE)
1214                         msr_offset_kernel_gs_base = j;
1215 #endif
1216                 ++vcpu->nmsrs;
1217         }
1218
1219         setup_msrs(vcpu);
1220
1221         vmcs_write32_fixedbits(MSR_IA32_VMX_EXIT_CTLS, VM_EXIT_CONTROLS,
1222                                (HOST_IS_64 << 9));  /* 22.2,1, 20.7.1 */
1223
1224         /* 22.2.1, 20.8.1 */
1225         vmcs_write32_fixedbits(MSR_IA32_VMX_ENTRY_CTLS,
1226                                VM_ENTRY_CONTROLS, 0);
1227         vmcs_write32(VM_ENTRY_INTR_INFO_FIELD, 0);  /* 22.2.1 */
1228
1229 #ifdef CONFIG_X86_64
1230         vmcs_writel(VIRTUAL_APIC_PAGE_ADDR, 0);
1231         vmcs_writel(TPR_THRESHOLD, 0);
1232 #endif
1233
1234         vmcs_writel(CR0_GUEST_HOST_MASK, ~0UL);
1235         vmcs_writel(CR4_GUEST_HOST_MASK, KVM_GUEST_CR4_MASK);
1236
1237         vcpu->cr0 = 0x60000010;
1238         vmx_set_cr0(vcpu, vcpu->cr0); // enter rmode
1239         vmx_set_cr4(vcpu, 0);
1240 #ifdef CONFIG_X86_64
1241         vmx_set_efer(vcpu, 0);
1242 #endif
1243
1244         return 0;
1245
1246 out:
1247         return ret;
1248 }
1249
1250 static void inject_rmode_irq(struct kvm_vcpu *vcpu, int irq)
1251 {
1252         u16 ent[2];
1253         u16 cs;
1254         u16 ip;
1255         unsigned long flags;
1256         unsigned long ss_base = vmcs_readl(GUEST_SS_BASE);
1257         u16 sp =  vmcs_readl(GUEST_RSP);
1258         u32 ss_limit = vmcs_read32(GUEST_SS_LIMIT);
1259
1260         if (sp > ss_limit || sp < 6 ) {
1261                 vcpu_printf(vcpu, "%s: #SS, rsp 0x%lx ss 0x%lx limit 0x%x\n",
1262                             __FUNCTION__,
1263                             vmcs_readl(GUEST_RSP),
1264                             vmcs_readl(GUEST_SS_BASE),
1265                             vmcs_read32(GUEST_SS_LIMIT));
1266                 return;
1267         }
1268
1269         if (kvm_read_guest(vcpu, irq * sizeof(ent), sizeof(ent), &ent) !=
1270                                                                 sizeof(ent)) {
1271                 vcpu_printf(vcpu, "%s: read guest err\n", __FUNCTION__);
1272                 return;
1273         }
1274
1275         flags =  vmcs_readl(GUEST_RFLAGS);
1276         cs =  vmcs_readl(GUEST_CS_BASE) >> 4;
1277         ip =  vmcs_readl(GUEST_RIP);
1278
1279
1280         if (kvm_write_guest(vcpu, ss_base + sp - 2, 2, &flags) != 2 ||
1281             kvm_write_guest(vcpu, ss_base + sp - 4, 2, &cs) != 2 ||
1282             kvm_write_guest(vcpu, ss_base + sp - 6, 2, &ip) != 2) {
1283                 vcpu_printf(vcpu, "%s: write guest err\n", __FUNCTION__);
1284                 return;
1285         }
1286
1287         vmcs_writel(GUEST_RFLAGS, flags &
1288                     ~( X86_EFLAGS_IF | X86_EFLAGS_AC | X86_EFLAGS_TF));
1289         vmcs_write16(GUEST_CS_SELECTOR, ent[1]) ;
1290         vmcs_writel(GUEST_CS_BASE, ent[1] << 4);
1291         vmcs_writel(GUEST_RIP, ent[0]);
1292         vmcs_writel(GUEST_RSP, (vmcs_readl(GUEST_RSP) & ~0xffff) | (sp - 6));
1293 }
1294
1295 static void kvm_do_inject_irq(struct kvm_vcpu *vcpu)
1296 {
1297         int word_index = __ffs(vcpu->irq_summary);
1298         int bit_index = __ffs(vcpu->irq_pending[word_index]);
1299         int irq = word_index * BITS_PER_LONG + bit_index;
1300
1301         clear_bit(bit_index, &vcpu->irq_pending[word_index]);
1302         if (!vcpu->irq_pending[word_index])
1303                 clear_bit(word_index, &vcpu->irq_summary);
1304
1305         if (vcpu->rmode.active) {
1306                 inject_rmode_irq(vcpu, irq);
1307                 return;
1308         }
1309         vmcs_write32(VM_ENTRY_INTR_INFO_FIELD,
1310                         irq | INTR_TYPE_EXT_INTR | INTR_INFO_VALID_MASK);
1311 }
1312
1313
1314 static void do_interrupt_requests(struct kvm_vcpu *vcpu,
1315                                        struct kvm_run *kvm_run)
1316 {
1317         u32 cpu_based_vm_exec_control;
1318
1319         vcpu->interrupt_window_open =
1320                 ((vmcs_readl(GUEST_RFLAGS) & X86_EFLAGS_IF) &&
1321                  (vmcs_read32(GUEST_INTERRUPTIBILITY_INFO) & 3) == 0);
1322
1323         if (vcpu->interrupt_window_open &&
1324             vcpu->irq_summary &&
1325             !(vmcs_read32(VM_ENTRY_INTR_INFO_FIELD) & INTR_INFO_VALID_MASK))
1326                 /*
1327                  * If interrupts enabled, and not blocked by sti or mov ss. Good.
1328                  */
1329                 kvm_do_inject_irq(vcpu);
1330
1331         cpu_based_vm_exec_control = vmcs_read32(CPU_BASED_VM_EXEC_CONTROL);
1332         if (!vcpu->interrupt_window_open &&
1333             (vcpu->irq_summary || kvm_run->request_interrupt_window))
1334                 /*
1335                  * Interrupts blocked.  Wait for unblock.
1336                  */
1337                 cpu_based_vm_exec_control |= CPU_BASED_VIRTUAL_INTR_PENDING;
1338         else
1339                 cpu_based_vm_exec_control &= ~CPU_BASED_VIRTUAL_INTR_PENDING;
1340         vmcs_write32(CPU_BASED_VM_EXEC_CONTROL, cpu_based_vm_exec_control);
1341 }
1342
1343 static void kvm_guest_debug_pre(struct kvm_vcpu *vcpu)
1344 {
1345         struct kvm_guest_debug *dbg = &vcpu->guest_debug;
1346
1347         set_debugreg(dbg->bp[0], 0);
1348         set_debugreg(dbg->bp[1], 1);
1349         set_debugreg(dbg->bp[2], 2);
1350         set_debugreg(dbg->bp[3], 3);
1351
1352         if (dbg->singlestep) {
1353                 unsigned long flags;
1354
1355                 flags = vmcs_readl(GUEST_RFLAGS);
1356                 flags |= X86_EFLAGS_TF | X86_EFLAGS_RF;
1357                 vmcs_writel(GUEST_RFLAGS, flags);
1358         }
1359 }
1360
1361 static int handle_rmode_exception(struct kvm_vcpu *vcpu,
1362                                   int vec, u32 err_code)
1363 {
1364         if (!vcpu->rmode.active)
1365                 return 0;
1366
1367         if (vec == GP_VECTOR && err_code == 0)
1368                 if (emulate_instruction(vcpu, NULL, 0, 0) == EMULATE_DONE)
1369                         return 1;
1370         return 0;
1371 }
1372
1373 static int handle_exception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1374 {
1375         u32 intr_info, error_code;
1376         unsigned long cr2, rip;
1377         u32 vect_info;
1378         enum emulation_result er;
1379         int r;
1380
1381         vect_info = vmcs_read32(IDT_VECTORING_INFO_FIELD);
1382         intr_info = vmcs_read32(VM_EXIT_INTR_INFO);
1383
1384         if ((vect_info & VECTORING_INFO_VALID_MASK) &&
1385                                                 !is_page_fault(intr_info)) {
1386                 printk(KERN_ERR "%s: unexpected, vectoring info 0x%x "
1387                        "intr info 0x%x\n", __FUNCTION__, vect_info, intr_info);
1388         }
1389
1390         if (is_external_interrupt(vect_info)) {
1391                 int irq = vect_info & VECTORING_INFO_VECTOR_MASK;
1392                 set_bit(irq, vcpu->irq_pending);
1393                 set_bit(irq / BITS_PER_LONG, &vcpu->irq_summary);
1394         }
1395
1396         if ((intr_info & INTR_INFO_INTR_TYPE_MASK) == 0x200) { /* nmi */
1397                 asm ("int $2");
1398                 return 1;
1399         }
1400
1401         if (is_no_device(intr_info)) {
1402                 vcpu->fpu_active = 1;
1403                 vmcs_clear_bits(EXCEPTION_BITMAP, 1 << NM_VECTOR);
1404                 if (!(vcpu->cr0 & CR0_TS_MASK))
1405                         vmcs_clear_bits(GUEST_CR0, CR0_TS_MASK);
1406                 return 1;
1407         }
1408
1409         error_code = 0;
1410         rip = vmcs_readl(GUEST_RIP);
1411         if (intr_info & INTR_INFO_DELIEVER_CODE_MASK)
1412                 error_code = vmcs_read32(VM_EXIT_INTR_ERROR_CODE);
1413         if (is_page_fault(intr_info)) {
1414                 cr2 = vmcs_readl(EXIT_QUALIFICATION);
1415
1416                 spin_lock(&vcpu->kvm->lock);
1417                 r = kvm_mmu_page_fault(vcpu, cr2, error_code);
1418                 if (r < 0) {
1419                         spin_unlock(&vcpu->kvm->lock);
1420                         return r;
1421                 }
1422                 if (!r) {
1423                         spin_unlock(&vcpu->kvm->lock);
1424                         return 1;
1425                 }
1426
1427                 er = emulate_instruction(vcpu, kvm_run, cr2, error_code);
1428                 spin_unlock(&vcpu->kvm->lock);
1429
1430                 switch (er) {
1431                 case EMULATE_DONE:
1432                         return 1;
1433                 case EMULATE_DO_MMIO:
1434                         ++vcpu->stat.mmio_exits;
1435                         kvm_run->exit_reason = KVM_EXIT_MMIO;
1436                         return 0;
1437                  case EMULATE_FAIL:
1438                         vcpu_printf(vcpu, "%s: emulate fail\n", __FUNCTION__);
1439                         break;
1440                 default:
1441                         BUG();
1442                 }
1443         }
1444
1445         if (vcpu->rmode.active &&
1446             handle_rmode_exception(vcpu, intr_info & INTR_INFO_VECTOR_MASK,
1447                                                                 error_code))
1448                 return 1;
1449
1450         if ((intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VECTOR_MASK)) == (INTR_TYPE_EXCEPTION | 1)) {
1451                 kvm_run->exit_reason = KVM_EXIT_DEBUG;
1452                 return 0;
1453         }
1454         kvm_run->exit_reason = KVM_EXIT_EXCEPTION;
1455         kvm_run->ex.exception = intr_info & INTR_INFO_VECTOR_MASK;
1456         kvm_run->ex.error_code = error_code;
1457         return 0;
1458 }
1459
1460 static int handle_external_interrupt(struct kvm_vcpu *vcpu,
1461                                      struct kvm_run *kvm_run)
1462 {
1463         ++vcpu->stat.irq_exits;
1464         return 1;
1465 }
1466
1467 static int handle_triple_fault(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1468 {
1469         kvm_run->exit_reason = KVM_EXIT_SHUTDOWN;
1470         return 0;
1471 }
1472
1473 static int get_io_count(struct kvm_vcpu *vcpu, unsigned long *count)
1474 {
1475         u64 inst;
1476         gva_t rip;
1477         int countr_size;
1478         int i, n;
1479
1480         if ((vmcs_readl(GUEST_RFLAGS) & X86_EFLAGS_VM)) {
1481                 countr_size = 2;
1482         } else {
1483                 u32 cs_ar = vmcs_read32(GUEST_CS_AR_BYTES);
1484
1485                 countr_size = (cs_ar & AR_L_MASK) ? 8:
1486                               (cs_ar & AR_DB_MASK) ? 4: 2;
1487         }
1488
1489         rip =  vmcs_readl(GUEST_RIP);
1490         if (countr_size != 8)
1491                 rip += vmcs_readl(GUEST_CS_BASE);
1492
1493         n = kvm_read_guest(vcpu, rip, sizeof(inst), &inst);
1494
1495         for (i = 0; i < n; i++) {
1496                 switch (((u8*)&inst)[i]) {
1497                 case 0xf0:
1498                 case 0xf2:
1499                 case 0xf3:
1500                 case 0x2e:
1501                 case 0x36:
1502                 case 0x3e:
1503                 case 0x26:
1504                 case 0x64:
1505                 case 0x65:
1506                 case 0x66:
1507                         break;
1508                 case 0x67:
1509                         countr_size = (countr_size == 2) ? 4: (countr_size >> 1);
1510                 default:
1511                         goto done;
1512                 }
1513         }
1514         return 0;
1515 done:
1516         countr_size *= 8;
1517         *count = vcpu->regs[VCPU_REGS_RCX] & (~0ULL >> (64 - countr_size));
1518         //printk("cx: %lx\n", vcpu->regs[VCPU_REGS_RCX]);
1519         return 1;
1520 }
1521
1522 static int handle_io(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1523 {
1524         u64 exit_qualification;
1525         int size, down, in, string, rep;
1526         unsigned port;
1527         unsigned long count;
1528         gva_t address;
1529
1530         ++vcpu->stat.io_exits;
1531         exit_qualification = vmcs_read64(EXIT_QUALIFICATION);
1532         in = (exit_qualification & 8) != 0;
1533         size = (exit_qualification & 7) + 1;
1534         string = (exit_qualification & 16) != 0;
1535         down = (vmcs_readl(GUEST_RFLAGS) & X86_EFLAGS_DF) != 0;
1536         count = 1;
1537         rep = (exit_qualification & 32) != 0;
1538         port = exit_qualification >> 16;
1539         address = 0;
1540         if (string) {
1541                 if (rep && !get_io_count(vcpu, &count))
1542                         return 1;
1543                 address = vmcs_readl(GUEST_LINEAR_ADDRESS);
1544         }
1545         return kvm_setup_pio(vcpu, kvm_run, in, size, count, string, down,
1546                              address, rep, port);
1547 }
1548
1549 static void
1550 vmx_patch_hypercall(struct kvm_vcpu *vcpu, unsigned char *hypercall)
1551 {
1552         /*
1553          * Patch in the VMCALL instruction:
1554          */
1555         hypercall[0] = 0x0f;
1556         hypercall[1] = 0x01;
1557         hypercall[2] = 0xc1;
1558         hypercall[3] = 0xc3;
1559 }
1560
1561 static int handle_cr(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1562 {
1563         u64 exit_qualification;
1564         int cr;
1565         int reg;
1566
1567         exit_qualification = vmcs_read64(EXIT_QUALIFICATION);
1568         cr = exit_qualification & 15;
1569         reg = (exit_qualification >> 8) & 15;
1570         switch ((exit_qualification >> 4) & 3) {
1571         case 0: /* mov to cr */
1572                 switch (cr) {
1573                 case 0:
1574                         vcpu_load_rsp_rip(vcpu);
1575                         set_cr0(vcpu, vcpu->regs[reg]);
1576                         skip_emulated_instruction(vcpu);
1577                         return 1;
1578                 case 3:
1579                         vcpu_load_rsp_rip(vcpu);
1580                         set_cr3(vcpu, vcpu->regs[reg]);
1581                         skip_emulated_instruction(vcpu);
1582                         return 1;
1583                 case 4:
1584                         vcpu_load_rsp_rip(vcpu);
1585                         set_cr4(vcpu, vcpu->regs[reg]);
1586                         skip_emulated_instruction(vcpu);
1587                         return 1;
1588                 case 8:
1589                         vcpu_load_rsp_rip(vcpu);
1590                         set_cr8(vcpu, vcpu->regs[reg]);
1591                         skip_emulated_instruction(vcpu);
1592                         return 1;
1593                 };
1594                 break;
1595         case 2: /* clts */
1596                 vcpu_load_rsp_rip(vcpu);
1597                 vcpu->fpu_active = 1;
1598                 vmcs_clear_bits(EXCEPTION_BITMAP, 1 << NM_VECTOR);
1599                 vmcs_clear_bits(GUEST_CR0, CR0_TS_MASK);
1600                 vcpu->cr0 &= ~CR0_TS_MASK;
1601                 vmcs_writel(CR0_READ_SHADOW, vcpu->cr0);
1602                 skip_emulated_instruction(vcpu);
1603                 return 1;
1604         case 1: /*mov from cr*/
1605                 switch (cr) {
1606                 case 3:
1607                         vcpu_load_rsp_rip(vcpu);
1608                         vcpu->regs[reg] = vcpu->cr3;
1609                         vcpu_put_rsp_rip(vcpu);
1610                         skip_emulated_instruction(vcpu);
1611                         return 1;
1612                 case 8:
1613                         vcpu_load_rsp_rip(vcpu);
1614                         vcpu->regs[reg] = vcpu->cr8;
1615                         vcpu_put_rsp_rip(vcpu);
1616                         skip_emulated_instruction(vcpu);
1617                         return 1;
1618                 }
1619                 break;
1620         case 3: /* lmsw */
1621                 lmsw(vcpu, (exit_qualification >> LMSW_SOURCE_DATA_SHIFT) & 0x0f);
1622
1623                 skip_emulated_instruction(vcpu);
1624                 return 1;
1625         default:
1626                 break;
1627         }
1628         kvm_run->exit_reason = 0;
1629         printk(KERN_ERR "kvm: unhandled control register: op %d cr %d\n",
1630                (int)(exit_qualification >> 4) & 3, cr);
1631         return 0;
1632 }
1633
1634 static int handle_dr(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1635 {
1636         u64 exit_qualification;
1637         unsigned long val;
1638         int dr, reg;
1639
1640         /*
1641          * FIXME: this code assumes the host is debugging the guest.
1642          *        need to deal with guest debugging itself too.
1643          */
1644         exit_qualification = vmcs_read64(EXIT_QUALIFICATION);
1645         dr = exit_qualification & 7;
1646         reg = (exit_qualification >> 8) & 15;
1647         vcpu_load_rsp_rip(vcpu);
1648         if (exit_qualification & 16) {
1649                 /* mov from dr */
1650                 switch (dr) {
1651                 case 6:
1652                         val = 0xffff0ff0;
1653                         break;
1654                 case 7:
1655                         val = 0x400;
1656                         break;
1657                 default:
1658                         val = 0;
1659                 }
1660                 vcpu->regs[reg] = val;
1661         } else {
1662                 /* mov to dr */
1663         }
1664         vcpu_put_rsp_rip(vcpu);
1665         skip_emulated_instruction(vcpu);
1666         return 1;
1667 }
1668
1669 static int handle_cpuid(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1670 {
1671         kvm_emulate_cpuid(vcpu);
1672         return 1;
1673 }
1674
1675 static int handle_rdmsr(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1676 {
1677         u32 ecx = vcpu->regs[VCPU_REGS_RCX];
1678         u64 data;
1679
1680         if (vmx_get_msr(vcpu, ecx, &data)) {
1681                 vmx_inject_gp(vcpu, 0);
1682                 return 1;
1683         }
1684
1685         /* FIXME: handling of bits 32:63 of rax, rdx */
1686         vcpu->regs[VCPU_REGS_RAX] = data & -1u;
1687         vcpu->regs[VCPU_REGS_RDX] = (data >> 32) & -1u;
1688         skip_emulated_instruction(vcpu);
1689         return 1;
1690 }
1691
1692 static int handle_wrmsr(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1693 {
1694         u32 ecx = vcpu->regs[VCPU_REGS_RCX];
1695         u64 data = (vcpu->regs[VCPU_REGS_RAX] & -1u)
1696                 | ((u64)(vcpu->regs[VCPU_REGS_RDX] & -1u) << 32);
1697
1698         if (vmx_set_msr(vcpu, ecx, data) != 0) {
1699                 vmx_inject_gp(vcpu, 0);
1700                 return 1;
1701         }
1702
1703         skip_emulated_instruction(vcpu);
1704         return 1;
1705 }
1706
1707 static void post_kvm_run_save(struct kvm_vcpu *vcpu,
1708                               struct kvm_run *kvm_run)
1709 {
1710         kvm_run->if_flag = (vmcs_readl(GUEST_RFLAGS) & X86_EFLAGS_IF) != 0;
1711         kvm_run->cr8 = vcpu->cr8;
1712         kvm_run->apic_base = vcpu->apic_base;
1713         kvm_run->ready_for_interrupt_injection = (vcpu->interrupt_window_open &&
1714                                                   vcpu->irq_summary == 0);
1715 }
1716
1717 static int handle_interrupt_window(struct kvm_vcpu *vcpu,
1718                                    struct kvm_run *kvm_run)
1719 {
1720         /*
1721          * If the user space waits to inject interrupts, exit as soon as
1722          * possible
1723          */
1724         if (kvm_run->request_interrupt_window &&
1725             !vcpu->irq_summary) {
1726                 kvm_run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
1727                 ++vcpu->stat.irq_window_exits;
1728                 return 0;
1729         }
1730         return 1;
1731 }
1732
1733 static int handle_halt(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1734 {
1735         skip_emulated_instruction(vcpu);
1736         if (vcpu->irq_summary)
1737                 return 1;
1738
1739         kvm_run->exit_reason = KVM_EXIT_HLT;
1740         ++vcpu->stat.halt_exits;
1741         return 0;
1742 }
1743
1744 static int handle_vmcall(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1745 {
1746         skip_emulated_instruction(vcpu);
1747         return kvm_hypercall(vcpu, kvm_run);
1748 }
1749
1750 /*
1751  * The exit handlers return 1 if the exit was handled fully and guest execution
1752  * may resume.  Otherwise they set the kvm_run parameter to indicate what needs
1753  * to be done to userspace and return 0.
1754  */
1755 static int (*kvm_vmx_exit_handlers[])(struct kvm_vcpu *vcpu,
1756                                       struct kvm_run *kvm_run) = {
1757         [EXIT_REASON_EXCEPTION_NMI]           = handle_exception,
1758         [EXIT_REASON_EXTERNAL_INTERRUPT]      = handle_external_interrupt,
1759         [EXIT_REASON_TRIPLE_FAULT]            = handle_triple_fault,
1760         [EXIT_REASON_IO_INSTRUCTION]          = handle_io,
1761         [EXIT_REASON_CR_ACCESS]               = handle_cr,
1762         [EXIT_REASON_DR_ACCESS]               = handle_dr,
1763         [EXIT_REASON_CPUID]                   = handle_cpuid,
1764         [EXIT_REASON_MSR_READ]                = handle_rdmsr,
1765         [EXIT_REASON_MSR_WRITE]               = handle_wrmsr,
1766         [EXIT_REASON_PENDING_INTERRUPT]       = handle_interrupt_window,
1767         [EXIT_REASON_HLT]                     = handle_halt,
1768         [EXIT_REASON_VMCALL]                  = handle_vmcall,
1769 };
1770
1771 static const int kvm_vmx_max_exit_handlers =
1772         sizeof(kvm_vmx_exit_handlers) / sizeof(*kvm_vmx_exit_handlers);
1773
1774 /*
1775  * The guest has exited.  See if we can fix it or if we need userspace
1776  * assistance.
1777  */
1778 static int kvm_handle_exit(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu)
1779 {
1780         u32 vectoring_info = vmcs_read32(IDT_VECTORING_INFO_FIELD);
1781         u32 exit_reason = vmcs_read32(VM_EXIT_REASON);
1782
1783         if ( (vectoring_info & VECTORING_INFO_VALID_MASK) &&
1784                                 exit_reason != EXIT_REASON_EXCEPTION_NMI )
1785                 printk(KERN_WARNING "%s: unexpected, valid vectoring info and "
1786                        "exit reason is 0x%x\n", __FUNCTION__, exit_reason);
1787         if (exit_reason < kvm_vmx_max_exit_handlers
1788             && kvm_vmx_exit_handlers[exit_reason])
1789                 return kvm_vmx_exit_handlers[exit_reason](vcpu, kvm_run);
1790         else {
1791                 kvm_run->exit_reason = KVM_EXIT_UNKNOWN;
1792                 kvm_run->hw.hardware_exit_reason = exit_reason;
1793         }
1794         return 0;
1795 }
1796
1797 /*
1798  * Check if userspace requested an interrupt window, and that the
1799  * interrupt window is open.
1800  *
1801  * No need to exit to userspace if we already have an interrupt queued.
1802  */
1803 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu,
1804                                           struct kvm_run *kvm_run)
1805 {
1806         return (!vcpu->irq_summary &&
1807                 kvm_run->request_interrupt_window &&
1808                 vcpu->interrupt_window_open &&
1809                 (vmcs_readl(GUEST_RFLAGS) & X86_EFLAGS_IF));
1810 }
1811
1812 static int vmx_vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1813 {
1814         u8 fail;
1815         u16 fs_sel, gs_sel, ldt_sel;
1816         int fs_gs_ldt_reload_needed;
1817         int r;
1818
1819 again:
1820         /*
1821          * Set host fs and gs selectors.  Unfortunately, 22.2.3 does not
1822          * allow segment selectors with cpl > 0 or ti == 1.
1823          */
1824         fs_sel = read_fs();
1825         gs_sel = read_gs();
1826         ldt_sel = read_ldt();
1827         fs_gs_ldt_reload_needed = (fs_sel & 7) | (gs_sel & 7) | ldt_sel;
1828         if (!fs_gs_ldt_reload_needed) {
1829                 vmcs_write16(HOST_FS_SELECTOR, fs_sel);
1830                 vmcs_write16(HOST_GS_SELECTOR, gs_sel);
1831         } else {
1832                 vmcs_write16(HOST_FS_SELECTOR, 0);
1833                 vmcs_write16(HOST_GS_SELECTOR, 0);
1834         }
1835
1836 #ifdef CONFIG_X86_64
1837         vmcs_writel(HOST_FS_BASE, read_msr(MSR_FS_BASE));
1838         vmcs_writel(HOST_GS_BASE, read_msr(MSR_GS_BASE));
1839 #else
1840         vmcs_writel(HOST_FS_BASE, segment_base(fs_sel));
1841         vmcs_writel(HOST_GS_BASE, segment_base(gs_sel));
1842 #endif
1843
1844         if (!vcpu->mmio_read_completed)
1845                 do_interrupt_requests(vcpu, kvm_run);
1846
1847         if (vcpu->guest_debug.enabled)
1848                 kvm_guest_debug_pre(vcpu);
1849
1850         if (vcpu->fpu_active) {
1851                 fx_save(vcpu->host_fx_image);
1852                 fx_restore(vcpu->guest_fx_image);
1853         }
1854         /*
1855          * Loading guest fpu may have cleared host cr0.ts
1856          */
1857         vmcs_writel(HOST_CR0, read_cr0());
1858
1859 #ifdef CONFIG_X86_64
1860         if (is_long_mode(vcpu)) {
1861                 save_msrs(vcpu->host_msrs + msr_offset_kernel_gs_base, 1);
1862                 load_msrs(vcpu->guest_msrs, NR_BAD_MSRS);
1863         }
1864 #endif
1865
1866         asm (
1867                 /* Store host registers */
1868                 "pushf \n\t"
1869 #ifdef CONFIG_X86_64
1870                 "push %%rax; push %%rbx; push %%rdx;"
1871                 "push %%rsi; push %%rdi; push %%rbp;"
1872                 "push %%r8;  push %%r9;  push %%r10; push %%r11;"
1873                 "push %%r12; push %%r13; push %%r14; push %%r15;"
1874                 "push %%rcx \n\t"
1875                 ASM_VMX_VMWRITE_RSP_RDX "\n\t"
1876 #else
1877                 "pusha; push %%ecx \n\t"
1878                 ASM_VMX_VMWRITE_RSP_RDX "\n\t"
1879 #endif
1880                 /* Check if vmlaunch of vmresume is needed */
1881                 "cmp $0, %1 \n\t"
1882                 /* Load guest registers.  Don't clobber flags. */
1883 #ifdef CONFIG_X86_64
1884                 "mov %c[cr2](%3), %%rax \n\t"
1885                 "mov %%rax, %%cr2 \n\t"
1886                 "mov %c[rax](%3), %%rax \n\t"
1887                 "mov %c[rbx](%3), %%rbx \n\t"
1888                 "mov %c[rdx](%3), %%rdx \n\t"
1889                 "mov %c[rsi](%3), %%rsi \n\t"
1890                 "mov %c[rdi](%3), %%rdi \n\t"
1891                 "mov %c[rbp](%3), %%rbp \n\t"
1892                 "mov %c[r8](%3),  %%r8  \n\t"
1893                 "mov %c[r9](%3),  %%r9  \n\t"
1894                 "mov %c[r10](%3), %%r10 \n\t"
1895                 "mov %c[r11](%3), %%r11 \n\t"
1896                 "mov %c[r12](%3), %%r12 \n\t"
1897                 "mov %c[r13](%3), %%r13 \n\t"
1898                 "mov %c[r14](%3), %%r14 \n\t"
1899                 "mov %c[r15](%3), %%r15 \n\t"
1900                 "mov %c[rcx](%3), %%rcx \n\t" /* kills %3 (rcx) */
1901 #else
1902                 "mov %c[cr2](%3), %%eax \n\t"
1903                 "mov %%eax,   %%cr2 \n\t"
1904                 "mov %c[rax](%3), %%eax \n\t"
1905                 "mov %c[rbx](%3), %%ebx \n\t"
1906                 "mov %c[rdx](%3), %%edx \n\t"
1907                 "mov %c[rsi](%3), %%esi \n\t"
1908                 "mov %c[rdi](%3), %%edi \n\t"
1909                 "mov %c[rbp](%3), %%ebp \n\t"
1910                 "mov %c[rcx](%3), %%ecx \n\t" /* kills %3 (ecx) */
1911 #endif
1912                 /* Enter guest mode */
1913                 "jne launched \n\t"
1914                 ASM_VMX_VMLAUNCH "\n\t"
1915                 "jmp kvm_vmx_return \n\t"
1916                 "launched: " ASM_VMX_VMRESUME "\n\t"
1917                 ".globl kvm_vmx_return \n\t"
1918                 "kvm_vmx_return: "
1919                 /* Save guest registers, load host registers, keep flags */
1920 #ifdef CONFIG_X86_64
1921                 "xchg %3,     (%%rsp) \n\t"
1922                 "mov %%rax, %c[rax](%3) \n\t"
1923                 "mov %%rbx, %c[rbx](%3) \n\t"
1924                 "pushq (%%rsp); popq %c[rcx](%3) \n\t"
1925                 "mov %%rdx, %c[rdx](%3) \n\t"
1926                 "mov %%rsi, %c[rsi](%3) \n\t"
1927                 "mov %%rdi, %c[rdi](%3) \n\t"
1928                 "mov %%rbp, %c[rbp](%3) \n\t"
1929                 "mov %%r8,  %c[r8](%3) \n\t"
1930                 "mov %%r9,  %c[r9](%3) \n\t"
1931                 "mov %%r10, %c[r10](%3) \n\t"
1932                 "mov %%r11, %c[r11](%3) \n\t"
1933                 "mov %%r12, %c[r12](%3) \n\t"
1934                 "mov %%r13, %c[r13](%3) \n\t"
1935                 "mov %%r14, %c[r14](%3) \n\t"
1936                 "mov %%r15, %c[r15](%3) \n\t"
1937                 "mov %%cr2, %%rax   \n\t"
1938                 "mov %%rax, %c[cr2](%3) \n\t"
1939                 "mov (%%rsp), %3 \n\t"
1940
1941                 "pop  %%rcx; pop  %%r15; pop  %%r14; pop  %%r13; pop  %%r12;"
1942                 "pop  %%r11; pop  %%r10; pop  %%r9;  pop  %%r8;"
1943                 "pop  %%rbp; pop  %%rdi; pop  %%rsi;"
1944                 "pop  %%rdx; pop  %%rbx; pop  %%rax \n\t"
1945 #else
1946                 "xchg %3, (%%esp) \n\t"
1947                 "mov %%eax, %c[rax](%3) \n\t"
1948                 "mov %%ebx, %c[rbx](%3) \n\t"
1949                 "pushl (%%esp); popl %c[rcx](%3) \n\t"
1950                 "mov %%edx, %c[rdx](%3) \n\t"
1951                 "mov %%esi, %c[rsi](%3) \n\t"
1952                 "mov %%edi, %c[rdi](%3) \n\t"
1953                 "mov %%ebp, %c[rbp](%3) \n\t"
1954                 "mov %%cr2, %%eax  \n\t"
1955                 "mov %%eax, %c[cr2](%3) \n\t"
1956                 "mov (%%esp), %3 \n\t"
1957
1958                 "pop %%ecx; popa \n\t"
1959 #endif
1960                 "setbe %0 \n\t"
1961                 "popf \n\t"
1962               : "=q" (fail)
1963               : "r"(vcpu->launched), "d"((unsigned long)HOST_RSP),
1964                 "c"(vcpu),
1965                 [rax]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RAX])),
1966                 [rbx]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RBX])),
1967                 [rcx]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RCX])),
1968                 [rdx]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RDX])),
1969                 [rsi]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RSI])),
1970                 [rdi]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RDI])),
1971                 [rbp]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RBP])),
1972 #ifdef CONFIG_X86_64
1973                 [r8 ]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R8 ])),
1974                 [r9 ]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R9 ])),
1975                 [r10]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R10])),
1976                 [r11]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R11])),
1977                 [r12]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R12])),
1978                 [r13]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R13])),
1979                 [r14]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R14])),
1980                 [r15]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R15])),
1981 #endif
1982                 [cr2]"i"(offsetof(struct kvm_vcpu, cr2))
1983               : "cc", "memory" );
1984
1985         /*
1986          * Reload segment selectors ASAP. (it's needed for a functional
1987          * kernel: x86 relies on having __KERNEL_PDA in %fs and x86_64
1988          * relies on having 0 in %gs for the CPU PDA to work.)
1989          */
1990         if (fs_gs_ldt_reload_needed) {
1991                 load_ldt(ldt_sel);
1992                 load_fs(fs_sel);
1993                 /*
1994                  * If we have to reload gs, we must take care to
1995                  * preserve our gs base.
1996                  */
1997                 local_irq_disable();
1998                 load_gs(gs_sel);
1999 #ifdef CONFIG_X86_64
2000                 wrmsrl(MSR_GS_BASE, vmcs_readl(HOST_GS_BASE));
2001 #endif
2002                 local_irq_enable();
2003
2004                 reload_tss();
2005         }
2006         ++vcpu->stat.exits;
2007
2008 #ifdef CONFIG_X86_64
2009         if (is_long_mode(vcpu)) {
2010                 save_msrs(vcpu->guest_msrs, NR_BAD_MSRS);
2011                 load_msrs(vcpu->host_msrs, NR_BAD_MSRS);
2012         }
2013 #endif
2014
2015         if (vcpu->fpu_active) {
2016                 fx_save(vcpu->guest_fx_image);
2017                 fx_restore(vcpu->host_fx_image);
2018         }
2019
2020         vcpu->interrupt_window_open = (vmcs_read32(GUEST_INTERRUPTIBILITY_INFO) & 3) == 0;
2021
2022         asm ("mov %0, %%ds; mov %0, %%es" : : "r"(__USER_DS));
2023
2024         if (fail) {
2025                 kvm_run->exit_reason = KVM_EXIT_FAIL_ENTRY;
2026                 kvm_run->fail_entry.hardware_entry_failure_reason
2027                         = vmcs_read32(VM_INSTRUCTION_ERROR);
2028                 r = 0;
2029         } else {
2030                 /*
2031                  * Profile KVM exit RIPs:
2032                  */
2033                 if (unlikely(prof_on == KVM_PROFILING))
2034                         profile_hit(KVM_PROFILING, (void *)vmcs_readl(GUEST_RIP));
2035
2036                 vcpu->launched = 1;
2037                 r = kvm_handle_exit(kvm_run, vcpu);
2038                 if (r > 0) {
2039                         /* Give scheduler a change to reschedule. */
2040                         if (signal_pending(current)) {
2041                                 ++vcpu->stat.signal_exits;
2042                                 post_kvm_run_save(vcpu, kvm_run);
2043                                 kvm_run->exit_reason = KVM_EXIT_INTR;
2044                                 return -EINTR;
2045                         }
2046
2047                         if (dm_request_for_irq_injection(vcpu, kvm_run)) {
2048                                 ++vcpu->stat.request_irq_exits;
2049                                 post_kvm_run_save(vcpu, kvm_run);
2050                                 kvm_run->exit_reason = KVM_EXIT_INTR;
2051                                 return -EINTR;
2052                         }
2053
2054                         kvm_resched(vcpu);
2055                         goto again;
2056                 }
2057         }
2058
2059         post_kvm_run_save(vcpu, kvm_run);
2060         return r;
2061 }
2062
2063 static void vmx_flush_tlb(struct kvm_vcpu *vcpu)
2064 {
2065         vmcs_writel(GUEST_CR3, vmcs_readl(GUEST_CR3));
2066 }
2067
2068 static void vmx_inject_page_fault(struct kvm_vcpu *vcpu,
2069                                   unsigned long addr,
2070                                   u32 err_code)
2071 {
2072         u32 vect_info = vmcs_read32(IDT_VECTORING_INFO_FIELD);
2073
2074         ++vcpu->stat.pf_guest;
2075
2076         if (is_page_fault(vect_info)) {
2077                 printk(KERN_DEBUG "inject_page_fault: "
2078                        "double fault 0x%lx @ 0x%lx\n",
2079                        addr, vmcs_readl(GUEST_RIP));
2080                 vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE, 0);
2081                 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD,
2082                              DF_VECTOR |
2083                              INTR_TYPE_EXCEPTION |
2084                              INTR_INFO_DELIEVER_CODE_MASK |
2085                              INTR_INFO_VALID_MASK);
2086                 return;
2087         }
2088         vcpu->cr2 = addr;
2089         vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE, err_code);
2090         vmcs_write32(VM_ENTRY_INTR_INFO_FIELD,
2091                      PF_VECTOR |
2092                      INTR_TYPE_EXCEPTION |
2093                      INTR_INFO_DELIEVER_CODE_MASK |
2094                      INTR_INFO_VALID_MASK);
2095
2096 }
2097
2098 static void vmx_free_vmcs(struct kvm_vcpu *vcpu)
2099 {
2100         if (vcpu->vmcs) {
2101                 on_each_cpu(__vcpu_clear, vcpu, 0, 1);
2102                 free_vmcs(vcpu->vmcs);
2103                 vcpu->vmcs = NULL;
2104         }
2105 }
2106
2107 static void vmx_free_vcpu(struct kvm_vcpu *vcpu)
2108 {
2109         vmx_free_vmcs(vcpu);
2110 }
2111
2112 static int vmx_create_vcpu(struct kvm_vcpu *vcpu)
2113 {
2114         struct vmcs *vmcs;
2115
2116         vcpu->guest_msrs = kmalloc(PAGE_SIZE, GFP_KERNEL);
2117         if (!vcpu->guest_msrs)
2118                 return -ENOMEM;
2119
2120         vcpu->host_msrs = kmalloc(PAGE_SIZE, GFP_KERNEL);
2121         if (!vcpu->host_msrs)
2122                 goto out_free_guest_msrs;
2123
2124         vmcs = alloc_vmcs();
2125         if (!vmcs)
2126                 goto out_free_msrs;
2127
2128         vmcs_clear(vmcs);
2129         vcpu->vmcs = vmcs;
2130         vcpu->launched = 0;
2131         vcpu->fpu_active = 1;
2132
2133         return 0;
2134
2135 out_free_msrs:
2136         kfree(vcpu->host_msrs);
2137         vcpu->host_msrs = NULL;
2138
2139 out_free_guest_msrs:
2140         kfree(vcpu->guest_msrs);
2141         vcpu->guest_msrs = NULL;
2142
2143         return -ENOMEM;
2144 }
2145
2146 static struct kvm_arch_ops vmx_arch_ops = {
2147         .cpu_has_kvm_support = cpu_has_kvm_support,
2148         .disabled_by_bios = vmx_disabled_by_bios,
2149         .hardware_setup = hardware_setup,
2150         .hardware_unsetup = hardware_unsetup,
2151         .hardware_enable = hardware_enable,
2152         .hardware_disable = hardware_disable,
2153
2154         .vcpu_create = vmx_create_vcpu,
2155         .vcpu_free = vmx_free_vcpu,
2156
2157         .vcpu_load = vmx_vcpu_load,
2158         .vcpu_put = vmx_vcpu_put,
2159         .vcpu_decache = vmx_vcpu_decache,
2160
2161         .set_guest_debug = set_guest_debug,
2162         .get_msr = vmx_get_msr,
2163         .set_msr = vmx_set_msr,
2164         .get_segment_base = vmx_get_segment_base,
2165         .get_segment = vmx_get_segment,
2166         .set_segment = vmx_set_segment,
2167         .get_cs_db_l_bits = vmx_get_cs_db_l_bits,
2168         .decache_cr4_guest_bits = vmx_decache_cr4_guest_bits,
2169         .set_cr0 = vmx_set_cr0,
2170         .set_cr3 = vmx_set_cr3,
2171         .set_cr4 = vmx_set_cr4,
2172 #ifdef CONFIG_X86_64
2173         .set_efer = vmx_set_efer,
2174 #endif
2175         .get_idt = vmx_get_idt,
2176         .set_idt = vmx_set_idt,
2177         .get_gdt = vmx_get_gdt,
2178         .set_gdt = vmx_set_gdt,
2179         .cache_regs = vcpu_load_rsp_rip,
2180         .decache_regs = vcpu_put_rsp_rip,
2181         .get_rflags = vmx_get_rflags,
2182         .set_rflags = vmx_set_rflags,
2183
2184         .tlb_flush = vmx_flush_tlb,
2185         .inject_page_fault = vmx_inject_page_fault,
2186
2187         .inject_gp = vmx_inject_gp,
2188
2189         .run = vmx_vcpu_run,
2190         .skip_emulated_instruction = skip_emulated_instruction,
2191         .vcpu_setup = vmx_vcpu_setup,
2192         .patch_hypercall = vmx_patch_hypercall,
2193 };
2194
2195 static int __init vmx_init(void)
2196 {
2197         return kvm_init_arch(&vmx_arch_ops, THIS_MODULE);
2198 }
2199
2200 static void __exit vmx_exit(void)
2201 {
2202         kvm_exit_arch();
2203 }
2204
2205 module_init(vmx_init)
2206 module_exit(vmx_exit)