OSDN Git Service

mmc: renesas-sdhi: provide a whitelist for Gen3 SoC ES versions
[tomoyo/tomoyo-test1.git] / drivers / mmc / host / renesas_sdhi_sys_dmac.c
1 /*
2  * DMA support use of SYS DMAC with SDHI SD/SDIO controller
3  *
4  * Copyright (C) 2016-17 Renesas Electronics Corporation
5  * Copyright (C) 2016-17 Sang Engineering, Wolfram Sang
6  * Copyright (C) 2017 Horms Solutions, Simon Horman
7  * Copyright (C) 2010-2011 Guennadi Liakhovetski
8  *
9  * This program is free software; you can redistribute it and/or modify
10  * it under the terms of the GNU General Public License version 2 as
11  * published by the Free Software Foundation.
12  */
13
14 #include <linux/device.h>
15 #include <linux/dma-mapping.h>
16 #include <linux/dmaengine.h>
17 #include <linux/mfd/tmio.h>
18 #include <linux/mmc/host.h>
19 #include <linux/mod_devicetable.h>
20 #include <linux/module.h>
21 #include <linux/of_device.h>
22 #include <linux/pagemap.h>
23 #include <linux/scatterlist.h>
24 #include <linux/sys_soc.h>
25
26 #include "renesas_sdhi.h"
27 #include "tmio_mmc.h"
28
29 #define TMIO_MMC_MIN_DMA_LEN 8
30
31 static const struct renesas_sdhi_of_data of_default_cfg = {
32         .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT,
33 };
34
35 static const struct renesas_sdhi_of_data of_rz_compatible = {
36         .tmio_flags     = TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_32BIT_DATA_PORT,
37         .tmio_ocr_mask  = MMC_VDD_32_33,
38         .capabilities   = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ,
39 };
40
41 static const struct renesas_sdhi_of_data of_rcar_gen1_compatible = {
42         .tmio_flags     = TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_WRPROTECT_DISABLE |
43                           TMIO_MMC_CLK_ACTUAL,
44         .capabilities   = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ,
45 };
46
47 /* Definitions for sampling clocks */
48 static struct renesas_sdhi_scc rcar_gen2_scc_taps[] = {
49         {
50                 .clk_rate = 156000000,
51                 .tap = 0x00000703,
52         },
53         {
54                 .clk_rate = 0,
55                 .tap = 0x00000300,
56         },
57 };
58
59 static const struct renesas_sdhi_of_data of_rcar_gen2_compatible = {
60         .tmio_flags     = TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_WRPROTECT_DISABLE |
61                           TMIO_MMC_CLK_ACTUAL | TMIO_MMC_MIN_RCAR2,
62         .capabilities   = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ |
63                           MMC_CAP_CMD23,
64         .dma_buswidth   = DMA_SLAVE_BUSWIDTH_4_BYTES,
65         .dma_rx_offset  = 0x2000,
66         .scc_offset     = 0x0300,
67         .taps           = rcar_gen2_scc_taps,
68         .taps_num       = ARRAY_SIZE(rcar_gen2_scc_taps),
69 };
70
71 /* Definitions for sampling clocks */
72 static struct renesas_sdhi_scc rcar_gen3_scc_taps[] = {
73         {
74                 .clk_rate = 0,
75                 .tap = 0x00000300,
76         },
77 };
78
79 static const struct renesas_sdhi_of_data of_rcar_gen3_compatible = {
80         .tmio_flags     = TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_WRPROTECT_DISABLE |
81                           TMIO_MMC_CLK_ACTUAL | TMIO_MMC_MIN_RCAR2,
82         .capabilities   = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ |
83                           MMC_CAP_CMD23,
84         .bus_shift      = 2,
85         .scc_offset     = 0x1000,
86         .taps           = rcar_gen3_scc_taps,
87         .taps_num       = ARRAY_SIZE(rcar_gen3_scc_taps),
88 };
89
90 static const struct of_device_id renesas_sdhi_sys_dmac_of_match[] = {
91         { .compatible = "renesas,sdhi-shmobile" },
92         { .compatible = "renesas,sdhi-sh73a0", .data = &of_default_cfg, },
93         { .compatible = "renesas,sdhi-r8a73a4", .data = &of_default_cfg, },
94         { .compatible = "renesas,sdhi-r8a7740", .data = &of_default_cfg, },
95         { .compatible = "renesas,sdhi-r7s72100", .data = &of_rz_compatible, },
96         { .compatible = "renesas,sdhi-r8a7778", .data = &of_rcar_gen1_compatible, },
97         { .compatible = "renesas,sdhi-r8a7779", .data = &of_rcar_gen1_compatible, },
98         { .compatible = "renesas,sdhi-r8a7790", .data = &of_rcar_gen2_compatible, },
99         { .compatible = "renesas,sdhi-r8a7791", .data = &of_rcar_gen2_compatible, },
100         { .compatible = "renesas,sdhi-r8a7792", .data = &of_rcar_gen2_compatible, },
101         { .compatible = "renesas,sdhi-r8a7793", .data = &of_rcar_gen2_compatible, },
102         { .compatible = "renesas,sdhi-r8a7794", .data = &of_rcar_gen2_compatible, },
103         { .compatible = "renesas,sdhi-r8a7795", .data = &of_rcar_gen3_compatible, },
104         { .compatible = "renesas,sdhi-r8a7796", .data = &of_rcar_gen3_compatible, },
105         {},
106 };
107 MODULE_DEVICE_TABLE(of, renesas_sdhi_sys_dmac_of_match);
108
109 static void renesas_sdhi_sys_dmac_enable_dma(struct tmio_mmc_host *host,
110                                              bool enable)
111 {
112         if (!host->chan_tx || !host->chan_rx)
113                 return;
114
115         if (host->dma->enable)
116                 host->dma->enable(host, enable);
117 }
118
119 static void renesas_sdhi_sys_dmac_abort_dma(struct tmio_mmc_host *host)
120 {
121         renesas_sdhi_sys_dmac_enable_dma(host, false);
122
123         if (host->chan_rx)
124                 dmaengine_terminate_all(host->chan_rx);
125         if (host->chan_tx)
126                 dmaengine_terminate_all(host->chan_tx);
127
128         renesas_sdhi_sys_dmac_enable_dma(host, true);
129 }
130
131 static void renesas_sdhi_sys_dmac_dataend_dma(struct tmio_mmc_host *host)
132 {
133         complete(&host->dma_dataend);
134 }
135
136 static void renesas_sdhi_sys_dmac_dma_callback(void *arg)
137 {
138         struct tmio_mmc_host *host = arg;
139
140         spin_lock_irq(&host->lock);
141
142         if (!host->data)
143                 goto out;
144
145         if (host->data->flags & MMC_DATA_READ)
146                 dma_unmap_sg(host->chan_rx->device->dev,
147                              host->sg_ptr, host->sg_len,
148                              DMA_FROM_DEVICE);
149         else
150                 dma_unmap_sg(host->chan_tx->device->dev,
151                              host->sg_ptr, host->sg_len,
152                              DMA_TO_DEVICE);
153
154         spin_unlock_irq(&host->lock);
155
156         wait_for_completion(&host->dma_dataend);
157
158         spin_lock_irq(&host->lock);
159         tmio_mmc_do_data_irq(host);
160 out:
161         spin_unlock_irq(&host->lock);
162 }
163
164 static void renesas_sdhi_sys_dmac_start_dma_rx(struct tmio_mmc_host *host)
165 {
166         struct scatterlist *sg = host->sg_ptr, *sg_tmp;
167         struct dma_async_tx_descriptor *desc = NULL;
168         struct dma_chan *chan = host->chan_rx;
169         dma_cookie_t cookie;
170         int ret, i;
171         bool aligned = true, multiple = true;
172         unsigned int align = (1 << host->pdata->alignment_shift) - 1;
173
174         for_each_sg(sg, sg_tmp, host->sg_len, i) {
175                 if (sg_tmp->offset & align)
176                         aligned = false;
177                 if (sg_tmp->length & align) {
178                         multiple = false;
179                         break;
180                 }
181         }
182
183         if ((!aligned && (host->sg_len > 1 || sg->length > PAGE_SIZE ||
184                           (align & PAGE_MASK))) || !multiple) {
185                 ret = -EINVAL;
186                 goto pio;
187         }
188
189         if (sg->length < TMIO_MMC_MIN_DMA_LEN) {
190                 host->force_pio = true;
191                 return;
192         }
193
194         tmio_mmc_disable_mmc_irqs(host, TMIO_STAT_RXRDY);
195
196         /* The only sg element can be unaligned, use our bounce buffer then */
197         if (!aligned) {
198                 sg_init_one(&host->bounce_sg, host->bounce_buf, sg->length);
199                 host->sg_ptr = &host->bounce_sg;
200                 sg = host->sg_ptr;
201         }
202
203         ret = dma_map_sg(chan->device->dev, sg, host->sg_len, DMA_FROM_DEVICE);
204         if (ret > 0)
205                 desc = dmaengine_prep_slave_sg(chan, sg, ret, DMA_DEV_TO_MEM,
206                                                DMA_CTRL_ACK);
207
208         if (desc) {
209                 reinit_completion(&host->dma_dataend);
210                 desc->callback = renesas_sdhi_sys_dmac_dma_callback;
211                 desc->callback_param = host;
212
213                 cookie = dmaengine_submit(desc);
214                 if (cookie < 0) {
215                         desc = NULL;
216                         ret = cookie;
217                 }
218         }
219 pio:
220         if (!desc) {
221                 /* DMA failed, fall back to PIO */
222                 renesas_sdhi_sys_dmac_enable_dma(host, false);
223                 if (ret >= 0)
224                         ret = -EIO;
225                 host->chan_rx = NULL;
226                 dma_release_channel(chan);
227                 /* Free the Tx channel too */
228                 chan = host->chan_tx;
229                 if (chan) {
230                         host->chan_tx = NULL;
231                         dma_release_channel(chan);
232                 }
233                 dev_warn(&host->pdev->dev,
234                          "DMA failed: %d, falling back to PIO\n", ret);
235         }
236 }
237
238 static void renesas_sdhi_sys_dmac_start_dma_tx(struct tmio_mmc_host *host)
239 {
240         struct scatterlist *sg = host->sg_ptr, *sg_tmp;
241         struct dma_async_tx_descriptor *desc = NULL;
242         struct dma_chan *chan = host->chan_tx;
243         dma_cookie_t cookie;
244         int ret, i;
245         bool aligned = true, multiple = true;
246         unsigned int align = (1 << host->pdata->alignment_shift) - 1;
247
248         for_each_sg(sg, sg_tmp, host->sg_len, i) {
249                 if (sg_tmp->offset & align)
250                         aligned = false;
251                 if (sg_tmp->length & align) {
252                         multiple = false;
253                         break;
254                 }
255         }
256
257         if ((!aligned && (host->sg_len > 1 || sg->length > PAGE_SIZE ||
258                           (align & PAGE_MASK))) || !multiple) {
259                 ret = -EINVAL;
260                 goto pio;
261         }
262
263         if (sg->length < TMIO_MMC_MIN_DMA_LEN) {
264                 host->force_pio = true;
265                 return;
266         }
267
268         tmio_mmc_disable_mmc_irqs(host, TMIO_STAT_TXRQ);
269
270         /* The only sg element can be unaligned, use our bounce buffer then */
271         if (!aligned) {
272                 unsigned long flags;
273                 void *sg_vaddr = tmio_mmc_kmap_atomic(sg, &flags);
274
275                 sg_init_one(&host->bounce_sg, host->bounce_buf, sg->length);
276                 memcpy(host->bounce_buf, sg_vaddr, host->bounce_sg.length);
277                 tmio_mmc_kunmap_atomic(sg, &flags, sg_vaddr);
278                 host->sg_ptr = &host->bounce_sg;
279                 sg = host->sg_ptr;
280         }
281
282         ret = dma_map_sg(chan->device->dev, sg, host->sg_len, DMA_TO_DEVICE);
283         if (ret > 0)
284                 desc = dmaengine_prep_slave_sg(chan, sg, ret, DMA_MEM_TO_DEV,
285                                                DMA_CTRL_ACK);
286
287         if (desc) {
288                 reinit_completion(&host->dma_dataend);
289                 desc->callback = renesas_sdhi_sys_dmac_dma_callback;
290                 desc->callback_param = host;
291
292                 cookie = dmaengine_submit(desc);
293                 if (cookie < 0) {
294                         desc = NULL;
295                         ret = cookie;
296                 }
297         }
298 pio:
299         if (!desc) {
300                 /* DMA failed, fall back to PIO */
301                 renesas_sdhi_sys_dmac_enable_dma(host, false);
302                 if (ret >= 0)
303                         ret = -EIO;
304                 host->chan_tx = NULL;
305                 dma_release_channel(chan);
306                 /* Free the Rx channel too */
307                 chan = host->chan_rx;
308                 if (chan) {
309                         host->chan_rx = NULL;
310                         dma_release_channel(chan);
311                 }
312                 dev_warn(&host->pdev->dev,
313                          "DMA failed: %d, falling back to PIO\n", ret);
314         }
315 }
316
317 static void renesas_sdhi_sys_dmac_start_dma(struct tmio_mmc_host *host,
318                                             struct mmc_data *data)
319 {
320         if (data->flags & MMC_DATA_READ) {
321                 if (host->chan_rx)
322                         renesas_sdhi_sys_dmac_start_dma_rx(host);
323         } else {
324                 if (host->chan_tx)
325                         renesas_sdhi_sys_dmac_start_dma_tx(host);
326         }
327 }
328
329 static void renesas_sdhi_sys_dmac_issue_tasklet_fn(unsigned long priv)
330 {
331         struct tmio_mmc_host *host = (struct tmio_mmc_host *)priv;
332         struct dma_chan *chan = NULL;
333
334         spin_lock_irq(&host->lock);
335
336         if (host && host->data) {
337                 if (host->data->flags & MMC_DATA_READ)
338                         chan = host->chan_rx;
339                 else
340                         chan = host->chan_tx;
341         }
342
343         spin_unlock_irq(&host->lock);
344
345         tmio_mmc_enable_mmc_irqs(host, TMIO_STAT_DATAEND);
346
347         if (chan)
348                 dma_async_issue_pending(chan);
349 }
350
351 static void renesas_sdhi_sys_dmac_request_dma(struct tmio_mmc_host *host,
352                                               struct tmio_mmc_data *pdata)
353 {
354         /* We can only either use DMA for both Tx and Rx or not use it at all */
355         if (!host->dma || (!host->pdev->dev.of_node &&
356                            (!pdata->chan_priv_tx || !pdata->chan_priv_rx)))
357                 return;
358
359         if (!host->chan_tx && !host->chan_rx) {
360                 struct resource *res = platform_get_resource(host->pdev,
361                                                              IORESOURCE_MEM, 0);
362                 struct dma_slave_config cfg = {};
363                 dma_cap_mask_t mask;
364                 int ret;
365
366                 if (!res)
367                         return;
368
369                 dma_cap_zero(mask);
370                 dma_cap_set(DMA_SLAVE, mask);
371
372                 host->chan_tx = dma_request_slave_channel_compat(mask,
373                                         host->dma->filter, pdata->chan_priv_tx,
374                                         &host->pdev->dev, "tx");
375                 dev_dbg(&host->pdev->dev, "%s: TX: got channel %p\n", __func__,
376                         host->chan_tx);
377
378                 if (!host->chan_tx)
379                         return;
380
381                 cfg.direction = DMA_MEM_TO_DEV;
382                 cfg.dst_addr = res->start +
383                         (CTL_SD_DATA_PORT << host->bus_shift);
384                 cfg.dst_addr_width = host->dma->dma_buswidth;
385                 if (!cfg.dst_addr_width)
386                         cfg.dst_addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
387                 cfg.src_addr = 0;
388                 ret = dmaengine_slave_config(host->chan_tx, &cfg);
389                 if (ret < 0)
390                         goto ecfgtx;
391
392                 host->chan_rx = dma_request_slave_channel_compat(mask,
393                                         host->dma->filter, pdata->chan_priv_rx,
394                                         &host->pdev->dev, "rx");
395                 dev_dbg(&host->pdev->dev, "%s: RX: got channel %p\n", __func__,
396                         host->chan_rx);
397
398                 if (!host->chan_rx)
399                         goto ereqrx;
400
401                 cfg.direction = DMA_DEV_TO_MEM;
402                 cfg.src_addr = cfg.dst_addr + host->pdata->dma_rx_offset;
403                 cfg.src_addr_width = host->dma->dma_buswidth;
404                 if (!cfg.src_addr_width)
405                         cfg.src_addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
406                 cfg.dst_addr = 0;
407                 ret = dmaengine_slave_config(host->chan_rx, &cfg);
408                 if (ret < 0)
409                         goto ecfgrx;
410
411                 host->bounce_buf = (u8 *)__get_free_page(GFP_KERNEL | GFP_DMA);
412                 if (!host->bounce_buf)
413                         goto ebouncebuf;
414
415                 init_completion(&host->dma_dataend);
416                 tasklet_init(&host->dma_issue,
417                              renesas_sdhi_sys_dmac_issue_tasklet_fn,
418                              (unsigned long)host);
419         }
420
421         renesas_sdhi_sys_dmac_enable_dma(host, true);
422
423         return;
424
425 ebouncebuf:
426 ecfgrx:
427         dma_release_channel(host->chan_rx);
428         host->chan_rx = NULL;
429 ereqrx:
430 ecfgtx:
431         dma_release_channel(host->chan_tx);
432         host->chan_tx = NULL;
433 }
434
435 static void renesas_sdhi_sys_dmac_release_dma(struct tmio_mmc_host *host)
436 {
437         if (host->chan_tx) {
438                 struct dma_chan *chan = host->chan_tx;
439
440                 host->chan_tx = NULL;
441                 dma_release_channel(chan);
442         }
443         if (host->chan_rx) {
444                 struct dma_chan *chan = host->chan_rx;
445
446                 host->chan_rx = NULL;
447                 dma_release_channel(chan);
448         }
449         if (host->bounce_buf) {
450                 free_pages((unsigned long)host->bounce_buf, 0);
451                 host->bounce_buf = NULL;
452         }
453 }
454
455 static const struct tmio_mmc_dma_ops renesas_sdhi_sys_dmac_dma_ops = {
456         .start = renesas_sdhi_sys_dmac_start_dma,
457         .enable = renesas_sdhi_sys_dmac_enable_dma,
458         .request = renesas_sdhi_sys_dmac_request_dma,
459         .release = renesas_sdhi_sys_dmac_release_dma,
460         .abort = renesas_sdhi_sys_dmac_abort_dma,
461         .dataend = renesas_sdhi_sys_dmac_dataend_dma,
462 };
463
464 /*
465  * Whitelist of specific R-Car Gen3 SoC ES versions to use this DMAC
466  * implementation. Currently empty as all supported ES versions use
467  * the internal DMAC.
468  */
469 static const struct soc_device_attribute gen3_soc_whitelist[] = {
470         { /* sentinel */ }
471 };
472
473 static int renesas_sdhi_sys_dmac_probe(struct platform_device *pdev)
474 {
475         if (of_device_get_match_data(&pdev->dev) == &of_rcar_gen3_compatible &&
476             !soc_device_match(gen3_soc_whitelist))
477                 return -ENODEV;
478
479         return renesas_sdhi_probe(pdev, &renesas_sdhi_sys_dmac_dma_ops);
480 }
481
482 static const struct dev_pm_ops renesas_sdhi_sys_dmac_dev_pm_ops = {
483         SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
484                                 pm_runtime_force_resume)
485         SET_RUNTIME_PM_OPS(tmio_mmc_host_runtime_suspend,
486                            tmio_mmc_host_runtime_resume,
487                            NULL)
488 };
489
490 static struct platform_driver renesas_sys_dmac_sdhi_driver = {
491         .driver         = {
492                 .name   = "sh_mobile_sdhi",
493                 .pm     = &renesas_sdhi_sys_dmac_dev_pm_ops,
494                 .of_match_table = renesas_sdhi_sys_dmac_of_match,
495         },
496         .probe          = renesas_sdhi_sys_dmac_probe,
497         .remove         = renesas_sdhi_remove,
498 };
499
500 module_platform_driver(renesas_sys_dmac_sdhi_driver);
501
502 MODULE_DESCRIPTION("Renesas SDHI driver");
503 MODULE_AUTHOR("Magnus Damm");
504 MODULE_LICENSE("GPL v2");
505 MODULE_ALIAS("platform:sh_mobile_sdhi");