1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright 2019-2021 NXP
4 * This is an umbrella module for all network switches that are
5 * register-compatible with Ocelot and that perform I/O to their host CPU
6 * through an NPI (Node Processor Interface) Ethernet port.
8 #include <uapi/linux/if_bridge.h>
9 #include <soc/mscc/ocelot_vcap.h>
10 #include <soc/mscc/ocelot_qsys.h>
11 #include <soc/mscc/ocelot_sys.h>
12 #include <soc/mscc/ocelot_dev.h>
13 #include <soc/mscc/ocelot_ana.h>
14 #include <soc/mscc/ocelot_ptp.h>
15 #include <soc/mscc/ocelot.h>
16 #include <linux/dsa/8021q.h>
17 #include <linux/dsa/ocelot.h>
18 #include <linux/platform_device.h>
19 #include <linux/ptp_classify.h>
20 #include <linux/module.h>
21 #include <linux/of_net.h>
22 #include <linux/pci.h>
24 #include <net/pkt_sched.h>
28 /* Translate the DSA database API into the ocelot switch library API,
29 * which uses VID 0 for all ports that aren't part of a bridge,
30 * and expects the bridge_dev to be NULL in that case.
32 static struct net_device *felix_classify_db(struct dsa_db db)
41 return ERR_PTR(-EOPNOTSUPP);
45 /* We are called before felix_npi_port_init(), so ocelot->npi is -1. */
46 static int felix_migrate_fdbs_to_npi_port(struct dsa_switch *ds, int port,
47 const unsigned char *addr, u16 vid,
50 struct net_device *bridge_dev = felix_classify_db(db);
51 struct ocelot *ocelot = ds->priv;
52 int cpu = ocelot->num_phys_ports;
55 err = ocelot_fdb_del(ocelot, port, addr, vid, bridge_dev);
59 return ocelot_fdb_add(ocelot, cpu, addr, vid, bridge_dev);
62 static int felix_migrate_mdbs_to_npi_port(struct dsa_switch *ds, int port,
63 const unsigned char *addr, u16 vid,
66 struct net_device *bridge_dev = felix_classify_db(db);
67 struct switchdev_obj_port_mdb mdb;
68 struct ocelot *ocelot = ds->priv;
69 int cpu = ocelot->num_phys_ports;
72 memset(&mdb, 0, sizeof(mdb));
73 ether_addr_copy(mdb.addr, addr);
76 err = ocelot_port_mdb_del(ocelot, port, &mdb, bridge_dev);
80 return ocelot_port_mdb_add(ocelot, cpu, &mdb, bridge_dev);
83 static void felix_migrate_pgid_bit(struct dsa_switch *ds, int from, int to,
86 struct ocelot *ocelot = ds->priv;
90 val = ocelot_read_rix(ocelot, ANA_PGID_PGID, pgid);
91 on = !!(val & BIT(from));
98 ocelot_write_rix(ocelot, val, ANA_PGID_PGID, pgid);
101 static void felix_migrate_flood_to_npi_port(struct dsa_switch *ds, int port)
103 struct ocelot *ocelot = ds->priv;
105 felix_migrate_pgid_bit(ds, port, ocelot->num_phys_ports, PGID_UC);
106 felix_migrate_pgid_bit(ds, port, ocelot->num_phys_ports, PGID_MC);
107 felix_migrate_pgid_bit(ds, port, ocelot->num_phys_ports, PGID_BC);
111 felix_migrate_flood_to_tag_8021q_port(struct dsa_switch *ds, int port)
113 struct ocelot *ocelot = ds->priv;
115 felix_migrate_pgid_bit(ds, ocelot->num_phys_ports, port, PGID_UC);
116 felix_migrate_pgid_bit(ds, ocelot->num_phys_ports, port, PGID_MC);
117 felix_migrate_pgid_bit(ds, ocelot->num_phys_ports, port, PGID_BC);
120 /* ocelot->npi was already set to -1 by felix_npi_port_deinit, so
121 * ocelot_fdb_add() will not redirect FDB entries towards the
122 * CPU port module here, which is what we want.
125 felix_migrate_fdbs_to_tag_8021q_port(struct dsa_switch *ds, int port,
126 const unsigned char *addr, u16 vid,
129 struct net_device *bridge_dev = felix_classify_db(db);
130 struct ocelot *ocelot = ds->priv;
131 int cpu = ocelot->num_phys_ports;
134 err = ocelot_fdb_del(ocelot, cpu, addr, vid, bridge_dev);
138 return ocelot_fdb_add(ocelot, port, addr, vid, bridge_dev);
142 felix_migrate_mdbs_to_tag_8021q_port(struct dsa_switch *ds, int port,
143 const unsigned char *addr, u16 vid,
146 struct net_device *bridge_dev = felix_classify_db(db);
147 struct switchdev_obj_port_mdb mdb;
148 struct ocelot *ocelot = ds->priv;
149 int cpu = ocelot->num_phys_ports;
152 memset(&mdb, 0, sizeof(mdb));
153 ether_addr_copy(mdb.addr, addr);
156 err = ocelot_port_mdb_del(ocelot, cpu, &mdb, bridge_dev);
160 return ocelot_port_mdb_add(ocelot, port, &mdb, bridge_dev);
163 /* Set up VCAP ES0 rules for pushing a tag_8021q VLAN towards the CPU such that
164 * the tagger can perform RX source port identification.
166 static int felix_tag_8021q_vlan_add_rx(struct felix *felix, int port, u16 vid)
168 struct ocelot_vcap_filter *outer_tagging_rule;
169 struct ocelot *ocelot = &felix->ocelot;
170 struct dsa_switch *ds = felix->ds;
171 int key_length, upstream, err;
173 key_length = ocelot->vcap[VCAP_ES0].keys[VCAP_ES0_IGR_PORT].length;
174 upstream = dsa_upstream_port(ds, port);
176 outer_tagging_rule = kzalloc(sizeof(struct ocelot_vcap_filter),
178 if (!outer_tagging_rule)
181 outer_tagging_rule->key_type = OCELOT_VCAP_KEY_ANY;
182 outer_tagging_rule->prio = 1;
183 outer_tagging_rule->id.cookie = OCELOT_VCAP_ES0_TAG_8021Q_RXVLAN(ocelot, port);
184 outer_tagging_rule->id.tc_offload = false;
185 outer_tagging_rule->block_id = VCAP_ES0;
186 outer_tagging_rule->type = OCELOT_VCAP_FILTER_OFFLOAD;
187 outer_tagging_rule->lookup = 0;
188 outer_tagging_rule->ingress_port.value = port;
189 outer_tagging_rule->ingress_port.mask = GENMASK(key_length - 1, 0);
190 outer_tagging_rule->egress_port.value = upstream;
191 outer_tagging_rule->egress_port.mask = GENMASK(key_length - 1, 0);
192 outer_tagging_rule->action.push_outer_tag = OCELOT_ES0_TAG;
193 outer_tagging_rule->action.tag_a_tpid_sel = OCELOT_TAG_TPID_SEL_8021AD;
194 outer_tagging_rule->action.tag_a_vid_sel = 1;
195 outer_tagging_rule->action.vid_a_val = vid;
197 err = ocelot_vcap_filter_add(ocelot, outer_tagging_rule, NULL);
199 kfree(outer_tagging_rule);
204 static int felix_tag_8021q_vlan_del_rx(struct felix *felix, int port, u16 vid)
206 struct ocelot_vcap_filter *outer_tagging_rule;
207 struct ocelot_vcap_block *block_vcap_es0;
208 struct ocelot *ocelot = &felix->ocelot;
210 block_vcap_es0 = &ocelot->block[VCAP_ES0];
212 outer_tagging_rule = ocelot_vcap_block_find_filter_by_id(block_vcap_es0,
214 if (!outer_tagging_rule)
217 return ocelot_vcap_filter_del(ocelot, outer_tagging_rule);
220 /* Set up VCAP IS1 rules for stripping the tag_8021q VLAN on TX and VCAP IS2
221 * rules for steering those tagged packets towards the correct destination port
223 static int felix_tag_8021q_vlan_add_tx(struct felix *felix, int port, u16 vid)
225 struct ocelot_vcap_filter *untagging_rule, *redirect_rule;
226 struct ocelot *ocelot = &felix->ocelot;
227 struct dsa_switch *ds = felix->ds;
230 untagging_rule = kzalloc(sizeof(struct ocelot_vcap_filter), GFP_KERNEL);
234 redirect_rule = kzalloc(sizeof(struct ocelot_vcap_filter), GFP_KERNEL);
235 if (!redirect_rule) {
236 kfree(untagging_rule);
240 upstream = dsa_upstream_port(ds, port);
242 untagging_rule->key_type = OCELOT_VCAP_KEY_ANY;
243 untagging_rule->ingress_port_mask = BIT(upstream);
244 untagging_rule->vlan.vid.value = vid;
245 untagging_rule->vlan.vid.mask = VLAN_VID_MASK;
246 untagging_rule->prio = 1;
247 untagging_rule->id.cookie = OCELOT_VCAP_IS1_TAG_8021Q_TXVLAN(ocelot, port);
248 untagging_rule->id.tc_offload = false;
249 untagging_rule->block_id = VCAP_IS1;
250 untagging_rule->type = OCELOT_VCAP_FILTER_OFFLOAD;
251 untagging_rule->lookup = 0;
252 untagging_rule->action.vlan_pop_cnt_ena = true;
253 untagging_rule->action.vlan_pop_cnt = 1;
254 untagging_rule->action.pag_override_mask = 0xff;
255 untagging_rule->action.pag_val = port;
257 err = ocelot_vcap_filter_add(ocelot, untagging_rule, NULL);
259 kfree(untagging_rule);
260 kfree(redirect_rule);
264 redirect_rule->key_type = OCELOT_VCAP_KEY_ANY;
265 redirect_rule->ingress_port_mask = BIT(upstream);
266 redirect_rule->pag = port;
267 redirect_rule->prio = 1;
268 redirect_rule->id.cookie = OCELOT_VCAP_IS2_TAG_8021Q_TXVLAN(ocelot, port);
269 redirect_rule->id.tc_offload = false;
270 redirect_rule->block_id = VCAP_IS2;
271 redirect_rule->type = OCELOT_VCAP_FILTER_OFFLOAD;
272 redirect_rule->lookup = 0;
273 redirect_rule->action.mask_mode = OCELOT_MASK_MODE_REDIRECT;
274 redirect_rule->action.port_mask = BIT(port);
276 err = ocelot_vcap_filter_add(ocelot, redirect_rule, NULL);
278 ocelot_vcap_filter_del(ocelot, untagging_rule);
279 kfree(redirect_rule);
286 static int felix_tag_8021q_vlan_del_tx(struct felix *felix, int port, u16 vid)
288 struct ocelot_vcap_filter *untagging_rule, *redirect_rule;
289 struct ocelot_vcap_block *block_vcap_is1;
290 struct ocelot_vcap_block *block_vcap_is2;
291 struct ocelot *ocelot = &felix->ocelot;
294 block_vcap_is1 = &ocelot->block[VCAP_IS1];
295 block_vcap_is2 = &ocelot->block[VCAP_IS2];
297 untagging_rule = ocelot_vcap_block_find_filter_by_id(block_vcap_is1,
302 err = ocelot_vcap_filter_del(ocelot, untagging_rule);
306 redirect_rule = ocelot_vcap_block_find_filter_by_id(block_vcap_is2,
311 return ocelot_vcap_filter_del(ocelot, redirect_rule);
314 static int felix_tag_8021q_vlan_add(struct dsa_switch *ds, int port, u16 vid,
317 struct ocelot *ocelot = ds->priv;
320 /* tag_8021q.c assumes we are implementing this via port VLAN
321 * membership, which we aren't. So we don't need to add any VCAP filter
324 if (!dsa_is_user_port(ds, port))
327 err = felix_tag_8021q_vlan_add_rx(ocelot_to_felix(ocelot), port, vid);
331 err = felix_tag_8021q_vlan_add_tx(ocelot_to_felix(ocelot), port, vid);
333 felix_tag_8021q_vlan_del_rx(ocelot_to_felix(ocelot), port, vid);
340 static int felix_tag_8021q_vlan_del(struct dsa_switch *ds, int port, u16 vid)
342 struct ocelot *ocelot = ds->priv;
345 if (!dsa_is_user_port(ds, port))
348 err = felix_tag_8021q_vlan_del_rx(ocelot_to_felix(ocelot), port, vid);
352 err = felix_tag_8021q_vlan_del_tx(ocelot_to_felix(ocelot), port, vid);
354 felix_tag_8021q_vlan_add_rx(ocelot_to_felix(ocelot), port, vid);
361 /* Alternatively to using the NPI functionality, that same hardware MAC
362 * connected internally to the enetc or fman DSA master can be configured to
363 * use the software-defined tag_8021q frame format. As far as the hardware is
364 * concerned, it thinks it is a "dumb switch" - the queues of the CPU port
365 * module are now disconnected from it, but can still be accessed through
366 * register-based MMIO.
368 static void felix_8021q_cpu_port_init(struct ocelot *ocelot, int port)
370 mutex_lock(&ocelot->fwd_domain_lock);
372 ocelot_port_set_dsa_8021q_cpu(ocelot, port);
374 /* Overwrite PGID_CPU with the non-tagging port */
375 ocelot_write_rix(ocelot, BIT(port), ANA_PGID_PGID, PGID_CPU);
377 ocelot_apply_bridge_fwd_mask(ocelot, true);
379 mutex_unlock(&ocelot->fwd_domain_lock);
382 static void felix_8021q_cpu_port_deinit(struct ocelot *ocelot, int port)
384 mutex_lock(&ocelot->fwd_domain_lock);
386 ocelot_port_unset_dsa_8021q_cpu(ocelot, port);
388 /* Restore PGID_CPU */
389 ocelot_write_rix(ocelot, BIT(ocelot->num_phys_ports), ANA_PGID_PGID,
392 ocelot_apply_bridge_fwd_mask(ocelot, true);
394 mutex_unlock(&ocelot->fwd_domain_lock);
397 /* On switches with no extraction IRQ wired, trapped packets need to be
398 * replicated over Ethernet as well, otherwise we'd get no notification of
399 * their arrival when using the ocelot-8021q tagging protocol.
401 static int felix_update_trapping_destinations(struct dsa_switch *ds,
402 bool using_tag_8021q)
404 struct ocelot *ocelot = ds->priv;
405 struct felix *felix = ocelot_to_felix(ocelot);
406 struct ocelot_vcap_filter *trap;
407 enum ocelot_mask_mode mask_mode;
408 unsigned long port_mask;
413 if (!felix->info->quirk_no_xtr_irq)
416 /* Figure out the current CPU port */
417 dsa_switch_for_each_cpu_port(dp, ds) {
422 /* We are sure that "cpu" was found, otherwise
423 * dsa_tree_setup_default_cpu() would have failed earlier.
426 /* Make sure all traps are set up for that destination */
427 list_for_each_entry(trap, &ocelot->traps, trap_list) {
428 /* Figure out the current trapping destination */
429 if (using_tag_8021q) {
430 /* Redirect to the tag_8021q CPU port. If timestamps
431 * are necessary, also copy trapped packets to the CPU
434 mask_mode = OCELOT_MASK_MODE_REDIRECT;
435 port_mask = BIT(cpu);
436 cpu_copy_ena = !!trap->take_ts;
438 /* Trap packets only to the CPU port module, which is
439 * redirected to the NPI port (the DSA CPU port)
441 mask_mode = OCELOT_MASK_MODE_PERMIT_DENY;
446 if (trap->action.mask_mode == mask_mode &&
447 trap->action.port_mask == port_mask &&
448 trap->action.cpu_copy_ena == cpu_copy_ena)
451 trap->action.mask_mode = mask_mode;
452 trap->action.port_mask = port_mask;
453 trap->action.cpu_copy_ena = cpu_copy_ena;
455 err = ocelot_vcap_filter_replace(ocelot, trap);
463 static int felix_setup_tag_8021q(struct dsa_switch *ds, int cpu)
465 struct ocelot *ocelot = ds->priv;
469 felix_8021q_cpu_port_init(ocelot, cpu);
471 dsa_switch_for_each_available_port(dp, ds) {
472 /* This overwrites ocelot_init():
473 * Do not forward BPDU frames to the CPU port module,
475 * - When these packets are injected from the tag_8021q
476 * CPU port, we want them to go out, not loop back
478 * - STP traffic ingressing on a user port should go to
479 * the tag_8021q CPU port, not to the hardware CPU
482 ocelot_write_gix(ocelot,
483 ANA_PORT_CPU_FWD_BPDU_CFG_BPDU_REDIR_ENA(0),
484 ANA_PORT_CPU_FWD_BPDU_CFG, dp->index);
487 err = dsa_tag_8021q_register(ds, htons(ETH_P_8021AD));
491 err = dsa_port_walk_fdbs(ds, cpu, felix_migrate_fdbs_to_tag_8021q_port);
493 goto out_tag_8021q_unregister;
495 err = dsa_port_walk_mdbs(ds, cpu, felix_migrate_mdbs_to_tag_8021q_port);
497 goto out_migrate_fdbs;
499 felix_migrate_flood_to_tag_8021q_port(ds, cpu);
501 err = felix_update_trapping_destinations(ds, true);
503 goto out_migrate_flood;
505 /* The ownership of the CPU port module's queues might have just been
506 * transferred to the tag_8021q tagger from the NPI-based tagger.
507 * So there might still be all sorts of crap in the queues. On the
508 * other hand, the MMIO-based matching of PTP frames is very brittle,
509 * so we need to be careful that there are no extra frames to be
510 * dequeued over MMIO, since we would never know to discard them.
512 ocelot_drain_cpu_queue(ocelot, 0);
517 felix_migrate_flood_to_npi_port(ds, cpu);
518 dsa_port_walk_mdbs(ds, cpu, felix_migrate_mdbs_to_npi_port);
520 dsa_port_walk_fdbs(ds, cpu, felix_migrate_fdbs_to_npi_port);
521 out_tag_8021q_unregister:
522 dsa_tag_8021q_unregister(ds);
526 static void felix_teardown_tag_8021q(struct dsa_switch *ds, int cpu)
528 struct ocelot *ocelot = ds->priv;
532 err = felix_update_trapping_destinations(ds, false);
534 dev_err(ds->dev, "felix_teardown_mmio_filtering returned %d",
537 dsa_tag_8021q_unregister(ds);
539 dsa_switch_for_each_available_port(dp, ds) {
540 /* Restore the logic from ocelot_init:
541 * do not forward BPDU frames to the front ports.
543 ocelot_write_gix(ocelot,
544 ANA_PORT_CPU_FWD_BPDU_CFG_BPDU_REDIR_ENA(0xffff),
545 ANA_PORT_CPU_FWD_BPDU_CFG,
549 felix_8021q_cpu_port_deinit(ocelot, cpu);
552 /* The CPU port module is connected to the Node Processor Interface (NPI). This
553 * is the mode through which frames can be injected from and extracted to an
554 * external CPU, over Ethernet. In NXP SoCs, the "external CPU" is the ARM CPU
555 * running Linux, and this forms a DSA setup together with the enetc or fman
558 static void felix_npi_port_init(struct ocelot *ocelot, int port)
562 ocelot_write(ocelot, QSYS_EXT_CPU_CFG_EXT_CPUQ_MSK_M |
563 QSYS_EXT_CPU_CFG_EXT_CPU_PORT(port),
566 /* NPI port Injection/Extraction configuration */
567 ocelot_fields_write(ocelot, port, SYS_PORT_MODE_INCL_XTR_HDR,
568 ocelot->npi_xtr_prefix);
569 ocelot_fields_write(ocelot, port, SYS_PORT_MODE_INCL_INJ_HDR,
570 ocelot->npi_inj_prefix);
572 /* Disable transmission of pause frames */
573 ocelot_fields_write(ocelot, port, SYS_PAUSE_CFG_PAUSE_ENA, 0);
576 static void felix_npi_port_deinit(struct ocelot *ocelot, int port)
578 /* Restore hardware defaults */
579 int unused_port = ocelot->num_phys_ports + 2;
583 ocelot_write(ocelot, QSYS_EXT_CPU_CFG_EXT_CPU_PORT(unused_port),
586 ocelot_fields_write(ocelot, port, SYS_PORT_MODE_INCL_XTR_HDR,
587 OCELOT_TAG_PREFIX_DISABLED);
588 ocelot_fields_write(ocelot, port, SYS_PORT_MODE_INCL_INJ_HDR,
589 OCELOT_TAG_PREFIX_DISABLED);
591 /* Enable transmission of pause frames */
592 ocelot_fields_write(ocelot, port, SYS_PAUSE_CFG_PAUSE_ENA, 1);
595 static int felix_setup_tag_npi(struct dsa_switch *ds, int cpu)
597 struct ocelot *ocelot = ds->priv;
600 err = dsa_port_walk_fdbs(ds, cpu, felix_migrate_fdbs_to_npi_port);
604 err = dsa_port_walk_mdbs(ds, cpu, felix_migrate_mdbs_to_npi_port);
606 goto out_migrate_fdbs;
608 felix_migrate_flood_to_npi_port(ds, cpu);
610 felix_npi_port_init(ocelot, cpu);
615 dsa_port_walk_fdbs(ds, cpu, felix_migrate_fdbs_to_tag_8021q_port);
620 static void felix_teardown_tag_npi(struct dsa_switch *ds, int cpu)
622 struct ocelot *ocelot = ds->priv;
624 felix_npi_port_deinit(ocelot, cpu);
627 static int felix_set_tag_protocol(struct dsa_switch *ds, int cpu,
628 enum dsa_tag_protocol proto)
633 case DSA_TAG_PROTO_SEVILLE:
634 case DSA_TAG_PROTO_OCELOT:
635 err = felix_setup_tag_npi(ds, cpu);
637 case DSA_TAG_PROTO_OCELOT_8021Q:
638 err = felix_setup_tag_8021q(ds, cpu);
641 err = -EPROTONOSUPPORT;
647 static void felix_del_tag_protocol(struct dsa_switch *ds, int cpu,
648 enum dsa_tag_protocol proto)
651 case DSA_TAG_PROTO_SEVILLE:
652 case DSA_TAG_PROTO_OCELOT:
653 felix_teardown_tag_npi(ds, cpu);
655 case DSA_TAG_PROTO_OCELOT_8021Q:
656 felix_teardown_tag_8021q(ds, cpu);
663 /* This always leaves the switch in a consistent state, because although the
664 * tag_8021q setup can fail, the NPI setup can't. So either the change is made,
665 * or the restoration is guaranteed to work.
667 static int felix_change_tag_protocol(struct dsa_switch *ds, int cpu,
668 enum dsa_tag_protocol proto)
670 struct ocelot *ocelot = ds->priv;
671 struct felix *felix = ocelot_to_felix(ocelot);
672 enum dsa_tag_protocol old_proto = felix->tag_proto;
675 if (proto != DSA_TAG_PROTO_SEVILLE &&
676 proto != DSA_TAG_PROTO_OCELOT &&
677 proto != DSA_TAG_PROTO_OCELOT_8021Q)
678 return -EPROTONOSUPPORT;
680 felix_del_tag_protocol(ds, cpu, old_proto);
682 err = felix_set_tag_protocol(ds, cpu, proto);
684 felix_set_tag_protocol(ds, cpu, old_proto);
688 felix->tag_proto = proto;
693 static enum dsa_tag_protocol felix_get_tag_protocol(struct dsa_switch *ds,
695 enum dsa_tag_protocol mp)
697 struct ocelot *ocelot = ds->priv;
698 struct felix *felix = ocelot_to_felix(ocelot);
700 return felix->tag_proto;
703 static int felix_set_ageing_time(struct dsa_switch *ds,
704 unsigned int ageing_time)
706 struct ocelot *ocelot = ds->priv;
708 ocelot_set_ageing_time(ocelot, ageing_time);
713 static void felix_port_fast_age(struct dsa_switch *ds, int port)
715 struct ocelot *ocelot = ds->priv;
718 err = ocelot_mact_flush(ocelot, port);
720 dev_err(ds->dev, "Flushing MAC table on port %d returned %pe\n",
724 static int felix_fdb_dump(struct dsa_switch *ds, int port,
725 dsa_fdb_dump_cb_t *cb, void *data)
727 struct ocelot *ocelot = ds->priv;
729 return ocelot_fdb_dump(ocelot, port, cb, data);
732 static int felix_fdb_add(struct dsa_switch *ds, int port,
733 const unsigned char *addr, u16 vid,
736 struct net_device *bridge_dev = felix_classify_db(db);
737 struct ocelot *ocelot = ds->priv;
739 if (IS_ERR(bridge_dev))
740 return PTR_ERR(bridge_dev);
742 return ocelot_fdb_add(ocelot, port, addr, vid, bridge_dev);
745 static int felix_fdb_del(struct dsa_switch *ds, int port,
746 const unsigned char *addr, u16 vid,
749 struct net_device *bridge_dev = felix_classify_db(db);
750 struct ocelot *ocelot = ds->priv;
752 if (IS_ERR(bridge_dev))
753 return PTR_ERR(bridge_dev);
755 return ocelot_fdb_del(ocelot, port, addr, vid, bridge_dev);
758 static int felix_lag_fdb_add(struct dsa_switch *ds, struct dsa_lag lag,
759 const unsigned char *addr, u16 vid,
762 struct net_device *bridge_dev = felix_classify_db(db);
763 struct ocelot *ocelot = ds->priv;
765 if (IS_ERR(bridge_dev))
766 return PTR_ERR(bridge_dev);
768 return ocelot_lag_fdb_add(ocelot, lag.dev, addr, vid, bridge_dev);
771 static int felix_lag_fdb_del(struct dsa_switch *ds, struct dsa_lag lag,
772 const unsigned char *addr, u16 vid,
775 struct net_device *bridge_dev = felix_classify_db(db);
776 struct ocelot *ocelot = ds->priv;
778 if (IS_ERR(bridge_dev))
779 return PTR_ERR(bridge_dev);
781 return ocelot_lag_fdb_del(ocelot, lag.dev, addr, vid, bridge_dev);
784 static int felix_mdb_add(struct dsa_switch *ds, int port,
785 const struct switchdev_obj_port_mdb *mdb,
788 struct net_device *bridge_dev = felix_classify_db(db);
789 struct ocelot *ocelot = ds->priv;
791 if (IS_ERR(bridge_dev))
792 return PTR_ERR(bridge_dev);
794 return ocelot_port_mdb_add(ocelot, port, mdb, bridge_dev);
797 static int felix_mdb_del(struct dsa_switch *ds, int port,
798 const struct switchdev_obj_port_mdb *mdb,
801 struct net_device *bridge_dev = felix_classify_db(db);
802 struct ocelot *ocelot = ds->priv;
804 if (IS_ERR(bridge_dev))
805 return PTR_ERR(bridge_dev);
807 return ocelot_port_mdb_del(ocelot, port, mdb, bridge_dev);
810 static void felix_bridge_stp_state_set(struct dsa_switch *ds, int port,
813 struct ocelot *ocelot = ds->priv;
815 return ocelot_bridge_stp_state_set(ocelot, port, state);
818 static int felix_pre_bridge_flags(struct dsa_switch *ds, int port,
819 struct switchdev_brport_flags val,
820 struct netlink_ext_ack *extack)
822 struct ocelot *ocelot = ds->priv;
824 return ocelot_port_pre_bridge_flags(ocelot, port, val);
827 static int felix_bridge_flags(struct dsa_switch *ds, int port,
828 struct switchdev_brport_flags val,
829 struct netlink_ext_ack *extack)
831 struct ocelot *ocelot = ds->priv;
833 ocelot_port_bridge_flags(ocelot, port, val);
838 static int felix_bridge_join(struct dsa_switch *ds, int port,
839 struct dsa_bridge bridge, bool *tx_fwd_offload,
840 struct netlink_ext_ack *extack)
842 struct ocelot *ocelot = ds->priv;
844 return ocelot_port_bridge_join(ocelot, port, bridge.dev, bridge.num,
848 static void felix_bridge_leave(struct dsa_switch *ds, int port,
849 struct dsa_bridge bridge)
851 struct ocelot *ocelot = ds->priv;
853 ocelot_port_bridge_leave(ocelot, port, bridge.dev);
856 static int felix_lag_join(struct dsa_switch *ds, int port,
858 struct netdev_lag_upper_info *info)
860 struct ocelot *ocelot = ds->priv;
862 return ocelot_port_lag_join(ocelot, port, lag.dev, info);
865 static int felix_lag_leave(struct dsa_switch *ds, int port,
868 struct ocelot *ocelot = ds->priv;
870 ocelot_port_lag_leave(ocelot, port, lag.dev);
875 static int felix_lag_change(struct dsa_switch *ds, int port)
877 struct dsa_port *dp = dsa_to_port(ds, port);
878 struct ocelot *ocelot = ds->priv;
880 ocelot_port_lag_change(ocelot, port, dp->lag_tx_enabled);
885 static int felix_vlan_prepare(struct dsa_switch *ds, int port,
886 const struct switchdev_obj_port_vlan *vlan,
887 struct netlink_ext_ack *extack)
889 struct ocelot *ocelot = ds->priv;
890 u16 flags = vlan->flags;
892 /* Ocelot switches copy frames as-is to the CPU, so the flags:
893 * egress-untagged or not, pvid or not, make no difference. This
894 * behavior is already better than what DSA just tries to approximate
895 * when it installs the VLAN with the same flags on the CPU port.
896 * Just accept any configuration, and don't let ocelot deny installing
897 * multiple native VLANs on the NPI port, because the switch doesn't
898 * look at the port tag settings towards the NPI interface anyway.
900 if (port == ocelot->npi)
903 return ocelot_vlan_prepare(ocelot, port, vlan->vid,
904 flags & BRIDGE_VLAN_INFO_PVID,
905 flags & BRIDGE_VLAN_INFO_UNTAGGED,
909 static int felix_vlan_filtering(struct dsa_switch *ds, int port, bool enabled,
910 struct netlink_ext_ack *extack)
912 struct ocelot *ocelot = ds->priv;
914 return ocelot_port_vlan_filtering(ocelot, port, enabled, extack);
917 static int felix_vlan_add(struct dsa_switch *ds, int port,
918 const struct switchdev_obj_port_vlan *vlan,
919 struct netlink_ext_ack *extack)
921 struct ocelot *ocelot = ds->priv;
922 u16 flags = vlan->flags;
925 err = felix_vlan_prepare(ds, port, vlan, extack);
929 return ocelot_vlan_add(ocelot, port, vlan->vid,
930 flags & BRIDGE_VLAN_INFO_PVID,
931 flags & BRIDGE_VLAN_INFO_UNTAGGED);
934 static int felix_vlan_del(struct dsa_switch *ds, int port,
935 const struct switchdev_obj_port_vlan *vlan)
937 struct ocelot *ocelot = ds->priv;
939 return ocelot_vlan_del(ocelot, port, vlan->vid);
942 static void felix_phylink_get_caps(struct dsa_switch *ds, int port,
943 struct phylink_config *config)
945 struct ocelot *ocelot = ds->priv;
947 /* This driver does not make use of the speed, duplex, pause or the
948 * advertisement in its mac_config, so it is safe to mark this driver
951 config->legacy_pre_march2020 = false;
953 __set_bit(ocelot->ports[port]->phy_mode,
954 config->supported_interfaces);
957 static void felix_phylink_validate(struct dsa_switch *ds, int port,
958 unsigned long *supported,
959 struct phylink_link_state *state)
961 struct ocelot *ocelot = ds->priv;
962 struct felix *felix = ocelot_to_felix(ocelot);
964 if (felix->info->phylink_validate)
965 felix->info->phylink_validate(ocelot, port, supported, state);
968 static struct phylink_pcs *felix_phylink_mac_select_pcs(struct dsa_switch *ds,
970 phy_interface_t iface)
972 struct ocelot *ocelot = ds->priv;
973 struct felix *felix = ocelot_to_felix(ocelot);
974 struct phylink_pcs *pcs = NULL;
976 if (felix->pcs && felix->pcs[port])
977 pcs = felix->pcs[port];
982 static void felix_phylink_mac_link_down(struct dsa_switch *ds, int port,
983 unsigned int link_an_mode,
984 phy_interface_t interface)
986 struct ocelot *ocelot = ds->priv;
988 ocelot_phylink_mac_link_down(ocelot, port, link_an_mode, interface,
992 static void felix_phylink_mac_link_up(struct dsa_switch *ds, int port,
993 unsigned int link_an_mode,
994 phy_interface_t interface,
995 struct phy_device *phydev,
996 int speed, int duplex,
997 bool tx_pause, bool rx_pause)
999 struct ocelot *ocelot = ds->priv;
1000 struct felix *felix = ocelot_to_felix(ocelot);
1002 ocelot_phylink_mac_link_up(ocelot, port, phydev, link_an_mode,
1003 interface, speed, duplex, tx_pause, rx_pause,
1006 if (felix->info->port_sched_speed_set)
1007 felix->info->port_sched_speed_set(ocelot, port, speed);
1010 static void felix_port_qos_map_init(struct ocelot *ocelot, int port)
1014 ocelot_rmw_gix(ocelot,
1015 ANA_PORT_QOS_CFG_QOS_PCP_ENA,
1016 ANA_PORT_QOS_CFG_QOS_PCP_ENA,
1020 for (i = 0; i < OCELOT_NUM_TC * 2; i++) {
1021 ocelot_rmw_ix(ocelot,
1022 (ANA_PORT_PCP_DEI_MAP_DP_PCP_DEI_VAL & i) |
1023 ANA_PORT_PCP_DEI_MAP_QOS_PCP_DEI_VAL(i),
1024 ANA_PORT_PCP_DEI_MAP_DP_PCP_DEI_VAL |
1025 ANA_PORT_PCP_DEI_MAP_QOS_PCP_DEI_VAL_M,
1026 ANA_PORT_PCP_DEI_MAP,
1031 static void felix_get_strings(struct dsa_switch *ds, int port,
1032 u32 stringset, u8 *data)
1034 struct ocelot *ocelot = ds->priv;
1036 return ocelot_get_strings(ocelot, port, stringset, data);
1039 static void felix_get_ethtool_stats(struct dsa_switch *ds, int port, u64 *data)
1041 struct ocelot *ocelot = ds->priv;
1043 ocelot_get_ethtool_stats(ocelot, port, data);
1046 static int felix_get_sset_count(struct dsa_switch *ds, int port, int sset)
1048 struct ocelot *ocelot = ds->priv;
1050 return ocelot_get_sset_count(ocelot, port, sset);
1053 static int felix_get_ts_info(struct dsa_switch *ds, int port,
1054 struct ethtool_ts_info *info)
1056 struct ocelot *ocelot = ds->priv;
1058 return ocelot_get_ts_info(ocelot, port, info);
1061 static const u32 felix_phy_match_table[PHY_INTERFACE_MODE_MAX] = {
1062 [PHY_INTERFACE_MODE_INTERNAL] = OCELOT_PORT_MODE_INTERNAL,
1063 [PHY_INTERFACE_MODE_SGMII] = OCELOT_PORT_MODE_SGMII,
1064 [PHY_INTERFACE_MODE_QSGMII] = OCELOT_PORT_MODE_QSGMII,
1065 [PHY_INTERFACE_MODE_USXGMII] = OCELOT_PORT_MODE_USXGMII,
1066 [PHY_INTERFACE_MODE_2500BASEX] = OCELOT_PORT_MODE_2500BASEX,
1069 static int felix_validate_phy_mode(struct felix *felix, int port,
1070 phy_interface_t phy_mode)
1072 u32 modes = felix->info->port_modes[port];
1074 if (felix_phy_match_table[phy_mode] & modes)
1079 static int felix_parse_ports_node(struct felix *felix,
1080 struct device_node *ports_node,
1081 phy_interface_t *port_phy_modes)
1083 struct device *dev = felix->ocelot.dev;
1084 struct device_node *child;
1086 for_each_available_child_of_node(ports_node, child) {
1087 phy_interface_t phy_mode;
1091 /* Get switch port number from DT */
1092 if (of_property_read_u32(child, "reg", &port) < 0) {
1093 dev_err(dev, "Port number not defined in device tree "
1094 "(property \"reg\")\n");
1099 /* Get PHY mode from DT */
1100 err = of_get_phy_mode(child, &phy_mode);
1102 dev_err(dev, "Failed to read phy-mode or "
1103 "phy-interface-type property for port %d\n",
1109 err = felix_validate_phy_mode(felix, port, phy_mode);
1111 dev_err(dev, "Unsupported PHY mode %s on port %d\n",
1112 phy_modes(phy_mode), port);
1117 port_phy_modes[port] = phy_mode;
1123 static int felix_parse_dt(struct felix *felix, phy_interface_t *port_phy_modes)
1125 struct device *dev = felix->ocelot.dev;
1126 struct device_node *switch_node;
1127 struct device_node *ports_node;
1130 switch_node = dev->of_node;
1132 ports_node = of_get_child_by_name(switch_node, "ports");
1134 ports_node = of_get_child_by_name(switch_node, "ethernet-ports");
1136 dev_err(dev, "Incorrect bindings: absent \"ports\" or \"ethernet-ports\" node\n");
1140 err = felix_parse_ports_node(felix, ports_node, port_phy_modes);
1141 of_node_put(ports_node);
1146 static int felix_init_structs(struct felix *felix, int num_phys_ports)
1148 struct ocelot *ocelot = &felix->ocelot;
1149 phy_interface_t *port_phy_modes;
1150 struct resource res;
1153 ocelot->num_phys_ports = num_phys_ports;
1154 ocelot->ports = devm_kcalloc(ocelot->dev, num_phys_ports,
1155 sizeof(struct ocelot_port *), GFP_KERNEL);
1159 ocelot->map = felix->info->map;
1160 ocelot->stats_layout = felix->info->stats_layout;
1161 ocelot->num_stats = felix->info->num_stats;
1162 ocelot->num_mact_rows = felix->info->num_mact_rows;
1163 ocelot->vcap = felix->info->vcap;
1164 ocelot->vcap_pol.base = felix->info->vcap_pol_base;
1165 ocelot->vcap_pol.max = felix->info->vcap_pol_max;
1166 ocelot->vcap_pol.base2 = felix->info->vcap_pol_base2;
1167 ocelot->vcap_pol.max2 = felix->info->vcap_pol_max2;
1168 ocelot->ops = felix->info->ops;
1169 ocelot->npi_inj_prefix = OCELOT_TAG_PREFIX_SHORT;
1170 ocelot->npi_xtr_prefix = OCELOT_TAG_PREFIX_SHORT;
1171 ocelot->devlink = felix->ds->devlink;
1173 port_phy_modes = kcalloc(num_phys_ports, sizeof(phy_interface_t),
1175 if (!port_phy_modes)
1178 err = felix_parse_dt(felix, port_phy_modes);
1180 kfree(port_phy_modes);
1184 for (i = 0; i < TARGET_MAX; i++) {
1185 struct regmap *target;
1187 if (!felix->info->target_io_res[i].name)
1190 memcpy(&res, &felix->info->target_io_res[i], sizeof(res));
1191 res.flags = IORESOURCE_MEM;
1192 res.start += felix->switch_base;
1193 res.end += felix->switch_base;
1195 target = felix->info->init_regmap(ocelot, &res);
1196 if (IS_ERR(target)) {
1197 dev_err(ocelot->dev,
1198 "Failed to map device memory space\n");
1199 kfree(port_phy_modes);
1200 return PTR_ERR(target);
1203 ocelot->targets[i] = target;
1206 err = ocelot_regfields_init(ocelot, felix->info->regfields);
1208 dev_err(ocelot->dev, "failed to init reg fields map\n");
1209 kfree(port_phy_modes);
1213 for (port = 0; port < num_phys_ports; port++) {
1214 struct ocelot_port *ocelot_port;
1215 struct regmap *target;
1217 ocelot_port = devm_kzalloc(ocelot->dev,
1218 sizeof(struct ocelot_port),
1221 dev_err(ocelot->dev,
1222 "failed to allocate port memory\n");
1223 kfree(port_phy_modes);
1227 memcpy(&res, &felix->info->port_io_res[port], sizeof(res));
1228 res.flags = IORESOURCE_MEM;
1229 res.start += felix->switch_base;
1230 res.end += felix->switch_base;
1232 target = felix->info->init_regmap(ocelot, &res);
1233 if (IS_ERR(target)) {
1234 dev_err(ocelot->dev,
1235 "Failed to map memory space for port %d\n",
1237 kfree(port_phy_modes);
1238 return PTR_ERR(target);
1241 ocelot_port->phy_mode = port_phy_modes[port];
1242 ocelot_port->ocelot = ocelot;
1243 ocelot_port->target = target;
1244 ocelot->ports[port] = ocelot_port;
1247 kfree(port_phy_modes);
1249 if (felix->info->mdio_bus_alloc) {
1250 err = felix->info->mdio_bus_alloc(ocelot);
1258 static void ocelot_port_purge_txtstamp_skb(struct ocelot *ocelot, int port,
1259 struct sk_buff *skb)
1261 struct ocelot_port *ocelot_port = ocelot->ports[port];
1262 struct sk_buff *clone = OCELOT_SKB_CB(skb)->clone;
1263 struct sk_buff *skb_match = NULL, *skb_tmp;
1264 unsigned long flags;
1269 spin_lock_irqsave(&ocelot_port->tx_skbs.lock, flags);
1271 skb_queue_walk_safe(&ocelot_port->tx_skbs, skb, skb_tmp) {
1274 __skb_unlink(skb, &ocelot_port->tx_skbs);
1279 spin_unlock_irqrestore(&ocelot_port->tx_skbs.lock, flags);
1281 WARN_ONCE(!skb_match,
1282 "Could not find skb clone in TX timestamping list\n");
1285 #define work_to_xmit_work(w) \
1286 container_of((w), struct felix_deferred_xmit_work, work)
1288 static void felix_port_deferred_xmit(struct kthread_work *work)
1290 struct felix_deferred_xmit_work *xmit_work = work_to_xmit_work(work);
1291 struct dsa_switch *ds = xmit_work->dp->ds;
1292 struct sk_buff *skb = xmit_work->skb;
1293 u32 rew_op = ocelot_ptp_rew_op(skb);
1294 struct ocelot *ocelot = ds->priv;
1295 int port = xmit_work->dp->index;
1299 if (ocelot_can_inject(ocelot, 0))
1303 } while (--retries);
1306 dev_err(ocelot->dev, "port %d failed to inject skb\n",
1308 ocelot_port_purge_txtstamp_skb(ocelot, port, skb);
1313 ocelot_port_inject_frame(ocelot, port, 0, rew_op, skb);
1319 static int felix_connect_tag_protocol(struct dsa_switch *ds,
1320 enum dsa_tag_protocol proto)
1322 struct ocelot_8021q_tagger_data *tagger_data;
1325 case DSA_TAG_PROTO_OCELOT_8021Q:
1326 tagger_data = ocelot_8021q_tagger_data(ds);
1327 tagger_data->xmit_work_fn = felix_port_deferred_xmit;
1329 case DSA_TAG_PROTO_OCELOT:
1330 case DSA_TAG_PROTO_SEVILLE:
1333 return -EPROTONOSUPPORT;
1337 /* Hardware initialization done here so that we can allocate structures with
1338 * devm without fear of dsa_register_switch returning -EPROBE_DEFER and causing
1339 * us to allocate structures twice (leak memory) and map PCI memory twice
1340 * (which will not work).
1342 static int felix_setup(struct dsa_switch *ds)
1344 struct ocelot *ocelot = ds->priv;
1345 struct felix *felix = ocelot_to_felix(ocelot);
1346 unsigned long cpu_flood;
1347 struct dsa_port *dp;
1350 err = felix_init_structs(felix, ds->num_ports);
1354 err = ocelot_init(ocelot);
1356 goto out_mdiobus_free;
1359 err = ocelot_init_timestamp(ocelot, felix->info->ptp_caps);
1361 dev_err(ocelot->dev,
1362 "Timestamp initialization failed\n");
1367 dsa_switch_for_each_available_port(dp, ds) {
1368 ocelot_init_port(ocelot, dp->index);
1370 /* Set the default QoS Classification based on PCP and DEI
1373 felix_port_qos_map_init(ocelot, dp->index);
1376 err = ocelot_devlink_sb_register(ocelot);
1378 goto out_deinit_ports;
1380 dsa_switch_for_each_cpu_port(dp, ds) {
1381 /* The initial tag protocol is NPI which always returns 0, so
1382 * there's no real point in checking for errors.
1384 felix_set_tag_protocol(ds, dp->index, felix->tag_proto);
1386 /* Start off with flooding disabled towards the NPI port
1387 * (actually CPU port module).
1389 cpu_flood = ANA_PGID_PGID_PGID(BIT(ocelot->num_phys_ports));
1390 ocelot_rmw_rix(ocelot, 0, cpu_flood, ANA_PGID_PGID, PGID_UC);
1391 ocelot_rmw_rix(ocelot, 0, cpu_flood, ANA_PGID_PGID, PGID_MC);
1396 ds->mtu_enforcement_ingress = true;
1397 ds->assisted_learning_on_cpu_port = true;
1398 ds->fdb_isolation = true;
1399 ds->max_num_bridges = ds->num_ports;
1404 dsa_switch_for_each_available_port(dp, ds)
1405 ocelot_deinit_port(ocelot, dp->index);
1407 ocelot_deinit_timestamp(ocelot);
1408 ocelot_deinit(ocelot);
1411 if (felix->info->mdio_bus_free)
1412 felix->info->mdio_bus_free(ocelot);
1417 static void felix_teardown(struct dsa_switch *ds)
1419 struct ocelot *ocelot = ds->priv;
1420 struct felix *felix = ocelot_to_felix(ocelot);
1421 struct dsa_port *dp;
1423 dsa_switch_for_each_cpu_port(dp, ds) {
1424 felix_del_tag_protocol(ds, dp->index, felix->tag_proto);
1428 dsa_switch_for_each_available_port(dp, ds)
1429 ocelot_deinit_port(ocelot, dp->index);
1431 ocelot_devlink_sb_unregister(ocelot);
1432 ocelot_deinit_timestamp(ocelot);
1433 ocelot_deinit(ocelot);
1435 if (felix->info->mdio_bus_free)
1436 felix->info->mdio_bus_free(ocelot);
1439 static int felix_hwtstamp_get(struct dsa_switch *ds, int port,
1442 struct ocelot *ocelot = ds->priv;
1444 return ocelot_hwstamp_get(ocelot, port, ifr);
1447 static int felix_hwtstamp_set(struct dsa_switch *ds, int port,
1450 struct ocelot *ocelot = ds->priv;
1451 struct felix *felix = ocelot_to_felix(ocelot);
1452 bool using_tag_8021q;
1455 err = ocelot_hwstamp_set(ocelot, port, ifr);
1459 using_tag_8021q = felix->tag_proto == DSA_TAG_PROTO_OCELOT_8021Q;
1461 return felix_update_trapping_destinations(ds, using_tag_8021q);
1464 static bool felix_check_xtr_pkt(struct ocelot *ocelot)
1466 struct felix *felix = ocelot_to_felix(ocelot);
1467 int err = 0, grp = 0;
1469 if (felix->tag_proto != DSA_TAG_PROTO_OCELOT_8021Q)
1472 if (!felix->info->quirk_no_xtr_irq)
1475 while (ocelot_read(ocelot, QS_XTR_DATA_PRESENT) & BIT(grp)) {
1476 struct sk_buff *skb;
1479 err = ocelot_xtr_poll_frame(ocelot, grp, &skb);
1483 /* We trap to the CPU port module all PTP frames, but
1484 * felix_rxtstamp() only gets called for event frames.
1485 * So we need to avoid sending duplicate general
1486 * message frames by running a second BPF classifier
1487 * here and dropping those.
1489 __skb_push(skb, ETH_HLEN);
1491 type = ptp_classify_raw(skb);
1493 __skb_pull(skb, ETH_HLEN);
1495 if (type == PTP_CLASS_NONE) {
1505 dev_err_ratelimited(ocelot->dev,
1506 "Error during packet extraction: %pe\n",
1508 ocelot_drain_cpu_queue(ocelot, 0);
1514 static bool felix_rxtstamp(struct dsa_switch *ds, int port,
1515 struct sk_buff *skb, unsigned int type)
1517 u32 tstamp_lo = OCELOT_SKB_CB(skb)->tstamp_lo;
1518 struct skb_shared_hwtstamps *shhwtstamps;
1519 struct ocelot *ocelot = ds->priv;
1520 struct timespec64 ts;
1524 /* If the "no XTR IRQ" workaround is in use, tell DSA to defer this skb
1525 * for RX timestamping. Then free it, and poll for its copy through
1526 * MMIO in the CPU port module, and inject that into the stack from
1527 * ocelot_xtr_poll().
1529 if (felix_check_xtr_pkt(ocelot)) {
1534 ocelot_ptp_gettime64(&ocelot->ptp_info, &ts);
1535 tstamp = ktime_set(ts.tv_sec, ts.tv_nsec);
1537 tstamp_hi = tstamp >> 32;
1538 if ((tstamp & 0xffffffff) < tstamp_lo)
1541 tstamp = ((u64)tstamp_hi << 32) | tstamp_lo;
1543 shhwtstamps = skb_hwtstamps(skb);
1544 memset(shhwtstamps, 0, sizeof(struct skb_shared_hwtstamps));
1545 shhwtstamps->hwtstamp = tstamp;
1549 static void felix_txtstamp(struct dsa_switch *ds, int port,
1550 struct sk_buff *skb)
1552 struct ocelot *ocelot = ds->priv;
1553 struct sk_buff *clone = NULL;
1558 if (ocelot_port_txtstamp_request(ocelot, port, skb, &clone)) {
1559 dev_err_ratelimited(ds->dev,
1560 "port %d delivering skb without TX timestamp\n",
1566 OCELOT_SKB_CB(skb)->clone = clone;
1569 static int felix_change_mtu(struct dsa_switch *ds, int port, int new_mtu)
1571 struct ocelot *ocelot = ds->priv;
1573 ocelot_port_set_maxlen(ocelot, port, new_mtu);
1578 static int felix_get_max_mtu(struct dsa_switch *ds, int port)
1580 struct ocelot *ocelot = ds->priv;
1582 return ocelot_get_max_mtu(ocelot, port);
1585 static int felix_cls_flower_add(struct dsa_switch *ds, int port,
1586 struct flow_cls_offload *cls, bool ingress)
1588 struct ocelot *ocelot = ds->priv;
1589 struct felix *felix = ocelot_to_felix(ocelot);
1590 bool using_tag_8021q;
1593 err = ocelot_cls_flower_replace(ocelot, port, cls, ingress);
1597 using_tag_8021q = felix->tag_proto == DSA_TAG_PROTO_OCELOT_8021Q;
1599 return felix_update_trapping_destinations(ds, using_tag_8021q);
1602 static int felix_cls_flower_del(struct dsa_switch *ds, int port,
1603 struct flow_cls_offload *cls, bool ingress)
1605 struct ocelot *ocelot = ds->priv;
1607 return ocelot_cls_flower_destroy(ocelot, port, cls, ingress);
1610 static int felix_cls_flower_stats(struct dsa_switch *ds, int port,
1611 struct flow_cls_offload *cls, bool ingress)
1613 struct ocelot *ocelot = ds->priv;
1615 return ocelot_cls_flower_stats(ocelot, port, cls, ingress);
1618 static int felix_port_policer_add(struct dsa_switch *ds, int port,
1619 struct dsa_mall_policer_tc_entry *policer)
1621 struct ocelot *ocelot = ds->priv;
1622 struct ocelot_policer pol = {
1623 .rate = div_u64(policer->rate_bytes_per_sec, 1000) * 8,
1624 .burst = policer->burst,
1627 return ocelot_port_policer_add(ocelot, port, &pol);
1630 static void felix_port_policer_del(struct dsa_switch *ds, int port)
1632 struct ocelot *ocelot = ds->priv;
1634 ocelot_port_policer_del(ocelot, port);
1637 static int felix_port_setup_tc(struct dsa_switch *ds, int port,
1638 enum tc_setup_type type,
1641 struct ocelot *ocelot = ds->priv;
1642 struct felix *felix = ocelot_to_felix(ocelot);
1644 if (felix->info->port_setup_tc)
1645 return felix->info->port_setup_tc(ds, port, type, type_data);
1650 static int felix_sb_pool_get(struct dsa_switch *ds, unsigned int sb_index,
1652 struct devlink_sb_pool_info *pool_info)
1654 struct ocelot *ocelot = ds->priv;
1656 return ocelot_sb_pool_get(ocelot, sb_index, pool_index, pool_info);
1659 static int felix_sb_pool_set(struct dsa_switch *ds, unsigned int sb_index,
1660 u16 pool_index, u32 size,
1661 enum devlink_sb_threshold_type threshold_type,
1662 struct netlink_ext_ack *extack)
1664 struct ocelot *ocelot = ds->priv;
1666 return ocelot_sb_pool_set(ocelot, sb_index, pool_index, size,
1667 threshold_type, extack);
1670 static int felix_sb_port_pool_get(struct dsa_switch *ds, int port,
1671 unsigned int sb_index, u16 pool_index,
1674 struct ocelot *ocelot = ds->priv;
1676 return ocelot_sb_port_pool_get(ocelot, port, sb_index, pool_index,
1680 static int felix_sb_port_pool_set(struct dsa_switch *ds, int port,
1681 unsigned int sb_index, u16 pool_index,
1682 u32 threshold, struct netlink_ext_ack *extack)
1684 struct ocelot *ocelot = ds->priv;
1686 return ocelot_sb_port_pool_set(ocelot, port, sb_index, pool_index,
1690 static int felix_sb_tc_pool_bind_get(struct dsa_switch *ds, int port,
1691 unsigned int sb_index, u16 tc_index,
1692 enum devlink_sb_pool_type pool_type,
1693 u16 *p_pool_index, u32 *p_threshold)
1695 struct ocelot *ocelot = ds->priv;
1697 return ocelot_sb_tc_pool_bind_get(ocelot, port, sb_index, tc_index,
1698 pool_type, p_pool_index,
1702 static int felix_sb_tc_pool_bind_set(struct dsa_switch *ds, int port,
1703 unsigned int sb_index, u16 tc_index,
1704 enum devlink_sb_pool_type pool_type,
1705 u16 pool_index, u32 threshold,
1706 struct netlink_ext_ack *extack)
1708 struct ocelot *ocelot = ds->priv;
1710 return ocelot_sb_tc_pool_bind_set(ocelot, port, sb_index, tc_index,
1711 pool_type, pool_index, threshold,
1715 static int felix_sb_occ_snapshot(struct dsa_switch *ds,
1716 unsigned int sb_index)
1718 struct ocelot *ocelot = ds->priv;
1720 return ocelot_sb_occ_snapshot(ocelot, sb_index);
1723 static int felix_sb_occ_max_clear(struct dsa_switch *ds,
1724 unsigned int sb_index)
1726 struct ocelot *ocelot = ds->priv;
1728 return ocelot_sb_occ_max_clear(ocelot, sb_index);
1731 static int felix_sb_occ_port_pool_get(struct dsa_switch *ds, int port,
1732 unsigned int sb_index, u16 pool_index,
1733 u32 *p_cur, u32 *p_max)
1735 struct ocelot *ocelot = ds->priv;
1737 return ocelot_sb_occ_port_pool_get(ocelot, port, sb_index, pool_index,
1741 static int felix_sb_occ_tc_port_bind_get(struct dsa_switch *ds, int port,
1742 unsigned int sb_index, u16 tc_index,
1743 enum devlink_sb_pool_type pool_type,
1744 u32 *p_cur, u32 *p_max)
1746 struct ocelot *ocelot = ds->priv;
1748 return ocelot_sb_occ_tc_port_bind_get(ocelot, port, sb_index, tc_index,
1749 pool_type, p_cur, p_max);
1752 static int felix_mrp_add(struct dsa_switch *ds, int port,
1753 const struct switchdev_obj_mrp *mrp)
1755 struct ocelot *ocelot = ds->priv;
1757 return ocelot_mrp_add(ocelot, port, mrp);
1760 static int felix_mrp_del(struct dsa_switch *ds, int port,
1761 const struct switchdev_obj_mrp *mrp)
1763 struct ocelot *ocelot = ds->priv;
1765 return ocelot_mrp_add(ocelot, port, mrp);
1769 felix_mrp_add_ring_role(struct dsa_switch *ds, int port,
1770 const struct switchdev_obj_ring_role_mrp *mrp)
1772 struct ocelot *ocelot = ds->priv;
1774 return ocelot_mrp_add_ring_role(ocelot, port, mrp);
1778 felix_mrp_del_ring_role(struct dsa_switch *ds, int port,
1779 const struct switchdev_obj_ring_role_mrp *mrp)
1781 struct ocelot *ocelot = ds->priv;
1783 return ocelot_mrp_del_ring_role(ocelot, port, mrp);
1786 const struct dsa_switch_ops felix_switch_ops = {
1787 .get_tag_protocol = felix_get_tag_protocol,
1788 .change_tag_protocol = felix_change_tag_protocol,
1789 .connect_tag_protocol = felix_connect_tag_protocol,
1790 .setup = felix_setup,
1791 .teardown = felix_teardown,
1792 .set_ageing_time = felix_set_ageing_time,
1793 .get_strings = felix_get_strings,
1794 .get_ethtool_stats = felix_get_ethtool_stats,
1795 .get_sset_count = felix_get_sset_count,
1796 .get_ts_info = felix_get_ts_info,
1797 .phylink_get_caps = felix_phylink_get_caps,
1798 .phylink_validate = felix_phylink_validate,
1799 .phylink_mac_select_pcs = felix_phylink_mac_select_pcs,
1800 .phylink_mac_link_down = felix_phylink_mac_link_down,
1801 .phylink_mac_link_up = felix_phylink_mac_link_up,
1802 .port_fast_age = felix_port_fast_age,
1803 .port_fdb_dump = felix_fdb_dump,
1804 .port_fdb_add = felix_fdb_add,
1805 .port_fdb_del = felix_fdb_del,
1806 .lag_fdb_add = felix_lag_fdb_add,
1807 .lag_fdb_del = felix_lag_fdb_del,
1808 .port_mdb_add = felix_mdb_add,
1809 .port_mdb_del = felix_mdb_del,
1810 .port_pre_bridge_flags = felix_pre_bridge_flags,
1811 .port_bridge_flags = felix_bridge_flags,
1812 .port_bridge_join = felix_bridge_join,
1813 .port_bridge_leave = felix_bridge_leave,
1814 .port_lag_join = felix_lag_join,
1815 .port_lag_leave = felix_lag_leave,
1816 .port_lag_change = felix_lag_change,
1817 .port_stp_state_set = felix_bridge_stp_state_set,
1818 .port_vlan_filtering = felix_vlan_filtering,
1819 .port_vlan_add = felix_vlan_add,
1820 .port_vlan_del = felix_vlan_del,
1821 .port_hwtstamp_get = felix_hwtstamp_get,
1822 .port_hwtstamp_set = felix_hwtstamp_set,
1823 .port_rxtstamp = felix_rxtstamp,
1824 .port_txtstamp = felix_txtstamp,
1825 .port_change_mtu = felix_change_mtu,
1826 .port_max_mtu = felix_get_max_mtu,
1827 .port_policer_add = felix_port_policer_add,
1828 .port_policer_del = felix_port_policer_del,
1829 .cls_flower_add = felix_cls_flower_add,
1830 .cls_flower_del = felix_cls_flower_del,
1831 .cls_flower_stats = felix_cls_flower_stats,
1832 .port_setup_tc = felix_port_setup_tc,
1833 .devlink_sb_pool_get = felix_sb_pool_get,
1834 .devlink_sb_pool_set = felix_sb_pool_set,
1835 .devlink_sb_port_pool_get = felix_sb_port_pool_get,
1836 .devlink_sb_port_pool_set = felix_sb_port_pool_set,
1837 .devlink_sb_tc_pool_bind_get = felix_sb_tc_pool_bind_get,
1838 .devlink_sb_tc_pool_bind_set = felix_sb_tc_pool_bind_set,
1839 .devlink_sb_occ_snapshot = felix_sb_occ_snapshot,
1840 .devlink_sb_occ_max_clear = felix_sb_occ_max_clear,
1841 .devlink_sb_occ_port_pool_get = felix_sb_occ_port_pool_get,
1842 .devlink_sb_occ_tc_port_bind_get= felix_sb_occ_tc_port_bind_get,
1843 .port_mrp_add = felix_mrp_add,
1844 .port_mrp_del = felix_mrp_del,
1845 .port_mrp_add_ring_role = felix_mrp_add_ring_role,
1846 .port_mrp_del_ring_role = felix_mrp_del_ring_role,
1847 .tag_8021q_vlan_add = felix_tag_8021q_vlan_add,
1848 .tag_8021q_vlan_del = felix_tag_8021q_vlan_del,
1851 struct net_device *felix_port_to_netdev(struct ocelot *ocelot, int port)
1853 struct felix *felix = ocelot_to_felix(ocelot);
1854 struct dsa_switch *ds = felix->ds;
1856 if (!dsa_is_user_port(ds, port))
1859 return dsa_to_port(ds, port)->slave;
1862 int felix_netdev_to_port(struct net_device *dev)
1864 struct dsa_port *dp;
1866 dp = dsa_port_from_netdev(dev);