drivers/net/ethernet/amazon/ena/ena_netdev.c

   1 /*
   2  * Copyright 2015 Amazon.com, Inc. or its affiliates.
   3  *
   4  * This software is available to you under a choice of one of two
   5  * licenses.  You may choose to be licensed under the terms of the GNU
   6  * General Public License (GPL) Version 2, available from the file
   7  * COPYING in the main directory of this source tree, or the
   8  * BSD license below:
   9  *
  10  *     Redistribution and use in source and binary forms, with or
  11  *     without modification, are permitted provided that the following
  12  *     conditions are met:
  13  *
  14  *      - Redistributions of source code must retain the above
  15  *        copyright notice, this list of conditions and the following
  16  *        disclaimer.
  17  *
  18  *      - Redistributions in binary form must reproduce the above
  19  *        copyright notice, this list of conditions and the following
  20  *        disclaimer in the documentation and/or other materials
  21  *        provided with the distribution.
  22  *
  23  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30  * SOFTWARE.
  31  */
  32
  33 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  34
  35 #ifdef CONFIG_RFS_ACCEL
  36 #include <linux/cpu_rmap.h>
  37 #endif /* CONFIG_RFS_ACCEL */
  38 #include <linux/ethtool.h>
  39 #include <linux/if_vlan.h>
  40 #include <linux/kernel.h>
  41 #include <linux/module.h>
  42 #include <linux/numa.h>
  43 #include <linux/pci.h>
  44 #include <linux/utsname.h>
  45 #include <linux/version.h>
  46 #include <linux/vmalloc.h>
  47 #include <net/ip.h>
  48
  49 #include "ena_netdev.h"
  50 #include "ena_pci_id_tbl.h"
  51
  52 static char version[] = DEVICE_NAME " v" DRV_MODULE_VERSION "\n";
  53
  54 MODULE_AUTHOR("Amazon.com, Inc. or its affiliates");
  55 MODULE_DESCRIPTION(DEVICE_NAME);
  56 MODULE_LICENSE("GPL");
  57 MODULE_VERSION(DRV_MODULE_VERSION);
  58
  59 /* Time in jiffies before concluding the transmitter is hung. */
  60 #define TX_TIMEOUT  (5 * HZ)
  61
  62 #define ENA_NAPI_BUDGET 64
  63
  64 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_IFUP | \
  65                 NETIF_MSG_TX_DONE | NETIF_MSG_TX_ERR | NETIF_MSG_RX_ERR)
  66 static int debug = -1;
  67 module_param(debug, int, 0);
  68 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
  69
  70 static struct ena_aenq_handlers aenq_handlers;
  71
  72 static struct workqueue_struct *ena_wq;
  73
  74 MODULE_DEVICE_TABLE(pci, ena_pci_tbl);
  75
  76 static int ena_rss_init_default(struct ena_adapter *adapter);
  77 static void check_for_admin_com_state(struct ena_adapter *adapter);
  78 static void ena_destroy_device(struct ena_adapter *adapter, bool graceful);
  79 static int ena_restore_device(struct ena_adapter *adapter);
  80
  81 static void ena_tx_timeout(struct net_device *dev)
  82 {
  83         struct ena_adapter *adapter = netdev_priv(dev);
  84
  85         /* Change the state of the device to trigger reset
  86          * Check that we are not in the middle or a trigger already
  87          */
  88
  89         if (test_and_set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags))
  90                 return;
  91
  92         adapter->reset_reason = ENA_REGS_RESET_OS_NETDEV_WD;
  93         u64_stats_update_begin(&adapter->syncp);
  94         adapter->dev_stats.tx_timeout++;
  95         u64_stats_update_end(&adapter->syncp);
  96
  97         netif_err(adapter, tx_err, dev, "Transmit time out\n");
  98 }
  99
 100 static void update_rx_ring_mtu(struct ena_adapter *adapter, int mtu)
 101 {
 102         int i;
 103
 104         for (i = 0; i < adapter->num_io_queues; i++)
 105                 adapter->rx_ring[i].mtu = mtu;
 106 }
 107
 108 static int ena_change_mtu(struct net_device *dev, int new_mtu)
 109 {
 110         struct ena_adapter *adapter = netdev_priv(dev);
 111         int ret;
 112
 113         ret = ena_com_set_dev_mtu(adapter->ena_dev, new_mtu);
 114         if (!ret) {
 115                 netif_dbg(adapter, drv, dev, "set MTU to %d\n", new_mtu);
 116                 update_rx_ring_mtu(adapter, new_mtu);
 117                 dev->mtu = new_mtu;
 118         } else {
 119                 netif_err(adapter, drv, dev, "Failed to set MTU to %d\n",
 120                           new_mtu);
 121         }
 122
 123         return ret;
 124 }
 125
 126 static int ena_init_rx_cpu_rmap(struct ena_adapter *adapter)
 127 {
 128 #ifdef CONFIG_RFS_ACCEL
 129         u32 i;
 130         int rc;
 131
 132         adapter->netdev->rx_cpu_rmap = alloc_irq_cpu_rmap(adapter->num_io_queues);
 133         if (!adapter->netdev->rx_cpu_rmap)
 134                 return -ENOMEM;
 135         for (i = 0; i < adapter->num_io_queues; i++) {
 136                 int irq_idx = ENA_IO_IRQ_IDX(i);
 137
 138                 rc = irq_cpu_rmap_add(adapter->netdev->rx_cpu_rmap,
 139                                       pci_irq_vector(adapter->pdev, irq_idx));
 140                 if (rc) {
 141                         free_irq_cpu_rmap(adapter->netdev->rx_cpu_rmap);
 142                         adapter->netdev->rx_cpu_rmap = NULL;
 143                         return rc;
 144                 }
 145         }
 146 #endif /* CONFIG_RFS_ACCEL */
 147         return 0;
 148 }
 149
 150 static void ena_init_io_rings_common(struct ena_adapter *adapter,
 151                                      struct ena_ring *ring, u16 qid)
 152 {
 153         ring->qid = qid;
 154         ring->pdev = adapter->pdev;
 155         ring->dev = &adapter->pdev->dev;
 156         ring->netdev = adapter->netdev;
 157         ring->napi = &adapter->ena_napi[qid].napi;
 158         ring->adapter = adapter;
 159         ring->ena_dev = adapter->ena_dev;
 160         ring->per_napi_packets = 0;
 161         ring->cpu = 0;
 162         ring->first_interrupt = false;
 163         ring->no_interrupt_event_cnt = 0;
 164         u64_stats_init(&ring->syncp);
 165 }
 166
 167 static void ena_init_io_rings(struct ena_adapter *adapter)
 168 {
 169         struct ena_com_dev *ena_dev;
 170         struct ena_ring *txr, *rxr;
 171         int i;
 172
 173         ena_dev = adapter->ena_dev;
 174
 175         for (i = 0; i < adapter->num_io_queues; i++) {
 176                 txr = &adapter->tx_ring[i];
 177                 rxr = &adapter->rx_ring[i];
 178
 179                 /* TX/RX common ring state */
 180                 ena_init_io_rings_common(adapter, txr, i);
 181                 ena_init_io_rings_common(adapter, rxr, i);
 182
 183                 /* TX specific ring state */
 184                 txr->ring_size = adapter->requested_tx_ring_size;
 185                 txr->tx_max_header_size = ena_dev->tx_max_header_size;
 186                 txr->tx_mem_queue_type = ena_dev->tx_mem_queue_type;
 187                 txr->sgl_size = adapter->max_tx_sgl_size;
 188                 txr->smoothed_interval =
 189                         ena_com_get_nonadaptive_moderation_interval_tx(ena_dev);
 190
 191                 /* RX specific ring state */
 192                 rxr->ring_size = adapter->requested_rx_ring_size;
 193                 rxr->rx_copybreak = adapter->rx_copybreak;
 194                 rxr->sgl_size = adapter->max_rx_sgl_size;
 195                 rxr->smoothed_interval =
 196                         ena_com_get_nonadaptive_moderation_interval_rx(ena_dev);
 197                 rxr->empty_rx_queue = 0;
 198                 adapter->ena_napi[i].dim.mode = DIM_CQ_PERIOD_MODE_START_FROM_EQE;
 199         }
 200 }
 201
 202 /* ena_setup_tx_resources - allocate I/O Tx resources (Descriptors)
 203  * @adapter: network interface device structure
 204  * @qid: queue index
 205  *
 206  * Return 0 on success, negative on failure
 207  */
 208 static int ena_setup_tx_resources(struct ena_adapter *adapter, int qid)
 209 {
 210         struct ena_ring *tx_ring = &adapter->tx_ring[qid];
 211         struct ena_irq *ena_irq = &adapter->irq_tbl[ENA_IO_IRQ_IDX(qid)];
 212         int size, i, node;
 213
 214         if (tx_ring->tx_buffer_info) {
 215                 netif_err(adapter, ifup,
 216                           adapter->netdev, "tx_buffer_info info is not NULL");
 217                 return -EEXIST;
 218         }
 219
 220         size = sizeof(struct ena_tx_buffer) * tx_ring->ring_size;
 221         node = cpu_to_node(ena_irq->cpu);
 222
 223         tx_ring->tx_buffer_info = vzalloc_node(size, node);
 224         if (!tx_ring->tx_buffer_info) {
 225                 tx_ring->tx_buffer_info = vzalloc(size);
 226                 if (!tx_ring->tx_buffer_info)
 227                         goto err_tx_buffer_info;
 228         }
 229
 230         size = sizeof(u16) * tx_ring->ring_size;
 231         tx_ring->free_ids = vzalloc_node(size, node);
 232         if (!tx_ring->free_ids) {
 233                 tx_ring->free_ids = vzalloc(size);
 234                 if (!tx_ring->free_ids)
 235                         goto err_tx_free_ids;
 236         }
 237
 238         size = tx_ring->tx_max_header_size;
 239         tx_ring->push_buf_intermediate_buf = vzalloc_node(size, node);
 240         if (!tx_ring->push_buf_intermediate_buf) {
 241                 tx_ring->push_buf_intermediate_buf = vzalloc(size);
 242                 if (!tx_ring->push_buf_intermediate_buf)
 243                         goto err_push_buf_intermediate_buf;
 244         }
 245
 246         /* Req id ring for TX out of order completions */
 247         for (i = 0; i < tx_ring->ring_size; i++)
 248                 tx_ring->free_ids[i] = i;
 249
 250         /* Reset tx statistics */
 251         memset(&tx_ring->tx_stats, 0x0, sizeof(tx_ring->tx_stats));
 252
 253         tx_ring->next_to_use = 0;
 254         tx_ring->next_to_clean = 0;
 255         tx_ring->cpu = ena_irq->cpu;
 256         return 0;
 257
 258 err_push_buf_intermediate_buf:
 259         vfree(tx_ring->free_ids);
 260         tx_ring->free_ids = NULL;
 261 err_tx_free_ids:
 262         vfree(tx_ring->tx_buffer_info);
 263         tx_ring->tx_buffer_info = NULL;
 264 err_tx_buffer_info:
 265         return -ENOMEM;
 266 }
 267
 268 /* ena_free_tx_resources - Free I/O Tx Resources per Queue
 269  * @adapter: network interface device structure
 270  * @qid: queue index
 271  *
 272  * Free all transmit software resources
 273  */
 274 static void ena_free_tx_resources(struct ena_adapter *adapter, int qid)
 275 {
 276         struct ena_ring *tx_ring = &adapter->tx_ring[qid];
 277
 278         vfree(tx_ring->tx_buffer_info);
 279         tx_ring->tx_buffer_info = NULL;
 280
 281         vfree(tx_ring->free_ids);
 282         tx_ring->free_ids = NULL;
 283
 284         vfree(tx_ring->push_buf_intermediate_buf);
 285         tx_ring->push_buf_intermediate_buf = NULL;
 286 }
 287
 288 /* ena_setup_all_tx_resources - allocate I/O Tx queues resources for All queues
 289  * @adapter: private structure
 290  *
 291  * Return 0 on success, negative on failure
 292  */
 293 static int ena_setup_all_tx_resources(struct ena_adapter *adapter)
 294 {
 295         int i, rc = 0;
 296
 297         for (i = 0; i < adapter->num_io_queues; i++) {
 298                 rc = ena_setup_tx_resources(adapter, i);
 299                 if (rc)
 300                         goto err_setup_tx;
 301         }
 302
 303         return 0;
 304
 305 err_setup_tx:
 306
 307         netif_err(adapter, ifup, adapter->netdev,
 308                   "Tx queue %d: allocation failed\n", i);
 309
 310         /* rewind the index freeing the rings as we go */
 311         while (i--)
 312                 ena_free_tx_resources(adapter, i);
 313         return rc;
 314 }
 315
 316 /* ena_free_all_io_tx_resources - Free I/O Tx Resources for All Queues
 317  * @adapter: board private structure
 318  *
 319  * Free all transmit software resources
 320  */
 321 static void ena_free_all_io_tx_resources(struct ena_adapter *adapter)
 322 {
 323         int i;
 324
 325         for (i = 0; i < adapter->num_io_queues; i++)
 326                 ena_free_tx_resources(adapter, i);
 327 }
 328
 329 static int validate_rx_req_id(struct ena_ring *rx_ring, u16 req_id)
 330 {
 331         if (likely(req_id < rx_ring->ring_size))
 332                 return 0;
 333
 334         netif_err(rx_ring->adapter, rx_err, rx_ring->netdev,
 335                   "Invalid rx req_id: %hu\n", req_id);
 336
 337         u64_stats_update_begin(&rx_ring->syncp);
 338         rx_ring->rx_stats.bad_req_id++;
 339         u64_stats_update_end(&rx_ring->syncp);
 340
 341         /* Trigger device reset */
 342         rx_ring->adapter->reset_reason = ENA_REGS_RESET_INV_RX_REQ_ID;
 343         set_bit(ENA_FLAG_TRIGGER_RESET, &rx_ring->adapter->flags);
 344         return -EFAULT;
 345 }
 346
 347 /* ena_setup_rx_resources - allocate I/O Rx resources (Descriptors)
 348  * @adapter: network interface device structure
 349  * @qid: queue index
 350  *
 351  * Returns 0 on success, negative on failure
 352  */
 353 static int ena_setup_rx_resources(struct ena_adapter *adapter,
 354                                   u32 qid)
 355 {
 356         struct ena_ring *rx_ring = &adapter->rx_ring[qid];
 357         struct ena_irq *ena_irq = &adapter->irq_tbl[ENA_IO_IRQ_IDX(qid)];
 358         int size, node, i;
 359
 360         if (rx_ring->rx_buffer_info) {
 361                 netif_err(adapter, ifup, adapter->netdev,
 362                           "rx_buffer_info is not NULL");
 363                 return -EEXIST;
 364         }
 365
 366         /* alloc extra element so in rx path
 367          * we can always prefetch rx_info + 1
 368          */
 369         size = sizeof(struct ena_rx_buffer) * (rx_ring->ring_size + 1);
 370         node = cpu_to_node(ena_irq->cpu);
 371
 372         rx_ring->rx_buffer_info = vzalloc_node(size, node);
 373         if (!rx_ring->rx_buffer_info) {
 374                 rx_ring->rx_buffer_info = vzalloc(size);
 375                 if (!rx_ring->rx_buffer_info)
 376                         return -ENOMEM;
 377         }
 378
 379         size = sizeof(u16) * rx_ring->ring_size;
 380         rx_ring->free_ids = vzalloc_node(size, node);
 381         if (!rx_ring->free_ids) {
 382                 rx_ring->free_ids = vzalloc(size);
 383                 if (!rx_ring->free_ids) {
 384                         vfree(rx_ring->rx_buffer_info);
 385                         rx_ring->rx_buffer_info = NULL;
 386                         return -ENOMEM;
 387                 }
 388         }
 389
 390         /* Req id ring for receiving RX pkts out of order */
 391         for (i = 0; i < rx_ring->ring_size; i++)
 392                 rx_ring->free_ids[i] = i;
 393
 394         /* Reset rx statistics */
 395         memset(&rx_ring->rx_stats, 0x0, sizeof(rx_ring->rx_stats));
 396
 397         rx_ring->next_to_clean = 0;
 398         rx_ring->next_to_use = 0;
 399         rx_ring->cpu = ena_irq->cpu;
 400
 401         return 0;
 402 }
 403
 404 /* ena_free_rx_resources - Free I/O Rx Resources
 405  * @adapter: network interface device structure
 406  * @qid: queue index
 407  *
 408  * Free all receive software resources
 409  */
 410 static void ena_free_rx_resources(struct ena_adapter *adapter,
 411                                   u32 qid)
 412 {
 413         struct ena_ring *rx_ring = &adapter->rx_ring[qid];
 414
 415         vfree(rx_ring->rx_buffer_info);
 416         rx_ring->rx_buffer_info = NULL;
 417
 418         vfree(rx_ring->free_ids);
 419         rx_ring->free_ids = NULL;
 420 }
 421
 422 /* ena_setup_all_rx_resources - allocate I/O Rx queues resources for all queues
 423  * @adapter: board private structure
 424  *
 425  * Return 0 on success, negative on failure
 426  */
 427 static int ena_setup_all_rx_resources(struct ena_adapter *adapter)
 428 {
 429         int i, rc = 0;
 430
 431         for (i = 0; i < adapter->num_io_queues; i++) {
 432                 rc = ena_setup_rx_resources(adapter, i);
 433                 if (rc)
 434                         goto err_setup_rx;
 435         }
 436
 437         return 0;
 438
 439 err_setup_rx:
 440
 441         netif_err(adapter, ifup, adapter->netdev,
 442                   "Rx queue %d: allocation failed\n", i);
 443
 444         /* rewind the index freeing the rings as we go */
 445         while (i--)
 446                 ena_free_rx_resources(adapter, i);
 447         return rc;
 448 }
 449
 450 /* ena_free_all_io_rx_resources - Free I/O Rx Resources for All Queues
 451  * @adapter: board private structure
 452  *
 453  * Free all receive software resources
 454  */
 455 static void ena_free_all_io_rx_resources(struct ena_adapter *adapter)
 456 {
 457         int i;
 458
 459         for (i = 0; i < adapter->num_io_queues; i++)
 460                 ena_free_rx_resources(adapter, i);
 461 }
 462
 463 static int ena_alloc_rx_page(struct ena_ring *rx_ring,
 464                                     struct ena_rx_buffer *rx_info, gfp_t gfp)
 465 {
 466         struct ena_com_buf *ena_buf;
 467         struct page *page;
 468         dma_addr_t dma;
 469
 470         /* if previous allocated page is not used */
 471         if (unlikely(rx_info->page))
 472                 return 0;
 473
 474         page = alloc_page(gfp);
 475         if (unlikely(!page)) {
 476                 u64_stats_update_begin(&rx_ring->syncp);
 477                 rx_ring->rx_stats.page_alloc_fail++;
 478                 u64_stats_update_end(&rx_ring->syncp);
 479                 return -ENOMEM;
 480         }
 481
 482         dma = dma_map_page(rx_ring->dev, page, 0, ENA_PAGE_SIZE,
 483                            DMA_FROM_DEVICE);
 484         if (unlikely(dma_mapping_error(rx_ring->dev, dma))) {
 485                 u64_stats_update_begin(&rx_ring->syncp);
 486                 rx_ring->rx_stats.dma_mapping_err++;
 487                 u64_stats_update_end(&rx_ring->syncp);
 488
 489                 __free_page(page);
 490                 return -EIO;
 491         }
 492         netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev,
 493                   "alloc page %p, rx_info %p\n", page, rx_info);
 494
 495         rx_info->page = page;
 496         rx_info->page_offset = 0;
 497         ena_buf = &rx_info->ena_buf;
 498         ena_buf->paddr = dma;
 499         ena_buf->len = ENA_PAGE_SIZE;
 500
 501         return 0;
 502 }
 503
 504 static void ena_free_rx_page(struct ena_ring *rx_ring,
 505                              struct ena_rx_buffer *rx_info)
 506 {
 507         struct page *page = rx_info->page;
 508         struct ena_com_buf *ena_buf = &rx_info->ena_buf;
 509
 510         if (unlikely(!page)) {
 511                 netif_warn(rx_ring->adapter, rx_err, rx_ring->netdev,
 512                            "Trying to free unallocated buffer\n");
 513                 return;
 514         }
 515
 516         dma_unmap_page(rx_ring->dev, ena_buf->paddr, ENA_PAGE_SIZE,
 517                        DMA_FROM_DEVICE);
 518
 519         __free_page(page);
 520         rx_info->page = NULL;
 521 }
 522
 523 static int ena_refill_rx_bufs(struct ena_ring *rx_ring, u32 num)
 524 {
 525         u16 next_to_use, req_id;
 526         u32 i;
 527         int rc;
 528
 529         next_to_use = rx_ring->next_to_use;
 530
 531         for (i = 0; i < num; i++) {
 532                 struct ena_rx_buffer *rx_info;
 533
 534                 req_id = rx_ring->free_ids[next_to_use];
 535                 rc = validate_rx_req_id(rx_ring, req_id);
 536                 if (unlikely(rc < 0))
 537                         break;
 538
 539                 rx_info = &rx_ring->rx_buffer_info[req_id];
 540
 541
 542                 rc = ena_alloc_rx_page(rx_ring, rx_info,
 543                                        GFP_ATOMIC | __GFP_COMP);
 544                 if (unlikely(rc < 0)) {
 545                         netif_warn(rx_ring->adapter, rx_err, rx_ring->netdev,
 546                                    "failed to alloc buffer for rx queue %d\n",
 547                                    rx_ring->qid);
 548                         break;
 549                 }
 550                 rc = ena_com_add_single_rx_desc(rx_ring->ena_com_io_sq,
 551                                                 &rx_info->ena_buf,
 552                                                 req_id);
 553                 if (unlikely(rc)) {
 554                         netif_warn(rx_ring->adapter, rx_status, rx_ring->netdev,
 555                                    "failed to add buffer for rx queue %d\n",
 556                                    rx_ring->qid);
 557                         break;
 558                 }
 559                 next_to_use = ENA_RX_RING_IDX_NEXT(next_to_use,
 560                                                    rx_ring->ring_size);
 561         }
 562
 563         if (unlikely(i < num)) {
 564                 u64_stats_update_begin(&rx_ring->syncp);
 565                 rx_ring->rx_stats.refil_partial++;
 566                 u64_stats_update_end(&rx_ring->syncp);
 567                 netdev_warn(rx_ring->netdev,
 568                             "refilled rx qid %d with only %d buffers (from %d)\n",
 569                             rx_ring->qid, i, num);
 570         }
 571
 572         /* ena_com_write_sq_doorbell issues a wmb() */
 573         if (likely(i))
 574                 ena_com_write_sq_doorbell(rx_ring->ena_com_io_sq);
 575
 576         rx_ring->next_to_use = next_to_use;
 577
 578         return i;
 579 }
 580
 581 static void ena_free_rx_bufs(struct ena_adapter *adapter,
 582                              u32 qid)
 583 {
 584         struct ena_ring *rx_ring = &adapter->rx_ring[qid];
 585         u32 i;
 586
 587         for (i = 0; i < rx_ring->ring_size; i++) {
 588                 struct ena_rx_buffer *rx_info = &rx_ring->rx_buffer_info[i];
 589
 590                 if (rx_info->page)
 591                         ena_free_rx_page(rx_ring, rx_info);
 592         }
 593 }
 594
 595 /* ena_refill_all_rx_bufs - allocate all queues Rx buffers
 596  * @adapter: board private structure
 597  */
 598 static void ena_refill_all_rx_bufs(struct ena_adapter *adapter)
 599 {
 600         struct ena_ring *rx_ring;
 601         int i, rc, bufs_num;
 602
 603         for (i = 0; i < adapter->num_io_queues; i++) {
 604                 rx_ring = &adapter->rx_ring[i];
 605                 bufs_num = rx_ring->ring_size - 1;
 606                 rc = ena_refill_rx_bufs(rx_ring, bufs_num);
 607
 608                 if (unlikely(rc != bufs_num))
 609                         netif_warn(rx_ring->adapter, rx_status, rx_ring->netdev,
 610                                    "refilling Queue %d failed. allocated %d buffers from: %d\n",
 611                                    i, rc, bufs_num);
 612         }
 613 }
 614
 615 static void ena_free_all_rx_bufs(struct ena_adapter *adapter)
 616 {
 617         int i;
 618
 619         for (i = 0; i < adapter->num_io_queues; i++)
 620                 ena_free_rx_bufs(adapter, i);
 621 }
 622
 623 static void ena_unmap_tx_skb(struct ena_ring *tx_ring,
 624                                     struct ena_tx_buffer *tx_info)
 625 {
 626         struct ena_com_buf *ena_buf;
 627         u32 cnt;
 628         int i;
 629
 630         ena_buf = tx_info->bufs;
 631         cnt = tx_info->num_of_bufs;
 632
 633         if (unlikely(!cnt))
 634                 return;
 635
 636         if (tx_info->map_linear_data) {
 637                 dma_unmap_single(tx_ring->dev,
 638                                  dma_unmap_addr(ena_buf, paddr),
 639                                  dma_unmap_len(ena_buf, len),
 640                                  DMA_TO_DEVICE);
 641                 ena_buf++;
 642                 cnt--;
 643         }
 644
 645         /* unmap remaining mapped pages */
 646         for (i = 0; i < cnt; i++) {
 647                 dma_unmap_page(tx_ring->dev, dma_unmap_addr(ena_buf, paddr),
 648                                dma_unmap_len(ena_buf, len), DMA_TO_DEVICE);
 649                 ena_buf++;
 650         }
 651 }
 652
 653 /* ena_free_tx_bufs - Free Tx Buffers per Queue
 654  * @tx_ring: TX ring for which buffers be freed
 655  */
 656 static void ena_free_tx_bufs(struct ena_ring *tx_ring)
 657 {
 658         bool print_once = true;
 659         u32 i;
 660
 661         for (i = 0; i < tx_ring->ring_size; i++) {
 662                 struct ena_tx_buffer *tx_info = &tx_ring->tx_buffer_info[i];
 663
 664                 if (!tx_info->skb)
 665                         continue;
 666
 667                 if (print_once) {
 668                         netdev_notice(tx_ring->netdev,
 669                                       "free uncompleted tx skb qid %d idx 0x%x\n",
 670                                       tx_ring->qid, i);
 671                         print_once = false;
 672                 } else {
 673                         netdev_dbg(tx_ring->netdev,
 674                                    "free uncompleted tx skb qid %d idx 0x%x\n",
 675                                    tx_ring->qid, i);
 676                 }
 677
 678                 ena_unmap_tx_skb(tx_ring, tx_info);
 679
 680                 dev_kfree_skb_any(tx_info->skb);
 681         }
 682         netdev_tx_reset_queue(netdev_get_tx_queue(tx_ring->netdev,
 683                                                   tx_ring->qid));
 684 }
 685
 686 static void ena_free_all_tx_bufs(struct ena_adapter *adapter)
 687 {
 688         struct ena_ring *tx_ring;
 689         int i;
 690
 691         for (i = 0; i < adapter->num_io_queues; i++) {
 692                 tx_ring = &adapter->tx_ring[i];
 693                 ena_free_tx_bufs(tx_ring);
 694         }
 695 }
 696
 697 static void ena_destroy_all_tx_queues(struct ena_adapter *adapter)
 698 {
 699         u16 ena_qid;
 700         int i;
 701
 702         for (i = 0; i < adapter->num_io_queues; i++) {
 703                 ena_qid = ENA_IO_TXQ_IDX(i);
 704                 ena_com_destroy_io_queue(adapter->ena_dev, ena_qid);
 705         }
 706 }
 707
 708 static void ena_destroy_all_rx_queues(struct ena_adapter *adapter)
 709 {
 710         u16 ena_qid;
 711         int i;
 712
 713         for (i = 0; i < adapter->num_io_queues; i++) {
 714                 ena_qid = ENA_IO_RXQ_IDX(i);
 715                 cancel_work_sync(&adapter->ena_napi[i].dim.work);
 716                 ena_com_destroy_io_queue(adapter->ena_dev, ena_qid);
 717         }
 718 }
 719
 720 static void ena_destroy_all_io_queues(struct ena_adapter *adapter)
 721 {
 722         ena_destroy_all_tx_queues(adapter);
 723         ena_destroy_all_rx_queues(adapter);
 724 }
 725
 726 static int validate_tx_req_id(struct ena_ring *tx_ring, u16 req_id)
 727 {
 728         struct ena_tx_buffer *tx_info = NULL;
 729
 730         if (likely(req_id < tx_ring->ring_size)) {
 731                 tx_info = &tx_ring->tx_buffer_info[req_id];
 732                 if (likely(tx_info->skb))
 733                         return 0;
 734         }
 735
 736         if (tx_info)
 737                 netif_err(tx_ring->adapter, tx_done, tx_ring->netdev,
 738                           "tx_info doesn't have valid skb\n");
 739         else
 740                 netif_err(tx_ring->adapter, tx_done, tx_ring->netdev,
 741                           "Invalid req_id: %hu\n", req_id);
 742
 743         u64_stats_update_begin(&tx_ring->syncp);
 744         tx_ring->tx_stats.bad_req_id++;
 745         u64_stats_update_end(&tx_ring->syncp);
 746
 747         /* Trigger device reset */
 748         tx_ring->adapter->reset_reason = ENA_REGS_RESET_INV_TX_REQ_ID;
 749         set_bit(ENA_FLAG_TRIGGER_RESET, &tx_ring->adapter->flags);
 750         return -EFAULT;
 751 }
 752
 753 static int ena_clean_tx_irq(struct ena_ring *tx_ring, u32 budget)
 754 {
 755         struct netdev_queue *txq;
 756         bool above_thresh;
 757         u32 tx_bytes = 0;
 758         u32 total_done = 0;
 759         u16 next_to_clean;
 760         u16 req_id;
 761         int tx_pkts = 0;
 762         int rc;
 763
 764         next_to_clean = tx_ring->next_to_clean;
 765         txq = netdev_get_tx_queue(tx_ring->netdev, tx_ring->qid);
 766
 767         while (tx_pkts < budget) {
 768                 struct ena_tx_buffer *tx_info;
 769                 struct sk_buff *skb;
 770
 771                 rc = ena_com_tx_comp_req_id_get(tx_ring->ena_com_io_cq,
 772                                                 &req_id);
 773                 if (rc)
 774                         break;
 775
 776                 rc = validate_tx_req_id(tx_ring, req_id);
 777                 if (rc)
 778                         break;
 779
 780                 tx_info = &tx_ring->tx_buffer_info[req_id];
 781                 skb = tx_info->skb;
 782
 783                 /* prefetch skb_end_pointer() to speedup skb_shinfo(skb) */
 784                 prefetch(&skb->end);
 785
 786                 tx_info->skb = NULL;
 787                 tx_info->last_jiffies = 0;
 788
 789                 ena_unmap_tx_skb(tx_ring, tx_info);
 790
 791                 netif_dbg(tx_ring->adapter, tx_done, tx_ring->netdev,
 792                           "tx_poll: q %d skb %p completed\n", tx_ring->qid,
 793                           skb);
 794
 795                 tx_bytes += skb->len;
 796                 dev_kfree_skb(skb);
 797                 tx_pkts++;
 798                 total_done += tx_info->tx_descs;
 799
 800                 tx_ring->free_ids[next_to_clean] = req_id;
 801                 next_to_clean = ENA_TX_RING_IDX_NEXT(next_to_clean,
 802                                                      tx_ring->ring_size);
 803         }
 804
 805         tx_ring->next_to_clean = next_to_clean;
 806         ena_com_comp_ack(tx_ring->ena_com_io_sq, total_done);
 807         ena_com_update_dev_comp_head(tx_ring->ena_com_io_cq);
 808
 809         netdev_tx_completed_queue(txq, tx_pkts, tx_bytes);
 810
 811         netif_dbg(tx_ring->adapter, tx_done, tx_ring->netdev,
 812                   "tx_poll: q %d done. total pkts: %d\n",
 813                   tx_ring->qid, tx_pkts);
 814
 815         /* need to make the rings circular update visible to
 816          * ena_start_xmit() before checking for netif_queue_stopped().
 817          */
 818         smp_mb();
 819
 820         above_thresh = ena_com_sq_have_enough_space(tx_ring->ena_com_io_sq,
 821                                                     ENA_TX_WAKEUP_THRESH);
 822         if (unlikely(netif_tx_queue_stopped(txq) && above_thresh)) {
 823                 __netif_tx_lock(txq, smp_processor_id());
 824                 above_thresh =
 825                         ena_com_sq_have_enough_space(tx_ring->ena_com_io_sq,
 826                                                      ENA_TX_WAKEUP_THRESH);
 827                 if (netif_tx_queue_stopped(txq) && above_thresh &&
 828                     test_bit(ENA_FLAG_DEV_UP, &tx_ring->adapter->flags)) {
 829                         netif_tx_wake_queue(txq);
 830                         u64_stats_update_begin(&tx_ring->syncp);
 831                         tx_ring->tx_stats.queue_wakeup++;
 832                         u64_stats_update_end(&tx_ring->syncp);
 833                 }
 834                 __netif_tx_unlock(txq);
 835         }
 836
 837         return tx_pkts;
 838 }
 839
 840 static struct sk_buff *ena_alloc_skb(struct ena_ring *rx_ring, bool frags)
 841 {
 842         struct sk_buff *skb;
 843
 844         if (frags)
 845                 skb = napi_get_frags(rx_ring->napi);
 846         else
 847                 skb = netdev_alloc_skb_ip_align(rx_ring->netdev,
 848                                                 rx_ring->rx_copybreak);
 849
 850         if (unlikely(!skb)) {
 851                 u64_stats_update_begin(&rx_ring->syncp);
 852                 rx_ring->rx_stats.skb_alloc_fail++;
 853                 u64_stats_update_end(&rx_ring->syncp);
 854                 netif_dbg(rx_ring->adapter, rx_err, rx_ring->netdev,
 855                           "Failed to allocate skb. frags: %d\n", frags);
 856                 return NULL;
 857         }
 858
 859         return skb;
 860 }
 861
 862 static struct sk_buff *ena_rx_skb(struct ena_ring *rx_ring,
 863                                   struct ena_com_rx_buf_info *ena_bufs,
 864                                   u32 descs,
 865                                   u16 *next_to_clean)
 866 {
 867         struct sk_buff *skb;
 868         struct ena_rx_buffer *rx_info;
 869         u16 len, req_id, buf = 0;
 870         void *va;
 871
 872         len = ena_bufs[buf].len;
 873         req_id = ena_bufs[buf].req_id;
 874         rx_info = &rx_ring->rx_buffer_info[req_id];
 875
 876         if (unlikely(!rx_info->page)) {
 877                 netif_err(rx_ring->adapter, rx_err, rx_ring->netdev,
 878                           "Page is NULL\n");
 879                 return NULL;
 880         }
 881
 882         netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev,
 883                   "rx_info %p page %p\n",
 884                   rx_info, rx_info->page);
 885
 886         /* save virt address of first buffer */
 887         va = page_address(rx_info->page) + rx_info->page_offset;
 888         prefetch(va + NET_IP_ALIGN);
 889
 890         if (len <= rx_ring->rx_copybreak) {
 891                 skb = ena_alloc_skb(rx_ring, false);
 892                 if (unlikely(!skb))
 893                         return NULL;
 894
 895                 netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev,
 896                           "rx allocated small packet. len %d. data_len %d\n",
 897                           skb->len, skb->data_len);
 898
 899                 /* sync this buffer for CPU use */
 900                 dma_sync_single_for_cpu(rx_ring->dev,
 901                                         dma_unmap_addr(&rx_info->ena_buf, paddr),
 902                                         len,
 903                                         DMA_FROM_DEVICE);
 904                 skb_copy_to_linear_data(skb, va, len);
 905                 dma_sync_single_for_device(rx_ring->dev,
 906                                            dma_unmap_addr(&rx_info->ena_buf, paddr),
 907                                            len,
 908                                            DMA_FROM_DEVICE);
 909
 910                 skb_put(skb, len);
 911                 skb->protocol = eth_type_trans(skb, rx_ring->netdev);
 912                 rx_ring->free_ids[*next_to_clean] = req_id;
 913                 *next_to_clean = ENA_RX_RING_IDX_ADD(*next_to_clean, descs,
 914                                                      rx_ring->ring_size);
 915                 return skb;
 916         }
 917
 918         skb = ena_alloc_skb(rx_ring, true);
 919         if (unlikely(!skb))
 920                 return NULL;
 921
 922         do {
 923                 dma_unmap_page(rx_ring->dev,
 924                                dma_unmap_addr(&rx_info->ena_buf, paddr),
 925                                ENA_PAGE_SIZE, DMA_FROM_DEVICE);
 926
 927                 skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, rx_info->page,
 928                                 rx_info->page_offset, len, ENA_PAGE_SIZE);
 929
 930                 netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev,
 931                           "rx skb updated. len %d. data_len %d\n",
 932                           skb->len, skb->data_len);
 933
 934                 rx_info->page = NULL;
 935
 936                 rx_ring->free_ids[*next_to_clean] = req_id;
 937                 *next_to_clean =
 938                         ENA_RX_RING_IDX_NEXT(*next_to_clean,
 939                                              rx_ring->ring_size);
 940                 if (likely(--descs == 0))
 941                         break;
 942
 943                 buf++;
 944                 len = ena_bufs[buf].len;
 945                 req_id = ena_bufs[buf].req_id;
 946                 rx_info = &rx_ring->rx_buffer_info[req_id];
 947         } while (1);
 948
 949         return skb;
 950 }
 951
 952 /* ena_rx_checksum - indicate in skb if hw indicated a good cksum
 953  * @adapter: structure containing adapter specific data
 954  * @ena_rx_ctx: received packet context/metadata
 955  * @skb: skb currently being received and modified
 956  */
 957 static void ena_rx_checksum(struct ena_ring *rx_ring,
 958                                    struct ena_com_rx_ctx *ena_rx_ctx,
 959                                    struct sk_buff *skb)
 960 {
 961         /* Rx csum disabled */
 962         if (unlikely(!(rx_ring->netdev->features & NETIF_F_RXCSUM))) {
 963                 skb->ip_summed = CHECKSUM_NONE;
 964                 return;
 965         }
 966
 967         /* For fragmented packets the checksum isn't valid */
 968         if (ena_rx_ctx->frag) {
 969                 skb->ip_summed = CHECKSUM_NONE;
 970                 return;
 971         }
 972
 973         /* if IP and error */
 974         if (unlikely((ena_rx_ctx->l3_proto == ENA_ETH_IO_L3_PROTO_IPV4) &&
 975                      (ena_rx_ctx->l3_csum_err))) {
 976                 /* ipv4 checksum error */
 977                 skb->ip_summed = CHECKSUM_NONE;
 978                 u64_stats_update_begin(&rx_ring->syncp);
 979                 rx_ring->rx_stats.bad_csum++;
 980                 u64_stats_update_end(&rx_ring->syncp);
 981                 netif_dbg(rx_ring->adapter, rx_err, rx_ring->netdev,
 982                           "RX IPv4 header checksum error\n");
 983                 return;
 984         }
 985
 986         /* if TCP/UDP */
 987         if (likely((ena_rx_ctx->l4_proto == ENA_ETH_IO_L4_PROTO_TCP) ||
 988                    (ena_rx_ctx->l4_proto == ENA_ETH_IO_L4_PROTO_UDP))) {
 989                 if (unlikely(ena_rx_ctx->l4_csum_err)) {
 990                         /* TCP/UDP checksum error */
 991                         u64_stats_update_begin(&rx_ring->syncp);
 992                         rx_ring->rx_stats.bad_csum++;
 993                         u64_stats_update_end(&rx_ring->syncp);
 994                         netif_dbg(rx_ring->adapter, rx_err, rx_ring->netdev,
 995                                   "RX L4 checksum error\n");
 996                         skb->ip_summed = CHECKSUM_NONE;
 997                         return;
 998                 }
 999
1000                 if (likely(ena_rx_ctx->l4_csum_checked)) {
1001                         skb->ip_summed = CHECKSUM_UNNECESSARY;
1002                         u64_stats_update_begin(&rx_ring->syncp);
1003                         rx_ring->rx_stats.csum_good++;
1004                         u64_stats_update_end(&rx_ring->syncp);
1005                 } else {
1006                         u64_stats_update_begin(&rx_ring->syncp);
1007                         rx_ring->rx_stats.csum_unchecked++;
1008                         u64_stats_update_end(&rx_ring->syncp);
1009                         skb->ip_summed = CHECKSUM_NONE;
1010                 }
1011         } else {
1012                 skb->ip_summed = CHECKSUM_NONE;
1013                 return;
1014         }
1015
1016 }
1017
1018 static void ena_set_rx_hash(struct ena_ring *rx_ring,
1019                             struct ena_com_rx_ctx *ena_rx_ctx,
1020                             struct sk_buff *skb)
1021 {
1022         enum pkt_hash_types hash_type;
1023
1024         if (likely(rx_ring->netdev->features & NETIF_F_RXHASH)) {
1025                 if (likely((ena_rx_ctx->l4_proto == ENA_ETH_IO_L4_PROTO_TCP) ||
1026                            (ena_rx_ctx->l4_proto == ENA_ETH_IO_L4_PROTO_UDP)))
1027
1028                         hash_type = PKT_HASH_TYPE_L4;
1029                 else
1030                         hash_type = PKT_HASH_TYPE_NONE;
1031
1032                 /* Override hash type if the packet is fragmented */
1033                 if (ena_rx_ctx->frag)
1034                         hash_type = PKT_HASH_TYPE_NONE;
1035
1036                 skb_set_hash(skb, ena_rx_ctx->hash, hash_type);
1037         }
1038 }
1039
1040 /* ena_clean_rx_irq - Cleanup RX irq
1041  * @rx_ring: RX ring to clean
1042  * @napi: napi handler
1043  * @budget: how many packets driver is allowed to clean
1044  *
1045  * Returns the number of cleaned buffers.
1046  */
1047 static int ena_clean_rx_irq(struct ena_ring *rx_ring, struct napi_struct *napi,
1048                             u32 budget)
1049 {
1050         u16 next_to_clean = rx_ring->next_to_clean;
1051         u32 res_budget, work_done;
1052
1053         struct ena_com_rx_ctx ena_rx_ctx;
1054         struct ena_adapter *adapter;
1055         struct sk_buff *skb;
1056         int refill_required;
1057         int refill_threshold;
1058         int rc = 0;
1059         int total_len = 0;
1060         int rx_copybreak_pkt = 0;
1061         int i;
1062
1063         netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev,
1064                   "%s qid %d\n", __func__, rx_ring->qid);
1065         res_budget = budget;
1066
1067         do {
1068                 ena_rx_ctx.ena_bufs = rx_ring->ena_bufs;
1069                 ena_rx_ctx.max_bufs = rx_ring->sgl_size;
1070                 ena_rx_ctx.descs = 0;
1071                 rc = ena_com_rx_pkt(rx_ring->ena_com_io_cq,
1072                                     rx_ring->ena_com_io_sq,
1073                                     &ena_rx_ctx);
1074                 if (unlikely(rc))
1075                         goto error;
1076
1077                 if (unlikely(ena_rx_ctx.descs == 0))
1078                         break;
1079
1080                 netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev,
1081                           "rx_poll: q %d got packet from ena. descs #: %d l3 proto %d l4 proto %d hash: %x\n",
1082                           rx_ring->qid, ena_rx_ctx.descs, ena_rx_ctx.l3_proto,
1083                           ena_rx_ctx.l4_proto, ena_rx_ctx.hash);
1084
1085                 /* allocate skb and fill it */
1086                 skb = ena_rx_skb(rx_ring, rx_ring->ena_bufs, ena_rx_ctx.descs,
1087                                  &next_to_clean);
1088
1089                 /* exit if we failed to retrieve a buffer */
1090                 if (unlikely(!skb)) {
1091                         for (i = 0; i < ena_rx_ctx.descs; i++) {
1092                                 rx_ring->free_ids[next_to_clean] =
1093                                         rx_ring->ena_bufs[i].req_id;
1094                                 next_to_clean =
1095                                         ENA_RX_RING_IDX_NEXT(next_to_clean,
1096                                                              rx_ring->ring_size);
1097                         }
1098                         break;
1099                 }
1100
1101                 ena_rx_checksum(rx_ring, &ena_rx_ctx, skb);
1102
1103                 ena_set_rx_hash(rx_ring, &ena_rx_ctx, skb);
1104
1105                 skb_record_rx_queue(skb, rx_ring->qid);
1106
1107                 if (rx_ring->ena_bufs[0].len <= rx_ring->rx_copybreak) {
1108                         total_len += rx_ring->ena_bufs[0].len;
1109                         rx_copybreak_pkt++;
1110                         napi_gro_receive(napi, skb);
1111                 } else {
1112                         total_len += skb->len;
1113                         napi_gro_frags(napi);
1114                 }
1115
1116                 res_budget--;
1117         } while (likely(res_budget));
1118
1119         work_done = budget - res_budget;
1120         rx_ring->per_napi_packets += work_done;
1121         u64_stats_update_begin(&rx_ring->syncp);
1122         rx_ring->rx_stats.bytes += total_len;
1123         rx_ring->rx_stats.cnt += work_done;
1124         rx_ring->rx_stats.rx_copybreak_pkt += rx_copybreak_pkt;
1125         u64_stats_update_end(&rx_ring->syncp);
1126
1127         rx_ring->next_to_clean = next_to_clean;
1128
1129         refill_required = ena_com_free_desc(rx_ring->ena_com_io_sq);
1130         refill_threshold =
1131                 min_t(int, rx_ring->ring_size / ENA_RX_REFILL_THRESH_DIVIDER,
1132                       ENA_RX_REFILL_THRESH_PACKET);
1133
1134         /* Optimization, try to batch new rx buffers */
1135         if (refill_required > refill_threshold) {
1136                 ena_com_update_dev_comp_head(rx_ring->ena_com_io_cq);
1137                 ena_refill_rx_bufs(rx_ring, refill_required);
1138         }
1139
1140         return work_done;
1141
1142 error:
1143         adapter = netdev_priv(rx_ring->netdev);
1144
1145         u64_stats_update_begin(&rx_ring->syncp);
1146         rx_ring->rx_stats.bad_desc_num++;
1147         u64_stats_update_end(&rx_ring->syncp);
1148
1149         /* Too many desc from the device. Trigger reset */
1150         adapter->reset_reason = ENA_REGS_RESET_TOO_MANY_RX_DESCS;
1151         set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags);
1152
1153         return 0;
1154 }
1155
1156 static void ena_dim_work(struct work_struct *w)
1157 {
1158         struct dim *dim = container_of(w, struct dim, work);
1159         struct dim_cq_moder cur_moder =
1160                 net_dim_get_rx_moderation(dim->mode, dim->profile_ix);
1161         struct ena_napi *ena_napi = container_of(dim, struct ena_napi, dim);
1162
1163         ena_napi->rx_ring->smoothed_interval = cur_moder.usec;
1164         dim->state = DIM_START_MEASURE;
1165 }
1166
1167 static void ena_adjust_adaptive_rx_intr_moderation(struct ena_napi *ena_napi)
1168 {
1169         struct dim_sample dim_sample;
1170         struct ena_ring *rx_ring = ena_napi->rx_ring;
1171
1172         if (!rx_ring->per_napi_packets)
1173                 return;
1174
1175         rx_ring->non_empty_napi_events++;
1176
1177         dim_update_sample(rx_ring->non_empty_napi_events,
1178                           rx_ring->rx_stats.cnt,
1179                           rx_ring->rx_stats.bytes,
1180                           &dim_sample);
1181
1182         net_dim(&ena_napi->dim, dim_sample);
1183
1184         rx_ring->per_napi_packets = 0;
1185 }
1186
1187 static void ena_unmask_interrupt(struct ena_ring *tx_ring,
1188                                         struct ena_ring *rx_ring)
1189 {
1190         struct ena_eth_io_intr_reg intr_reg;
1191         u32 rx_interval = ena_com_get_adaptive_moderation_enabled(rx_ring->ena_dev) ?
1192                 rx_ring->smoothed_interval :
1193                 ena_com_get_nonadaptive_moderation_interval_rx(rx_ring->ena_dev);
1194
1195         /* Update intr register: rx intr delay,
1196          * tx intr delay and interrupt unmask
1197          */
1198         ena_com_update_intr_reg(&intr_reg,
1199                                 rx_interval,
1200                                 tx_ring->smoothed_interval,
1201                                 true);
1202
1203         /* It is a shared MSI-X.
1204          * Tx and Rx CQ have pointer to it.
1205          * So we use one of them to reach the intr reg
1206          */
1207         ena_com_unmask_intr(rx_ring->ena_com_io_cq, &intr_reg);
1208 }
1209
1210 static void ena_update_ring_numa_node(struct ena_ring *tx_ring,
1211                                              struct ena_ring *rx_ring)
1212 {
1213         int cpu = get_cpu();
1214         int numa_node;
1215
1216         /* Check only one ring since the 2 rings are running on the same cpu */
1217         if (likely(tx_ring->cpu == cpu))
1218                 goto out;
1219
1220         numa_node = cpu_to_node(cpu);
1221         put_cpu();
1222
1223         if (numa_node != NUMA_NO_NODE) {
1224                 ena_com_update_numa_node(tx_ring->ena_com_io_cq, numa_node);
1225                 ena_com_update_numa_node(rx_ring->ena_com_io_cq, numa_node);
1226         }
1227
1228         tx_ring->cpu = cpu;
1229         rx_ring->cpu = cpu;
1230
1231         return;
1232 out:
1233         put_cpu();
1234 }
1235
1236 static int ena_io_poll(struct napi_struct *napi, int budget)
1237 {
1238         struct ena_napi *ena_napi = container_of(napi, struct ena_napi, napi);
1239         struct ena_ring *tx_ring, *rx_ring;
1240
1241         u32 tx_work_done;
1242         u32 rx_work_done;
1243         int tx_budget;
1244         int napi_comp_call = 0;
1245         int ret;
1246
1247         tx_ring = ena_napi->tx_ring;
1248         rx_ring = ena_napi->rx_ring;
1249
1250         tx_budget = tx_ring->ring_size / ENA_TX_POLL_BUDGET_DIVIDER;
1251
1252         if (!test_bit(ENA_FLAG_DEV_UP, &tx_ring->adapter->flags) ||
1253             test_bit(ENA_FLAG_TRIGGER_RESET, &tx_ring->adapter->flags)) {
1254                 napi_complete_done(napi, 0);
1255                 return 0;
1256         }
1257
1258         tx_work_done = ena_clean_tx_irq(tx_ring, tx_budget);
1259         rx_work_done = ena_clean_rx_irq(rx_ring, napi, budget);
1260
1261         /* If the device is about to reset or down, avoid unmask
1262          * the interrupt and return 0 so NAPI won't reschedule
1263          */
1264         if (unlikely(!test_bit(ENA_FLAG_DEV_UP, &tx_ring->adapter->flags) ||
1265                      test_bit(ENA_FLAG_TRIGGER_RESET, &tx_ring->adapter->flags))) {
1266                 napi_complete_done(napi, 0);
1267                 ret = 0;
1268
1269         } else if ((budget > rx_work_done) && (tx_budget > tx_work_done)) {
1270                 napi_comp_call = 1;
1271
1272                 /* Update numa and unmask the interrupt only when schedule
1273                  * from the interrupt context (vs from sk_busy_loop)
1274                  */
1275                 if (napi_complete_done(napi, rx_work_done)) {
1276                         /* We apply adaptive moderation on Rx path only.
1277                          * Tx uses static interrupt moderation.
1278                          */
1279                         if (ena_com_get_adaptive_moderation_enabled(rx_ring->ena_dev))
1280                                 ena_adjust_adaptive_rx_intr_moderation(ena_napi);
1281
1282                         ena_unmask_interrupt(tx_ring, rx_ring);
1283                 }
1284
1285                 ena_update_ring_numa_node(tx_ring, rx_ring);
1286
1287                 ret = rx_work_done;
1288         } else {
1289                 ret = budget;
1290         }
1291
1292         u64_stats_update_begin(&tx_ring->syncp);
1293         tx_ring->tx_stats.napi_comp += napi_comp_call;
1294         tx_ring->tx_stats.tx_poll++;
1295         u64_stats_update_end(&tx_ring->syncp);
1296
1297         return ret;
1298 }
1299
1300 static irqreturn_t ena_intr_msix_mgmnt(int irq, void *data)
1301 {
1302         struct ena_adapter *adapter = (struct ena_adapter *)data;
1303
1304         ena_com_admin_q_comp_intr_handler(adapter->ena_dev);
1305
1306         /* Don't call the aenq handler before probe is done */
1307         if (likely(test_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags)))
1308                 ena_com_aenq_intr_handler(adapter->ena_dev, data);
1309
1310         return IRQ_HANDLED;
1311 }
1312
1313 /* ena_intr_msix_io - MSI-X Interrupt Handler for Tx/Rx
1314  * @irq: interrupt number
1315  * @data: pointer to a network interface private napi device structure
1316  */
1317 static irqreturn_t ena_intr_msix_io(int irq, void *data)
1318 {
1319         struct ena_napi *ena_napi = data;
1320
1321         ena_napi->tx_ring->first_interrupt = true;
1322         ena_napi->rx_ring->first_interrupt = true;
1323
1324         napi_schedule_irqoff(&ena_napi->napi);
1325
1326         return IRQ_HANDLED;
1327 }
1328
1329 /* Reserve a single MSI-X vector for management (admin + aenq).
1330  * plus reserve one vector for each potential io queue.
1331  * the number of potential io queues is the minimum of what the device
1332  * supports and the number of vCPUs.
1333  */
1334 static int ena_enable_msix(struct ena_adapter *adapter, int num_queues)
1335 {
1336         int msix_vecs, irq_cnt;
1337
1338         if (test_bit(ENA_FLAG_MSIX_ENABLED, &adapter->flags)) {
1339                 netif_err(adapter, probe, adapter->netdev,
1340                           "Error, MSI-X is already enabled\n");
1341                 return -EPERM;
1342         }
1343
1344         /* Reserved the max msix vectors we might need */
1345         msix_vecs = ENA_MAX_MSIX_VEC(num_queues);
1346         netif_dbg(adapter, probe, adapter->netdev,
1347                   "trying to enable MSI-X, vectors %d\n", msix_vecs);
1348
1349         irq_cnt = pci_alloc_irq_vectors(adapter->pdev, ENA_MIN_MSIX_VEC,
1350                                         msix_vecs, PCI_IRQ_MSIX);
1351
1352         if (irq_cnt < 0) {
1353                 netif_err(adapter, probe, adapter->netdev,
1354                           "Failed to enable MSI-X. irq_cnt %d\n", irq_cnt);
1355                 return -ENOSPC;
1356         }
1357
1358         if (irq_cnt != msix_vecs) {
1359                 netif_notice(adapter, probe, adapter->netdev,
1360                              "enable only %d MSI-X (out of %d), reduce the number of queues\n",
1361                              irq_cnt, msix_vecs);
1362                 adapter->num_io_queues = irq_cnt - ENA_ADMIN_MSIX_VEC;
1363         }
1364
1365         if (ena_init_rx_cpu_rmap(adapter))
1366                 netif_warn(adapter, probe, adapter->netdev,
1367                            "Failed to map IRQs to CPUs\n");
1368
1369         adapter->msix_vecs = irq_cnt;
1370         set_bit(ENA_FLAG_MSIX_ENABLED, &adapter->flags);
1371
1372         return 0;
1373 }
1374
1375 static void ena_setup_mgmnt_intr(struct ena_adapter *adapter)
1376 {
1377         u32 cpu;
1378
1379         snprintf(adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].name,
1380                  ENA_IRQNAME_SIZE, "ena-mgmnt@pci:%s",
1381                  pci_name(adapter->pdev));
1382         adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].handler =
1383                 ena_intr_msix_mgmnt;
1384         adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].data = adapter;
1385         adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].vector =
1386                 pci_irq_vector(adapter->pdev, ENA_MGMNT_IRQ_IDX);
1387         cpu = cpumask_first(cpu_online_mask);
1388         adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].cpu = cpu;
1389         cpumask_set_cpu(cpu,
1390                         &adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].affinity_hint_mask);
1391 }
1392
1393 static void ena_setup_io_intr(struct ena_adapter *adapter)
1394 {
1395         struct net_device *netdev;
1396         int irq_idx, i, cpu;
1397
1398         netdev = adapter->netdev;
1399
1400         for (i = 0; i < adapter->num_io_queues; i++) {
1401                 irq_idx = ENA_IO_IRQ_IDX(i);
1402                 cpu = i % num_online_cpus();
1403
1404                 snprintf(adapter->irq_tbl[irq_idx].name, ENA_IRQNAME_SIZE,
1405                          "%s-Tx-Rx-%d", netdev->name, i);
1406                 adapter->irq_tbl[irq_idx].handler = ena_intr_msix_io;
1407                 adapter->irq_tbl[irq_idx].data = &adapter->ena_napi[i];
1408                 adapter->irq_tbl[irq_idx].vector =
1409                         pci_irq_vector(adapter->pdev, irq_idx);
1410                 adapter->irq_tbl[irq_idx].cpu = cpu;
1411
1412                 cpumask_set_cpu(cpu,
1413                                 &adapter->irq_tbl[irq_idx].affinity_hint_mask);
1414         }
1415 }
1416
1417 static int ena_request_mgmnt_irq(struct ena_adapter *adapter)
1418 {
1419         unsigned long flags = 0;
1420         struct ena_irq *irq;
1421         int rc;
1422
1423         irq = &adapter->irq_tbl[ENA_MGMNT_IRQ_IDX];
1424         rc = request_irq(irq->vector, irq->handler, flags, irq->name,
1425                          irq->data);
1426         if (rc) {
1427                 netif_err(adapter, probe, adapter->netdev,
1428                           "failed to request admin irq\n");
1429                 return rc;
1430         }
1431
1432         netif_dbg(adapter, probe, adapter->netdev,
1433                   "set affinity hint of mgmnt irq.to 0x%lx (irq vector: %d)\n",
1434                   irq->affinity_hint_mask.bits[0], irq->vector);
1435
1436         irq_set_affinity_hint(irq->vector, &irq->affinity_hint_mask);
1437
1438         return rc;
1439 }
1440
1441 static int ena_request_io_irq(struct ena_adapter *adapter)
1442 {
1443         unsigned long flags = 0;
1444         struct ena_irq *irq;
1445         int rc = 0, i, k;
1446
1447         if (!test_bit(ENA_FLAG_MSIX_ENABLED, &adapter->flags)) {
1448                 netif_err(adapter, ifup, adapter->netdev,
1449                           "Failed to request I/O IRQ: MSI-X is not enabled\n");
1450                 return -EINVAL;
1451         }
1452
1453         for (i = ENA_IO_IRQ_FIRST_IDX; i < adapter->msix_vecs; i++) {
1454                 irq = &adapter->irq_tbl[i];
1455                 rc = request_irq(irq->vector, irq->handler, flags, irq->name,
1456                                  irq->data);
1457                 if (rc) {
1458                         netif_err(adapter, ifup, adapter->netdev,
1459                                   "Failed to request I/O IRQ. index %d rc %d\n",
1460                                    i, rc);
1461                         goto err;
1462                 }
1463
1464                 netif_dbg(adapter, ifup, adapter->netdev,
1465                           "set affinity hint of irq. index %d to 0x%lx (irq vector: %d)\n",
1466                           i, irq->affinity_hint_mask.bits[0], irq->vector);
1467
1468                 irq_set_affinity_hint(irq->vector, &irq->affinity_hint_mask);
1469         }
1470
1471         return rc;
1472
1473 err:
1474         for (k = ENA_IO_IRQ_FIRST_IDX; k < i; k++) {
1475                 irq = &adapter->irq_tbl[k];
1476                 free_irq(irq->vector, irq->data);
1477         }
1478
1479         return rc;
1480 }
1481
1482 static void ena_free_mgmnt_irq(struct ena_adapter *adapter)
1483 {
1484         struct ena_irq *irq;
1485
1486         irq = &adapter->irq_tbl[ENA_MGMNT_IRQ_IDX];
1487         synchronize_irq(irq->vector);
1488         irq_set_affinity_hint(irq->vector, NULL);
1489         free_irq(irq->vector, irq->data);
1490 }
1491
1492 static void ena_free_io_irq(struct ena_adapter *adapter)
1493 {
1494         struct ena_irq *irq;
1495         int i;
1496
1497 #ifdef CONFIG_RFS_ACCEL
1498         if (adapter->msix_vecs >= 1) {
1499                 free_irq_cpu_rmap(adapter->netdev->rx_cpu_rmap);
1500                 adapter->netdev->rx_cpu_rmap = NULL;
1501         }
1502 #endif /* CONFIG_RFS_ACCEL */
1503
1504         for (i = ENA_IO_IRQ_FIRST_IDX; i < adapter->msix_vecs; i++) {
1505                 irq = &adapter->irq_tbl[i];
1506                 irq_set_affinity_hint(irq->vector, NULL);
1507                 free_irq(irq->vector, irq->data);
1508         }
1509 }
1510
1511 static void ena_disable_msix(struct ena_adapter *adapter)
1512 {
1513         if (test_and_clear_bit(ENA_FLAG_MSIX_ENABLED, &adapter->flags))
1514                 pci_free_irq_vectors(adapter->pdev);
1515 }
1516
1517 static void ena_disable_io_intr_sync(struct ena_adapter *adapter)
1518 {
1519         int i;
1520
1521         if (!netif_running(adapter->netdev))
1522                 return;
1523
1524         for (i = ENA_IO_IRQ_FIRST_IDX; i < adapter->msix_vecs; i++)
1525                 synchronize_irq(adapter->irq_tbl[i].vector);
1526 }
1527
1528 static void ena_del_napi(struct ena_adapter *adapter)
1529 {
1530         int i;
1531
1532         for (i = 0; i < adapter->num_io_queues; i++)
1533                 netif_napi_del(&adapter->ena_napi[i].napi);
1534 }
1535
1536 static void ena_init_napi(struct ena_adapter *adapter)
1537 {
1538         struct ena_napi *napi;
1539         int i;
1540
1541         for (i = 0; i < adapter->num_io_queues; i++) {
1542                 napi = &adapter->ena_napi[i];
1543
1544                 netif_napi_add(adapter->netdev,
1545                                &adapter->ena_napi[i].napi,
1546                                ena_io_poll,
1547                                ENA_NAPI_BUDGET);
1548                 napi->rx_ring = &adapter->rx_ring[i];
1549                 napi->tx_ring = &adapter->tx_ring[i];
1550                 napi->qid = i;
1551         }
1552 }
1553
1554 static void ena_napi_disable_all(struct ena_adapter *adapter)
1555 {
1556         int i;
1557
1558         for (i = 0; i < adapter->num_io_queues; i++)
1559                 napi_disable(&adapter->ena_napi[i].napi);
1560 }
1561
1562 static void ena_napi_enable_all(struct ena_adapter *adapter)
1563 {
1564         int i;
1565
1566         for (i = 0; i < adapter->num_io_queues; i++)
1567                 napi_enable(&adapter->ena_napi[i].napi);
1568 }
1569
1570 /* Configure the Rx forwarding */
1571 static int ena_rss_configure(struct ena_adapter *adapter)
1572 {
1573         struct ena_com_dev *ena_dev = adapter->ena_dev;
1574         int rc;
1575
1576         /* In case the RSS table wasn't initialized by probe */
1577         if (!ena_dev->rss.tbl_log_size) {
1578                 rc = ena_rss_init_default(adapter);
1579                 if (rc && (rc != -EOPNOTSUPP)) {
1580                         netif_err(adapter, ifup, adapter->netdev,
1581                                   "Failed to init RSS rc: %d\n", rc);
1582                         return rc;
1583                 }
1584         }
1585
1586         /* Set indirect table */
1587         rc = ena_com_indirect_table_set(ena_dev);
1588         if (unlikely(rc && rc != -EOPNOTSUPP))
1589                 return rc;
1590
1591         /* Configure hash function (if supported) */
1592         rc = ena_com_set_hash_function(ena_dev);
1593         if (unlikely(rc && (rc != -EOPNOTSUPP)))
1594                 return rc;
1595
1596         /* Configure hash inputs (if supported) */
1597         rc = ena_com_set_hash_ctrl(ena_dev);
1598         if (unlikely(rc && (rc != -EOPNOTSUPP)))
1599                 return rc;
1600
1601         return 0;
1602 }
1603
1604 static int ena_up_complete(struct ena_adapter *adapter)
1605 {
1606         int rc;
1607
1608         rc = ena_rss_configure(adapter);
1609         if (rc)
1610                 return rc;
1611
1612         ena_change_mtu(adapter->netdev, adapter->netdev->mtu);
1613
1614         ena_refill_all_rx_bufs(adapter);
1615
1616         /* enable transmits */
1617         netif_tx_start_all_queues(adapter->netdev);
1618
1619         ena_napi_enable_all(adapter);
1620
1621         return 0;
1622 }
1623
1624 static int ena_create_io_tx_queue(struct ena_adapter *adapter, int qid)
1625 {
1626         struct ena_com_create_io_ctx ctx;
1627         struct ena_com_dev *ena_dev;
1628         struct ena_ring *tx_ring;
1629         u32 msix_vector;
1630         u16 ena_qid;
1631         int rc;
1632
1633         ena_dev = adapter->ena_dev;
1634
1635         tx_ring = &adapter->tx_ring[qid];
1636         msix_vector = ENA_IO_IRQ_IDX(qid);
1637         ena_qid = ENA_IO_TXQ_IDX(qid);
1638
1639         memset(&ctx, 0x0, sizeof(ctx));
1640
1641         ctx.direction = ENA_COM_IO_QUEUE_DIRECTION_TX;
1642         ctx.qid = ena_qid;
1643         ctx.mem_queue_type = ena_dev->tx_mem_queue_type;
1644         ctx.msix_vector = msix_vector;
1645         ctx.queue_size = tx_ring->ring_size;
1646         ctx.numa_node = cpu_to_node(tx_ring->cpu);
1647
1648         rc = ena_com_create_io_queue(ena_dev, &ctx);
1649         if (rc) {
1650                 netif_err(adapter, ifup, adapter->netdev,
1651                           "Failed to create I/O TX queue num %d rc: %d\n",
1652                           qid, rc);
1653                 return rc;
1654         }
1655
1656         rc = ena_com_get_io_handlers(ena_dev, ena_qid,
1657                                      &tx_ring->ena_com_io_sq,
1658                                      &tx_ring->ena_com_io_cq);
1659         if (rc) {
1660                 netif_err(adapter, ifup, adapter->netdev,
1661                           "Failed to get TX queue handlers. TX queue num %d rc: %d\n",
1662                           qid, rc);
1663                 ena_com_destroy_io_queue(ena_dev, ena_qid);
1664                 return rc;
1665         }
1666
1667         ena_com_update_numa_node(tx_ring->ena_com_io_cq, ctx.numa_node);
1668         return rc;
1669 }
1670
1671 static int ena_create_all_io_tx_queues(struct ena_adapter *adapter)
1672 {
1673         struct ena_com_dev *ena_dev = adapter->ena_dev;
1674         int rc, i;
1675
1676         for (i = 0; i < adapter->num_io_queues; i++) {
1677                 rc = ena_create_io_tx_queue(adapter, i);
1678                 if (rc)
1679                         goto create_err;
1680         }
1681
1682         return 0;
1683
1684 create_err:
1685         while (i--)
1686                 ena_com_destroy_io_queue(ena_dev, ENA_IO_TXQ_IDX(i));
1687
1688         return rc;
1689 }
1690
1691 static int ena_create_io_rx_queue(struct ena_adapter *adapter, int qid)
1692 {
1693         struct ena_com_dev *ena_dev;
1694         struct ena_com_create_io_ctx ctx;
1695         struct ena_ring *rx_ring;
1696         u32 msix_vector;
1697         u16 ena_qid;
1698         int rc;
1699
1700         ena_dev = adapter->ena_dev;
1701
1702         rx_ring = &adapter->rx_ring[qid];
1703         msix_vector = ENA_IO_IRQ_IDX(qid);
1704         ena_qid = ENA_IO_RXQ_IDX(qid);
1705
1706         memset(&ctx, 0x0, sizeof(ctx));
1707
1708         ctx.qid = ena_qid;
1709         ctx.direction = ENA_COM_IO_QUEUE_DIRECTION_RX;
1710         ctx.mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_HOST;
1711         ctx.msix_vector = msix_vector;
1712         ctx.queue_size = rx_ring->ring_size;
1713         ctx.numa_node = cpu_to_node(rx_ring->cpu);
1714
1715         rc = ena_com_create_io_queue(ena_dev, &ctx);
1716         if (rc) {
1717                 netif_err(adapter, ifup, adapter->netdev,
1718                           "Failed to create I/O RX queue num %d rc: %d\n",
1719                           qid, rc);
1720                 return rc;
1721         }
1722
1723         rc = ena_com_get_io_handlers(ena_dev, ena_qid,
1724                                      &rx_ring->ena_com_io_sq,
1725                                      &rx_ring->ena_com_io_cq);
1726         if (rc) {
1727                 netif_err(adapter, ifup, adapter->netdev,
1728                           "Failed to get RX queue handlers. RX queue num %d rc: %d\n",
1729                           qid, rc);
1730                 ena_com_destroy_io_queue(ena_dev, ena_qid);
1731                 return rc;
1732         }
1733
1734         ena_com_update_numa_node(rx_ring->ena_com_io_cq, ctx.numa_node);
1735
1736         return rc;
1737 }
1738
1739 static int ena_create_all_io_rx_queues(struct ena_adapter *adapter)
1740 {
1741         struct ena_com_dev *ena_dev = adapter->ena_dev;
1742         int rc, i;
1743
1744         for (i = 0; i < adapter->num_io_queues; i++) {
1745                 rc = ena_create_io_rx_queue(adapter, i);
1746                 if (rc)
1747                         goto create_err;
1748                 INIT_WORK(&adapter->ena_napi[i].dim.work, ena_dim_work);
1749         }
1750
1751         return 0;
1752
1753 create_err:
1754         while (i--) {
1755                 cancel_work_sync(&adapter->ena_napi[i].dim.work);
1756                 ena_com_destroy_io_queue(ena_dev, ENA_IO_RXQ_IDX(i));
1757         }
1758
1759         return rc;
1760 }
1761
1762 static void set_io_rings_size(struct ena_adapter *adapter,
1763                                      int new_tx_size, int new_rx_size)
1764 {
1765         int i;
1766
1767         for (i = 0; i < adapter->num_io_queues; i++) {
1768                 adapter->tx_ring[i].ring_size = new_tx_size;
1769                 adapter->rx_ring[i].ring_size = new_rx_size;
1770         }
1771 }
1772
1773 /* This function allows queue allocation to backoff when the system is
1774  * low on memory. If there is not enough memory to allocate io queues
1775  * the driver will try to allocate smaller queues.
1776  *
1777  * The backoff algorithm is as follows:
1778  *  1. Try to allocate TX and RX and if successful.
1779  *  1.1. return success
1780  *
1781  *  2. Divide by 2 the size of the larger of RX and TX queues (or both if their size is the same).
1782  *
1783  *  3. If TX or RX is smaller than 256
1784  *  3.1. return failure.
1785  *  4. else
1786  *  4.1. go back to 1.
1787  */
1788 static int create_queues_with_size_backoff(struct ena_adapter *adapter)
1789 {
1790         int rc, cur_rx_ring_size, cur_tx_ring_size;
1791         int new_rx_ring_size, new_tx_ring_size;
1792
1793         /* current queue sizes might be set to smaller than the requested
1794          * ones due to past queue allocation failures.
1795          */
1796         set_io_rings_size(adapter, adapter->requested_tx_ring_size,
1797                           adapter->requested_rx_ring_size);
1798
1799         while (1) {
1800                 rc = ena_setup_all_tx_resources(adapter);
1801                 if (rc)
1802                         goto err_setup_tx;
1803
1804                 rc = ena_create_all_io_tx_queues(adapter);
1805                 if (rc)
1806                         goto err_create_tx_queues;
1807
1808                 rc = ena_setup_all_rx_resources(adapter);
1809                 if (rc)
1810                         goto err_setup_rx;
1811
1812                 rc = ena_create_all_io_rx_queues(adapter);
1813                 if (rc)
1814                         goto err_create_rx_queues;
1815
1816                 return 0;
1817
1818 err_create_rx_queues:
1819                 ena_free_all_io_rx_resources(adapter);
1820 err_setup_rx:
1821                 ena_destroy_all_tx_queues(adapter);
1822 err_create_tx_queues:
1823                 ena_free_all_io_tx_resources(adapter);
1824 err_setup_tx:
1825                 if (rc != -ENOMEM) {
1826                         netif_err(adapter, ifup, adapter->netdev,
1827                                   "Queue creation failed with error code %d\n",
1828                                   rc);
1829                         return rc;
1830                 }
1831
1832                 cur_tx_ring_size = adapter->tx_ring[0].ring_size;
1833                 cur_rx_ring_size = adapter->rx_ring[0].ring_size;
1834
1835                 netif_err(adapter, ifup, adapter->netdev,
1836                           "Not enough memory to create queues with sizes TX=%d, RX=%d\n",
1837                           cur_tx_ring_size, cur_rx_ring_size);
1838
1839                 new_tx_ring_size = cur_tx_ring_size;
1840                 new_rx_ring_size = cur_rx_ring_size;
1841
1842                 /* Decrease the size of the larger queue, or
1843                  * decrease both if they are the same size.
1844                  */
1845                 if (cur_rx_ring_size <= cur_tx_ring_size)
1846                         new_tx_ring_size = cur_tx_ring_size / 2;
1847                 if (cur_rx_ring_size >= cur_tx_ring_size)
1848                         new_rx_ring_size = cur_rx_ring_size / 2;
1849
1850                 if (new_tx_ring_size < ENA_MIN_RING_SIZE ||
1851                     new_rx_ring_size < ENA_MIN_RING_SIZE) {
1852                         netif_err(adapter, ifup, adapter->netdev,
1853                                   "Queue creation failed with the smallest possible queue size of %d for both queues. Not retrying with smaller queues\n",
1854                                   ENA_MIN_RING_SIZE);
1855                         return rc;
1856                 }
1857
1858                 netif_err(adapter, ifup, adapter->netdev,
1859                           "Retrying queue creation with sizes TX=%d, RX=%d\n",
1860                           new_tx_ring_size,
1861                           new_rx_ring_size);
1862
1863                 set_io_rings_size(adapter, new_tx_ring_size,
1864                                   new_rx_ring_size);
1865         }
1866 }
1867
1868 static int ena_up(struct ena_adapter *adapter)
1869 {
1870         int rc, i;
1871
1872         netdev_dbg(adapter->netdev, "%s\n", __func__);
1873
1874         ena_setup_io_intr(adapter);
1875
1876         /* napi poll functions should be initialized before running
1877          * request_irq(), to handle a rare condition where there is a pending
1878          * interrupt, causing the ISR to fire immediately while the poll
1879          * function wasn't set yet, causing a null dereference
1880          */
1881         ena_init_napi(adapter);
1882
1883         rc = ena_request_io_irq(adapter);
1884         if (rc)
1885                 goto err_req_irq;
1886
1887         rc = create_queues_with_size_backoff(adapter);
1888         if (rc)
1889                 goto err_create_queues_with_backoff;
1890
1891         rc = ena_up_complete(adapter);
1892         if (rc)
1893                 goto err_up;
1894
1895         if (test_bit(ENA_FLAG_LINK_UP, &adapter->flags))
1896                 netif_carrier_on(adapter->netdev);
1897
1898         u64_stats_update_begin(&adapter->syncp);
1899         adapter->dev_stats.interface_up++;
1900         u64_stats_update_end(&adapter->syncp);
1901
1902         set_bit(ENA_FLAG_DEV_UP, &adapter->flags);
1903
1904         /* Enable completion queues interrupt */
1905         for (i = 0; i < adapter->num_io_queues; i++)
1906                 ena_unmask_interrupt(&adapter->tx_ring[i],
1907                                      &adapter->rx_ring[i]);
1908
1909         /* schedule napi in case we had pending packets
1910          * from the last time we disable napi
1911          */
1912         for (i = 0; i < adapter->num_io_queues; i++)
1913                 napi_schedule(&adapter->ena_napi[i].napi);
1914
1915         return rc;
1916
1917 err_up:
1918         ena_destroy_all_tx_queues(adapter);
1919         ena_free_all_io_tx_resources(adapter);
1920         ena_destroy_all_rx_queues(adapter);
1921         ena_free_all_io_rx_resources(adapter);
1922 err_create_queues_with_backoff:
1923         ena_free_io_irq(adapter);
1924 err_req_irq:
1925         ena_del_napi(adapter);
1926
1927         return rc;
1928 }
1929
1930 static void ena_down(struct ena_adapter *adapter)
1931 {
1932         netif_info(adapter, ifdown, adapter->netdev, "%s\n", __func__);
1933
1934         clear_bit(ENA_FLAG_DEV_UP, &adapter->flags);
1935
1936         u64_stats_update_begin(&adapter->syncp);
1937         adapter->dev_stats.interface_down++;
1938         u64_stats_update_end(&adapter->syncp);
1939
1940         netif_carrier_off(adapter->netdev);
1941         netif_tx_disable(adapter->netdev);
1942
1943         /* After this point the napi handler won't enable the tx queue */
1944         ena_napi_disable_all(adapter);
1945
1946         /* After destroy the queue there won't be any new interrupts */
1947
1948         if (test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags)) {
1949                 int rc;
1950
1951                 rc = ena_com_dev_reset(adapter->ena_dev, adapter->reset_reason);
1952                 if (rc)
1953                         dev_err(&adapter->pdev->dev, "Device reset failed\n");
1954                 /* stop submitting admin commands on a device that was reset */
1955                 ena_com_set_admin_running_state(adapter->ena_dev, false);
1956         }
1957
1958         ena_destroy_all_io_queues(adapter);
1959
1960         ena_disable_io_intr_sync(adapter);
1961         ena_free_io_irq(adapter);
1962         ena_del_napi(adapter);
1963
1964         ena_free_all_tx_bufs(adapter);
1965         ena_free_all_rx_bufs(adapter);
1966         ena_free_all_io_tx_resources(adapter);
1967         ena_free_all_io_rx_resources(adapter);
1968 }
1969
1970 /* ena_open - Called when a network interface is made active
1971  * @netdev: network interface device structure
1972  *
1973  * Returns 0 on success, negative value on failure
1974  *
1975  * The open entry point is called when a network interface is made
1976  * active by the system (IFF_UP).  At this point all resources needed
1977  * for transmit and receive operations are allocated, the interrupt
1978  * handler is registered with the OS, the watchdog timer is started,
1979  * and the stack is notified that the interface is ready.
1980  */
1981 static int ena_open(struct net_device *netdev)
1982 {
1983         struct ena_adapter *adapter = netdev_priv(netdev);
1984         int rc;
1985
1986         /* Notify the stack of the actual queue counts. */
1987         rc = netif_set_real_num_tx_queues(netdev, adapter->num_io_queues);
1988         if (rc) {
1989                 netif_err(adapter, ifup, netdev, "Can't set num tx queues\n");
1990                 return rc;
1991         }
1992
1993         rc = netif_set_real_num_rx_queues(netdev, adapter->num_io_queues);
1994         if (rc) {
1995                 netif_err(adapter, ifup, netdev, "Can't set num rx queues\n");
1996                 return rc;
1997         }
1998
1999         rc = ena_up(adapter);
2000         if (rc)
2001                 return rc;
2002
2003         return rc;
2004 }
2005
2006 /* ena_close - Disables a network interface
2007  * @netdev: network interface device structure
2008  *
2009  * Returns 0, this is not allowed to fail
2010  *
2011  * The close entry point is called when an interface is de-activated
2012  * by the OS.  The hardware is still under the drivers control, but
2013  * needs to be disabled.  A global MAC reset is issued to stop the
2014  * hardware, and all transmit and receive resources are freed.
2015  */
2016 static int ena_close(struct net_device *netdev)
2017 {
2018         struct ena_adapter *adapter = netdev_priv(netdev);
2019
2020         netif_dbg(adapter, ifdown, netdev, "%s\n", __func__);
2021
2022         if (!test_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags))
2023                 return 0;
2024
2025         if (test_bit(ENA_FLAG_DEV_UP, &adapter->flags))
2026                 ena_down(adapter);
2027
2028         /* Check for device status and issue reset if needed*/
2029         check_for_admin_com_state(adapter);
2030         if (unlikely(test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags))) {
2031                 netif_err(adapter, ifdown, adapter->netdev,
2032                           "Destroy failure, restarting device\n");
2033                 ena_dump_stats_to_dmesg(adapter);
2034                 /* rtnl lock already obtained in dev_ioctl() layer */
2035                 ena_destroy_device(adapter, false);
2036                 ena_restore_device(adapter);
2037         }
2038
2039         return 0;
2040 }
2041
2042 int ena_update_queue_sizes(struct ena_adapter *adapter,
2043                            u32 new_tx_size,
2044                            u32 new_rx_size)
2045 {
2046         bool dev_up;
2047
2048         dev_up = test_bit(ENA_FLAG_DEV_UP, &adapter->flags);
2049         ena_close(adapter->netdev);
2050         adapter->requested_tx_ring_size = new_tx_size;
2051         adapter->requested_rx_ring_size = new_rx_size;
2052         ena_init_io_rings(adapter);
2053         return dev_up ? ena_up(adapter) : 0;
2054 }
2055
2056 static void ena_tx_csum(struct ena_com_tx_ctx *ena_tx_ctx, struct sk_buff *skb)
2057 {
2058         u32 mss = skb_shinfo(skb)->gso_size;
2059         struct ena_com_tx_meta *ena_meta = &ena_tx_ctx->ena_meta;
2060         u8 l4_protocol = 0;
2061
2062         if ((skb->ip_summed == CHECKSUM_PARTIAL) || mss) {
2063                 ena_tx_ctx->l4_csum_enable = 1;
2064                 if (mss) {
2065                         ena_tx_ctx->tso_enable = 1;
2066                         ena_meta->l4_hdr_len = tcp_hdr(skb)->doff;
2067                         ena_tx_ctx->l4_csum_partial = 0;
2068                 } else {
2069                         ena_tx_ctx->tso_enable = 0;
2070                         ena_meta->l4_hdr_len = 0;
2071                         ena_tx_ctx->l4_csum_partial = 1;
2072                 }
2073
2074                 switch (ip_hdr(skb)->version) {
2075                 case IPVERSION:
2076                         ena_tx_ctx->l3_proto = ENA_ETH_IO_L3_PROTO_IPV4;
2077                         if (ip_hdr(skb)->frag_off & htons(IP_DF))
2078                                 ena_tx_ctx->df = 1;
2079                         if (mss)
2080                                 ena_tx_ctx->l3_csum_enable = 1;
2081                         l4_protocol = ip_hdr(skb)->protocol;
2082                         break;
2083                 case 6:
2084                         ena_tx_ctx->l3_proto = ENA_ETH_IO_L3_PROTO_IPV6;
2085                         l4_protocol = ipv6_hdr(skb)->nexthdr;
2086                         break;
2087                 default:
2088                         break;
2089                 }
2090
2091                 if (l4_protocol == IPPROTO_TCP)
2092                         ena_tx_ctx->l4_proto = ENA_ETH_IO_L4_PROTO_TCP;
2093                 else
2094                         ena_tx_ctx->l4_proto = ENA_ETH_IO_L4_PROTO_UDP;
2095
2096                 ena_meta->mss = mss;
2097                 ena_meta->l3_hdr_len = skb_network_header_len(skb);
2098                 ena_meta->l3_hdr_offset = skb_network_offset(skb);
2099                 ena_tx_ctx->meta_valid = 1;
2100
2101         } else {
2102                 ena_tx_ctx->meta_valid = 0;
2103         }
2104 }
2105
2106 static int ena_check_and_linearize_skb(struct ena_ring *tx_ring,
2107                                        struct sk_buff *skb)
2108 {
2109         int num_frags, header_len, rc;
2110
2111         num_frags = skb_shinfo(skb)->nr_frags;
2112         header_len = skb_headlen(skb);
2113
2114         if (num_frags < tx_ring->sgl_size)
2115                 return 0;
2116
2117         if ((num_frags == tx_ring->sgl_size) &&
2118             (header_len < tx_ring->tx_max_header_size))
2119                 return 0;
2120
2121         u64_stats_update_begin(&tx_ring->syncp);
2122         tx_ring->tx_stats.linearize++;
2123         u64_stats_update_end(&tx_ring->syncp);
2124
2125         rc = skb_linearize(skb);
2126         if (unlikely(rc)) {
2127                 u64_stats_update_begin(&tx_ring->syncp);
2128                 tx_ring->tx_stats.linearize_failed++;
2129                 u64_stats_update_end(&tx_ring->syncp);
2130         }
2131
2132         return rc;
2133 }
2134
2135 static int ena_tx_map_skb(struct ena_ring *tx_ring,
2136                           struct ena_tx_buffer *tx_info,
2137                           struct sk_buff *skb,
2138                           void **push_hdr,
2139                           u16 *header_len)
2140 {
2141         struct ena_adapter *adapter = tx_ring->adapter;
2142         struct ena_com_buf *ena_buf;
2143         dma_addr_t dma;
2144         u32 skb_head_len, frag_len, last_frag;
2145         u16 push_len = 0;
2146         u16 delta = 0;
2147         int i = 0;
2148
2149         skb_head_len = skb_headlen(skb);
2150         tx_info->skb = skb;
2151         ena_buf = tx_info->bufs;
2152
2153         if (tx_ring->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV) {
2154                 /* When the device is LLQ mode, the driver will copy
2155                  * the header into the device memory space.
2156                  * the ena_com layer assume the header is in a linear
2157                  * memory space.
2158                  * This assumption might be wrong since part of the header
2159                  * can be in the fragmented buffers.
2160                  * Use skb_header_pointer to make sure the header is in a
2161                  * linear memory space.
2162                  */
2163
2164                 push_len = min_t(u32, skb->len, tx_ring->tx_max_header_size);
2165                 *push_hdr = skb_header_pointer(skb, 0, push_len,
2166                                                tx_ring->push_buf_intermediate_buf);
2167                 *header_len = push_len;
2168                 if (unlikely(skb->data != *push_hdr)) {
2169                         u64_stats_update_begin(&tx_ring->syncp);
2170                         tx_ring->tx_stats.llq_buffer_copy++;
2171                         u64_stats_update_end(&tx_ring->syncp);
2172
2173                         delta = push_len - skb_head_len;
2174                 }
2175         } else {
2176                 *push_hdr = NULL;
2177                 *header_len = min_t(u32, skb_head_len,
2178                                     tx_ring->tx_max_header_size);
2179         }
2180
2181         netif_dbg(adapter, tx_queued, adapter->netdev,
2182                   "skb: %p header_buf->vaddr: %p push_len: %d\n", skb,
2183                   *push_hdr, push_len);
2184
2185         if (skb_head_len > push_len) {
2186                 dma = dma_map_single(tx_ring->dev, skb->data + push_len,
2187                                      skb_head_len - push_len, DMA_TO_DEVICE);
2188                 if (unlikely(dma_mapping_error(tx_ring->dev, dma)))
2189                         goto error_report_dma_error;
2190
2191                 ena_buf->paddr = dma;
2192                 ena_buf->len = skb_head_len - push_len;
2193
2194                 ena_buf++;
2195                 tx_info->num_of_bufs++;
2196                 tx_info->map_linear_data = 1;
2197         } else {
2198                 tx_info->map_linear_data = 0;
2199         }
2200
2201         last_frag = skb_shinfo(skb)->nr_frags;
2202
2203         for (i = 0; i < last_frag; i++) {
2204                 const skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
2205
2206                 frag_len = skb_frag_size(frag);
2207
2208                 if (unlikely(delta >= frag_len)) {
2209                         delta -= frag_len;
2210                         continue;
2211                 }
2212
2213                 dma = skb_frag_dma_map(tx_ring->dev, frag, delta,
2214                                        frag_len - delta, DMA_TO_DEVICE);
2215                 if (unlikely(dma_mapping_error(tx_ring->dev, dma)))
2216                         goto error_report_dma_error;
2217
2218                 ena_buf->paddr = dma;
2219                 ena_buf->len = frag_len - delta;
2220                 ena_buf++;
2221                 tx_info->num_of_bufs++;
2222                 delta = 0;
2223         }
2224
2225         return 0;
2226
2227 error_report_dma_error:
2228         u64_stats_update_begin(&tx_ring->syncp);
2229         tx_ring->tx_stats.dma_mapping_err++;
2230         u64_stats_update_end(&tx_ring->syncp);
2231         netdev_warn(adapter->netdev, "failed to map skb\n");
2232
2233         tx_info->skb = NULL;
2234
2235         tx_info->num_of_bufs += i;
2236         ena_unmap_tx_skb(tx_ring, tx_info);
2237
2238         return -EINVAL;
2239 }
2240
2241 /* Called with netif_tx_lock. */
2242 static netdev_tx_t ena_start_xmit(struct sk_buff *skb, struct net_device *dev)
2243 {
2244         struct ena_adapter *adapter = netdev_priv(dev);
2245         struct ena_tx_buffer *tx_info;
2246         struct ena_com_tx_ctx ena_tx_ctx;
2247         struct ena_ring *tx_ring;
2248         struct netdev_queue *txq;
2249         void *push_hdr;
2250         u16 next_to_use, req_id, header_len;
2251         int qid, rc, nb_hw_desc;
2252
2253         netif_dbg(adapter, tx_queued, dev, "%s skb %p\n", __func__, skb);
2254         /*  Determine which tx ring we will be placed on */
2255         qid = skb_get_queue_mapping(skb);
2256         tx_ring = &adapter->tx_ring[qid];
2257         txq = netdev_get_tx_queue(dev, qid);
2258
2259         rc = ena_check_and_linearize_skb(tx_ring, skb);
2260         if (unlikely(rc))
2261                 goto error_drop_packet;
2262
2263         skb_tx_timestamp(skb);
2264
2265         next_to_use = tx_ring->next_to_use;
2266         req_id = tx_ring->free_ids[next_to_use];
2267         tx_info = &tx_ring->tx_buffer_info[req_id];
2268         tx_info->num_of_bufs = 0;
2269
2270         WARN(tx_info->skb, "SKB isn't NULL req_id %d\n", req_id);
2271
2272         rc = ena_tx_map_skb(tx_ring, tx_info, skb, &push_hdr, &header_len);
2273         if (unlikely(rc))
2274                 goto error_drop_packet;
2275
2276         memset(&ena_tx_ctx, 0x0, sizeof(struct ena_com_tx_ctx));
2277         ena_tx_ctx.ena_bufs = tx_info->bufs;
2278         ena_tx_ctx.push_header = push_hdr;
2279         ena_tx_ctx.num_bufs = tx_info->num_of_bufs;
2280         ena_tx_ctx.req_id = req_id;
2281         ena_tx_ctx.header_len = header_len;
2282
2283         /* set flags and meta data */
2284         ena_tx_csum(&ena_tx_ctx, skb);
2285
2286         if (unlikely(ena_com_is_doorbell_needed(tx_ring->ena_com_io_sq, &ena_tx_ctx))) {
2287                 netif_dbg(adapter, tx_queued, dev,
2288                           "llq tx max burst size of queue %d achieved, writing doorbell to send burst\n",
2289                           qid);
2290                 ena_com_write_sq_doorbell(tx_ring->ena_com_io_sq);
2291         }
2292
2293         /* prepare the packet's descriptors to dma engine */
2294         rc = ena_com_prepare_tx(tx_ring->ena_com_io_sq, &ena_tx_ctx,
2295                                 &nb_hw_desc);
2296
2297         /* ena_com_prepare_tx() can't fail due to overflow of tx queue,
2298          * since the number of free descriptors in the queue is checked
2299          * after sending the previous packet. In case there isn't enough
2300          * space in the queue for the next packet, it is stopped
2301          * until there is again enough available space in the queue.
2302          * All other failure reasons of ena_com_prepare_tx() are fatal
2303          * and therefore require a device reset.
2304          */
2305         if (unlikely(rc)) {
2306                 netif_err(adapter, tx_queued, dev,
2307                           "failed to prepare tx bufs\n");
2308                 u64_stats_update_begin(&tx_ring->syncp);
2309                 tx_ring->tx_stats.prepare_ctx_err++;
2310                 u64_stats_update_end(&tx_ring->syncp);
2311                 adapter->reset_reason = ENA_REGS_RESET_DRIVER_INVALID_STATE;
2312                 set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags);
2313                 goto error_unmap_dma;
2314         }
2315
2316         netdev_tx_sent_queue(txq, skb->len);
2317
2318         u64_stats_update_begin(&tx_ring->syncp);
2319         tx_ring->tx_stats.cnt++;
2320         tx_ring->tx_stats.bytes += skb->len;
2321         u64_stats_update_end(&tx_ring->syncp);
2322
2323         tx_info->tx_descs = nb_hw_desc;
2324         tx_info->last_jiffies = jiffies;
2325         tx_info->print_once = 0;
2326
2327         tx_ring->next_to_use = ENA_TX_RING_IDX_NEXT(next_to_use,
2328                 tx_ring->ring_size);
2329
2330         /* stop the queue when no more space available, the packet can have up
2331          * to sgl_size + 2. one for the meta descriptor and one for header
2332          * (if the header is larger than tx_max_header_size).
2333          */
2334         if (unlikely(!ena_com_sq_have_enough_space(tx_ring->ena_com_io_sq,
2335                                                    tx_ring->sgl_size + 2))) {
2336                 netif_dbg(adapter, tx_queued, dev, "%s stop queue %d\n",
2337                           __func__, qid);
2338
2339                 netif_tx_stop_queue(txq);
2340                 u64_stats_update_begin(&tx_ring->syncp);
2341                 tx_ring->tx_stats.queue_stop++;
2342                 u64_stats_update_end(&tx_ring->syncp);
2343
2344                 /* There is a rare condition where this function decide to
2345                  * stop the queue but meanwhile clean_tx_irq updates
2346                  * next_to_completion and terminates.
2347                  * The queue will remain stopped forever.
2348                  * To solve this issue add a mb() to make sure that
2349                  * netif_tx_stop_queue() write is vissible before checking if
2350                  * there is additional space in the queue.
2351                  */
2352                 smp_mb();
2353
2354                 if (ena_com_sq_have_enough_space(tx_ring->ena_com_io_sq,
2355                                                  ENA_TX_WAKEUP_THRESH)) {
2356                         netif_tx_wake_queue(txq);
2357                         u64_stats_update_begin(&tx_ring->syncp);
2358                         tx_ring->tx_stats.queue_wakeup++;
2359                         u64_stats_update_end(&tx_ring->syncp);
2360                 }
2361         }
2362
2363         if (netif_xmit_stopped(txq) || !netdev_xmit_more()) {
2364                 /* trigger the dma engine. ena_com_write_sq_doorbell()
2365                  * has a mb
2366                  */
2367                 ena_com_write_sq_doorbell(tx_ring->ena_com_io_sq);
2368                 u64_stats_update_begin(&tx_ring->syncp);
2369                 tx_ring->tx_stats.doorbells++;
2370                 u64_stats_update_end(&tx_ring->syncp);
2371         }
2372
2373         return NETDEV_TX_OK;
2374
2375 error_unmap_dma:
2376         ena_unmap_tx_skb(tx_ring, tx_info);
2377         tx_info->skb = NULL;
2378
2379 error_drop_packet:
2380         dev_kfree_skb(skb);
2381         return NETDEV_TX_OK;
2382 }
2383
2384 static u16 ena_select_queue(struct net_device *dev, struct sk_buff *skb,
2385                             struct net_device *sb_dev)
2386 {
2387         u16 qid;
2388         /* we suspect that this is good for in--kernel network services that
2389          * want to loop incoming skb rx to tx in normal user generated traffic,
2390          * most probably we will not get to this
2391          */
2392         if (skb_rx_queue_recorded(skb))
2393                 qid = skb_get_rx_queue(skb);
2394         else
2395                 qid = netdev_pick_tx(dev, skb, NULL);
2396
2397         return qid;
2398 }
2399
2400 static void ena_config_host_info(struct ena_com_dev *ena_dev,
2401                                  struct pci_dev *pdev)
2402 {
2403         struct ena_admin_host_info *host_info;
2404         int rc;
2405
2406         /* Allocate only the host info */
2407         rc = ena_com_allocate_host_info(ena_dev);
2408         if (rc) {
2409                 pr_err("Cannot allocate host info\n");
2410                 return;
2411         }
2412
2413         host_info = ena_dev->host_attr.host_info;
2414
2415         host_info->bdf = (pdev->bus->number << 8) | pdev->devfn;
2416         host_info->os_type = ENA_ADMIN_OS_LINUX;
2417         host_info->kernel_ver = LINUX_VERSION_CODE;
2418         strlcpy(host_info->kernel_ver_str, utsname()->version,
2419                 sizeof(host_info->kernel_ver_str) - 1);
2420         host_info->os_dist = 0;
2421         strncpy(host_info->os_dist_str, utsname()->release,
2422                 sizeof(host_info->os_dist_str) - 1);
2423         host_info->driver_version =
2424                 (DRV_MODULE_VER_MAJOR) |
2425                 (DRV_MODULE_VER_MINOR << ENA_ADMIN_HOST_INFO_MINOR_SHIFT) |
2426                 (DRV_MODULE_VER_SUBMINOR << ENA_ADMIN_HOST_INFO_SUB_MINOR_SHIFT) |
2427                 ("K"[0] << ENA_ADMIN_HOST_INFO_MODULE_TYPE_SHIFT);
2428         host_info->num_cpus = num_online_cpus();
2429
2430         host_info->driver_supported_features =
2431                 ENA_ADMIN_HOST_INFO_INTERRUPT_MODERATION_MASK;
2432
2433         rc = ena_com_set_host_attributes(ena_dev);
2434         if (rc) {
2435                 if (rc == -EOPNOTSUPP)
2436                         pr_warn("Cannot set host attributes\n");
2437                 else
2438                         pr_err("Cannot set host attributes\n");
2439
2440                 goto err;
2441         }
2442
2443         return;
2444
2445 err:
2446         ena_com_delete_host_info(ena_dev);
2447 }
2448
2449 static void ena_config_debug_area(struct ena_adapter *adapter)
2450 {
2451         u32 debug_area_size;
2452         int rc, ss_count;
2453
2454         ss_count = ena_get_sset_count(adapter->netdev, ETH_SS_STATS);
2455         if (ss_count <= 0) {
2456                 netif_err(adapter, drv, adapter->netdev,
2457                           "SS count is negative\n");
2458                 return;
2459         }
2460
2461         /* allocate 32 bytes for each string and 64bit for the value */
2462         debug_area_size = ss_count * ETH_GSTRING_LEN + sizeof(u64) * ss_count;
2463
2464         rc = ena_com_allocate_debug_area(adapter->ena_dev, debug_area_size);
2465         if (rc) {
2466                 pr_err("Cannot allocate debug area\n");
2467                 return;
2468         }
2469
2470         rc = ena_com_set_host_attributes(adapter->ena_dev);
2471         if (rc) {
2472                 if (rc == -EOPNOTSUPP)
2473                         netif_warn(adapter, drv, adapter->netdev,
2474                                    "Cannot set host attributes\n");
2475                 else
2476                         netif_err(adapter, drv, adapter->netdev,
2477                                   "Cannot set host attributes\n");
2478                 goto err;
2479         }
2480
2481         return;
2482 err:
2483         ena_com_delete_debug_area(adapter->ena_dev);
2484 }
2485
2486 static void ena_get_stats64(struct net_device *netdev,
2487                             struct rtnl_link_stats64 *stats)
2488 {
2489         struct ena_adapter *adapter = netdev_priv(netdev);
2490         struct ena_ring *rx_ring, *tx_ring;
2491         unsigned int start;
2492         u64 rx_drops;
2493         int i;
2494
2495         if (!test_bit(ENA_FLAG_DEV_UP, &adapter->flags))
2496                 return;
2497
2498         for (i = 0; i < adapter->num_io_queues; i++) {
2499                 u64 bytes, packets;
2500
2501                 tx_ring = &adapter->tx_ring[i];
2502
2503                 do {
2504                         start = u64_stats_fetch_begin_irq(&tx_ring->syncp);
2505                         packets = tx_ring->tx_stats.cnt;
2506                         bytes = tx_ring->tx_stats.bytes;
2507                 } while (u64_stats_fetch_retry_irq(&tx_ring->syncp, start));
2508
2509                 stats->tx_packets += packets;
2510                 stats->tx_bytes += bytes;
2511
2512                 rx_ring = &adapter->rx_ring[i];
2513
2514                 do {
2515                         start = u64_stats_fetch_begin_irq(&rx_ring->syncp);
2516                         packets = rx_ring->rx_stats.cnt;
2517                         bytes = rx_ring->rx_stats.bytes;
2518                 } while (u64_stats_fetch_retry_irq(&rx_ring->syncp, start));
2519
2520                 stats->rx_packets += packets;
2521                 stats->rx_bytes += bytes;
2522         }
2523
2524         do {
2525                 start = u64_stats_fetch_begin_irq(&adapter->syncp);
2526                 rx_drops = adapter->dev_stats.rx_drops;
2527         } while (u64_stats_fetch_retry_irq(&adapter->syncp, start));
2528
2529         stats->rx_dropped = rx_drops;
2530
2531         stats->multicast = 0;
2532         stats->collisions = 0;
2533
2534         stats->rx_length_errors = 0;
2535         stats->rx_crc_errors = 0;
2536         stats->rx_frame_errors = 0;
2537         stats->rx_fifo_errors = 0;
2538         stats->rx_missed_errors = 0;
2539         stats->tx_window_errors = 0;
2540
2541         stats->rx_errors = 0;
2542         stats->tx_errors = 0;
2543 }
2544
2545 static const struct net_device_ops ena_netdev_ops = {
2546         .ndo_open               = ena_open,
2547         .ndo_stop               = ena_close,
2548         .ndo_start_xmit         = ena_start_xmit,
2549         .ndo_select_queue       = ena_select_queue,
2550         .ndo_get_stats64        = ena_get_stats64,
2551         .ndo_tx_timeout         = ena_tx_timeout,
2552         .ndo_change_mtu         = ena_change_mtu,
2553         .ndo_set_mac_address    = NULL,
2554         .ndo_validate_addr      = eth_validate_addr,
2555 };
2556
2557 static int ena_device_validate_params(struct ena_adapter *adapter,
2558                                       struct ena_com_dev_get_features_ctx *get_feat_ctx)
2559 {
2560         struct net_device *netdev = adapter->netdev;
2561         int rc;
2562
2563         rc = ether_addr_equal(get_feat_ctx->dev_attr.mac_addr,
2564                               adapter->mac_addr);
2565         if (!rc) {
2566                 netif_err(adapter, drv, netdev,
2567                           "Error, mac address are different\n");
2568                 return -EINVAL;
2569         }
2570
2571         if (get_feat_ctx->dev_attr.max_mtu < netdev->mtu) {
2572                 netif_err(adapter, drv, netdev,
2573                           "Error, device max mtu is smaller than netdev MTU\n");
2574                 return -EINVAL;
2575         }
2576
2577         return 0;
2578 }
2579
2580 static int ena_device_init(struct ena_com_dev *ena_dev, struct pci_dev *pdev,
2581                            struct ena_com_dev_get_features_ctx *get_feat_ctx,
2582                            bool *wd_state)
2583 {
2584         struct device *dev = &pdev->dev;
2585         bool readless_supported;
2586         u32 aenq_groups;
2587         int dma_width;
2588         int rc;
2589
2590         rc = ena_com_mmio_reg_read_request_init(ena_dev);
2591         if (rc) {
2592                 dev_err(dev, "failed to init mmio read less\n");
2593                 return rc;
2594         }
2595
2596         /* The PCIe configuration space revision id indicate if mmio reg
2597          * read is disabled
2598          */
2599         readless_supported = !(pdev->revision & ENA_MMIO_DISABLE_REG_READ);
2600         ena_com_set_mmio_read_mode(ena_dev, readless_supported);
2601
2602         rc = ena_com_dev_reset(ena_dev, ENA_REGS_RESET_NORMAL);
2603         if (rc) {
2604                 dev_err(dev, "Can not reset device\n");
2605                 goto err_mmio_read_less;
2606         }
2607
2608         rc = ena_com_validate_version(ena_dev);
2609         if (rc) {
2610                 dev_err(dev, "device version is too low\n");
2611                 goto err_mmio_read_less;
2612         }
2613
2614         dma_width = ena_com_get_dma_width(ena_dev);
2615         if (dma_width < 0) {
2616                 dev_err(dev, "Invalid dma width value %d", dma_width);
2617                 rc = dma_width;
2618                 goto err_mmio_read_less;
2619         }
2620
2621         rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(dma_width));
2622         if (rc) {
2623                 dev_err(dev, "pci_set_dma_mask failed 0x%x\n", rc);
2624                 goto err_mmio_read_less;
2625         }
2626
2627         rc = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(dma_width));
2628         if (rc) {
2629                 dev_err(dev, "err_pci_set_consistent_dma_mask failed 0x%x\n",
2630                         rc);
2631                 goto err_mmio_read_less;
2632         }
2633
2634         /* ENA admin level init */
2635         rc = ena_com_admin_init(ena_dev, &aenq_handlers);
2636         if (rc) {
2637                 dev_err(dev,
2638                         "Can not initialize ena admin queue with device\n");
2639                 goto err_mmio_read_less;
2640         }
2641
2642         /* To enable the msix interrupts the driver needs to know the number
2643          * of queues. So the driver uses polling mode to retrieve this
2644          * information
2645          */
2646         ena_com_set_admin_polling_mode(ena_dev, true);
2647
2648         ena_config_host_info(ena_dev, pdev);
2649
2650         /* Get Device Attributes*/
2651         rc = ena_com_get_dev_attr_feat(ena_dev, get_feat_ctx);
2652         if (rc) {
2653                 dev_err(dev, "Cannot get attribute for ena device rc=%d\n", rc);
2654                 goto err_admin_init;
2655         }
2656
2657         /* Try to turn all the available aenq groups */
2658         aenq_groups = BIT(ENA_ADMIN_LINK_CHANGE) |
2659                 BIT(ENA_ADMIN_FATAL_ERROR) |
2660                 BIT(ENA_ADMIN_WARNING) |
2661                 BIT(ENA_ADMIN_NOTIFICATION) |
2662                 BIT(ENA_ADMIN_KEEP_ALIVE);
2663
2664         aenq_groups &= get_feat_ctx->aenq.supported_groups;
2665
2666         rc = ena_com_set_aenq_config(ena_dev, aenq_groups);
2667         if (rc) {
2668                 dev_err(dev, "Cannot configure aenq groups rc= %d\n", rc);
2669                 goto err_admin_init;
2670         }
2671
2672         *wd_state = !!(aenq_groups & BIT(ENA_ADMIN_KEEP_ALIVE));
2673
2674         return 0;
2675
2676 err_admin_init:
2677         ena_com_delete_host_info(ena_dev);
2678         ena_com_admin_destroy(ena_dev);
2679 err_mmio_read_less:
2680         ena_com_mmio_reg_read_request_destroy(ena_dev);
2681
2682         return rc;
2683 }
2684
2685 static int ena_enable_msix_and_set_admin_interrupts(struct ena_adapter *adapter,
2686                                                     int io_vectors)
2687 {
2688         struct ena_com_dev *ena_dev = adapter->ena_dev;
2689         struct device *dev = &adapter->pdev->dev;
2690         int rc;
2691
2692         rc = ena_enable_msix(adapter, io_vectors);
2693         if (rc) {
2694                 dev_err(dev, "Can not reserve msix vectors\n");
2695                 return rc;
2696         }
2697
2698         ena_setup_mgmnt_intr(adapter);
2699
2700         rc = ena_request_mgmnt_irq(adapter);
2701         if (rc) {
2702                 dev_err(dev, "Can not setup management interrupts\n");
2703                 goto err_disable_msix;
2704         }
2705
2706         ena_com_set_admin_polling_mode(ena_dev, false);
2707
2708         ena_com_admin_aenq_enable(ena_dev);
2709
2710         return 0;
2711
2712 err_disable_msix:
2713         ena_disable_msix(adapter);
2714
2715         return rc;
2716 }
2717
2718 static void ena_destroy_device(struct ena_adapter *adapter, bool graceful)
2719 {
2720         struct net_device *netdev = adapter->netdev;
2721         struct ena_com_dev *ena_dev = adapter->ena_dev;
2722         bool dev_up;
2723
2724         if (!test_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags))
2725                 return;
2726
2727         netif_carrier_off(netdev);
2728
2729         del_timer_sync(&adapter->timer_service);
2730
2731         dev_up = test_bit(ENA_FLAG_DEV_UP, &adapter->flags);
2732         adapter->dev_up_before_reset = dev_up;
2733         if (!graceful)
2734                 ena_com_set_admin_running_state(ena_dev, false);
2735
2736         if (test_bit(ENA_FLAG_DEV_UP, &adapter->flags))
2737                 ena_down(adapter);
2738
2739         /* Stop the device from sending AENQ events (in case reset flag is set
2740          *  and device is up, ena_down() already reset the device.
2741          */
2742         if (!(test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags) && dev_up))
2743                 ena_com_dev_reset(adapter->ena_dev, adapter->reset_reason);
2744
2745         ena_free_mgmnt_irq(adapter);
2746
2747         ena_disable_msix(adapter);
2748
2749         ena_com_abort_admin_commands(ena_dev);
2750
2751         ena_com_wait_for_abort_completion(ena_dev);
2752
2753         ena_com_admin_destroy(ena_dev);
2754
2755         ena_com_mmio_reg_read_request_destroy(ena_dev);
2756
2757         adapter->reset_reason = ENA_REGS_RESET_NORMAL;
2758
2759         clear_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags);
2760         clear_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags);
2761 }
2762
2763 static int ena_restore_device(struct ena_adapter *adapter)
2764 {
2765         struct ena_com_dev_get_features_ctx get_feat_ctx;
2766         struct ena_com_dev *ena_dev = adapter->ena_dev;
2767         struct pci_dev *pdev = adapter->pdev;
2768         bool wd_state;
2769         int rc;
2770
2771         set_bit(ENA_FLAG_ONGOING_RESET, &adapter->flags);
2772         rc = ena_device_init(ena_dev, adapter->pdev, &get_feat_ctx, &wd_state);
2773         if (rc) {
2774                 dev_err(&pdev->dev, "Can not initialize device\n");
2775                 goto err;
2776         }
2777         adapter->wd_state = wd_state;
2778
2779         rc = ena_device_validate_params(adapter, &get_feat_ctx);
2780         if (rc) {
2781                 dev_err(&pdev->dev, "Validation of device parameters failed\n");
2782                 goto err_device_destroy;
2783         }
2784
2785         rc = ena_enable_msix_and_set_admin_interrupts(adapter,
2786                                                       adapter->num_io_queues);
2787         if (rc) {
2788                 dev_err(&pdev->dev, "Enable MSI-X failed\n");
2789                 goto err_device_destroy;
2790         }
2791         /* If the interface was up before the reset bring it up */
2792         if (adapter->dev_up_before_reset) {
2793                 rc = ena_up(adapter);
2794                 if (rc) {
2795                         dev_err(&pdev->dev, "Failed to create I/O queues\n");
2796                         goto err_disable_msix;
2797                 }
2798         }
2799
2800         set_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags);
2801
2802         clear_bit(ENA_FLAG_ONGOING_RESET, &adapter->flags);
2803         if (test_bit(ENA_FLAG_LINK_UP, &adapter->flags))
2804                 netif_carrier_on(adapter->netdev);
2805
2806         mod_timer(&adapter->timer_service, round_jiffies(jiffies + HZ));
2807         dev_err(&pdev->dev,
2808                 "Device reset completed successfully, Driver info: %s\n",
2809                 version);
2810
2811         return rc;
2812 err_disable_msix:
2813         ena_free_mgmnt_irq(adapter);
2814         ena_disable_msix(adapter);
2815 err_device_destroy:
2816         ena_com_abort_admin_commands(ena_dev);
2817         ena_com_wait_for_abort_completion(ena_dev);
2818         ena_com_admin_destroy(ena_dev);
2819         ena_com_dev_reset(ena_dev, ENA_REGS_RESET_DRIVER_INVALID_STATE);
2820         ena_com_mmio_reg_read_request_destroy(ena_dev);
2821 err:
2822         clear_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags);
2823         clear_bit(ENA_FLAG_ONGOING_RESET, &adapter->flags);
2824         dev_err(&pdev->dev,
2825                 "Reset attempt failed. Can not reset the device\n");
2826
2827         return rc;
2828 }
2829
2830 static void ena_fw_reset_device(struct work_struct *work)
2831 {
2832         struct ena_adapter *adapter =
2833                 container_of(work, struct ena_adapter, reset_task);
2834         struct pci_dev *pdev = adapter->pdev;
2835
2836         if (unlikely(!test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags))) {
2837                 dev_err(&pdev->dev,
2838                         "device reset schedule while reset bit is off\n");
2839                 return;
2840         }
2841         rtnl_lock();
2842         ena_destroy_device(adapter, false);
2843         ena_restore_device(adapter);
2844         rtnl_unlock();
2845 }
2846
2847 static int check_for_rx_interrupt_queue(struct ena_adapter *adapter,
2848                                         struct ena_ring *rx_ring)
2849 {
2850         if (likely(rx_ring->first_interrupt))
2851                 return 0;
2852
2853         if (ena_com_cq_empty(rx_ring->ena_com_io_cq))
2854                 return 0;
2855
2856         rx_ring->no_interrupt_event_cnt++;
2857
2858         if (rx_ring->no_interrupt_event_cnt == ENA_MAX_NO_INTERRUPT_ITERATIONS) {
2859                 netif_err(adapter, rx_err, adapter->netdev,
2860                           "Potential MSIX issue on Rx side Queue = %d. Reset the device\n",
2861                           rx_ring->qid);
2862                 adapter->reset_reason = ENA_REGS_RESET_MISS_INTERRUPT;
2863                 smp_mb__before_atomic();
2864                 set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags);
2865                 return -EIO;
2866         }
2867
2868         return 0;
2869 }
2870
2871 static int check_missing_comp_in_tx_queue(struct ena_adapter *adapter,
2872                                           struct ena_ring *tx_ring)
2873 {
2874         struct ena_tx_buffer *tx_buf;
2875         unsigned long last_jiffies;
2876         u32 missed_tx = 0;
2877         int i, rc = 0;
2878
2879         for (i = 0; i < tx_ring->ring_size; i++) {
2880                 tx_buf = &tx_ring->tx_buffer_info[i];
2881                 last_jiffies = tx_buf->last_jiffies;
2882
2883                 if (last_jiffies == 0)
2884                         /* no pending Tx at this location */
2885                         continue;
2886
2887                 if (unlikely(!tx_ring->first_interrupt && time_is_before_jiffies(last_jiffies +
2888                              2 * adapter->missing_tx_completion_to))) {
2889                         /* If after graceful period interrupt is still not
2890                          * received, we schedule a reset
2891                          */
2892                         netif_err(adapter, tx_err, adapter->netdev,
2893                                   "Potential MSIX issue on Tx side Queue = %d. Reset the device\n",
2894                                   tx_ring->qid);
2895                         adapter->reset_reason = ENA_REGS_RESET_MISS_INTERRUPT;
2896                         smp_mb__before_atomic();
2897                         set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags);
2898                         return -EIO;
2899                 }
2900
2901                 if (unlikely(time_is_before_jiffies(last_jiffies +
2902                                 adapter->missing_tx_completion_to))) {
2903                         if (!tx_buf->print_once)
2904                                 netif_notice(adapter, tx_err, adapter->netdev,
2905                                              "Found a Tx that wasn't completed on time, qid %d, index %d.\n",
2906                                              tx_ring->qid, i);
2907
2908                         tx_buf->print_once = 1;
2909                         missed_tx++;
2910                 }
2911         }
2912
2913         if (unlikely(missed_tx > adapter->missing_tx_completion_threshold)) {
2914                 netif_err(adapter, tx_err, adapter->netdev,
2915                           "The number of lost tx completions is above the threshold (%d > %d). Reset the device\n",
2916                           missed_tx,
2917                           adapter->missing_tx_completion_threshold);
2918                 adapter->reset_reason =
2919                         ENA_REGS_RESET_MISS_TX_CMPL;
2920                 set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags);
2921                 rc = -EIO;
2922         }
2923
2924         u64_stats_update_begin(&tx_ring->syncp);
2925         tx_ring->tx_stats.missed_tx = missed_tx;
2926         u64_stats_update_end(&tx_ring->syncp);
2927
2928         return rc;
2929 }
2930
2931 static void check_for_missing_completions(struct ena_adapter *adapter)
2932 {
2933         struct ena_ring *tx_ring;
2934         struct ena_ring *rx_ring;
2935         int i, budget, rc;
2936
2937         /* Make sure the driver doesn't turn the device in other process */
2938         smp_rmb();
2939
2940         if (!test_bit(ENA_FLAG_DEV_UP, &adapter->flags))
2941                 return;
2942
2943         if (test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags))
2944                 return;
2945
2946         if (adapter->missing_tx_completion_to == ENA_HW_HINTS_NO_TIMEOUT)
2947                 return;
2948
2949         budget = ENA_MONITORED_TX_QUEUES;
2950
2951         for (i = adapter->last_monitored_tx_qid; i < adapter->num_io_queues; i++) {
2952                 tx_ring = &adapter->tx_ring[i];
2953                 rx_ring = &adapter->rx_ring[i];
2954
2955                 rc = check_missing_comp_in_tx_queue(adapter, tx_ring);
2956                 if (unlikely(rc))
2957                         return;
2958
2959                 rc = check_for_rx_interrupt_queue(adapter, rx_ring);
2960                 if (unlikely(rc))
2961                         return;
2962
2963                 budget--;
2964                 if (!budget)
2965                         break;
2966         }
2967
2968         adapter->last_monitored_tx_qid = i % adapter->num_io_queues;
2969 }
2970
2971 /* trigger napi schedule after 2 consecutive detections */
2972 #define EMPTY_RX_REFILL 2
2973 /* For the rare case where the device runs out of Rx descriptors and the
2974  * napi handler failed to refill new Rx descriptors (due to a lack of memory
2975  * for example).
2976  * This case will lead to a deadlock:
2977  * The device won't send interrupts since all the new Rx packets will be dropped
2978  * The napi handler won't allocate new Rx descriptors so the device will be
2979  * able to send new packets.
2980  *
2981  * This scenario can happen when the kernel's vm.min_free_kbytes is too small.
2982  * It is recommended to have at least 512MB, with a minimum of 128MB for
2983  * constrained environment).
2984  *
2985  * When such a situation is detected - Reschedule napi
2986  */
2987 static void check_for_empty_rx_ring(struct ena_adapter *adapter)
2988 {
2989         struct ena_ring *rx_ring;
2990         int i, refill_required;
2991
2992         if (!test_bit(ENA_FLAG_DEV_UP, &adapter->flags))
2993                 return;
2994
2995         if (test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags))
2996                 return;
2997
2998         for (i = 0; i < adapter->num_io_queues; i++) {
2999                 rx_ring = &adapter->rx_ring[i];
3000
3001                 refill_required =
3002                         ena_com_free_desc(rx_ring->ena_com_io_sq);
3003                 if (unlikely(refill_required == (rx_ring->ring_size - 1))) {
3004                         rx_ring->empty_rx_queue++;
3005
3006                         if (rx_ring->empty_rx_queue >= EMPTY_RX_REFILL) {
3007                                 u64_stats_update_begin(&rx_ring->syncp);
3008                                 rx_ring->rx_stats.empty_rx_ring++;
3009                                 u64_stats_update_end(&rx_ring->syncp);
3010
3011                                 netif_err(adapter, drv, adapter->netdev,
3012                                           "trigger refill for ring %d\n", i);
3013
3014                                 napi_schedule(rx_ring->napi);
3015                                 rx_ring->empty_rx_queue = 0;
3016                         }
3017                 } else {
3018                         rx_ring->empty_rx_queue = 0;
3019                 }
3020         }
3021 }
3022
3023 /* Check for keep alive expiration */
3024 static void check_for_missing_keep_alive(struct ena_adapter *adapter)
3025 {
3026         unsigned long keep_alive_expired;
3027
3028         if (!adapter->wd_state)
3029                 return;
3030
3031         if (adapter->keep_alive_timeout == ENA_HW_HINTS_NO_TIMEOUT)
3032                 return;
3033
3034         keep_alive_expired = round_jiffies(adapter->last_keep_alive_jiffies +
3035                                            adapter->keep_alive_timeout);
3036         if (unlikely(time_is_before_jiffies(keep_alive_expired))) {
3037                 netif_err(adapter, drv, adapter->netdev,
3038                           "Keep alive watchdog timeout.\n");
3039                 u64_stats_update_begin(&adapter->syncp);
3040                 adapter->dev_stats.wd_expired++;
3041                 u64_stats_update_end(&adapter->syncp);
3042                 adapter->reset_reason = ENA_REGS_RESET_KEEP_ALIVE_TO;
3043                 set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags);
3044         }
3045 }
3046
3047 static void check_for_admin_com_state(struct ena_adapter *adapter)
3048 {
3049         if (unlikely(!ena_com_get_admin_running_state(adapter->ena_dev))) {
3050                 netif_err(adapter, drv, adapter->netdev,
3051                           "ENA admin queue is not in running state!\n");
3052                 u64_stats_update_begin(&adapter->syncp);
3053                 adapter->dev_stats.admin_q_pause++;
3054                 u64_stats_update_end(&adapter->syncp);
3055                 adapter->reset_reason = ENA_REGS_RESET_ADMIN_TO;
3056                 set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags);
3057         }
3058 }
3059
3060 static void ena_update_hints(struct ena_adapter *adapter,
3061                              struct ena_admin_ena_hw_hints *hints)
3062 {
3063         struct net_device *netdev = adapter->netdev;
3064
3065         if (hints->admin_completion_tx_timeout)
3066                 adapter->ena_dev->admin_queue.completion_timeout =
3067                         hints->admin_completion_tx_timeout * 1000;
3068
3069         if (hints->mmio_read_timeout)
3070                 /* convert to usec */
3071                 adapter->ena_dev->mmio_read.reg_read_to =
3072                         hints->mmio_read_timeout * 1000;
3073
3074         if (hints->missed_tx_completion_count_threshold_to_reset)
3075                 adapter->missing_tx_completion_threshold =
3076                         hints->missed_tx_completion_count_threshold_to_reset;
3077
3078         if (hints->missing_tx_completion_timeout) {
3079                 if (hints->missing_tx_completion_timeout == ENA_HW_HINTS_NO_TIMEOUT)
3080                         adapter->missing_tx_completion_to = ENA_HW_HINTS_NO_TIMEOUT;
3081                 else
3082                         adapter->missing_tx_completion_to =
3083                                 msecs_to_jiffies(hints->missing_tx_completion_timeout);
3084         }
3085
3086         if (hints->netdev_wd_timeout)
3087                 netdev->watchdog_timeo = msecs_to_jiffies(hints->netdev_wd_timeout);
3088
3089         if (hints->driver_watchdog_timeout) {
3090                 if (hints->driver_watchdog_timeout == ENA_HW_HINTS_NO_TIMEOUT)
3091                         adapter->keep_alive_timeout = ENA_HW_HINTS_NO_TIMEOUT;
3092                 else
3093                         adapter->keep_alive_timeout =
3094                                 msecs_to_jiffies(hints->driver_watchdog_timeout);
3095         }
3096 }
3097
3098 static void ena_update_host_info(struct ena_admin_host_info *host_info,
3099                                  struct net_device *netdev)
3100 {
3101         host_info->supported_network_features[0] =
3102                 netdev->features & GENMASK_ULL(31, 0);
3103         host_info->supported_network_features[1] =
3104                 (netdev->features & GENMASK_ULL(63, 32)) >> 32;
3105 }
3106
3107 static void ena_timer_service(struct timer_list *t)
3108 {
3109         struct ena_adapter *adapter = from_timer(adapter, t, timer_service);
3110         u8 *debug_area = adapter->ena_dev->host_attr.debug_area_virt_addr;
3111         struct ena_admin_host_info *host_info =
3112                 adapter->ena_dev->host_attr.host_info;
3113
3114         check_for_missing_keep_alive(adapter);
3115
3116         check_for_admin_com_state(adapter);
3117
3118         check_for_missing_completions(adapter);
3119
3120         check_for_empty_rx_ring(adapter);
3121
3122         if (debug_area)
3123                 ena_dump_stats_to_buf(adapter, debug_area);
3124
3125         if (host_info)
3126                 ena_update_host_info(host_info, adapter->netdev);
3127
3128         if (unlikely(test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags))) {
3129                 netif_err(adapter, drv, adapter->netdev,
3130                           "Trigger reset is on\n");
3131                 ena_dump_stats_to_dmesg(adapter);
3132                 queue_work(ena_wq, &adapter->reset_task);
3133                 return;
3134         }
3135
3136         /* Reset the timer */
3137         mod_timer(&adapter->timer_service, jiffies + HZ);
3138 }
3139
3140 static int ena_calc_io_queue_num(struct pci_dev *pdev,
3141                                  struct ena_com_dev *ena_dev,
3142                                  struct ena_com_dev_get_features_ctx *get_feat_ctx)
3143 {
3144         int io_tx_sq_num, io_tx_cq_num, io_rx_num, io_queue_num;
3145
3146         if (ena_dev->supported_features & BIT(ENA_ADMIN_MAX_QUEUES_EXT)) {
3147                 struct ena_admin_queue_ext_feature_fields *max_queue_ext =
3148                         &get_feat_ctx->max_queue_ext.max_queue_ext;
3149                 io_rx_num = min_t(int, max_queue_ext->max_rx_sq_num,
3150                                   max_queue_ext->max_rx_cq_num);
3151
3152                 io_tx_sq_num = max_queue_ext->max_tx_sq_num;
3153                 io_tx_cq_num = max_queue_ext->max_tx_cq_num;
3154         } else {
3155                 struct ena_admin_queue_feature_desc *max_queues =
3156                         &get_feat_ctx->max_queues;
3157                 io_tx_sq_num = max_queues->max_sq_num;
3158                 io_tx_cq_num = max_queues->max_cq_num;
3159                 io_rx_num = min_t(int, io_tx_sq_num, io_tx_cq_num);
3160         }
3161
3162         /* In case of LLQ use the llq fields for the tx SQ/CQ */
3163         if (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV)
3164                 io_tx_sq_num = get_feat_ctx->llq.max_llq_num;
3165
3166         io_queue_num = min_t(int, num_online_cpus(), ENA_MAX_NUM_IO_QUEUES);
3167         io_queue_num = min_t(int, io_queue_num, io_rx_num);
3168         io_queue_num = min_t(int, io_queue_num, io_tx_sq_num);
3169         io_queue_num = min_t(int, io_queue_num, io_tx_cq_num);
3170         /* 1 IRQ for for mgmnt and 1 IRQs for each IO direction */
3171         io_queue_num = min_t(int, io_queue_num, pci_msix_vec_count(pdev) - 1);
3172         if (unlikely(!io_queue_num)) {
3173                 dev_err(&pdev->dev, "The device doesn't have io queues\n");
3174                 return -EFAULT;
3175         }
3176
3177         return io_queue_num;
3178 }
3179
3180 static int ena_set_queues_placement_policy(struct pci_dev *pdev,
3181                                            struct ena_com_dev *ena_dev,
3182                                            struct ena_admin_feature_llq_desc *llq,
3183                                            struct ena_llq_configurations *llq_default_configurations)
3184 {
3185         bool has_mem_bar;
3186         int rc;
3187         u32 llq_feature_mask;
3188
3189         llq_feature_mask = 1 << ENA_ADMIN_LLQ;
3190         if (!(ena_dev->supported_features & llq_feature_mask)) {
3191                 dev_err(&pdev->dev,
3192                         "LLQ is not supported Fallback to host mode policy.\n");
3193                 ena_dev->tx_mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_HOST;
3194                 return 0;
3195         }
3196
3197         has_mem_bar = pci_select_bars(pdev, IORESOURCE_MEM) & BIT(ENA_MEM_BAR);
3198
3199         rc = ena_com_config_dev_mode(ena_dev, llq, llq_default_configurations);
3200         if (unlikely(rc)) {
3201                 dev_err(&pdev->dev,
3202                         "Failed to configure the device mode.  Fallback to host mode policy.\n");
3203                 ena_dev->tx_mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_HOST;
3204                 return 0;
3205         }
3206
3207         /* Nothing to config, exit */
3208         if (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_HOST)
3209                 return 0;
3210
3211         if (!has_mem_bar) {
3212                 dev_err(&pdev->dev,
3213                         "ENA device does not expose LLQ bar. Fallback to host mode policy.\n");
3214                 ena_dev->tx_mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_HOST;
3215                 return 0;
3216         }
3217
3218         ena_dev->mem_bar = devm_ioremap_wc(&pdev->dev,
3219                                            pci_resource_start(pdev, ENA_MEM_BAR),
3220                                            pci_resource_len(pdev, ENA_MEM_BAR));
3221
3222         if (!ena_dev->mem_bar)
3223                 return -EFAULT;
3224
3225         return 0;
3226 }
3227
3228 static void ena_set_dev_offloads(struct ena_com_dev_get_features_ctx *feat,
3229                                  struct net_device *netdev)
3230 {
3231         netdev_features_t dev_features = 0;
3232
3233         /* Set offload features */
3234         if (feat->offload.tx &
3235                 ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L4_IPV4_CSUM_PART_MASK)
3236                 dev_features |= NETIF_F_IP_CSUM;
3237
3238         if (feat->offload.tx &
3239                 ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L4_IPV6_CSUM_PART_MASK)
3240                 dev_features |= NETIF_F_IPV6_CSUM;
3241
3242         if (feat->offload.tx & ENA_ADMIN_FEATURE_OFFLOAD_DESC_TSO_IPV4_MASK)
3243                 dev_features |= NETIF_F_TSO;
3244
3245         if (feat->offload.tx & ENA_ADMIN_FEATURE_OFFLOAD_DESC_TSO_IPV6_MASK)
3246                 dev_features |= NETIF_F_TSO6;
3247
3248         if (feat->offload.tx & ENA_ADMIN_FEATURE_OFFLOAD_DESC_TSO_ECN_MASK)
3249                 dev_features |= NETIF_F_TSO_ECN;
3250
3251         if (feat->offload.rx_supported &
3252                 ENA_ADMIN_FEATURE_OFFLOAD_DESC_RX_L4_IPV4_CSUM_MASK)
3253                 dev_features |= NETIF_F_RXCSUM;
3254
3255         if (feat->offload.rx_supported &
3256                 ENA_ADMIN_FEATURE_OFFLOAD_DESC_RX_L4_IPV6_CSUM_MASK)
3257                 dev_features |= NETIF_F_RXCSUM;
3258
3259         netdev->features =
3260                 dev_features |
3261                 NETIF_F_SG |
3262                 NETIF_F_RXHASH |
3263                 NETIF_F_HIGHDMA;
3264
3265         netdev->hw_features |= netdev->features;
3266         netdev->vlan_features |= netdev->features;
3267 }
3268
3269 static void ena_set_conf_feat_params(struct ena_adapter *adapter,
3270                                      struct ena_com_dev_get_features_ctx *feat)
3271 {
3272         struct net_device *netdev = adapter->netdev;
3273
3274         /* Copy mac address */
3275         if (!is_valid_ether_addr(feat->dev_attr.mac_addr)) {
3276                 eth_hw_addr_random(netdev);
3277                 ether_addr_copy(adapter->mac_addr, netdev->dev_addr);
3278         } else {
3279                 ether_addr_copy(adapter->mac_addr, feat->dev_attr.mac_addr);
3280                 ether_addr_copy(netdev->dev_addr, adapter->mac_addr);
3281         }
3282
3283         /* Set offload features */
3284         ena_set_dev_offloads(feat, netdev);
3285
3286         adapter->max_mtu = feat->dev_attr.max_mtu;
3287         netdev->max_mtu = adapter->max_mtu;
3288         netdev->min_mtu = ENA_MIN_MTU;
3289 }
3290
3291 static int ena_rss_init_default(struct ena_adapter *adapter)
3292 {
3293         struct ena_com_dev *ena_dev = adapter->ena_dev;
3294         struct device *dev = &adapter->pdev->dev;
3295         int rc, i;
3296         u32 val;
3297
3298         rc = ena_com_rss_init(ena_dev, ENA_RX_RSS_TABLE_LOG_SIZE);
3299         if (unlikely(rc)) {
3300                 dev_err(dev, "Cannot init indirect table\n");
3301                 goto err_rss_init;
3302         }
3303
3304         for (i = 0; i < ENA_RX_RSS_TABLE_SIZE; i++) {
3305                 val = ethtool_rxfh_indir_default(i, adapter->num_io_queues);
3306                 rc = ena_com_indirect_table_fill_entry(ena_dev, i,
3307                                                        ENA_IO_RXQ_IDX(val));
3308                 if (unlikely(rc && (rc != -EOPNOTSUPP))) {
3309                         dev_err(dev, "Cannot fill indirect table\n");
3310                         goto err_fill_indir;
3311                 }
3312         }
3313
3314         rc = ena_com_fill_hash_function(ena_dev, ENA_ADMIN_CRC32, NULL,
3315                                         ENA_HASH_KEY_SIZE, 0xFFFFFFFF);
3316         if (unlikely(rc && (rc != -EOPNOTSUPP))) {
3317                 dev_err(dev, "Cannot fill hash function\n");
3318                 goto err_fill_indir;
3319         }
3320
3321         rc = ena_com_set_default_hash_ctrl(ena_dev);
3322         if (unlikely(rc && (rc != -EOPNOTSUPP))) {
3323                 dev_err(dev, "Cannot fill hash control\n");
3324                 goto err_fill_indir;
3325         }
3326
3327         return 0;
3328
3329 err_fill_indir:
3330         ena_com_rss_destroy(ena_dev);
3331 err_rss_init:
3332
3333         return rc;
3334 }
3335
3336 static void ena_release_bars(struct ena_com_dev *ena_dev, struct pci_dev *pdev)
3337 {
3338         int release_bars = pci_select_bars(pdev, IORESOURCE_MEM) & ENA_BAR_MASK;
3339
3340         pci_release_selected_regions(pdev, release_bars);
3341 }
3342
3343 static void set_default_llq_configurations(struct ena_llq_configurations *llq_config)
3344 {
3345         llq_config->llq_header_location = ENA_ADMIN_INLINE_HEADER;
3346         llq_config->llq_ring_entry_size = ENA_ADMIN_LIST_ENTRY_SIZE_128B;
3347         llq_config->llq_stride_ctrl = ENA_ADMIN_MULTIPLE_DESCS_PER_ENTRY;
3348         llq_config->llq_num_decs_before_header = ENA_ADMIN_LLQ_NUM_DESCS_BEFORE_HEADER_2;
3349         llq_config->llq_ring_entry_size_value = 128;
3350 }
3351
3352 static int ena_calc_queue_size(struct ena_calc_queue_size_ctx *ctx)
3353 {
3354         struct ena_admin_feature_llq_desc *llq = &ctx->get_feat_ctx->llq;
3355         struct ena_com_dev *ena_dev = ctx->ena_dev;
3356         u32 tx_queue_size = ENA_DEFAULT_RING_SIZE;
3357         u32 rx_queue_size = ENA_DEFAULT_RING_SIZE;
3358         u32 max_tx_queue_size;
3359         u32 max_rx_queue_size;
3360
3361         if (ctx->ena_dev->supported_features & BIT(ENA_ADMIN_MAX_QUEUES_EXT)) {
3362                 struct ena_admin_queue_ext_feature_fields *max_queue_ext =
3363                         &ctx->get_feat_ctx->max_queue_ext.max_queue_ext;
3364                 max_rx_queue_size = min_t(u32, max_queue_ext->max_rx_cq_depth,
3365                                           max_queue_ext->max_rx_sq_depth);
3366                 max_tx_queue_size = max_queue_ext->max_tx_cq_depth;
3367
3368                 if (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV)
3369                         max_tx_queue_size = min_t(u32, max_tx_queue_size,
3370                                                   llq->max_llq_depth);
3371                 else
3372                         max_tx_queue_size = min_t(u32, max_tx_queue_size,
3373                                                   max_queue_ext->max_tx_sq_depth);
3374
3375                 ctx->max_tx_sgl_size = min_t(u16, ENA_PKT_MAX_BUFS,
3376                                              max_queue_ext->max_per_packet_tx_descs);
3377                 ctx->max_rx_sgl_size = min_t(u16, ENA_PKT_MAX_BUFS,
3378                                              max_queue_ext->max_per_packet_rx_descs);
3379         } else {
3380                 struct ena_admin_queue_feature_desc *max_queues =
3381                         &ctx->get_feat_ctx->max_queues;
3382                 max_rx_queue_size = min_t(u32, max_queues->max_cq_depth,
3383                                           max_queues->max_sq_depth);
3384                 max_tx_queue_size = max_queues->max_cq_depth;
3385
3386                 if (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV)
3387                         max_tx_queue_size = min_t(u32, max_tx_queue_size,
3388                                                   llq->max_llq_depth);
3389                 else
3390                         max_tx_queue_size = min_t(u32, max_tx_queue_size,
3391                                                   max_queues->max_sq_depth);
3392
3393                 ctx->max_tx_sgl_size = min_t(u16, ENA_PKT_MAX_BUFS,
3394                                              max_queues->max_packet_tx_descs);
3395                 ctx->max_rx_sgl_size = min_t(u16, ENA_PKT_MAX_BUFS,
3396                                              max_queues->max_packet_rx_descs);
3397         }
3398
3399         max_tx_queue_size = rounddown_pow_of_two(max_tx_queue_size);
3400         max_rx_queue_size = rounddown_pow_of_two(max_rx_queue_size);
3401
3402         tx_queue_size = clamp_val(tx_queue_size, ENA_MIN_RING_SIZE,
3403                                   max_tx_queue_size);
3404         rx_queue_size = clamp_val(rx_queue_size, ENA_MIN_RING_SIZE,
3405                                   max_rx_queue_size);
3406
3407         tx_queue_size = rounddown_pow_of_two(tx_queue_size);
3408         rx_queue_size = rounddown_pow_of_two(rx_queue_size);
3409
3410         ctx->max_tx_queue_size = max_tx_queue_size;
3411         ctx->max_rx_queue_size = max_rx_queue_size;
3412         ctx->tx_queue_size = tx_queue_size;
3413         ctx->rx_queue_size = rx_queue_size;
3414
3415         return 0;
3416 }
3417
3418 /* ena_probe - Device Initialization Routine
3419  * @pdev: PCI device information struct
3420  * @ent: entry in ena_pci_tbl
3421  *
3422  * Returns 0 on success, negative on failure
3423  *
3424  * ena_probe initializes an adapter identified by a pci_dev structure.
3425  * The OS initialization, configuring of the adapter private structure,
3426  * and a hardware reset occur.
3427  */
3428 static int ena_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
3429 {
3430         struct ena_com_dev_get_features_ctx get_feat_ctx;
3431         struct ena_calc_queue_size_ctx calc_queue_ctx = { 0 };
3432         struct ena_llq_configurations llq_config;
3433         struct ena_com_dev *ena_dev = NULL;
3434         struct ena_adapter *adapter;
3435         int io_queue_num, bars, rc;
3436         struct net_device *netdev;
3437         static int adapters_found;
3438         char *queue_type_str;
3439         bool wd_state;
3440
3441         dev_dbg(&pdev->dev, "%s\n", __func__);
3442
3443         dev_info_once(&pdev->dev, "%s", version);
3444
3445         rc = pci_enable_device_mem(pdev);
3446         if (rc) {
3447                 dev_err(&pdev->dev, "pci_enable_device_mem() failed!\n");
3448                 return rc;
3449         }
3450
3451         pci_set_master(pdev);
3452
3453         ena_dev = vzalloc(sizeof(*ena_dev));
3454         if (!ena_dev) {
3455                 rc = -ENOMEM;
3456                 goto err_disable_device;
3457         }
3458
3459         bars = pci_select_bars(pdev, IORESOURCE_MEM) & ENA_BAR_MASK;
3460         rc = pci_request_selected_regions(pdev, bars, DRV_MODULE_NAME);
3461         if (rc) {
3462                 dev_err(&pdev->dev, "pci_request_selected_regions failed %d\n",
3463                         rc);
3464                 goto err_free_ena_dev;
3465         }
3466
3467         ena_dev->reg_bar = devm_ioremap(&pdev->dev,
3468                                         pci_resource_start(pdev, ENA_REG_BAR),
3469                                         pci_resource_len(pdev, ENA_REG_BAR));
3470         if (!ena_dev->reg_bar) {
3471                 dev_err(&pdev->dev, "failed to remap regs bar\n");
3472                 rc = -EFAULT;
3473                 goto err_free_region;
3474         }
3475
3476         ena_dev->dmadev = &pdev->dev;
3477
3478         rc = ena_device_init(ena_dev, pdev, &get_feat_ctx, &wd_state);
3479         if (rc) {
3480                 dev_err(&pdev->dev, "ena device init failed\n");
3481                 if (rc == -ETIME)
3482                         rc = -EPROBE_DEFER;
3483                 goto err_free_region;
3484         }
3485
3486         set_default_llq_configurations(&llq_config);
3487
3488         rc = ena_set_queues_placement_policy(pdev, ena_dev, &get_feat_ctx.llq,
3489                                              &llq_config);
3490         if (rc) {
3491                 dev_err(&pdev->dev, "ena device init failed\n");
3492                 goto err_device_destroy;
3493         }
3494
3495         calc_queue_ctx.ena_dev = ena_dev;
3496         calc_queue_ctx.get_feat_ctx = &get_feat_ctx;
3497         calc_queue_ctx.pdev = pdev;
3498
3499         /* Initial Tx and RX interrupt delay. Assumes 1 usec granularity.
3500         * Updated during device initialization with the real granularity
3501         */
3502         ena_dev->intr_moder_tx_interval = ENA_INTR_INITIAL_TX_INTERVAL_USECS;
3503         ena_dev->intr_moder_rx_interval = ENA_INTR_INITIAL_RX_INTERVAL_USECS;
3504         ena_dev->intr_delay_resolution = ENA_DEFAULT_INTR_DELAY_RESOLUTION;
3505         io_queue_num = ena_calc_io_queue_num(pdev, ena_dev, &get_feat_ctx);
3506         rc = ena_calc_queue_size(&calc_queue_ctx);
3507         if (rc || io_queue_num <= 0) {
3508                 rc = -EFAULT;
3509                 goto err_device_destroy;
3510         }
3511
3512         dev_info(&pdev->dev, "creating %d io queues. rx queue size: %d tx queue size. %d LLQ is %s\n",
3513                  io_queue_num,
3514                  calc_queue_ctx.rx_queue_size,
3515                  calc_queue_ctx.tx_queue_size,
3516                  (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV) ?
3517                  "ENABLED" : "DISABLED");
3518
3519         /* dev zeroed in init_etherdev */
3520         netdev = alloc_etherdev_mq(sizeof(struct ena_adapter), io_queue_num);
3521         if (!netdev) {
3522                 dev_err(&pdev->dev, "alloc_etherdev_mq failed\n");
3523                 rc = -ENOMEM;
3524                 goto err_device_destroy;
3525         }
3526
3527         SET_NETDEV_DEV(netdev, &pdev->dev);
3528
3529         adapter = netdev_priv(netdev);
3530         pci_set_drvdata(pdev, adapter);
3531
3532         adapter->ena_dev = ena_dev;
3533         adapter->netdev = netdev;
3534         adapter->pdev = pdev;
3535
3536         ena_set_conf_feat_params(adapter, &get_feat_ctx);
3537
3538         adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
3539         adapter->reset_reason = ENA_REGS_RESET_NORMAL;
3540
3541         adapter->requested_tx_ring_size = calc_queue_ctx.tx_queue_size;
3542         adapter->requested_rx_ring_size = calc_queue_ctx.rx_queue_size;
3543         adapter->max_tx_ring_size = calc_queue_ctx.max_tx_queue_size;
3544         adapter->max_rx_ring_size = calc_queue_ctx.max_rx_queue_size;
3545         adapter->max_tx_sgl_size = calc_queue_ctx.max_tx_sgl_size;
3546         adapter->max_rx_sgl_size = calc_queue_ctx.max_rx_sgl_size;
3547
3548         adapter->num_io_queues = io_queue_num;
3549         adapter->last_monitored_tx_qid = 0;
3550
3551         adapter->rx_copybreak = ENA_DEFAULT_RX_COPYBREAK;
3552         adapter->wd_state = wd_state;
3553
3554         snprintf(adapter->name, ENA_NAME_MAX_LEN, "ena_%d", adapters_found);
3555
3556         rc = ena_com_init_interrupt_moderation(adapter->ena_dev);
3557         if (rc) {
3558                 dev_err(&pdev->dev,
3559                         "Failed to query interrupt moderation feature\n");
3560                 goto err_netdev_destroy;
3561         }
3562         ena_init_io_rings(adapter);
3563
3564         netdev->netdev_ops = &ena_netdev_ops;
3565         netdev->watchdog_timeo = TX_TIMEOUT;
3566         ena_set_ethtool_ops(netdev);
3567
3568         netdev->priv_flags |= IFF_UNICAST_FLT;
3569
3570         u64_stats_init(&adapter->syncp);
3571
3572         rc = ena_enable_msix_and_set_admin_interrupts(adapter, io_queue_num);
3573         if (rc) {
3574                 dev_err(&pdev->dev,
3575                         "Failed to enable and set the admin interrupts\n");
3576                 goto err_worker_destroy;
3577         }
3578         rc = ena_rss_init_default(adapter);
3579         if (rc && (rc != -EOPNOTSUPP)) {
3580                 dev_err(&pdev->dev, "Cannot init RSS rc: %d\n", rc);
3581                 goto err_free_msix;
3582         }
3583
3584         ena_config_debug_area(adapter);
3585
3586         memcpy(adapter->netdev->perm_addr, adapter->mac_addr, netdev->addr_len);
3587
3588         netif_carrier_off(netdev);
3589
3590         rc = register_netdev(netdev);
3591         if (rc) {
3592                 dev_err(&pdev->dev, "Cannot register net device\n");
3593                 goto err_rss;
3594         }
3595
3596         INIT_WORK(&adapter->reset_task, ena_fw_reset_device);
3597
3598         adapter->last_keep_alive_jiffies = jiffies;
3599         adapter->keep_alive_timeout = ENA_DEVICE_KALIVE_TIMEOUT;
3600         adapter->missing_tx_completion_to = TX_TIMEOUT;
3601         adapter->missing_tx_completion_threshold = MAX_NUM_OF_TIMEOUTED_PACKETS;
3602
3603         ena_update_hints(adapter, &get_feat_ctx.hw_hints);
3604
3605         timer_setup(&adapter->timer_service, ena_timer_service, 0);
3606         mod_timer(&adapter->timer_service, round_jiffies(jiffies + HZ));
3607
3608         if (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_HOST)
3609                 queue_type_str = "Regular";
3610         else
3611                 queue_type_str = "Low Latency";
3612
3613         dev_info(&pdev->dev,
3614                  "%s found at mem %lx, mac addr %pM Queues %d, Placement policy: %s\n",
3615                  DEVICE_NAME, (long)pci_resource_start(pdev, 0),
3616                  netdev->dev_addr, io_queue_num, queue_type_str);
3617
3618         set_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags);
3619
3620         adapters_found++;
3621
3622         return 0;
3623
3624 err_rss:
3625         ena_com_delete_debug_area(ena_dev);
3626         ena_com_rss_destroy(ena_dev);
3627 err_free_msix:
3628         ena_com_dev_reset(ena_dev, ENA_REGS_RESET_INIT_ERR);
3629         /* stop submitting admin commands on a device that was reset */
3630         ena_com_set_admin_running_state(ena_dev, false);
3631         ena_free_mgmnt_irq(adapter);
3632         ena_disable_msix(adapter);
3633 err_worker_destroy:
3634         del_timer(&adapter->timer_service);
3635 err_netdev_destroy:
3636         free_netdev(netdev);
3637 err_device_destroy:
3638         ena_com_delete_host_info(ena_dev);
3639         ena_com_admin_destroy(ena_dev);
3640 err_free_region:
3641         ena_release_bars(ena_dev, pdev);
3642 err_free_ena_dev:
3643         vfree(ena_dev);
3644 err_disable_device:
3645         pci_disable_device(pdev);
3646         return rc;
3647 }
3648
3649 /*****************************************************************************/
3650
3651 /* ena_remove - Device Removal Routine
3652  * @pdev: PCI device information struct
3653  *
3654  * ena_remove is called by the PCI subsystem to alert the driver
3655  * that it should release a PCI device.
3656  */
3657 static void ena_remove(struct pci_dev *pdev)
3658 {
3659         struct ena_adapter *adapter = pci_get_drvdata(pdev);
3660         struct ena_com_dev *ena_dev;
3661         struct net_device *netdev;
3662
3663         ena_dev = adapter->ena_dev;
3664         netdev = adapter->netdev;
3665
3666 #ifdef CONFIG_RFS_ACCEL
3667         if ((adapter->msix_vecs >= 1) && (netdev->rx_cpu_rmap)) {
3668                 free_irq_cpu_rmap(netdev->rx_cpu_rmap);
3669                 netdev->rx_cpu_rmap = NULL;
3670         }
3671 #endif /* CONFIG_RFS_ACCEL */
3672         del_timer_sync(&adapter->timer_service);
3673
3674         cancel_work_sync(&adapter->reset_task);
3675
3676         rtnl_lock();
3677         ena_destroy_device(adapter, true);
3678         rtnl_unlock();
3679
3680         unregister_netdev(netdev);
3681
3682         free_netdev(netdev);
3683
3684         ena_com_rss_destroy(ena_dev);
3685
3686         ena_com_delete_debug_area(ena_dev);
3687
3688         ena_com_delete_host_info(ena_dev);
3689
3690         ena_release_bars(ena_dev, pdev);
3691
3692         pci_disable_device(pdev);
3693
3694         vfree(ena_dev);
3695 }
3696
3697 #ifdef CONFIG_PM
3698 /* ena_suspend - PM suspend callback
3699  * @pdev: PCI device information struct
3700  * @state:power state
3701  */
3702 static int ena_suspend(struct pci_dev *pdev,  pm_message_t state)
3703 {
3704         struct ena_adapter *adapter = pci_get_drvdata(pdev);
3705
3706         u64_stats_update_begin(&adapter->syncp);
3707         adapter->dev_stats.suspend++;
3708         u64_stats_update_end(&adapter->syncp);
3709
3710         rtnl_lock();
3711         if (unlikely(test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags))) {
3712                 dev_err(&pdev->dev,
3713                         "ignoring device reset request as the device is being suspended\n");
3714                 clear_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags);
3715         }
3716         ena_destroy_device(adapter, true);
3717         rtnl_unlock();
3718         return 0;
3719 }
3720
3721 /* ena_resume - PM resume callback
3722  * @pdev: PCI device information struct
3723  *
3724  */
3725 static int ena_resume(struct pci_dev *pdev)
3726 {
3727         struct ena_adapter *adapter = pci_get_drvdata(pdev);
3728         int rc;
3729
3730         u64_stats_update_begin(&adapter->syncp);
3731         adapter->dev_stats.resume++;
3732         u64_stats_update_end(&adapter->syncp);
3733
3734         rtnl_lock();
3735         rc = ena_restore_device(adapter);
3736         rtnl_unlock();
3737         return rc;
3738 }
3739 #endif
3740
3741 static struct pci_driver ena_pci_driver = {
3742         .name           = DRV_MODULE_NAME,
3743         .id_table       = ena_pci_tbl,
3744         .probe          = ena_probe,
3745         .remove         = ena_remove,
3746 #ifdef CONFIG_PM
3747         .suspend    = ena_suspend,
3748         .resume     = ena_resume,
3749 #endif
3750         .sriov_configure = pci_sriov_configure_simple,
3751 };
3752
3753 static int __init ena_init(void)
3754 {
3755         pr_info("%s", version);
3756
3757         ena_wq = create_singlethread_workqueue(DRV_MODULE_NAME);
3758         if (!ena_wq) {
3759                 pr_err("Failed to create workqueue\n");
3760                 return -ENOMEM;
3761         }
3762
3763         return pci_register_driver(&ena_pci_driver);
3764 }
3765
3766 static void __exit ena_cleanup(void)
3767 {
3768         pci_unregister_driver(&ena_pci_driver);
3769
3770         if (ena_wq) {
3771                 destroy_workqueue(ena_wq);
3772                 ena_wq = NULL;
3773         }
3774 }
3775
3776 /******************************************************************************
3777  ******************************** AENQ Handlers *******************************
3778  *****************************************************************************/
3779 /* ena_update_on_link_change:
3780  * Notify the network interface about the change in link status
3781  */
3782 static void ena_update_on_link_change(void *adapter_data,
3783                                       struct ena_admin_aenq_entry *aenq_e)
3784 {
3785         struct ena_adapter *adapter = (struct ena_adapter *)adapter_data;
3786         struct ena_admin_aenq_link_change_desc *aenq_desc =
3787                 (struct ena_admin_aenq_link_change_desc *)aenq_e;
3788         int status = aenq_desc->flags &
3789                 ENA_ADMIN_AENQ_LINK_CHANGE_DESC_LINK_STATUS_MASK;
3790
3791         if (status) {
3792                 netdev_dbg(adapter->netdev, "%s\n", __func__);
3793                 set_bit(ENA_FLAG_LINK_UP, &adapter->flags);
3794                 if (!test_bit(ENA_FLAG_ONGOING_RESET, &adapter->flags))
3795                         netif_carrier_on(adapter->netdev);
3796         } else {
3797                 clear_bit(ENA_FLAG_LINK_UP, &adapter->flags);
3798                 netif_carrier_off(adapter->netdev);
3799         }
3800 }
3801
3802 static void ena_keep_alive_wd(void *adapter_data,
3803                               struct ena_admin_aenq_entry *aenq_e)
3804 {
3805         struct ena_adapter *adapter = (struct ena_adapter *)adapter_data;
3806         struct ena_admin_aenq_keep_alive_desc *desc;
3807         u64 rx_drops;
3808
3809         desc = (struct ena_admin_aenq_keep_alive_desc *)aenq_e;
3810         adapter->last_keep_alive_jiffies = jiffies;
3811
3812         rx_drops = ((u64)desc->rx_drops_high << 32) | desc->rx_drops_low;
3813
3814         u64_stats_update_begin(&adapter->syncp);
3815         adapter->dev_stats.rx_drops = rx_drops;
3816         u64_stats_update_end(&adapter->syncp);
3817 }
3818
3819 static void ena_notification(void *adapter_data,
3820                              struct ena_admin_aenq_entry *aenq_e)
3821 {
3822         struct ena_adapter *adapter = (struct ena_adapter *)adapter_data;
3823         struct ena_admin_ena_hw_hints *hints;
3824
3825         WARN(aenq_e->aenq_common_desc.group != ENA_ADMIN_NOTIFICATION,
3826              "Invalid group(%x) expected %x\n",
3827              aenq_e->aenq_common_desc.group,
3828              ENA_ADMIN_NOTIFICATION);
3829
3830         switch (aenq_e->aenq_common_desc.syndrom) {
3831         case ENA_ADMIN_UPDATE_HINTS:
3832                 hints = (struct ena_admin_ena_hw_hints *)
3833                         (&aenq_e->inline_data_w4);
3834                 ena_update_hints(adapter, hints);
3835                 break;
3836         default:
3837                 netif_err(adapter, drv, adapter->netdev,
3838                           "Invalid aenq notification link state %d\n",
3839                           aenq_e->aenq_common_desc.syndrom);
3840         }
3841 }
3842
3843 /* This handler will called for unknown event group or unimplemented handlers*/
3844 static void unimplemented_aenq_handler(void *data,
3845                                        struct ena_admin_aenq_entry *aenq_e)
3846 {
3847         struct ena_adapter *adapter = (struct ena_adapter *)data;
3848
3849         netif_err(adapter, drv, adapter->netdev,
3850                   "Unknown event was received or event with unimplemented handler\n");
3851 }
3852
3853 static struct ena_aenq_handlers aenq_handlers = {
3854         .handlers = {
3855                 [ENA_ADMIN_LINK_CHANGE] = ena_update_on_link_change,
3856                 [ENA_ADMIN_NOTIFICATION] = ena_notification,
3857                 [ENA_ADMIN_KEEP_ALIVE] = ena_keep_alive_wd,
3858         },
3859         .unimplemented_handler = unimplemented_aenq_handler
3860 };
3861
3862 module_init(ena_init);
3863 module_exit(ena_cleanup);