drivers/net/ethernet/broadcom/bcmsysport.c

   1 /*
   2  * Broadcom BCM7xxx System Port Ethernet MAC driver
   3  *
   4  * Copyright (C) 2014 Broadcom Corporation
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License version 2 as
   8  * published by the Free Software Foundation.
   9  */
  10
  11 #define pr_fmt(fmt)     KBUILD_MODNAME ": " fmt
  12
  13 #include <linux/init.h>
  14 #include <linux/interrupt.h>
  15 #include <linux/module.h>
  16 #include <linux/kernel.h>
  17 #include <linux/netdevice.h>
  18 #include <linux/etherdevice.h>
  19 #include <linux/platform_device.h>
  20 #include <linux/of.h>
  21 #include <linux/of_net.h>
  22 #include <linux/of_mdio.h>
  23 #include <linux/phy.h>
  24 #include <linux/phy_fixed.h>
  25 #include <net/ip.h>
  26 #include <net/ipv6.h>
  27
  28 #include "bcmsysport.h"
  29
  30 /* I/O accessors register helpers */
  31 #define BCM_SYSPORT_IO_MACRO(name, offset) \
  32 static inline u32 name##_readl(struct bcm_sysport_priv *priv, u32 off)  \
  33 {                                                                       \
  34         u32 reg = __raw_readl(priv->base + offset + off);               \
  35         return reg;                                                     \
  36 }                                                                       \
  37 static inline void name##_writel(struct bcm_sysport_priv *priv,         \
  38                                   u32 val, u32 off)                     \
  39 {                                                                       \
  40         __raw_writel(val, priv->base + offset + off);                   \
  41 }                                                                       \
  42
  43 BCM_SYSPORT_IO_MACRO(intrl2_0, SYS_PORT_INTRL2_0_OFFSET);
  44 BCM_SYSPORT_IO_MACRO(intrl2_1, SYS_PORT_INTRL2_1_OFFSET);
  45 BCM_SYSPORT_IO_MACRO(umac, SYS_PORT_UMAC_OFFSET);
  46 BCM_SYSPORT_IO_MACRO(tdma, SYS_PORT_TDMA_OFFSET);
  47 BCM_SYSPORT_IO_MACRO(rdma, SYS_PORT_RDMA_OFFSET);
  48 BCM_SYSPORT_IO_MACRO(rxchk, SYS_PORT_RXCHK_OFFSET);
  49 BCM_SYSPORT_IO_MACRO(txchk, SYS_PORT_TXCHK_OFFSET);
  50 BCM_SYSPORT_IO_MACRO(rbuf, SYS_PORT_RBUF_OFFSET);
  51 BCM_SYSPORT_IO_MACRO(tbuf, SYS_PORT_TBUF_OFFSET);
  52 BCM_SYSPORT_IO_MACRO(topctrl, SYS_PORT_TOPCTRL_OFFSET);
  53
  54 /* L2-interrupt masking/unmasking helpers, does automatic saving of the applied
  55  * mask in a software copy to avoid CPU_MASK_STATUS reads in hot-paths.
  56   */
  57 #define BCM_SYSPORT_INTR_L2(which)      \
  58 static inline void intrl2_##which##_mask_clear(struct bcm_sysport_priv *priv, \
  59                                                 u32 mask)               \
  60 {                                                                       \
  61         intrl2_##which##_writel(priv, mask, INTRL2_CPU_MASK_CLEAR);     \
  62         priv->irq##which##_mask &= ~(mask);                             \
  63 }                                                                       \
  64 static inline void intrl2_##which##_mask_set(struct bcm_sysport_priv *priv, \
  65                                                 u32 mask)               \
  66 {                                                                       \
  67         intrl2_## which##_writel(priv, mask, INTRL2_CPU_MASK_SET);      \
  68         priv->irq##which##_mask |= (mask);                              \
  69 }                                                                       \
  70
  71 BCM_SYSPORT_INTR_L2(0)
  72 BCM_SYSPORT_INTR_L2(1)
  73
  74 /* Register accesses to GISB/RBUS registers are expensive (few hundred
  75  * nanoseconds), so keep the check for 64-bits explicit here to save
  76  * one register write per-packet on 32-bits platforms.
  77  */
  78 static inline void dma_desc_set_addr(struct bcm_sysport_priv *priv,
  79                                      void __iomem *d,
  80                                      dma_addr_t addr)
  81 {
  82 #ifdef CONFIG_PHYS_ADDR_T_64BIT
  83         __raw_writel(upper_32_bits(addr) & DESC_ADDR_HI_MASK,
  84                      d + DESC_ADDR_HI_STATUS_LEN);
  85 #endif
  86         __raw_writel(lower_32_bits(addr), d + DESC_ADDR_LO);
  87 }
  88
  89 static inline void tdma_port_write_desc_addr(struct bcm_sysport_priv *priv,
  90                                              struct dma_desc *desc,
  91                                              unsigned int port)
  92 {
  93         /* Ports are latched, so write upper address first */
  94         tdma_writel(priv, desc->addr_status_len, TDMA_WRITE_PORT_HI(port));
  95         tdma_writel(priv, desc->addr_lo, TDMA_WRITE_PORT_LO(port));
  96 }
  97
  98 /* Ethtool operations */
  99 static int bcm_sysport_set_settings(struct net_device *dev,
 100                                     struct ethtool_cmd *cmd)
 101 {
 102         struct bcm_sysport_priv *priv = netdev_priv(dev);
 103
 104         if (!netif_running(dev))
 105                 return -EINVAL;
 106
 107         return phy_ethtool_sset(priv->phydev, cmd);
 108 }
 109
 110 static int bcm_sysport_get_settings(struct net_device *dev,
 111                                     struct ethtool_cmd *cmd)
 112 {
 113         struct bcm_sysport_priv *priv = netdev_priv(dev);
 114
 115         if (!netif_running(dev))
 116                 return -EINVAL;
 117
 118         return phy_ethtool_gset(priv->phydev, cmd);
 119 }
 120
 121 static int bcm_sysport_set_rx_csum(struct net_device *dev,
 122                                    netdev_features_t wanted)
 123 {
 124         struct bcm_sysport_priv *priv = netdev_priv(dev);
 125         u32 reg;
 126
 127         priv->rx_chk_en = !!(wanted & NETIF_F_RXCSUM);
 128         reg = rxchk_readl(priv, RXCHK_CONTROL);
 129         if (priv->rx_chk_en)
 130                 reg |= RXCHK_EN;
 131         else
 132                 reg &= ~RXCHK_EN;
 133
 134         /* If UniMAC forwards CRC, we need to skip over it to get
 135          * a valid CHK bit to be set in the per-packet status word
 136          */
 137         if (priv->rx_chk_en && priv->crc_fwd)
 138                 reg |= RXCHK_SKIP_FCS;
 139         else
 140                 reg &= ~RXCHK_SKIP_FCS;
 141
 142         /* If Broadcom tags are enabled (e.g: using a switch), make
 143          * sure we tell the RXCHK hardware to expect a 4-bytes Broadcom
 144          * tag after the Ethernet MAC Source Address.
 145          */
 146         if (netdev_uses_dsa(dev))
 147                 reg |= RXCHK_BRCM_TAG_EN;
 148         else
 149                 reg &= ~RXCHK_BRCM_TAG_EN;
 150
 151         rxchk_writel(priv, reg, RXCHK_CONTROL);
 152
 153         return 0;
 154 }
 155
 156 static int bcm_sysport_set_tx_csum(struct net_device *dev,
 157                                    netdev_features_t wanted)
 158 {
 159         struct bcm_sysport_priv *priv = netdev_priv(dev);
 160         u32 reg;
 161
 162         /* Hardware transmit checksum requires us to enable the Transmit status
 163          * block prepended to the packet contents
 164          */
 165         priv->tsb_en = !!(wanted & (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM));
 166         reg = tdma_readl(priv, TDMA_CONTROL);
 167         if (priv->tsb_en)
 168                 reg |= TSB_EN;
 169         else
 170                 reg &= ~TSB_EN;
 171         tdma_writel(priv, reg, TDMA_CONTROL);
 172
 173         return 0;
 174 }
 175
 176 static int bcm_sysport_set_features(struct net_device *dev,
 177                                     netdev_features_t features)
 178 {
 179         netdev_features_t changed = features ^ dev->features;
 180         netdev_features_t wanted = dev->wanted_features;
 181         int ret = 0;
 182
 183         if (changed & NETIF_F_RXCSUM)
 184                 ret = bcm_sysport_set_rx_csum(dev, wanted);
 185         if (changed & (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM))
 186                 ret = bcm_sysport_set_tx_csum(dev, wanted);
 187
 188         return ret;
 189 }
 190
 191 /* Hardware counters must be kept in sync because the order/offset
 192  * is important here (order in structure declaration = order in hardware)
 193  */
 194 static const struct bcm_sysport_stats bcm_sysport_gstrings_stats[] = {
 195         /* general stats */
 196         STAT_NETDEV(rx_packets),
 197         STAT_NETDEV(tx_packets),
 198         STAT_NETDEV(rx_bytes),
 199         STAT_NETDEV(tx_bytes),
 200         STAT_NETDEV(rx_errors),
 201         STAT_NETDEV(tx_errors),
 202         STAT_NETDEV(rx_dropped),
 203         STAT_NETDEV(tx_dropped),
 204         STAT_NETDEV(multicast),
 205         /* UniMAC RSV counters */
 206         STAT_MIB_RX("rx_64_octets", mib.rx.pkt_cnt.cnt_64),
 207         STAT_MIB_RX("rx_65_127_oct", mib.rx.pkt_cnt.cnt_127),
 208         STAT_MIB_RX("rx_128_255_oct", mib.rx.pkt_cnt.cnt_255),
 209         STAT_MIB_RX("rx_256_511_oct", mib.rx.pkt_cnt.cnt_511),
 210         STAT_MIB_RX("rx_512_1023_oct", mib.rx.pkt_cnt.cnt_1023),
 211         STAT_MIB_RX("rx_1024_1518_oct", mib.rx.pkt_cnt.cnt_1518),
 212         STAT_MIB_RX("rx_vlan_1519_1522_oct", mib.rx.pkt_cnt.cnt_mgv),
 213         STAT_MIB_RX("rx_1522_2047_oct", mib.rx.pkt_cnt.cnt_2047),
 214         STAT_MIB_RX("rx_2048_4095_oct", mib.rx.pkt_cnt.cnt_4095),
 215         STAT_MIB_RX("rx_4096_9216_oct", mib.rx.pkt_cnt.cnt_9216),
 216         STAT_MIB_RX("rx_pkts", mib.rx.pkt),
 217         STAT_MIB_RX("rx_bytes", mib.rx.bytes),
 218         STAT_MIB_RX("rx_multicast", mib.rx.mca),
 219         STAT_MIB_RX("rx_broadcast", mib.rx.bca),
 220         STAT_MIB_RX("rx_fcs", mib.rx.fcs),
 221         STAT_MIB_RX("rx_control", mib.rx.cf),
 222         STAT_MIB_RX("rx_pause", mib.rx.pf),
 223         STAT_MIB_RX("rx_unknown", mib.rx.uo),
 224         STAT_MIB_RX("rx_align", mib.rx.aln),
 225         STAT_MIB_RX("rx_outrange", mib.rx.flr),
 226         STAT_MIB_RX("rx_code", mib.rx.cde),
 227         STAT_MIB_RX("rx_carrier", mib.rx.fcr),
 228         STAT_MIB_RX("rx_oversize", mib.rx.ovr),
 229         STAT_MIB_RX("rx_jabber", mib.rx.jbr),
 230         STAT_MIB_RX("rx_mtu_err", mib.rx.mtue),
 231         STAT_MIB_RX("rx_good_pkts", mib.rx.pok),
 232         STAT_MIB_RX("rx_unicast", mib.rx.uc),
 233         STAT_MIB_RX("rx_ppp", mib.rx.ppp),
 234         STAT_MIB_RX("rx_crc", mib.rx.rcrc),
 235         /* UniMAC TSV counters */
 236         STAT_MIB_TX("tx_64_octets", mib.tx.pkt_cnt.cnt_64),
 237         STAT_MIB_TX("tx_65_127_oct", mib.tx.pkt_cnt.cnt_127),
 238         STAT_MIB_TX("tx_128_255_oct", mib.tx.pkt_cnt.cnt_255),
 239         STAT_MIB_TX("tx_256_511_oct", mib.tx.pkt_cnt.cnt_511),
 240         STAT_MIB_TX("tx_512_1023_oct", mib.tx.pkt_cnt.cnt_1023),
 241         STAT_MIB_TX("tx_1024_1518_oct", mib.tx.pkt_cnt.cnt_1518),
 242         STAT_MIB_TX("tx_vlan_1519_1522_oct", mib.tx.pkt_cnt.cnt_mgv),
 243         STAT_MIB_TX("tx_1522_2047_oct", mib.tx.pkt_cnt.cnt_2047),
 244         STAT_MIB_TX("tx_2048_4095_oct", mib.tx.pkt_cnt.cnt_4095),
 245         STAT_MIB_TX("tx_4096_9216_oct", mib.tx.pkt_cnt.cnt_9216),
 246         STAT_MIB_TX("tx_pkts", mib.tx.pkts),
 247         STAT_MIB_TX("tx_multicast", mib.tx.mca),
 248         STAT_MIB_TX("tx_broadcast", mib.tx.bca),
 249         STAT_MIB_TX("tx_pause", mib.tx.pf),
 250         STAT_MIB_TX("tx_control", mib.tx.cf),
 251         STAT_MIB_TX("tx_fcs_err", mib.tx.fcs),
 252         STAT_MIB_TX("tx_oversize", mib.tx.ovr),
 253         STAT_MIB_TX("tx_defer", mib.tx.drf),
 254         STAT_MIB_TX("tx_excess_defer", mib.tx.edf),
 255         STAT_MIB_TX("tx_single_col", mib.tx.scl),
 256         STAT_MIB_TX("tx_multi_col", mib.tx.mcl),
 257         STAT_MIB_TX("tx_late_col", mib.tx.lcl),
 258         STAT_MIB_TX("tx_excess_col", mib.tx.ecl),
 259         STAT_MIB_TX("tx_frags", mib.tx.frg),
 260         STAT_MIB_TX("tx_total_col", mib.tx.ncl),
 261         STAT_MIB_TX("tx_jabber", mib.tx.jbr),
 262         STAT_MIB_TX("tx_bytes", mib.tx.bytes),
 263         STAT_MIB_TX("tx_good_pkts", mib.tx.pok),
 264         STAT_MIB_TX("tx_unicast", mib.tx.uc),
 265         /* UniMAC RUNT counters */
 266         STAT_RUNT("rx_runt_pkts", mib.rx_runt_cnt),
 267         STAT_RUNT("rx_runt_valid_fcs", mib.rx_runt_fcs),
 268         STAT_RUNT("rx_runt_inval_fcs_align", mib.rx_runt_fcs_align),
 269         STAT_RUNT("rx_runt_bytes", mib.rx_runt_bytes),
 270         /* RXCHK misc statistics */
 271         STAT_RXCHK("rxchk_bad_csum", mib.rxchk_bad_csum, RXCHK_BAD_CSUM_CNTR),
 272         STAT_RXCHK("rxchk_other_pkt_disc", mib.rxchk_other_pkt_disc,
 273                    RXCHK_OTHER_DISC_CNTR),
 274         /* RBUF misc statistics */
 275         STAT_RBUF("rbuf_ovflow_cnt", mib.rbuf_ovflow_cnt, RBUF_OVFL_DISC_CNTR),
 276         STAT_RBUF("rbuf_err_cnt", mib.rbuf_err_cnt, RBUF_ERR_PKT_CNTR),
 277 };
 278
 279 #define BCM_SYSPORT_STATS_LEN   ARRAY_SIZE(bcm_sysport_gstrings_stats)
 280
 281 static void bcm_sysport_get_drvinfo(struct net_device *dev,
 282                                     struct ethtool_drvinfo *info)
 283 {
 284         strlcpy(info->driver, KBUILD_MODNAME, sizeof(info->driver));
 285         strlcpy(info->version, "0.1", sizeof(info->version));
 286         strlcpy(info->bus_info, "platform", sizeof(info->bus_info));
 287         info->n_stats = BCM_SYSPORT_STATS_LEN;
 288 }
 289
 290 static u32 bcm_sysport_get_msglvl(struct net_device *dev)
 291 {
 292         struct bcm_sysport_priv *priv = netdev_priv(dev);
 293
 294         return priv->msg_enable;
 295 }
 296
 297 static void bcm_sysport_set_msglvl(struct net_device *dev, u32 enable)
 298 {
 299         struct bcm_sysport_priv *priv = netdev_priv(dev);
 300
 301         priv->msg_enable = enable;
 302 }
 303
 304 static int bcm_sysport_get_sset_count(struct net_device *dev, int string_set)
 305 {
 306         switch (string_set) {
 307         case ETH_SS_STATS:
 308                 return BCM_SYSPORT_STATS_LEN;
 309         default:
 310                 return -EOPNOTSUPP;
 311         }
 312 }
 313
 314 static void bcm_sysport_get_strings(struct net_device *dev,
 315                                     u32 stringset, u8 *data)
 316 {
 317         int i;
 318
 319         switch (stringset) {
 320         case ETH_SS_STATS:
 321                 for (i = 0; i < BCM_SYSPORT_STATS_LEN; i++) {
 322                         memcpy(data + i * ETH_GSTRING_LEN,
 323                                bcm_sysport_gstrings_stats[i].stat_string,
 324                                ETH_GSTRING_LEN);
 325                 }
 326                 break;
 327         default:
 328                 break;
 329         }
 330 }
 331
 332 static void bcm_sysport_update_mib_counters(struct bcm_sysport_priv *priv)
 333 {
 334         int i, j = 0;
 335
 336         for (i = 0; i < BCM_SYSPORT_STATS_LEN; i++) {
 337                 const struct bcm_sysport_stats *s;
 338                 u8 offset = 0;
 339                 u32 val = 0;
 340                 char *p;
 341
 342                 s = &bcm_sysport_gstrings_stats[i];
 343                 switch (s->type) {
 344                 case BCM_SYSPORT_STAT_NETDEV:
 345                         continue;
 346                 case BCM_SYSPORT_STAT_MIB_RX:
 347                 case BCM_SYSPORT_STAT_MIB_TX:
 348                 case BCM_SYSPORT_STAT_RUNT:
 349                         if (s->type != BCM_SYSPORT_STAT_MIB_RX)
 350                                 offset = UMAC_MIB_STAT_OFFSET;
 351                         val = umac_readl(priv, UMAC_MIB_START + j + offset);
 352                         break;
 353                 case BCM_SYSPORT_STAT_RXCHK:
 354                         val = rxchk_readl(priv, s->reg_offset);
 355                         if (val == ~0)
 356                                 rxchk_writel(priv, 0, s->reg_offset);
 357                         break;
 358                 case BCM_SYSPORT_STAT_RBUF:
 359                         val = rbuf_readl(priv, s->reg_offset);
 360                         if (val == ~0)
 361                                 rbuf_writel(priv, 0, s->reg_offset);
 362                         break;
 363                 }
 364
 365                 j += s->stat_sizeof;
 366                 p = (char *)priv + s->stat_offset;
 367                 *(u32 *)p = val;
 368         }
 369
 370         netif_dbg(priv, hw, priv->netdev, "updated MIB counters\n");
 371 }
 372
 373 static void bcm_sysport_get_stats(struct net_device *dev,
 374                                   struct ethtool_stats *stats, u64 *data)
 375 {
 376         struct bcm_sysport_priv *priv = netdev_priv(dev);
 377         int i;
 378
 379         if (netif_running(dev))
 380                 bcm_sysport_update_mib_counters(priv);
 381
 382         for (i =  0; i < BCM_SYSPORT_STATS_LEN; i++) {
 383                 const struct bcm_sysport_stats *s;
 384                 char *p;
 385
 386                 s = &bcm_sysport_gstrings_stats[i];
 387                 if (s->type == BCM_SYSPORT_STAT_NETDEV)
 388                         p = (char *)&dev->stats;
 389                 else
 390                         p = (char *)priv;
 391                 p += s->stat_offset;
 392                 data[i] = *(u32 *)p;
 393         }
 394 }
 395
 396 static void bcm_sysport_get_wol(struct net_device *dev,
 397                                 struct ethtool_wolinfo *wol)
 398 {
 399         struct bcm_sysport_priv *priv = netdev_priv(dev);
 400         u32 reg;
 401
 402         wol->supported = WAKE_MAGIC | WAKE_MAGICSECURE;
 403         wol->wolopts = priv->wolopts;
 404
 405         if (!(priv->wolopts & WAKE_MAGICSECURE))
 406                 return;
 407
 408         /* Return the programmed SecureOn password */
 409         reg = umac_readl(priv, UMAC_PSW_MS);
 410         put_unaligned_be16(reg, &wol->sopass[0]);
 411         reg = umac_readl(priv, UMAC_PSW_LS);
 412         put_unaligned_be32(reg, &wol->sopass[2]);
 413 }
 414
 415 static int bcm_sysport_set_wol(struct net_device *dev,
 416                                struct ethtool_wolinfo *wol)
 417 {
 418         struct bcm_sysport_priv *priv = netdev_priv(dev);
 419         struct device *kdev = &priv->pdev->dev;
 420         u32 supported = WAKE_MAGIC | WAKE_MAGICSECURE;
 421
 422         if (!device_can_wakeup(kdev))
 423                 return -ENOTSUPP;
 424
 425         if (wol->wolopts & ~supported)
 426                 return -EINVAL;
 427
 428         /* Program the SecureOn password */
 429         if (wol->wolopts & WAKE_MAGICSECURE) {
 430                 umac_writel(priv, get_unaligned_be16(&wol->sopass[0]),
 431                             UMAC_PSW_MS);
 432                 umac_writel(priv, get_unaligned_be32(&wol->sopass[2]),
 433                             UMAC_PSW_LS);
 434         }
 435
 436         /* Flag the device and relevant IRQ as wakeup capable */
 437         if (wol->wolopts) {
 438                 device_set_wakeup_enable(kdev, 1);
 439                 if (priv->wol_irq_disabled)
 440                         enable_irq_wake(priv->wol_irq);
 441                 priv->wol_irq_disabled = 0;
 442         } else {
 443                 device_set_wakeup_enable(kdev, 0);
 444                 /* Avoid unbalanced disable_irq_wake calls */
 445                 if (!priv->wol_irq_disabled)
 446                         disable_irq_wake(priv->wol_irq);
 447                 priv->wol_irq_disabled = 1;
 448         }
 449
 450         priv->wolopts = wol->wolopts;
 451
 452         return 0;
 453 }
 454
 455 static void bcm_sysport_free_cb(struct bcm_sysport_cb *cb)
 456 {
 457         dev_kfree_skb_any(cb->skb);
 458         cb->skb = NULL;
 459         dma_unmap_addr_set(cb, dma_addr, 0);
 460 }
 461
 462 static int bcm_sysport_rx_refill(struct bcm_sysport_priv *priv,
 463                                  struct bcm_sysport_cb *cb)
 464 {
 465         struct device *kdev = &priv->pdev->dev;
 466         struct net_device *ndev = priv->netdev;
 467         dma_addr_t mapping;
 468         int ret;
 469
 470         cb->skb = netdev_alloc_skb(priv->netdev, RX_BUF_LENGTH);
 471         if (!cb->skb) {
 472                 netif_err(priv, rx_err, ndev, "SKB alloc failed\n");
 473                 return -ENOMEM;
 474         }
 475
 476         mapping = dma_map_single(kdev, cb->skb->data,
 477                                  RX_BUF_LENGTH, DMA_FROM_DEVICE);
 478         ret = dma_mapping_error(kdev, mapping);
 479         if (ret) {
 480                 bcm_sysport_free_cb(cb);
 481                 netif_err(priv, rx_err, ndev, "DMA mapping failure\n");
 482                 return ret;
 483         }
 484
 485         dma_unmap_addr_set(cb, dma_addr, mapping);
 486         dma_desc_set_addr(priv, priv->rx_bd_assign_ptr, mapping);
 487
 488         priv->rx_bd_assign_index++;
 489         priv->rx_bd_assign_index &= (priv->num_rx_bds - 1);
 490         priv->rx_bd_assign_ptr = priv->rx_bds +
 491                 (priv->rx_bd_assign_index * DESC_SIZE);
 492
 493         netif_dbg(priv, rx_status, ndev, "RX refill\n");
 494
 495         return 0;
 496 }
 497
 498 static int bcm_sysport_alloc_rx_bufs(struct bcm_sysport_priv *priv)
 499 {
 500         struct bcm_sysport_cb *cb;
 501         int ret = 0;
 502         unsigned int i;
 503
 504         for (i = 0; i < priv->num_rx_bds; i++) {
 505                 cb = &priv->rx_cbs[priv->rx_bd_assign_index];
 506                 if (cb->skb)
 507                         continue;
 508
 509                 ret = bcm_sysport_rx_refill(priv, cb);
 510                 if (ret)
 511                         break;
 512         }
 513
 514         return ret;
 515 }
 516
 517 /* Poll the hardware for up to budget packets to process */
 518 static unsigned int bcm_sysport_desc_rx(struct bcm_sysport_priv *priv,
 519                                         unsigned int budget)
 520 {
 521         struct device *kdev = &priv->pdev->dev;
 522         struct net_device *ndev = priv->netdev;
 523         unsigned int processed = 0, to_process;
 524         struct bcm_sysport_cb *cb;
 525         struct sk_buff *skb;
 526         unsigned int p_index;
 527         u16 len, status;
 528         struct bcm_rsb *rsb;
 529
 530         /* Determine how much we should process since last call */
 531         p_index = rdma_readl(priv, RDMA_PROD_INDEX);
 532         p_index &= RDMA_PROD_INDEX_MASK;
 533
 534         if (p_index < priv->rx_c_index)
 535                 to_process = (RDMA_CONS_INDEX_MASK + 1) -
 536                         priv->rx_c_index + p_index;
 537         else
 538                 to_process = p_index - priv->rx_c_index;
 539
 540         netif_dbg(priv, rx_status, ndev,
 541                   "p_index=%d rx_c_index=%d to_process=%d\n",
 542                   p_index, priv->rx_c_index, to_process);
 543
 544         while ((processed < to_process) && (processed < budget)) {
 545                 cb = &priv->rx_cbs[priv->rx_read_ptr];
 546                 skb = cb->skb;
 547
 548                 processed++;
 549                 priv->rx_read_ptr++;
 550
 551                 if (priv->rx_read_ptr == priv->num_rx_bds)
 552                         priv->rx_read_ptr = 0;
 553
 554                 /* We do not have a backing SKB, so we do not a corresponding
 555                  * DMA mapping for this incoming packet since
 556                  * bcm_sysport_rx_refill always either has both skb and mapping
 557                  * or none.
 558                  */
 559                 if (unlikely(!skb)) {
 560                         netif_err(priv, rx_err, ndev, "out of memory!\n");
 561                         ndev->stats.rx_dropped++;
 562                         ndev->stats.rx_errors++;
 563                         goto refill;
 564                 }
 565
 566                 dma_unmap_single(kdev, dma_unmap_addr(cb, dma_addr),
 567                                  RX_BUF_LENGTH, DMA_FROM_DEVICE);
 568
 569                 /* Extract the Receive Status Block prepended */
 570                 rsb = (struct bcm_rsb *)skb->data;
 571                 len = (rsb->rx_status_len >> DESC_LEN_SHIFT) & DESC_LEN_MASK;
 572                 status = (rsb->rx_status_len >> DESC_STATUS_SHIFT) &
 573                           DESC_STATUS_MASK;
 574
 575                 netif_dbg(priv, rx_status, ndev,
 576                           "p=%d, c=%d, rd_ptr=%d, len=%d, flag=0x%04x\n",
 577                           p_index, priv->rx_c_index, priv->rx_read_ptr,
 578                           len, status);
 579
 580                 if (unlikely(!(status & DESC_EOP) || !(status & DESC_SOP))) {
 581                         netif_err(priv, rx_status, ndev, "fragmented packet!\n");
 582                         ndev->stats.rx_dropped++;
 583                         ndev->stats.rx_errors++;
 584                         bcm_sysport_free_cb(cb);
 585                         goto refill;
 586                 }
 587
 588                 if (unlikely(status & (RX_STATUS_ERR | RX_STATUS_OVFLOW))) {
 589                         netif_err(priv, rx_err, ndev, "error packet\n");
 590                         if (status & RX_STATUS_OVFLOW)
 591                                 ndev->stats.rx_over_errors++;
 592                         ndev->stats.rx_dropped++;
 593                         ndev->stats.rx_errors++;
 594                         bcm_sysport_free_cb(cb);
 595                         goto refill;
 596                 }
 597
 598                 skb_put(skb, len);
 599
 600                 /* Hardware validated our checksum */
 601                 if (likely(status & DESC_L4_CSUM))
 602                         skb->ip_summed = CHECKSUM_UNNECESSARY;
 603
 604                 /* Hardware pre-pends packets with 2bytes before Ethernet
 605                  * header plus we have the Receive Status Block, strip off all
 606                  * of this from the SKB.
 607                  */
 608                 skb_pull(skb, sizeof(*rsb) + 2);
 609                 len -= (sizeof(*rsb) + 2);
 610
 611                 /* UniMAC may forward CRC */
 612                 if (priv->crc_fwd) {
 613                         skb_trim(skb, len - ETH_FCS_LEN);
 614                         len -= ETH_FCS_LEN;
 615                 }
 616
 617                 skb->protocol = eth_type_trans(skb, ndev);
 618                 ndev->stats.rx_packets++;
 619                 ndev->stats.rx_bytes += len;
 620
 621                 napi_gro_receive(&priv->napi, skb);
 622 refill:
 623                 bcm_sysport_rx_refill(priv, cb);
 624         }
 625
 626         return processed;
 627 }
 628
 629 static void bcm_sysport_tx_reclaim_one(struct bcm_sysport_priv *priv,
 630                                        struct bcm_sysport_cb *cb,
 631                                        unsigned int *bytes_compl,
 632                                        unsigned int *pkts_compl)
 633 {
 634         struct device *kdev = &priv->pdev->dev;
 635         struct net_device *ndev = priv->netdev;
 636
 637         if (cb->skb) {
 638                 ndev->stats.tx_bytes += cb->skb->len;
 639                 *bytes_compl += cb->skb->len;
 640                 dma_unmap_single(kdev, dma_unmap_addr(cb, dma_addr),
 641                                  dma_unmap_len(cb, dma_len),
 642                                  DMA_TO_DEVICE);
 643                 ndev->stats.tx_packets++;
 644                 (*pkts_compl)++;
 645                 bcm_sysport_free_cb(cb);
 646         /* SKB fragment */
 647         } else if (dma_unmap_addr(cb, dma_addr)) {
 648                 ndev->stats.tx_bytes += dma_unmap_len(cb, dma_len);
 649                 dma_unmap_page(kdev, dma_unmap_addr(cb, dma_addr),
 650                                dma_unmap_len(cb, dma_len), DMA_TO_DEVICE);
 651                 dma_unmap_addr_set(cb, dma_addr, 0);
 652         }
 653 }
 654
 655 /* Reclaim queued SKBs for transmission completion, lockless version */
 656 static unsigned int __bcm_sysport_tx_reclaim(struct bcm_sysport_priv *priv,
 657                                              struct bcm_sysport_tx_ring *ring)
 658 {
 659         struct net_device *ndev = priv->netdev;
 660         unsigned int c_index, last_c_index, last_tx_cn, num_tx_cbs;
 661         unsigned int pkts_compl = 0, bytes_compl = 0;
 662         struct bcm_sysport_cb *cb;
 663         struct netdev_queue *txq;
 664         u32 hw_ind;
 665
 666         txq = netdev_get_tx_queue(ndev, ring->index);
 667
 668         /* Compute how many descriptors have been processed since last call */
 669         hw_ind = tdma_readl(priv, TDMA_DESC_RING_PROD_CONS_INDEX(ring->index));
 670         c_index = (hw_ind >> RING_CONS_INDEX_SHIFT) & RING_CONS_INDEX_MASK;
 671         ring->p_index = (hw_ind & RING_PROD_INDEX_MASK);
 672
 673         last_c_index = ring->c_index;
 674         num_tx_cbs = ring->size;
 675
 676         c_index &= (num_tx_cbs - 1);
 677
 678         if (c_index >= last_c_index)
 679                 last_tx_cn = c_index - last_c_index;
 680         else
 681                 last_tx_cn = num_tx_cbs - last_c_index + c_index;
 682
 683         netif_dbg(priv, tx_done, ndev,
 684                   "ring=%d c_index=%d last_tx_cn=%d last_c_index=%d\n",
 685                   ring->index, c_index, last_tx_cn, last_c_index);
 686
 687         while (last_tx_cn-- > 0) {
 688                 cb = ring->cbs + last_c_index;
 689                 bcm_sysport_tx_reclaim_one(priv, cb, &bytes_compl, &pkts_compl);
 690
 691                 ring->desc_count++;
 692                 last_c_index++;
 693                 last_c_index &= (num_tx_cbs - 1);
 694         }
 695
 696         ring->c_index = c_index;
 697
 698         if (netif_tx_queue_stopped(txq) && pkts_compl)
 699                 netif_tx_wake_queue(txq);
 700
 701         netif_dbg(priv, tx_done, ndev,
 702                   "ring=%d c_index=%d pkts_compl=%d, bytes_compl=%d\n",
 703                   ring->index, ring->c_index, pkts_compl, bytes_compl);
 704
 705         return pkts_compl;
 706 }
 707
 708 /* Locked version of the per-ring TX reclaim routine */
 709 static unsigned int bcm_sysport_tx_reclaim(struct bcm_sysport_priv *priv,
 710                                            struct bcm_sysport_tx_ring *ring)
 711 {
 712         unsigned int released;
 713         unsigned long flags;
 714
 715         spin_lock_irqsave(&ring->lock, flags);
 716         released = __bcm_sysport_tx_reclaim(priv, ring);
 717         spin_unlock_irqrestore(&ring->lock, flags);
 718
 719         return released;
 720 }
 721
 722 static int bcm_sysport_tx_poll(struct napi_struct *napi, int budget)
 723 {
 724         struct bcm_sysport_tx_ring *ring =
 725                 container_of(napi, struct bcm_sysport_tx_ring, napi);
 726         unsigned int work_done = 0;
 727
 728         work_done = bcm_sysport_tx_reclaim(ring->priv, ring);
 729
 730         if (work_done == 0) {
 731                 napi_complete(napi);
 732                 /* re-enable TX interrupt */
 733                 intrl2_1_mask_clear(ring->priv, BIT(ring->index));
 734
 735                 return 0;
 736         }
 737
 738         return budget;
 739 }
 740
 741 static void bcm_sysport_tx_reclaim_all(struct bcm_sysport_priv *priv)
 742 {
 743         unsigned int q;
 744
 745         for (q = 0; q < priv->netdev->num_tx_queues; q++)
 746                 bcm_sysport_tx_reclaim(priv, &priv->tx_rings[q]);
 747 }
 748
 749 static int bcm_sysport_poll(struct napi_struct *napi, int budget)
 750 {
 751         struct bcm_sysport_priv *priv =
 752                 container_of(napi, struct bcm_sysport_priv, napi);
 753         unsigned int work_done = 0;
 754
 755         work_done = bcm_sysport_desc_rx(priv, budget);
 756
 757         priv->rx_c_index += work_done;
 758         priv->rx_c_index &= RDMA_CONS_INDEX_MASK;
 759         rdma_writel(priv, priv->rx_c_index, RDMA_CONS_INDEX);
 760
 761         if (work_done < budget) {
 762                 napi_complete(napi);
 763                 /* re-enable RX interrupts */
 764                 intrl2_0_mask_clear(priv, INTRL2_0_RDMA_MBDONE);
 765         }
 766
 767         return work_done;
 768 }
 769
 770 static void bcm_sysport_resume_from_wol(struct bcm_sysport_priv *priv)
 771 {
 772         u32 reg;
 773
 774         /* Stop monitoring MPD interrupt */
 775         intrl2_0_mask_set(priv, INTRL2_0_MPD);
 776
 777         /* Clear the MagicPacket detection logic */
 778         reg = umac_readl(priv, UMAC_MPD_CTRL);
 779         reg &= ~MPD_EN;
 780         umac_writel(priv, reg, UMAC_MPD_CTRL);
 781
 782         netif_dbg(priv, wol, priv->netdev, "resumed from WOL\n");
 783 }
 784
 785 /* RX and misc interrupt routine */
 786 static irqreturn_t bcm_sysport_rx_isr(int irq, void *dev_id)
 787 {
 788         struct net_device *dev = dev_id;
 789         struct bcm_sysport_priv *priv = netdev_priv(dev);
 790
 791         priv->irq0_stat = intrl2_0_readl(priv, INTRL2_CPU_STATUS) &
 792                           ~intrl2_0_readl(priv, INTRL2_CPU_MASK_STATUS);
 793         intrl2_0_writel(priv, priv->irq0_stat, INTRL2_CPU_CLEAR);
 794
 795         if (unlikely(priv->irq0_stat == 0)) {
 796                 netdev_warn(priv->netdev, "spurious RX interrupt\n");
 797                 return IRQ_NONE;
 798         }
 799
 800         if (priv->irq0_stat & INTRL2_0_RDMA_MBDONE) {
 801                 if (likely(napi_schedule_prep(&priv->napi))) {
 802                         /* disable RX interrupts */
 803                         intrl2_0_mask_set(priv, INTRL2_0_RDMA_MBDONE);
 804                         __napi_schedule(&priv->napi);
 805                 }
 806         }
 807
 808         /* TX ring is full, perform a full reclaim since we do not know
 809          * which one would trigger this interrupt
 810          */
 811         if (priv->irq0_stat & INTRL2_0_TX_RING_FULL)
 812                 bcm_sysport_tx_reclaim_all(priv);
 813
 814         if (priv->irq0_stat & INTRL2_0_MPD) {
 815                 netdev_info(priv->netdev, "Wake-on-LAN interrupt!\n");
 816                 bcm_sysport_resume_from_wol(priv);
 817         }
 818
 819         return IRQ_HANDLED;
 820 }
 821
 822 /* TX interrupt service routine */
 823 static irqreturn_t bcm_sysport_tx_isr(int irq, void *dev_id)
 824 {
 825         struct net_device *dev = dev_id;
 826         struct bcm_sysport_priv *priv = netdev_priv(dev);
 827         struct bcm_sysport_tx_ring *txr;
 828         unsigned int ring;
 829
 830         priv->irq1_stat = intrl2_1_readl(priv, INTRL2_CPU_STATUS) &
 831                                 ~intrl2_1_readl(priv, INTRL2_CPU_MASK_STATUS);
 832         intrl2_1_writel(priv, 0xffffffff, INTRL2_CPU_CLEAR);
 833
 834         if (unlikely(priv->irq1_stat == 0)) {
 835                 netdev_warn(priv->netdev, "spurious TX interrupt\n");
 836                 return IRQ_NONE;
 837         }
 838
 839         for (ring = 0; ring < dev->num_tx_queues; ring++) {
 840                 if (!(priv->irq1_stat & BIT(ring)))
 841                         continue;
 842
 843                 txr = &priv->tx_rings[ring];
 844
 845                 if (likely(napi_schedule_prep(&txr->napi))) {
 846                         intrl2_1_mask_set(priv, BIT(ring));
 847                         __napi_schedule(&txr->napi);
 848                 }
 849         }
 850
 851         return IRQ_HANDLED;
 852 }
 853
 854 static irqreturn_t bcm_sysport_wol_isr(int irq, void *dev_id)
 855 {
 856         struct bcm_sysport_priv *priv = dev_id;
 857
 858         pm_wakeup_event(&priv->pdev->dev, 0);
 859
 860         return IRQ_HANDLED;
 861 }
 862
 863 static struct sk_buff *bcm_sysport_insert_tsb(struct sk_buff *skb,
 864                                               struct net_device *dev)
 865 {
 866         struct sk_buff *nskb;
 867         struct bcm_tsb *tsb;
 868         u32 csum_info;
 869         u8 ip_proto;
 870         u16 csum_start;
 871         u16 ip_ver;
 872
 873         /* Re-allocate SKB if needed */
 874         if (unlikely(skb_headroom(skb) < sizeof(*tsb))) {
 875                 nskb = skb_realloc_headroom(skb, sizeof(*tsb));
 876                 dev_kfree_skb(skb);
 877                 if (!nskb) {
 878                         dev->stats.tx_errors++;
 879                         dev->stats.tx_dropped++;
 880                         return NULL;
 881                 }
 882                 skb = nskb;
 883         }
 884
 885         tsb = (struct bcm_tsb *)skb_push(skb, sizeof(*tsb));
 886         /* Zero-out TSB by default */
 887         memset(tsb, 0, sizeof(*tsb));
 888
 889         if (skb->ip_summed == CHECKSUM_PARTIAL) {
 890                 ip_ver = htons(skb->protocol);
 891                 switch (ip_ver) {
 892                 case ETH_P_IP:
 893                         ip_proto = ip_hdr(skb)->protocol;
 894                         break;
 895                 case ETH_P_IPV6:
 896                         ip_proto = ipv6_hdr(skb)->nexthdr;
 897                         break;
 898                 default:
 899                         return skb;
 900                 }
 901
 902                 /* Get the checksum offset and the L4 (transport) offset */
 903                 csum_start = skb_checksum_start_offset(skb) - sizeof(*tsb);
 904                 csum_info = (csum_start + skb->csum_offset) & L4_CSUM_PTR_MASK;
 905                 csum_info |= (csum_start << L4_PTR_SHIFT);
 906
 907                 if (ip_proto == IPPROTO_TCP || ip_proto == IPPROTO_UDP) {
 908                         csum_info |= L4_LENGTH_VALID;
 909                         if (ip_proto == IPPROTO_UDP && ip_ver == ETH_P_IP)
 910                                 csum_info |= L4_UDP;
 911                 } else {
 912                         csum_info = 0;
 913                 }
 914
 915                 tsb->l4_ptr_dest_map = csum_info;
 916         }
 917
 918         return skb;
 919 }
 920
 921 static netdev_tx_t bcm_sysport_xmit(struct sk_buff *skb,
 922                                     struct net_device *dev)
 923 {
 924         struct bcm_sysport_priv *priv = netdev_priv(dev);
 925         struct device *kdev = &priv->pdev->dev;
 926         struct bcm_sysport_tx_ring *ring;
 927         struct bcm_sysport_cb *cb;
 928         struct netdev_queue *txq;
 929         struct dma_desc *desc;
 930         unsigned int skb_len;
 931         unsigned long flags;
 932         dma_addr_t mapping;
 933         u32 len_status;
 934         u16 queue;
 935         int ret;
 936
 937         queue = skb_get_queue_mapping(skb);
 938         txq = netdev_get_tx_queue(dev, queue);
 939         ring = &priv->tx_rings[queue];
 940
 941         /* lock against tx reclaim in BH context and TX ring full interrupt */
 942         spin_lock_irqsave(&ring->lock, flags);
 943         if (unlikely(ring->desc_count == 0)) {
 944                 netif_tx_stop_queue(txq);
 945                 netdev_err(dev, "queue %d awake and ring full!\n", queue);
 946                 ret = NETDEV_TX_BUSY;
 947                 goto out;
 948         }
 949
 950         /* Insert TSB and checksum infos */
 951         if (priv->tsb_en) {
 952                 skb = bcm_sysport_insert_tsb(skb, dev);
 953                 if (!skb) {
 954                         ret = NETDEV_TX_OK;
 955                         goto out;
 956                 }
 957         }
 958
 959         /* The Ethernet switch we are interfaced with needs packets to be at
 960          * least 64 bytes (including FCS) otherwise they will be discarded when
 961          * they enter the switch port logic. When Broadcom tags are enabled, we
 962          * need to make sure that packets are at least 68 bytes
 963          * (including FCS and tag) because the length verification is done after
 964          * the Broadcom tag is stripped off the ingress packet.
 965          */
 966         if (skb_padto(skb, ETH_ZLEN + ENET_BRCM_TAG_LEN)) {
 967                 ret = NETDEV_TX_OK;
 968                 goto out;
 969         }
 970
 971         skb_len = skb->len < ETH_ZLEN + ENET_BRCM_TAG_LEN ?
 972                         ETH_ZLEN + ENET_BRCM_TAG_LEN : skb->len;
 973
 974         mapping = dma_map_single(kdev, skb->data, skb_len, DMA_TO_DEVICE);
 975         if (dma_mapping_error(kdev, mapping)) {
 976                 netif_err(priv, tx_err, dev, "DMA map failed at %p (len=%d)\n",
 977                           skb->data, skb_len);
 978                 ret = NETDEV_TX_OK;
 979                 goto out;
 980         }
 981
 982         /* Remember the SKB for future freeing */
 983         cb = &ring->cbs[ring->curr_desc];
 984         cb->skb = skb;
 985         dma_unmap_addr_set(cb, dma_addr, mapping);
 986         dma_unmap_len_set(cb, dma_len, skb_len);
 987
 988         /* Fetch a descriptor entry from our pool */
 989         desc = ring->desc_cpu;
 990
 991         desc->addr_lo = lower_32_bits(mapping);
 992         len_status = upper_32_bits(mapping) & DESC_ADDR_HI_MASK;
 993         len_status |= (skb_len << DESC_LEN_SHIFT);
 994         len_status |= (DESC_SOP | DESC_EOP | TX_STATUS_APP_CRC) <<
 995                        DESC_STATUS_SHIFT;
 996         if (skb->ip_summed == CHECKSUM_PARTIAL)
 997                 len_status |= (DESC_L4_CSUM << DESC_STATUS_SHIFT);
 998
 999         ring->curr_desc++;
1000         if (ring->curr_desc == ring->size)
1001                 ring->curr_desc = 0;
1002         ring->desc_count--;
1003
1004         /* Ensure write completion of the descriptor status/length
1005          * in DRAM before the System Port WRITE_PORT register latches
1006          * the value
1007          */
1008         wmb();
1009         desc->addr_status_len = len_status;
1010         wmb();
1011
1012         /* Write this descriptor address to the RING write port */
1013         tdma_port_write_desc_addr(priv, desc, ring->index);
1014
1015         /* Check ring space and update SW control flow */
1016         if (ring->desc_count == 0)
1017                 netif_tx_stop_queue(txq);
1018
1019         netif_dbg(priv, tx_queued, dev, "ring=%d desc_count=%d, curr_desc=%d\n",
1020                   ring->index, ring->desc_count, ring->curr_desc);
1021
1022         ret = NETDEV_TX_OK;
1023 out:
1024         spin_unlock_irqrestore(&ring->lock, flags);
1025         return ret;
1026 }
1027
1028 static void bcm_sysport_tx_timeout(struct net_device *dev)
1029 {
1030         netdev_warn(dev, "transmit timeout!\n");
1031
1032         dev->trans_start = jiffies;
1033         dev->stats.tx_errors++;
1034
1035         netif_tx_wake_all_queues(dev);
1036 }
1037
1038 /* phylib adjust link callback */
1039 static void bcm_sysport_adj_link(struct net_device *dev)
1040 {
1041         struct bcm_sysport_priv *priv = netdev_priv(dev);
1042         struct phy_device *phydev = priv->phydev;
1043         unsigned int changed = 0;
1044         u32 cmd_bits = 0, reg;
1045
1046         if (priv->old_link != phydev->link) {
1047                 changed = 1;
1048                 priv->old_link = phydev->link;
1049         }
1050
1051         if (priv->old_duplex != phydev->duplex) {
1052                 changed = 1;
1053                 priv->old_duplex = phydev->duplex;
1054         }
1055
1056         switch (phydev->speed) {
1057         case SPEED_2500:
1058                 cmd_bits = CMD_SPEED_2500;
1059                 break;
1060         case SPEED_1000:
1061                 cmd_bits = CMD_SPEED_1000;
1062                 break;
1063         case SPEED_100:
1064                 cmd_bits = CMD_SPEED_100;
1065                 break;
1066         case SPEED_10:
1067                 cmd_bits = CMD_SPEED_10;
1068                 break;
1069         default:
1070                 break;
1071         }
1072         cmd_bits <<= CMD_SPEED_SHIFT;
1073
1074         if (phydev->duplex == DUPLEX_HALF)
1075                 cmd_bits |= CMD_HD_EN;
1076
1077         if (priv->old_pause != phydev->pause) {
1078                 changed = 1;
1079                 priv->old_pause = phydev->pause;
1080         }
1081
1082         if (!phydev->pause)
1083                 cmd_bits |= CMD_RX_PAUSE_IGNORE | CMD_TX_PAUSE_IGNORE;
1084
1085         if (!changed)
1086                 return;
1087
1088         if (phydev->link) {
1089                 reg = umac_readl(priv, UMAC_CMD);
1090                 reg &= ~((CMD_SPEED_MASK << CMD_SPEED_SHIFT) |
1091                         CMD_HD_EN | CMD_RX_PAUSE_IGNORE |
1092                         CMD_TX_PAUSE_IGNORE);
1093                 reg |= cmd_bits;
1094                 umac_writel(priv, reg, UMAC_CMD);
1095         }
1096
1097         phy_print_status(priv->phydev);
1098 }
1099
1100 static int bcm_sysport_init_tx_ring(struct bcm_sysport_priv *priv,
1101                                     unsigned int index)
1102 {
1103         struct bcm_sysport_tx_ring *ring = &priv->tx_rings[index];
1104         struct device *kdev = &priv->pdev->dev;
1105         size_t size;
1106         void *p;
1107         u32 reg;
1108
1109         /* Simple descriptors partitioning for now */
1110         size = 256;
1111
1112         /* We just need one DMA descriptor which is DMA-able, since writing to
1113          * the port will allocate a new descriptor in its internal linked-list
1114          */
1115         p = dma_zalloc_coherent(kdev, sizeof(struct dma_desc), &ring->desc_dma,
1116                                 GFP_KERNEL);
1117         if (!p) {
1118                 netif_err(priv, hw, priv->netdev, "DMA alloc failed\n");
1119                 return -ENOMEM;
1120         }
1121
1122         ring->cbs = kcalloc(size, sizeof(struct bcm_sysport_cb), GFP_KERNEL);
1123         if (!ring->cbs) {
1124                 netif_err(priv, hw, priv->netdev, "CB allocation failed\n");
1125                 return -ENOMEM;
1126         }
1127
1128         /* Initialize SW view of the ring */
1129         spin_lock_init(&ring->lock);
1130         ring->priv = priv;
1131         netif_napi_add(priv->netdev, &ring->napi, bcm_sysport_tx_poll, 64);
1132         ring->index = index;
1133         ring->size = size;
1134         ring->alloc_size = ring->size;
1135         ring->desc_cpu = p;
1136         ring->desc_count = ring->size;
1137         ring->curr_desc = 0;
1138
1139         /* Initialize HW ring */
1140         tdma_writel(priv, RING_EN, TDMA_DESC_RING_HEAD_TAIL_PTR(index));
1141         tdma_writel(priv, 0, TDMA_DESC_RING_COUNT(index));
1142         tdma_writel(priv, 1, TDMA_DESC_RING_INTR_CONTROL(index));
1143         tdma_writel(priv, 0, TDMA_DESC_RING_PROD_CONS_INDEX(index));
1144         tdma_writel(priv, RING_IGNORE_STATUS, TDMA_DESC_RING_MAPPING(index));
1145         tdma_writel(priv, 0, TDMA_DESC_RING_PCP_DEI_VID(index));
1146
1147         /* Program the number of descriptors as MAX_THRESHOLD and half of
1148          * its size for the hysteresis trigger
1149          */
1150         tdma_writel(priv, ring->size |
1151                         1 << RING_HYST_THRESH_SHIFT,
1152                         TDMA_DESC_RING_MAX_HYST(index));
1153
1154         /* Enable the ring queue in the arbiter */
1155         reg = tdma_readl(priv, TDMA_TIER1_ARB_0_QUEUE_EN);
1156         reg |= (1 << index);
1157         tdma_writel(priv, reg, TDMA_TIER1_ARB_0_QUEUE_EN);
1158
1159         napi_enable(&ring->napi);
1160
1161         netif_dbg(priv, hw, priv->netdev,
1162                   "TDMA cfg, size=%d, desc_cpu=%p\n",
1163                   ring->size, ring->desc_cpu);
1164
1165         return 0;
1166 }
1167
1168 static void bcm_sysport_fini_tx_ring(struct bcm_sysport_priv *priv,
1169                                      unsigned int index)
1170 {
1171         struct bcm_sysport_tx_ring *ring = &priv->tx_rings[index];
1172         struct device *kdev = &priv->pdev->dev;
1173         u32 reg;
1174
1175         /* Caller should stop the TDMA engine */
1176         reg = tdma_readl(priv, TDMA_STATUS);
1177         if (!(reg & TDMA_DISABLED))
1178                 netdev_warn(priv->netdev, "TDMA not stopped!\n");
1179
1180         /* ring->cbs is the last part in bcm_sysport_init_tx_ring which could
1181          * fail, so by checking this pointer we know whether the TX ring was
1182          * fully initialized or not.
1183          */
1184         if (!ring->cbs)
1185                 return;
1186
1187         napi_disable(&ring->napi);
1188         netif_napi_del(&ring->napi);
1189
1190         bcm_sysport_tx_reclaim(priv, ring);
1191
1192         kfree(ring->cbs);
1193         ring->cbs = NULL;
1194
1195         if (ring->desc_dma) {
1196                 dma_free_coherent(kdev, sizeof(struct dma_desc),
1197                                   ring->desc_cpu, ring->desc_dma);
1198                 ring->desc_dma = 0;
1199         }
1200         ring->size = 0;
1201         ring->alloc_size = 0;
1202
1203         netif_dbg(priv, hw, priv->netdev, "TDMA fini done\n");
1204 }
1205
1206 /* RDMA helper */
1207 static inline int rdma_enable_set(struct bcm_sysport_priv *priv,
1208                                   unsigned int enable)
1209 {
1210         unsigned int timeout = 1000;
1211         u32 reg;
1212
1213         reg = rdma_readl(priv, RDMA_CONTROL);
1214         if (enable)
1215                 reg |= RDMA_EN;
1216         else
1217                 reg &= ~RDMA_EN;
1218         rdma_writel(priv, reg, RDMA_CONTROL);
1219
1220         /* Poll for RMDA disabling completion */
1221         do {
1222                 reg = rdma_readl(priv, RDMA_STATUS);
1223                 if (!!(reg & RDMA_DISABLED) == !enable)
1224                         return 0;
1225                 usleep_range(1000, 2000);
1226         } while (timeout-- > 0);
1227
1228         netdev_err(priv->netdev, "timeout waiting for RDMA to finish\n");
1229
1230         return -ETIMEDOUT;
1231 }
1232
1233 /* TDMA helper */
1234 static inline int tdma_enable_set(struct bcm_sysport_priv *priv,
1235                                   unsigned int enable)
1236 {
1237         unsigned int timeout = 1000;
1238         u32 reg;
1239
1240         reg = tdma_readl(priv, TDMA_CONTROL);
1241         if (enable)
1242                 reg |= TDMA_EN;
1243         else
1244                 reg &= ~TDMA_EN;
1245         tdma_writel(priv, reg, TDMA_CONTROL);
1246
1247         /* Poll for TMDA disabling completion */
1248         do {
1249                 reg = tdma_readl(priv, TDMA_STATUS);
1250                 if (!!(reg & TDMA_DISABLED) == !enable)
1251                         return 0;
1252
1253                 usleep_range(1000, 2000);
1254         } while (timeout-- > 0);
1255
1256         netdev_err(priv->netdev, "timeout waiting for TDMA to finish\n");
1257
1258         return -ETIMEDOUT;
1259 }
1260
1261 static int bcm_sysport_init_rx_ring(struct bcm_sysport_priv *priv)
1262 {
1263         u32 reg;
1264         int ret;
1265
1266         /* Initialize SW view of the RX ring */
1267         priv->num_rx_bds = NUM_RX_DESC;
1268         priv->rx_bds = priv->base + SYS_PORT_RDMA_OFFSET;
1269         priv->rx_bd_assign_ptr = priv->rx_bds;
1270         priv->rx_bd_assign_index = 0;
1271         priv->rx_c_index = 0;
1272         priv->rx_read_ptr = 0;
1273         priv->rx_cbs = kcalloc(priv->num_rx_bds, sizeof(struct bcm_sysport_cb),
1274                                 GFP_KERNEL);
1275         if (!priv->rx_cbs) {
1276                 netif_err(priv, hw, priv->netdev, "CB allocation failed\n");
1277                 return -ENOMEM;
1278         }
1279
1280         ret = bcm_sysport_alloc_rx_bufs(priv);
1281         if (ret) {
1282                 netif_err(priv, hw, priv->netdev, "SKB allocation failed\n");
1283                 return ret;
1284         }
1285
1286         /* Initialize HW, ensure RDMA is disabled */
1287         reg = rdma_readl(priv, RDMA_STATUS);
1288         if (!(reg & RDMA_DISABLED))
1289                 rdma_enable_set(priv, 0);
1290
1291         rdma_writel(priv, 0, RDMA_WRITE_PTR_LO);
1292         rdma_writel(priv, 0, RDMA_WRITE_PTR_HI);
1293         rdma_writel(priv, 0, RDMA_PROD_INDEX);
1294         rdma_writel(priv, 0, RDMA_CONS_INDEX);
1295         rdma_writel(priv, priv->num_rx_bds << RDMA_RING_SIZE_SHIFT |
1296                           RX_BUF_LENGTH, RDMA_RING_BUF_SIZE);
1297         /* Operate the queue in ring mode */
1298         rdma_writel(priv, 0, RDMA_START_ADDR_HI);
1299         rdma_writel(priv, 0, RDMA_START_ADDR_LO);
1300         rdma_writel(priv, 0, RDMA_END_ADDR_HI);
1301         rdma_writel(priv, NUM_HW_RX_DESC_WORDS - 1, RDMA_END_ADDR_LO);
1302
1303         rdma_writel(priv, 1, RDMA_MBDONE_INTR);
1304
1305         netif_dbg(priv, hw, priv->netdev,
1306                   "RDMA cfg, num_rx_bds=%d, rx_bds=%p\n",
1307                   priv->num_rx_bds, priv->rx_bds);
1308
1309         return 0;
1310 }
1311
1312 static void bcm_sysport_fini_rx_ring(struct bcm_sysport_priv *priv)
1313 {
1314         struct bcm_sysport_cb *cb;
1315         unsigned int i;
1316         u32 reg;
1317
1318         /* Caller should ensure RDMA is disabled */
1319         reg = rdma_readl(priv, RDMA_STATUS);
1320         if (!(reg & RDMA_DISABLED))
1321                 netdev_warn(priv->netdev, "RDMA not stopped!\n");
1322
1323         for (i = 0; i < priv->num_rx_bds; i++) {
1324                 cb = &priv->rx_cbs[i];
1325                 if (dma_unmap_addr(cb, dma_addr))
1326                         dma_unmap_single(&priv->pdev->dev,
1327                                          dma_unmap_addr(cb, dma_addr),
1328                                          RX_BUF_LENGTH, DMA_FROM_DEVICE);
1329                 bcm_sysport_free_cb(cb);
1330         }
1331
1332         kfree(priv->rx_cbs);
1333         priv->rx_cbs = NULL;
1334
1335         netif_dbg(priv, hw, priv->netdev, "RDMA fini done\n");
1336 }
1337
1338 static void bcm_sysport_set_rx_mode(struct net_device *dev)
1339 {
1340         struct bcm_sysport_priv *priv = netdev_priv(dev);
1341         u32 reg;
1342
1343         reg = umac_readl(priv, UMAC_CMD);
1344         if (dev->flags & IFF_PROMISC)
1345                 reg |= CMD_PROMISC;
1346         else
1347                 reg &= ~CMD_PROMISC;
1348         umac_writel(priv, reg, UMAC_CMD);
1349
1350         /* No support for ALLMULTI */
1351         if (dev->flags & IFF_ALLMULTI)
1352                 return;
1353 }
1354
1355 static inline void umac_enable_set(struct bcm_sysport_priv *priv,
1356                                    u32 mask, unsigned int enable)
1357 {
1358         u32 reg;
1359
1360         reg = umac_readl(priv, UMAC_CMD);
1361         if (enable)
1362                 reg |= mask;
1363         else
1364                 reg &= ~mask;
1365         umac_writel(priv, reg, UMAC_CMD);
1366
1367         /* UniMAC stops on a packet boundary, wait for a full-sized packet
1368          * to be processed (1 msec).
1369          */
1370         if (enable == 0)
1371                 usleep_range(1000, 2000);
1372 }
1373
1374 static inline void umac_reset(struct bcm_sysport_priv *priv)
1375 {
1376         u32 reg;
1377
1378         reg = umac_readl(priv, UMAC_CMD);
1379         reg |= CMD_SW_RESET;
1380         umac_writel(priv, reg, UMAC_CMD);
1381         udelay(10);
1382         reg = umac_readl(priv, UMAC_CMD);
1383         reg &= ~CMD_SW_RESET;
1384         umac_writel(priv, reg, UMAC_CMD);
1385 }
1386
1387 static void umac_set_hw_addr(struct bcm_sysport_priv *priv,
1388                              unsigned char *addr)
1389 {
1390         umac_writel(priv, (addr[0] << 24) | (addr[1] << 16) |
1391                         (addr[2] << 8) | addr[3], UMAC_MAC0);
1392         umac_writel(priv, (addr[4] << 8) | addr[5], UMAC_MAC1);
1393 }
1394
1395 static void topctrl_flush(struct bcm_sysport_priv *priv)
1396 {
1397         topctrl_writel(priv, RX_FLUSH, RX_FLUSH_CNTL);
1398         topctrl_writel(priv, TX_FLUSH, TX_FLUSH_CNTL);
1399         mdelay(1);
1400         topctrl_writel(priv, 0, RX_FLUSH_CNTL);
1401         topctrl_writel(priv, 0, TX_FLUSH_CNTL);
1402 }
1403
1404 static void bcm_sysport_netif_start(struct net_device *dev)
1405 {
1406         struct bcm_sysport_priv *priv = netdev_priv(dev);
1407
1408         /* Enable NAPI */
1409         napi_enable(&priv->napi);
1410
1411         /* Enable RX interrupt and TX ring full interrupt */
1412         intrl2_0_mask_clear(priv, INTRL2_0_RDMA_MBDONE | INTRL2_0_TX_RING_FULL);
1413
1414         phy_start(priv->phydev);
1415
1416         /* Enable TX interrupts for the 32 TXQs */
1417         intrl2_1_mask_clear(priv, 0xffffffff);
1418
1419         /* Last call before we start the real business */
1420         netif_tx_start_all_queues(dev);
1421 }
1422
1423 static void rbuf_init(struct bcm_sysport_priv *priv)
1424 {
1425         u32 reg;
1426
1427         reg = rbuf_readl(priv, RBUF_CONTROL);
1428         reg |= RBUF_4B_ALGN | RBUF_RSB_EN;
1429         rbuf_writel(priv, reg, RBUF_CONTROL);
1430 }
1431
1432 static int bcm_sysport_open(struct net_device *dev)
1433 {
1434         struct bcm_sysport_priv *priv = netdev_priv(dev);
1435         unsigned int i;
1436         int ret;
1437
1438         /* Reset UniMAC */
1439         umac_reset(priv);
1440
1441         /* Flush TX and RX FIFOs at TOPCTRL level */
1442         topctrl_flush(priv);
1443
1444         /* Disable the UniMAC RX/TX */
1445         umac_enable_set(priv, CMD_RX_EN | CMD_TX_EN, 0);
1446
1447         /* Enable RBUF 2bytes alignment and Receive Status Block */
1448         rbuf_init(priv);
1449
1450         /* Set maximum frame length */
1451         umac_writel(priv, UMAC_MAX_MTU_SIZE, UMAC_MAX_FRAME_LEN);
1452
1453         /* Set MAC address */
1454         umac_set_hw_addr(priv, dev->dev_addr);
1455
1456         /* Read CRC forward */
1457         priv->crc_fwd = !!(umac_readl(priv, UMAC_CMD) & CMD_CRC_FWD);
1458
1459         priv->phydev = of_phy_connect(dev, priv->phy_dn, bcm_sysport_adj_link,
1460                                         0, priv->phy_interface);
1461         if (!priv->phydev) {
1462                 netdev_err(dev, "could not attach to PHY\n");
1463                 return -ENODEV;
1464         }
1465
1466         /* Reset house keeping link status */
1467         priv->old_duplex = -1;
1468         priv->old_link = -1;
1469         priv->old_pause = -1;
1470
1471         /* mask all interrupts and request them */
1472         intrl2_0_writel(priv, 0xffffffff, INTRL2_CPU_MASK_SET);
1473         intrl2_0_writel(priv, 0xffffffff, INTRL2_CPU_CLEAR);
1474         intrl2_0_writel(priv, 0, INTRL2_CPU_MASK_CLEAR);
1475         intrl2_1_writel(priv, 0xffffffff, INTRL2_CPU_MASK_SET);
1476         intrl2_1_writel(priv, 0xffffffff, INTRL2_CPU_CLEAR);
1477         intrl2_1_writel(priv, 0, INTRL2_CPU_MASK_CLEAR);
1478
1479         ret = request_irq(priv->irq0, bcm_sysport_rx_isr, 0, dev->name, dev);
1480         if (ret) {
1481                 netdev_err(dev, "failed to request RX interrupt\n");
1482                 goto out_phy_disconnect;
1483         }
1484
1485         ret = request_irq(priv->irq1, bcm_sysport_tx_isr, 0, dev->name, dev);
1486         if (ret) {
1487                 netdev_err(dev, "failed to request TX interrupt\n");
1488                 goto out_free_irq0;
1489         }
1490
1491         /* Initialize both hardware and software ring */
1492         for (i = 0; i < dev->num_tx_queues; i++) {
1493                 ret = bcm_sysport_init_tx_ring(priv, i);
1494                 if (ret) {
1495                         netdev_err(dev, "failed to initialize TX ring %d\n",
1496                                    i);
1497                         goto out_free_tx_ring;
1498                 }
1499         }
1500
1501         /* Initialize linked-list */
1502         tdma_writel(priv, TDMA_LL_RAM_INIT_BUSY, TDMA_STATUS);
1503
1504         /* Initialize RX ring */
1505         ret = bcm_sysport_init_rx_ring(priv);
1506         if (ret) {
1507                 netdev_err(dev, "failed to initialize RX ring\n");
1508                 goto out_free_rx_ring;
1509         }
1510
1511         /* Turn on RDMA */
1512         ret = rdma_enable_set(priv, 1);
1513         if (ret)
1514                 goto out_free_rx_ring;
1515
1516         /* Turn on TDMA */
1517         ret = tdma_enable_set(priv, 1);
1518         if (ret)
1519                 goto out_clear_rx_int;
1520
1521         /* Turn on UniMAC TX/RX */
1522         umac_enable_set(priv, CMD_RX_EN | CMD_TX_EN, 1);
1523
1524         bcm_sysport_netif_start(dev);
1525
1526         return 0;
1527
1528 out_clear_rx_int:
1529         intrl2_0_mask_set(priv, INTRL2_0_RDMA_MBDONE | INTRL2_0_TX_RING_FULL);
1530 out_free_rx_ring:
1531         bcm_sysport_fini_rx_ring(priv);
1532 out_free_tx_ring:
1533         for (i = 0; i < dev->num_tx_queues; i++)
1534                 bcm_sysport_fini_tx_ring(priv, i);
1535         free_irq(priv->irq1, dev);
1536 out_free_irq0:
1537         free_irq(priv->irq0, dev);
1538 out_phy_disconnect:
1539         phy_disconnect(priv->phydev);
1540         return ret;
1541 }
1542
1543 static void bcm_sysport_netif_stop(struct net_device *dev)
1544 {
1545         struct bcm_sysport_priv *priv = netdev_priv(dev);
1546
1547         /* stop all software from updating hardware */
1548         netif_tx_stop_all_queues(dev);
1549         napi_disable(&priv->napi);
1550         phy_stop(priv->phydev);
1551
1552         /* mask all interrupts */
1553         intrl2_0_mask_set(priv, 0xffffffff);
1554         intrl2_0_writel(priv, 0xffffffff, INTRL2_CPU_CLEAR);
1555         intrl2_1_mask_set(priv, 0xffffffff);
1556         intrl2_1_writel(priv, 0xffffffff, INTRL2_CPU_CLEAR);
1557 }
1558
1559 static int bcm_sysport_stop(struct net_device *dev)
1560 {
1561         struct bcm_sysport_priv *priv = netdev_priv(dev);
1562         unsigned int i;
1563         int ret;
1564
1565         bcm_sysport_netif_stop(dev);
1566
1567         /* Disable UniMAC RX */
1568         umac_enable_set(priv, CMD_RX_EN, 0);
1569
1570         ret = tdma_enable_set(priv, 0);
1571         if (ret) {
1572                 netdev_err(dev, "timeout disabling RDMA\n");
1573                 return ret;
1574         }
1575
1576         /* Wait for a maximum packet size to be drained */
1577         usleep_range(2000, 3000);
1578
1579         ret = rdma_enable_set(priv, 0);
1580         if (ret) {
1581                 netdev_err(dev, "timeout disabling TDMA\n");
1582                 return ret;
1583         }
1584
1585         /* Disable UniMAC TX */
1586         umac_enable_set(priv, CMD_TX_EN, 0);
1587
1588         /* Free RX/TX rings SW structures */
1589         for (i = 0; i < dev->num_tx_queues; i++)
1590                 bcm_sysport_fini_tx_ring(priv, i);
1591         bcm_sysport_fini_rx_ring(priv);
1592
1593         free_irq(priv->irq0, dev);
1594         free_irq(priv->irq1, dev);
1595
1596         /* Disconnect from PHY */
1597         phy_disconnect(priv->phydev);
1598
1599         return 0;
1600 }
1601
1602 static struct ethtool_ops bcm_sysport_ethtool_ops = {
1603         .get_settings           = bcm_sysport_get_settings,
1604         .set_settings           = bcm_sysport_set_settings,
1605         .get_drvinfo            = bcm_sysport_get_drvinfo,
1606         .get_msglevel           = bcm_sysport_get_msglvl,
1607         .set_msglevel           = bcm_sysport_set_msglvl,
1608         .get_link               = ethtool_op_get_link,
1609         .get_strings            = bcm_sysport_get_strings,
1610         .get_ethtool_stats      = bcm_sysport_get_stats,
1611         .get_sset_count         = bcm_sysport_get_sset_count,
1612         .get_wol                = bcm_sysport_get_wol,
1613         .set_wol                = bcm_sysport_set_wol,
1614 };
1615
1616 static const struct net_device_ops bcm_sysport_netdev_ops = {
1617         .ndo_start_xmit         = bcm_sysport_xmit,
1618         .ndo_tx_timeout         = bcm_sysport_tx_timeout,
1619         .ndo_open               = bcm_sysport_open,
1620         .ndo_stop               = bcm_sysport_stop,
1621         .ndo_set_features       = bcm_sysport_set_features,
1622         .ndo_set_rx_mode        = bcm_sysport_set_rx_mode,
1623 };
1624
1625 #define REV_FMT "v%2x.%02x"
1626
1627 static int bcm_sysport_probe(struct platform_device *pdev)
1628 {
1629         struct bcm_sysport_priv *priv;
1630         struct device_node *dn;
1631         struct net_device *dev;
1632         const void *macaddr;
1633         struct resource *r;
1634         u32 txq, rxq;
1635         int ret;
1636
1637         dn = pdev->dev.of_node;
1638         r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1639
1640         /* Read the Transmit/Receive Queue properties */
1641         if (of_property_read_u32(dn, "systemport,num-txq", &txq))
1642                 txq = TDMA_NUM_RINGS;
1643         if (of_property_read_u32(dn, "systemport,num-rxq", &rxq))
1644                 rxq = 1;
1645
1646         dev = alloc_etherdev_mqs(sizeof(*priv), txq, rxq);
1647         if (!dev)
1648                 return -ENOMEM;
1649
1650         /* Initialize private members */
1651         priv = netdev_priv(dev);
1652
1653         priv->irq0 = platform_get_irq(pdev, 0);
1654         priv->irq1 = platform_get_irq(pdev, 1);
1655         priv->wol_irq = platform_get_irq(pdev, 2);
1656         if (priv->irq0 <= 0 || priv->irq1 <= 0) {
1657                 dev_err(&pdev->dev, "invalid interrupts\n");
1658                 ret = -EINVAL;
1659                 goto err;
1660         }
1661
1662         priv->base = devm_ioremap_resource(&pdev->dev, r);
1663         if (IS_ERR(priv->base)) {
1664                 ret = PTR_ERR(priv->base);
1665                 goto err;
1666         }
1667
1668         priv->netdev = dev;
1669         priv->pdev = pdev;
1670
1671         priv->phy_interface = of_get_phy_mode(dn);
1672         /* Default to GMII interface mode */
1673         if (priv->phy_interface < 0)
1674                 priv->phy_interface = PHY_INTERFACE_MODE_GMII;
1675
1676         /* In the case of a fixed PHY, the DT node associated
1677          * to the PHY is the Ethernet MAC DT node.
1678          */
1679         if (of_phy_is_fixed_link(dn)) {
1680                 ret = of_phy_register_fixed_link(dn);
1681                 if (ret) {
1682                         dev_err(&pdev->dev, "failed to register fixed PHY\n");
1683                         goto err;
1684                 }
1685
1686                 priv->phy_dn = dn;
1687         }
1688
1689         /* Initialize netdevice members */
1690         macaddr = of_get_mac_address(dn);
1691         if (!macaddr || !is_valid_ether_addr(macaddr)) {
1692                 dev_warn(&pdev->dev, "using random Ethernet MAC\n");
1693                 random_ether_addr(dev->dev_addr);
1694         } else {
1695                 ether_addr_copy(dev->dev_addr, macaddr);
1696         }
1697
1698         SET_NETDEV_DEV(dev, &pdev->dev);
1699         dev_set_drvdata(&pdev->dev, dev);
1700         dev->ethtool_ops = &bcm_sysport_ethtool_ops;
1701         dev->netdev_ops = &bcm_sysport_netdev_ops;
1702         netif_napi_add(dev, &priv->napi, bcm_sysport_poll, 64);
1703
1704         /* HW supported features, none enabled by default */
1705         dev->hw_features |= NETIF_F_RXCSUM | NETIF_F_HIGHDMA |
1706                                 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM;
1707
1708         /* Request the WOL interrupt and advertise suspend if available */
1709         priv->wol_irq_disabled = 1;
1710         ret = devm_request_irq(&pdev->dev, priv->wol_irq,
1711                                bcm_sysport_wol_isr, 0, dev->name, priv);
1712         if (!ret)
1713                 device_set_wakeup_capable(&pdev->dev, 1);
1714
1715         /* Set the needed headroom once and for all */
1716         BUILD_BUG_ON(sizeof(struct bcm_tsb) != 8);
1717         dev->needed_headroom += sizeof(struct bcm_tsb);
1718
1719         /* libphy will adjust the link state accordingly */
1720         netif_carrier_off(dev);
1721
1722         ret = register_netdev(dev);
1723         if (ret) {
1724                 dev_err(&pdev->dev, "failed to register net_device\n");
1725                 goto err;
1726         }
1727
1728         priv->rev = topctrl_readl(priv, REV_CNTL) & REV_MASK;
1729         dev_info(&pdev->dev,
1730                  "Broadcom SYSTEMPORT" REV_FMT
1731                  " at 0x%p (irqs: %d, %d, TXQs: %d, RXQs: %d)\n",
1732                  (priv->rev >> 8) & 0xff, priv->rev & 0xff,
1733                  priv->base, priv->irq0, priv->irq1, txq, rxq);
1734
1735         return 0;
1736 err:
1737         free_netdev(dev);
1738         return ret;
1739 }
1740
1741 static int bcm_sysport_remove(struct platform_device *pdev)
1742 {
1743         struct net_device *dev = dev_get_drvdata(&pdev->dev);
1744
1745         /* Not much to do, ndo_close has been called
1746          * and we use managed allocations
1747          */
1748         unregister_netdev(dev);
1749         free_netdev(dev);
1750         dev_set_drvdata(&pdev->dev, NULL);
1751
1752         return 0;
1753 }
1754
1755 #ifdef CONFIG_PM_SLEEP
1756 static int bcm_sysport_suspend_to_wol(struct bcm_sysport_priv *priv)
1757 {
1758         struct net_device *ndev = priv->netdev;
1759         unsigned int timeout = 1000;
1760         u32 reg;
1761
1762         /* Password has already been programmed */
1763         reg = umac_readl(priv, UMAC_MPD_CTRL);
1764         reg |= MPD_EN;
1765         reg &= ~PSW_EN;
1766         if (priv->wolopts & WAKE_MAGICSECURE)
1767                 reg |= PSW_EN;
1768         umac_writel(priv, reg, UMAC_MPD_CTRL);
1769
1770         /* Make sure RBUF entered WoL mode as result */
1771         do {
1772                 reg = rbuf_readl(priv, RBUF_STATUS);
1773                 if (reg & RBUF_WOL_MODE)
1774                         break;
1775
1776                 udelay(10);
1777         } while (timeout-- > 0);
1778
1779         /* Do not leave the UniMAC RBUF matching only MPD packets */
1780         if (!timeout) {
1781                 reg = umac_readl(priv, UMAC_MPD_CTRL);
1782                 reg &= ~MPD_EN;
1783                 umac_writel(priv, reg, UMAC_MPD_CTRL);
1784                 netif_err(priv, wol, ndev, "failed to enter WOL mode\n");
1785                 return -ETIMEDOUT;
1786         }
1787
1788         /* UniMAC receive needs to be turned on */
1789         umac_enable_set(priv, CMD_RX_EN, 1);
1790
1791         /* Enable the interrupt wake-up source */
1792         intrl2_0_mask_clear(priv, INTRL2_0_MPD);
1793
1794         netif_dbg(priv, wol, ndev, "entered WOL mode\n");
1795
1796         return 0;
1797 }
1798
1799 static int bcm_sysport_suspend(struct device *d)
1800 {
1801         struct net_device *dev = dev_get_drvdata(d);
1802         struct bcm_sysport_priv *priv = netdev_priv(dev);
1803         unsigned int i;
1804         int ret = 0;
1805         u32 reg;
1806
1807         if (!netif_running(dev))
1808                 return 0;
1809
1810         bcm_sysport_netif_stop(dev);
1811
1812         phy_suspend(priv->phydev);
1813
1814         netif_device_detach(dev);
1815
1816         /* Disable UniMAC RX */
1817         umac_enable_set(priv, CMD_RX_EN, 0);
1818
1819         ret = rdma_enable_set(priv, 0);
1820         if (ret) {
1821                 netdev_err(dev, "RDMA timeout!\n");
1822                 return ret;
1823         }
1824
1825         /* Disable RXCHK if enabled */
1826         if (priv->rx_chk_en) {
1827                 reg = rxchk_readl(priv, RXCHK_CONTROL);
1828                 reg &= ~RXCHK_EN;
1829                 rxchk_writel(priv, reg, RXCHK_CONTROL);
1830         }
1831
1832         /* Flush RX pipe */
1833         if (!priv->wolopts)
1834                 topctrl_writel(priv, RX_FLUSH, RX_FLUSH_CNTL);
1835
1836         ret = tdma_enable_set(priv, 0);
1837         if (ret) {
1838                 netdev_err(dev, "TDMA timeout!\n");
1839                 return ret;
1840         }
1841
1842         /* Wait for a packet boundary */
1843         usleep_range(2000, 3000);
1844
1845         umac_enable_set(priv, CMD_TX_EN, 0);
1846
1847         topctrl_writel(priv, TX_FLUSH, TX_FLUSH_CNTL);
1848
1849         /* Free RX/TX rings SW structures */
1850         for (i = 0; i < dev->num_tx_queues; i++)
1851                 bcm_sysport_fini_tx_ring(priv, i);
1852         bcm_sysport_fini_rx_ring(priv);
1853
1854         /* Get prepared for Wake-on-LAN */
1855         if (device_may_wakeup(d) && priv->wolopts)
1856                 ret = bcm_sysport_suspend_to_wol(priv);
1857
1858         return ret;
1859 }
1860
1861 static int bcm_sysport_resume(struct device *d)
1862 {
1863         struct net_device *dev = dev_get_drvdata(d);
1864         struct bcm_sysport_priv *priv = netdev_priv(dev);
1865         unsigned int i;
1866         u32 reg;
1867         int ret;
1868
1869         if (!netif_running(dev))
1870                 return 0;
1871
1872         umac_reset(priv);
1873
1874         /* We may have been suspended and never received a WOL event that
1875          * would turn off MPD detection, take care of that now
1876          */
1877         bcm_sysport_resume_from_wol(priv);
1878
1879         /* Initialize both hardware and software ring */
1880         for (i = 0; i < dev->num_tx_queues; i++) {
1881                 ret = bcm_sysport_init_tx_ring(priv, i);
1882                 if (ret) {
1883                         netdev_err(dev, "failed to initialize TX ring %d\n",
1884                                    i);
1885                         goto out_free_tx_rings;
1886                 }
1887         }
1888
1889         /* Initialize linked-list */
1890         tdma_writel(priv, TDMA_LL_RAM_INIT_BUSY, TDMA_STATUS);
1891
1892         /* Initialize RX ring */
1893         ret = bcm_sysport_init_rx_ring(priv);
1894         if (ret) {
1895                 netdev_err(dev, "failed to initialize RX ring\n");
1896                 goto out_free_rx_ring;
1897         }
1898
1899         netif_device_attach(dev);
1900
1901         /* RX pipe enable */
1902         topctrl_writel(priv, 0, RX_FLUSH_CNTL);
1903
1904         ret = rdma_enable_set(priv, 1);
1905         if (ret) {
1906                 netdev_err(dev, "failed to enable RDMA\n");
1907                 goto out_free_rx_ring;
1908         }
1909
1910         /* Enable rxhck */
1911         if (priv->rx_chk_en) {
1912                 reg = rxchk_readl(priv, RXCHK_CONTROL);
1913                 reg |= RXCHK_EN;
1914                 rxchk_writel(priv, reg, RXCHK_CONTROL);
1915         }
1916
1917         rbuf_init(priv);
1918
1919         /* Set maximum frame length */
1920         umac_writel(priv, UMAC_MAX_MTU_SIZE, UMAC_MAX_FRAME_LEN);
1921
1922         /* Set MAC address */
1923         umac_set_hw_addr(priv, dev->dev_addr);
1924
1925         umac_enable_set(priv, CMD_RX_EN, 1);
1926
1927         /* TX pipe enable */
1928         topctrl_writel(priv, 0, TX_FLUSH_CNTL);
1929
1930         umac_enable_set(priv, CMD_TX_EN, 1);
1931
1932         ret = tdma_enable_set(priv, 1);
1933         if (ret) {
1934                 netdev_err(dev, "TDMA timeout!\n");
1935                 goto out_free_rx_ring;
1936         }
1937
1938         phy_resume(priv->phydev);
1939
1940         bcm_sysport_netif_start(dev);
1941
1942         return 0;
1943
1944 out_free_rx_ring:
1945         bcm_sysport_fini_rx_ring(priv);
1946 out_free_tx_rings:
1947         for (i = 0; i < dev->num_tx_queues; i++)
1948                 bcm_sysport_fini_tx_ring(priv, i);
1949         return ret;
1950 }
1951 #endif
1952
1953 static SIMPLE_DEV_PM_OPS(bcm_sysport_pm_ops,
1954                 bcm_sysport_suspend, bcm_sysport_resume);
1955
1956 static const struct of_device_id bcm_sysport_of_match[] = {
1957         { .compatible = "brcm,systemport-v1.00" },
1958         { .compatible = "brcm,systemport" },
1959         { /* sentinel */ }
1960 };
1961
1962 static struct platform_driver bcm_sysport_driver = {
1963         .probe  = bcm_sysport_probe,
1964         .remove = bcm_sysport_remove,
1965         .driver =  {
1966                 .name = "brcm-systemport",
1967                 .owner = THIS_MODULE,
1968                 .of_match_table = bcm_sysport_of_match,
1969                 .pm = &bcm_sysport_pm_ops,
1970         },
1971 };
1972 module_platform_driver(bcm_sysport_driver);
1973
1974 MODULE_AUTHOR("Broadcom Corporation");
1975 MODULE_DESCRIPTION("Broadcom System Port Ethernet MAC driver");
1976 MODULE_ALIAS("platform:brcm-systemport");
1977 MODULE_LICENSE("GPL");