drivers/net/ethernet/broadcom/bcmsysport.c

   1 /*
   2  * Broadcom BCM7xxx System Port Ethernet MAC driver
   3  *
   4  * Copyright (C) 2014 Broadcom Corporation
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License version 2 as
   8  * published by the Free Software Foundation.
   9  */
  10
  11 #define pr_fmt(fmt)     KBUILD_MODNAME ": " fmt
  12
  13 #include <linux/init.h>
  14 #include <linux/interrupt.h>
  15 #include <linux/module.h>
  16 #include <linux/kernel.h>
  17 #include <linux/netdevice.h>
  18 #include <linux/etherdevice.h>
  19 #include <linux/platform_device.h>
  20 #include <linux/of.h>
  21 #include <linux/of_net.h>
  22 #include <linux/of_mdio.h>
  23 #include <linux/phy.h>
  24 #include <linux/phy_fixed.h>
  25 #include <net/dsa.h>
  26 #include <net/ip.h>
  27 #include <net/ipv6.h>
  28
  29 #include "bcmsysport.h"
  30
  31 /* I/O accessors register helpers */
  32 #define BCM_SYSPORT_IO_MACRO(name, offset) \
  33 static inline u32 name##_readl(struct bcm_sysport_priv *priv, u32 off)  \
  34 {                                                                       \
  35         u32 reg = readl_relaxed(priv->base + offset + off);             \
  36         return reg;                                                     \
  37 }                                                                       \
  38 static inline void name##_writel(struct bcm_sysport_priv *priv,         \
  39                                   u32 val, u32 off)                     \
  40 {                                                                       \
  41         writel_relaxed(val, priv->base + offset + off);                 \
  42 }                                                                       \
  43
  44 BCM_SYSPORT_IO_MACRO(intrl2_0, SYS_PORT_INTRL2_0_OFFSET);
  45 BCM_SYSPORT_IO_MACRO(intrl2_1, SYS_PORT_INTRL2_1_OFFSET);
  46 BCM_SYSPORT_IO_MACRO(umac, SYS_PORT_UMAC_OFFSET);
  47 BCM_SYSPORT_IO_MACRO(gib, SYS_PORT_GIB_OFFSET);
  48 BCM_SYSPORT_IO_MACRO(tdma, SYS_PORT_TDMA_OFFSET);
  49 BCM_SYSPORT_IO_MACRO(rxchk, SYS_PORT_RXCHK_OFFSET);
  50 BCM_SYSPORT_IO_MACRO(txchk, SYS_PORT_TXCHK_OFFSET);
  51 BCM_SYSPORT_IO_MACRO(rbuf, SYS_PORT_RBUF_OFFSET);
  52 BCM_SYSPORT_IO_MACRO(tbuf, SYS_PORT_TBUF_OFFSET);
  53 BCM_SYSPORT_IO_MACRO(topctrl, SYS_PORT_TOPCTRL_OFFSET);
  54
  55 /* On SYSTEMPORT Lite, any register after RDMA_STATUS has the exact
  56  * same layout, except it has been moved by 4 bytes up, *sigh*
  57  */
  58 static inline u32 rdma_readl(struct bcm_sysport_priv *priv, u32 off)
  59 {
  60         if (priv->is_lite && off >= RDMA_STATUS)
  61                 off += 4;
  62         return readl_relaxed(priv->base + SYS_PORT_RDMA_OFFSET + off);
  63 }
  64
  65 static inline void rdma_writel(struct bcm_sysport_priv *priv, u32 val, u32 off)
  66 {
  67         if (priv->is_lite && off >= RDMA_STATUS)
  68                 off += 4;
  69         writel_relaxed(val, priv->base + SYS_PORT_RDMA_OFFSET + off);
  70 }
  71
  72 static inline u32 tdma_control_bit(struct bcm_sysport_priv *priv, u32 bit)
  73 {
  74         if (!priv->is_lite) {
  75                 return BIT(bit);
  76         } else {
  77                 if (bit >= ACB_ALGO)
  78                         return BIT(bit + 1);
  79                 else
  80                         return BIT(bit);
  81         }
  82 }
  83
  84 /* L2-interrupt masking/unmasking helpers, does automatic saving of the applied
  85  * mask in a software copy to avoid CPU_MASK_STATUS reads in hot-paths.
  86   */
  87 #define BCM_SYSPORT_INTR_L2(which)      \
  88 static inline void intrl2_##which##_mask_clear(struct bcm_sysport_priv *priv, \
  89                                                 u32 mask)               \
  90 {                                                                       \
  91         priv->irq##which##_mask &= ~(mask);                             \
  92         intrl2_##which##_writel(priv, mask, INTRL2_CPU_MASK_CLEAR);     \
  93 }                                                                       \
  94 static inline void intrl2_##which##_mask_set(struct bcm_sysport_priv *priv, \
  95                                                 u32 mask)               \
  96 {                                                                       \
  97         intrl2_## which##_writel(priv, mask, INTRL2_CPU_MASK_SET);      \
  98         priv->irq##which##_mask |= (mask);                              \
  99 }                                                                       \
 100
 101 BCM_SYSPORT_INTR_L2(0)
 102 BCM_SYSPORT_INTR_L2(1)
 103
 104 /* Register accesses to GISB/RBUS registers are expensive (few hundred
 105  * nanoseconds), so keep the check for 64-bits explicit here to save
 106  * one register write per-packet on 32-bits platforms.
 107  */
 108 static inline void dma_desc_set_addr(struct bcm_sysport_priv *priv,
 109                                      void __iomem *d,
 110                                      dma_addr_t addr)
 111 {
 112 #ifdef CONFIG_PHYS_ADDR_T_64BIT
 113         writel_relaxed(upper_32_bits(addr) & DESC_ADDR_HI_MASK,
 114                      d + DESC_ADDR_HI_STATUS_LEN);
 115 #endif
 116         writel_relaxed(lower_32_bits(addr), d + DESC_ADDR_LO);
 117 }
 118
 119 static inline void tdma_port_write_desc_addr(struct bcm_sysport_priv *priv,
 120                                              struct dma_desc *desc,
 121                                              unsigned int port)
 122 {
 123         /* Ports are latched, so write upper address first */
 124         tdma_writel(priv, desc->addr_status_len, TDMA_WRITE_PORT_HI(port));
 125         tdma_writel(priv, desc->addr_lo, TDMA_WRITE_PORT_LO(port));
 126 }
 127
 128 /* Ethtool operations */
 129 static int bcm_sysport_set_rx_csum(struct net_device *dev,
 130                                    netdev_features_t wanted)
 131 {
 132         struct bcm_sysport_priv *priv = netdev_priv(dev);
 133         u32 reg;
 134
 135         priv->rx_chk_en = !!(wanted & NETIF_F_RXCSUM);
 136         reg = rxchk_readl(priv, RXCHK_CONTROL);
 137         if (priv->rx_chk_en)
 138                 reg |= RXCHK_EN;
 139         else
 140                 reg &= ~RXCHK_EN;
 141
 142         /* If UniMAC forwards CRC, we need to skip over it to get
 143          * a valid CHK bit to be set in the per-packet status word
 144          */
 145         if (priv->rx_chk_en && priv->crc_fwd)
 146                 reg |= RXCHK_SKIP_FCS;
 147         else
 148                 reg &= ~RXCHK_SKIP_FCS;
 149
 150         /* If Broadcom tags are enabled (e.g: using a switch), make
 151          * sure we tell the RXCHK hardware to expect a 4-bytes Broadcom
 152          * tag after the Ethernet MAC Source Address.
 153          */
 154         if (netdev_uses_dsa(dev))
 155                 reg |= RXCHK_BRCM_TAG_EN;
 156         else
 157                 reg &= ~RXCHK_BRCM_TAG_EN;
 158
 159         rxchk_writel(priv, reg, RXCHK_CONTROL);
 160
 161         return 0;
 162 }
 163
 164 static int bcm_sysport_set_tx_csum(struct net_device *dev,
 165                                    netdev_features_t wanted)
 166 {
 167         struct bcm_sysport_priv *priv = netdev_priv(dev);
 168         u32 reg;
 169
 170         /* Hardware transmit checksum requires us to enable the Transmit status
 171          * block prepended to the packet contents
 172          */
 173         priv->tsb_en = !!(wanted & (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM));
 174         reg = tdma_readl(priv, TDMA_CONTROL);
 175         if (priv->tsb_en)
 176                 reg |= tdma_control_bit(priv, TSB_EN);
 177         else
 178                 reg &= ~tdma_control_bit(priv, TSB_EN);
 179         tdma_writel(priv, reg, TDMA_CONTROL);
 180
 181         return 0;
 182 }
 183
 184 static int bcm_sysport_set_features(struct net_device *dev,
 185                                     netdev_features_t features)
 186 {
 187         netdev_features_t changed = features ^ dev->features;
 188         netdev_features_t wanted = dev->wanted_features;
 189         int ret = 0;
 190
 191         if (changed & NETIF_F_RXCSUM)
 192                 ret = bcm_sysport_set_rx_csum(dev, wanted);
 193         if (changed & (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM))
 194                 ret = bcm_sysport_set_tx_csum(dev, wanted);
 195
 196         return ret;
 197 }
 198
 199 /* Hardware counters must be kept in sync because the order/offset
 200  * is important here (order in structure declaration = order in hardware)
 201  */
 202 static const struct bcm_sysport_stats bcm_sysport_gstrings_stats[] = {
 203         /* general stats */
 204         STAT_NETDEV64(rx_packets),
 205         STAT_NETDEV64(tx_packets),
 206         STAT_NETDEV64(rx_bytes),
 207         STAT_NETDEV64(tx_bytes),
 208         STAT_NETDEV(rx_errors),
 209         STAT_NETDEV(tx_errors),
 210         STAT_NETDEV(rx_dropped),
 211         STAT_NETDEV(tx_dropped),
 212         STAT_NETDEV(multicast),
 213         /* UniMAC RSV counters */
 214         STAT_MIB_RX("rx_64_octets", mib.rx.pkt_cnt.cnt_64),
 215         STAT_MIB_RX("rx_65_127_oct", mib.rx.pkt_cnt.cnt_127),
 216         STAT_MIB_RX("rx_128_255_oct", mib.rx.pkt_cnt.cnt_255),
 217         STAT_MIB_RX("rx_256_511_oct", mib.rx.pkt_cnt.cnt_511),
 218         STAT_MIB_RX("rx_512_1023_oct", mib.rx.pkt_cnt.cnt_1023),
 219         STAT_MIB_RX("rx_1024_1518_oct", mib.rx.pkt_cnt.cnt_1518),
 220         STAT_MIB_RX("rx_vlan_1519_1522_oct", mib.rx.pkt_cnt.cnt_mgv),
 221         STAT_MIB_RX("rx_1522_2047_oct", mib.rx.pkt_cnt.cnt_2047),
 222         STAT_MIB_RX("rx_2048_4095_oct", mib.rx.pkt_cnt.cnt_4095),
 223         STAT_MIB_RX("rx_4096_9216_oct", mib.rx.pkt_cnt.cnt_9216),
 224         STAT_MIB_RX("rx_pkts", mib.rx.pkt),
 225         STAT_MIB_RX("rx_bytes", mib.rx.bytes),
 226         STAT_MIB_RX("rx_multicast", mib.rx.mca),
 227         STAT_MIB_RX("rx_broadcast", mib.rx.bca),
 228         STAT_MIB_RX("rx_fcs", mib.rx.fcs),
 229         STAT_MIB_RX("rx_control", mib.rx.cf),
 230         STAT_MIB_RX("rx_pause", mib.rx.pf),
 231         STAT_MIB_RX("rx_unknown", mib.rx.uo),
 232         STAT_MIB_RX("rx_align", mib.rx.aln),
 233         STAT_MIB_RX("rx_outrange", mib.rx.flr),
 234         STAT_MIB_RX("rx_code", mib.rx.cde),
 235         STAT_MIB_RX("rx_carrier", mib.rx.fcr),
 236         STAT_MIB_RX("rx_oversize", mib.rx.ovr),
 237         STAT_MIB_RX("rx_jabber", mib.rx.jbr),
 238         STAT_MIB_RX("rx_mtu_err", mib.rx.mtue),
 239         STAT_MIB_RX("rx_good_pkts", mib.rx.pok),
 240         STAT_MIB_RX("rx_unicast", mib.rx.uc),
 241         STAT_MIB_RX("rx_ppp", mib.rx.ppp),
 242         STAT_MIB_RX("rx_crc", mib.rx.rcrc),
 243         /* UniMAC TSV counters */
 244         STAT_MIB_TX("tx_64_octets", mib.tx.pkt_cnt.cnt_64),
 245         STAT_MIB_TX("tx_65_127_oct", mib.tx.pkt_cnt.cnt_127),
 246         STAT_MIB_TX("tx_128_255_oct", mib.tx.pkt_cnt.cnt_255),
 247         STAT_MIB_TX("tx_256_511_oct", mib.tx.pkt_cnt.cnt_511),
 248         STAT_MIB_TX("tx_512_1023_oct", mib.tx.pkt_cnt.cnt_1023),
 249         STAT_MIB_TX("tx_1024_1518_oct", mib.tx.pkt_cnt.cnt_1518),
 250         STAT_MIB_TX("tx_vlan_1519_1522_oct", mib.tx.pkt_cnt.cnt_mgv),
 251         STAT_MIB_TX("tx_1522_2047_oct", mib.tx.pkt_cnt.cnt_2047),
 252         STAT_MIB_TX("tx_2048_4095_oct", mib.tx.pkt_cnt.cnt_4095),
 253         STAT_MIB_TX("tx_4096_9216_oct", mib.tx.pkt_cnt.cnt_9216),
 254         STAT_MIB_TX("tx_pkts", mib.tx.pkts),
 255         STAT_MIB_TX("tx_multicast", mib.tx.mca),
 256         STAT_MIB_TX("tx_broadcast", mib.tx.bca),
 257         STAT_MIB_TX("tx_pause", mib.tx.pf),
 258         STAT_MIB_TX("tx_control", mib.tx.cf),
 259         STAT_MIB_TX("tx_fcs_err", mib.tx.fcs),
 260         STAT_MIB_TX("tx_oversize", mib.tx.ovr),
 261         STAT_MIB_TX("tx_defer", mib.tx.drf),
 262         STAT_MIB_TX("tx_excess_defer", mib.tx.edf),
 263         STAT_MIB_TX("tx_single_col", mib.tx.scl),
 264         STAT_MIB_TX("tx_multi_col", mib.tx.mcl),
 265         STAT_MIB_TX("tx_late_col", mib.tx.lcl),
 266         STAT_MIB_TX("tx_excess_col", mib.tx.ecl),
 267         STAT_MIB_TX("tx_frags", mib.tx.frg),
 268         STAT_MIB_TX("tx_total_col", mib.tx.ncl),
 269         STAT_MIB_TX("tx_jabber", mib.tx.jbr),
 270         STAT_MIB_TX("tx_bytes", mib.tx.bytes),
 271         STAT_MIB_TX("tx_good_pkts", mib.tx.pok),
 272         STAT_MIB_TX("tx_unicast", mib.tx.uc),
 273         /* UniMAC RUNT counters */
 274         STAT_RUNT("rx_runt_pkts", mib.rx_runt_cnt),
 275         STAT_RUNT("rx_runt_valid_fcs", mib.rx_runt_fcs),
 276         STAT_RUNT("rx_runt_inval_fcs_align", mib.rx_runt_fcs_align),
 277         STAT_RUNT("rx_runt_bytes", mib.rx_runt_bytes),
 278         /* RXCHK misc statistics */
 279         STAT_RXCHK("rxchk_bad_csum", mib.rxchk_bad_csum, RXCHK_BAD_CSUM_CNTR),
 280         STAT_RXCHK("rxchk_other_pkt_disc", mib.rxchk_other_pkt_disc,
 281                    RXCHK_OTHER_DISC_CNTR),
 282         /* RBUF misc statistics */
 283         STAT_RBUF("rbuf_ovflow_cnt", mib.rbuf_ovflow_cnt, RBUF_OVFL_DISC_CNTR),
 284         STAT_RBUF("rbuf_err_cnt", mib.rbuf_err_cnt, RBUF_ERR_PKT_CNTR),
 285         STAT_MIB_SOFT("alloc_rx_buff_failed", mib.alloc_rx_buff_failed),
 286         STAT_MIB_SOFT("rx_dma_failed", mib.rx_dma_failed),
 287         STAT_MIB_SOFT("tx_dma_failed", mib.tx_dma_failed),
 288         /* Per TX-queue statistics are dynamically appended */
 289 };
 290
 291 #define BCM_SYSPORT_STATS_LEN   ARRAY_SIZE(bcm_sysport_gstrings_stats)
 292
 293 static void bcm_sysport_get_drvinfo(struct net_device *dev,
 294                                     struct ethtool_drvinfo *info)
 295 {
 296         strlcpy(info->driver, KBUILD_MODNAME, sizeof(info->driver));
 297         strlcpy(info->version, "0.1", sizeof(info->version));
 298         strlcpy(info->bus_info, "platform", sizeof(info->bus_info));
 299 }
 300
 301 static u32 bcm_sysport_get_msglvl(struct net_device *dev)
 302 {
 303         struct bcm_sysport_priv *priv = netdev_priv(dev);
 304
 305         return priv->msg_enable;
 306 }
 307
 308 static void bcm_sysport_set_msglvl(struct net_device *dev, u32 enable)
 309 {
 310         struct bcm_sysport_priv *priv = netdev_priv(dev);
 311
 312         priv->msg_enable = enable;
 313 }
 314
 315 static inline bool bcm_sysport_lite_stat_valid(enum bcm_sysport_stat_type type)
 316 {
 317         switch (type) {
 318         case BCM_SYSPORT_STAT_NETDEV:
 319         case BCM_SYSPORT_STAT_NETDEV64:
 320         case BCM_SYSPORT_STAT_RXCHK:
 321         case BCM_SYSPORT_STAT_RBUF:
 322         case BCM_SYSPORT_STAT_SOFT:
 323                 return true;
 324         default:
 325                 return false;
 326         }
 327 }
 328
 329 static int bcm_sysport_get_sset_count(struct net_device *dev, int string_set)
 330 {
 331         struct bcm_sysport_priv *priv = netdev_priv(dev);
 332         const struct bcm_sysport_stats *s;
 333         unsigned int i, j;
 334
 335         switch (string_set) {
 336         case ETH_SS_STATS:
 337                 for (i = 0, j = 0; i < BCM_SYSPORT_STATS_LEN; i++) {
 338                         s = &bcm_sysport_gstrings_stats[i];
 339                         if (priv->is_lite &&
 340                             !bcm_sysport_lite_stat_valid(s->type))
 341                                 continue;
 342                         j++;
 343                 }
 344                 /* Include per-queue statistics */
 345                 return j + dev->num_tx_queues * NUM_SYSPORT_TXQ_STAT;
 346         default:
 347                 return -EOPNOTSUPP;
 348         }
 349 }
 350
 351 static void bcm_sysport_get_strings(struct net_device *dev,
 352                                     u32 stringset, u8 *data)
 353 {
 354         struct bcm_sysport_priv *priv = netdev_priv(dev);
 355         const struct bcm_sysport_stats *s;
 356         char buf[128];
 357         int i, j;
 358
 359         switch (stringset) {
 360         case ETH_SS_STATS:
 361                 for (i = 0, j = 0; i < BCM_SYSPORT_STATS_LEN; i++) {
 362                         s = &bcm_sysport_gstrings_stats[i];
 363                         if (priv->is_lite &&
 364                             !bcm_sysport_lite_stat_valid(s->type))
 365                                 continue;
 366
 367                         memcpy(data + j * ETH_GSTRING_LEN, s->stat_string,
 368                                ETH_GSTRING_LEN);
 369                         j++;
 370                 }
 371
 372                 for (i = 0; i < dev->num_tx_queues; i++) {
 373                         snprintf(buf, sizeof(buf), "txq%d_packets", i);
 374                         memcpy(data + j * ETH_GSTRING_LEN, buf,
 375                                ETH_GSTRING_LEN);
 376                         j++;
 377
 378                         snprintf(buf, sizeof(buf), "txq%d_bytes", i);
 379                         memcpy(data + j * ETH_GSTRING_LEN, buf,
 380                                ETH_GSTRING_LEN);
 381                         j++;
 382                 }
 383                 break;
 384         default:
 385                 break;
 386         }
 387 }
 388
 389 static void bcm_sysport_update_mib_counters(struct bcm_sysport_priv *priv)
 390 {
 391         int i, j = 0;
 392
 393         for (i = 0; i < BCM_SYSPORT_STATS_LEN; i++) {
 394                 const struct bcm_sysport_stats *s;
 395                 u8 offset = 0;
 396                 u32 val = 0;
 397                 char *p;
 398
 399                 s = &bcm_sysport_gstrings_stats[i];
 400                 switch (s->type) {
 401                 case BCM_SYSPORT_STAT_NETDEV:
 402                 case BCM_SYSPORT_STAT_NETDEV64:
 403                 case BCM_SYSPORT_STAT_SOFT:
 404                         continue;
 405                 case BCM_SYSPORT_STAT_MIB_RX:
 406                 case BCM_SYSPORT_STAT_MIB_TX:
 407                 case BCM_SYSPORT_STAT_RUNT:
 408                         if (priv->is_lite)
 409                                 continue;
 410
 411                         if (s->type != BCM_SYSPORT_STAT_MIB_RX)
 412                                 offset = UMAC_MIB_STAT_OFFSET;
 413                         val = umac_readl(priv, UMAC_MIB_START + j + offset);
 414                         break;
 415                 case BCM_SYSPORT_STAT_RXCHK:
 416                         val = rxchk_readl(priv, s->reg_offset);
 417                         if (val == ~0)
 418                                 rxchk_writel(priv, 0, s->reg_offset);
 419                         break;
 420                 case BCM_SYSPORT_STAT_RBUF:
 421                         val = rbuf_readl(priv, s->reg_offset);
 422                         if (val == ~0)
 423                                 rbuf_writel(priv, 0, s->reg_offset);
 424                         break;
 425                 }
 426
 427                 j += s->stat_sizeof;
 428                 p = (char *)priv + s->stat_offset;
 429                 *(u32 *)p = val;
 430         }
 431
 432         netif_dbg(priv, hw, priv->netdev, "updated MIB counters\n");
 433 }
 434
 435 static void bcm_sysport_update_tx_stats(struct bcm_sysport_priv *priv,
 436                                         u64 *tx_bytes, u64 *tx_packets)
 437 {
 438         struct bcm_sysport_tx_ring *ring;
 439         u64 bytes = 0, packets = 0;
 440         unsigned int start;
 441         unsigned int q;
 442
 443         for (q = 0; q < priv->netdev->num_tx_queues; q++) {
 444                 ring = &priv->tx_rings[q];
 445                 do {
 446                         start = u64_stats_fetch_begin_irq(&priv->syncp);
 447                         bytes = ring->bytes;
 448                         packets = ring->packets;
 449                 } while (u64_stats_fetch_retry_irq(&priv->syncp, start));
 450
 451                 *tx_bytes += bytes;
 452                 *tx_packets += packets;
 453         }
 454 }
 455
 456 static void bcm_sysport_get_stats(struct net_device *dev,
 457                                   struct ethtool_stats *stats, u64 *data)
 458 {
 459         struct bcm_sysport_priv *priv = netdev_priv(dev);
 460         struct bcm_sysport_stats64 *stats64 = &priv->stats64;
 461         struct u64_stats_sync *syncp = &priv->syncp;
 462         struct bcm_sysport_tx_ring *ring;
 463         u64 tx_bytes = 0, tx_packets = 0;
 464         unsigned int start;
 465         int i, j;
 466
 467         if (netif_running(dev)) {
 468                 bcm_sysport_update_mib_counters(priv);
 469                 bcm_sysport_update_tx_stats(priv, &tx_bytes, &tx_packets);
 470                 stats64->tx_bytes = tx_bytes;
 471                 stats64->tx_packets = tx_packets;
 472         }
 473
 474         for (i =  0, j = 0; i < BCM_SYSPORT_STATS_LEN; i++) {
 475                 const struct bcm_sysport_stats *s;
 476                 char *p;
 477
 478                 s = &bcm_sysport_gstrings_stats[i];
 479                 if (s->type == BCM_SYSPORT_STAT_NETDEV)
 480                         p = (char *)&dev->stats;
 481                 else if (s->type == BCM_SYSPORT_STAT_NETDEV64)
 482                         p = (char *)stats64;
 483                 else
 484                         p = (char *)priv;
 485
 486                 if (priv->is_lite && !bcm_sysport_lite_stat_valid(s->type))
 487                         continue;
 488                 p += s->stat_offset;
 489
 490                 if (s->stat_sizeof == sizeof(u64) &&
 491                     s->type == BCM_SYSPORT_STAT_NETDEV64) {
 492                         do {
 493                                 start = u64_stats_fetch_begin_irq(syncp);
 494                                 data[i] = *(u64 *)p;
 495                         } while (u64_stats_fetch_retry_irq(syncp, start));
 496                 } else
 497                         data[i] = *(u32 *)p;
 498                 j++;
 499         }
 500
 501         /* For SYSTEMPORT Lite since we have holes in our statistics, j would
 502          * be equal to BCM_SYSPORT_STATS_LEN at the end of the loop, but it
 503          * needs to point to how many total statistics we have minus the
 504          * number of per TX queue statistics
 505          */
 506         j = bcm_sysport_get_sset_count(dev, ETH_SS_STATS) -
 507             dev->num_tx_queues * NUM_SYSPORT_TXQ_STAT;
 508
 509         for (i = 0; i < dev->num_tx_queues; i++) {
 510                 ring = &priv->tx_rings[i];
 511                 data[j] = ring->packets;
 512                 j++;
 513                 data[j] = ring->bytes;
 514                 j++;
 515         }
 516 }
 517
 518 static void bcm_sysport_get_wol(struct net_device *dev,
 519                                 struct ethtool_wolinfo *wol)
 520 {
 521         struct bcm_sysport_priv *priv = netdev_priv(dev);
 522         u32 reg;
 523
 524         wol->supported = WAKE_MAGIC | WAKE_MAGICSECURE;
 525         wol->wolopts = priv->wolopts;
 526
 527         if (!(priv->wolopts & WAKE_MAGICSECURE))
 528                 return;
 529
 530         /* Return the programmed SecureOn password */
 531         reg = umac_readl(priv, UMAC_PSW_MS);
 532         put_unaligned_be16(reg, &wol->sopass[0]);
 533         reg = umac_readl(priv, UMAC_PSW_LS);
 534         put_unaligned_be32(reg, &wol->sopass[2]);
 535 }
 536
 537 static int bcm_sysport_set_wol(struct net_device *dev,
 538                                struct ethtool_wolinfo *wol)
 539 {
 540         struct bcm_sysport_priv *priv = netdev_priv(dev);
 541         struct device *kdev = &priv->pdev->dev;
 542         u32 supported = WAKE_MAGIC | WAKE_MAGICSECURE;
 543
 544         if (!device_can_wakeup(kdev))
 545                 return -ENOTSUPP;
 546
 547         if (wol->wolopts & ~supported)
 548                 return -EINVAL;
 549
 550         /* Program the SecureOn password */
 551         if (wol->wolopts & WAKE_MAGICSECURE) {
 552                 umac_writel(priv, get_unaligned_be16(&wol->sopass[0]),
 553                             UMAC_PSW_MS);
 554                 umac_writel(priv, get_unaligned_be32(&wol->sopass[2]),
 555                             UMAC_PSW_LS);
 556         }
 557
 558         /* Flag the device and relevant IRQ as wakeup capable */
 559         if (wol->wolopts) {
 560                 device_set_wakeup_enable(kdev, 1);
 561                 if (priv->wol_irq_disabled)
 562                         enable_irq_wake(priv->wol_irq);
 563                 priv->wol_irq_disabled = 0;
 564         } else {
 565                 device_set_wakeup_enable(kdev, 0);
 566                 /* Avoid unbalanced disable_irq_wake calls */
 567                 if (!priv->wol_irq_disabled)
 568                         disable_irq_wake(priv->wol_irq);
 569                 priv->wol_irq_disabled = 1;
 570         }
 571
 572         priv->wolopts = wol->wolopts;
 573
 574         return 0;
 575 }
 576
 577 static void bcm_sysport_set_rx_coalesce(struct bcm_sysport_priv *priv,
 578                                         u32 usecs, u32 pkts)
 579 {
 580         u32 reg;
 581
 582         reg = rdma_readl(priv, RDMA_MBDONE_INTR);
 583         reg &= ~(RDMA_INTR_THRESH_MASK |
 584                  RDMA_TIMEOUT_MASK << RDMA_TIMEOUT_SHIFT);
 585         reg |= pkts;
 586         reg |= DIV_ROUND_UP(usecs * 1000, 8192) << RDMA_TIMEOUT_SHIFT;
 587         rdma_writel(priv, reg, RDMA_MBDONE_INTR);
 588 }
 589
 590 static void bcm_sysport_set_tx_coalesce(struct bcm_sysport_tx_ring *ring,
 591                                         struct ethtool_coalesce *ec)
 592 {
 593         struct bcm_sysport_priv *priv = ring->priv;
 594         u32 reg;
 595
 596         reg = tdma_readl(priv, TDMA_DESC_RING_INTR_CONTROL(ring->index));
 597         reg &= ~(RING_INTR_THRESH_MASK |
 598                  RING_TIMEOUT_MASK << RING_TIMEOUT_SHIFT);
 599         reg |= ec->tx_max_coalesced_frames;
 600         reg |= DIV_ROUND_UP(ec->tx_coalesce_usecs * 1000, 8192) <<
 601                             RING_TIMEOUT_SHIFT;
 602         tdma_writel(priv, reg, TDMA_DESC_RING_INTR_CONTROL(ring->index));
 603 }
 604
 605 static int bcm_sysport_get_coalesce(struct net_device *dev,
 606                                     struct ethtool_coalesce *ec)
 607 {
 608         struct bcm_sysport_priv *priv = netdev_priv(dev);
 609         u32 reg;
 610
 611         reg = tdma_readl(priv, TDMA_DESC_RING_INTR_CONTROL(0));
 612
 613         ec->tx_coalesce_usecs = (reg >> RING_TIMEOUT_SHIFT) * 8192 / 1000;
 614         ec->tx_max_coalesced_frames = reg & RING_INTR_THRESH_MASK;
 615
 616         reg = rdma_readl(priv, RDMA_MBDONE_INTR);
 617
 618         ec->rx_coalesce_usecs = (reg >> RDMA_TIMEOUT_SHIFT) * 8192 / 1000;
 619         ec->rx_max_coalesced_frames = reg & RDMA_INTR_THRESH_MASK;
 620         ec->use_adaptive_rx_coalesce = priv->dim.use_dim;
 621
 622         return 0;
 623 }
 624
 625 static int bcm_sysport_set_coalesce(struct net_device *dev,
 626                                     struct ethtool_coalesce *ec)
 627 {
 628         struct bcm_sysport_priv *priv = netdev_priv(dev);
 629         struct net_dim_cq_moder moder;
 630         u32 usecs, pkts;
 631         unsigned int i;
 632
 633         /* Base system clock is 125Mhz, DMA timeout is this reference clock
 634          * divided by 1024, which yield roughly 8.192 us, our maximum value has
 635          * to fit in the RING_TIMEOUT_MASK (16 bits).
 636          */
 637         if (ec->tx_max_coalesced_frames > RING_INTR_THRESH_MASK ||
 638             ec->tx_coalesce_usecs > (RING_TIMEOUT_MASK * 8) + 1 ||
 639             ec->rx_max_coalesced_frames > RDMA_INTR_THRESH_MASK ||
 640             ec->rx_coalesce_usecs > (RDMA_TIMEOUT_MASK * 8) + 1)
 641                 return -EINVAL;
 642
 643         if ((ec->tx_coalesce_usecs == 0 && ec->tx_max_coalesced_frames == 0) ||
 644             (ec->rx_coalesce_usecs == 0 && ec->rx_max_coalesced_frames == 0) ||
 645             ec->use_adaptive_tx_coalesce)
 646                 return -EINVAL;
 647
 648         for (i = 0; i < dev->num_tx_queues; i++)
 649                 bcm_sysport_set_tx_coalesce(&priv->tx_rings[i], ec);
 650
 651         priv->rx_coalesce_usecs = ec->rx_coalesce_usecs;
 652         priv->rx_max_coalesced_frames = ec->rx_max_coalesced_frames;
 653         usecs = priv->rx_coalesce_usecs;
 654         pkts = priv->rx_max_coalesced_frames;
 655
 656         if (ec->use_adaptive_rx_coalesce && !priv->dim.use_dim) {
 657                 moder = net_dim_get_def_profile(priv->dim.dim.mode);
 658                 usecs = moder.usec;
 659                 pkts = moder.pkts;
 660         }
 661
 662         priv->dim.use_dim = ec->use_adaptive_rx_coalesce;
 663
 664         /* Apply desired coalescing parameters */
 665         bcm_sysport_set_rx_coalesce(priv, usecs, pkts);
 666
 667         return 0;
 668 }
 669
 670 static void bcm_sysport_free_cb(struct bcm_sysport_cb *cb)
 671 {
 672         dev_consume_skb_any(cb->skb);
 673         cb->skb = NULL;
 674         dma_unmap_addr_set(cb, dma_addr, 0);
 675 }
 676
 677 static struct sk_buff *bcm_sysport_rx_refill(struct bcm_sysport_priv *priv,
 678                                              struct bcm_sysport_cb *cb)
 679 {
 680         struct device *kdev = &priv->pdev->dev;
 681         struct net_device *ndev = priv->netdev;
 682         struct sk_buff *skb, *rx_skb;
 683         dma_addr_t mapping;
 684
 685         /* Allocate a new SKB for a new packet */
 686         skb = netdev_alloc_skb(priv->netdev, RX_BUF_LENGTH);
 687         if (!skb) {
 688                 priv->mib.alloc_rx_buff_failed++;
 689                 netif_err(priv, rx_err, ndev, "SKB alloc failed\n");
 690                 return NULL;
 691         }
 692
 693         mapping = dma_map_single(kdev, skb->data,
 694                                  RX_BUF_LENGTH, DMA_FROM_DEVICE);
 695         if (dma_mapping_error(kdev, mapping)) {
 696                 priv->mib.rx_dma_failed++;
 697                 dev_kfree_skb_any(skb);
 698                 netif_err(priv, rx_err, ndev, "DMA mapping failure\n");
 699                 return NULL;
 700         }
 701
 702         /* Grab the current SKB on the ring */
 703         rx_skb = cb->skb;
 704         if (likely(rx_skb))
 705                 dma_unmap_single(kdev, dma_unmap_addr(cb, dma_addr),
 706                                  RX_BUF_LENGTH, DMA_FROM_DEVICE);
 707
 708         /* Put the new SKB on the ring */
 709         cb->skb = skb;
 710         dma_unmap_addr_set(cb, dma_addr, mapping);
 711         dma_desc_set_addr(priv, cb->bd_addr, mapping);
 712
 713         netif_dbg(priv, rx_status, ndev, "RX refill\n");
 714
 715         /* Return the current SKB to the caller */
 716         return rx_skb;
 717 }
 718
 719 static int bcm_sysport_alloc_rx_bufs(struct bcm_sysport_priv *priv)
 720 {
 721         struct bcm_sysport_cb *cb;
 722         struct sk_buff *skb;
 723         unsigned int i;
 724
 725         for (i = 0; i < priv->num_rx_bds; i++) {
 726                 cb = &priv->rx_cbs[i];
 727                 skb = bcm_sysport_rx_refill(priv, cb);
 728                 if (skb)
 729                         dev_kfree_skb(skb);
 730                 if (!cb->skb)
 731                         return -ENOMEM;
 732         }
 733
 734         return 0;
 735 }
 736
 737 /* Poll the hardware for up to budget packets to process */
 738 static unsigned int bcm_sysport_desc_rx(struct bcm_sysport_priv *priv,
 739                                         unsigned int budget)
 740 {
 741         struct bcm_sysport_stats64 *stats64 = &priv->stats64;
 742         struct net_device *ndev = priv->netdev;
 743         unsigned int processed = 0, to_process;
 744         unsigned int processed_bytes = 0;
 745         struct bcm_sysport_cb *cb;
 746         struct sk_buff *skb;
 747         unsigned int p_index;
 748         u16 len, status;
 749         struct bcm_rsb *rsb;
 750
 751         /* Clear status before servicing to reduce spurious interrupts */
 752         intrl2_0_writel(priv, INTRL2_0_RDMA_MBDONE, INTRL2_CPU_CLEAR);
 753
 754         /* Determine how much we should process since last call, SYSTEMPORT Lite
 755          * groups the producer and consumer indexes into the same 32-bit
 756          * which we access using RDMA_CONS_INDEX
 757          */
 758         if (!priv->is_lite)
 759                 p_index = rdma_readl(priv, RDMA_PROD_INDEX);
 760         else
 761                 p_index = rdma_readl(priv, RDMA_CONS_INDEX);
 762         p_index &= RDMA_PROD_INDEX_MASK;
 763
 764         to_process = (p_index - priv->rx_c_index) & RDMA_CONS_INDEX_MASK;
 765
 766         netif_dbg(priv, rx_status, ndev,
 767                   "p_index=%d rx_c_index=%d to_process=%d\n",
 768                   p_index, priv->rx_c_index, to_process);
 769
 770         while ((processed < to_process) && (processed < budget)) {
 771                 cb = &priv->rx_cbs[priv->rx_read_ptr];
 772                 skb = bcm_sysport_rx_refill(priv, cb);
 773
 774
 775                 /* We do not have a backing SKB, so we do not a corresponding
 776                  * DMA mapping for this incoming packet since
 777                  * bcm_sysport_rx_refill always either has both skb and mapping
 778                  * or none.
 779                  */
 780                 if (unlikely(!skb)) {
 781                         netif_err(priv, rx_err, ndev, "out of memory!\n");
 782                         ndev->stats.rx_dropped++;
 783                         ndev->stats.rx_errors++;
 784                         goto next;
 785                 }
 786
 787                 /* Extract the Receive Status Block prepended */
 788                 rsb = (struct bcm_rsb *)skb->data;
 789                 len = (rsb->rx_status_len >> DESC_LEN_SHIFT) & DESC_LEN_MASK;
 790                 status = (rsb->rx_status_len >> DESC_STATUS_SHIFT) &
 791                           DESC_STATUS_MASK;
 792
 793                 netif_dbg(priv, rx_status, ndev,
 794                           "p=%d, c=%d, rd_ptr=%d, len=%d, flag=0x%04x\n",
 795                           p_index, priv->rx_c_index, priv->rx_read_ptr,
 796                           len, status);
 797
 798                 if (unlikely(len > RX_BUF_LENGTH)) {
 799                         netif_err(priv, rx_status, ndev, "oversized packet\n");
 800                         ndev->stats.rx_length_errors++;
 801                         ndev->stats.rx_errors++;
 802                         dev_kfree_skb_any(skb);
 803                         goto next;
 804                 }
 805
 806                 if (unlikely(!(status & DESC_EOP) || !(status & DESC_SOP))) {
 807                         netif_err(priv, rx_status, ndev, "fragmented packet!\n");
 808                         ndev->stats.rx_dropped++;
 809                         ndev->stats.rx_errors++;
 810                         dev_kfree_skb_any(skb);
 811                         goto next;
 812                 }
 813
 814                 if (unlikely(status & (RX_STATUS_ERR | RX_STATUS_OVFLOW))) {
 815                         netif_err(priv, rx_err, ndev, "error packet\n");
 816                         if (status & RX_STATUS_OVFLOW)
 817                                 ndev->stats.rx_over_errors++;
 818                         ndev->stats.rx_dropped++;
 819                         ndev->stats.rx_errors++;
 820                         dev_kfree_skb_any(skb);
 821                         goto next;
 822                 }
 823
 824                 skb_put(skb, len);
 825
 826                 /* Hardware validated our checksum */
 827                 if (likely(status & DESC_L4_CSUM))
 828                         skb->ip_summed = CHECKSUM_UNNECESSARY;
 829
 830                 /* Hardware pre-pends packets with 2bytes before Ethernet
 831                  * header plus we have the Receive Status Block, strip off all
 832                  * of this from the SKB.
 833                  */
 834                 skb_pull(skb, sizeof(*rsb) + 2);
 835                 len -= (sizeof(*rsb) + 2);
 836                 processed_bytes += len;
 837
 838                 /* UniMAC may forward CRC */
 839                 if (priv->crc_fwd) {
 840                         skb_trim(skb, len - ETH_FCS_LEN);
 841                         len -= ETH_FCS_LEN;
 842                 }
 843
 844                 skb->protocol = eth_type_trans(skb, ndev);
 845                 ndev->stats.rx_packets++;
 846                 ndev->stats.rx_bytes += len;
 847                 u64_stats_update_begin(&priv->syncp);
 848                 stats64->rx_packets++;
 849                 stats64->rx_bytes += len;
 850                 u64_stats_update_end(&priv->syncp);
 851
 852                 napi_gro_receive(&priv->napi, skb);
 853 next:
 854                 processed++;
 855                 priv->rx_read_ptr++;
 856
 857                 if (priv->rx_read_ptr == priv->num_rx_bds)
 858                         priv->rx_read_ptr = 0;
 859         }
 860
 861         priv->dim.packets = processed;
 862         priv->dim.bytes = processed_bytes;
 863
 864         return processed;
 865 }
 866
 867 static void bcm_sysport_tx_reclaim_one(struct bcm_sysport_tx_ring *ring,
 868                                        struct bcm_sysport_cb *cb,
 869                                        unsigned int *bytes_compl,
 870                                        unsigned int *pkts_compl)
 871 {
 872         struct bcm_sysport_priv *priv = ring->priv;
 873         struct device *kdev = &priv->pdev->dev;
 874
 875         if (cb->skb) {
 876                 *bytes_compl += cb->skb->len;
 877                 dma_unmap_single(kdev, dma_unmap_addr(cb, dma_addr),
 878                                  dma_unmap_len(cb, dma_len),
 879                                  DMA_TO_DEVICE);
 880                 (*pkts_compl)++;
 881                 bcm_sysport_free_cb(cb);
 882         /* SKB fragment */
 883         } else if (dma_unmap_addr(cb, dma_addr)) {
 884                 *bytes_compl += dma_unmap_len(cb, dma_len);
 885                 dma_unmap_page(kdev, dma_unmap_addr(cb, dma_addr),
 886                                dma_unmap_len(cb, dma_len), DMA_TO_DEVICE);
 887                 dma_unmap_addr_set(cb, dma_addr, 0);
 888         }
 889 }
 890
 891 /* Reclaim queued SKBs for transmission completion, lockless version */
 892 static unsigned int __bcm_sysport_tx_reclaim(struct bcm_sysport_priv *priv,
 893                                              struct bcm_sysport_tx_ring *ring)
 894 {
 895         unsigned int pkts_compl = 0, bytes_compl = 0;
 896         struct net_device *ndev = priv->netdev;
 897         unsigned int txbds_processed = 0;
 898         struct bcm_sysport_cb *cb;
 899         unsigned int txbds_ready;
 900         unsigned int c_index;
 901         u32 hw_ind;
 902
 903         /* Clear status before servicing to reduce spurious interrupts */
 904         if (!ring->priv->is_lite)
 905                 intrl2_1_writel(ring->priv, BIT(ring->index), INTRL2_CPU_CLEAR);
 906         else
 907                 intrl2_0_writel(ring->priv, BIT(ring->index +
 908                                 INTRL2_0_TDMA_MBDONE_SHIFT), INTRL2_CPU_CLEAR);
 909
 910         /* Compute how many descriptors have been processed since last call */
 911         hw_ind = tdma_readl(priv, TDMA_DESC_RING_PROD_CONS_INDEX(ring->index));
 912         c_index = (hw_ind >> RING_CONS_INDEX_SHIFT) & RING_CONS_INDEX_MASK;
 913         txbds_ready = (c_index - ring->c_index) & RING_CONS_INDEX_MASK;
 914
 915         netif_dbg(priv, tx_done, ndev,
 916                   "ring=%d old_c_index=%u c_index=%u txbds_ready=%u\n",
 917                   ring->index, ring->c_index, c_index, txbds_ready);
 918
 919         while (txbds_processed < txbds_ready) {
 920                 cb = &ring->cbs[ring->clean_index];
 921                 bcm_sysport_tx_reclaim_one(ring, cb, &bytes_compl, &pkts_compl);
 922
 923                 ring->desc_count++;
 924                 txbds_processed++;
 925
 926                 if (likely(ring->clean_index < ring->size - 1))
 927                         ring->clean_index++;
 928                 else
 929                         ring->clean_index = 0;
 930         }
 931
 932         u64_stats_update_begin(&priv->syncp);
 933         ring->packets += pkts_compl;
 934         ring->bytes += bytes_compl;
 935         u64_stats_update_end(&priv->syncp);
 936
 937         ring->c_index = c_index;
 938
 939         netif_dbg(priv, tx_done, ndev,
 940                   "ring=%d c_index=%d pkts_compl=%d, bytes_compl=%d\n",
 941                   ring->index, ring->c_index, pkts_compl, bytes_compl);
 942
 943         return pkts_compl;
 944 }
 945
 946 /* Locked version of the per-ring TX reclaim routine */
 947 static unsigned int bcm_sysport_tx_reclaim(struct bcm_sysport_priv *priv,
 948                                            struct bcm_sysport_tx_ring *ring)
 949 {
 950         struct netdev_queue *txq;
 951         unsigned int released;
 952         unsigned long flags;
 953
 954         txq = netdev_get_tx_queue(priv->netdev, ring->index);
 955
 956         spin_lock_irqsave(&ring->lock, flags);
 957         released = __bcm_sysport_tx_reclaim(priv, ring);
 958         if (released)
 959                 netif_tx_wake_queue(txq);
 960
 961         spin_unlock_irqrestore(&ring->lock, flags);
 962
 963         return released;
 964 }
 965
 966 /* Locked version of the per-ring TX reclaim, but does not wake the queue */
 967 static void bcm_sysport_tx_clean(struct bcm_sysport_priv *priv,
 968                                  struct bcm_sysport_tx_ring *ring)
 969 {
 970         unsigned long flags;
 971
 972         spin_lock_irqsave(&ring->lock, flags);
 973         __bcm_sysport_tx_reclaim(priv, ring);
 974         spin_unlock_irqrestore(&ring->lock, flags);
 975 }
 976
 977 static int bcm_sysport_tx_poll(struct napi_struct *napi, int budget)
 978 {
 979         struct bcm_sysport_tx_ring *ring =
 980                 container_of(napi, struct bcm_sysport_tx_ring, napi);
 981         unsigned int work_done = 0;
 982
 983         work_done = bcm_sysport_tx_reclaim(ring->priv, ring);
 984
 985         if (work_done == 0) {
 986                 napi_complete(napi);
 987                 /* re-enable TX interrupt */
 988                 if (!ring->priv->is_lite)
 989                         intrl2_1_mask_clear(ring->priv, BIT(ring->index));
 990                 else
 991                         intrl2_0_mask_clear(ring->priv, BIT(ring->index +
 992                                             INTRL2_0_TDMA_MBDONE_SHIFT));
 993
 994                 return 0;
 995         }
 996
 997         return budget;
 998 }
 999
1000 static void bcm_sysport_tx_reclaim_all(struct bcm_sysport_priv *priv)
1001 {
1002         unsigned int q;
1003
1004         for (q = 0; q < priv->netdev->num_tx_queues; q++)
1005                 bcm_sysport_tx_reclaim(priv, &priv->tx_rings[q]);
1006 }
1007
1008 static int bcm_sysport_poll(struct napi_struct *napi, int budget)
1009 {
1010         struct bcm_sysport_priv *priv =
1011                 container_of(napi, struct bcm_sysport_priv, napi);
1012         struct net_dim_sample dim_sample;
1013         unsigned int work_done = 0;
1014
1015         work_done = bcm_sysport_desc_rx(priv, budget);
1016
1017         priv->rx_c_index += work_done;
1018         priv->rx_c_index &= RDMA_CONS_INDEX_MASK;
1019
1020         /* SYSTEMPORT Lite groups the producer/consumer index, producer is
1021          * maintained by HW, but writes to it will be ignore while RDMA
1022          * is active
1023          */
1024         if (!priv->is_lite)
1025                 rdma_writel(priv, priv->rx_c_index, RDMA_CONS_INDEX);
1026         else
1027                 rdma_writel(priv, priv->rx_c_index << 16, RDMA_CONS_INDEX);
1028
1029         if (work_done < budget) {
1030                 napi_complete_done(napi, work_done);
1031                 /* re-enable RX interrupts */
1032                 intrl2_0_mask_clear(priv, INTRL2_0_RDMA_MBDONE);
1033         }
1034
1035         if (priv->dim.use_dim) {
1036                 net_dim_sample(priv->dim.event_ctr, priv->dim.packets,
1037                                priv->dim.bytes, &dim_sample);
1038                 net_dim(&priv->dim.dim, dim_sample);
1039         }
1040
1041         return work_done;
1042 }
1043
1044 static void bcm_sysport_resume_from_wol(struct bcm_sysport_priv *priv)
1045 {
1046         u32 reg;
1047
1048         /* Stop monitoring MPD interrupt */
1049         intrl2_0_mask_set(priv, INTRL2_0_MPD);
1050
1051         /* Clear the MagicPacket detection logic */
1052         reg = umac_readl(priv, UMAC_MPD_CTRL);
1053         reg &= ~MPD_EN;
1054         umac_writel(priv, reg, UMAC_MPD_CTRL);
1055
1056         netif_dbg(priv, wol, priv->netdev, "resumed from WOL\n");
1057 }
1058
1059 static void bcm_sysport_dim_work(struct work_struct *work)
1060 {
1061         struct net_dim *dim = container_of(work, struct net_dim, work);
1062         struct bcm_sysport_net_dim *ndim =
1063                         container_of(dim, struct bcm_sysport_net_dim, dim);
1064         struct bcm_sysport_priv *priv =
1065                         container_of(ndim, struct bcm_sysport_priv, dim);
1066         struct net_dim_cq_moder cur_profile =
1067                                 net_dim_get_profile(dim->mode, dim->profile_ix);
1068
1069         bcm_sysport_set_rx_coalesce(priv, cur_profile.usec, cur_profile.pkts);
1070         dim->state = NET_DIM_START_MEASURE;
1071 }
1072
1073 /* RX and misc interrupt routine */
1074 static irqreturn_t bcm_sysport_rx_isr(int irq, void *dev_id)
1075 {
1076         struct net_device *dev = dev_id;
1077         struct bcm_sysport_priv *priv = netdev_priv(dev);
1078         struct bcm_sysport_tx_ring *txr;
1079         unsigned int ring, ring_bit;
1080
1081         priv->irq0_stat = intrl2_0_readl(priv, INTRL2_CPU_STATUS) &
1082                           ~intrl2_0_readl(priv, INTRL2_CPU_MASK_STATUS);
1083         intrl2_0_writel(priv, priv->irq0_stat, INTRL2_CPU_CLEAR);
1084
1085         if (unlikely(priv->irq0_stat == 0)) {
1086                 netdev_warn(priv->netdev, "spurious RX interrupt\n");
1087                 return IRQ_NONE;
1088         }
1089
1090         if (priv->irq0_stat & INTRL2_0_RDMA_MBDONE) {
1091                 priv->dim.event_ctr++;
1092                 if (likely(napi_schedule_prep(&priv->napi))) {
1093                         /* disable RX interrupts */
1094                         intrl2_0_mask_set(priv, INTRL2_0_RDMA_MBDONE);
1095                         __napi_schedule_irqoff(&priv->napi);
1096                 }
1097         }
1098
1099         /* TX ring is full, perform a full reclaim since we do not know
1100          * which one would trigger this interrupt
1101          */
1102         if (priv->irq0_stat & INTRL2_0_TX_RING_FULL)
1103                 bcm_sysport_tx_reclaim_all(priv);
1104
1105         if (priv->irq0_stat & INTRL2_0_MPD) {
1106                 netdev_info(priv->netdev, "Wake-on-LAN interrupt!\n");
1107                 bcm_sysport_resume_from_wol(priv);
1108         }
1109
1110         if (!priv->is_lite)
1111                 goto out;
1112
1113         for (ring = 0; ring < dev->num_tx_queues; ring++) {
1114                 ring_bit = BIT(ring + INTRL2_0_TDMA_MBDONE_SHIFT);
1115                 if (!(priv->irq0_stat & ring_bit))
1116                         continue;
1117
1118                 txr = &priv->tx_rings[ring];
1119
1120                 if (likely(napi_schedule_prep(&txr->napi))) {
1121                         intrl2_0_mask_set(priv, ring_bit);
1122                         __napi_schedule(&txr->napi);
1123                 }
1124         }
1125 out:
1126         return IRQ_HANDLED;
1127 }
1128
1129 /* TX interrupt service routine */
1130 static irqreturn_t bcm_sysport_tx_isr(int irq, void *dev_id)
1131 {
1132         struct net_device *dev = dev_id;
1133         struct bcm_sysport_priv *priv = netdev_priv(dev);
1134         struct bcm_sysport_tx_ring *txr;
1135         unsigned int ring;
1136
1137         priv->irq1_stat = intrl2_1_readl(priv, INTRL2_CPU_STATUS) &
1138                                 ~intrl2_1_readl(priv, INTRL2_CPU_MASK_STATUS);
1139         intrl2_1_writel(priv, 0xffffffff, INTRL2_CPU_CLEAR);
1140
1141         if (unlikely(priv->irq1_stat == 0)) {
1142                 netdev_warn(priv->netdev, "spurious TX interrupt\n");
1143                 return IRQ_NONE;
1144         }
1145
1146         for (ring = 0; ring < dev->num_tx_queues; ring++) {
1147                 if (!(priv->irq1_stat & BIT(ring)))
1148                         continue;
1149
1150                 txr = &priv->tx_rings[ring];
1151
1152                 if (likely(napi_schedule_prep(&txr->napi))) {
1153                         intrl2_1_mask_set(priv, BIT(ring));
1154                         __napi_schedule_irqoff(&txr->napi);
1155                 }
1156         }
1157
1158         return IRQ_HANDLED;
1159 }
1160
1161 static irqreturn_t bcm_sysport_wol_isr(int irq, void *dev_id)
1162 {
1163         struct bcm_sysport_priv *priv = dev_id;
1164
1165         pm_wakeup_event(&priv->pdev->dev, 0);
1166
1167         return IRQ_HANDLED;
1168 }
1169
1170 #ifdef CONFIG_NET_POLL_CONTROLLER
1171 static void bcm_sysport_poll_controller(struct net_device *dev)
1172 {
1173         struct bcm_sysport_priv *priv = netdev_priv(dev);
1174
1175         disable_irq(priv->irq0);
1176         bcm_sysport_rx_isr(priv->irq0, priv);
1177         enable_irq(priv->irq0);
1178
1179         if (!priv->is_lite) {
1180                 disable_irq(priv->irq1);
1181                 bcm_sysport_tx_isr(priv->irq1, priv);
1182                 enable_irq(priv->irq1);
1183         }
1184 }
1185 #endif
1186
1187 static struct sk_buff *bcm_sysport_insert_tsb(struct sk_buff *skb,
1188                                               struct net_device *dev)
1189 {
1190         struct sk_buff *nskb;
1191         struct bcm_tsb *tsb;
1192         u32 csum_info;
1193         u8 ip_proto;
1194         u16 csum_start;
1195         u16 ip_ver;
1196
1197         /* Re-allocate SKB if needed */
1198         if (unlikely(skb_headroom(skb) < sizeof(*tsb))) {
1199                 nskb = skb_realloc_headroom(skb, sizeof(*tsb));
1200                 dev_kfree_skb(skb);
1201                 if (!nskb) {
1202                         dev->stats.tx_errors++;
1203                         dev->stats.tx_dropped++;
1204                         return NULL;
1205                 }
1206                 skb = nskb;
1207         }
1208
1209         tsb = skb_push(skb, sizeof(*tsb));
1210         /* Zero-out TSB by default */
1211         memset(tsb, 0, sizeof(*tsb));
1212
1213         if (skb->ip_summed == CHECKSUM_PARTIAL) {
1214                 ip_ver = htons(skb->protocol);
1215                 switch (ip_ver) {
1216                 case ETH_P_IP:
1217                         ip_proto = ip_hdr(skb)->protocol;
1218                         break;
1219                 case ETH_P_IPV6:
1220                         ip_proto = ipv6_hdr(skb)->nexthdr;
1221                         break;
1222                 default:
1223                         return skb;
1224                 }
1225
1226                 /* Get the checksum offset and the L4 (transport) offset */
1227                 csum_start = skb_checksum_start_offset(skb) - sizeof(*tsb);
1228                 csum_info = (csum_start + skb->csum_offset) & L4_CSUM_PTR_MASK;
1229                 csum_info |= (csum_start << L4_PTR_SHIFT);
1230
1231                 if (ip_proto == IPPROTO_TCP || ip_proto == IPPROTO_UDP) {
1232                         csum_info |= L4_LENGTH_VALID;
1233                         if (ip_proto == IPPROTO_UDP && ip_ver == ETH_P_IP)
1234                                 csum_info |= L4_UDP;
1235                 } else {
1236                         csum_info = 0;
1237                 }
1238
1239                 tsb->l4_ptr_dest_map = csum_info;
1240         }
1241
1242         return skb;
1243 }
1244
1245 static netdev_tx_t bcm_sysport_xmit(struct sk_buff *skb,
1246                                     struct net_device *dev)
1247 {
1248         struct bcm_sysport_priv *priv = netdev_priv(dev);
1249         struct device *kdev = &priv->pdev->dev;
1250         struct bcm_sysport_tx_ring *ring;
1251         struct bcm_sysport_cb *cb;
1252         struct netdev_queue *txq;
1253         struct dma_desc *desc;
1254         unsigned int skb_len;
1255         unsigned long flags;
1256         dma_addr_t mapping;
1257         u32 len_status;
1258         u16 queue;
1259         int ret;
1260
1261         queue = skb_get_queue_mapping(skb);
1262         txq = netdev_get_tx_queue(dev, queue);
1263         ring = &priv->tx_rings[queue];
1264
1265         /* lock against tx reclaim in BH context and TX ring full interrupt */
1266         spin_lock_irqsave(&ring->lock, flags);
1267         if (unlikely(ring->desc_count == 0)) {
1268                 netif_tx_stop_queue(txq);
1269                 netdev_err(dev, "queue %d awake and ring full!\n", queue);
1270                 ret = NETDEV_TX_BUSY;
1271                 goto out;
1272         }
1273
1274         /* Insert TSB and checksum infos */
1275         if (priv->tsb_en) {
1276                 skb = bcm_sysport_insert_tsb(skb, dev);
1277                 if (!skb) {
1278                         ret = NETDEV_TX_OK;
1279                         goto out;
1280                 }
1281         }
1282
1283         skb_len = skb->len;
1284
1285         mapping = dma_map_single(kdev, skb->data, skb_len, DMA_TO_DEVICE);
1286         if (dma_mapping_error(kdev, mapping)) {
1287                 priv->mib.tx_dma_failed++;
1288                 netif_err(priv, tx_err, dev, "DMA map failed at %p (len=%d)\n",
1289                           skb->data, skb_len);
1290                 ret = NETDEV_TX_OK;
1291                 goto out;
1292         }
1293
1294         /* Remember the SKB for future freeing */
1295         cb = &ring->cbs[ring->curr_desc];
1296         cb->skb = skb;
1297         dma_unmap_addr_set(cb, dma_addr, mapping);
1298         dma_unmap_len_set(cb, dma_len, skb_len);
1299
1300         /* Fetch a descriptor entry from our pool */
1301         desc = ring->desc_cpu;
1302
1303         desc->addr_lo = lower_32_bits(mapping);
1304         len_status = upper_32_bits(mapping) & DESC_ADDR_HI_MASK;
1305         len_status |= (skb_len << DESC_LEN_SHIFT);
1306         len_status |= (DESC_SOP | DESC_EOP | TX_STATUS_APP_CRC) <<
1307                        DESC_STATUS_SHIFT;
1308         if (skb->ip_summed == CHECKSUM_PARTIAL)
1309                 len_status |= (DESC_L4_CSUM << DESC_STATUS_SHIFT);
1310
1311         ring->curr_desc++;
1312         if (ring->curr_desc == ring->size)
1313                 ring->curr_desc = 0;
1314         ring->desc_count--;
1315
1316         /* Ensure write completion of the descriptor status/length
1317          * in DRAM before the System Port WRITE_PORT register latches
1318          * the value
1319          */
1320         wmb();
1321         desc->addr_status_len = len_status;
1322         wmb();
1323
1324         /* Write this descriptor address to the RING write port */
1325         tdma_port_write_desc_addr(priv, desc, ring->index);
1326
1327         /* Check ring space and update SW control flow */
1328         if (ring->desc_count == 0)
1329                 netif_tx_stop_queue(txq);
1330
1331         netif_dbg(priv, tx_queued, dev, "ring=%d desc_count=%d, curr_desc=%d\n",
1332                   ring->index, ring->desc_count, ring->curr_desc);
1333
1334         ret = NETDEV_TX_OK;
1335 out:
1336         spin_unlock_irqrestore(&ring->lock, flags);
1337         return ret;
1338 }
1339
1340 static void bcm_sysport_tx_timeout(struct net_device *dev)
1341 {
1342         netdev_warn(dev, "transmit timeout!\n");
1343
1344         netif_trans_update(dev);
1345         dev->stats.tx_errors++;
1346
1347         netif_tx_wake_all_queues(dev);
1348 }
1349
1350 /* phylib adjust link callback */
1351 static void bcm_sysport_adj_link(struct net_device *dev)
1352 {
1353         struct bcm_sysport_priv *priv = netdev_priv(dev);
1354         struct phy_device *phydev = dev->phydev;
1355         unsigned int changed = 0;
1356         u32 cmd_bits = 0, reg;
1357
1358         if (priv->old_link != phydev->link) {
1359                 changed = 1;
1360                 priv->old_link = phydev->link;
1361         }
1362
1363         if (priv->old_duplex != phydev->duplex) {
1364                 changed = 1;
1365                 priv->old_duplex = phydev->duplex;
1366         }
1367
1368         if (priv->is_lite)
1369                 goto out;
1370
1371         switch (phydev->speed) {
1372         case SPEED_2500:
1373                 cmd_bits = CMD_SPEED_2500;
1374                 break;
1375         case SPEED_1000:
1376                 cmd_bits = CMD_SPEED_1000;
1377                 break;
1378         case SPEED_100:
1379                 cmd_bits = CMD_SPEED_100;
1380                 break;
1381         case SPEED_10:
1382                 cmd_bits = CMD_SPEED_10;
1383                 break;
1384         default:
1385                 break;
1386         }
1387         cmd_bits <<= CMD_SPEED_SHIFT;
1388
1389         if (phydev->duplex == DUPLEX_HALF)
1390                 cmd_bits |= CMD_HD_EN;
1391
1392         if (priv->old_pause != phydev->pause) {
1393                 changed = 1;
1394                 priv->old_pause = phydev->pause;
1395         }
1396
1397         if (!phydev->pause)
1398                 cmd_bits |= CMD_RX_PAUSE_IGNORE | CMD_TX_PAUSE_IGNORE;
1399
1400         if (!changed)
1401                 return;
1402
1403         if (phydev->link) {
1404                 reg = umac_readl(priv, UMAC_CMD);
1405                 reg &= ~((CMD_SPEED_MASK << CMD_SPEED_SHIFT) |
1406                         CMD_HD_EN | CMD_RX_PAUSE_IGNORE |
1407                         CMD_TX_PAUSE_IGNORE);
1408                 reg |= cmd_bits;
1409                 umac_writel(priv, reg, UMAC_CMD);
1410         }
1411 out:
1412         if (changed)
1413                 phy_print_status(phydev);
1414 }
1415
1416 static void bcm_sysport_init_dim(struct bcm_sysport_priv *priv,
1417                                  void (*cb)(struct work_struct *work))
1418 {
1419         struct bcm_sysport_net_dim *dim = &priv->dim;
1420
1421         INIT_WORK(&dim->dim.work, cb);
1422         dim->dim.mode = NET_DIM_CQ_PERIOD_MODE_START_FROM_EQE;
1423         dim->event_ctr = 0;
1424         dim->packets = 0;
1425         dim->bytes = 0;
1426 }
1427
1428 static void bcm_sysport_init_rx_coalesce(struct bcm_sysport_priv *priv)
1429 {
1430         struct bcm_sysport_net_dim *dim = &priv->dim;
1431         struct net_dim_cq_moder moder;
1432         u32 usecs, pkts;
1433
1434         usecs = priv->rx_coalesce_usecs;
1435         pkts = priv->rx_max_coalesced_frames;
1436
1437         /* If DIM was enabled, re-apply default parameters */
1438         if (dim->use_dim) {
1439                 moder = net_dim_get_def_profile(dim->dim.mode);
1440                 usecs = moder.usec;
1441                 pkts = moder.pkts;
1442         }
1443
1444         bcm_sysport_set_rx_coalesce(priv, usecs, pkts);
1445 }
1446
1447 static int bcm_sysport_init_tx_ring(struct bcm_sysport_priv *priv,
1448                                     unsigned int index)
1449 {
1450         struct bcm_sysport_tx_ring *ring = &priv->tx_rings[index];
1451         struct device *kdev = &priv->pdev->dev;
1452         size_t size;
1453         void *p;
1454         u32 reg;
1455
1456         /* Simple descriptors partitioning for now */
1457         size = 256;
1458
1459         /* We just need one DMA descriptor which is DMA-able, since writing to
1460          * the port will allocate a new descriptor in its internal linked-list
1461          */
1462         p = dma_zalloc_coherent(kdev, sizeof(struct dma_desc), &ring->desc_dma,
1463                                 GFP_KERNEL);
1464         if (!p) {
1465                 netif_err(priv, hw, priv->netdev, "DMA alloc failed\n");
1466                 return -ENOMEM;
1467         }
1468
1469         ring->cbs = kcalloc(size, sizeof(struct bcm_sysport_cb), GFP_KERNEL);
1470         if (!ring->cbs) {
1471                 dma_free_coherent(kdev, sizeof(struct dma_desc),
1472                                   ring->desc_cpu, ring->desc_dma);
1473                 netif_err(priv, hw, priv->netdev, "CB allocation failed\n");
1474                 return -ENOMEM;
1475         }
1476
1477         /* Initialize SW view of the ring */
1478         spin_lock_init(&ring->lock);
1479         ring->priv = priv;
1480         netif_tx_napi_add(priv->netdev, &ring->napi, bcm_sysport_tx_poll, 64);
1481         ring->index = index;
1482         ring->size = size;
1483         ring->clean_index = 0;
1484         ring->alloc_size = ring->size;
1485         ring->desc_cpu = p;
1486         ring->desc_count = ring->size;
1487         ring->curr_desc = 0;
1488
1489         /* Initialize HW ring */
1490         tdma_writel(priv, RING_EN, TDMA_DESC_RING_HEAD_TAIL_PTR(index));
1491         tdma_writel(priv, 0, TDMA_DESC_RING_COUNT(index));
1492         tdma_writel(priv, 1, TDMA_DESC_RING_INTR_CONTROL(index));
1493         tdma_writel(priv, 0, TDMA_DESC_RING_PROD_CONS_INDEX(index));
1494
1495         /* Configure QID and port mapping */
1496         reg = tdma_readl(priv, TDMA_DESC_RING_MAPPING(index));
1497         reg &= ~(RING_QID_MASK | RING_PORT_ID_MASK << RING_PORT_ID_SHIFT);
1498         if (ring->inspect) {
1499                 reg |= ring->switch_queue & RING_QID_MASK;
1500                 reg |= ring->switch_port << RING_PORT_ID_SHIFT;
1501         } else {
1502                 reg |= RING_IGNORE_STATUS;
1503         }
1504         tdma_writel(priv, reg, TDMA_DESC_RING_MAPPING(index));
1505         tdma_writel(priv, 0, TDMA_DESC_RING_PCP_DEI_VID(index));
1506
1507         /* Enable ACB algorithm 2 */
1508         reg = tdma_readl(priv, TDMA_CONTROL);
1509         reg |= tdma_control_bit(priv, ACB_ALGO);
1510         tdma_writel(priv, reg, TDMA_CONTROL);
1511
1512         /* Do not use tdma_control_bit() here because TSB_SWAP1 collides
1513          * with the original definition of ACB_ALGO
1514          */
1515         reg = tdma_readl(priv, TDMA_CONTROL);
1516         if (priv->is_lite)
1517                 reg &= ~BIT(TSB_SWAP1);
1518         /* Set a correct TSB format based on host endian */
1519         if (!IS_ENABLED(CONFIG_CPU_BIG_ENDIAN))
1520                 reg |= tdma_control_bit(priv, TSB_SWAP0);
1521         else
1522                 reg &= ~tdma_control_bit(priv, TSB_SWAP0);
1523         tdma_writel(priv, reg, TDMA_CONTROL);
1524
1525         /* Program the number of descriptors as MAX_THRESHOLD and half of
1526          * its size for the hysteresis trigger
1527          */
1528         tdma_writel(priv, ring->size |
1529                         1 << RING_HYST_THRESH_SHIFT,
1530                         TDMA_DESC_RING_MAX_HYST(index));
1531
1532         /* Enable the ring queue in the arbiter */
1533         reg = tdma_readl(priv, TDMA_TIER1_ARB_0_QUEUE_EN);
1534         reg |= (1 << index);
1535         tdma_writel(priv, reg, TDMA_TIER1_ARB_0_QUEUE_EN);
1536
1537         napi_enable(&ring->napi);
1538
1539         netif_dbg(priv, hw, priv->netdev,
1540                   "TDMA cfg, size=%d, desc_cpu=%p switch q=%d,port=%d\n",
1541                   ring->size, ring->desc_cpu, ring->switch_queue,
1542                   ring->switch_port);
1543
1544         return 0;
1545 }
1546
1547 static void bcm_sysport_fini_tx_ring(struct bcm_sysport_priv *priv,
1548                                      unsigned int index)
1549 {
1550         struct bcm_sysport_tx_ring *ring = &priv->tx_rings[index];
1551         struct device *kdev = &priv->pdev->dev;
1552         u32 reg;
1553
1554         /* Caller should stop the TDMA engine */
1555         reg = tdma_readl(priv, TDMA_STATUS);
1556         if (!(reg & TDMA_DISABLED))
1557                 netdev_warn(priv->netdev, "TDMA not stopped!\n");
1558
1559         /* ring->cbs is the last part in bcm_sysport_init_tx_ring which could
1560          * fail, so by checking this pointer we know whether the TX ring was
1561          * fully initialized or not.
1562          */
1563         if (!ring->cbs)
1564                 return;
1565
1566         napi_disable(&ring->napi);
1567         netif_napi_del(&ring->napi);
1568
1569         bcm_sysport_tx_clean(priv, ring);
1570
1571         kfree(ring->cbs);
1572         ring->cbs = NULL;
1573
1574         if (ring->desc_dma) {
1575                 dma_free_coherent(kdev, sizeof(struct dma_desc),
1576                                   ring->desc_cpu, ring->desc_dma);
1577                 ring->desc_dma = 0;
1578         }
1579         ring->size = 0;
1580         ring->alloc_size = 0;
1581
1582         netif_dbg(priv, hw, priv->netdev, "TDMA fini done\n");
1583 }
1584
1585 /* RDMA helper */
1586 static inline int rdma_enable_set(struct bcm_sysport_priv *priv,
1587                                   unsigned int enable)
1588 {
1589         unsigned int timeout = 1000;
1590         u32 reg;
1591
1592         reg = rdma_readl(priv, RDMA_CONTROL);
1593         if (enable)
1594                 reg |= RDMA_EN;
1595         else
1596                 reg &= ~RDMA_EN;
1597         rdma_writel(priv, reg, RDMA_CONTROL);
1598
1599         /* Poll for RMDA disabling completion */
1600         do {
1601                 reg = rdma_readl(priv, RDMA_STATUS);
1602                 if (!!(reg & RDMA_DISABLED) == !enable)
1603                         return 0;
1604                 usleep_range(1000, 2000);
1605         } while (timeout-- > 0);
1606
1607         netdev_err(priv->netdev, "timeout waiting for RDMA to finish\n");
1608
1609         return -ETIMEDOUT;
1610 }
1611
1612 /* TDMA helper */
1613 static inline int tdma_enable_set(struct bcm_sysport_priv *priv,
1614                                   unsigned int enable)
1615 {
1616         unsigned int timeout = 1000;
1617         u32 reg;
1618
1619         reg = tdma_readl(priv, TDMA_CONTROL);
1620         if (enable)
1621                 reg |= tdma_control_bit(priv, TDMA_EN);
1622         else
1623                 reg &= ~tdma_control_bit(priv, TDMA_EN);
1624         tdma_writel(priv, reg, TDMA_CONTROL);
1625
1626         /* Poll for TMDA disabling completion */
1627         do {
1628                 reg = tdma_readl(priv, TDMA_STATUS);
1629                 if (!!(reg & TDMA_DISABLED) == !enable)
1630                         return 0;
1631
1632                 usleep_range(1000, 2000);
1633         } while (timeout-- > 0);
1634
1635         netdev_err(priv->netdev, "timeout waiting for TDMA to finish\n");
1636
1637         return -ETIMEDOUT;
1638 }
1639
1640 static int bcm_sysport_init_rx_ring(struct bcm_sysport_priv *priv)
1641 {
1642         struct bcm_sysport_cb *cb;
1643         u32 reg;
1644         int ret;
1645         int i;
1646
1647         /* Initialize SW view of the RX ring */
1648         priv->num_rx_bds = priv->num_rx_desc_words / WORDS_PER_DESC;
1649         priv->rx_bds = priv->base + SYS_PORT_RDMA_OFFSET;
1650         priv->rx_c_index = 0;
1651         priv->rx_read_ptr = 0;
1652         priv->rx_cbs = kcalloc(priv->num_rx_bds, sizeof(struct bcm_sysport_cb),
1653                                 GFP_KERNEL);
1654         if (!priv->rx_cbs) {
1655                 netif_err(priv, hw, priv->netdev, "CB allocation failed\n");
1656                 return -ENOMEM;
1657         }
1658
1659         for (i = 0; i < priv->num_rx_bds; i++) {
1660                 cb = priv->rx_cbs + i;
1661                 cb->bd_addr = priv->rx_bds + i * DESC_SIZE;
1662         }
1663
1664         ret = bcm_sysport_alloc_rx_bufs(priv);
1665         if (ret) {
1666                 netif_err(priv, hw, priv->netdev, "SKB allocation failed\n");
1667                 return ret;
1668         }
1669
1670         /* Initialize HW, ensure RDMA is disabled */
1671         reg = rdma_readl(priv, RDMA_STATUS);
1672         if (!(reg & RDMA_DISABLED))
1673                 rdma_enable_set(priv, 0);
1674
1675         rdma_writel(priv, 0, RDMA_WRITE_PTR_LO);
1676         rdma_writel(priv, 0, RDMA_WRITE_PTR_HI);
1677         rdma_writel(priv, 0, RDMA_PROD_INDEX);
1678         rdma_writel(priv, 0, RDMA_CONS_INDEX);
1679         rdma_writel(priv, priv->num_rx_bds << RDMA_RING_SIZE_SHIFT |
1680                           RX_BUF_LENGTH, RDMA_RING_BUF_SIZE);
1681         /* Operate the queue in ring mode */
1682         rdma_writel(priv, 0, RDMA_START_ADDR_HI);
1683         rdma_writel(priv, 0, RDMA_START_ADDR_LO);
1684         rdma_writel(priv, 0, RDMA_END_ADDR_HI);
1685         rdma_writel(priv, priv->num_rx_desc_words - 1, RDMA_END_ADDR_LO);
1686
1687         netif_dbg(priv, hw, priv->netdev,
1688                   "RDMA cfg, num_rx_bds=%d, rx_bds=%p\n",
1689                   priv->num_rx_bds, priv->rx_bds);
1690
1691         return 0;
1692 }
1693
1694 static void bcm_sysport_fini_rx_ring(struct bcm_sysport_priv *priv)
1695 {
1696         struct bcm_sysport_cb *cb;
1697         unsigned int i;
1698         u32 reg;
1699
1700         /* Caller should ensure RDMA is disabled */
1701         reg = rdma_readl(priv, RDMA_STATUS);
1702         if (!(reg & RDMA_DISABLED))
1703                 netdev_warn(priv->netdev, "RDMA not stopped!\n");
1704
1705         for (i = 0; i < priv->num_rx_bds; i++) {
1706                 cb = &priv->rx_cbs[i];
1707                 if (dma_unmap_addr(cb, dma_addr))
1708                         dma_unmap_single(&priv->pdev->dev,
1709                                          dma_unmap_addr(cb, dma_addr),
1710                                          RX_BUF_LENGTH, DMA_FROM_DEVICE);
1711                 bcm_sysport_free_cb(cb);
1712         }
1713
1714         kfree(priv->rx_cbs);
1715         priv->rx_cbs = NULL;
1716
1717         netif_dbg(priv, hw, priv->netdev, "RDMA fini done\n");
1718 }
1719
1720 static void bcm_sysport_set_rx_mode(struct net_device *dev)
1721 {
1722         struct bcm_sysport_priv *priv = netdev_priv(dev);
1723         u32 reg;
1724
1725         if (priv->is_lite)
1726                 return;
1727
1728         reg = umac_readl(priv, UMAC_CMD);
1729         if (dev->flags & IFF_PROMISC)
1730                 reg |= CMD_PROMISC;
1731         else
1732                 reg &= ~CMD_PROMISC;
1733         umac_writel(priv, reg, UMAC_CMD);
1734
1735         /* No support for ALLMULTI */
1736         if (dev->flags & IFF_ALLMULTI)
1737                 return;
1738 }
1739
1740 static inline void umac_enable_set(struct bcm_sysport_priv *priv,
1741                                    u32 mask, unsigned int enable)
1742 {
1743         u32 reg;
1744
1745         if (!priv->is_lite) {
1746                 reg = umac_readl(priv, UMAC_CMD);
1747                 if (enable)
1748                         reg |= mask;
1749                 else
1750                         reg &= ~mask;
1751                 umac_writel(priv, reg, UMAC_CMD);
1752         } else {
1753                 reg = gib_readl(priv, GIB_CONTROL);
1754                 if (enable)
1755                         reg |= mask;
1756                 else
1757                         reg &= ~mask;
1758                 gib_writel(priv, reg, GIB_CONTROL);
1759         }
1760
1761         /* UniMAC stops on a packet boundary, wait for a full-sized packet
1762          * to be processed (1 msec).
1763          */
1764         if (enable == 0)
1765                 usleep_range(1000, 2000);
1766 }
1767
1768 static inline void umac_reset(struct bcm_sysport_priv *priv)
1769 {
1770         u32 reg;
1771
1772         if (priv->is_lite)
1773                 return;
1774
1775         reg = umac_readl(priv, UMAC_CMD);
1776         reg |= CMD_SW_RESET;
1777         umac_writel(priv, reg, UMAC_CMD);
1778         udelay(10);
1779         reg = umac_readl(priv, UMAC_CMD);
1780         reg &= ~CMD_SW_RESET;
1781         umac_writel(priv, reg, UMAC_CMD);
1782 }
1783
1784 static void umac_set_hw_addr(struct bcm_sysport_priv *priv,
1785                              unsigned char *addr)
1786 {
1787         u32 mac0 = (addr[0] << 24) | (addr[1] << 16) | (addr[2] << 8) |
1788                     addr[3];
1789         u32 mac1 = (addr[4] << 8) | addr[5];
1790
1791         if (!priv->is_lite) {
1792                 umac_writel(priv, mac0, UMAC_MAC0);
1793                 umac_writel(priv, mac1, UMAC_MAC1);
1794         } else {
1795                 gib_writel(priv, mac0, GIB_MAC0);
1796                 gib_writel(priv, mac1, GIB_MAC1);
1797         }
1798 }
1799
1800 static void topctrl_flush(struct bcm_sysport_priv *priv)
1801 {
1802         topctrl_writel(priv, RX_FLUSH, RX_FLUSH_CNTL);
1803         topctrl_writel(priv, TX_FLUSH, TX_FLUSH_CNTL);
1804         mdelay(1);
1805         topctrl_writel(priv, 0, RX_FLUSH_CNTL);
1806         topctrl_writel(priv, 0, TX_FLUSH_CNTL);
1807 }
1808
1809 static int bcm_sysport_change_mac(struct net_device *dev, void *p)
1810 {
1811         struct bcm_sysport_priv *priv = netdev_priv(dev);
1812         struct sockaddr *addr = p;
1813
1814         if (!is_valid_ether_addr(addr->sa_data))
1815                 return -EINVAL;
1816
1817         memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
1818
1819         /* interface is disabled, changes to MAC will be reflected on next
1820          * open call
1821          */
1822         if (!netif_running(dev))
1823                 return 0;
1824
1825         umac_set_hw_addr(priv, dev->dev_addr);
1826
1827         return 0;
1828 }
1829
1830 static void bcm_sysport_get_stats64(struct net_device *dev,
1831                                     struct rtnl_link_stats64 *stats)
1832 {
1833         struct bcm_sysport_priv *priv = netdev_priv(dev);
1834         struct bcm_sysport_stats64 *stats64 = &priv->stats64;
1835         unsigned int start;
1836
1837         netdev_stats_to_stats64(stats, &dev->stats);
1838
1839         bcm_sysport_update_tx_stats(priv, &stats->tx_bytes,
1840                                     &stats->tx_packets);
1841
1842         do {
1843                 start = u64_stats_fetch_begin_irq(&priv->syncp);
1844                 stats->rx_packets = stats64->rx_packets;
1845                 stats->rx_bytes = stats64->rx_bytes;
1846         } while (u64_stats_fetch_retry_irq(&priv->syncp, start));
1847 }
1848
1849 static void bcm_sysport_netif_start(struct net_device *dev)
1850 {
1851         struct bcm_sysport_priv *priv = netdev_priv(dev);
1852
1853         /* Enable NAPI */
1854         bcm_sysport_init_dim(priv, bcm_sysport_dim_work);
1855         bcm_sysport_init_rx_coalesce(priv);
1856         napi_enable(&priv->napi);
1857
1858         /* Enable RX interrupt and TX ring full interrupt */
1859         intrl2_0_mask_clear(priv, INTRL2_0_RDMA_MBDONE | INTRL2_0_TX_RING_FULL);
1860
1861         phy_start(dev->phydev);
1862
1863         /* Enable TX interrupts for the TXQs */
1864         if (!priv->is_lite)
1865                 intrl2_1_mask_clear(priv, 0xffffffff);
1866         else
1867                 intrl2_0_mask_clear(priv, INTRL2_0_TDMA_MBDONE_MASK);
1868
1869         /* Last call before we start the real business */
1870         netif_tx_start_all_queues(dev);
1871 }
1872
1873 static void rbuf_init(struct bcm_sysport_priv *priv)
1874 {
1875         u32 reg;
1876
1877         reg = rbuf_readl(priv, RBUF_CONTROL);
1878         reg |= RBUF_4B_ALGN | RBUF_RSB_EN;
1879         /* Set a correct RSB format on SYSTEMPORT Lite */
1880         if (priv->is_lite)
1881                 reg &= ~RBUF_RSB_SWAP1;
1882
1883         /* Set a correct RSB format based on host endian */
1884         if (!IS_ENABLED(CONFIG_CPU_BIG_ENDIAN))
1885                 reg |= RBUF_RSB_SWAP0;
1886         else
1887                 reg &= ~RBUF_RSB_SWAP0;
1888         rbuf_writel(priv, reg, RBUF_CONTROL);
1889 }
1890
1891 static inline void bcm_sysport_mask_all_intrs(struct bcm_sysport_priv *priv)
1892 {
1893         intrl2_0_mask_set(priv, 0xffffffff);
1894         intrl2_0_writel(priv, 0xffffffff, INTRL2_CPU_CLEAR);
1895         if (!priv->is_lite) {
1896                 intrl2_1_mask_set(priv, 0xffffffff);
1897                 intrl2_1_writel(priv, 0xffffffff, INTRL2_CPU_CLEAR);
1898         }
1899 }
1900
1901 static inline void gib_set_pad_extension(struct bcm_sysport_priv *priv)
1902 {
1903         u32 reg;
1904
1905         reg = gib_readl(priv, GIB_CONTROL);
1906         /* Include Broadcom tag in pad extension and fix up IPG_LENGTH */
1907         if (netdev_uses_dsa(priv->netdev)) {
1908                 reg &= ~(GIB_PAD_EXTENSION_MASK << GIB_PAD_EXTENSION_SHIFT);
1909                 reg |= ENET_BRCM_TAG_LEN << GIB_PAD_EXTENSION_SHIFT;
1910         }
1911         reg &= ~(GIB_IPG_LEN_MASK << GIB_IPG_LEN_SHIFT);
1912         reg |= 12 << GIB_IPG_LEN_SHIFT;
1913         gib_writel(priv, reg, GIB_CONTROL);
1914 }
1915
1916 static int bcm_sysport_open(struct net_device *dev)
1917 {
1918         struct bcm_sysport_priv *priv = netdev_priv(dev);
1919         struct phy_device *phydev;
1920         unsigned int i;
1921         int ret;
1922
1923         /* Reset UniMAC */
1924         umac_reset(priv);
1925
1926         /* Flush TX and RX FIFOs at TOPCTRL level */
1927         topctrl_flush(priv);
1928
1929         /* Disable the UniMAC RX/TX */
1930         umac_enable_set(priv, CMD_RX_EN | CMD_TX_EN, 0);
1931
1932         /* Enable RBUF 2bytes alignment and Receive Status Block */
1933         rbuf_init(priv);
1934
1935         /* Set maximum frame length */
1936         if (!priv->is_lite)
1937                 umac_writel(priv, UMAC_MAX_MTU_SIZE, UMAC_MAX_FRAME_LEN);
1938         else
1939                 gib_set_pad_extension(priv);
1940
1941         /* Set MAC address */
1942         umac_set_hw_addr(priv, dev->dev_addr);
1943
1944         /* Read CRC forward */
1945         if (!priv->is_lite)
1946                 priv->crc_fwd = !!(umac_readl(priv, UMAC_CMD) & CMD_CRC_FWD);
1947         else
1948                 priv->crc_fwd = !!(gib_readl(priv, GIB_CONTROL) &
1949                                    GIB_FCS_STRIP);
1950
1951         phydev = of_phy_connect(dev, priv->phy_dn, bcm_sysport_adj_link,
1952                                 0, priv->phy_interface);
1953         if (!phydev) {
1954                 netdev_err(dev, "could not attach to PHY\n");
1955                 return -ENODEV;
1956         }
1957
1958         /* Reset house keeping link status */
1959         priv->old_duplex = -1;
1960         priv->old_link = -1;
1961         priv->old_pause = -1;
1962
1963         /* mask all interrupts and request them */
1964         bcm_sysport_mask_all_intrs(priv);
1965
1966         ret = request_irq(priv->irq0, bcm_sysport_rx_isr, 0, dev->name, dev);
1967         if (ret) {
1968                 netdev_err(dev, "failed to request RX interrupt\n");
1969                 goto out_phy_disconnect;
1970         }
1971
1972         if (!priv->is_lite) {
1973                 ret = request_irq(priv->irq1, bcm_sysport_tx_isr, 0,
1974                                   dev->name, dev);
1975                 if (ret) {
1976                         netdev_err(dev, "failed to request TX interrupt\n");
1977                         goto out_free_irq0;
1978                 }
1979         }
1980
1981         /* Initialize both hardware and software ring */
1982         for (i = 0; i < dev->num_tx_queues; i++) {
1983                 ret = bcm_sysport_init_tx_ring(priv, i);
1984                 if (ret) {
1985                         netdev_err(dev, "failed to initialize TX ring %d\n",
1986                                    i);
1987                         goto out_free_tx_ring;
1988                 }
1989         }
1990
1991         /* Initialize linked-list */
1992         tdma_writel(priv, TDMA_LL_RAM_INIT_BUSY, TDMA_STATUS);
1993
1994         /* Initialize RX ring */
1995         ret = bcm_sysport_init_rx_ring(priv);
1996         if (ret) {
1997                 netdev_err(dev, "failed to initialize RX ring\n");
1998                 goto out_free_rx_ring;
1999         }
2000
2001         /* Turn on RDMA */
2002         ret = rdma_enable_set(priv, 1);
2003         if (ret)
2004                 goto out_free_rx_ring;
2005
2006         /* Turn on TDMA */
2007         ret = tdma_enable_set(priv, 1);
2008         if (ret)
2009                 goto out_clear_rx_int;
2010
2011         /* Turn on UniMAC TX/RX */
2012         umac_enable_set(priv, CMD_RX_EN | CMD_TX_EN, 1);
2013
2014         bcm_sysport_netif_start(dev);
2015
2016         return 0;
2017
2018 out_clear_rx_int:
2019         intrl2_0_mask_set(priv, INTRL2_0_RDMA_MBDONE | INTRL2_0_TX_RING_FULL);
2020 out_free_rx_ring:
2021         bcm_sysport_fini_rx_ring(priv);
2022 out_free_tx_ring:
2023         for (i = 0; i < dev->num_tx_queues; i++)
2024                 bcm_sysport_fini_tx_ring(priv, i);
2025         if (!priv->is_lite)
2026                 free_irq(priv->irq1, dev);
2027 out_free_irq0:
2028         free_irq(priv->irq0, dev);
2029 out_phy_disconnect:
2030         phy_disconnect(phydev);
2031         return ret;
2032 }
2033
2034 static void bcm_sysport_netif_stop(struct net_device *dev)
2035 {
2036         struct bcm_sysport_priv *priv = netdev_priv(dev);
2037
2038         /* stop all software from updating hardware */
2039         netif_tx_stop_all_queues(dev);
2040         napi_disable(&priv->napi);
2041         cancel_work_sync(&priv->dim.dim.work);
2042         phy_stop(dev->phydev);
2043
2044         /* mask all interrupts */
2045         bcm_sysport_mask_all_intrs(priv);
2046 }
2047
2048 static int bcm_sysport_stop(struct net_device *dev)
2049 {
2050         struct bcm_sysport_priv *priv = netdev_priv(dev);
2051         unsigned int i;
2052         int ret;
2053
2054         bcm_sysport_netif_stop(dev);
2055
2056         /* Disable UniMAC RX */
2057         umac_enable_set(priv, CMD_RX_EN, 0);
2058
2059         ret = tdma_enable_set(priv, 0);
2060         if (ret) {
2061                 netdev_err(dev, "timeout disabling RDMA\n");
2062                 return ret;
2063         }
2064
2065         /* Wait for a maximum packet size to be drained */
2066         usleep_range(2000, 3000);
2067
2068         ret = rdma_enable_set(priv, 0);
2069         if (ret) {
2070                 netdev_err(dev, "timeout disabling TDMA\n");
2071                 return ret;
2072         }
2073
2074         /* Disable UniMAC TX */
2075         umac_enable_set(priv, CMD_TX_EN, 0);
2076
2077         /* Free RX/TX rings SW structures */
2078         for (i = 0; i < dev->num_tx_queues; i++)
2079                 bcm_sysport_fini_tx_ring(priv, i);
2080         bcm_sysport_fini_rx_ring(priv);
2081
2082         free_irq(priv->irq0, dev);
2083         if (!priv->is_lite)
2084                 free_irq(priv->irq1, dev);
2085
2086         /* Disconnect from PHY */
2087         phy_disconnect(dev->phydev);
2088
2089         return 0;
2090 }
2091
2092 static const struct ethtool_ops bcm_sysport_ethtool_ops = {
2093         .get_drvinfo            = bcm_sysport_get_drvinfo,
2094         .get_msglevel           = bcm_sysport_get_msglvl,
2095         .set_msglevel           = bcm_sysport_set_msglvl,
2096         .get_link               = ethtool_op_get_link,
2097         .get_strings            = bcm_sysport_get_strings,
2098         .get_ethtool_stats      = bcm_sysport_get_stats,
2099         .get_sset_count         = bcm_sysport_get_sset_count,
2100         .get_wol                = bcm_sysport_get_wol,
2101         .set_wol                = bcm_sysport_set_wol,
2102         .get_coalesce           = bcm_sysport_get_coalesce,
2103         .set_coalesce           = bcm_sysport_set_coalesce,
2104         .get_link_ksettings     = phy_ethtool_get_link_ksettings,
2105         .set_link_ksettings     = phy_ethtool_set_link_ksettings,
2106 };
2107
2108 static u16 bcm_sysport_select_queue(struct net_device *dev, struct sk_buff *skb,
2109                                     void *accel_priv,
2110                                     select_queue_fallback_t fallback)
2111 {
2112         struct bcm_sysport_priv *priv = netdev_priv(dev);
2113         u16 queue = skb_get_queue_mapping(skb);
2114         struct bcm_sysport_tx_ring *tx_ring;
2115         unsigned int q, port;
2116
2117         if (!netdev_uses_dsa(dev))
2118                 return fallback(dev, skb);
2119
2120         /* DSA tagging layer will have configured the correct queue */
2121         q = BRCM_TAG_GET_QUEUE(queue);
2122         port = BRCM_TAG_GET_PORT(queue);
2123         tx_ring = priv->ring_map[q + port * priv->per_port_num_tx_queues];
2124
2125         if (unlikely(!tx_ring))
2126                 return fallback(dev, skb);
2127
2128         return tx_ring->index;
2129 }
2130
2131 static const struct net_device_ops bcm_sysport_netdev_ops = {
2132         .ndo_start_xmit         = bcm_sysport_xmit,
2133         .ndo_tx_timeout         = bcm_sysport_tx_timeout,
2134         .ndo_open               = bcm_sysport_open,
2135         .ndo_stop               = bcm_sysport_stop,
2136         .ndo_set_features       = bcm_sysport_set_features,
2137         .ndo_set_rx_mode        = bcm_sysport_set_rx_mode,
2138         .ndo_set_mac_address    = bcm_sysport_change_mac,
2139 #ifdef CONFIG_NET_POLL_CONTROLLER
2140         .ndo_poll_controller    = bcm_sysport_poll_controller,
2141 #endif
2142         .ndo_get_stats64        = bcm_sysport_get_stats64,
2143         .ndo_select_queue       = bcm_sysport_select_queue,
2144 };
2145
2146 static int bcm_sysport_map_queues(struct net_device *dev,
2147                                   struct dsa_notifier_register_info *info)
2148 {
2149         struct bcm_sysport_priv *priv = netdev_priv(dev);
2150         struct bcm_sysport_tx_ring *ring;
2151         struct net_device *slave_dev;
2152         unsigned int num_tx_queues;
2153         unsigned int q, start, port;
2154
2155         /* We can't be setting up queue inspection for non directly attached
2156          * switches
2157          */
2158         if (info->switch_number)
2159                 return 0;
2160
2161         if (dev->netdev_ops != &bcm_sysport_netdev_ops)
2162                 return 0;
2163
2164         port = info->port_number;
2165         slave_dev = info->info.dev;
2166
2167         /* On SYSTEMPORT Lite we have twice as less queues, so we cannot do a
2168          * 1:1 mapping, we can only do a 2:1 mapping. By reducing the number of
2169          * per-port (slave_dev) network devices queue, we achieve just that.
2170          * This need to happen now before any slave network device is used such
2171          * it accurately reflects the number of real TX queues.
2172          */
2173         if (priv->is_lite)
2174                 netif_set_real_num_tx_queues(slave_dev,
2175                                              slave_dev->num_tx_queues / 2);
2176         num_tx_queues = slave_dev->real_num_tx_queues;
2177
2178         if (priv->per_port_num_tx_queues &&
2179             priv->per_port_num_tx_queues != num_tx_queues)
2180                 netdev_warn(slave_dev, "asymetric number of per-port queues\n");
2181
2182         priv->per_port_num_tx_queues = num_tx_queues;
2183
2184         start = find_first_zero_bit(&priv->queue_bitmap, dev->num_tx_queues);
2185         for (q = 0; q < num_tx_queues; q++) {
2186                 ring = &priv->tx_rings[q + start];
2187
2188                 /* Just remember the mapping actual programming done
2189                  * during bcm_sysport_init_tx_ring
2190                  */
2191                 ring->switch_queue = q;
2192                 ring->switch_port = port;
2193                 ring->inspect = true;
2194                 priv->ring_map[q + port * num_tx_queues] = ring;
2195
2196                 /* Set all queues as being used now */
2197                 set_bit(q + start, &priv->queue_bitmap);
2198         }
2199
2200         return 0;
2201 }
2202
2203 static int bcm_sysport_dsa_notifier(struct notifier_block *unused,
2204                                     unsigned long event, void *ptr)
2205 {
2206         struct dsa_notifier_register_info *info;
2207
2208         if (event != DSA_PORT_REGISTER)
2209                 return NOTIFY_DONE;
2210
2211         info = ptr;
2212
2213         return notifier_from_errno(bcm_sysport_map_queues(info->master, info));
2214 }
2215
2216 #define REV_FMT "v%2x.%02x"
2217
2218 static const struct bcm_sysport_hw_params bcm_sysport_params[] = {
2219         [SYSTEMPORT] = {
2220                 .is_lite = false,
2221                 .num_rx_desc_words = SP_NUM_HW_RX_DESC_WORDS,
2222         },
2223         [SYSTEMPORT_LITE] = {
2224                 .is_lite = true,
2225                 .num_rx_desc_words = SP_LT_NUM_HW_RX_DESC_WORDS,
2226         },
2227 };
2228
2229 static const struct of_device_id bcm_sysport_of_match[] = {
2230         { .compatible = "brcm,systemportlite-v1.00",
2231           .data = &bcm_sysport_params[SYSTEMPORT_LITE] },
2232         { .compatible = "brcm,systemport-v1.00",
2233           .data = &bcm_sysport_params[SYSTEMPORT] },
2234         { .compatible = "brcm,systemport",
2235           .data = &bcm_sysport_params[SYSTEMPORT] },
2236         { /* sentinel */ }
2237 };
2238 MODULE_DEVICE_TABLE(of, bcm_sysport_of_match);
2239
2240 static int bcm_sysport_probe(struct platform_device *pdev)
2241 {
2242         const struct bcm_sysport_hw_params *params;
2243         const struct of_device_id *of_id = NULL;
2244         struct bcm_sysport_priv *priv;
2245         struct device_node *dn;
2246         struct net_device *dev;
2247         const void *macaddr;
2248         struct resource *r;
2249         u32 txq, rxq;
2250         int ret;
2251
2252         dn = pdev->dev.of_node;
2253         r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2254         of_id = of_match_node(bcm_sysport_of_match, dn);
2255         if (!of_id || !of_id->data)
2256                 return -EINVAL;
2257
2258         /* Fairly quickly we need to know the type of adapter we have */
2259         params = of_id->data;
2260
2261         /* Read the Transmit/Receive Queue properties */
2262         if (of_property_read_u32(dn, "systemport,num-txq", &txq))
2263                 txq = TDMA_NUM_RINGS;
2264         if (of_property_read_u32(dn, "systemport,num-rxq", &rxq))
2265                 rxq = 1;
2266
2267         /* Sanity check the number of transmit queues */
2268         if (!txq || txq > TDMA_NUM_RINGS)
2269                 return -EINVAL;
2270
2271         dev = alloc_etherdev_mqs(sizeof(*priv), txq, rxq);
2272         if (!dev)
2273                 return -ENOMEM;
2274
2275         /* Initialize private members */
2276         priv = netdev_priv(dev);
2277
2278         /* Allocate number of TX rings */
2279         priv->tx_rings = devm_kcalloc(&pdev->dev, txq,
2280                                       sizeof(struct bcm_sysport_tx_ring),
2281                                       GFP_KERNEL);
2282         if (!priv->tx_rings)
2283                 return -ENOMEM;
2284
2285         priv->is_lite = params->is_lite;
2286         priv->num_rx_desc_words = params->num_rx_desc_words;
2287
2288         priv->irq0 = platform_get_irq(pdev, 0);
2289         if (!priv->is_lite) {
2290                 priv->irq1 = platform_get_irq(pdev, 1);
2291                 priv->wol_irq = platform_get_irq(pdev, 2);
2292         } else {
2293                 priv->wol_irq = platform_get_irq(pdev, 1);
2294         }
2295         if (priv->irq0 <= 0 || (priv->irq1 <= 0 && !priv->is_lite)) {
2296                 dev_err(&pdev->dev, "invalid interrupts\n");
2297                 ret = -EINVAL;
2298                 goto err_free_netdev;
2299         }
2300
2301         priv->base = devm_ioremap_resource(&pdev->dev, r);
2302         if (IS_ERR(priv->base)) {
2303                 ret = PTR_ERR(priv->base);
2304                 goto err_free_netdev;
2305         }
2306
2307         priv->netdev = dev;
2308         priv->pdev = pdev;
2309
2310         priv->phy_interface = of_get_phy_mode(dn);
2311         /* Default to GMII interface mode */
2312         if (priv->phy_interface < 0)
2313                 priv->phy_interface = PHY_INTERFACE_MODE_GMII;
2314
2315         /* In the case of a fixed PHY, the DT node associated
2316          * to the PHY is the Ethernet MAC DT node.
2317          */
2318         if (of_phy_is_fixed_link(dn)) {
2319                 ret = of_phy_register_fixed_link(dn);
2320                 if (ret) {
2321                         dev_err(&pdev->dev, "failed to register fixed PHY\n");
2322                         goto err_free_netdev;
2323                 }
2324
2325                 priv->phy_dn = dn;
2326         }
2327
2328         /* Initialize netdevice members */
2329         macaddr = of_get_mac_address(dn);
2330         if (!macaddr || !is_valid_ether_addr(macaddr)) {
2331                 dev_warn(&pdev->dev, "using random Ethernet MAC\n");
2332                 eth_hw_addr_random(dev);
2333         } else {
2334                 ether_addr_copy(dev->dev_addr, macaddr);
2335         }
2336
2337         SET_NETDEV_DEV(dev, &pdev->dev);
2338         dev_set_drvdata(&pdev->dev, dev);
2339         dev->ethtool_ops = &bcm_sysport_ethtool_ops;
2340         dev->netdev_ops = &bcm_sysport_netdev_ops;
2341         netif_napi_add(dev, &priv->napi, bcm_sysport_poll, 64);
2342
2343         /* HW supported features, none enabled by default */
2344         dev->hw_features |= NETIF_F_RXCSUM | NETIF_F_HIGHDMA |
2345                                 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM;
2346
2347         /* Request the WOL interrupt and advertise suspend if available */
2348         priv->wol_irq_disabled = 1;
2349         ret = devm_request_irq(&pdev->dev, priv->wol_irq,
2350                                bcm_sysport_wol_isr, 0, dev->name, priv);
2351         if (!ret)
2352                 device_set_wakeup_capable(&pdev->dev, 1);
2353
2354         /* Set the needed headroom once and for all */
2355         BUILD_BUG_ON(sizeof(struct bcm_tsb) != 8);
2356         dev->needed_headroom += sizeof(struct bcm_tsb);
2357
2358         /* libphy will adjust the link state accordingly */
2359         netif_carrier_off(dev);
2360
2361         priv->rx_max_coalesced_frames = 1;
2362         u64_stats_init(&priv->syncp);
2363
2364         priv->dsa_notifier.notifier_call = bcm_sysport_dsa_notifier;
2365
2366         ret = register_dsa_notifier(&priv->dsa_notifier);
2367         if (ret) {
2368                 dev_err(&pdev->dev, "failed to register DSA notifier\n");
2369                 goto err_deregister_fixed_link;
2370         }
2371
2372         ret = register_netdev(dev);
2373         if (ret) {
2374                 dev_err(&pdev->dev, "failed to register net_device\n");
2375                 goto err_deregister_notifier;
2376         }
2377
2378         priv->rev = topctrl_readl(priv, REV_CNTL) & REV_MASK;
2379         dev_info(&pdev->dev,
2380                  "Broadcom SYSTEMPORT%s" REV_FMT
2381                  " at 0x%p (irqs: %d, %d, TXQs: %d, RXQs: %d)\n",
2382                  priv->is_lite ? " Lite" : "",
2383                  (priv->rev >> 8) & 0xff, priv->rev & 0xff,
2384                  priv->base, priv->irq0, priv->irq1, txq, rxq);
2385
2386         return 0;
2387
2388 err_deregister_notifier:
2389         unregister_dsa_notifier(&priv->dsa_notifier);
2390 err_deregister_fixed_link:
2391         if (of_phy_is_fixed_link(dn))
2392                 of_phy_deregister_fixed_link(dn);
2393 err_free_netdev:
2394         free_netdev(dev);
2395         return ret;
2396 }
2397
2398 static int bcm_sysport_remove(struct platform_device *pdev)
2399 {
2400         struct net_device *dev = dev_get_drvdata(&pdev->dev);
2401         struct bcm_sysport_priv *priv = netdev_priv(dev);
2402         struct device_node *dn = pdev->dev.of_node;
2403
2404         /* Not much to do, ndo_close has been called
2405          * and we use managed allocations
2406          */
2407         unregister_dsa_notifier(&priv->dsa_notifier);
2408         unregister_netdev(dev);
2409         if (of_phy_is_fixed_link(dn))
2410                 of_phy_deregister_fixed_link(dn);
2411         free_netdev(dev);
2412         dev_set_drvdata(&pdev->dev, NULL);
2413
2414         return 0;
2415 }
2416
2417 #ifdef CONFIG_PM_SLEEP
2418 static int bcm_sysport_suspend_to_wol(struct bcm_sysport_priv *priv)
2419 {
2420         struct net_device *ndev = priv->netdev;
2421         unsigned int timeout = 1000;
2422         u32 reg;
2423
2424         /* Password has already been programmed */
2425         reg = umac_readl(priv, UMAC_MPD_CTRL);
2426         reg |= MPD_EN;
2427         reg &= ~PSW_EN;
2428         if (priv->wolopts & WAKE_MAGICSECURE)
2429                 reg |= PSW_EN;
2430         umac_writel(priv, reg, UMAC_MPD_CTRL);
2431
2432         /* Make sure RBUF entered WoL mode as result */
2433         do {
2434                 reg = rbuf_readl(priv, RBUF_STATUS);
2435                 if (reg & RBUF_WOL_MODE)
2436                         break;
2437
2438                 udelay(10);
2439         } while (timeout-- > 0);
2440
2441         /* Do not leave the UniMAC RBUF matching only MPD packets */
2442         if (!timeout) {
2443                 reg = umac_readl(priv, UMAC_MPD_CTRL);
2444                 reg &= ~MPD_EN;
2445                 umac_writel(priv, reg, UMAC_MPD_CTRL);
2446                 netif_err(priv, wol, ndev, "failed to enter WOL mode\n");
2447                 return -ETIMEDOUT;
2448         }
2449
2450         /* UniMAC receive needs to be turned on */
2451         umac_enable_set(priv, CMD_RX_EN, 1);
2452
2453         /* Enable the interrupt wake-up source */
2454         intrl2_0_mask_clear(priv, INTRL2_0_MPD);
2455
2456         netif_dbg(priv, wol, ndev, "entered WOL mode\n");
2457
2458         return 0;
2459 }
2460
2461 static int bcm_sysport_suspend(struct device *d)
2462 {
2463         struct net_device *dev = dev_get_drvdata(d);
2464         struct bcm_sysport_priv *priv = netdev_priv(dev);
2465         unsigned int i;
2466         int ret = 0;
2467         u32 reg;
2468
2469         if (!netif_running(dev))
2470                 return 0;
2471
2472         bcm_sysport_netif_stop(dev);
2473
2474         phy_suspend(dev->phydev);
2475
2476         netif_device_detach(dev);
2477
2478         /* Disable UniMAC RX */
2479         umac_enable_set(priv, CMD_RX_EN, 0);
2480
2481         ret = rdma_enable_set(priv, 0);
2482         if (ret) {
2483                 netdev_err(dev, "RDMA timeout!\n");
2484                 return ret;
2485         }
2486
2487         /* Disable RXCHK if enabled */
2488         if (priv->rx_chk_en) {
2489                 reg = rxchk_readl(priv, RXCHK_CONTROL);
2490                 reg &= ~RXCHK_EN;
2491                 rxchk_writel(priv, reg, RXCHK_CONTROL);
2492         }
2493
2494         /* Flush RX pipe */
2495         if (!priv->wolopts)
2496                 topctrl_writel(priv, RX_FLUSH, RX_FLUSH_CNTL);
2497
2498         ret = tdma_enable_set(priv, 0);
2499         if (ret) {
2500                 netdev_err(dev, "TDMA timeout!\n");
2501                 return ret;
2502         }
2503
2504         /* Wait for a packet boundary */
2505         usleep_range(2000, 3000);
2506
2507         umac_enable_set(priv, CMD_TX_EN, 0);
2508
2509         topctrl_writel(priv, TX_FLUSH, TX_FLUSH_CNTL);
2510
2511         /* Free RX/TX rings SW structures */
2512         for (i = 0; i < dev->num_tx_queues; i++)
2513                 bcm_sysport_fini_tx_ring(priv, i);
2514         bcm_sysport_fini_rx_ring(priv);
2515
2516         /* Get prepared for Wake-on-LAN */
2517         if (device_may_wakeup(d) && priv->wolopts)
2518                 ret = bcm_sysport_suspend_to_wol(priv);
2519
2520         return ret;
2521 }
2522
2523 static int bcm_sysport_resume(struct device *d)
2524 {
2525         struct net_device *dev = dev_get_drvdata(d);
2526         struct bcm_sysport_priv *priv = netdev_priv(dev);
2527         unsigned int i;
2528         u32 reg;
2529         int ret;
2530
2531         if (!netif_running(dev))
2532                 return 0;
2533
2534         umac_reset(priv);
2535
2536         /* We may have been suspended and never received a WOL event that
2537          * would turn off MPD detection, take care of that now
2538          */
2539         bcm_sysport_resume_from_wol(priv);
2540
2541         /* Initialize both hardware and software ring */
2542         for (i = 0; i < dev->num_tx_queues; i++) {
2543                 ret = bcm_sysport_init_tx_ring(priv, i);
2544                 if (ret) {
2545                         netdev_err(dev, "failed to initialize TX ring %d\n",
2546                                    i);
2547                         goto out_free_tx_rings;
2548                 }
2549         }
2550
2551         /* Initialize linked-list */
2552         tdma_writel(priv, TDMA_LL_RAM_INIT_BUSY, TDMA_STATUS);
2553
2554         /* Initialize RX ring */
2555         ret = bcm_sysport_init_rx_ring(priv);
2556         if (ret) {
2557                 netdev_err(dev, "failed to initialize RX ring\n");
2558                 goto out_free_rx_ring;
2559         }
2560
2561         netif_device_attach(dev);
2562
2563         /* RX pipe enable */
2564         topctrl_writel(priv, 0, RX_FLUSH_CNTL);
2565
2566         ret = rdma_enable_set(priv, 1);
2567         if (ret) {
2568                 netdev_err(dev, "failed to enable RDMA\n");
2569                 goto out_free_rx_ring;
2570         }
2571
2572         /* Enable rxhck */
2573         if (priv->rx_chk_en) {
2574                 reg = rxchk_readl(priv, RXCHK_CONTROL);
2575                 reg |= RXCHK_EN;
2576                 rxchk_writel(priv, reg, RXCHK_CONTROL);
2577         }
2578
2579         rbuf_init(priv);
2580
2581         /* Set maximum frame length */
2582         if (!priv->is_lite)
2583                 umac_writel(priv, UMAC_MAX_MTU_SIZE, UMAC_MAX_FRAME_LEN);
2584         else
2585                 gib_set_pad_extension(priv);
2586
2587         /* Set MAC address */
2588         umac_set_hw_addr(priv, dev->dev_addr);
2589
2590         umac_enable_set(priv, CMD_RX_EN, 1);
2591
2592         /* TX pipe enable */
2593         topctrl_writel(priv, 0, TX_FLUSH_CNTL);
2594
2595         umac_enable_set(priv, CMD_TX_EN, 1);
2596
2597         ret = tdma_enable_set(priv, 1);
2598         if (ret) {
2599                 netdev_err(dev, "TDMA timeout!\n");
2600                 goto out_free_rx_ring;
2601         }
2602
2603         phy_resume(dev->phydev);
2604
2605         bcm_sysport_netif_start(dev);
2606
2607         return 0;
2608
2609 out_free_rx_ring:
2610         bcm_sysport_fini_rx_ring(priv);
2611 out_free_tx_rings:
2612         for (i = 0; i < dev->num_tx_queues; i++)
2613                 bcm_sysport_fini_tx_ring(priv, i);
2614         return ret;
2615 }
2616 #endif
2617
2618 static SIMPLE_DEV_PM_OPS(bcm_sysport_pm_ops,
2619                 bcm_sysport_suspend, bcm_sysport_resume);
2620
2621 static struct platform_driver bcm_sysport_driver = {
2622         .probe  = bcm_sysport_probe,
2623         .remove = bcm_sysport_remove,
2624         .driver =  {
2625                 .name = "brcm-systemport",
2626                 .of_match_table = bcm_sysport_of_match,
2627                 .pm = &bcm_sysport_pm_ops,
2628         },
2629 };
2630 module_platform_driver(bcm_sysport_driver);
2631
2632 MODULE_AUTHOR("Broadcom Corporation");
2633 MODULE_DESCRIPTION("Broadcom System Port Ethernet MAC driver");
2634 MODULE_ALIAS("platform:brcm-systemport");
2635 MODULE_LICENSE("GPL");