2 * Copyright (C) 2015 Cavium, Inc.
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of version 2 of the GNU General Public License
6 * as published by the Free Software Foundation.
9 #include <linux/module.h>
10 #include <linux/interrupt.h>
11 #include <linux/pci.h>
12 #include <linux/netdevice.h>
13 #include <linux/if_vlan.h>
14 #include <linux/etherdevice.h>
15 #include <linux/ethtool.h>
16 #include <linux/log2.h>
17 #include <linux/prefetch.h>
18 #include <linux/irq.h>
19 #include <linux/iommu.h>
20 #include <linux/bpf.h>
21 #include <linux/bpf_trace.h>
22 #include <linux/filter.h>
23 #include <linux/net_tstamp.h>
24 #include <linux/workqueue.h>
28 #include "nicvf_queues.h"
29 #include "thunder_bgx.h"
30 #include "../common/cavium_ptp.h"
32 #define DRV_NAME "nicvf"
33 #define DRV_VERSION "1.0"
35 /* Supported devices */
36 static const struct pci_device_id nicvf_id_table[] = {
37 { PCI_DEVICE_SUB(PCI_VENDOR_ID_CAVIUM,
38 PCI_DEVICE_ID_THUNDER_NIC_VF,
40 PCI_SUBSYS_DEVID_88XX_NIC_VF) },
41 { PCI_DEVICE_SUB(PCI_VENDOR_ID_CAVIUM,
42 PCI_DEVICE_ID_THUNDER_PASS1_NIC_VF,
44 PCI_SUBSYS_DEVID_88XX_PASS1_NIC_VF) },
45 { PCI_DEVICE_SUB(PCI_VENDOR_ID_CAVIUM,
46 PCI_DEVICE_ID_THUNDER_NIC_VF,
48 PCI_SUBSYS_DEVID_81XX_NIC_VF) },
49 { PCI_DEVICE_SUB(PCI_VENDOR_ID_CAVIUM,
50 PCI_DEVICE_ID_THUNDER_NIC_VF,
52 PCI_SUBSYS_DEVID_83XX_NIC_VF) },
53 { 0, } /* end of table */
56 MODULE_AUTHOR("Sunil Goutham");
57 MODULE_DESCRIPTION("Cavium Thunder NIC Virtual Function Driver");
58 MODULE_LICENSE("GPL v2");
59 MODULE_VERSION(DRV_VERSION);
60 MODULE_DEVICE_TABLE(pci, nicvf_id_table);
62 static int debug = 0x00;
63 module_param(debug, int, 0644);
64 MODULE_PARM_DESC(debug, "Debug message level bitmap");
66 static int cpi_alg = CPI_ALG_NONE;
67 module_param(cpi_alg, int, 0444);
68 MODULE_PARM_DESC(cpi_alg,
69 "PFC algorithm (0=none, 1=VLAN, 2=VLAN16, 3=IP Diffserv)");
71 static inline u8 nicvf_netdev_qidx(struct nicvf *nic, u8 qidx)
74 return qidx + ((nic->sqs_id + 1) * MAX_CMP_QUEUES_PER_QS);
79 /* The Cavium ThunderX network controller can *only* be found in SoCs
80 * containing the ThunderX ARM64 CPU implementation. All accesses to the device
81 * registers on this platform are implicitly strongly ordered with respect
82 * to memory accesses. So writeq_relaxed() and readq_relaxed() are safe to use
83 * with no memory barriers in this driver. The readq()/writeq() functions add
84 * explicit ordering operation which in this case are redundant, and only
88 /* Register read/write APIs */
89 void nicvf_reg_write(struct nicvf *nic, u64 offset, u64 val)
91 writeq_relaxed(val, nic->reg_base + offset);
94 u64 nicvf_reg_read(struct nicvf *nic, u64 offset)
96 return readq_relaxed(nic->reg_base + offset);
99 void nicvf_queue_reg_write(struct nicvf *nic, u64 offset,
102 void __iomem *addr = nic->reg_base + offset;
104 writeq_relaxed(val, addr + (qidx << NIC_Q_NUM_SHIFT));
107 u64 nicvf_queue_reg_read(struct nicvf *nic, u64 offset, u64 qidx)
109 void __iomem *addr = nic->reg_base + offset;
111 return readq_relaxed(addr + (qidx << NIC_Q_NUM_SHIFT));
114 /* VF -> PF mailbox communication */
115 static void nicvf_write_to_mbx(struct nicvf *nic, union nic_mbx *mbx)
117 u64 *msg = (u64 *)mbx;
119 nicvf_reg_write(nic, NIC_VF_PF_MAILBOX_0_1 + 0, msg[0]);
120 nicvf_reg_write(nic, NIC_VF_PF_MAILBOX_0_1 + 8, msg[1]);
123 int nicvf_send_msg_to_pf(struct nicvf *nic, union nic_mbx *mbx)
125 int timeout = NIC_MBOX_MSG_TIMEOUT;
128 nic->pf_acked = false;
129 nic->pf_nacked = false;
131 nicvf_write_to_mbx(nic, mbx);
133 /* Wait for previous message to be acked, timeout 2sec */
134 while (!nic->pf_acked) {
135 if (nic->pf_nacked) {
136 netdev_err(nic->netdev,
137 "PF NACK to mbox msg 0x%02x from VF%d\n",
138 (mbx->msg.msg & 0xFF), nic->vf_id);
146 netdev_err(nic->netdev,
147 "PF didn't ACK to mbox msg 0x%02x from VF%d\n",
148 (mbx->msg.msg & 0xFF), nic->vf_id);
155 /* Checks if VF is able to comminicate with PF
156 * and also gets the VNIC number this VF is associated to.
158 static int nicvf_check_pf_ready(struct nicvf *nic)
160 union nic_mbx mbx = {};
162 mbx.msg.msg = NIC_MBOX_MSG_READY;
163 if (nicvf_send_msg_to_pf(nic, &mbx)) {
164 netdev_err(nic->netdev,
165 "PF didn't respond to READY msg\n");
172 static void nicvf_send_cfg_done(struct nicvf *nic)
174 union nic_mbx mbx = {};
176 mbx.msg.msg = NIC_MBOX_MSG_CFG_DONE;
177 if (nicvf_send_msg_to_pf(nic, &mbx)) {
178 netdev_err(nic->netdev,
179 "PF didn't respond to CFG DONE msg\n");
183 static void nicvf_read_bgx_stats(struct nicvf *nic, struct bgx_stats_msg *bgx)
186 nic->bgx_stats.rx_stats[bgx->idx] = bgx->stats;
188 nic->bgx_stats.tx_stats[bgx->idx] = bgx->stats;
191 static void nicvf_handle_mbx_intr(struct nicvf *nic)
193 union nic_mbx mbx = {};
198 mbx_addr = NIC_VF_PF_MAILBOX_0_1;
199 mbx_data = (u64 *)&mbx;
201 for (i = 0; i < NIC_PF_VF_MAILBOX_SIZE; i++) {
202 *mbx_data = nicvf_reg_read(nic, mbx_addr);
204 mbx_addr += sizeof(u64);
207 netdev_dbg(nic->netdev, "Mbox message: msg: 0x%x\n", mbx.msg.msg);
208 switch (mbx.msg.msg) {
209 case NIC_MBOX_MSG_READY:
210 nic->pf_acked = true;
211 nic->vf_id = mbx.nic_cfg.vf_id & 0x7F;
212 nic->tns_mode = mbx.nic_cfg.tns_mode & 0x7F;
213 nic->node = mbx.nic_cfg.node_id;
214 if (!nic->set_mac_pending)
215 ether_addr_copy(nic->netdev->dev_addr,
216 mbx.nic_cfg.mac_addr);
217 nic->sqs_mode = mbx.nic_cfg.sqs_mode;
218 nic->loopback_supported = mbx.nic_cfg.loopback_supported;
219 nic->link_up = false;
223 case NIC_MBOX_MSG_ACK:
224 nic->pf_acked = true;
226 case NIC_MBOX_MSG_NACK:
227 nic->pf_nacked = true;
229 case NIC_MBOX_MSG_RSS_SIZE:
230 nic->rss_info.rss_size = mbx.rss_size.ind_tbl_size;
231 nic->pf_acked = true;
233 case NIC_MBOX_MSG_BGX_STATS:
234 nicvf_read_bgx_stats(nic, &mbx.bgx_stats);
235 nic->pf_acked = true;
237 case NIC_MBOX_MSG_BGX_LINK_CHANGE:
238 nic->pf_acked = true;
239 nic->link_up = mbx.link_status.link_up;
240 nic->duplex = mbx.link_status.duplex;
241 nic->speed = mbx.link_status.speed;
242 nic->mac_type = mbx.link_status.mac_type;
244 netdev_info(nic->netdev, "Link is Up %d Mbps %s duplex\n",
246 nic->duplex == DUPLEX_FULL ?
248 netif_carrier_on(nic->netdev);
249 netif_tx_start_all_queues(nic->netdev);
251 netdev_info(nic->netdev, "Link is Down\n");
252 netif_carrier_off(nic->netdev);
253 netif_tx_stop_all_queues(nic->netdev);
256 case NIC_MBOX_MSG_ALLOC_SQS:
257 nic->sqs_count = mbx.sqs_alloc.qs_count;
258 nic->pf_acked = true;
260 case NIC_MBOX_MSG_SNICVF_PTR:
261 /* Primary VF: make note of secondary VF's pointer
262 * to be used while packet transmission.
264 nic->snicvf[mbx.nicvf.sqs_id] =
265 (struct nicvf *)mbx.nicvf.nicvf;
266 nic->pf_acked = true;
268 case NIC_MBOX_MSG_PNICVF_PTR:
269 /* Secondary VF/Qset: make note of primary VF's pointer
270 * to be used while packet reception, to handover packet
271 * to primary VF's netdev.
273 nic->pnicvf = (struct nicvf *)mbx.nicvf.nicvf;
274 nic->pf_acked = true;
276 case NIC_MBOX_MSG_PFC:
277 nic->pfc.autoneg = mbx.pfc.autoneg;
278 nic->pfc.fc_rx = mbx.pfc.fc_rx;
279 nic->pfc.fc_tx = mbx.pfc.fc_tx;
280 nic->pf_acked = true;
283 netdev_err(nic->netdev,
284 "Invalid message from PF, msg 0x%x\n", mbx.msg.msg);
287 nicvf_clear_intr(nic, NICVF_INTR_MBOX, 0);
290 static int nicvf_hw_set_mac_addr(struct nicvf *nic, struct net_device *netdev)
292 union nic_mbx mbx = {};
294 mbx.mac.msg = NIC_MBOX_MSG_SET_MAC;
295 mbx.mac.vf_id = nic->vf_id;
296 ether_addr_copy(mbx.mac.mac_addr, netdev->dev_addr);
298 return nicvf_send_msg_to_pf(nic, &mbx);
301 static void nicvf_config_cpi(struct nicvf *nic)
303 union nic_mbx mbx = {};
305 mbx.cpi_cfg.msg = NIC_MBOX_MSG_CPI_CFG;
306 mbx.cpi_cfg.vf_id = nic->vf_id;
307 mbx.cpi_cfg.cpi_alg = nic->cpi_alg;
308 mbx.cpi_cfg.rq_cnt = nic->qs->rq_cnt;
310 nicvf_send_msg_to_pf(nic, &mbx);
313 static void nicvf_get_rss_size(struct nicvf *nic)
315 union nic_mbx mbx = {};
317 mbx.rss_size.msg = NIC_MBOX_MSG_RSS_SIZE;
318 mbx.rss_size.vf_id = nic->vf_id;
319 nicvf_send_msg_to_pf(nic, &mbx);
322 void nicvf_config_rss(struct nicvf *nic)
324 union nic_mbx mbx = {};
325 struct nicvf_rss_info *rss = &nic->rss_info;
326 int ind_tbl_len = rss->rss_size;
329 mbx.rss_cfg.vf_id = nic->vf_id;
330 mbx.rss_cfg.hash_bits = rss->hash_bits;
331 while (ind_tbl_len) {
332 mbx.rss_cfg.tbl_offset = nextq;
333 mbx.rss_cfg.tbl_len = min(ind_tbl_len,
334 RSS_IND_TBL_LEN_PER_MBX_MSG);
335 mbx.rss_cfg.msg = mbx.rss_cfg.tbl_offset ?
336 NIC_MBOX_MSG_RSS_CFG_CONT : NIC_MBOX_MSG_RSS_CFG;
338 for (i = 0; i < mbx.rss_cfg.tbl_len; i++)
339 mbx.rss_cfg.ind_tbl[i] = rss->ind_tbl[nextq++];
341 nicvf_send_msg_to_pf(nic, &mbx);
343 ind_tbl_len -= mbx.rss_cfg.tbl_len;
347 void nicvf_set_rss_key(struct nicvf *nic)
349 struct nicvf_rss_info *rss = &nic->rss_info;
350 u64 key_addr = NIC_VNIC_RSS_KEY_0_4;
353 for (idx = 0; idx < RSS_HASH_KEY_SIZE; idx++) {
354 nicvf_reg_write(nic, key_addr, rss->key[idx]);
355 key_addr += sizeof(u64);
359 static int nicvf_rss_init(struct nicvf *nic)
361 struct nicvf_rss_info *rss = &nic->rss_info;
364 nicvf_get_rss_size(nic);
366 if (cpi_alg != CPI_ALG_NONE) {
374 netdev_rss_key_fill(rss->key, RSS_HASH_KEY_SIZE * sizeof(u64));
375 nicvf_set_rss_key(nic);
377 rss->cfg = RSS_IP_HASH_ENA | RSS_TCP_HASH_ENA | RSS_UDP_HASH_ENA;
378 nicvf_reg_write(nic, NIC_VNIC_RSS_CFG, rss->cfg);
380 rss->hash_bits = ilog2(rounddown_pow_of_two(rss->rss_size));
382 for (idx = 0; idx < rss->rss_size; idx++)
383 rss->ind_tbl[idx] = ethtool_rxfh_indir_default(idx,
385 nicvf_config_rss(nic);
389 /* Request PF to allocate additional Qsets */
390 static void nicvf_request_sqs(struct nicvf *nic)
392 union nic_mbx mbx = {};
394 int sqs_count = nic->sqs_count;
395 int rx_queues = 0, tx_queues = 0;
397 /* Only primary VF should request */
398 if (nic->sqs_mode || !nic->sqs_count)
401 mbx.sqs_alloc.msg = NIC_MBOX_MSG_ALLOC_SQS;
402 mbx.sqs_alloc.vf_id = nic->vf_id;
403 mbx.sqs_alloc.qs_count = nic->sqs_count;
404 if (nicvf_send_msg_to_pf(nic, &mbx)) {
405 /* No response from PF */
410 /* Return if no Secondary Qsets available */
414 if (nic->rx_queues > MAX_RCV_QUEUES_PER_QS)
415 rx_queues = nic->rx_queues - MAX_RCV_QUEUES_PER_QS;
417 tx_queues = nic->tx_queues + nic->xdp_tx_queues;
418 if (tx_queues > MAX_SND_QUEUES_PER_QS)
419 tx_queues = tx_queues - MAX_SND_QUEUES_PER_QS;
421 /* Set no of Rx/Tx queues in each of the SQsets */
422 for (sqs = 0; sqs < nic->sqs_count; sqs++) {
423 mbx.nicvf.msg = NIC_MBOX_MSG_SNICVF_PTR;
424 mbx.nicvf.vf_id = nic->vf_id;
425 mbx.nicvf.sqs_id = sqs;
426 nicvf_send_msg_to_pf(nic, &mbx);
428 nic->snicvf[sqs]->sqs_id = sqs;
429 if (rx_queues > MAX_RCV_QUEUES_PER_QS) {
430 nic->snicvf[sqs]->qs->rq_cnt = MAX_RCV_QUEUES_PER_QS;
431 rx_queues -= MAX_RCV_QUEUES_PER_QS;
433 nic->snicvf[sqs]->qs->rq_cnt = rx_queues;
437 if (tx_queues > MAX_SND_QUEUES_PER_QS) {
438 nic->snicvf[sqs]->qs->sq_cnt = MAX_SND_QUEUES_PER_QS;
439 tx_queues -= MAX_SND_QUEUES_PER_QS;
441 nic->snicvf[sqs]->qs->sq_cnt = tx_queues;
445 nic->snicvf[sqs]->qs->cq_cnt =
446 max(nic->snicvf[sqs]->qs->rq_cnt, nic->snicvf[sqs]->qs->sq_cnt);
448 /* Initialize secondary Qset's queues and its interrupts */
449 nicvf_open(nic->snicvf[sqs]->netdev);
452 /* Update stack with actual Rx/Tx queue count allocated */
453 if (sqs_count != nic->sqs_count)
454 nicvf_set_real_num_queues(nic->netdev,
455 nic->tx_queues, nic->rx_queues);
458 /* Send this Qset's nicvf pointer to PF.
459 * PF inturn sends primary VF's nicvf struct to secondary Qsets/VFs
460 * so that packets received by these Qsets can use primary VF's netdev
462 static void nicvf_send_vf_struct(struct nicvf *nic)
464 union nic_mbx mbx = {};
466 mbx.nicvf.msg = NIC_MBOX_MSG_NICVF_PTR;
467 mbx.nicvf.sqs_mode = nic->sqs_mode;
468 mbx.nicvf.nicvf = (u64)nic;
469 nicvf_send_msg_to_pf(nic, &mbx);
472 static void nicvf_get_primary_vf_struct(struct nicvf *nic)
474 union nic_mbx mbx = {};
476 mbx.nicvf.msg = NIC_MBOX_MSG_PNICVF_PTR;
477 nicvf_send_msg_to_pf(nic, &mbx);
480 int nicvf_set_real_num_queues(struct net_device *netdev,
481 int tx_queues, int rx_queues)
485 err = netif_set_real_num_tx_queues(netdev, tx_queues);
488 "Failed to set no of Tx queues: %d\n", tx_queues);
492 err = netif_set_real_num_rx_queues(netdev, rx_queues);
495 "Failed to set no of Rx queues: %d\n", rx_queues);
499 static int nicvf_init_resources(struct nicvf *nic)
504 nicvf_qset_config(nic, true);
506 /* Initialize queues and HW for data transfer */
507 err = nicvf_config_data_transfer(nic, true);
509 netdev_err(nic->netdev,
510 "Failed to alloc/config VF's QSet resources\n");
517 static inline bool nicvf_xdp_rx(struct nicvf *nic, struct bpf_prog *prog,
518 struct cqe_rx_t *cqe_rx, struct snd_queue *sq,
519 struct rcv_queue *rq, struct sk_buff **skb)
525 u64 dma_addr, cpu_addr;
528 /* Retrieve packet buffer's DMA address and length */
529 len = *((u16 *)((void *)cqe_rx + (3 * sizeof(u64))));
530 dma_addr = *((u64 *)((void *)cqe_rx + (7 * sizeof(u64))));
532 cpu_addr = nicvf_iova_to_phys(nic, dma_addr);
535 cpu_addr = (u64)phys_to_virt(cpu_addr);
536 page = virt_to_page((void *)cpu_addr);
538 xdp.data_hard_start = page_address(page);
539 xdp.data = (void *)cpu_addr;
540 xdp_set_data_meta_invalid(&xdp);
541 xdp.data_end = xdp.data + len;
542 xdp.rxq = &rq->xdp_rxq;
543 orig_data = xdp.data;
546 action = bpf_prog_run_xdp(prog, &xdp);
549 len = xdp.data_end - xdp.data;
550 /* Check if XDP program has changed headers */
551 if (orig_data != xdp.data) {
552 offset = orig_data - xdp.data;
558 /* Check if it's a recycled page, if not
559 * unmap the DMA mapping.
561 * Recycled page holds an extra reference.
563 if (page_ref_count(page) == 1) {
564 dma_addr &= PAGE_MASK;
565 dma_unmap_page_attrs(&nic->pdev->dev, dma_addr,
566 RCV_FRAG_LEN + XDP_PACKET_HEADROOM,
568 DMA_ATTR_SKIP_CPU_SYNC);
571 /* Build SKB and pass on packet to network stack */
572 *skb = build_skb(xdp.data,
573 RCV_FRAG_LEN - cqe_rx->align_pad + offset);
580 nicvf_xdp_sq_append_pkt(nic, sq, (u64)xdp.data, dma_addr, len);
583 bpf_warn_invalid_xdp_action(action);
586 trace_xdp_exception(nic->netdev, prog, action);
589 /* Check if it's a recycled page, if not
590 * unmap the DMA mapping.
592 * Recycled page holds an extra reference.
594 if (page_ref_count(page) == 1) {
595 dma_addr &= PAGE_MASK;
596 dma_unmap_page_attrs(&nic->pdev->dev, dma_addr,
597 RCV_FRAG_LEN + XDP_PACKET_HEADROOM,
599 DMA_ATTR_SKIP_CPU_SYNC);
607 static void nicvf_snd_ptp_handler(struct net_device *netdev,
608 struct cqe_send_t *cqe_tx)
610 struct nicvf *nic = netdev_priv(netdev);
611 struct skb_shared_hwtstamps ts;
616 /* Sync for 'ptp_skb' */
619 /* New timestamp request can be queued now */
620 atomic_set(&nic->tx_ptp_skbs, 0);
622 /* Check for timestamp requested skb */
626 /* Check if timestamping is timedout, which is set to 10us */
627 if (cqe_tx->send_status == CQ_TX_ERROP_TSTMP_TIMEOUT ||
628 cqe_tx->send_status == CQ_TX_ERROP_TSTMP_CONFLICT)
631 /* Get the timestamp */
632 memset(&ts, 0, sizeof(ts));
633 ns = cavium_ptp_tstamp2time(nic->ptp_clock, cqe_tx->ptp_timestamp);
634 ts.hwtstamp = ns_to_ktime(ns);
635 skb_tstamp_tx(nic->ptp_skb, &ts);
638 /* Free the original skb */
639 dev_kfree_skb_any(nic->ptp_skb);
645 static void nicvf_snd_pkt_handler(struct net_device *netdev,
646 struct cqe_send_t *cqe_tx,
647 int budget, int *subdesc_cnt,
648 unsigned int *tx_pkts, unsigned int *tx_bytes)
650 struct sk_buff *skb = NULL;
652 struct nicvf *nic = netdev_priv(netdev);
653 struct snd_queue *sq;
654 struct sq_hdr_subdesc *hdr;
655 struct sq_hdr_subdesc *tso_sqe;
657 sq = &nic->qs->sq[cqe_tx->sq_idx];
659 hdr = (struct sq_hdr_subdesc *)GET_SQ_DESC(sq, cqe_tx->sqe_ptr);
660 if (hdr->subdesc_type != SQ_DESC_TYPE_HEADER)
663 /* Check for errors */
664 if (cqe_tx->send_status)
665 nicvf_check_cqe_tx_errs(nic->pnicvf, cqe_tx);
667 /* Is this a XDP designated Tx queue */
669 page = (struct page *)sq->xdp_page[cqe_tx->sqe_ptr];
670 /* Check if it's recycled page or else unmap DMA mapping */
671 if (page && (page_ref_count(page) == 1))
672 nicvf_unmap_sndq_buffers(nic, sq, cqe_tx->sqe_ptr,
675 /* Release page reference for recycling */
678 sq->xdp_page[cqe_tx->sqe_ptr] = (u64)NULL;
679 *subdesc_cnt += hdr->subdesc_cnt + 1;
683 skb = (struct sk_buff *)sq->skbuff[cqe_tx->sqe_ptr];
685 /* Check for dummy descriptor used for HW TSO offload on 88xx */
686 if (hdr->dont_send) {
687 /* Get actual TSO descriptors and free them */
689 (struct sq_hdr_subdesc *)GET_SQ_DESC(sq, hdr->rsvd2);
690 nicvf_unmap_sndq_buffers(nic, sq, hdr->rsvd2,
691 tso_sqe->subdesc_cnt);
692 *subdesc_cnt += tso_sqe->subdesc_cnt + 1;
694 nicvf_unmap_sndq_buffers(nic, sq, cqe_tx->sqe_ptr,
697 *subdesc_cnt += hdr->subdesc_cnt + 1;
700 *tx_bytes += skb->len;
701 /* If timestamp is requested for this skb, don't free it */
702 if (skb_shinfo(skb)->tx_flags & SKBTX_IN_PROGRESS &&
703 !nic->pnicvf->ptp_skb)
704 nic->pnicvf->ptp_skb = skb;
706 napi_consume_skb(skb, budget);
707 sq->skbuff[cqe_tx->sqe_ptr] = (u64)NULL;
709 /* In case of SW TSO on 88xx, only last segment will have
710 * a SKB attached, so just free SQEs here.
713 *subdesc_cnt += hdr->subdesc_cnt + 1;
717 static inline void nicvf_set_rxhash(struct net_device *netdev,
718 struct cqe_rx_t *cqe_rx,
724 if (!(netdev->features & NETIF_F_RXHASH))
727 switch (cqe_rx->rss_alg) {
730 hash_type = PKT_HASH_TYPE_L4;
731 hash = cqe_rx->rss_tag;
734 hash_type = PKT_HASH_TYPE_L3;
735 hash = cqe_rx->rss_tag;
738 hash_type = PKT_HASH_TYPE_NONE;
742 skb_set_hash(skb, hash, hash_type);
745 static inline void nicvf_set_rxtstamp(struct nicvf *nic, struct sk_buff *skb)
749 if (!nic->ptp_clock || !nic->hw_rx_tstamp)
752 /* The first 8 bytes is the timestamp */
753 ns = cavium_ptp_tstamp2time(nic->ptp_clock,
754 be64_to_cpu(*(__be64 *)skb->data));
755 skb_hwtstamps(skb)->hwtstamp = ns_to_ktime(ns);
760 static void nicvf_rcv_pkt_handler(struct net_device *netdev,
761 struct napi_struct *napi,
762 struct cqe_rx_t *cqe_rx,
763 struct snd_queue *sq, struct rcv_queue *rq)
765 struct sk_buff *skb = NULL;
766 struct nicvf *nic = netdev_priv(netdev);
767 struct nicvf *snic = nic;
771 rq_idx = nicvf_netdev_qidx(nic, cqe_rx->rq_idx);
774 /* Use primary VF's 'nicvf' struct */
776 netdev = nic->netdev;
779 /* Check for errors */
780 if (cqe_rx->err_level || cqe_rx->err_opcode) {
781 err = nicvf_check_cqe_rx_errs(nic, cqe_rx);
782 if (err && !cqe_rx->rb_cnt)
786 /* For XDP, ignore pkts spanning multiple pages */
787 if (nic->xdp_prog && (cqe_rx->rb_cnt == 1)) {
788 /* Packet consumed by XDP */
789 if (nicvf_xdp_rx(snic, nic->xdp_prog, cqe_rx, sq, rq, &skb))
792 skb = nicvf_get_rcv_skb(snic, cqe_rx,
793 nic->xdp_prog ? true : false);
799 if (netif_msg_pktdata(nic)) {
800 netdev_info(nic->netdev, "skb 0x%p, len=%d\n", skb, skb->len);
801 print_hex_dump(KERN_INFO, "", DUMP_PREFIX_OFFSET, 16, 1,
802 skb->data, skb->len, true);
805 /* If error packet, drop it here */
807 dev_kfree_skb_any(skb);
811 nicvf_set_rxtstamp(nic, skb);
812 nicvf_set_rxhash(netdev, cqe_rx, skb);
814 skb_record_rx_queue(skb, rq_idx);
815 if (netdev->hw_features & NETIF_F_RXCSUM) {
816 /* HW by default verifies TCP/UDP/SCTP checksums */
817 skb->ip_summed = CHECKSUM_UNNECESSARY;
819 skb_checksum_none_assert(skb);
822 skb->protocol = eth_type_trans(skb, netdev);
824 /* Check for stripped VLAN */
825 if (cqe_rx->vlan_found && cqe_rx->vlan_stripped)
826 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q),
827 ntohs((__force __be16)cqe_rx->vlan_tci));
829 if (napi && (netdev->features & NETIF_F_GRO))
830 napi_gro_receive(napi, skb);
832 netif_receive_skb(skb);
835 static int nicvf_cq_intr_handler(struct net_device *netdev, u8 cq_idx,
836 struct napi_struct *napi, int budget)
838 int processed_cqe, work_done = 0, tx_done = 0;
839 int cqe_count, cqe_head;
841 struct nicvf *nic = netdev_priv(netdev);
842 struct queue_set *qs = nic->qs;
843 struct cmp_queue *cq = &qs->cq[cq_idx];
844 struct cqe_rx_t *cq_desc;
845 struct netdev_queue *txq;
846 struct snd_queue *sq = &qs->sq[cq_idx];
847 struct rcv_queue *rq = &qs->rq[cq_idx];
848 unsigned int tx_pkts = 0, tx_bytes = 0, txq_idx;
850 spin_lock_bh(&cq->lock);
853 /* Get no of valid CQ entries to process */
854 cqe_count = nicvf_queue_reg_read(nic, NIC_QSET_CQ_0_7_STATUS, cq_idx);
855 cqe_count &= CQ_CQE_COUNT;
859 /* Get head of the valid CQ entries */
860 cqe_head = nicvf_queue_reg_read(nic, NIC_QSET_CQ_0_7_HEAD, cq_idx) >> 9;
863 while (processed_cqe < cqe_count) {
864 /* Get the CQ descriptor */
865 cq_desc = (struct cqe_rx_t *)GET_CQ_DESC(cq, cqe_head);
867 cqe_head &= (cq->dmem.q_len - 1);
868 /* Initiate prefetch for next descriptor */
869 prefetch((struct cqe_rx_t *)GET_CQ_DESC(cq, cqe_head));
871 if ((work_done >= budget) && napi &&
872 (cq_desc->cqe_type != CQE_TYPE_SEND)) {
876 switch (cq_desc->cqe_type) {
878 nicvf_rcv_pkt_handler(netdev, napi, cq_desc, sq, rq);
882 nicvf_snd_pkt_handler(netdev, (void *)cq_desc,
883 budget, &subdesc_cnt,
884 &tx_pkts, &tx_bytes);
887 case CQE_TYPE_SEND_PTP:
888 nicvf_snd_ptp_handler(netdev, (void *)cq_desc);
890 case CQE_TYPE_INVALID:
891 case CQE_TYPE_RX_SPLIT:
892 case CQE_TYPE_RX_TCP:
899 /* Ring doorbell to inform H/W to reuse processed CQEs */
900 nicvf_queue_reg_write(nic, NIC_QSET_CQ_0_7_DOOR,
901 cq_idx, processed_cqe);
903 if ((work_done < budget) && napi)
907 /* Update SQ's descriptor free count */
909 nicvf_put_sq_desc(sq, subdesc_cnt);
911 txq_idx = nicvf_netdev_qidx(nic, cq_idx);
912 /* Handle XDP TX queues */
913 if (nic->pnicvf->xdp_prog) {
914 if (txq_idx < nic->pnicvf->xdp_tx_queues) {
915 nicvf_xdp_sq_doorbell(nic, sq, cq_idx);
919 txq_idx -= nic->pnicvf->xdp_tx_queues;
922 /* Wakeup TXQ if its stopped earlier due to SQ full */
924 (atomic_read(&sq->free_cnt) >= MIN_SQ_DESC_PER_PKT_XMIT)) {
925 netdev = nic->pnicvf->netdev;
926 txq = netdev_get_tx_queue(netdev, txq_idx);
928 netdev_tx_completed_queue(txq, tx_pkts, tx_bytes);
930 /* To read updated queue and carrier status */
932 if (netif_tx_queue_stopped(txq) && netif_carrier_ok(netdev)) {
933 netif_tx_wake_queue(txq);
935 this_cpu_inc(nic->drv_stats->txq_wake);
936 netif_warn(nic, tx_err, netdev,
937 "Transmit queue wakeup SQ%d\n", txq_idx);
942 spin_unlock_bh(&cq->lock);
946 static int nicvf_poll(struct napi_struct *napi, int budget)
950 struct net_device *netdev = napi->dev;
951 struct nicvf *nic = netdev_priv(netdev);
952 struct nicvf_cq_poll *cq;
954 cq = container_of(napi, struct nicvf_cq_poll, napi);
955 work_done = nicvf_cq_intr_handler(netdev, cq->cq_idx, napi, budget);
957 if (work_done < budget) {
958 /* Slow packet rate, exit polling */
959 napi_complete_done(napi, work_done);
960 /* Re-enable interrupts */
961 cq_head = nicvf_queue_reg_read(nic, NIC_QSET_CQ_0_7_HEAD,
963 nicvf_clear_intr(nic, NICVF_INTR_CQ, cq->cq_idx);
964 nicvf_queue_reg_write(nic, NIC_QSET_CQ_0_7_HEAD,
965 cq->cq_idx, cq_head);
966 nicvf_enable_intr(nic, NICVF_INTR_CQ, cq->cq_idx);
971 /* Qset error interrupt handler
973 * As of now only CQ errors are handled
975 static void nicvf_handle_qs_err(unsigned long data)
977 struct nicvf *nic = (struct nicvf *)data;
978 struct queue_set *qs = nic->qs;
982 netif_tx_disable(nic->netdev);
984 /* Check if it is CQ err */
985 for (qidx = 0; qidx < qs->cq_cnt; qidx++) {
986 status = nicvf_queue_reg_read(nic, NIC_QSET_CQ_0_7_STATUS,
988 if (!(status & CQ_ERR_MASK))
990 /* Process already queued CQEs and reconfig CQ */
991 nicvf_disable_intr(nic, NICVF_INTR_CQ, qidx);
992 nicvf_sq_disable(nic, qidx);
993 nicvf_cq_intr_handler(nic->netdev, qidx, NULL, 0);
994 nicvf_cmp_queue_config(nic, qs, qidx, true);
995 nicvf_sq_free_used_descs(nic->netdev, &qs->sq[qidx], qidx);
996 nicvf_sq_enable(nic, &qs->sq[qidx], qidx);
998 nicvf_enable_intr(nic, NICVF_INTR_CQ, qidx);
1001 netif_tx_start_all_queues(nic->netdev);
1002 /* Re-enable Qset error interrupt */
1003 nicvf_enable_intr(nic, NICVF_INTR_QS_ERR, 0);
1006 static void nicvf_dump_intr_status(struct nicvf *nic)
1008 netif_info(nic, intr, nic->netdev, "interrupt status 0x%llx\n",
1009 nicvf_reg_read(nic, NIC_VF_INT));
1012 static irqreturn_t nicvf_misc_intr_handler(int irq, void *nicvf_irq)
1014 struct nicvf *nic = (struct nicvf *)nicvf_irq;
1017 nicvf_dump_intr_status(nic);
1019 intr = nicvf_reg_read(nic, NIC_VF_INT);
1020 /* Check for spurious interrupt */
1021 if (!(intr & NICVF_INTR_MBOX_MASK))
1024 nicvf_handle_mbx_intr(nic);
1029 static irqreturn_t nicvf_intr_handler(int irq, void *cq_irq)
1031 struct nicvf_cq_poll *cq_poll = (struct nicvf_cq_poll *)cq_irq;
1032 struct nicvf *nic = cq_poll->nicvf;
1033 int qidx = cq_poll->cq_idx;
1035 nicvf_dump_intr_status(nic);
1037 /* Disable interrupts */
1038 nicvf_disable_intr(nic, NICVF_INTR_CQ, qidx);
1041 napi_schedule_irqoff(&cq_poll->napi);
1043 /* Clear interrupt */
1044 nicvf_clear_intr(nic, NICVF_INTR_CQ, qidx);
1049 static irqreturn_t nicvf_rbdr_intr_handler(int irq, void *nicvf_irq)
1051 struct nicvf *nic = (struct nicvf *)nicvf_irq;
1055 nicvf_dump_intr_status(nic);
1057 /* Disable RBDR interrupt and schedule softirq */
1058 for (qidx = 0; qidx < nic->qs->rbdr_cnt; qidx++) {
1059 if (!nicvf_is_intr_enabled(nic, NICVF_INTR_RBDR, qidx))
1061 nicvf_disable_intr(nic, NICVF_INTR_RBDR, qidx);
1062 tasklet_hi_schedule(&nic->rbdr_task);
1063 /* Clear interrupt */
1064 nicvf_clear_intr(nic, NICVF_INTR_RBDR, qidx);
1070 static irqreturn_t nicvf_qs_err_intr_handler(int irq, void *nicvf_irq)
1072 struct nicvf *nic = (struct nicvf *)nicvf_irq;
1074 nicvf_dump_intr_status(nic);
1076 /* Disable Qset err interrupt and schedule softirq */
1077 nicvf_disable_intr(nic, NICVF_INTR_QS_ERR, 0);
1078 tasklet_hi_schedule(&nic->qs_err_task);
1079 nicvf_clear_intr(nic, NICVF_INTR_QS_ERR, 0);
1084 static void nicvf_set_irq_affinity(struct nicvf *nic)
1088 for (vec = 0; vec < nic->num_vec; vec++) {
1089 if (!nic->irq_allocated[vec])
1092 if (!zalloc_cpumask_var(&nic->affinity_mask[vec], GFP_KERNEL))
1095 if (vec < NICVF_INTR_ID_SQ)
1096 /* Leave CPU0 for RBDR and other interrupts */
1097 cpu = nicvf_netdev_qidx(nic, vec) + 1;
1101 cpumask_set_cpu(cpumask_local_spread(cpu, nic->node),
1102 nic->affinity_mask[vec]);
1103 irq_set_affinity_hint(pci_irq_vector(nic->pdev, vec),
1104 nic->affinity_mask[vec]);
1108 static int nicvf_register_interrupts(struct nicvf *nic)
1112 for_each_cq_irq(irq)
1113 sprintf(nic->irq_name[irq], "%s-rxtx-%d",
1114 nic->pnicvf->netdev->name,
1115 nicvf_netdev_qidx(nic, irq));
1117 for_each_sq_irq(irq)
1118 sprintf(nic->irq_name[irq], "%s-sq-%d",
1119 nic->pnicvf->netdev->name,
1120 nicvf_netdev_qidx(nic, irq - NICVF_INTR_ID_SQ));
1122 for_each_rbdr_irq(irq)
1123 sprintf(nic->irq_name[irq], "%s-rbdr-%d",
1124 nic->pnicvf->netdev->name,
1125 nic->sqs_mode ? (nic->sqs_id + 1) : 0);
1127 /* Register CQ interrupts */
1128 for (irq = 0; irq < nic->qs->cq_cnt; irq++) {
1129 ret = request_irq(pci_irq_vector(nic->pdev, irq),
1131 0, nic->irq_name[irq], nic->napi[irq]);
1134 nic->irq_allocated[irq] = true;
1137 /* Register RBDR interrupt */
1138 for (irq = NICVF_INTR_ID_RBDR;
1139 irq < (NICVF_INTR_ID_RBDR + nic->qs->rbdr_cnt); irq++) {
1140 ret = request_irq(pci_irq_vector(nic->pdev, irq),
1141 nicvf_rbdr_intr_handler,
1142 0, nic->irq_name[irq], nic);
1145 nic->irq_allocated[irq] = true;
1148 /* Register QS error interrupt */
1149 sprintf(nic->irq_name[NICVF_INTR_ID_QS_ERR], "%s-qset-err-%d",
1150 nic->pnicvf->netdev->name,
1151 nic->sqs_mode ? (nic->sqs_id + 1) : 0);
1152 irq = NICVF_INTR_ID_QS_ERR;
1153 ret = request_irq(pci_irq_vector(nic->pdev, irq),
1154 nicvf_qs_err_intr_handler,
1155 0, nic->irq_name[irq], nic);
1159 nic->irq_allocated[irq] = true;
1161 /* Set IRQ affinities */
1162 nicvf_set_irq_affinity(nic);
1166 netdev_err(nic->netdev, "request_irq failed, vector %d\n", irq);
1171 static void nicvf_unregister_interrupts(struct nicvf *nic)
1173 struct pci_dev *pdev = nic->pdev;
1176 /* Free registered interrupts */
1177 for (irq = 0; irq < nic->num_vec; irq++) {
1178 if (!nic->irq_allocated[irq])
1181 irq_set_affinity_hint(pci_irq_vector(pdev, irq), NULL);
1182 free_cpumask_var(nic->affinity_mask[irq]);
1184 if (irq < NICVF_INTR_ID_SQ)
1185 free_irq(pci_irq_vector(pdev, irq), nic->napi[irq]);
1187 free_irq(pci_irq_vector(pdev, irq), nic);
1189 nic->irq_allocated[irq] = false;
1193 pci_free_irq_vectors(pdev);
1197 /* Initialize MSIX vectors and register MISC interrupt.
1198 * Send READY message to PF to check if its alive
1200 static int nicvf_register_misc_interrupt(struct nicvf *nic)
1203 int irq = NICVF_INTR_ID_MISC;
1205 /* Return if mailbox interrupt is already registered */
1206 if (nic->pdev->msix_enabled)
1210 nic->num_vec = pci_msix_vec_count(nic->pdev);
1211 ret = pci_alloc_irq_vectors(nic->pdev, nic->num_vec, nic->num_vec,
1214 netdev_err(nic->netdev,
1215 "Req for #%d msix vectors failed\n", nic->num_vec);
1219 sprintf(nic->irq_name[irq], "%s Mbox", "NICVF");
1220 /* Register Misc interrupt */
1221 ret = request_irq(pci_irq_vector(nic->pdev, irq),
1222 nicvf_misc_intr_handler, 0, nic->irq_name[irq], nic);
1226 nic->irq_allocated[irq] = true;
1228 /* Enable mailbox interrupt */
1229 nicvf_enable_intr(nic, NICVF_INTR_MBOX, 0);
1231 /* Check if VF is able to communicate with PF */
1232 if (!nicvf_check_pf_ready(nic)) {
1233 nicvf_disable_intr(nic, NICVF_INTR_MBOX, 0);
1234 nicvf_unregister_interrupts(nic);
1241 static netdev_tx_t nicvf_xmit(struct sk_buff *skb, struct net_device *netdev)
1243 struct nicvf *nic = netdev_priv(netdev);
1244 int qid = skb_get_queue_mapping(skb);
1245 struct netdev_queue *txq = netdev_get_tx_queue(netdev, qid);
1247 struct snd_queue *sq;
1250 /* Check for minimum packet length */
1251 if (skb->len <= ETH_HLEN) {
1253 return NETDEV_TX_OK;
1256 /* In XDP case, initial HW tx queues are used for XDP,
1257 * but stack's queue mapping starts at '0', so skip the
1258 * Tx queues attached to Rx queues for XDP.
1261 qid += nic->xdp_tx_queues;
1264 /* Get secondary Qset's SQ structure */
1265 if (qid >= MAX_SND_QUEUES_PER_QS) {
1266 tmp = qid / MAX_SND_QUEUES_PER_QS;
1267 snic = (struct nicvf *)nic->snicvf[tmp - 1];
1269 netdev_warn(nic->netdev,
1270 "Secondary Qset#%d's ptr not initialized\n",
1273 return NETDEV_TX_OK;
1275 qid = qid % MAX_SND_QUEUES_PER_QS;
1278 sq = &snic->qs->sq[qid];
1279 if (!netif_tx_queue_stopped(txq) &&
1280 !nicvf_sq_append_skb(snic, sq, skb, qid)) {
1281 netif_tx_stop_queue(txq);
1283 /* Barrier, so that stop_queue visible to other cpus */
1286 /* Check again, incase another cpu freed descriptors */
1287 if (atomic_read(&sq->free_cnt) > MIN_SQ_DESC_PER_PKT_XMIT) {
1288 netif_tx_wake_queue(txq);
1290 this_cpu_inc(nic->drv_stats->txq_stop);
1291 netif_warn(nic, tx_err, netdev,
1292 "Transmit ring full, stopping SQ%d\n", qid);
1294 return NETDEV_TX_BUSY;
1297 return NETDEV_TX_OK;
1300 static inline void nicvf_free_cq_poll(struct nicvf *nic)
1302 struct nicvf_cq_poll *cq_poll;
1305 for (qidx = 0; qidx < nic->qs->cq_cnt; qidx++) {
1306 cq_poll = nic->napi[qidx];
1309 nic->napi[qidx] = NULL;
1314 int nicvf_stop(struct net_device *netdev)
1317 struct nicvf *nic = netdev_priv(netdev);
1318 struct queue_set *qs = nic->qs;
1319 struct nicvf_cq_poll *cq_poll = NULL;
1320 union nic_mbx mbx = {};
1322 /* wait till all queued set_rx_mode tasks completes */
1323 drain_workqueue(nic->nicvf_rx_mode_wq);
1325 mbx.msg.msg = NIC_MBOX_MSG_SHUTDOWN;
1326 nicvf_send_msg_to_pf(nic, &mbx);
1328 netif_carrier_off(netdev);
1329 netif_tx_stop_all_queues(nic->netdev);
1330 nic->link_up = false;
1332 /* Teardown secondary qsets first */
1333 if (!nic->sqs_mode) {
1334 for (qidx = 0; qidx < nic->sqs_count; qidx++) {
1335 if (!nic->snicvf[qidx])
1337 nicvf_stop(nic->snicvf[qidx]->netdev);
1338 nic->snicvf[qidx] = NULL;
1342 /* Disable RBDR & QS error interrupts */
1343 for (qidx = 0; qidx < qs->rbdr_cnt; qidx++) {
1344 nicvf_disable_intr(nic, NICVF_INTR_RBDR, qidx);
1345 nicvf_clear_intr(nic, NICVF_INTR_RBDR, qidx);
1347 nicvf_disable_intr(nic, NICVF_INTR_QS_ERR, 0);
1348 nicvf_clear_intr(nic, NICVF_INTR_QS_ERR, 0);
1350 /* Wait for pending IRQ handlers to finish */
1351 for (irq = 0; irq < nic->num_vec; irq++)
1352 synchronize_irq(pci_irq_vector(nic->pdev, irq));
1354 tasklet_kill(&nic->rbdr_task);
1355 tasklet_kill(&nic->qs_err_task);
1356 if (nic->rb_work_scheduled)
1357 cancel_delayed_work_sync(&nic->rbdr_work);
1359 for (qidx = 0; qidx < nic->qs->cq_cnt; qidx++) {
1360 cq_poll = nic->napi[qidx];
1363 napi_synchronize(&cq_poll->napi);
1364 /* CQ intr is enabled while napi_complete,
1367 nicvf_disable_intr(nic, NICVF_INTR_CQ, qidx);
1368 nicvf_clear_intr(nic, NICVF_INTR_CQ, qidx);
1369 napi_disable(&cq_poll->napi);
1370 netif_napi_del(&cq_poll->napi);
1373 netif_tx_disable(netdev);
1375 for (qidx = 0; qidx < netdev->num_tx_queues; qidx++)
1376 netdev_tx_reset_queue(netdev_get_tx_queue(netdev, qidx));
1378 /* Free resources */
1379 nicvf_config_data_transfer(nic, false);
1381 /* Disable HW Qset */
1382 nicvf_qset_config(nic, false);
1384 /* disable mailbox interrupt */
1385 nicvf_disable_intr(nic, NICVF_INTR_MBOX, 0);
1387 nicvf_unregister_interrupts(nic);
1389 nicvf_free_cq_poll(nic);
1391 /* Free any pending SKB saved to receive timestamp */
1393 dev_kfree_skb_any(nic->ptp_skb);
1394 nic->ptp_skb = NULL;
1397 /* Clear multiqset info */
1403 static int nicvf_config_hw_rx_tstamp(struct nicvf *nic, bool enable)
1405 union nic_mbx mbx = {};
1407 mbx.ptp.msg = NIC_MBOX_MSG_PTP_CFG;
1408 mbx.ptp.enable = enable;
1410 return nicvf_send_msg_to_pf(nic, &mbx);
1413 static int nicvf_update_hw_max_frs(struct nicvf *nic, int mtu)
1415 union nic_mbx mbx = {};
1417 mbx.frs.msg = NIC_MBOX_MSG_SET_MAX_FRS;
1418 mbx.frs.max_frs = mtu;
1419 mbx.frs.vf_id = nic->vf_id;
1421 return nicvf_send_msg_to_pf(nic, &mbx);
1424 int nicvf_open(struct net_device *netdev)
1427 struct nicvf *nic = netdev_priv(netdev);
1428 struct queue_set *qs = nic->qs;
1429 struct nicvf_cq_poll *cq_poll = NULL;
1431 /* wait till all queued set_rx_mode tasks completes if any */
1432 drain_workqueue(nic->nicvf_rx_mode_wq);
1434 netif_carrier_off(netdev);
1436 err = nicvf_register_misc_interrupt(nic);
1440 /* Register NAPI handler for processing CQEs */
1441 for (qidx = 0; qidx < qs->cq_cnt; qidx++) {
1442 cq_poll = kzalloc(sizeof(*cq_poll), GFP_KERNEL);
1447 cq_poll->cq_idx = qidx;
1448 cq_poll->nicvf = nic;
1449 netif_napi_add(netdev, &cq_poll->napi, nicvf_poll,
1451 napi_enable(&cq_poll->napi);
1452 nic->napi[qidx] = cq_poll;
1455 /* Check if we got MAC address from PF or else generate a radom MAC */
1456 if (!nic->sqs_mode && is_zero_ether_addr(netdev->dev_addr)) {
1457 eth_hw_addr_random(netdev);
1458 nicvf_hw_set_mac_addr(nic, netdev);
1461 if (nic->set_mac_pending) {
1462 nic->set_mac_pending = false;
1463 nicvf_hw_set_mac_addr(nic, netdev);
1466 /* Init tasklet for handling Qset err interrupt */
1467 tasklet_init(&nic->qs_err_task, nicvf_handle_qs_err,
1468 (unsigned long)nic);
1470 /* Init RBDR tasklet which will refill RBDR */
1471 tasklet_init(&nic->rbdr_task, nicvf_rbdr_task,
1472 (unsigned long)nic);
1473 INIT_DELAYED_WORK(&nic->rbdr_work, nicvf_rbdr_work);
1475 /* Configure CPI alorithm */
1476 nic->cpi_alg = cpi_alg;
1478 nicvf_config_cpi(nic);
1480 nicvf_request_sqs(nic);
1482 nicvf_get_primary_vf_struct(nic);
1484 /* Configure PTP timestamp */
1486 nicvf_config_hw_rx_tstamp(nic, nic->hw_rx_tstamp);
1487 atomic_set(&nic->tx_ptp_skbs, 0);
1488 nic->ptp_skb = NULL;
1490 /* Configure receive side scaling and MTU */
1491 if (!nic->sqs_mode) {
1492 nicvf_rss_init(nic);
1493 err = nicvf_update_hw_max_frs(nic, netdev->mtu);
1497 /* Clear percpu stats */
1498 for_each_possible_cpu(cpu)
1499 memset(per_cpu_ptr(nic->drv_stats, cpu), 0,
1500 sizeof(struct nicvf_drv_stats));
1503 err = nicvf_register_interrupts(nic);
1507 /* Initialize the queues */
1508 err = nicvf_init_resources(nic);
1512 /* Make sure queue initialization is written */
1515 nicvf_reg_write(nic, NIC_VF_INT, -1);
1516 /* Enable Qset err interrupt */
1517 nicvf_enable_intr(nic, NICVF_INTR_QS_ERR, 0);
1519 /* Enable completion queue interrupt */
1520 for (qidx = 0; qidx < qs->cq_cnt; qidx++)
1521 nicvf_enable_intr(nic, NICVF_INTR_CQ, qidx);
1523 /* Enable RBDR threshold interrupt */
1524 for (qidx = 0; qidx < qs->rbdr_cnt; qidx++)
1525 nicvf_enable_intr(nic, NICVF_INTR_RBDR, qidx);
1527 /* Send VF config done msg to PF */
1528 nicvf_send_cfg_done(nic);
1532 nicvf_disable_intr(nic, NICVF_INTR_MBOX, 0);
1533 nicvf_unregister_interrupts(nic);
1534 tasklet_kill(&nic->qs_err_task);
1535 tasklet_kill(&nic->rbdr_task);
1537 for (qidx = 0; qidx < qs->cq_cnt; qidx++) {
1538 cq_poll = nic->napi[qidx];
1541 napi_disable(&cq_poll->napi);
1542 netif_napi_del(&cq_poll->napi);
1544 nicvf_free_cq_poll(nic);
1548 static int nicvf_change_mtu(struct net_device *netdev, int new_mtu)
1550 struct nicvf *nic = netdev_priv(netdev);
1551 int orig_mtu = netdev->mtu;
1553 netdev->mtu = new_mtu;
1555 if (!netif_running(netdev))
1558 if (nicvf_update_hw_max_frs(nic, new_mtu)) {
1559 netdev->mtu = orig_mtu;
1566 static int nicvf_set_mac_address(struct net_device *netdev, void *p)
1568 struct sockaddr *addr = p;
1569 struct nicvf *nic = netdev_priv(netdev);
1571 if (!is_valid_ether_addr(addr->sa_data))
1572 return -EADDRNOTAVAIL;
1574 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
1576 if (nic->pdev->msix_enabled) {
1577 if (nicvf_hw_set_mac_addr(nic, netdev))
1580 nic->set_mac_pending = true;
1586 void nicvf_update_lmac_stats(struct nicvf *nic)
1589 union nic_mbx mbx = {};
1591 if (!netif_running(nic->netdev))
1594 mbx.bgx_stats.msg = NIC_MBOX_MSG_BGX_STATS;
1595 mbx.bgx_stats.vf_id = nic->vf_id;
1597 mbx.bgx_stats.rx = 1;
1598 while (stat < BGX_RX_STATS_COUNT) {
1599 mbx.bgx_stats.idx = stat;
1600 if (nicvf_send_msg_to_pf(nic, &mbx))
1608 mbx.bgx_stats.rx = 0;
1609 while (stat < BGX_TX_STATS_COUNT) {
1610 mbx.bgx_stats.idx = stat;
1611 if (nicvf_send_msg_to_pf(nic, &mbx))
1617 void nicvf_update_stats(struct nicvf *nic)
1621 struct nicvf_hw_stats *stats = &nic->hw_stats;
1622 struct nicvf_drv_stats *drv_stats;
1623 struct queue_set *qs = nic->qs;
1625 #define GET_RX_STATS(reg) \
1626 nicvf_reg_read(nic, NIC_VNIC_RX_STAT_0_13 | (reg << 3))
1627 #define GET_TX_STATS(reg) \
1628 nicvf_reg_read(nic, NIC_VNIC_TX_STAT_0_4 | (reg << 3))
1630 stats->rx_bytes = GET_RX_STATS(RX_OCTS);
1631 stats->rx_ucast_frames = GET_RX_STATS(RX_UCAST);
1632 stats->rx_bcast_frames = GET_RX_STATS(RX_BCAST);
1633 stats->rx_mcast_frames = GET_RX_STATS(RX_MCAST);
1634 stats->rx_fcs_errors = GET_RX_STATS(RX_FCS);
1635 stats->rx_l2_errors = GET_RX_STATS(RX_L2ERR);
1636 stats->rx_drop_red = GET_RX_STATS(RX_RED);
1637 stats->rx_drop_red_bytes = GET_RX_STATS(RX_RED_OCTS);
1638 stats->rx_drop_overrun = GET_RX_STATS(RX_ORUN);
1639 stats->rx_drop_overrun_bytes = GET_RX_STATS(RX_ORUN_OCTS);
1640 stats->rx_drop_bcast = GET_RX_STATS(RX_DRP_BCAST);
1641 stats->rx_drop_mcast = GET_RX_STATS(RX_DRP_MCAST);
1642 stats->rx_drop_l3_bcast = GET_RX_STATS(RX_DRP_L3BCAST);
1643 stats->rx_drop_l3_mcast = GET_RX_STATS(RX_DRP_L3MCAST);
1645 stats->tx_bytes = GET_TX_STATS(TX_OCTS);
1646 stats->tx_ucast_frames = GET_TX_STATS(TX_UCAST);
1647 stats->tx_bcast_frames = GET_TX_STATS(TX_BCAST);
1648 stats->tx_mcast_frames = GET_TX_STATS(TX_MCAST);
1649 stats->tx_drops = GET_TX_STATS(TX_DROP);
1651 /* On T88 pass 2.0, the dummy SQE added for TSO notification
1652 * via CQE has 'dont_send' set. Hence HW drops the pkt pointed
1653 * pointed by dummy SQE and results in tx_drops counter being
1654 * incremented. Subtracting it from tx_tso counter will give
1655 * exact tx_drops counter.
1657 if (nic->t88 && nic->hw_tso) {
1658 for_each_possible_cpu(cpu) {
1659 drv_stats = per_cpu_ptr(nic->drv_stats, cpu);
1660 tmp_stats += drv_stats->tx_tso;
1662 stats->tx_drops = tmp_stats - stats->tx_drops;
1664 stats->tx_frames = stats->tx_ucast_frames +
1665 stats->tx_bcast_frames +
1666 stats->tx_mcast_frames;
1667 stats->rx_frames = stats->rx_ucast_frames +
1668 stats->rx_bcast_frames +
1669 stats->rx_mcast_frames;
1670 stats->rx_drops = stats->rx_drop_red +
1671 stats->rx_drop_overrun;
1673 /* Update RQ and SQ stats */
1674 for (qidx = 0; qidx < qs->rq_cnt; qidx++)
1675 nicvf_update_rq_stats(nic, qidx);
1676 for (qidx = 0; qidx < qs->sq_cnt; qidx++)
1677 nicvf_update_sq_stats(nic, qidx);
1680 static void nicvf_get_stats64(struct net_device *netdev,
1681 struct rtnl_link_stats64 *stats)
1683 struct nicvf *nic = netdev_priv(netdev);
1684 struct nicvf_hw_stats *hw_stats = &nic->hw_stats;
1686 nicvf_update_stats(nic);
1688 stats->rx_bytes = hw_stats->rx_bytes;
1689 stats->rx_packets = hw_stats->rx_frames;
1690 stats->rx_dropped = hw_stats->rx_drops;
1691 stats->multicast = hw_stats->rx_mcast_frames;
1693 stats->tx_bytes = hw_stats->tx_bytes;
1694 stats->tx_packets = hw_stats->tx_frames;
1695 stats->tx_dropped = hw_stats->tx_drops;
1699 static void nicvf_tx_timeout(struct net_device *dev)
1701 struct nicvf *nic = netdev_priv(dev);
1703 netif_warn(nic, tx_err, dev, "Transmit timed out, resetting\n");
1705 this_cpu_inc(nic->drv_stats->tx_timeout);
1706 schedule_work(&nic->reset_task);
1709 static void nicvf_reset_task(struct work_struct *work)
1713 nic = container_of(work, struct nicvf, reset_task);
1715 if (!netif_running(nic->netdev))
1718 nicvf_stop(nic->netdev);
1719 nicvf_open(nic->netdev);
1720 netif_trans_update(nic->netdev);
1723 static int nicvf_config_loopback(struct nicvf *nic,
1724 netdev_features_t features)
1726 union nic_mbx mbx = {};
1728 mbx.lbk.msg = NIC_MBOX_MSG_LOOPBACK;
1729 mbx.lbk.vf_id = nic->vf_id;
1730 mbx.lbk.enable = (features & NETIF_F_LOOPBACK) != 0;
1732 return nicvf_send_msg_to_pf(nic, &mbx);
1735 static netdev_features_t nicvf_fix_features(struct net_device *netdev,
1736 netdev_features_t features)
1738 struct nicvf *nic = netdev_priv(netdev);
1740 if ((features & NETIF_F_LOOPBACK) &&
1741 netif_running(netdev) && !nic->loopback_supported)
1742 features &= ~NETIF_F_LOOPBACK;
1747 static int nicvf_set_features(struct net_device *netdev,
1748 netdev_features_t features)
1750 struct nicvf *nic = netdev_priv(netdev);
1751 netdev_features_t changed = features ^ netdev->features;
1753 if (changed & NETIF_F_HW_VLAN_CTAG_RX)
1754 nicvf_config_vlan_stripping(nic, features);
1756 if ((changed & NETIF_F_LOOPBACK) && netif_running(netdev))
1757 return nicvf_config_loopback(nic, features);
1762 static void nicvf_set_xdp_queues(struct nicvf *nic, bool bpf_attached)
1764 u8 cq_count, txq_count;
1766 /* Set XDP Tx queue count same as Rx queue count */
1768 nic->xdp_tx_queues = 0;
1770 nic->xdp_tx_queues = nic->rx_queues;
1772 /* If queue count > MAX_CMP_QUEUES_PER_QS, then additional qsets
1773 * needs to be allocated, check how many.
1775 txq_count = nic->xdp_tx_queues + nic->tx_queues;
1776 cq_count = max(nic->rx_queues, txq_count);
1777 if (cq_count > MAX_CMP_QUEUES_PER_QS) {
1778 nic->sqs_count = roundup(cq_count, MAX_CMP_QUEUES_PER_QS);
1779 nic->sqs_count = (nic->sqs_count / MAX_CMP_QUEUES_PER_QS) - 1;
1784 /* Set primary Qset's resources */
1785 nic->qs->rq_cnt = min_t(u8, nic->rx_queues, MAX_RCV_QUEUES_PER_QS);
1786 nic->qs->sq_cnt = min_t(u8, txq_count, MAX_SND_QUEUES_PER_QS);
1787 nic->qs->cq_cnt = max_t(u8, nic->qs->rq_cnt, nic->qs->sq_cnt);
1790 nicvf_set_real_num_queues(nic->netdev, nic->tx_queues, nic->rx_queues);
1793 static int nicvf_xdp_setup(struct nicvf *nic, struct bpf_prog *prog)
1795 struct net_device *dev = nic->netdev;
1796 bool if_up = netif_running(nic->netdev);
1797 struct bpf_prog *old_prog;
1798 bool bpf_attached = false;
1801 /* For now just support only the usual MTU sized frames */
1802 if (prog && (dev->mtu > 1500)) {
1803 netdev_warn(dev, "Jumbo frames not yet supported with XDP, current MTU %d.\n",
1808 /* ALL SQs attached to CQs i.e same as RQs, are treated as
1809 * XDP Tx queues and more Tx queues are allocated for
1810 * network stack to send pkts out.
1812 * No of Tx queues are either same as Rx queues or whatever
1813 * is left in max no of queues possible.
1815 if ((nic->rx_queues + nic->tx_queues) > nic->max_queues) {
1817 "Failed to attach BPF prog, RXQs + TXQs > Max %d\n",
1823 nicvf_stop(nic->netdev);
1825 old_prog = xchg(&nic->xdp_prog, prog);
1826 /* Detach old prog, if any */
1828 bpf_prog_put(old_prog);
1830 if (nic->xdp_prog) {
1831 /* Attach BPF program */
1832 nic->xdp_prog = bpf_prog_add(nic->xdp_prog, nic->rx_queues - 1);
1833 if (!IS_ERR(nic->xdp_prog)) {
1834 bpf_attached = true;
1836 ret = PTR_ERR(nic->xdp_prog);
1837 nic->xdp_prog = NULL;
1841 /* Calculate Tx queues needed for XDP and network stack */
1842 nicvf_set_xdp_queues(nic, bpf_attached);
1845 /* Reinitialize interface, clean slate */
1846 nicvf_open(nic->netdev);
1847 netif_trans_update(nic->netdev);
1853 static int nicvf_xdp(struct net_device *netdev, struct netdev_bpf *xdp)
1855 struct nicvf *nic = netdev_priv(netdev);
1857 /* To avoid checks while retrieving buffer address from CQE_RX,
1858 * do not support XDP for T88 pass1.x silicons which are anyway
1859 * not in use widely.
1861 if (pass1_silicon(nic->pdev))
1864 switch (xdp->command) {
1865 case XDP_SETUP_PROG:
1866 return nicvf_xdp_setup(nic, xdp->prog);
1867 case XDP_QUERY_PROG:
1868 xdp->prog_id = nic->xdp_prog ? nic->xdp_prog->aux->id : 0;
1875 static int nicvf_config_hwtstamp(struct net_device *netdev, struct ifreq *ifr)
1877 struct hwtstamp_config config;
1878 struct nicvf *nic = netdev_priv(netdev);
1880 if (!nic->ptp_clock)
1883 if (copy_from_user(&config, ifr->ifr_data, sizeof(config)))
1886 /* reserved for future extensions */
1890 switch (config.tx_type) {
1891 case HWTSTAMP_TX_OFF:
1892 case HWTSTAMP_TX_ON:
1898 switch (config.rx_filter) {
1899 case HWTSTAMP_FILTER_NONE:
1900 nic->hw_rx_tstamp = false;
1902 case HWTSTAMP_FILTER_ALL:
1903 case HWTSTAMP_FILTER_SOME:
1904 case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:
1905 case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:
1906 case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:
1907 case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:
1908 case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
1909 case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
1910 case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:
1911 case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
1912 case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
1913 case HWTSTAMP_FILTER_PTP_V2_EVENT:
1914 case HWTSTAMP_FILTER_PTP_V2_SYNC:
1915 case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
1916 nic->hw_rx_tstamp = true;
1917 config.rx_filter = HWTSTAMP_FILTER_ALL;
1923 if (netif_running(netdev))
1924 nicvf_config_hw_rx_tstamp(nic, nic->hw_rx_tstamp);
1926 if (copy_to_user(ifr->ifr_data, &config, sizeof(config)))
1932 static int nicvf_ioctl(struct net_device *netdev, struct ifreq *req, int cmd)
1936 return nicvf_config_hwtstamp(netdev, req);
1942 static void __nicvf_set_rx_mode_task(u8 mode, struct xcast_addr_list *mc_addrs,
1945 union nic_mbx mbx = {};
1948 /* From the inside of VM code flow we have only 128 bits memory
1949 * available to send message to host's PF, so send all mc addrs
1950 * one by one, starting from flush command in case if kernel
1951 * requests to configure specific MAC filtering
1954 /* flush DMAC filters and reset RX mode */
1955 mbx.xcast.msg = NIC_MBOX_MSG_RESET_XCAST;
1956 if (nicvf_send_msg_to_pf(nic, &mbx) < 0)
1959 if (mode & BGX_XCAST_MCAST_FILTER) {
1960 /* once enabling filtering, we need to signal to PF to add
1961 * its' own LMAC to the filter to accept packets for it.
1963 mbx.xcast.msg = NIC_MBOX_MSG_ADD_MCAST;
1965 if (nicvf_send_msg_to_pf(nic, &mbx) < 0)
1969 /* check if we have any specific MACs to be added to PF DMAC filter */
1971 /* now go through kernel list of MACs and add them one by one */
1972 for (idx = 0; idx < mc_addrs->count; idx++) {
1973 mbx.xcast.msg = NIC_MBOX_MSG_ADD_MCAST;
1974 mbx.xcast.mac = mc_addrs->mc[idx];
1975 if (nicvf_send_msg_to_pf(nic, &mbx) < 0)
1980 /* and finally set rx mode for PF accordingly */
1981 mbx.xcast.msg = NIC_MBOX_MSG_SET_XCAST;
1982 mbx.xcast.mode = mode;
1984 nicvf_send_msg_to_pf(nic, &mbx);
1989 static void nicvf_set_rx_mode_task(struct work_struct *work_arg)
1991 struct nicvf_work *vf_work = container_of(work_arg, struct nicvf_work,
1993 struct nicvf *nic = container_of(vf_work, struct nicvf, rx_mode_work);
1995 struct xcast_addr_list *mc;
2000 /* Save message data locally to prevent them from
2001 * being overwritten by next ndo_set_rx_mode call().
2003 spin_lock(&nic->rx_mode_wq_lock);
2004 mode = vf_work->mode;
2007 spin_unlock(&nic->rx_mode_wq_lock);
2009 __nicvf_set_rx_mode_task(mode, mc, nic);
2012 static void nicvf_set_rx_mode(struct net_device *netdev)
2014 struct nicvf *nic = netdev_priv(netdev);
2015 struct netdev_hw_addr *ha;
2016 struct xcast_addr_list *mc_list = NULL;
2019 if (netdev->flags & IFF_PROMISC) {
2020 mode = BGX_XCAST_BCAST_ACCEPT | BGX_XCAST_MCAST_ACCEPT;
2022 if (netdev->flags & IFF_BROADCAST)
2023 mode |= BGX_XCAST_BCAST_ACCEPT;
2025 if (netdev->flags & IFF_ALLMULTI) {
2026 mode |= BGX_XCAST_MCAST_ACCEPT;
2027 } else if (netdev->flags & IFF_MULTICAST) {
2028 mode |= BGX_XCAST_MCAST_FILTER;
2029 /* here we need to copy mc addrs */
2030 if (netdev_mc_count(netdev)) {
2031 mc_list = kmalloc(offsetof(typeof(*mc_list),
2032 mc[netdev_mc_count(netdev)]),
2034 if (unlikely(!mc_list))
2037 netdev_hw_addr_list_for_each(ha, &netdev->mc) {
2038 mc_list->mc[mc_list->count] =
2039 ether_addr_to_u64(ha->addr);
2045 spin_lock(&nic->rx_mode_wq_lock);
2046 kfree(nic->rx_mode_work.mc);
2047 nic->rx_mode_work.mc = mc_list;
2048 nic->rx_mode_work.mode = mode;
2049 queue_work(nic->nicvf_rx_mode_wq, &nic->rx_mode_work.work);
2050 spin_unlock(&nic->rx_mode_wq_lock);
2053 static const struct net_device_ops nicvf_netdev_ops = {
2054 .ndo_open = nicvf_open,
2055 .ndo_stop = nicvf_stop,
2056 .ndo_start_xmit = nicvf_xmit,
2057 .ndo_change_mtu = nicvf_change_mtu,
2058 .ndo_set_mac_address = nicvf_set_mac_address,
2059 .ndo_get_stats64 = nicvf_get_stats64,
2060 .ndo_tx_timeout = nicvf_tx_timeout,
2061 .ndo_fix_features = nicvf_fix_features,
2062 .ndo_set_features = nicvf_set_features,
2063 .ndo_bpf = nicvf_xdp,
2064 .ndo_do_ioctl = nicvf_ioctl,
2065 .ndo_set_rx_mode = nicvf_set_rx_mode,
2068 static int nicvf_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
2070 struct device *dev = &pdev->dev;
2071 struct net_device *netdev;
2075 struct cavium_ptp *ptp_clock;
2077 ptp_clock = cavium_ptp_get();
2078 if (IS_ERR(ptp_clock)) {
2079 if (PTR_ERR(ptp_clock) == -ENODEV)
2080 /* In virtualized environment we proceed without ptp */
2083 return PTR_ERR(ptp_clock);
2086 err = pci_enable_device(pdev);
2088 dev_err(dev, "Failed to enable PCI device\n");
2092 err = pci_request_regions(pdev, DRV_NAME);
2094 dev_err(dev, "PCI request regions failed 0x%x\n", err);
2095 goto err_disable_device;
2098 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(48));
2100 dev_err(dev, "Unable to get usable DMA configuration\n");
2101 goto err_release_regions;
2104 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(48));
2106 dev_err(dev, "unable to get 48-bit DMA for consistent allocations\n");
2107 goto err_release_regions;
2110 qcount = netif_get_num_default_rss_queues();
2112 /* Restrict multiqset support only for host bound VFs */
2113 if (pdev->is_virtfn) {
2114 /* Set max number of queues per VF */
2115 qcount = min_t(int, num_online_cpus(),
2116 (MAX_SQS_PER_VF + 1) * MAX_CMP_QUEUES_PER_QS);
2119 netdev = alloc_etherdev_mqs(sizeof(struct nicvf), qcount, qcount);
2122 goto err_release_regions;
2125 pci_set_drvdata(pdev, netdev);
2127 SET_NETDEV_DEV(netdev, &pdev->dev);
2129 nic = netdev_priv(netdev);
2130 nic->netdev = netdev;
2133 nic->max_queues = qcount;
2134 /* If no of CPUs are too low, there won't be any queues left
2135 * for XDP_TX, hence double it.
2138 nic->max_queues *= 2;
2139 nic->ptp_clock = ptp_clock;
2141 /* MAP VF's configuration registers */
2142 nic->reg_base = pcim_iomap(pdev, PCI_CFG_REG_BAR_NUM, 0);
2143 if (!nic->reg_base) {
2144 dev_err(dev, "Cannot map config register space, aborting\n");
2146 goto err_free_netdev;
2149 nic->drv_stats = netdev_alloc_pcpu_stats(struct nicvf_drv_stats);
2150 if (!nic->drv_stats) {
2152 goto err_free_netdev;
2155 err = nicvf_set_qset_resources(nic);
2157 goto err_free_netdev;
2159 /* Check if PF is alive and get MAC address for this VF */
2160 err = nicvf_register_misc_interrupt(nic);
2162 goto err_free_netdev;
2164 nicvf_send_vf_struct(nic);
2166 if (!pass1_silicon(nic->pdev))
2169 /* Get iommu domain for iova to physical addr conversion */
2170 nic->iommu_domain = iommu_get_domain_for_dev(dev);
2172 pci_read_config_word(nic->pdev, PCI_SUBSYSTEM_ID, &sdevid);
2173 if (sdevid == 0xA134)
2176 /* Check if this VF is in QS only mode */
2180 err = nicvf_set_real_num_queues(netdev, nic->tx_queues, nic->rx_queues);
2182 goto err_unregister_interrupts;
2184 netdev->hw_features = (NETIF_F_RXCSUM | NETIF_F_SG |
2185 NETIF_F_TSO | NETIF_F_GRO | NETIF_F_TSO6 |
2186 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
2187 NETIF_F_HW_VLAN_CTAG_RX);
2189 netdev->hw_features |= NETIF_F_RXHASH;
2191 netdev->features |= netdev->hw_features;
2192 netdev->hw_features |= NETIF_F_LOOPBACK;
2194 netdev->vlan_features = NETIF_F_SG | NETIF_F_IP_CSUM |
2195 NETIF_F_IPV6_CSUM | NETIF_F_TSO | NETIF_F_TSO6;
2197 netdev->netdev_ops = &nicvf_netdev_ops;
2198 netdev->watchdog_timeo = NICVF_TX_TIMEOUT;
2200 /* MTU range: 64 - 9200 */
2201 netdev->min_mtu = NIC_HW_MIN_FRS;
2202 netdev->max_mtu = NIC_HW_MAX_FRS;
2204 INIT_WORK(&nic->reset_task, nicvf_reset_task);
2206 nic->nicvf_rx_mode_wq = alloc_ordered_workqueue("nicvf_rx_mode_wq_VF%d",
2209 INIT_WORK(&nic->rx_mode_work.work, nicvf_set_rx_mode_task);
2210 spin_lock_init(&nic->rx_mode_wq_lock);
2212 err = register_netdev(netdev);
2214 dev_err(dev, "Failed to register netdevice\n");
2215 goto err_unregister_interrupts;
2218 nic->msg_enable = debug;
2220 nicvf_set_ethtool_ops(netdev);
2224 err_unregister_interrupts:
2225 nicvf_unregister_interrupts(nic);
2227 pci_set_drvdata(pdev, NULL);
2229 free_percpu(nic->drv_stats);
2230 free_netdev(netdev);
2231 err_release_regions:
2232 pci_release_regions(pdev);
2234 pci_disable_device(pdev);
2238 static void nicvf_remove(struct pci_dev *pdev)
2240 struct net_device *netdev = pci_get_drvdata(pdev);
2242 struct net_device *pnetdev;
2247 nic = netdev_priv(netdev);
2248 pnetdev = nic->pnicvf->netdev;
2250 /* Check if this Qset is assigned to different VF.
2251 * If yes, clean primary and all secondary Qsets.
2253 if (pnetdev && (pnetdev->reg_state == NETREG_REGISTERED))
2254 unregister_netdev(pnetdev);
2255 if (nic->nicvf_rx_mode_wq) {
2256 destroy_workqueue(nic->nicvf_rx_mode_wq);
2257 nic->nicvf_rx_mode_wq = NULL;
2259 nicvf_unregister_interrupts(nic);
2260 pci_set_drvdata(pdev, NULL);
2262 free_percpu(nic->drv_stats);
2263 cavium_ptp_put(nic->ptp_clock);
2264 free_netdev(netdev);
2265 pci_release_regions(pdev);
2266 pci_disable_device(pdev);
2269 static void nicvf_shutdown(struct pci_dev *pdev)
2274 static struct pci_driver nicvf_driver = {
2276 .id_table = nicvf_id_table,
2277 .probe = nicvf_probe,
2278 .remove = nicvf_remove,
2279 .shutdown = nicvf_shutdown,
2282 static int __init nicvf_init_module(void)
2284 pr_info("%s, ver %s\n", DRV_NAME, DRV_VERSION);
2285 return pci_register_driver(&nicvf_driver);
2288 static void __exit nicvf_cleanup_module(void)
2290 pci_unregister_driver(&nicvf_driver);
2293 module_init(nicvf_init_module);
2294 module_exit(nicvf_cleanup_module);