2 * Fast Ethernet Controller (FEC) driver for Motorola MPC8xx.
3 * Copyright (c) 1997 Dan Malek (dmalek@jlc.net)
5 * Right now, I am very wasteful with the buffers. I allocate memory
6 * pages and then divide them into 2K frame buffers. This way I know I
7 * have buffers large enough to hold one frame within one buffer descriptor.
8 * Once I get this working, I will use 64 or 128 byte CPM buffers, which
9 * will be much more memory efficient and will easily handle lots of
12 * Much better multiple PHY support by Magnus Damm.
13 * Copyright (c) 2000 Ericsson Radio Systems AB.
15 * Support for FEC controller of ColdFire processors.
16 * Copyright (c) 2001-2005 Greg Ungerer (gerg@snapgear.com)
18 * Bug fixes and cleanup by Philippe De Muyter (phdm@macqel.be)
19 * Copyright (c) 2004-2006 Macq Electronique SA.
21 * Copyright (C) 2010-2011 Freescale Semiconductor, Inc.
24 #include <linux/module.h>
25 #include <linux/kernel.h>
26 #include <linux/string.h>
27 #include <linux/ptrace.h>
28 #include <linux/errno.h>
29 #include <linux/ioport.h>
30 #include <linux/slab.h>
31 #include <linux/interrupt.h>
32 #include <linux/delay.h>
33 #include <linux/netdevice.h>
34 #include <linux/etherdevice.h>
35 #include <linux/skbuff.h>
40 #include <linux/tcp.h>
41 #include <linux/udp.h>
42 #include <linux/icmp.h>
43 #include <linux/spinlock.h>
44 #include <linux/workqueue.h>
45 #include <linux/bitops.h>
47 #include <linux/irq.h>
48 #include <linux/clk.h>
49 #include <linux/platform_device.h>
50 #include <linux/phy.h>
51 #include <linux/fec.h>
53 #include <linux/of_device.h>
54 #include <linux/of_gpio.h>
55 #include <linux/of_net.h>
56 #include <linux/regulator/consumer.h>
57 #include <linux/if_vlan.h>
58 #include <linux/pinctrl/consumer.h>
60 #include <asm/cacheflush.h>
64 static void set_multicast_list(struct net_device *ndev);
66 #if defined(CONFIG_ARM)
67 #define FEC_ALIGNMENT 0xf
69 #define FEC_ALIGNMENT 0x3
72 #define DRIVER_NAME "fec"
74 /* Pause frame feild and FIFO threshold */
75 #define FEC_ENET_FCE (1 << 5)
76 #define FEC_ENET_RSEM_V 0x84
77 #define FEC_ENET_RSFL_V 16
78 #define FEC_ENET_RAEM_V 0x8
79 #define FEC_ENET_RAFL_V 0x8
80 #define FEC_ENET_OPD_V 0xFFF0
82 /* Controller is ENET-MAC */
83 #define FEC_QUIRK_ENET_MAC (1 << 0)
84 /* Controller needs driver to swap frame */
85 #define FEC_QUIRK_SWAP_FRAME (1 << 1)
86 /* Controller uses gasket */
87 #define FEC_QUIRK_USE_GASKET (1 << 2)
88 /* Controller has GBIT support */
89 #define FEC_QUIRK_HAS_GBIT (1 << 3)
90 /* Controller has extend desc buffer */
91 #define FEC_QUIRK_HAS_BUFDESC_EX (1 << 4)
92 /* Controller has hardware checksum support */
93 #define FEC_QUIRK_HAS_CSUM (1 << 5)
94 /* Controller has hardware vlan support */
95 #define FEC_QUIRK_HAS_VLAN (1 << 6)
96 /* ENET IP errata ERR006358
98 * If the ready bit in the transmit buffer descriptor (TxBD[R]) is previously
99 * detected as not set during a prior frame transmission, then the
100 * ENET_TDAR[TDAR] bit is cleared at a later time, even if additional TxBDs
101 * were added to the ring and the ENET_TDAR[TDAR] bit is set. This results in
102 * frames not being transmitted until there is a 0-to-1 transition on
105 #define FEC_QUIRK_ERR006358 (1 << 7)
107 static struct platform_device_id fec_devtype[] = {
109 /* keep it for coldfire */
114 .driver_data = FEC_QUIRK_USE_GASKET,
120 .driver_data = FEC_QUIRK_ENET_MAC | FEC_QUIRK_SWAP_FRAME,
123 .driver_data = FEC_QUIRK_ENET_MAC | FEC_QUIRK_HAS_GBIT |
124 FEC_QUIRK_HAS_BUFDESC_EX | FEC_QUIRK_HAS_CSUM |
125 FEC_QUIRK_HAS_VLAN | FEC_QUIRK_ERR006358,
127 .name = "mvf600-fec",
128 .driver_data = FEC_QUIRK_ENET_MAC,
133 MODULE_DEVICE_TABLE(platform, fec_devtype);
136 IMX25_FEC = 1, /* runs on i.mx25/50/53 */
137 IMX27_FEC, /* runs on i.mx27/35/51 */
143 static const struct of_device_id fec_dt_ids[] = {
144 { .compatible = "fsl,imx25-fec", .data = &fec_devtype[IMX25_FEC], },
145 { .compatible = "fsl,imx27-fec", .data = &fec_devtype[IMX27_FEC], },
146 { .compatible = "fsl,imx28-fec", .data = &fec_devtype[IMX28_FEC], },
147 { .compatible = "fsl,imx6q-fec", .data = &fec_devtype[IMX6Q_FEC], },
148 { .compatible = "fsl,mvf600-fec", .data = &fec_devtype[MVF600_FEC], },
151 MODULE_DEVICE_TABLE(of, fec_dt_ids);
153 static unsigned char macaddr[ETH_ALEN];
154 module_param_array(macaddr, byte, NULL, 0);
155 MODULE_PARM_DESC(macaddr, "FEC Ethernet MAC address");
157 #if defined(CONFIG_M5272)
159 * Some hardware gets it MAC address out of local flash memory.
160 * if this is non-zero then assume it is the address to get MAC from.
162 #if defined(CONFIG_NETtel)
163 #define FEC_FLASHMAC 0xf0006006
164 #elif defined(CONFIG_GILBARCONAP) || defined(CONFIG_SCALES)
165 #define FEC_FLASHMAC 0xf0006000
166 #elif defined(CONFIG_CANCam)
167 #define FEC_FLASHMAC 0xf0020000
168 #elif defined (CONFIG_M5272C3)
169 #define FEC_FLASHMAC (0xffe04000 + 4)
170 #elif defined(CONFIG_MOD5272)
171 #define FEC_FLASHMAC 0xffc0406b
173 #define FEC_FLASHMAC 0
175 #endif /* CONFIG_M5272 */
177 /* Interrupt events/masks. */
178 #define FEC_ENET_HBERR ((uint)0x80000000) /* Heartbeat error */
179 #define FEC_ENET_BABR ((uint)0x40000000) /* Babbling receiver */
180 #define FEC_ENET_BABT ((uint)0x20000000) /* Babbling transmitter */
181 #define FEC_ENET_GRA ((uint)0x10000000) /* Graceful stop complete */
182 #define FEC_ENET_TXF ((uint)0x08000000) /* Full frame transmitted */
183 #define FEC_ENET_TXB ((uint)0x04000000) /* A buffer was transmitted */
184 #define FEC_ENET_RXF ((uint)0x02000000) /* Full frame received */
185 #define FEC_ENET_RXB ((uint)0x01000000) /* A buffer was received */
186 #define FEC_ENET_MII ((uint)0x00800000) /* MII interrupt */
187 #define FEC_ENET_EBERR ((uint)0x00400000) /* SDMA bus error */
189 #define FEC_DEFAULT_IMASK (FEC_ENET_TXF | FEC_ENET_RXF | FEC_ENET_MII)
190 #define FEC_RX_DISABLED_IMASK (FEC_DEFAULT_IMASK & (~FEC_ENET_RXF))
192 /* The FEC stores dest/src/type/vlan, data, and checksum for receive packets.
194 #define PKT_MAXBUF_SIZE 1522
195 #define PKT_MINBUF_SIZE 64
196 #define PKT_MAXBLR_SIZE 1536
198 /* FEC receive acceleration */
199 #define FEC_RACC_IPDIS (1 << 1)
200 #define FEC_RACC_PRODIS (1 << 2)
201 #define FEC_RACC_OPTIONS (FEC_RACC_IPDIS | FEC_RACC_PRODIS)
204 * The 5270/5271/5280/5282/532x RX control register also contains maximum frame
205 * size bits. Other FEC hardware does not, so we need to take that into
206 * account when setting it.
208 #if defined(CONFIG_M523x) || defined(CONFIG_M527x) || defined(CONFIG_M528x) || \
209 defined(CONFIG_M520x) || defined(CONFIG_M532x) || defined(CONFIG_ARM)
210 #define OPT_FRAME_SIZE (PKT_MAXBUF_SIZE << 16)
212 #define OPT_FRAME_SIZE 0
215 /* FEC MII MMFR bits definition */
216 #define FEC_MMFR_ST (1 << 30)
217 #define FEC_MMFR_OP_READ (2 << 28)
218 #define FEC_MMFR_OP_WRITE (1 << 28)
219 #define FEC_MMFR_PA(v) ((v & 0x1f) << 23)
220 #define FEC_MMFR_RA(v) ((v & 0x1f) << 18)
221 #define FEC_MMFR_TA (2 << 16)
222 #define FEC_MMFR_DATA(v) (v & 0xffff)
224 #define FEC_MII_TIMEOUT 30000 /* us */
226 /* Transmitter timeout */
227 #define TX_TIMEOUT (2 * HZ)
229 #define FEC_PAUSE_FLAG_AUTONEG 0x1
230 #define FEC_PAUSE_FLAG_ENABLE 0x2
232 #define TSO_HEADER_SIZE 128
233 /* Max number of allowed TCP segments for software TSO */
234 #define FEC_MAX_TSO_SEGS 100
235 #define FEC_MAX_SKB_DESCS (FEC_MAX_TSO_SEGS * 2 + MAX_SKB_FRAGS)
237 #define IS_TSO_HEADER(txq, addr) \
238 ((addr >= txq->tso_hdrs_dma) && \
239 (addr < txq->tso_hdrs_dma + txq->tx_ring_size * TSO_HEADER_SIZE))
244 struct bufdesc *fec_enet_get_nextdesc(struct bufdesc *bdp, struct fec_enet_private *fep)
246 struct bufdesc *new_bd = bdp + 1;
247 struct bufdesc_ex *ex_new_bd = (struct bufdesc_ex *)bdp + 1;
248 struct bufdesc_ex *ex_base;
249 struct bufdesc *base;
252 if (bdp >= fep->tx_bd_base) {
253 base = fep->tx_bd_base;
254 ring_size = fep->tx_ring_size;
255 ex_base = (struct bufdesc_ex *)fep->tx_bd_base;
257 base = fep->rx_bd_base;
258 ring_size = fep->rx_ring_size;
259 ex_base = (struct bufdesc_ex *)fep->rx_bd_base;
263 return (struct bufdesc *)((ex_new_bd >= (ex_base + ring_size)) ?
264 ex_base : ex_new_bd);
266 return (new_bd >= (base + ring_size)) ?
271 struct bufdesc *fec_enet_get_prevdesc(struct bufdesc *bdp, struct fec_enet_private *fep)
273 struct bufdesc *new_bd = bdp - 1;
274 struct bufdesc_ex *ex_new_bd = (struct bufdesc_ex *)bdp - 1;
275 struct bufdesc_ex *ex_base;
276 struct bufdesc *base;
279 if (bdp >= fep->tx_bd_base) {
280 base = fep->tx_bd_base;
281 ring_size = fep->tx_ring_size;
282 ex_base = (struct bufdesc_ex *)fep->tx_bd_base;
284 base = fep->rx_bd_base;
285 ring_size = fep->rx_ring_size;
286 ex_base = (struct bufdesc_ex *)fep->rx_bd_base;
290 return (struct bufdesc *)((ex_new_bd < ex_base) ?
291 (ex_new_bd + ring_size) : ex_new_bd);
293 return (new_bd < base) ? (new_bd + ring_size) : new_bd;
296 static int fec_enet_get_bd_index(struct bufdesc *base, struct bufdesc *bdp,
297 struct fec_enet_private *fep)
299 return ((const char *)bdp - (const char *)base) / fep->bufdesc_size;
302 static int fec_enet_get_free_txdesc_num(struct fec_enet_private *fep)
306 entries = ((const char *)fep->dirty_tx -
307 (const char *)fep->cur_tx) / fep->bufdesc_size - 1;
309 return entries > 0 ? entries : entries + fep->tx_ring_size;
312 static void *swap_buffer(void *bufaddr, int len)
315 unsigned int *buf = bufaddr;
317 for (i = 0; i < DIV_ROUND_UP(len, 4); i++, buf++)
318 *buf = cpu_to_be32(*buf);
323 static inline bool is_ipv4_pkt(struct sk_buff *skb)
325 return skb->protocol == htons(ETH_P_IP) && ip_hdr(skb)->version == 4;
329 fec_enet_clear_csum(struct sk_buff *skb, struct net_device *ndev)
331 /* Only run for packets requiring a checksum. */
332 if (skb->ip_summed != CHECKSUM_PARTIAL)
335 if (unlikely(skb_cow_head(skb, 0)))
338 if (is_ipv4_pkt(skb))
339 ip_hdr(skb)->check = 0;
340 *(__sum16 *)(skb->head + skb->csum_start + skb->csum_offset) = 0;
346 fec_enet_txq_submit_frag_skb(struct sk_buff *skb, struct net_device *ndev)
348 struct fec_enet_private *fep = netdev_priv(ndev);
349 const struct platform_device_id *id_entry =
350 platform_get_device_id(fep->pdev);
351 struct bufdesc *bdp = fep->cur_tx;
352 struct bufdesc_ex *ebdp;
353 int nr_frags = skb_shinfo(skb)->nr_frags;
355 unsigned short status;
356 unsigned int estatus = 0;
357 skb_frag_t *this_frag;
363 for (frag = 0; frag < nr_frags; frag++) {
364 this_frag = &skb_shinfo(skb)->frags[frag];
365 bdp = fec_enet_get_nextdesc(bdp, fep);
366 ebdp = (struct bufdesc_ex *)bdp;
368 status = bdp->cbd_sc;
369 status &= ~BD_ENET_TX_STATS;
370 status |= (BD_ENET_TX_TC | BD_ENET_TX_READY);
371 frag_len = skb_shinfo(skb)->frags[frag].size;
373 /* Handle the last BD specially */
374 if (frag == nr_frags - 1) {
375 status |= (BD_ENET_TX_INTR | BD_ENET_TX_LAST);
376 if (fep->bufdesc_ex) {
377 estatus |= BD_ENET_TX_INT;
378 if (unlikely(skb_shinfo(skb)->tx_flags &
379 SKBTX_HW_TSTAMP && fep->hwts_tx_en))
380 estatus |= BD_ENET_TX_TS;
384 if (fep->bufdesc_ex) {
385 if (skb->ip_summed == CHECKSUM_PARTIAL)
386 estatus |= BD_ENET_TX_PINS | BD_ENET_TX_IINS;
388 ebdp->cbd_esc = estatus;
391 bufaddr = page_address(this_frag->page.p) + this_frag->page_offset;
393 index = fec_enet_get_bd_index(fep->tx_bd_base, bdp, fep);
394 if (((unsigned long) bufaddr) & FEC_ALIGNMENT ||
395 id_entry->driver_data & FEC_QUIRK_SWAP_FRAME) {
396 memcpy(fep->tx_bounce[index], bufaddr, frag_len);
397 bufaddr = fep->tx_bounce[index];
399 if (id_entry->driver_data & FEC_QUIRK_SWAP_FRAME)
400 swap_buffer(bufaddr, frag_len);
403 addr = dma_map_single(&fep->pdev->dev, bufaddr, frag_len,
405 if (dma_mapping_error(&fep->pdev->dev, addr)) {
406 dev_kfree_skb_any(skb);
408 netdev_err(ndev, "Tx DMA memory map failed\n");
409 goto dma_mapping_error;
412 bdp->cbd_bufaddr = addr;
413 bdp->cbd_datlen = frag_len;
414 bdp->cbd_sc = status;
423 for (i = 0; i < frag; i++) {
424 bdp = fec_enet_get_nextdesc(bdp, fep);
425 dma_unmap_single(&fep->pdev->dev, bdp->cbd_bufaddr,
426 bdp->cbd_datlen, DMA_TO_DEVICE);
431 static int fec_enet_txq_submit_skb(struct sk_buff *skb, struct net_device *ndev)
433 struct fec_enet_private *fep = netdev_priv(ndev);
434 const struct platform_device_id *id_entry =
435 platform_get_device_id(fep->pdev);
436 int nr_frags = skb_shinfo(skb)->nr_frags;
437 struct bufdesc *bdp, *last_bdp;
440 unsigned short status;
441 unsigned short buflen;
442 unsigned int estatus = 0;
447 entries_free = fec_enet_get_free_txdesc_num(fep);
448 if (entries_free < MAX_SKB_FRAGS + 1) {
449 dev_kfree_skb_any(skb);
451 netdev_err(ndev, "NOT enough BD for SG!\n");
455 /* Protocol checksum off-load for TCP and UDP. */
456 if (fec_enet_clear_csum(skb, ndev)) {
457 dev_kfree_skb_any(skb);
461 /* Fill in a Tx ring entry */
463 status = bdp->cbd_sc;
464 status &= ~BD_ENET_TX_STATS;
466 /* Set buffer length and buffer pointer */
468 buflen = skb_headlen(skb);
470 index = fec_enet_get_bd_index(fep->tx_bd_base, bdp, fep);
471 if (((unsigned long) bufaddr) & FEC_ALIGNMENT ||
472 id_entry->driver_data & FEC_QUIRK_SWAP_FRAME) {
473 memcpy(fep->tx_bounce[index], skb->data, buflen);
474 bufaddr = fep->tx_bounce[index];
476 if (id_entry->driver_data & FEC_QUIRK_SWAP_FRAME)
477 swap_buffer(bufaddr, buflen);
480 /* Push the data cache so the CPM does not get stale memory data. */
481 addr = dma_map_single(&fep->pdev->dev, bufaddr, buflen, DMA_TO_DEVICE);
482 if (dma_mapping_error(&fep->pdev->dev, addr)) {
483 dev_kfree_skb_any(skb);
485 netdev_err(ndev, "Tx DMA memory map failed\n");
490 ret = fec_enet_txq_submit_frag_skb(skb, ndev);
494 status |= (BD_ENET_TX_INTR | BD_ENET_TX_LAST);
495 if (fep->bufdesc_ex) {
496 estatus = BD_ENET_TX_INT;
497 if (unlikely(skb_shinfo(skb)->tx_flags &
498 SKBTX_HW_TSTAMP && fep->hwts_tx_en))
499 estatus |= BD_ENET_TX_TS;
503 if (fep->bufdesc_ex) {
505 struct bufdesc_ex *ebdp = (struct bufdesc_ex *)bdp;
507 if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP &&
509 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
511 if (skb->ip_summed == CHECKSUM_PARTIAL)
512 estatus |= BD_ENET_TX_PINS | BD_ENET_TX_IINS;
515 ebdp->cbd_esc = estatus;
518 last_bdp = fep->cur_tx;
519 index = fec_enet_get_bd_index(fep->tx_bd_base, last_bdp, fep);
520 /* Save skb pointer */
521 fep->tx_skbuff[index] = skb;
523 bdp->cbd_datlen = buflen;
524 bdp->cbd_bufaddr = addr;
526 /* Send it on its way. Tell FEC it's ready, interrupt when done,
527 * it's the last BD of the frame, and to put the CRC on the end.
529 status |= (BD_ENET_TX_READY | BD_ENET_TX_TC);
530 bdp->cbd_sc = status;
532 /* If this was the last BD in the ring, start at the beginning again. */
533 bdp = fec_enet_get_nextdesc(last_bdp, fep);
535 skb_tx_timestamp(skb);
539 /* Trigger transmission start */
540 writel(0, fep->hwp + FEC_X_DES_ACTIVE);
546 fec_enet_txq_put_data_tso(struct sk_buff *skb, struct net_device *ndev,
547 struct bufdesc *bdp, int index, char *data,
548 int size, bool last_tcp, bool is_last)
550 struct fec_enet_private *fep = netdev_priv(ndev);
551 const struct platform_device_id *id_entry =
552 platform_get_device_id(fep->pdev);
553 struct bufdesc_ex *ebdp = (struct bufdesc_ex *)bdp;
554 unsigned short status;
555 unsigned int estatus = 0;
558 status = bdp->cbd_sc;
559 status &= ~BD_ENET_TX_STATS;
561 status |= (BD_ENET_TX_TC | BD_ENET_TX_READY);
563 if (((unsigned long) data) & FEC_ALIGNMENT ||
564 id_entry->driver_data & FEC_QUIRK_SWAP_FRAME) {
565 memcpy(fep->tx_bounce[index], data, size);
566 data = fep->tx_bounce[index];
568 if (id_entry->driver_data & FEC_QUIRK_SWAP_FRAME)
569 swap_buffer(data, size);
572 addr = dma_map_single(&fep->pdev->dev, data, size, DMA_TO_DEVICE);
573 if (dma_mapping_error(&fep->pdev->dev, addr)) {
574 dev_kfree_skb_any(skb);
576 netdev_err(ndev, "Tx DMA memory map failed\n");
577 return NETDEV_TX_BUSY;
580 bdp->cbd_datlen = size;
581 bdp->cbd_bufaddr = addr;
583 if (fep->bufdesc_ex) {
584 if (skb->ip_summed == CHECKSUM_PARTIAL)
585 estatus |= BD_ENET_TX_PINS | BD_ENET_TX_IINS;
587 ebdp->cbd_esc = estatus;
590 /* Handle the last BD specially */
592 status |= (BD_ENET_TX_LAST | BD_ENET_TX_TC);
594 status |= BD_ENET_TX_INTR;
596 ebdp->cbd_esc |= BD_ENET_TX_INT;
599 bdp->cbd_sc = status;
605 fec_enet_txq_put_hdr_tso(struct sk_buff *skb, struct net_device *ndev,
606 struct bufdesc *bdp, int index)
608 struct fec_enet_private *fep = netdev_priv(ndev);
609 const struct platform_device_id *id_entry =
610 platform_get_device_id(fep->pdev);
611 int hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
612 struct bufdesc_ex *ebdp = (struct bufdesc_ex *)bdp;
614 unsigned long dmabuf;
615 unsigned short status;
616 unsigned int estatus = 0;
618 status = bdp->cbd_sc;
619 status &= ~BD_ENET_TX_STATS;
620 status |= (BD_ENET_TX_TC | BD_ENET_TX_READY);
622 bufaddr = fep->tso_hdrs + index * TSO_HEADER_SIZE;
623 dmabuf = fep->tso_hdrs_dma + index * TSO_HEADER_SIZE;
624 if (((unsigned long) bufaddr) & FEC_ALIGNMENT ||
625 id_entry->driver_data & FEC_QUIRK_SWAP_FRAME) {
626 memcpy(fep->tx_bounce[index], skb->data, hdr_len);
627 bufaddr = fep->tx_bounce[index];
629 if (id_entry->driver_data & FEC_QUIRK_SWAP_FRAME)
630 swap_buffer(bufaddr, hdr_len);
632 dmabuf = dma_map_single(&fep->pdev->dev, bufaddr,
633 hdr_len, DMA_TO_DEVICE);
634 if (dma_mapping_error(&fep->pdev->dev, dmabuf)) {
635 dev_kfree_skb_any(skb);
637 netdev_err(ndev, "Tx DMA memory map failed\n");
638 return NETDEV_TX_BUSY;
642 bdp->cbd_bufaddr = dmabuf;
643 bdp->cbd_datlen = hdr_len;
645 if (fep->bufdesc_ex) {
646 if (skb->ip_summed == CHECKSUM_PARTIAL)
647 estatus |= BD_ENET_TX_PINS | BD_ENET_TX_IINS;
649 ebdp->cbd_esc = estatus;
652 bdp->cbd_sc = status;
657 static int fec_enet_txq_submit_tso(struct sk_buff *skb, struct net_device *ndev)
659 struct fec_enet_private *fep = netdev_priv(ndev);
660 int hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
661 int total_len, data_left;
662 struct bufdesc *bdp = fep->cur_tx;
664 unsigned int index = 0;
667 if (tso_count_descs(skb) >= fec_enet_get_free_txdesc_num(fep)) {
668 dev_kfree_skb_any(skb);
670 netdev_err(ndev, "NOT enough BD for TSO!\n");
674 /* Protocol checksum off-load for TCP and UDP. */
675 if (fec_enet_clear_csum(skb, ndev)) {
676 dev_kfree_skb_any(skb);
680 /* Initialize the TSO handler, and prepare the first payload */
681 tso_start(skb, &tso);
683 total_len = skb->len - hdr_len;
684 while (total_len > 0) {
687 index = fec_enet_get_bd_index(fep->tx_bd_base, bdp, fep);
688 data_left = min_t(int, skb_shinfo(skb)->gso_size, total_len);
689 total_len -= data_left;
691 /* prepare packet headers: MAC + IP + TCP */
692 hdr = fep->tso_hdrs + index * TSO_HEADER_SIZE;
693 tso_build_hdr(skb, hdr, &tso, data_left, total_len == 0);
694 ret = fec_enet_txq_put_hdr_tso(skb, ndev, bdp, index);
698 while (data_left > 0) {
701 size = min_t(int, tso.size, data_left);
702 bdp = fec_enet_get_nextdesc(bdp, fep);
703 index = fec_enet_get_bd_index(fep->tx_bd_base, bdp, fep);
704 ret = fec_enet_txq_put_data_tso(skb, ndev, bdp, index, tso.data,
705 size, size == data_left,
711 tso_build_data(skb, &tso, size);
714 bdp = fec_enet_get_nextdesc(bdp, fep);
717 /* Save skb pointer */
718 fep->tx_skbuff[index] = skb;
720 skb_tx_timestamp(skb);
723 /* Trigger transmission start */
724 writel(0, fep->hwp + FEC_X_DES_ACTIVE);
729 /* TODO: Release all used data descriptors for TSO */
734 fec_enet_start_xmit(struct sk_buff *skb, struct net_device *ndev)
736 struct fec_enet_private *fep = netdev_priv(ndev);
741 ret = fec_enet_txq_submit_tso(skb, ndev);
743 ret = fec_enet_txq_submit_skb(skb, ndev);
747 entries_free = fec_enet_get_free_txdesc_num(fep);
748 if (entries_free <= fep->tx_stop_threshold)
749 netif_stop_queue(ndev);
754 /* Init RX & TX buffer descriptors
756 static void fec_enet_bd_init(struct net_device *dev)
758 struct fec_enet_private *fep = netdev_priv(dev);
762 /* Initialize the receive buffer descriptors. */
763 bdp = fep->rx_bd_base;
764 for (i = 0; i < fep->rx_ring_size; i++) {
766 /* Initialize the BD for every fragment in the page. */
767 if (bdp->cbd_bufaddr)
768 bdp->cbd_sc = BD_ENET_RX_EMPTY;
771 bdp = fec_enet_get_nextdesc(bdp, fep);
774 /* Set the last buffer to wrap */
775 bdp = fec_enet_get_prevdesc(bdp, fep);
776 bdp->cbd_sc |= BD_SC_WRAP;
778 fep->cur_rx = fep->rx_bd_base;
780 /* ...and the same for transmit */
781 bdp = fep->tx_bd_base;
783 for (i = 0; i < fep->tx_ring_size; i++) {
785 /* Initialize the BD for every fragment in the page. */
787 if (fep->tx_skbuff[i]) {
788 dev_kfree_skb_any(fep->tx_skbuff[i]);
789 fep->tx_skbuff[i] = NULL;
791 bdp->cbd_bufaddr = 0;
792 bdp = fec_enet_get_nextdesc(bdp, fep);
795 /* Set the last buffer to wrap */
796 bdp = fec_enet_get_prevdesc(bdp, fep);
797 bdp->cbd_sc |= BD_SC_WRAP;
802 * This function is called to start or restart the FEC during a link
803 * change, transmit timeout, or to reconfigure the FEC. The network
804 * packet processing for this device must be stopped before this call.
807 fec_restart(struct net_device *ndev)
809 struct fec_enet_private *fep = netdev_priv(ndev);
810 const struct platform_device_id *id_entry =
811 platform_get_device_id(fep->pdev);
815 u32 rcntl = OPT_FRAME_SIZE | 0x04;
816 u32 ecntl = 0x2; /* ETHEREN */
818 /* Whack a reset. We should wait for this. */
819 writel(1, fep->hwp + FEC_ECNTRL);
823 * enet-mac reset will reset mac address registers too,
824 * so need to reconfigure it.
826 if (id_entry->driver_data & FEC_QUIRK_ENET_MAC) {
827 memcpy(&temp_mac, ndev->dev_addr, ETH_ALEN);
828 writel(cpu_to_be32(temp_mac[0]), fep->hwp + FEC_ADDR_LOW);
829 writel(cpu_to_be32(temp_mac[1]), fep->hwp + FEC_ADDR_HIGH);
832 /* Clear any outstanding interrupt. */
833 writel(0xffc00000, fep->hwp + FEC_IEVENT);
835 /* Set maximum receive buffer size. */
836 writel(PKT_MAXBLR_SIZE, fep->hwp + FEC_R_BUFF_SIZE);
838 fec_enet_bd_init(ndev);
840 /* Set receive and transmit descriptor base. */
841 writel(fep->bd_dma, fep->hwp + FEC_R_DES_START);
843 writel((unsigned long)fep->bd_dma + sizeof(struct bufdesc_ex)
844 * fep->rx_ring_size, fep->hwp + FEC_X_DES_START);
846 writel((unsigned long)fep->bd_dma + sizeof(struct bufdesc)
847 * fep->rx_ring_size, fep->hwp + FEC_X_DES_START);
850 for (i = 0; i <= TX_RING_MOD_MASK; i++) {
851 if (fep->tx_skbuff[i]) {
852 dev_kfree_skb_any(fep->tx_skbuff[i]);
853 fep->tx_skbuff[i] = NULL;
857 /* Enable MII mode */
858 if (fep->full_duplex == DUPLEX_FULL) {
860 writel(0x04, fep->hwp + FEC_X_CNTRL);
864 writel(0x0, fep->hwp + FEC_X_CNTRL);
868 writel(fep->phy_speed, fep->hwp + FEC_MII_SPEED);
870 #if !defined(CONFIG_M5272)
871 /* set RX checksum */
872 val = readl(fep->hwp + FEC_RACC);
873 if (fep->csum_flags & FLAG_RX_CSUM_ENABLED)
874 val |= FEC_RACC_OPTIONS;
876 val &= ~FEC_RACC_OPTIONS;
877 writel(val, fep->hwp + FEC_RACC);
881 * The phy interface and speed need to get configured
882 * differently on enet-mac.
884 if (id_entry->driver_data & FEC_QUIRK_ENET_MAC) {
885 /* Enable flow control and length check */
886 rcntl |= 0x40000000 | 0x00000020;
888 /* RGMII, RMII or MII */
889 if (fep->phy_interface == PHY_INTERFACE_MODE_RGMII)
891 else if (fep->phy_interface == PHY_INTERFACE_MODE_RMII)
896 /* 1G, 100M or 10M */
898 if (fep->phy_dev->speed == SPEED_1000)
900 else if (fep->phy_dev->speed == SPEED_100)
906 #ifdef FEC_MIIGSK_ENR
907 if (id_entry->driver_data & FEC_QUIRK_USE_GASKET) {
909 /* disable the gasket and wait */
910 writel(0, fep->hwp + FEC_MIIGSK_ENR);
911 while (readl(fep->hwp + FEC_MIIGSK_ENR) & 4)
915 * configure the gasket:
916 * RMII, 50 MHz, no loopback, no echo
917 * MII, 25 MHz, no loopback, no echo
919 cfgr = (fep->phy_interface == PHY_INTERFACE_MODE_RMII)
920 ? BM_MIIGSK_CFGR_RMII : BM_MIIGSK_CFGR_MII;
921 if (fep->phy_dev && fep->phy_dev->speed == SPEED_10)
922 cfgr |= BM_MIIGSK_CFGR_FRCONT_10M;
923 writel(cfgr, fep->hwp + FEC_MIIGSK_CFGR);
925 /* re-enable the gasket */
926 writel(2, fep->hwp + FEC_MIIGSK_ENR);
931 #if !defined(CONFIG_M5272)
932 /* enable pause frame*/
933 if ((fep->pause_flag & FEC_PAUSE_FLAG_ENABLE) ||
934 ((fep->pause_flag & FEC_PAUSE_FLAG_AUTONEG) &&
935 fep->phy_dev && fep->phy_dev->pause)) {
936 rcntl |= FEC_ENET_FCE;
938 /* set FIFO threshold parameter to reduce overrun */
939 writel(FEC_ENET_RSEM_V, fep->hwp + FEC_R_FIFO_RSEM);
940 writel(FEC_ENET_RSFL_V, fep->hwp + FEC_R_FIFO_RSFL);
941 writel(FEC_ENET_RAEM_V, fep->hwp + FEC_R_FIFO_RAEM);
942 writel(FEC_ENET_RAFL_V, fep->hwp + FEC_R_FIFO_RAFL);
945 writel(FEC_ENET_OPD_V, fep->hwp + FEC_OPD);
947 rcntl &= ~FEC_ENET_FCE;
949 #endif /* !defined(CONFIG_M5272) */
951 writel(rcntl, fep->hwp + FEC_R_CNTRL);
953 /* Setup multicast filter. */
954 set_multicast_list(ndev);
956 writel(0, fep->hwp + FEC_HASH_TABLE_HIGH);
957 writel(0, fep->hwp + FEC_HASH_TABLE_LOW);
960 if (id_entry->driver_data & FEC_QUIRK_ENET_MAC) {
961 /* enable ENET endian swap */
963 /* enable ENET store and forward mode */
964 writel(1 << 8, fep->hwp + FEC_X_WMRK);
971 /* Enable the MIB statistic event counters */
972 writel(0 << 31, fep->hwp + FEC_MIB_CTRLSTAT);
975 /* And last, enable the transmit and receive processing */
976 writel(ecntl, fep->hwp + FEC_ECNTRL);
977 writel(0, fep->hwp + FEC_R_DES_ACTIVE);
980 fec_ptp_start_cyclecounter(ndev);
982 /* Enable interrupts we wish to service */
983 writel(FEC_DEFAULT_IMASK, fep->hwp + FEC_IMASK);
987 fec_stop(struct net_device *ndev)
989 struct fec_enet_private *fep = netdev_priv(ndev);
990 const struct platform_device_id *id_entry =
991 platform_get_device_id(fep->pdev);
992 u32 rmii_mode = readl(fep->hwp + FEC_R_CNTRL) & (1 << 8);
994 /* We cannot expect a graceful transmit stop without link !!! */
996 writel(1, fep->hwp + FEC_X_CNTRL); /* Graceful transmit stop */
998 if (!(readl(fep->hwp + FEC_IEVENT) & FEC_ENET_GRA))
999 netdev_err(ndev, "Graceful transmit stop did not complete!\n");
1002 /* Whack a reset. We should wait for this. */
1003 writel(1, fep->hwp + FEC_ECNTRL);
1005 writel(fep->phy_speed, fep->hwp + FEC_MII_SPEED);
1006 writel(FEC_DEFAULT_IMASK, fep->hwp + FEC_IMASK);
1008 /* We have to keep ENET enabled to have MII interrupt stay working */
1009 if (id_entry->driver_data & FEC_QUIRK_ENET_MAC) {
1010 writel(2, fep->hwp + FEC_ECNTRL);
1011 writel(rmii_mode, fep->hwp + FEC_R_CNTRL);
1017 fec_timeout(struct net_device *ndev)
1019 struct fec_enet_private *fep = netdev_priv(ndev);
1021 ndev->stats.tx_errors++;
1023 schedule_work(&fep->tx_timeout_work);
1026 static void fec_enet_timeout_work(struct work_struct *work)
1028 struct fec_enet_private *fep =
1029 container_of(work, struct fec_enet_private, tx_timeout_work);
1030 struct net_device *ndev = fep->netdev;
1033 if (netif_device_present(ndev) || netif_running(ndev)) {
1034 napi_disable(&fep->napi);
1035 netif_tx_lock_bh(ndev);
1037 netif_wake_queue(ndev);
1038 netif_tx_unlock_bh(ndev);
1039 napi_enable(&fep->napi);
1045 fec_enet_tx(struct net_device *ndev)
1047 struct fec_enet_private *fep;
1048 struct bufdesc *bdp;
1049 unsigned short status;
1050 struct sk_buff *skb;
1054 fep = netdev_priv(ndev);
1055 bdp = fep->dirty_tx;
1057 /* get next bdp of dirty_tx */
1058 bdp = fec_enet_get_nextdesc(bdp, fep);
1060 while (((status = bdp->cbd_sc) & BD_ENET_TX_READY) == 0) {
1062 /* current queue is empty */
1063 if (bdp == fep->cur_tx)
1066 index = fec_enet_get_bd_index(fep->tx_bd_base, bdp, fep);
1068 skb = fep->tx_skbuff[index];
1069 fep->tx_skbuff[index] = NULL;
1070 if (!IS_TSO_HEADER(fep, bdp->cbd_bufaddr))
1071 dma_unmap_single(&fep->pdev->dev, bdp->cbd_bufaddr,
1072 bdp->cbd_datlen, DMA_TO_DEVICE);
1073 bdp->cbd_bufaddr = 0;
1075 bdp = fec_enet_get_nextdesc(bdp, fep);
1079 /* Check for errors. */
1080 if (status & (BD_ENET_TX_HB | BD_ENET_TX_LC |
1081 BD_ENET_TX_RL | BD_ENET_TX_UN |
1083 ndev->stats.tx_errors++;
1084 if (status & BD_ENET_TX_HB) /* No heartbeat */
1085 ndev->stats.tx_heartbeat_errors++;
1086 if (status & BD_ENET_TX_LC) /* Late collision */
1087 ndev->stats.tx_window_errors++;
1088 if (status & BD_ENET_TX_RL) /* Retrans limit */
1089 ndev->stats.tx_aborted_errors++;
1090 if (status & BD_ENET_TX_UN) /* Underrun */
1091 ndev->stats.tx_fifo_errors++;
1092 if (status & BD_ENET_TX_CSL) /* Carrier lost */
1093 ndev->stats.tx_carrier_errors++;
1095 ndev->stats.tx_packets++;
1096 ndev->stats.tx_bytes += skb->len;
1099 if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_IN_PROGRESS) &&
1101 struct skb_shared_hwtstamps shhwtstamps;
1102 unsigned long flags;
1103 struct bufdesc_ex *ebdp = (struct bufdesc_ex *)bdp;
1105 memset(&shhwtstamps, 0, sizeof(shhwtstamps));
1106 spin_lock_irqsave(&fep->tmreg_lock, flags);
1107 shhwtstamps.hwtstamp = ns_to_ktime(
1108 timecounter_cyc2time(&fep->tc, ebdp->ts));
1109 spin_unlock_irqrestore(&fep->tmreg_lock, flags);
1110 skb_tstamp_tx(skb, &shhwtstamps);
1113 if (status & BD_ENET_TX_READY)
1114 netdev_err(ndev, "HEY! Enet xmit interrupt and TX_READY\n");
1116 /* Deferred means some collisions occurred during transmit,
1117 * but we eventually sent the packet OK.
1119 if (status & BD_ENET_TX_DEF)
1120 ndev->stats.collisions++;
1122 /* Free the sk buffer associated with this last transmit */
1123 dev_kfree_skb_any(skb);
1125 fep->dirty_tx = bdp;
1127 /* Update pointer to next buffer descriptor to be transmitted */
1128 bdp = fec_enet_get_nextdesc(bdp, fep);
1130 /* Since we have freed up a buffer, the ring is no longer full
1132 if (netif_queue_stopped(ndev)) {
1133 entries_free = fec_enet_get_free_txdesc_num(fep);
1134 if (entries_free >= fep->tx_wake_threshold)
1135 netif_wake_queue(ndev);
1139 /* ERR006538: Keep the transmitter going */
1140 if (bdp != fep->cur_tx && readl(fep->hwp + FEC_X_DES_ACTIVE) == 0)
1141 writel(0, fep->hwp + FEC_X_DES_ACTIVE);
1144 /* During a receive, the cur_rx points to the current incoming buffer.
1145 * When we update through the ring, if the next incoming buffer has
1146 * not been given to the system, we just set the empty indicator,
1147 * effectively tossing the packet.
1150 fec_enet_rx(struct net_device *ndev, int budget)
1152 struct fec_enet_private *fep = netdev_priv(ndev);
1153 const struct platform_device_id *id_entry =
1154 platform_get_device_id(fep->pdev);
1155 struct bufdesc *bdp;
1156 unsigned short status;
1157 struct sk_buff *skb;
1160 int pkt_received = 0;
1161 struct bufdesc_ex *ebdp = NULL;
1162 bool vlan_packet_rcvd = false;
1170 /* First, grab all of the stats for the incoming packet.
1171 * These get messed up if we get called due to a busy condition.
1175 while (!((status = bdp->cbd_sc) & BD_ENET_RX_EMPTY)) {
1177 if (pkt_received >= budget)
1181 /* Since we have allocated space to hold a complete frame,
1182 * the last indicator should be set.
1184 if ((status & BD_ENET_RX_LAST) == 0)
1185 netdev_err(ndev, "rcv is not +last\n");
1187 /* Check for errors. */
1188 if (status & (BD_ENET_RX_LG | BD_ENET_RX_SH | BD_ENET_RX_NO |
1189 BD_ENET_RX_CR | BD_ENET_RX_OV)) {
1190 ndev->stats.rx_errors++;
1191 if (status & (BD_ENET_RX_LG | BD_ENET_RX_SH)) {
1192 /* Frame too long or too short. */
1193 ndev->stats.rx_length_errors++;
1195 if (status & BD_ENET_RX_NO) /* Frame alignment */
1196 ndev->stats.rx_frame_errors++;
1197 if (status & BD_ENET_RX_CR) /* CRC Error */
1198 ndev->stats.rx_crc_errors++;
1199 if (status & BD_ENET_RX_OV) /* FIFO overrun */
1200 ndev->stats.rx_fifo_errors++;
1203 /* Report late collisions as a frame error.
1204 * On this error, the BD is closed, but we don't know what we
1205 * have in the buffer. So, just drop this frame on the floor.
1207 if (status & BD_ENET_RX_CL) {
1208 ndev->stats.rx_errors++;
1209 ndev->stats.rx_frame_errors++;
1210 goto rx_processing_done;
1213 /* Process the incoming frame. */
1214 ndev->stats.rx_packets++;
1215 pkt_len = bdp->cbd_datlen;
1216 ndev->stats.rx_bytes += pkt_len;
1218 index = fec_enet_get_bd_index(fep->rx_bd_base, bdp, fep);
1219 data = fep->rx_skbuff[index]->data;
1220 dma_sync_single_for_cpu(&fep->pdev->dev, bdp->cbd_bufaddr,
1221 FEC_ENET_RX_FRSIZE, DMA_FROM_DEVICE);
1223 if (id_entry->driver_data & FEC_QUIRK_SWAP_FRAME)
1224 swap_buffer(data, pkt_len);
1226 /* Extract the enhanced buffer descriptor */
1228 if (fep->bufdesc_ex)
1229 ebdp = (struct bufdesc_ex *)bdp;
1231 /* If this is a VLAN packet remove the VLAN Tag */
1232 vlan_packet_rcvd = false;
1233 if ((ndev->features & NETIF_F_HW_VLAN_CTAG_RX) &&
1234 fep->bufdesc_ex && (ebdp->cbd_esc & BD_ENET_RX_VLAN)) {
1235 /* Push and remove the vlan tag */
1236 struct vlan_hdr *vlan_header =
1237 (struct vlan_hdr *) (data + ETH_HLEN);
1238 vlan_tag = ntohs(vlan_header->h_vlan_TCI);
1239 pkt_len -= VLAN_HLEN;
1241 vlan_packet_rcvd = true;
1244 /* This does 16 byte alignment, exactly what we need.
1245 * The packet length includes FCS, but we don't want to
1246 * include that when passing upstream as it messes up
1247 * bridging applications.
1249 skb = netdev_alloc_skb(ndev, pkt_len - 4 + NET_IP_ALIGN);
1251 if (unlikely(!skb)) {
1252 ndev->stats.rx_dropped++;
1254 int payload_offset = (2 * ETH_ALEN);
1255 skb_reserve(skb, NET_IP_ALIGN);
1256 skb_put(skb, pkt_len - 4); /* Make room */
1258 /* Extract the frame data without the VLAN header. */
1259 skb_copy_to_linear_data(skb, data, (2 * ETH_ALEN));
1260 if (vlan_packet_rcvd)
1261 payload_offset = (2 * ETH_ALEN) + VLAN_HLEN;
1262 skb_copy_to_linear_data_offset(skb, (2 * ETH_ALEN),
1263 data + payload_offset,
1264 pkt_len - 4 - (2 * ETH_ALEN));
1266 skb->protocol = eth_type_trans(skb, ndev);
1268 /* Get receive timestamp from the skb */
1269 if (fep->hwts_rx_en && fep->bufdesc_ex) {
1270 struct skb_shared_hwtstamps *shhwtstamps =
1272 unsigned long flags;
1274 memset(shhwtstamps, 0, sizeof(*shhwtstamps));
1276 spin_lock_irqsave(&fep->tmreg_lock, flags);
1277 shhwtstamps->hwtstamp = ns_to_ktime(
1278 timecounter_cyc2time(&fep->tc, ebdp->ts));
1279 spin_unlock_irqrestore(&fep->tmreg_lock, flags);
1282 if (fep->bufdesc_ex &&
1283 (fep->csum_flags & FLAG_RX_CSUM_ENABLED)) {
1284 if (!(ebdp->cbd_esc & FLAG_RX_CSUM_ERROR)) {
1285 /* don't check it */
1286 skb->ip_summed = CHECKSUM_UNNECESSARY;
1288 skb_checksum_none_assert(skb);
1292 /* Handle received VLAN packets */
1293 if (vlan_packet_rcvd)
1294 __vlan_hwaccel_put_tag(skb,
1298 napi_gro_receive(&fep->napi, skb);
1301 dma_sync_single_for_device(&fep->pdev->dev, bdp->cbd_bufaddr,
1302 FEC_ENET_RX_FRSIZE, DMA_FROM_DEVICE);
1304 /* Clear the status flags for this buffer */
1305 status &= ~BD_ENET_RX_STATS;
1307 /* Mark the buffer empty */
1308 status |= BD_ENET_RX_EMPTY;
1309 bdp->cbd_sc = status;
1311 if (fep->bufdesc_ex) {
1312 struct bufdesc_ex *ebdp = (struct bufdesc_ex *)bdp;
1314 ebdp->cbd_esc = BD_ENET_RX_INT;
1319 /* Update BD pointer to next entry */
1320 bdp = fec_enet_get_nextdesc(bdp, fep);
1322 /* Doing this here will keep the FEC running while we process
1323 * incoming frames. On a heavily loaded network, we should be
1324 * able to keep up at the expense of system resources.
1326 writel(0, fep->hwp + FEC_R_DES_ACTIVE);
1330 return pkt_received;
1334 fec_enet_interrupt(int irq, void *dev_id)
1336 struct net_device *ndev = dev_id;
1337 struct fec_enet_private *fep = netdev_priv(ndev);
1338 const unsigned napi_mask = FEC_ENET_RXF | FEC_ENET_TXF;
1340 irqreturn_t ret = IRQ_NONE;
1342 int_events = readl(fep->hwp + FEC_IEVENT);
1343 writel(int_events & ~napi_mask, fep->hwp + FEC_IEVENT);
1345 if (int_events & napi_mask) {
1348 /* Disable the NAPI interrupts */
1349 writel(FEC_ENET_MII, fep->hwp + FEC_IMASK);
1350 napi_schedule(&fep->napi);
1353 if (int_events & FEC_ENET_MII) {
1355 complete(&fep->mdio_done);
1361 static int fec_enet_rx_napi(struct napi_struct *napi, int budget)
1363 struct net_device *ndev = napi->dev;
1364 struct fec_enet_private *fep = netdev_priv(ndev);
1368 * Clear any pending transmit or receive interrupts before
1369 * processing the rings to avoid racing with the hardware.
1371 writel(FEC_ENET_RXF | FEC_ENET_TXF, fep->hwp + FEC_IEVENT);
1373 pkts = fec_enet_rx(ndev, budget);
1377 if (pkts < budget) {
1378 napi_complete(napi);
1379 writel(FEC_DEFAULT_IMASK, fep->hwp + FEC_IMASK);
1384 /* ------------------------------------------------------------------------- */
1385 static void fec_get_mac(struct net_device *ndev)
1387 struct fec_enet_private *fep = netdev_priv(ndev);
1388 struct fec_platform_data *pdata = dev_get_platdata(&fep->pdev->dev);
1389 unsigned char *iap, tmpaddr[ETH_ALEN];
1392 * try to get mac address in following order:
1394 * 1) module parameter via kernel command line in form
1395 * fec.macaddr=0x00,0x04,0x9f,0x01,0x30,0xe0
1400 * 2) from device tree data
1402 if (!is_valid_ether_addr(iap)) {
1403 struct device_node *np = fep->pdev->dev.of_node;
1405 const char *mac = of_get_mac_address(np);
1407 iap = (unsigned char *) mac;
1412 * 3) from flash or fuse (via platform data)
1414 if (!is_valid_ether_addr(iap)) {
1417 iap = (unsigned char *)FEC_FLASHMAC;
1420 iap = (unsigned char *)&pdata->mac;
1425 * 4) FEC mac registers set by bootloader
1427 if (!is_valid_ether_addr(iap)) {
1428 *((__be32 *) &tmpaddr[0]) =
1429 cpu_to_be32(readl(fep->hwp + FEC_ADDR_LOW));
1430 *((__be16 *) &tmpaddr[4]) =
1431 cpu_to_be16(readl(fep->hwp + FEC_ADDR_HIGH) >> 16);
1436 * 5) random mac address
1438 if (!is_valid_ether_addr(iap)) {
1439 /* Report it and use a random ethernet address instead */
1440 netdev_err(ndev, "Invalid MAC address: %pM\n", iap);
1441 eth_hw_addr_random(ndev);
1442 netdev_info(ndev, "Using random MAC address: %pM\n",
1447 memcpy(ndev->dev_addr, iap, ETH_ALEN);
1449 /* Adjust MAC if using macaddr */
1451 ndev->dev_addr[ETH_ALEN-1] = macaddr[ETH_ALEN-1] + fep->dev_id;
1454 /* ------------------------------------------------------------------------- */
1459 static void fec_enet_adjust_link(struct net_device *ndev)
1461 struct fec_enet_private *fep = netdev_priv(ndev);
1462 struct phy_device *phy_dev = fep->phy_dev;
1463 int status_change = 0;
1465 /* Prevent a state halted on mii error */
1466 if (fep->mii_timeout && phy_dev->state == PHY_HALTED) {
1467 phy_dev->state = PHY_RESUMING;
1472 * If the netdev is down, or is going down, we're not interested
1473 * in link state events, so just mark our idea of the link as down
1474 * and ignore the event.
1476 if (!netif_running(ndev) || !netif_device_present(ndev)) {
1478 } else if (phy_dev->link) {
1480 fep->link = phy_dev->link;
1484 if (fep->full_duplex != phy_dev->duplex) {
1485 fep->full_duplex = phy_dev->duplex;
1489 if (phy_dev->speed != fep->speed) {
1490 fep->speed = phy_dev->speed;
1494 /* if any of the above changed restart the FEC */
1495 if (status_change) {
1496 napi_disable(&fep->napi);
1497 netif_tx_lock_bh(ndev);
1499 netif_wake_queue(ndev);
1500 netif_tx_unlock_bh(ndev);
1501 napi_enable(&fep->napi);
1505 napi_disable(&fep->napi);
1506 netif_tx_lock_bh(ndev);
1508 netif_tx_unlock_bh(ndev);
1509 napi_enable(&fep->napi);
1510 fep->link = phy_dev->link;
1516 phy_print_status(phy_dev);
1519 static int fec_enet_mdio_read(struct mii_bus *bus, int mii_id, int regnum)
1521 struct fec_enet_private *fep = bus->priv;
1522 unsigned long time_left;
1524 fep->mii_timeout = 0;
1525 init_completion(&fep->mdio_done);
1527 /* start a read op */
1528 writel(FEC_MMFR_ST | FEC_MMFR_OP_READ |
1529 FEC_MMFR_PA(mii_id) | FEC_MMFR_RA(regnum) |
1530 FEC_MMFR_TA, fep->hwp + FEC_MII_DATA);
1532 /* wait for end of transfer */
1533 time_left = wait_for_completion_timeout(&fep->mdio_done,
1534 usecs_to_jiffies(FEC_MII_TIMEOUT));
1535 if (time_left == 0) {
1536 fep->mii_timeout = 1;
1537 netdev_err(fep->netdev, "MDIO read timeout\n");
1542 return FEC_MMFR_DATA(readl(fep->hwp + FEC_MII_DATA));
1545 static int fec_enet_mdio_write(struct mii_bus *bus, int mii_id, int regnum,
1548 struct fec_enet_private *fep = bus->priv;
1549 unsigned long time_left;
1551 fep->mii_timeout = 0;
1552 init_completion(&fep->mdio_done);
1554 /* start a write op */
1555 writel(FEC_MMFR_ST | FEC_MMFR_OP_WRITE |
1556 FEC_MMFR_PA(mii_id) | FEC_MMFR_RA(regnum) |
1557 FEC_MMFR_TA | FEC_MMFR_DATA(value),
1558 fep->hwp + FEC_MII_DATA);
1560 /* wait for end of transfer */
1561 time_left = wait_for_completion_timeout(&fep->mdio_done,
1562 usecs_to_jiffies(FEC_MII_TIMEOUT));
1563 if (time_left == 0) {
1564 fep->mii_timeout = 1;
1565 netdev_err(fep->netdev, "MDIO write timeout\n");
1572 static int fec_enet_clk_enable(struct net_device *ndev, bool enable)
1574 struct fec_enet_private *fep = netdev_priv(ndev);
1578 ret = clk_prepare_enable(fep->clk_ahb);
1581 ret = clk_prepare_enable(fep->clk_ipg);
1583 goto failed_clk_ipg;
1584 if (fep->clk_enet_out) {
1585 ret = clk_prepare_enable(fep->clk_enet_out);
1587 goto failed_clk_enet_out;
1590 ret = clk_prepare_enable(fep->clk_ptp);
1592 goto failed_clk_ptp;
1595 clk_disable_unprepare(fep->clk_ahb);
1596 clk_disable_unprepare(fep->clk_ipg);
1597 if (fep->clk_enet_out)
1598 clk_disable_unprepare(fep->clk_enet_out);
1600 clk_disable_unprepare(fep->clk_ptp);
1605 if (fep->clk_enet_out)
1606 clk_disable_unprepare(fep->clk_enet_out);
1607 failed_clk_enet_out:
1608 clk_disable_unprepare(fep->clk_ipg);
1610 clk_disable_unprepare(fep->clk_ahb);
1615 static int fec_enet_mii_probe(struct net_device *ndev)
1617 struct fec_enet_private *fep = netdev_priv(ndev);
1618 const struct platform_device_id *id_entry =
1619 platform_get_device_id(fep->pdev);
1620 struct phy_device *phy_dev = NULL;
1621 char mdio_bus_id[MII_BUS_ID_SIZE];
1622 char phy_name[MII_BUS_ID_SIZE + 3];
1624 int dev_id = fep->dev_id;
1626 fep->phy_dev = NULL;
1628 /* check for attached phy */
1629 for (phy_id = 0; (phy_id < PHY_MAX_ADDR); phy_id++) {
1630 if ((fep->mii_bus->phy_mask & (1 << phy_id)))
1632 if (fep->mii_bus->phy_map[phy_id] == NULL)
1634 if (fep->mii_bus->phy_map[phy_id]->phy_id == 0)
1638 strncpy(mdio_bus_id, fep->mii_bus->id, MII_BUS_ID_SIZE);
1642 if (phy_id >= PHY_MAX_ADDR) {
1643 netdev_info(ndev, "no PHY, assuming direct connection to switch\n");
1644 strncpy(mdio_bus_id, "fixed-0", MII_BUS_ID_SIZE);
1648 snprintf(phy_name, sizeof(phy_name), PHY_ID_FMT, mdio_bus_id, phy_id);
1649 phy_dev = phy_connect(ndev, phy_name, &fec_enet_adjust_link,
1650 fep->phy_interface);
1651 if (IS_ERR(phy_dev)) {
1652 netdev_err(ndev, "could not attach to PHY\n");
1653 return PTR_ERR(phy_dev);
1656 /* mask with MAC supported features */
1657 if (id_entry->driver_data & FEC_QUIRK_HAS_GBIT) {
1658 phy_dev->supported &= PHY_GBIT_FEATURES;
1659 phy_dev->supported &= ~SUPPORTED_1000baseT_Half;
1660 #if !defined(CONFIG_M5272)
1661 phy_dev->supported |= SUPPORTED_Pause;
1665 phy_dev->supported &= PHY_BASIC_FEATURES;
1667 phy_dev->advertising = phy_dev->supported;
1669 fep->phy_dev = phy_dev;
1671 fep->full_duplex = 0;
1673 netdev_info(ndev, "Freescale FEC PHY driver [%s] (mii_bus:phy_addr=%s, irq=%d)\n",
1674 fep->phy_dev->drv->name, dev_name(&fep->phy_dev->dev),
1680 static int fec_enet_mii_init(struct platform_device *pdev)
1682 static struct mii_bus *fec0_mii_bus;
1683 struct net_device *ndev = platform_get_drvdata(pdev);
1684 struct fec_enet_private *fep = netdev_priv(ndev);
1685 const struct platform_device_id *id_entry =
1686 platform_get_device_id(fep->pdev);
1687 int err = -ENXIO, i;
1690 * The dual fec interfaces are not equivalent with enet-mac.
1691 * Here are the differences:
1693 * - fec0 supports MII & RMII modes while fec1 only supports RMII
1694 * - fec0 acts as the 1588 time master while fec1 is slave
1695 * - external phys can only be configured by fec0
1697 * That is to say fec1 can not work independently. It only works
1698 * when fec0 is working. The reason behind this design is that the
1699 * second interface is added primarily for Switch mode.
1701 * Because of the last point above, both phys are attached on fec0
1702 * mdio interface in board design, and need to be configured by
1705 if ((id_entry->driver_data & FEC_QUIRK_ENET_MAC) && fep->dev_id > 0) {
1706 /* fec1 uses fec0 mii_bus */
1707 if (mii_cnt && fec0_mii_bus) {
1708 fep->mii_bus = fec0_mii_bus;
1715 fep->mii_timeout = 0;
1718 * Set MII speed to 2.5 MHz (= clk_get_rate() / 2 * phy_speed)
1720 * The formula for FEC MDC is 'ref_freq / (MII_SPEED x 2)' while
1721 * for ENET-MAC is 'ref_freq / ((MII_SPEED + 1) x 2)'. The i.MX28
1722 * Reference Manual has an error on this, and gets fixed on i.MX6Q
1725 fep->phy_speed = DIV_ROUND_UP(clk_get_rate(fep->clk_ipg), 5000000);
1726 if (id_entry->driver_data & FEC_QUIRK_ENET_MAC)
1728 fep->phy_speed <<= 1;
1729 writel(fep->phy_speed, fep->hwp + FEC_MII_SPEED);
1731 fep->mii_bus = mdiobus_alloc();
1732 if (fep->mii_bus == NULL) {
1737 fep->mii_bus->name = "fec_enet_mii_bus";
1738 fep->mii_bus->read = fec_enet_mdio_read;
1739 fep->mii_bus->write = fec_enet_mdio_write;
1740 snprintf(fep->mii_bus->id, MII_BUS_ID_SIZE, "%s-%x",
1741 pdev->name, fep->dev_id + 1);
1742 fep->mii_bus->priv = fep;
1743 fep->mii_bus->parent = &pdev->dev;
1745 fep->mii_bus->irq = kmalloc(sizeof(int) * PHY_MAX_ADDR, GFP_KERNEL);
1746 if (!fep->mii_bus->irq) {
1748 goto err_out_free_mdiobus;
1751 for (i = 0; i < PHY_MAX_ADDR; i++)
1752 fep->mii_bus->irq[i] = PHY_POLL;
1754 if (mdiobus_register(fep->mii_bus))
1755 goto err_out_free_mdio_irq;
1759 /* save fec0 mii_bus */
1760 if (id_entry->driver_data & FEC_QUIRK_ENET_MAC)
1761 fec0_mii_bus = fep->mii_bus;
1765 err_out_free_mdio_irq:
1766 kfree(fep->mii_bus->irq);
1767 err_out_free_mdiobus:
1768 mdiobus_free(fep->mii_bus);
1773 static void fec_enet_mii_remove(struct fec_enet_private *fep)
1775 if (--mii_cnt == 0) {
1776 mdiobus_unregister(fep->mii_bus);
1777 kfree(fep->mii_bus->irq);
1778 mdiobus_free(fep->mii_bus);
1782 static int fec_enet_get_settings(struct net_device *ndev,
1783 struct ethtool_cmd *cmd)
1785 struct fec_enet_private *fep = netdev_priv(ndev);
1786 struct phy_device *phydev = fep->phy_dev;
1791 return phy_ethtool_gset(phydev, cmd);
1794 static int fec_enet_set_settings(struct net_device *ndev,
1795 struct ethtool_cmd *cmd)
1797 struct fec_enet_private *fep = netdev_priv(ndev);
1798 struct phy_device *phydev = fep->phy_dev;
1803 return phy_ethtool_sset(phydev, cmd);
1806 static void fec_enet_get_drvinfo(struct net_device *ndev,
1807 struct ethtool_drvinfo *info)
1809 struct fec_enet_private *fep = netdev_priv(ndev);
1811 strlcpy(info->driver, fep->pdev->dev.driver->name,
1812 sizeof(info->driver));
1813 strlcpy(info->version, "Revision: 1.0", sizeof(info->version));
1814 strlcpy(info->bus_info, dev_name(&ndev->dev), sizeof(info->bus_info));
1817 static int fec_enet_get_ts_info(struct net_device *ndev,
1818 struct ethtool_ts_info *info)
1820 struct fec_enet_private *fep = netdev_priv(ndev);
1822 if (fep->bufdesc_ex) {
1824 info->so_timestamping = SOF_TIMESTAMPING_TX_SOFTWARE |
1825 SOF_TIMESTAMPING_RX_SOFTWARE |
1826 SOF_TIMESTAMPING_SOFTWARE |
1827 SOF_TIMESTAMPING_TX_HARDWARE |
1828 SOF_TIMESTAMPING_RX_HARDWARE |
1829 SOF_TIMESTAMPING_RAW_HARDWARE;
1831 info->phc_index = ptp_clock_index(fep->ptp_clock);
1833 info->phc_index = -1;
1835 info->tx_types = (1 << HWTSTAMP_TX_OFF) |
1836 (1 << HWTSTAMP_TX_ON);
1838 info->rx_filters = (1 << HWTSTAMP_FILTER_NONE) |
1839 (1 << HWTSTAMP_FILTER_ALL);
1842 return ethtool_op_get_ts_info(ndev, info);
1846 #if !defined(CONFIG_M5272)
1848 static void fec_enet_get_pauseparam(struct net_device *ndev,
1849 struct ethtool_pauseparam *pause)
1851 struct fec_enet_private *fep = netdev_priv(ndev);
1853 pause->autoneg = (fep->pause_flag & FEC_PAUSE_FLAG_AUTONEG) != 0;
1854 pause->tx_pause = (fep->pause_flag & FEC_PAUSE_FLAG_ENABLE) != 0;
1855 pause->rx_pause = pause->tx_pause;
1858 static int fec_enet_set_pauseparam(struct net_device *ndev,
1859 struct ethtool_pauseparam *pause)
1861 struct fec_enet_private *fep = netdev_priv(ndev);
1866 if (pause->tx_pause != pause->rx_pause) {
1868 "hardware only support enable/disable both tx and rx");
1872 fep->pause_flag = 0;
1874 /* tx pause must be same as rx pause */
1875 fep->pause_flag |= pause->rx_pause ? FEC_PAUSE_FLAG_ENABLE : 0;
1876 fep->pause_flag |= pause->autoneg ? FEC_PAUSE_FLAG_AUTONEG : 0;
1878 if (pause->rx_pause || pause->autoneg) {
1879 fep->phy_dev->supported |= ADVERTISED_Pause;
1880 fep->phy_dev->advertising |= ADVERTISED_Pause;
1882 fep->phy_dev->supported &= ~ADVERTISED_Pause;
1883 fep->phy_dev->advertising &= ~ADVERTISED_Pause;
1886 if (pause->autoneg) {
1887 if (netif_running(ndev))
1889 phy_start_aneg(fep->phy_dev);
1891 if (netif_running(ndev)) {
1892 napi_disable(&fep->napi);
1893 netif_tx_lock_bh(ndev);
1895 netif_wake_queue(ndev);
1896 netif_tx_unlock_bh(ndev);
1897 napi_enable(&fep->napi);
1903 static const struct fec_stat {
1904 char name[ETH_GSTRING_LEN];
1908 { "tx_dropped", RMON_T_DROP },
1909 { "tx_packets", RMON_T_PACKETS },
1910 { "tx_broadcast", RMON_T_BC_PKT },
1911 { "tx_multicast", RMON_T_MC_PKT },
1912 { "tx_crc_errors", RMON_T_CRC_ALIGN },
1913 { "tx_undersize", RMON_T_UNDERSIZE },
1914 { "tx_oversize", RMON_T_OVERSIZE },
1915 { "tx_fragment", RMON_T_FRAG },
1916 { "tx_jabber", RMON_T_JAB },
1917 { "tx_collision", RMON_T_COL },
1918 { "tx_64byte", RMON_T_P64 },
1919 { "tx_65to127byte", RMON_T_P65TO127 },
1920 { "tx_128to255byte", RMON_T_P128TO255 },
1921 { "tx_256to511byte", RMON_T_P256TO511 },
1922 { "tx_512to1023byte", RMON_T_P512TO1023 },
1923 { "tx_1024to2047byte", RMON_T_P1024TO2047 },
1924 { "tx_GTE2048byte", RMON_T_P_GTE2048 },
1925 { "tx_octets", RMON_T_OCTETS },
1928 { "IEEE_tx_drop", IEEE_T_DROP },
1929 { "IEEE_tx_frame_ok", IEEE_T_FRAME_OK },
1930 { "IEEE_tx_1col", IEEE_T_1COL },
1931 { "IEEE_tx_mcol", IEEE_T_MCOL },
1932 { "IEEE_tx_def", IEEE_T_DEF },
1933 { "IEEE_tx_lcol", IEEE_T_LCOL },
1934 { "IEEE_tx_excol", IEEE_T_EXCOL },
1935 { "IEEE_tx_macerr", IEEE_T_MACERR },
1936 { "IEEE_tx_cserr", IEEE_T_CSERR },
1937 { "IEEE_tx_sqe", IEEE_T_SQE },
1938 { "IEEE_tx_fdxfc", IEEE_T_FDXFC },
1939 { "IEEE_tx_octets_ok", IEEE_T_OCTETS_OK },
1942 { "rx_packets", RMON_R_PACKETS },
1943 { "rx_broadcast", RMON_R_BC_PKT },
1944 { "rx_multicast", RMON_R_MC_PKT },
1945 { "rx_crc_errors", RMON_R_CRC_ALIGN },
1946 { "rx_undersize", RMON_R_UNDERSIZE },
1947 { "rx_oversize", RMON_R_OVERSIZE },
1948 { "rx_fragment", RMON_R_FRAG },
1949 { "rx_jabber", RMON_R_JAB },
1950 { "rx_64byte", RMON_R_P64 },
1951 { "rx_65to127byte", RMON_R_P65TO127 },
1952 { "rx_128to255byte", RMON_R_P128TO255 },
1953 { "rx_256to511byte", RMON_R_P256TO511 },
1954 { "rx_512to1023byte", RMON_R_P512TO1023 },
1955 { "rx_1024to2047byte", RMON_R_P1024TO2047 },
1956 { "rx_GTE2048byte", RMON_R_P_GTE2048 },
1957 { "rx_octets", RMON_R_OCTETS },
1960 { "IEEE_rx_drop", IEEE_R_DROP },
1961 { "IEEE_rx_frame_ok", IEEE_R_FRAME_OK },
1962 { "IEEE_rx_crc", IEEE_R_CRC },
1963 { "IEEE_rx_align", IEEE_R_ALIGN },
1964 { "IEEE_rx_macerr", IEEE_R_MACERR },
1965 { "IEEE_rx_fdxfc", IEEE_R_FDXFC },
1966 { "IEEE_rx_octets_ok", IEEE_R_OCTETS_OK },
1969 static void fec_enet_get_ethtool_stats(struct net_device *dev,
1970 struct ethtool_stats *stats, u64 *data)
1972 struct fec_enet_private *fep = netdev_priv(dev);
1975 for (i = 0; i < ARRAY_SIZE(fec_stats); i++)
1976 data[i] = readl(fep->hwp + fec_stats[i].offset);
1979 static void fec_enet_get_strings(struct net_device *netdev,
1980 u32 stringset, u8 *data)
1983 switch (stringset) {
1985 for (i = 0; i < ARRAY_SIZE(fec_stats); i++)
1986 memcpy(data + i * ETH_GSTRING_LEN,
1987 fec_stats[i].name, ETH_GSTRING_LEN);
1992 static int fec_enet_get_sset_count(struct net_device *dev, int sset)
1996 return ARRAY_SIZE(fec_stats);
2001 #endif /* !defined(CONFIG_M5272) */
2003 static int fec_enet_nway_reset(struct net_device *dev)
2005 struct fec_enet_private *fep = netdev_priv(dev);
2006 struct phy_device *phydev = fep->phy_dev;
2011 return genphy_restart_aneg(phydev);
2014 static const struct ethtool_ops fec_enet_ethtool_ops = {
2015 #if !defined(CONFIG_M5272)
2016 .get_pauseparam = fec_enet_get_pauseparam,
2017 .set_pauseparam = fec_enet_set_pauseparam,
2019 .get_settings = fec_enet_get_settings,
2020 .set_settings = fec_enet_set_settings,
2021 .get_drvinfo = fec_enet_get_drvinfo,
2022 .get_link = ethtool_op_get_link,
2023 .get_ts_info = fec_enet_get_ts_info,
2024 .nway_reset = fec_enet_nway_reset,
2025 #ifndef CONFIG_M5272
2026 .get_ethtool_stats = fec_enet_get_ethtool_stats,
2027 .get_strings = fec_enet_get_strings,
2028 .get_sset_count = fec_enet_get_sset_count,
2032 static int fec_enet_ioctl(struct net_device *ndev, struct ifreq *rq, int cmd)
2034 struct fec_enet_private *fep = netdev_priv(ndev);
2035 struct phy_device *phydev = fep->phy_dev;
2037 if (!netif_running(ndev))
2043 if (fep->bufdesc_ex) {
2044 if (cmd == SIOCSHWTSTAMP)
2045 return fec_ptp_set(ndev, rq);
2046 if (cmd == SIOCGHWTSTAMP)
2047 return fec_ptp_get(ndev, rq);
2050 return phy_mii_ioctl(phydev, rq, cmd);
2053 static void fec_enet_free_buffers(struct net_device *ndev)
2055 struct fec_enet_private *fep = netdev_priv(ndev);
2057 struct sk_buff *skb;
2058 struct bufdesc *bdp;
2060 bdp = fep->rx_bd_base;
2061 for (i = 0; i < fep->rx_ring_size; i++) {
2062 skb = fep->rx_skbuff[i];
2063 fep->rx_skbuff[i] = NULL;
2065 dma_unmap_single(&fep->pdev->dev, bdp->cbd_bufaddr,
2066 FEC_ENET_RX_FRSIZE, DMA_FROM_DEVICE);
2069 bdp = fec_enet_get_nextdesc(bdp, fep);
2072 bdp = fep->tx_bd_base;
2073 for (i = 0; i < fep->tx_ring_size; i++) {
2074 kfree(fep->tx_bounce[i]);
2075 fep->tx_bounce[i] = NULL;
2076 skb = fep->tx_skbuff[i];
2077 fep->tx_skbuff[i] = NULL;
2082 static int fec_enet_alloc_buffers(struct net_device *ndev)
2084 struct fec_enet_private *fep = netdev_priv(ndev);
2086 struct sk_buff *skb;
2087 struct bufdesc *bdp;
2089 bdp = fep->rx_bd_base;
2090 for (i = 0; i < fep->rx_ring_size; i++) {
2093 skb = netdev_alloc_skb(ndev, FEC_ENET_RX_FRSIZE);
2097 addr = dma_map_single(&fep->pdev->dev, skb->data,
2098 FEC_ENET_RX_FRSIZE, DMA_FROM_DEVICE);
2099 if (dma_mapping_error(&fep->pdev->dev, addr)) {
2101 if (net_ratelimit())
2102 netdev_err(ndev, "Rx DMA memory map failed\n");
2106 fep->rx_skbuff[i] = skb;
2107 bdp->cbd_bufaddr = addr;
2108 bdp->cbd_sc = BD_ENET_RX_EMPTY;
2110 if (fep->bufdesc_ex) {
2111 struct bufdesc_ex *ebdp = (struct bufdesc_ex *)bdp;
2112 ebdp->cbd_esc = BD_ENET_RX_INT;
2115 bdp = fec_enet_get_nextdesc(bdp, fep);
2118 /* Set the last buffer to wrap. */
2119 bdp = fec_enet_get_prevdesc(bdp, fep);
2120 bdp->cbd_sc |= BD_SC_WRAP;
2122 bdp = fep->tx_bd_base;
2123 for (i = 0; i < fep->tx_ring_size; i++) {
2124 fep->tx_bounce[i] = kmalloc(FEC_ENET_TX_FRSIZE, GFP_KERNEL);
2125 if (!fep->tx_bounce[i])
2129 bdp->cbd_bufaddr = 0;
2131 if (fep->bufdesc_ex) {
2132 struct bufdesc_ex *ebdp = (struct bufdesc_ex *)bdp;
2133 ebdp->cbd_esc = BD_ENET_TX_INT;
2136 bdp = fec_enet_get_nextdesc(bdp, fep);
2139 /* Set the last buffer to wrap. */
2140 bdp = fec_enet_get_prevdesc(bdp, fep);
2141 bdp->cbd_sc |= BD_SC_WRAP;
2146 fec_enet_free_buffers(ndev);
2151 fec_enet_open(struct net_device *ndev)
2153 struct fec_enet_private *fep = netdev_priv(ndev);
2156 pinctrl_pm_select_default_state(&fep->pdev->dev);
2157 ret = fec_enet_clk_enable(ndev, true);
2161 /* I should reset the ring buffers here, but I don't yet know
2162 * a simple way to do that.
2165 ret = fec_enet_alloc_buffers(ndev);
2169 /* Probe and connect to PHY when open the interface */
2170 ret = fec_enet_mii_probe(ndev);
2172 fec_enet_free_buffers(ndev);
2177 napi_enable(&fep->napi);
2178 phy_start(fep->phy_dev);
2179 netif_start_queue(ndev);
2184 fec_enet_close(struct net_device *ndev)
2186 struct fec_enet_private *fep = netdev_priv(ndev);
2188 phy_stop(fep->phy_dev);
2190 if (netif_device_present(ndev)) {
2191 napi_disable(&fep->napi);
2192 netif_tx_disable(ndev);
2196 phy_disconnect(fep->phy_dev);
2197 fep->phy_dev = NULL;
2199 fec_enet_clk_enable(ndev, false);
2200 pinctrl_pm_select_sleep_state(&fep->pdev->dev);
2201 fec_enet_free_buffers(ndev);
2206 /* Set or clear the multicast filter for this adaptor.
2207 * Skeleton taken from sunlance driver.
2208 * The CPM Ethernet implementation allows Multicast as well as individual
2209 * MAC address filtering. Some of the drivers check to make sure it is
2210 * a group multicast address, and discard those that are not. I guess I
2211 * will do the same for now, but just remove the test if you want
2212 * individual filtering as well (do the upper net layers want or support
2213 * this kind of feature?).
2216 #define HASH_BITS 6 /* #bits in hash */
2217 #define CRC32_POLY 0xEDB88320
2219 static void set_multicast_list(struct net_device *ndev)
2221 struct fec_enet_private *fep = netdev_priv(ndev);
2222 struct netdev_hw_addr *ha;
2223 unsigned int i, bit, data, crc, tmp;
2226 if (ndev->flags & IFF_PROMISC) {
2227 tmp = readl(fep->hwp + FEC_R_CNTRL);
2229 writel(tmp, fep->hwp + FEC_R_CNTRL);
2233 tmp = readl(fep->hwp + FEC_R_CNTRL);
2235 writel(tmp, fep->hwp + FEC_R_CNTRL);
2237 if (ndev->flags & IFF_ALLMULTI) {
2238 /* Catch all multicast addresses, so set the
2241 writel(0xffffffff, fep->hwp + FEC_GRP_HASH_TABLE_HIGH);
2242 writel(0xffffffff, fep->hwp + FEC_GRP_HASH_TABLE_LOW);
2247 /* Clear filter and add the addresses in hash register
2249 writel(0, fep->hwp + FEC_GRP_HASH_TABLE_HIGH);
2250 writel(0, fep->hwp + FEC_GRP_HASH_TABLE_LOW);
2252 netdev_for_each_mc_addr(ha, ndev) {
2253 /* calculate crc32 value of mac address */
2256 for (i = 0; i < ndev->addr_len; i++) {
2258 for (bit = 0; bit < 8; bit++, data >>= 1) {
2260 (((crc ^ data) & 1) ? CRC32_POLY : 0);
2264 /* only upper 6 bits (HASH_BITS) are used
2265 * which point to specific bit in he hash registers
2267 hash = (crc >> (32 - HASH_BITS)) & 0x3f;
2270 tmp = readl(fep->hwp + FEC_GRP_HASH_TABLE_HIGH);
2271 tmp |= 1 << (hash - 32);
2272 writel(tmp, fep->hwp + FEC_GRP_HASH_TABLE_HIGH);
2274 tmp = readl(fep->hwp + FEC_GRP_HASH_TABLE_LOW);
2276 writel(tmp, fep->hwp + FEC_GRP_HASH_TABLE_LOW);
2281 /* Set a MAC change in hardware. */
2283 fec_set_mac_address(struct net_device *ndev, void *p)
2285 struct fec_enet_private *fep = netdev_priv(ndev);
2286 struct sockaddr *addr = p;
2289 if (!is_valid_ether_addr(addr->sa_data))
2290 return -EADDRNOTAVAIL;
2291 memcpy(ndev->dev_addr, addr->sa_data, ndev->addr_len);
2294 writel(ndev->dev_addr[3] | (ndev->dev_addr[2] << 8) |
2295 (ndev->dev_addr[1] << 16) | (ndev->dev_addr[0] << 24),
2296 fep->hwp + FEC_ADDR_LOW);
2297 writel((ndev->dev_addr[5] << 16) | (ndev->dev_addr[4] << 24),
2298 fep->hwp + FEC_ADDR_HIGH);
2302 #ifdef CONFIG_NET_POLL_CONTROLLER
2304 * fec_poll_controller - FEC Poll controller function
2305 * @dev: The FEC network adapter
2307 * Polled functionality used by netconsole and others in non interrupt mode
2310 static void fec_poll_controller(struct net_device *dev)
2313 struct fec_enet_private *fep = netdev_priv(dev);
2315 for (i = 0; i < FEC_IRQ_NUM; i++) {
2316 if (fep->irq[i] > 0) {
2317 disable_irq(fep->irq[i]);
2318 fec_enet_interrupt(fep->irq[i], dev);
2319 enable_irq(fep->irq[i]);
2325 #define FEATURES_NEED_QUIESCE NETIF_F_RXCSUM
2327 static int fec_set_features(struct net_device *netdev,
2328 netdev_features_t features)
2330 struct fec_enet_private *fep = netdev_priv(netdev);
2331 netdev_features_t changed = features ^ netdev->features;
2333 /* Quiesce the device if necessary */
2334 if (netif_running(netdev) && changed & FEATURES_NEED_QUIESCE) {
2335 napi_disable(&fep->napi);
2336 netif_tx_lock_bh(netdev);
2340 netdev->features = features;
2342 /* Receive checksum has been changed */
2343 if (changed & NETIF_F_RXCSUM) {
2344 if (features & NETIF_F_RXCSUM)
2345 fep->csum_flags |= FLAG_RX_CSUM_ENABLED;
2347 fep->csum_flags &= ~FLAG_RX_CSUM_ENABLED;
2350 /* Resume the device after updates */
2351 if (netif_running(netdev) && changed & FEATURES_NEED_QUIESCE) {
2352 fec_restart(netdev);
2353 netif_wake_queue(netdev);
2354 netif_tx_unlock_bh(netdev);
2355 napi_enable(&fep->napi);
2361 static const struct net_device_ops fec_netdev_ops = {
2362 .ndo_open = fec_enet_open,
2363 .ndo_stop = fec_enet_close,
2364 .ndo_start_xmit = fec_enet_start_xmit,
2365 .ndo_set_rx_mode = set_multicast_list,
2366 .ndo_change_mtu = eth_change_mtu,
2367 .ndo_validate_addr = eth_validate_addr,
2368 .ndo_tx_timeout = fec_timeout,
2369 .ndo_set_mac_address = fec_set_mac_address,
2370 .ndo_do_ioctl = fec_enet_ioctl,
2371 #ifdef CONFIG_NET_POLL_CONTROLLER
2372 .ndo_poll_controller = fec_poll_controller,
2374 .ndo_set_features = fec_set_features,
2378 * XXX: We need to clean up on failure exits here.
2381 static int fec_enet_init(struct net_device *ndev)
2383 struct fec_enet_private *fep = netdev_priv(ndev);
2384 const struct platform_device_id *id_entry =
2385 platform_get_device_id(fep->pdev);
2386 struct bufdesc *cbd_base;
2389 /* init the tx & rx ring size */
2390 fep->tx_ring_size = TX_RING_SIZE;
2391 fep->rx_ring_size = RX_RING_SIZE;
2393 fep->tx_stop_threshold = FEC_MAX_SKB_DESCS;
2394 fep->tx_wake_threshold = (fep->tx_ring_size - fep->tx_stop_threshold) / 2;
2396 if (fep->bufdesc_ex)
2397 fep->bufdesc_size = sizeof(struct bufdesc_ex);
2399 fep->bufdesc_size = sizeof(struct bufdesc);
2400 bd_size = (fep->tx_ring_size + fep->rx_ring_size) *
2403 /* Allocate memory for buffer descriptors. */
2404 cbd_base = dma_alloc_coherent(NULL, bd_size, &fep->bd_dma,
2409 fep->tso_hdrs = dma_alloc_coherent(NULL, fep->tx_ring_size * TSO_HEADER_SIZE,
2410 &fep->tso_hdrs_dma, GFP_KERNEL);
2411 if (!fep->tso_hdrs) {
2412 dma_free_coherent(NULL, bd_size, cbd_base, fep->bd_dma);
2416 memset(cbd_base, 0, PAGE_SIZE);
2420 /* Get the Ethernet address */
2422 /* make sure MAC we just acquired is programmed into the hw */
2423 fec_set_mac_address(ndev, NULL);
2425 /* Set receive and transmit descriptor base. */
2426 fep->rx_bd_base = cbd_base;
2427 if (fep->bufdesc_ex)
2428 fep->tx_bd_base = (struct bufdesc *)
2429 (((struct bufdesc_ex *)cbd_base) + fep->rx_ring_size);
2431 fep->tx_bd_base = cbd_base + fep->rx_ring_size;
2433 /* The FEC Ethernet specific entries in the device structure */
2434 ndev->watchdog_timeo = TX_TIMEOUT;
2435 ndev->netdev_ops = &fec_netdev_ops;
2436 ndev->ethtool_ops = &fec_enet_ethtool_ops;
2438 writel(FEC_RX_DISABLED_IMASK, fep->hwp + FEC_IMASK);
2439 netif_napi_add(ndev, &fep->napi, fec_enet_rx_napi, NAPI_POLL_WEIGHT);
2441 if (id_entry->driver_data & FEC_QUIRK_HAS_VLAN)
2442 /* enable hw VLAN support */
2443 ndev->features |= NETIF_F_HW_VLAN_CTAG_RX;
2445 if (id_entry->driver_data & FEC_QUIRK_HAS_CSUM) {
2446 ndev->gso_max_segs = FEC_MAX_TSO_SEGS;
2448 /* enable hw accelerator */
2449 ndev->features |= (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM
2450 | NETIF_F_RXCSUM | NETIF_F_SG | NETIF_F_TSO);
2451 fep->csum_flags |= FLAG_RX_CSUM_ENABLED;
2454 ndev->hw_features = ndev->features;
2462 static void fec_reset_phy(struct platform_device *pdev)
2466 struct device_node *np = pdev->dev.of_node;
2471 of_property_read_u32(np, "phy-reset-duration", &msec);
2472 /* A sane reset duration should not be longer than 1s */
2476 phy_reset = of_get_named_gpio(np, "phy-reset-gpios", 0);
2477 if (!gpio_is_valid(phy_reset))
2480 err = devm_gpio_request_one(&pdev->dev, phy_reset,
2481 GPIOF_OUT_INIT_LOW, "phy-reset");
2483 dev_err(&pdev->dev, "failed to get phy-reset-gpios: %d\n", err);
2487 gpio_set_value(phy_reset, 1);
2489 #else /* CONFIG_OF */
2490 static void fec_reset_phy(struct platform_device *pdev)
2493 * In case of platform probe, the reset has been done
2497 #endif /* CONFIG_OF */
2500 fec_probe(struct platform_device *pdev)
2502 struct fec_enet_private *fep;
2503 struct fec_platform_data *pdata;
2504 struct net_device *ndev;
2505 int i, irq, ret = 0;
2507 const struct of_device_id *of_id;
2510 of_id = of_match_device(fec_dt_ids, &pdev->dev);
2512 pdev->id_entry = of_id->data;
2514 /* Init network device */
2515 ndev = alloc_etherdev(sizeof(struct fec_enet_private));
2519 SET_NETDEV_DEV(ndev, &pdev->dev);
2521 /* setup board info structure */
2522 fep = netdev_priv(ndev);
2524 #if !defined(CONFIG_M5272)
2525 /* default enable pause frame auto negotiation */
2526 if (pdev->id_entry &&
2527 (pdev->id_entry->driver_data & FEC_QUIRK_HAS_GBIT))
2528 fep->pause_flag |= FEC_PAUSE_FLAG_AUTONEG;
2531 /* Select default pin state */
2532 pinctrl_pm_select_default_state(&pdev->dev);
2534 r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2535 fep->hwp = devm_ioremap_resource(&pdev->dev, r);
2536 if (IS_ERR(fep->hwp)) {
2537 ret = PTR_ERR(fep->hwp);
2538 goto failed_ioremap;
2542 fep->dev_id = dev_id++;
2544 fep->bufdesc_ex = 0;
2546 platform_set_drvdata(pdev, ndev);
2548 ret = of_get_phy_mode(pdev->dev.of_node);
2550 pdata = dev_get_platdata(&pdev->dev);
2552 fep->phy_interface = pdata->phy;
2554 fep->phy_interface = PHY_INTERFACE_MODE_MII;
2556 fep->phy_interface = ret;
2559 fep->clk_ipg = devm_clk_get(&pdev->dev, "ipg");
2560 if (IS_ERR(fep->clk_ipg)) {
2561 ret = PTR_ERR(fep->clk_ipg);
2565 fep->clk_ahb = devm_clk_get(&pdev->dev, "ahb");
2566 if (IS_ERR(fep->clk_ahb)) {
2567 ret = PTR_ERR(fep->clk_ahb);
2571 /* enet_out is optional, depends on board */
2572 fep->clk_enet_out = devm_clk_get(&pdev->dev, "enet_out");
2573 if (IS_ERR(fep->clk_enet_out))
2574 fep->clk_enet_out = NULL;
2576 fep->clk_ptp = devm_clk_get(&pdev->dev, "ptp");
2578 pdev->id_entry->driver_data & FEC_QUIRK_HAS_BUFDESC_EX;
2579 if (IS_ERR(fep->clk_ptp)) {
2580 fep->clk_ptp = NULL;
2581 fep->bufdesc_ex = 0;
2584 ret = fec_enet_clk_enable(ndev, true);
2588 fep->reg_phy = devm_regulator_get(&pdev->dev, "phy");
2589 if (!IS_ERR(fep->reg_phy)) {
2590 ret = regulator_enable(fep->reg_phy);
2593 "Failed to enable phy regulator: %d\n", ret);
2594 goto failed_regulator;
2597 fep->reg_phy = NULL;
2600 fec_reset_phy(pdev);
2602 if (fep->bufdesc_ex)
2605 ret = fec_enet_init(ndev);
2609 for (i = 0; i < FEC_IRQ_NUM; i++) {
2610 irq = platform_get_irq(pdev, i);
2617 ret = devm_request_irq(&pdev->dev, irq, fec_enet_interrupt,
2618 0, pdev->name, ndev);
2623 ret = fec_enet_mii_init(pdev);
2625 goto failed_mii_init;
2627 /* Carrier starts down, phylib will bring it up */
2628 netif_carrier_off(ndev);
2629 fec_enet_clk_enable(ndev, false);
2630 pinctrl_pm_select_sleep_state(&pdev->dev);
2632 ret = register_netdev(ndev);
2634 goto failed_register;
2636 if (fep->bufdesc_ex && fep->ptp_clock)
2637 netdev_info(ndev, "registered PHC device %d\n", fep->dev_id);
2639 INIT_WORK(&fep->tx_timeout_work, fec_enet_timeout_work);
2643 fec_enet_mii_remove(fep);
2648 regulator_disable(fep->reg_phy);
2650 fec_enet_clk_enable(ndev, false);
2659 fec_drv_remove(struct platform_device *pdev)
2661 struct net_device *ndev = platform_get_drvdata(pdev);
2662 struct fec_enet_private *fep = netdev_priv(ndev);
2664 cancel_work_sync(&fep->tx_timeout_work);
2665 unregister_netdev(ndev);
2666 fec_enet_mii_remove(fep);
2667 del_timer_sync(&fep->time_keep);
2669 regulator_disable(fep->reg_phy);
2671 ptp_clock_unregister(fep->ptp_clock);
2672 fec_enet_clk_enable(ndev, false);
2678 #ifdef CONFIG_PM_SLEEP
2680 fec_suspend(struct device *dev)
2682 struct net_device *ndev = dev_get_drvdata(dev);
2683 struct fec_enet_private *fep = netdev_priv(ndev);
2686 if (netif_running(ndev)) {
2687 phy_stop(fep->phy_dev);
2688 napi_disable(&fep->napi);
2689 netif_tx_lock_bh(ndev);
2690 netif_device_detach(ndev);
2691 netif_tx_unlock_bh(ndev);
2696 fec_enet_clk_enable(ndev, false);
2697 pinctrl_pm_select_sleep_state(&fep->pdev->dev);
2700 regulator_disable(fep->reg_phy);
2706 fec_resume(struct device *dev)
2708 struct net_device *ndev = dev_get_drvdata(dev);
2709 struct fec_enet_private *fep = netdev_priv(ndev);
2713 ret = regulator_enable(fep->reg_phy);
2718 pinctrl_pm_select_default_state(&fep->pdev->dev);
2719 ret = fec_enet_clk_enable(ndev, true);
2724 if (netif_running(ndev)) {
2726 netif_tx_lock_bh(ndev);
2727 netif_device_attach(ndev);
2728 netif_tx_unlock_bh(ndev);
2729 napi_enable(&fep->napi);
2730 phy_start(fep->phy_dev);
2738 regulator_disable(fep->reg_phy);
2741 #endif /* CONFIG_PM_SLEEP */
2743 static SIMPLE_DEV_PM_OPS(fec_pm_ops, fec_suspend, fec_resume);
2745 static struct platform_driver fec_driver = {
2747 .name = DRIVER_NAME,
2748 .owner = THIS_MODULE,
2750 .of_match_table = fec_dt_ids,
2752 .id_table = fec_devtype,
2754 .remove = fec_drv_remove,
2757 module_platform_driver(fec_driver);
2759 MODULE_ALIAS("platform:"DRIVER_NAME);
2760 MODULE_LICENSE("GPL");