1 /* SPDX-License-Identifier: GPL-2.0+ */
2 // Copyright (c) 2016-2017 Hisilicon Limited.
7 /* Names used in this framework:
9 * a set of queues provided by AE
10 * ring buffer queue (rbq):
11 * the channel between upper layer and the AE, can do tx and rx
13 * a tx or rx channel within a rbq
14 * ring description (desc):
15 * an element in the ring with packet information
17 * a memory region referred by desc with the full packet payload
19 * "num" means a static number set as a parameter, "count" mean a dynamic
20 * number set while running
21 * "cb" means control block
24 #include <linux/acpi.h>
25 #include <linux/dcbnl.h>
26 #include <linux/delay.h>
27 #include <linux/device.h>
28 #include <linux/ethtool.h>
29 #include <linux/module.h>
30 #include <linux/netdevice.h>
31 #include <linux/pci.h>
32 #include <linux/pkt_sched.h>
33 #include <linux/types.h>
34 #include <net/pkt_cls.h>
36 #define HNAE3_MOD_VERSION "1.0"
38 #define HNAE3_MIN_VECTOR_NUM 2 /* first one for misc, another for IO */
41 #define HNAE3_DEVICE_VERSION_V1 0x00020
42 #define HNAE3_DEVICE_VERSION_V2 0x00021
43 #define HNAE3_DEVICE_VERSION_V3 0x00030
45 #define HNAE3_PCI_REVISION_BIT_SIZE 8
48 #define HNAE3_DEV_ID_GE 0xA220
49 #define HNAE3_DEV_ID_25GE 0xA221
50 #define HNAE3_DEV_ID_25GE_RDMA 0xA222
51 #define HNAE3_DEV_ID_25GE_RDMA_MACSEC 0xA223
52 #define HNAE3_DEV_ID_50GE_RDMA 0xA224
53 #define HNAE3_DEV_ID_50GE_RDMA_MACSEC 0xA225
54 #define HNAE3_DEV_ID_100G_RDMA_MACSEC 0xA226
55 #define HNAE3_DEV_ID_200G_RDMA 0xA228
56 #define HNAE3_DEV_ID_VF 0xA22E
57 #define HNAE3_DEV_ID_RDMA_DCB_PFC_VF 0xA22F
59 #define HNAE3_CLASS_NAME_SIZE 16
61 #define HNAE3_DEV_INITED_B 0x0
62 #define HNAE3_DEV_SUPPORT_ROCE_B 0x1
63 #define HNAE3_DEV_SUPPORT_DCB_B 0x2
64 #define HNAE3_KNIC_CLIENT_INITED_B 0x3
65 #define HNAE3_UNIC_CLIENT_INITED_B 0x4
66 #define HNAE3_ROCE_CLIENT_INITED_B 0x5
68 #define HNAE3_DEV_SUPPORT_ROCE_DCB_BITS (BIT(HNAE3_DEV_SUPPORT_DCB_B) |\
69 BIT(HNAE3_DEV_SUPPORT_ROCE_B))
71 #define hnae3_dev_roce_supported(hdev) \
72 hnae3_get_bit((hdev)->ae_dev->flag, HNAE3_DEV_SUPPORT_ROCE_B)
74 #define hnae3_dev_dcb_supported(hdev) \
75 hnae3_get_bit((hdev)->ae_dev->flag, HNAE3_DEV_SUPPORT_DCB_B)
77 enum HNAE3_DEV_CAP_BITS {
78 HNAE3_DEV_SUPPORT_FD_B,
79 HNAE3_DEV_SUPPORT_GRO_B,
80 HNAE3_DEV_SUPPORT_FEC_B,
81 HNAE3_DEV_SUPPORT_UDP_GSO_B,
82 HNAE3_DEV_SUPPORT_QB_B,
83 HNAE3_DEV_SUPPORT_FD_FORWARD_TC_B,
84 HNAE3_DEV_SUPPORT_PTP_B,
85 HNAE3_DEV_SUPPORT_INT_QL_B,
86 HNAE3_DEV_SUPPORT_HW_TX_CSUM_B,
87 HNAE3_DEV_SUPPORT_TX_PUSH_B,
88 HNAE3_DEV_SUPPORT_PHY_IMP_B,
89 HNAE3_DEV_SUPPORT_TQP_TXRX_INDEP_B,
90 HNAE3_DEV_SUPPORT_HW_PAD_B,
91 HNAE3_DEV_SUPPORT_STASH_B,
92 HNAE3_DEV_SUPPORT_UDP_TUNNEL_CSUM_B,
93 HNAE3_DEV_SUPPORT_PAUSE_B,
94 HNAE3_DEV_SUPPORT_RXD_ADV_LAYOUT_B,
97 #define hnae3_dev_fd_supported(hdev) \
98 test_bit(HNAE3_DEV_SUPPORT_FD_B, (hdev)->ae_dev->caps)
100 #define hnae3_dev_gro_supported(hdev) \
101 test_bit(HNAE3_DEV_SUPPORT_GRO_B, (hdev)->ae_dev->caps)
103 #define hnae3_dev_fec_supported(hdev) \
104 test_bit(HNAE3_DEV_SUPPORT_FEC_B, (hdev)->ae_dev->caps)
106 #define hnae3_dev_udp_gso_supported(hdev) \
107 test_bit(HNAE3_DEV_SUPPORT_UDP_GSO_B, (hdev)->ae_dev->caps)
109 #define hnae3_dev_qb_supported(hdev) \
110 test_bit(HNAE3_DEV_SUPPORT_QB_B, (hdev)->ae_dev->caps)
112 #define hnae3_dev_fd_forward_tc_supported(hdev) \
113 test_bit(HNAE3_DEV_SUPPORT_FD_FORWARD_TC_B, (hdev)->ae_dev->caps)
115 #define hnae3_dev_ptp_supported(hdev) \
116 test_bit(HNAE3_DEV_SUPPORT_PTP_B, (hdev)->ae_dev->caps)
118 #define hnae3_dev_int_ql_supported(hdev) \
119 test_bit(HNAE3_DEV_SUPPORT_INT_QL_B, (hdev)->ae_dev->caps)
121 #define hnae3_dev_hw_csum_supported(hdev) \
122 test_bit(HNAE3_DEV_SUPPORT_HW_TX_CSUM_B, (hdev)->ae_dev->caps)
124 #define hnae3_dev_tx_push_supported(hdev) \
125 test_bit(HNAE3_DEV_SUPPORT_TX_PUSH_B, (hdev)->ae_dev->caps)
127 #define hnae3_dev_phy_imp_supported(hdev) \
128 test_bit(HNAE3_DEV_SUPPORT_PHY_IMP_B, (hdev)->ae_dev->caps)
130 #define hnae3_dev_tqp_txrx_indep_supported(hdev) \
131 test_bit(HNAE3_DEV_SUPPORT_TQP_TXRX_INDEP_B, (hdev)->ae_dev->caps)
133 #define hnae3_dev_hw_pad_supported(hdev) \
134 test_bit(HNAE3_DEV_SUPPORT_HW_PAD_B, (hdev)->ae_dev->caps)
136 #define hnae3_dev_stash_supported(hdev) \
137 test_bit(HNAE3_DEV_SUPPORT_STASH_B, (hdev)->ae_dev->caps)
139 #define hnae3_dev_pause_supported(hdev) \
140 test_bit(HNAE3_DEV_SUPPORT_PAUSE_B, (hdev)->ae_dev->caps)
142 #define hnae3_ae_dev_tqp_txrx_indep_supported(ae_dev) \
143 test_bit(HNAE3_DEV_SUPPORT_TQP_TXRX_INDEP_B, (ae_dev)->caps)
145 #define hnae3_ae_dev_rxd_adv_layout_supported(ae_dev) \
146 test_bit(HNAE3_DEV_SUPPORT_RXD_ADV_LAYOUT_B, (ae_dev)->caps)
148 #define ring_ptr_move_fw(ring, p) \
149 ((ring)->p = ((ring)->p + 1) % (ring)->desc_num)
150 #define ring_ptr_move_bw(ring, p) \
151 ((ring)->p = ((ring)->p - 1 + (ring)->desc_num) % (ring)->desc_num)
156 DESC_TYPE_FRAGLIST_SKB,
163 void __iomem *io_base;
164 struct hnae3_ae_algo *ae_algo;
165 struct hnae3_handle *handle;
166 int tqp_index; /* index in a handle */
167 u32 buf_size; /* size for hnae_desc->addr, preset by AE */
168 u16 tx_desc_num; /* total number of tx desc */
169 u16 rx_desc_num; /* total number of rx desc */
172 struct hns3_mac_stats {
177 /* hnae3 loop mode */
180 HNAE3_LOOP_SERIAL_SERDES,
181 HNAE3_LOOP_PARALLEL_SERDES,
186 enum hnae3_client_type {
192 enum hnae3_media_type {
193 HNAE3_MEDIA_TYPE_UNKNOWN,
194 HNAE3_MEDIA_TYPE_FIBER,
195 HNAE3_MEDIA_TYPE_COPPER,
196 HNAE3_MEDIA_TYPE_BACKPLANE,
197 HNAE3_MEDIA_TYPE_NONE,
200 /* must be consistent with definition in firmware */
201 enum hnae3_module_type {
202 HNAE3_MODULE_TYPE_UNKNOWN = 0x00,
203 HNAE3_MODULE_TYPE_FIBRE_LR = 0x01,
204 HNAE3_MODULE_TYPE_FIBRE_SR = 0x02,
205 HNAE3_MODULE_TYPE_AOC = 0x03,
206 HNAE3_MODULE_TYPE_CR = 0x04,
207 HNAE3_MODULE_TYPE_KR = 0x05,
208 HNAE3_MODULE_TYPE_TP = 0x06,
211 enum hnae3_fec_mode {
218 enum hnae3_reset_notify_type {
225 enum hnae3_hw_error_type {
226 HNAE3_PPU_POISON_ERROR,
227 HNAE3_CMDQ_ECC_ERROR,
228 HNAE3_IMP_RD_POISON_ERROR,
229 HNAE3_ROCEE_AXI_RESP_ERROR,
232 enum hnae3_reset_type {
235 HNAE3_VF_PF_FUNC_RESET,
246 enum hnae3_port_base_vlan_state {
247 HNAE3_PORT_BASE_VLAN_DISABLE,
248 HNAE3_PORT_BASE_VLAN_ENABLE,
249 HNAE3_PORT_BASE_VLAN_MODIFY,
250 HNAE3_PORT_BASE_VLAN_NOCHANGE,
254 HNAE3_DBG_CMD_TM_NODES,
255 HNAE3_DBG_CMD_TM_PRI,
256 HNAE3_DBG_CMD_TM_QSET,
257 HNAE3_DBG_CMD_UNKNOWN,
260 struct hnae3_vector_info {
265 #define HNAE3_RING_TYPE_B 0
266 #define HNAE3_RING_TYPE_TX 0
267 #define HNAE3_RING_TYPE_RX 1
268 #define HNAE3_RING_GL_IDX_S 0
269 #define HNAE3_RING_GL_IDX_M GENMASK(1, 0)
270 #define HNAE3_RING_GL_RX 0
271 #define HNAE3_RING_GL_TX 1
273 #define HNAE3_FW_VERSION_BYTE3_SHIFT 24
274 #define HNAE3_FW_VERSION_BYTE3_MASK GENMASK(31, 24)
275 #define HNAE3_FW_VERSION_BYTE2_SHIFT 16
276 #define HNAE3_FW_VERSION_BYTE2_MASK GENMASK(23, 16)
277 #define HNAE3_FW_VERSION_BYTE1_SHIFT 8
278 #define HNAE3_FW_VERSION_BYTE1_MASK GENMASK(15, 8)
279 #define HNAE3_FW_VERSION_BYTE0_SHIFT 0
280 #define HNAE3_FW_VERSION_BYTE0_MASK GENMASK(7, 0)
282 struct hnae3_ring_chain_node {
283 struct hnae3_ring_chain_node *next;
289 #define HNAE3_IS_TX_RING(node) \
290 (((node)->flag & 1 << HNAE3_RING_TYPE_B) == HNAE3_RING_TYPE_TX)
292 /* device specification info from firmware */
293 struct hnae3_dev_specs {
294 u32 mac_entry_num; /* number of mac-vlan table entry */
295 u32 mng_entry_num; /* number of manager table entry */
297 u16 rss_ind_tbl_size;
299 u16 int_ql_max; /* max value of interrupt coalesce based on INT_QL */
300 u16 max_int_gl; /* max value of interrupt coalesce based on INT_GL */
301 u8 max_non_tso_bd_num; /* max BD number of one non-TSO packet */
306 struct hnae3_client_ops {
307 int (*init_instance)(struct hnae3_handle *handle);
308 void (*uninit_instance)(struct hnae3_handle *handle, bool reset);
309 void (*link_status_change)(struct hnae3_handle *handle, bool state);
310 int (*reset_notify)(struct hnae3_handle *handle,
311 enum hnae3_reset_notify_type type);
312 void (*process_hw_error)(struct hnae3_handle *handle,
313 enum hnae3_hw_error_type);
316 #define HNAE3_CLIENT_NAME_LENGTH 16
317 struct hnae3_client {
318 char name[HNAE3_CLIENT_NAME_LENGTH];
320 enum hnae3_client_type type;
321 const struct hnae3_client_ops *ops;
322 struct list_head node;
325 #define HNAE3_DEV_CAPS_MAX_NUM 96
326 struct hnae3_ae_dev {
327 struct pci_dev *pdev;
328 const struct hnae3_ae_ops *ops;
329 struct list_head node;
331 unsigned long hw_err_reset_req;
332 struct hnae3_dev_specs dev_specs;
334 unsigned long caps[BITS_TO_LONGS(HNAE3_DEV_CAPS_MAX_NUM)];
338 /* This struct defines the operation on the handle.
340 * init_ae_dev(): (mandatory)
341 * Get PF configure from pci_dev and initialize PF hardware
343 * Disable PF device and release PF resource
345 * Register client to ae_dev
346 * unregister_client()
347 * Unregister client from ae_dev
349 * Enable the hardware
351 * Disable the hardware
353 * Inform the hclge that client has been started
355 * Inform the hclge that client has been stopped
357 * Get the carrier state of the back channel of the handle, 1 for ok, 0 for
359 * get_ksettings_an_result()
360 * Get negotiation status,speed and duplex
362 * Get media type of MAC
364 * Check target speed whether is supported
371 * request_update_promisc_mode
372 * request to hclge(vf) to update promisc mode
376 * get tx and rx of pause frame use
378 * set tx and rx of pause frame use
380 * set auto autonegotiation of pause frame use
382 * get auto autonegotiation of pause frame use
384 * restart autonegotiation
386 * halt/resume autonegotiation when autonegotiation on
387 * get_coalesce_usecs()
388 * get usecs to delay a TX interrupt after a packet is sent
389 * get_rx_max_coalesced_frames()
390 * get Maximum number of packets to be sent before a TX interrupt.
391 * set_coalesce_usecs()
392 * set usecs to delay a TX interrupt after a packet is sent
393 * set_coalesce_frames()
394 * set Maximum number of packets to be sent before a TX interrupt.
400 * Add unicast addr to mac table
402 * Remove unicast addr from mac table
404 * Set multicast address
406 * Add multicast address to mac table
408 * Remove multicast address from mac table
410 * Update Old network device statistics
412 * get mac pause statistics including tx_cnt and rx_cnt
413 * get_ethtool_stats()
414 * Get ethtool network device statistics
416 * Get a set of strings that describe the requested objects
418 * Get number of strings that @get_strings will write
419 * update_led_status()
420 * Update the led status
426 * Get the len of the regs dump
434 * Get tc size of handle
436 * Get vector number and vector information
438 * Put the vector in hdev
439 * map_ring_to_vector()
440 * Map rings to vector
441 * unmap_ring_from_vector()
442 * Unmap rings from vector
446 * Get firmware version
448 * Get media typr of phy
449 * enable_vlan_filter()
452 * Set vlan filter config of Ports
453 * set_vf_vlan_filter()
454 * Set vlan filter config of vf
455 * enable_hw_strip_rxvtag()
456 * Enable/disable hardware strip vlan tag of packets received
458 * Enable/disable HW GRO
460 * Check the 5-tuples of flow, and create flow director rule
462 * Get the VF configuration setting by the host
466 * Enable/disable spoof check for specified vf
468 * Enable/disable trust for specified vf, if the vf being trusted, then
469 * it can enable promisc mode
471 * Set the max tx rate of specified vf.
473 * Configure the default MAC for specified VF
475 * Get the optical module eeprom info.
479 * Delete clsflower rule
481 * Check if any cls flower rule exist
483 * Execute debugfs read command.
485 struct hnae3_ae_ops {
486 int (*init_ae_dev)(struct hnae3_ae_dev *ae_dev);
487 void (*uninit_ae_dev)(struct hnae3_ae_dev *ae_dev);
488 void (*reset_prepare)(struct hnae3_ae_dev *ae_dev,
489 enum hnae3_reset_type rst_type);
490 void (*reset_done)(struct hnae3_ae_dev *ae_dev);
491 int (*init_client_instance)(struct hnae3_client *client,
492 struct hnae3_ae_dev *ae_dev);
493 void (*uninit_client_instance)(struct hnae3_client *client,
494 struct hnae3_ae_dev *ae_dev);
495 int (*start)(struct hnae3_handle *handle);
496 void (*stop)(struct hnae3_handle *handle);
497 int (*client_start)(struct hnae3_handle *handle);
498 void (*client_stop)(struct hnae3_handle *handle);
499 int (*get_status)(struct hnae3_handle *handle);
500 void (*get_ksettings_an_result)(struct hnae3_handle *handle,
501 u8 *auto_neg, u32 *speed, u8 *duplex);
503 int (*cfg_mac_speed_dup_h)(struct hnae3_handle *handle, int speed,
506 void (*get_media_type)(struct hnae3_handle *handle, u8 *media_type,
508 int (*check_port_speed)(struct hnae3_handle *handle, u32 speed);
509 void (*get_fec)(struct hnae3_handle *handle, u8 *fec_ability,
511 int (*set_fec)(struct hnae3_handle *handle, u32 fec_mode);
512 void (*adjust_link)(struct hnae3_handle *handle, int speed, int duplex);
513 int (*set_loopback)(struct hnae3_handle *handle,
514 enum hnae3_loop loop_mode, bool en);
516 int (*set_promisc_mode)(struct hnae3_handle *handle, bool en_uc_pmc,
518 void (*request_update_promisc_mode)(struct hnae3_handle *handle);
519 int (*set_mtu)(struct hnae3_handle *handle, int new_mtu);
521 void (*get_pauseparam)(struct hnae3_handle *handle,
522 u32 *auto_neg, u32 *rx_en, u32 *tx_en);
523 int (*set_pauseparam)(struct hnae3_handle *handle,
524 u32 auto_neg, u32 rx_en, u32 tx_en);
526 int (*set_autoneg)(struct hnae3_handle *handle, bool enable);
527 int (*get_autoneg)(struct hnae3_handle *handle);
528 int (*restart_autoneg)(struct hnae3_handle *handle);
529 int (*halt_autoneg)(struct hnae3_handle *handle, bool halt);
531 void (*get_coalesce_usecs)(struct hnae3_handle *handle,
532 u32 *tx_usecs, u32 *rx_usecs);
533 void (*get_rx_max_coalesced_frames)(struct hnae3_handle *handle,
534 u32 *tx_frames, u32 *rx_frames);
535 int (*set_coalesce_usecs)(struct hnae3_handle *handle, u32 timeout);
536 int (*set_coalesce_frames)(struct hnae3_handle *handle,
537 u32 coalesce_frames);
538 void (*get_coalesce_range)(struct hnae3_handle *handle,
539 u32 *tx_frames_low, u32 *rx_frames_low,
540 u32 *tx_frames_high, u32 *rx_frames_high,
541 u32 *tx_usecs_low, u32 *rx_usecs_low,
542 u32 *tx_usecs_high, u32 *rx_usecs_high);
544 void (*get_mac_addr)(struct hnae3_handle *handle, u8 *p);
545 int (*set_mac_addr)(struct hnae3_handle *handle, void *p,
547 int (*do_ioctl)(struct hnae3_handle *handle,
548 struct ifreq *ifr, int cmd);
549 int (*add_uc_addr)(struct hnae3_handle *handle,
550 const unsigned char *addr);
551 int (*rm_uc_addr)(struct hnae3_handle *handle,
552 const unsigned char *addr);
553 int (*set_mc_addr)(struct hnae3_handle *handle, void *addr);
554 int (*add_mc_addr)(struct hnae3_handle *handle,
555 const unsigned char *addr);
556 int (*rm_mc_addr)(struct hnae3_handle *handle,
557 const unsigned char *addr);
558 void (*set_tso_stats)(struct hnae3_handle *handle, int enable);
559 void (*update_stats)(struct hnae3_handle *handle,
560 struct net_device_stats *net_stats);
561 void (*get_stats)(struct hnae3_handle *handle, u64 *data);
562 void (*get_mac_stats)(struct hnae3_handle *handle,
563 struct hns3_mac_stats *mac_stats);
564 void (*get_strings)(struct hnae3_handle *handle,
565 u32 stringset, u8 *data);
566 int (*get_sset_count)(struct hnae3_handle *handle, int stringset);
568 void (*get_regs)(struct hnae3_handle *handle, u32 *version,
570 int (*get_regs_len)(struct hnae3_handle *handle);
572 u32 (*get_rss_key_size)(struct hnae3_handle *handle);
573 int (*get_rss)(struct hnae3_handle *handle, u32 *indir, u8 *key,
575 int (*set_rss)(struct hnae3_handle *handle, const u32 *indir,
576 const u8 *key, const u8 hfunc);
577 int (*set_rss_tuple)(struct hnae3_handle *handle,
578 struct ethtool_rxnfc *cmd);
579 int (*get_rss_tuple)(struct hnae3_handle *handle,
580 struct ethtool_rxnfc *cmd);
582 int (*get_tc_size)(struct hnae3_handle *handle);
584 int (*get_vector)(struct hnae3_handle *handle, u16 vector_num,
585 struct hnae3_vector_info *vector_info);
586 int (*put_vector)(struct hnae3_handle *handle, int vector_num);
587 int (*map_ring_to_vector)(struct hnae3_handle *handle,
589 struct hnae3_ring_chain_node *vr_chain);
590 int (*unmap_ring_from_vector)(struct hnae3_handle *handle,
592 struct hnae3_ring_chain_node *vr_chain);
594 int (*reset_queue)(struct hnae3_handle *handle);
595 u32 (*get_fw_version)(struct hnae3_handle *handle);
596 void (*get_mdix_mode)(struct hnae3_handle *handle,
597 u8 *tp_mdix_ctrl, u8 *tp_mdix);
599 void (*enable_vlan_filter)(struct hnae3_handle *handle, bool enable);
600 int (*set_vlan_filter)(struct hnae3_handle *handle, __be16 proto,
601 u16 vlan_id, bool is_kill);
602 int (*set_vf_vlan_filter)(struct hnae3_handle *handle, int vfid,
603 u16 vlan, u8 qos, __be16 proto);
604 int (*enable_hw_strip_rxvtag)(struct hnae3_handle *handle, bool enable);
605 void (*reset_event)(struct pci_dev *pdev, struct hnae3_handle *handle);
606 enum hnae3_reset_type (*get_reset_level)(struct hnae3_ae_dev *ae_dev,
607 unsigned long *addr);
608 void (*set_default_reset_request)(struct hnae3_ae_dev *ae_dev,
609 enum hnae3_reset_type rst_type);
610 void (*get_channels)(struct hnae3_handle *handle,
611 struct ethtool_channels *ch);
612 void (*get_tqps_and_rss_info)(struct hnae3_handle *h,
613 u16 *alloc_tqps, u16 *max_rss_size);
614 int (*set_channels)(struct hnae3_handle *handle, u32 new_tqps_num,
615 bool rxfh_configured);
616 void (*get_flowctrl_adv)(struct hnae3_handle *handle,
618 int (*set_led_id)(struct hnae3_handle *handle,
619 enum ethtool_phys_id_state status);
620 void (*get_link_mode)(struct hnae3_handle *handle,
621 unsigned long *supported,
622 unsigned long *advertising);
623 int (*add_fd_entry)(struct hnae3_handle *handle,
624 struct ethtool_rxnfc *cmd);
625 int (*del_fd_entry)(struct hnae3_handle *handle,
626 struct ethtool_rxnfc *cmd);
627 int (*get_fd_rule_cnt)(struct hnae3_handle *handle,
628 struct ethtool_rxnfc *cmd);
629 int (*get_fd_rule_info)(struct hnae3_handle *handle,
630 struct ethtool_rxnfc *cmd);
631 int (*get_fd_all_rules)(struct hnae3_handle *handle,
632 struct ethtool_rxnfc *cmd, u32 *rule_locs);
633 void (*enable_fd)(struct hnae3_handle *handle, bool enable);
634 int (*add_arfs_entry)(struct hnae3_handle *handle, u16 queue_id,
635 u16 flow_id, struct flow_keys *fkeys);
636 int (*dbg_run_cmd)(struct hnae3_handle *handle, const char *cmd_buf);
637 int (*dbg_read_cmd)(struct hnae3_handle *handle, enum hnae3_dbg_cmd cmd,
639 pci_ers_result_t (*handle_hw_ras_error)(struct hnae3_ae_dev *ae_dev);
640 bool (*get_hw_reset_stat)(struct hnae3_handle *handle);
641 bool (*ae_dev_resetting)(struct hnae3_handle *handle);
642 unsigned long (*ae_dev_reset_cnt)(struct hnae3_handle *handle);
643 int (*set_gro_en)(struct hnae3_handle *handle, bool enable);
644 u16 (*get_global_queue_id)(struct hnae3_handle *handle, u16 queue_id);
645 void (*set_timer_task)(struct hnae3_handle *handle, bool enable);
646 int (*mac_connect_phy)(struct hnae3_handle *handle);
647 void (*mac_disconnect_phy)(struct hnae3_handle *handle);
648 int (*get_vf_config)(struct hnae3_handle *handle, int vf,
649 struct ifla_vf_info *ivf);
650 int (*set_vf_link_state)(struct hnae3_handle *handle, int vf,
652 int (*set_vf_spoofchk)(struct hnae3_handle *handle, int vf,
654 int (*set_vf_trust)(struct hnae3_handle *handle, int vf, bool enable);
655 int (*set_vf_rate)(struct hnae3_handle *handle, int vf,
656 int min_tx_rate, int max_tx_rate, bool force);
657 int (*set_vf_mac)(struct hnae3_handle *handle, int vf, u8 *p);
658 int (*get_module_eeprom)(struct hnae3_handle *handle, u32 offset,
660 bool (*get_cmdq_stat)(struct hnae3_handle *handle);
661 int (*add_cls_flower)(struct hnae3_handle *handle,
662 struct flow_cls_offload *cls_flower, int tc);
663 int (*del_cls_flower)(struct hnae3_handle *handle,
664 struct flow_cls_offload *cls_flower);
665 bool (*cls_flower_active)(struct hnae3_handle *handle);
666 int (*get_phy_link_ksettings)(struct hnae3_handle *handle,
667 struct ethtool_link_ksettings *cmd);
668 int (*set_phy_link_ksettings)(struct hnae3_handle *handle,
669 const struct ethtool_link_ksettings *cmd);
672 struct hnae3_dcb_ops {
673 /* IEEE 802.1Qaz std */
674 int (*ieee_getets)(struct hnae3_handle *, struct ieee_ets *);
675 int (*ieee_setets)(struct hnae3_handle *, struct ieee_ets *);
676 int (*ieee_getpfc)(struct hnae3_handle *, struct ieee_pfc *);
677 int (*ieee_setpfc)(struct hnae3_handle *, struct ieee_pfc *);
679 /* DCBX configuration */
680 u8 (*getdcbx)(struct hnae3_handle *);
681 u8 (*setdcbx)(struct hnae3_handle *, u8);
683 int (*setup_tc)(struct hnae3_handle *handle,
684 struct tc_mqprio_qopt_offload *mqprio_qopt);
687 struct hnae3_ae_algo {
688 const struct hnae3_ae_ops *ops;
689 struct list_head node;
690 const struct pci_device_id *pdev_id_table;
693 #define HNAE3_INT_NAME_LEN 32
694 #define HNAE3_ITR_COUNTDOWN_START 100
696 #define HNAE3_MAX_TC 8
697 #define HNAE3_MAX_USER_PRIO 8
698 struct hnae3_tc_info {
699 u8 prio_tc[HNAE3_MAX_USER_PRIO]; /* TC indexed by prio */
700 u16 tqp_count[HNAE3_MAX_TC];
701 u16 tqp_offset[HNAE3_MAX_TC];
702 unsigned long tc_en; /* bitmap of TC enabled */
703 u8 num_tc; /* Total number of enabled TCs */
707 struct hnae3_knic_private_info {
708 struct net_device *netdev; /* Set by KNIC client when init instance */
709 u16 rss_size; /* Allocated RSS queues */
715 struct hnae3_tc_info tc_info;
717 u16 num_tqps; /* total number of TQPs in this handle */
718 struct hnae3_queue **tqp; /* array base of all TQPs in this instance */
719 const struct hnae3_dcb_ops *dcb_ops;
722 enum pkt_hash_types rss_type;
725 struct hnae3_roce_private_info {
726 struct net_device *netdev;
727 void __iomem *roce_io_base;
728 void __iomem *roce_mem_base;
732 /* The below attributes defined for RoCE client, hnae3 gives
733 * initial values to them, and RoCE client can modify and use
736 unsigned long reset_state;
737 unsigned long instance_state;
741 #define HNAE3_SUPPORT_APP_LOOPBACK BIT(0)
742 #define HNAE3_SUPPORT_PHY_LOOPBACK BIT(1)
743 #define HNAE3_SUPPORT_SERDES_SERIAL_LOOPBACK BIT(2)
744 #define HNAE3_SUPPORT_VF BIT(3)
745 #define HNAE3_SUPPORT_SERDES_PARALLEL_LOOPBACK BIT(4)
747 #define HNAE3_USER_UPE BIT(0) /* unicast promisc enabled by user */
748 #define HNAE3_USER_MPE BIT(1) /* mulitcast promisc enabled by user */
749 #define HNAE3_BPE BIT(2) /* broadcast promisc enable */
750 #define HNAE3_OVERFLOW_UPE BIT(3) /* unicast mac vlan overflow */
751 #define HNAE3_OVERFLOW_MPE BIT(4) /* multicast mac vlan overflow */
752 #define HNAE3_VLAN_FLTR BIT(5) /* enable vlan filter */
753 #define HNAE3_UPE (HNAE3_USER_UPE | HNAE3_OVERFLOW_UPE)
754 #define HNAE3_MPE (HNAE3_USER_MPE | HNAE3_OVERFLOW_MPE)
757 HNAE3_PFLAG_LIMIT_PROMISC,
761 struct hnae3_handle {
762 struct hnae3_client *client;
763 struct pci_dev *pdev;
765 struct hnae3_ae_algo *ae_algo; /* the class who provides this handle */
766 u64 flags; /* Indicate the capabilities for this handle */
769 struct net_device *netdev; /* first member */
770 struct hnae3_knic_private_info kinfo;
771 struct hnae3_roce_private_info rinfo;
774 u32 numa_node_mask; /* for multi-chip support */
776 enum hnae3_port_base_vlan_state port_base_vlan_state;
779 struct dentry *hnae3_dbgfs;
781 /* Network interface message level enabled bits */
784 unsigned long supported_pflags;
785 unsigned long priv_flags;
788 #define hnae3_set_field(origin, mask, shift, val) \
790 (origin) &= (~(mask)); \
791 (origin) |= ((val) << (shift)) & (mask); \
793 #define hnae3_get_field(origin, mask, shift) (((origin) & (mask)) >> (shift))
795 #define hnae3_set_bit(origin, shift, val) \
796 hnae3_set_field(origin, 0x1 << (shift), shift, val)
797 #define hnae3_get_bit(origin, shift) \
798 hnae3_get_field(origin, 0x1 << (shift), shift)
800 int hnae3_register_ae_dev(struct hnae3_ae_dev *ae_dev);
801 void hnae3_unregister_ae_dev(struct hnae3_ae_dev *ae_dev);
803 void hnae3_unregister_ae_algo(struct hnae3_ae_algo *ae_algo);
804 void hnae3_register_ae_algo(struct hnae3_ae_algo *ae_algo);
806 void hnae3_unregister_client(struct hnae3_client *client);
807 int hnae3_register_client(struct hnae3_client *client);
809 void hnae3_set_client_init_flag(struct hnae3_client *client,
810 struct hnae3_ae_dev *ae_dev,
811 unsigned int inited);