drivers/net/ethernet/hisilicon/hns3/hns3_enet.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 // Copyright (c) 2016-2017 Hisilicon Limited.
   3
   4 #include <linux/dma-mapping.h>
   5 #include <linux/etherdevice.h>
   6 #include <linux/interrupt.h>
   7 #ifdef CONFIG_RFS_ACCEL
   8 #include <linux/cpu_rmap.h>
   9 #endif
  10 #include <linux/if_vlan.h>
  11 #include <linux/ip.h>
  12 #include <linux/ipv6.h>
  13 #include <linux/module.h>
  14 #include <linux/pci.h>
  15 #include <linux/aer.h>
  16 #include <linux/skbuff.h>
  17 #include <linux/sctp.h>
  18 #include <linux/vermagic.h>
  19 #include <net/gre.h>
  20 #include <net/ip6_checksum.h>
  21 #include <net/pkt_cls.h>
  22 #include <net/tcp.h>
  23 #include <net/vxlan.h>
  24
  25 #include "hnae3.h"
  26 #include "hns3_enet.h"
  27 /* All hns3 tracepoints are defined by the include below, which
  28  * must be included exactly once across the whole kernel with
  29  * CREATE_TRACE_POINTS defined
  30  */
  31 #define CREATE_TRACE_POINTS
  32 #include "hns3_trace.h"
  33
  34 #define hns3_set_field(origin, shift, val)      ((origin) |= ((val) << (shift)))
  35 #define hns3_tx_bd_count(S)     DIV_ROUND_UP(S, HNS3_MAX_BD_SIZE)
  36
  37 #define hns3_rl_err(fmt, ...)                                           \
  38         do {                                                            \
  39                 if (net_ratelimit())                                    \
  40                         netdev_err(fmt, ##__VA_ARGS__);                 \
  41         } while (0)
  42
  43 static void hns3_clear_all_ring(struct hnae3_handle *h, bool force);
  44 static void hns3_remove_hw_addr(struct net_device *netdev);
  45
  46 static const char hns3_driver_name[] = "hns3";
  47 const char hns3_driver_version[] = VERMAGIC_STRING;
  48 static const char hns3_driver_string[] =
  49                         "Hisilicon Ethernet Network Driver for Hip08 Family";
  50 static const char hns3_copyright[] = "Copyright (c) 2017 Huawei Corporation.";
  51 static struct hnae3_client client;
  52
  53 static int debug = -1;
  54 module_param(debug, int, 0);
  55 MODULE_PARM_DESC(debug, " Network interface message level setting");
  56
  57 #define DEFAULT_MSG_LEVEL (NETIF_MSG_PROBE | NETIF_MSG_LINK | \
  58                            NETIF_MSG_IFDOWN | NETIF_MSG_IFUP)
  59
  60 #define HNS3_INNER_VLAN_TAG     1
  61 #define HNS3_OUTER_VLAN_TAG     2
  62
  63 #define HNS3_MIN_TX_LEN         33U
  64
  65 /* hns3_pci_tbl - PCI Device ID Table
  66  *
  67  * Last entry must be all 0s
  68  *
  69  * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
  70  *   Class, Class Mask, private data (not used) }
  71  */
  72 static const struct pci_device_id hns3_pci_tbl[] = {
  73         {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_GE), 0},
  74         {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_25GE), 0},
  75         {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_25GE_RDMA),
  76          HNAE3_DEV_SUPPORT_ROCE_DCB_BITS},
  77         {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_25GE_RDMA_MACSEC),
  78          HNAE3_DEV_SUPPORT_ROCE_DCB_BITS},
  79         {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_50GE_RDMA),
  80          HNAE3_DEV_SUPPORT_ROCE_DCB_BITS},
  81         {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_50GE_RDMA_MACSEC),
  82          HNAE3_DEV_SUPPORT_ROCE_DCB_BITS},
  83         {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_100G_RDMA_MACSEC),
  84          HNAE3_DEV_SUPPORT_ROCE_DCB_BITS},
  85         {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_100G_VF), 0},
  86         {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_100G_RDMA_DCB_PFC_VF),
  87          HNAE3_DEV_SUPPORT_ROCE_DCB_BITS},
  88         /* required last entry */
  89         {0, }
  90 };
  91 MODULE_DEVICE_TABLE(pci, hns3_pci_tbl);
  92
  93 static irqreturn_t hns3_irq_handle(int irq, void *vector)
  94 {
  95         struct hns3_enet_tqp_vector *tqp_vector = vector;
  96
  97         napi_schedule_irqoff(&tqp_vector->napi);
  98
  99         return IRQ_HANDLED;
 100 }
 101
 102 static void hns3_nic_uninit_irq(struct hns3_nic_priv *priv)
 103 {
 104         struct hns3_enet_tqp_vector *tqp_vectors;
 105         unsigned int i;
 106
 107         for (i = 0; i < priv->vector_num; i++) {
 108                 tqp_vectors = &priv->tqp_vector[i];
 109
 110                 if (tqp_vectors->irq_init_flag != HNS3_VECTOR_INITED)
 111                         continue;
 112
 113                 /* clear the affinity mask */
 114                 irq_set_affinity_hint(tqp_vectors->vector_irq, NULL);
 115
 116                 /* release the irq resource */
 117                 free_irq(tqp_vectors->vector_irq, tqp_vectors);
 118                 tqp_vectors->irq_init_flag = HNS3_VECTOR_NOT_INITED;
 119         }
 120 }
 121
 122 static int hns3_nic_init_irq(struct hns3_nic_priv *priv)
 123 {
 124         struct hns3_enet_tqp_vector *tqp_vectors;
 125         int txrx_int_idx = 0;
 126         int rx_int_idx = 0;
 127         int tx_int_idx = 0;
 128         unsigned int i;
 129         int ret;
 130
 131         for (i = 0; i < priv->vector_num; i++) {
 132                 tqp_vectors = &priv->tqp_vector[i];
 133
 134                 if (tqp_vectors->irq_init_flag == HNS3_VECTOR_INITED)
 135                         continue;
 136
 137                 if (tqp_vectors->tx_group.ring && tqp_vectors->rx_group.ring) {
 138                         snprintf(tqp_vectors->name, HNAE3_INT_NAME_LEN,
 139                                  "%s-%s-%s-%d", hns3_driver_name,
 140                                  pci_name(priv->ae_handle->pdev),
 141                                  "TxRx", txrx_int_idx++);
 142                         txrx_int_idx++;
 143                 } else if (tqp_vectors->rx_group.ring) {
 144                         snprintf(tqp_vectors->name, HNAE3_INT_NAME_LEN,
 145                                  "%s-%s-%s-%d", hns3_driver_name,
 146                                  pci_name(priv->ae_handle->pdev),
 147                                  "Rx", rx_int_idx++);
 148                 } else if (tqp_vectors->tx_group.ring) {
 149                         snprintf(tqp_vectors->name, HNAE3_INT_NAME_LEN,
 150                                  "%s-%s-%s-%d", hns3_driver_name,
 151                                  pci_name(priv->ae_handle->pdev),
 152                                  "Tx", tx_int_idx++);
 153                 } else {
 154                         /* Skip this unused q_vector */
 155                         continue;
 156                 }
 157
 158                 tqp_vectors->name[HNAE3_INT_NAME_LEN - 1] = '\0';
 159
 160                 ret = request_irq(tqp_vectors->vector_irq, hns3_irq_handle, 0,
 161                                   tqp_vectors->name, tqp_vectors);
 162                 if (ret) {
 163                         netdev_err(priv->netdev, "request irq(%d) fail\n",
 164                                    tqp_vectors->vector_irq);
 165                         hns3_nic_uninit_irq(priv);
 166                         return ret;
 167                 }
 168
 169                 disable_irq(tqp_vectors->vector_irq);
 170
 171                 irq_set_affinity_hint(tqp_vectors->vector_irq,
 172                                       &tqp_vectors->affinity_mask);
 173
 174                 tqp_vectors->irq_init_flag = HNS3_VECTOR_INITED;
 175         }
 176
 177         return 0;
 178 }
 179
 180 static void hns3_mask_vector_irq(struct hns3_enet_tqp_vector *tqp_vector,
 181                                  u32 mask_en)
 182 {
 183         writel(mask_en, tqp_vector->mask_addr);
 184 }
 185
 186 static void hns3_vector_enable(struct hns3_enet_tqp_vector *tqp_vector)
 187 {
 188         napi_enable(&tqp_vector->napi);
 189         enable_irq(tqp_vector->vector_irq);
 190
 191         /* enable vector */
 192         hns3_mask_vector_irq(tqp_vector, 1);
 193 }
 194
 195 static void hns3_vector_disable(struct hns3_enet_tqp_vector *tqp_vector)
 196 {
 197         /* disable vector */
 198         hns3_mask_vector_irq(tqp_vector, 0);
 199
 200         disable_irq(tqp_vector->vector_irq);
 201         napi_disable(&tqp_vector->napi);
 202 }
 203
 204 void hns3_set_vector_coalesce_rl(struct hns3_enet_tqp_vector *tqp_vector,
 205                                  u32 rl_value)
 206 {
 207         u32 rl_reg = hns3_rl_usec_to_reg(rl_value);
 208
 209         /* this defines the configuration for RL (Interrupt Rate Limiter).
 210          * Rl defines rate of interrupts i.e. number of interrupts-per-second
 211          * GL and RL(Rate Limiter) are 2 ways to acheive interrupt coalescing
 212          */
 213
 214         if (rl_reg > 0 && !tqp_vector->tx_group.coal.gl_adapt_enable &&
 215             !tqp_vector->rx_group.coal.gl_adapt_enable)
 216                 /* According to the hardware, the range of rl_reg is
 217                  * 0-59 and the unit is 4.
 218                  */
 219                 rl_reg |=  HNS3_INT_RL_ENABLE_MASK;
 220
 221         writel(rl_reg, tqp_vector->mask_addr + HNS3_VECTOR_RL_OFFSET);
 222 }
 223
 224 void hns3_set_vector_coalesce_rx_gl(struct hns3_enet_tqp_vector *tqp_vector,
 225                                     u32 gl_value)
 226 {
 227         u32 rx_gl_reg = hns3_gl_usec_to_reg(gl_value);
 228
 229         writel(rx_gl_reg, tqp_vector->mask_addr + HNS3_VECTOR_GL0_OFFSET);
 230 }
 231
 232 void hns3_set_vector_coalesce_tx_gl(struct hns3_enet_tqp_vector *tqp_vector,
 233                                     u32 gl_value)
 234 {
 235         u32 tx_gl_reg = hns3_gl_usec_to_reg(gl_value);
 236
 237         writel(tx_gl_reg, tqp_vector->mask_addr + HNS3_VECTOR_GL1_OFFSET);
 238 }
 239
 240 static void hns3_vector_gl_rl_init(struct hns3_enet_tqp_vector *tqp_vector,
 241                                    struct hns3_nic_priv *priv)
 242 {
 243         /* initialize the configuration for interrupt coalescing.
 244          * 1. GL (Interrupt Gap Limiter)
 245          * 2. RL (Interrupt Rate Limiter)
 246          *
 247          * Default: enable interrupt coalescing self-adaptive and GL
 248          */
 249         tqp_vector->tx_group.coal.gl_adapt_enable = 1;
 250         tqp_vector->rx_group.coal.gl_adapt_enable = 1;
 251
 252         tqp_vector->tx_group.coal.int_gl = HNS3_INT_GL_50K;
 253         tqp_vector->rx_group.coal.int_gl = HNS3_INT_GL_50K;
 254
 255         tqp_vector->rx_group.coal.flow_level = HNS3_FLOW_LOW;
 256         tqp_vector->tx_group.coal.flow_level = HNS3_FLOW_LOW;
 257 }
 258
 259 static void hns3_vector_gl_rl_init_hw(struct hns3_enet_tqp_vector *tqp_vector,
 260                                       struct hns3_nic_priv *priv)
 261 {
 262         struct hnae3_handle *h = priv->ae_handle;
 263
 264         hns3_set_vector_coalesce_tx_gl(tqp_vector,
 265                                        tqp_vector->tx_group.coal.int_gl);
 266         hns3_set_vector_coalesce_rx_gl(tqp_vector,
 267                                        tqp_vector->rx_group.coal.int_gl);
 268         hns3_set_vector_coalesce_rl(tqp_vector, h->kinfo.int_rl_setting);
 269 }
 270
 271 static int hns3_nic_set_real_num_queue(struct net_device *netdev)
 272 {
 273         struct hnae3_handle *h = hns3_get_handle(netdev);
 274         struct hnae3_knic_private_info *kinfo = &h->kinfo;
 275         unsigned int queue_size = kinfo->rss_size * kinfo->num_tc;
 276         int i, ret;
 277
 278         if (kinfo->num_tc <= 1) {
 279                 netdev_reset_tc(netdev);
 280         } else {
 281                 ret = netdev_set_num_tc(netdev, kinfo->num_tc);
 282                 if (ret) {
 283                         netdev_err(netdev,
 284                                    "netdev_set_num_tc fail, ret=%d!\n", ret);
 285                         return ret;
 286                 }
 287
 288                 for (i = 0; i < HNAE3_MAX_TC; i++) {
 289                         if (!kinfo->tc_info[i].enable)
 290                                 continue;
 291
 292                         netdev_set_tc_queue(netdev,
 293                                             kinfo->tc_info[i].tc,
 294                                             kinfo->tc_info[i].tqp_count,
 295                                             kinfo->tc_info[i].tqp_offset);
 296                 }
 297         }
 298
 299         ret = netif_set_real_num_tx_queues(netdev, queue_size);
 300         if (ret) {
 301                 netdev_err(netdev,
 302                            "netif_set_real_num_tx_queues fail, ret=%d!\n", ret);
 303                 return ret;
 304         }
 305
 306         ret = netif_set_real_num_rx_queues(netdev, queue_size);
 307         if (ret) {
 308                 netdev_err(netdev,
 309                            "netif_set_real_num_rx_queues fail, ret=%d!\n", ret);
 310                 return ret;
 311         }
 312
 313         return 0;
 314 }
 315
 316 static u16 hns3_get_max_available_channels(struct hnae3_handle *h)
 317 {
 318         u16 alloc_tqps, max_rss_size, rss_size;
 319
 320         h->ae_algo->ops->get_tqps_and_rss_info(h, &alloc_tqps, &max_rss_size);
 321         rss_size = alloc_tqps / h->kinfo.num_tc;
 322
 323         return min_t(u16, rss_size, max_rss_size);
 324 }
 325
 326 static void hns3_tqp_enable(struct hnae3_queue *tqp)
 327 {
 328         u32 rcb_reg;
 329
 330         rcb_reg = hns3_read_dev(tqp, HNS3_RING_EN_REG);
 331         rcb_reg |= BIT(HNS3_RING_EN_B);
 332         hns3_write_dev(tqp, HNS3_RING_EN_REG, rcb_reg);
 333 }
 334
 335 static void hns3_tqp_disable(struct hnae3_queue *tqp)
 336 {
 337         u32 rcb_reg;
 338
 339         rcb_reg = hns3_read_dev(tqp, HNS3_RING_EN_REG);
 340         rcb_reg &= ~BIT(HNS3_RING_EN_B);
 341         hns3_write_dev(tqp, HNS3_RING_EN_REG, rcb_reg);
 342 }
 343
 344 static void hns3_free_rx_cpu_rmap(struct net_device *netdev)
 345 {
 346 #ifdef CONFIG_RFS_ACCEL
 347         free_irq_cpu_rmap(netdev->rx_cpu_rmap);
 348         netdev->rx_cpu_rmap = NULL;
 349 #endif
 350 }
 351
 352 static int hns3_set_rx_cpu_rmap(struct net_device *netdev)
 353 {
 354 #ifdef CONFIG_RFS_ACCEL
 355         struct hns3_nic_priv *priv = netdev_priv(netdev);
 356         struct hns3_enet_tqp_vector *tqp_vector;
 357         int i, ret;
 358
 359         if (!netdev->rx_cpu_rmap) {
 360                 netdev->rx_cpu_rmap = alloc_irq_cpu_rmap(priv->vector_num);
 361                 if (!netdev->rx_cpu_rmap)
 362                         return -ENOMEM;
 363         }
 364
 365         for (i = 0; i < priv->vector_num; i++) {
 366                 tqp_vector = &priv->tqp_vector[i];
 367                 ret = irq_cpu_rmap_add(netdev->rx_cpu_rmap,
 368                                        tqp_vector->vector_irq);
 369                 if (ret) {
 370                         hns3_free_rx_cpu_rmap(netdev);
 371                         return ret;
 372                 }
 373         }
 374 #endif
 375         return 0;
 376 }
 377
 378 static int hns3_nic_net_up(struct net_device *netdev)
 379 {
 380         struct hns3_nic_priv *priv = netdev_priv(netdev);
 381         struct hnae3_handle *h = priv->ae_handle;
 382         int i, j;
 383         int ret;
 384
 385         ret = hns3_nic_reset_all_ring(h);
 386         if (ret)
 387                 return ret;
 388
 389         clear_bit(HNS3_NIC_STATE_DOWN, &priv->state);
 390
 391         /* enable the vectors */
 392         for (i = 0; i < priv->vector_num; i++)
 393                 hns3_vector_enable(&priv->tqp_vector[i]);
 394
 395         /* enable rcb */
 396         for (j = 0; j < h->kinfo.num_tqps; j++)
 397                 hns3_tqp_enable(h->kinfo.tqp[j]);
 398
 399         /* start the ae_dev */
 400         ret = h->ae_algo->ops->start ? h->ae_algo->ops->start(h) : 0;
 401         if (ret) {
 402                 set_bit(HNS3_NIC_STATE_DOWN, &priv->state);
 403                 while (j--)
 404                         hns3_tqp_disable(h->kinfo.tqp[j]);
 405
 406                 for (j = i - 1; j >= 0; j--)
 407                         hns3_vector_disable(&priv->tqp_vector[j]);
 408         }
 409
 410         return ret;
 411 }
 412
 413 static void hns3_config_xps(struct hns3_nic_priv *priv)
 414 {
 415         int i;
 416
 417         for (i = 0; i < priv->vector_num; i++) {
 418                 struct hns3_enet_tqp_vector *tqp_vector = &priv->tqp_vector[i];
 419                 struct hns3_enet_ring *ring = tqp_vector->tx_group.ring;
 420
 421                 while (ring) {
 422                         int ret;
 423
 424                         ret = netif_set_xps_queue(priv->netdev,
 425                                                   &tqp_vector->affinity_mask,
 426                                                   ring->tqp->tqp_index);
 427                         if (ret)
 428                                 netdev_warn(priv->netdev,
 429                                             "set xps queue failed: %d", ret);
 430
 431                         ring = ring->next;
 432                 }
 433         }
 434 }
 435
 436 static int hns3_nic_net_open(struct net_device *netdev)
 437 {
 438         struct hns3_nic_priv *priv = netdev_priv(netdev);
 439         struct hnae3_handle *h = hns3_get_handle(netdev);
 440         struct hnae3_knic_private_info *kinfo;
 441         int i, ret;
 442
 443         if (hns3_nic_resetting(netdev))
 444                 return -EBUSY;
 445
 446         netif_carrier_off(netdev);
 447
 448         ret = hns3_nic_set_real_num_queue(netdev);
 449         if (ret)
 450                 return ret;
 451
 452         ret = hns3_nic_net_up(netdev);
 453         if (ret) {
 454                 netdev_err(netdev, "net up fail, ret=%d!\n", ret);
 455                 return ret;
 456         }
 457
 458         kinfo = &h->kinfo;
 459         for (i = 0; i < HNAE3_MAX_USER_PRIO; i++)
 460                 netdev_set_prio_tc_map(netdev, i, kinfo->prio_tc[i]);
 461
 462         if (h->ae_algo->ops->set_timer_task)
 463                 h->ae_algo->ops->set_timer_task(priv->ae_handle, true);
 464
 465         hns3_config_xps(priv);
 466
 467         netif_dbg(h, drv, netdev, "net open\n");
 468
 469         return 0;
 470 }
 471
 472 static void hns3_reset_tx_queue(struct hnae3_handle *h)
 473 {
 474         struct net_device *ndev = h->kinfo.netdev;
 475         struct hns3_nic_priv *priv = netdev_priv(ndev);
 476         struct netdev_queue *dev_queue;
 477         u32 i;
 478
 479         for (i = 0; i < h->kinfo.num_tqps; i++) {
 480                 dev_queue = netdev_get_tx_queue(ndev,
 481                                                 priv->ring[i].queue_index);
 482                 netdev_tx_reset_queue(dev_queue);
 483         }
 484 }
 485
 486 static void hns3_nic_net_down(struct net_device *netdev)
 487 {
 488         struct hns3_nic_priv *priv = netdev_priv(netdev);
 489         struct hnae3_handle *h = hns3_get_handle(netdev);
 490         const struct hnae3_ae_ops *ops;
 491         int i;
 492
 493         /* disable vectors */
 494         for (i = 0; i < priv->vector_num; i++)
 495                 hns3_vector_disable(&priv->tqp_vector[i]);
 496
 497         /* disable rcb */
 498         for (i = 0; i < h->kinfo.num_tqps; i++)
 499                 hns3_tqp_disable(h->kinfo.tqp[i]);
 500
 501         /* stop ae_dev */
 502         ops = priv->ae_handle->ae_algo->ops;
 503         if (ops->stop)
 504                 ops->stop(priv->ae_handle);
 505
 506         /* delay ring buffer clearing to hns3_reset_notify_uninit_enet
 507          * during reset process, because driver may not be able
 508          * to disable the ring through firmware when downing the netdev.
 509          */
 510         if (!hns3_nic_resetting(netdev))
 511                 hns3_clear_all_ring(priv->ae_handle, false);
 512
 513         hns3_reset_tx_queue(priv->ae_handle);
 514 }
 515
 516 static int hns3_nic_net_stop(struct net_device *netdev)
 517 {
 518         struct hns3_nic_priv *priv = netdev_priv(netdev);
 519         struct hnae3_handle *h = hns3_get_handle(netdev);
 520
 521         if (test_and_set_bit(HNS3_NIC_STATE_DOWN, &priv->state))
 522                 return 0;
 523
 524         netif_dbg(h, drv, netdev, "net stop\n");
 525
 526         if (h->ae_algo->ops->set_timer_task)
 527                 h->ae_algo->ops->set_timer_task(priv->ae_handle, false);
 528
 529         netif_tx_stop_all_queues(netdev);
 530         netif_carrier_off(netdev);
 531
 532         hns3_nic_net_down(netdev);
 533
 534         return 0;
 535 }
 536
 537 static int hns3_nic_uc_sync(struct net_device *netdev,
 538                             const unsigned char *addr)
 539 {
 540         struct hnae3_handle *h = hns3_get_handle(netdev);
 541
 542         if (h->ae_algo->ops->add_uc_addr)
 543                 return h->ae_algo->ops->add_uc_addr(h, addr);
 544
 545         return 0;
 546 }
 547
 548 static int hns3_nic_uc_unsync(struct net_device *netdev,
 549                               const unsigned char *addr)
 550 {
 551         struct hnae3_handle *h = hns3_get_handle(netdev);
 552
 553         if (h->ae_algo->ops->rm_uc_addr)
 554                 return h->ae_algo->ops->rm_uc_addr(h, addr);
 555
 556         return 0;
 557 }
 558
 559 static int hns3_nic_mc_sync(struct net_device *netdev,
 560                             const unsigned char *addr)
 561 {
 562         struct hnae3_handle *h = hns3_get_handle(netdev);
 563
 564         if (h->ae_algo->ops->add_mc_addr)
 565                 return h->ae_algo->ops->add_mc_addr(h, addr);
 566
 567         return 0;
 568 }
 569
 570 static int hns3_nic_mc_unsync(struct net_device *netdev,
 571                               const unsigned char *addr)
 572 {
 573         struct hnae3_handle *h = hns3_get_handle(netdev);
 574
 575         if (h->ae_algo->ops->rm_mc_addr)
 576                 return h->ae_algo->ops->rm_mc_addr(h, addr);
 577
 578         return 0;
 579 }
 580
 581 static u8 hns3_get_netdev_flags(struct net_device *netdev)
 582 {
 583         u8 flags = 0;
 584
 585         if (netdev->flags & IFF_PROMISC) {
 586                 flags = HNAE3_USER_UPE | HNAE3_USER_MPE | HNAE3_BPE;
 587         } else {
 588                 flags |= HNAE3_VLAN_FLTR;
 589                 if (netdev->flags & IFF_ALLMULTI)
 590                         flags |= HNAE3_USER_MPE;
 591         }
 592
 593         return flags;
 594 }
 595
 596 static void hns3_nic_set_rx_mode(struct net_device *netdev)
 597 {
 598         struct hnae3_handle *h = hns3_get_handle(netdev);
 599         u8 new_flags;
 600         int ret;
 601
 602         new_flags = hns3_get_netdev_flags(netdev);
 603
 604         ret = __dev_uc_sync(netdev, hns3_nic_uc_sync, hns3_nic_uc_unsync);
 605         if (ret) {
 606                 netdev_err(netdev, "sync uc address fail\n");
 607                 if (ret == -ENOSPC)
 608                         new_flags |= HNAE3_OVERFLOW_UPE;
 609         }
 610
 611         if (netdev->flags & IFF_MULTICAST) {
 612                 ret = __dev_mc_sync(netdev, hns3_nic_mc_sync,
 613                                     hns3_nic_mc_unsync);
 614                 if (ret) {
 615                         netdev_err(netdev, "sync mc address fail\n");
 616                         if (ret == -ENOSPC)
 617                                 new_flags |= HNAE3_OVERFLOW_MPE;
 618                 }
 619         }
 620
 621         /* User mode Promisc mode enable and vlan filtering is disabled to
 622          * let all packets in. MAC-VLAN Table overflow Promisc enabled and
 623          * vlan fitering is enabled
 624          */
 625         hns3_enable_vlan_filter(netdev, new_flags & HNAE3_VLAN_FLTR);
 626         h->netdev_flags = new_flags;
 627         hns3_update_promisc_mode(netdev, new_flags);
 628 }
 629
 630 int hns3_update_promisc_mode(struct net_device *netdev, u8 promisc_flags)
 631 {
 632         struct hns3_nic_priv *priv = netdev_priv(netdev);
 633         struct hnae3_handle *h = priv->ae_handle;
 634
 635         if (h->ae_algo->ops->set_promisc_mode) {
 636                 return h->ae_algo->ops->set_promisc_mode(h,
 637                                                 promisc_flags & HNAE3_UPE,
 638                                                 promisc_flags & HNAE3_MPE);
 639         }
 640
 641         return 0;
 642 }
 643
 644 void hns3_enable_vlan_filter(struct net_device *netdev, bool enable)
 645 {
 646         struct hns3_nic_priv *priv = netdev_priv(netdev);
 647         struct hnae3_handle *h = priv->ae_handle;
 648         bool last_state;
 649
 650         if (h->pdev->revision >= 0x21 && h->ae_algo->ops->enable_vlan_filter) {
 651                 last_state = h->netdev_flags & HNAE3_VLAN_FLTR ? true : false;
 652                 if (enable != last_state) {
 653                         netdev_info(netdev,
 654                                     "%s vlan filter\n",
 655                                     enable ? "enable" : "disable");
 656                         h->ae_algo->ops->enable_vlan_filter(h, enable);
 657                 }
 658         }
 659 }
 660
 661 static int hns3_set_tso(struct sk_buff *skb, u32 *paylen,
 662                         u16 *mss, u32 *type_cs_vlan_tso)
 663 {
 664         u32 l4_offset, hdr_len;
 665         union l3_hdr_info l3;
 666         union l4_hdr_info l4;
 667         u32 l4_paylen;
 668         int ret;
 669
 670         if (!skb_is_gso(skb))
 671                 return 0;
 672
 673         ret = skb_cow_head(skb, 0);
 674         if (unlikely(ret < 0))
 675                 return ret;
 676
 677         l3.hdr = skb_network_header(skb);
 678         l4.hdr = skb_transport_header(skb);
 679
 680         /* Software should clear the IPv4's checksum field when tso is
 681          * needed.
 682          */
 683         if (l3.v4->version == 4)
 684                 l3.v4->check = 0;
 685
 686         /* tunnel packet */
 687         if (skb_shinfo(skb)->gso_type & (SKB_GSO_GRE |
 688                                          SKB_GSO_GRE_CSUM |
 689                                          SKB_GSO_UDP_TUNNEL |
 690                                          SKB_GSO_UDP_TUNNEL_CSUM)) {
 691                 if ((!(skb_shinfo(skb)->gso_type &
 692                     SKB_GSO_PARTIAL)) &&
 693                     (skb_shinfo(skb)->gso_type &
 694                     SKB_GSO_UDP_TUNNEL_CSUM)) {
 695                         /* Software should clear the udp's checksum
 696                          * field when tso is needed.
 697                          */
 698                         l4.udp->check = 0;
 699                 }
 700                 /* reset l3&l4 pointers from outer to inner headers */
 701                 l3.hdr = skb_inner_network_header(skb);
 702                 l4.hdr = skb_inner_transport_header(skb);
 703
 704                 /* Software should clear the IPv4's checksum field when
 705                  * tso is needed.
 706                  */
 707                 if (l3.v4->version == 4)
 708                         l3.v4->check = 0;
 709         }
 710
 711         /* normal or tunnel packet */
 712         l4_offset = l4.hdr - skb->data;
 713         hdr_len = (l4.tcp->doff << 2) + l4_offset;
 714
 715         /* remove payload length from inner pseudo checksum when tso */
 716         l4_paylen = skb->len - l4_offset;
 717         csum_replace_by_diff(&l4.tcp->check,
 718                              (__force __wsum)htonl(l4_paylen));
 719
 720         /* find the txbd field values */
 721         *paylen = skb->len - hdr_len;
 722         hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_TSO_B, 1);
 723
 724         /* get MSS for TSO */
 725         *mss = skb_shinfo(skb)->gso_size;
 726
 727         trace_hns3_tso(skb);
 728
 729         return 0;
 730 }
 731
 732 static int hns3_get_l4_protocol(struct sk_buff *skb, u8 *ol4_proto,
 733                                 u8 *il4_proto)
 734 {
 735         union l3_hdr_info l3;
 736         unsigned char *l4_hdr;
 737         unsigned char *exthdr;
 738         u8 l4_proto_tmp;
 739         __be16 frag_off;
 740
 741         /* find outer header point */
 742         l3.hdr = skb_network_header(skb);
 743         l4_hdr = skb_transport_header(skb);
 744
 745         if (skb->protocol == htons(ETH_P_IPV6)) {
 746                 exthdr = l3.hdr + sizeof(*l3.v6);
 747                 l4_proto_tmp = l3.v6->nexthdr;
 748                 if (l4_hdr != exthdr)
 749                         ipv6_skip_exthdr(skb, exthdr - skb->data,
 750                                          &l4_proto_tmp, &frag_off);
 751         } else if (skb->protocol == htons(ETH_P_IP)) {
 752                 l4_proto_tmp = l3.v4->protocol;
 753         } else {
 754                 return -EINVAL;
 755         }
 756
 757         *ol4_proto = l4_proto_tmp;
 758
 759         /* tunnel packet */
 760         if (!skb->encapsulation) {
 761                 *il4_proto = 0;
 762                 return 0;
 763         }
 764
 765         /* find inner header point */
 766         l3.hdr = skb_inner_network_header(skb);
 767         l4_hdr = skb_inner_transport_header(skb);
 768
 769         if (l3.v6->version == 6) {
 770                 exthdr = l3.hdr + sizeof(*l3.v6);
 771                 l4_proto_tmp = l3.v6->nexthdr;
 772                 if (l4_hdr != exthdr)
 773                         ipv6_skip_exthdr(skb, exthdr - skb->data,
 774                                          &l4_proto_tmp, &frag_off);
 775         } else if (l3.v4->version == 4) {
 776                 l4_proto_tmp = l3.v4->protocol;
 777         }
 778
 779         *il4_proto = l4_proto_tmp;
 780
 781         return 0;
 782 }
 783
 784 /* when skb->encapsulation is 0, skb->ip_summed is CHECKSUM_PARTIAL
 785  * and it is udp packet, which has a dest port as the IANA assigned.
 786  * the hardware is expected to do the checksum offload, but the
 787  * hardware will not do the checksum offload when udp dest port is
 788  * 4789.
 789  */
 790 static bool hns3_tunnel_csum_bug(struct sk_buff *skb)
 791 {
 792         union l4_hdr_info l4;
 793
 794         l4.hdr = skb_transport_header(skb);
 795
 796         if (!(!skb->encapsulation &&
 797               l4.udp->dest == htons(IANA_VXLAN_UDP_PORT)))
 798                 return false;
 799
 800         skb_checksum_help(skb);
 801
 802         return true;
 803 }
 804
 805 static void hns3_set_outer_l2l3l4(struct sk_buff *skb, u8 ol4_proto,
 806                                   u32 *ol_type_vlan_len_msec)
 807 {
 808         u32 l2_len, l3_len, l4_len;
 809         unsigned char *il2_hdr;
 810         union l3_hdr_info l3;
 811         union l4_hdr_info l4;
 812
 813         l3.hdr = skb_network_header(skb);
 814         l4.hdr = skb_transport_header(skb);
 815
 816         /* compute OL2 header size, defined in 2 Bytes */
 817         l2_len = l3.hdr - skb->data;
 818         hns3_set_field(*ol_type_vlan_len_msec, HNS3_TXD_L2LEN_S, l2_len >> 1);
 819
 820         /* compute OL3 header size, defined in 4 Bytes */
 821         l3_len = l4.hdr - l3.hdr;
 822         hns3_set_field(*ol_type_vlan_len_msec, HNS3_TXD_L3LEN_S, l3_len >> 2);
 823
 824         il2_hdr = skb_inner_mac_header(skb);
 825         /* compute OL4 header size, defined in 4 Bytes */
 826         l4_len = il2_hdr - l4.hdr;
 827         hns3_set_field(*ol_type_vlan_len_msec, HNS3_TXD_L4LEN_S, l4_len >> 2);
 828
 829         /* define outer network header type */
 830         if (skb->protocol == htons(ETH_P_IP)) {
 831                 if (skb_is_gso(skb))
 832                         hns3_set_field(*ol_type_vlan_len_msec,
 833                                        HNS3_TXD_OL3T_S,
 834                                        HNS3_OL3T_IPV4_CSUM);
 835                 else
 836                         hns3_set_field(*ol_type_vlan_len_msec,
 837                                        HNS3_TXD_OL3T_S,
 838                                        HNS3_OL3T_IPV4_NO_CSUM);
 839
 840         } else if (skb->protocol == htons(ETH_P_IPV6)) {
 841                 hns3_set_field(*ol_type_vlan_len_msec, HNS3_TXD_OL3T_S,
 842                                HNS3_OL3T_IPV6);
 843         }
 844
 845         if (ol4_proto == IPPROTO_UDP)
 846                 hns3_set_field(*ol_type_vlan_len_msec, HNS3_TXD_TUNTYPE_S,
 847                                HNS3_TUN_MAC_IN_UDP);
 848         else if (ol4_proto == IPPROTO_GRE)
 849                 hns3_set_field(*ol_type_vlan_len_msec, HNS3_TXD_TUNTYPE_S,
 850                                HNS3_TUN_NVGRE);
 851 }
 852
 853 static int hns3_set_l2l3l4(struct sk_buff *skb, u8 ol4_proto,
 854                            u8 il4_proto, u32 *type_cs_vlan_tso,
 855                            u32 *ol_type_vlan_len_msec)
 856 {
 857         unsigned char *l2_hdr = skb->data;
 858         u32 l4_proto = ol4_proto;
 859         union l4_hdr_info l4;
 860         union l3_hdr_info l3;
 861         u32 l2_len, l3_len;
 862
 863         l4.hdr = skb_transport_header(skb);
 864         l3.hdr = skb_network_header(skb);
 865
 866         /* handle encapsulation skb */
 867         if (skb->encapsulation) {
 868                 /* If this is a not UDP/GRE encapsulation skb */
 869                 if (!(ol4_proto == IPPROTO_UDP || ol4_proto == IPPROTO_GRE)) {
 870                         /* drop the skb tunnel packet if hardware don't support,
 871                          * because hardware can't calculate csum when TSO.
 872                          */
 873                         if (skb_is_gso(skb))
 874                                 return -EDOM;
 875
 876                         /* the stack computes the IP header already,
 877                          * driver calculate l4 checksum when not TSO.
 878                          */
 879                         skb_checksum_help(skb);
 880                         return 0;
 881                 }
 882
 883                 hns3_set_outer_l2l3l4(skb, ol4_proto, ol_type_vlan_len_msec);
 884
 885                 /* switch to inner header */
 886                 l2_hdr = skb_inner_mac_header(skb);
 887                 l3.hdr = skb_inner_network_header(skb);
 888                 l4.hdr = skb_inner_transport_header(skb);
 889                 l4_proto = il4_proto;
 890         }
 891
 892         if (l3.v4->version == 4) {
 893                 hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L3T_S,
 894                                HNS3_L3T_IPV4);
 895
 896                 /* the stack computes the IP header already, the only time we
 897                  * need the hardware to recompute it is in the case of TSO.
 898                  */
 899                 if (skb_is_gso(skb))
 900                         hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L3CS_B, 1);
 901         } else if (l3.v6->version == 6) {
 902                 hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L3T_S,
 903                                HNS3_L3T_IPV6);
 904         }
 905
 906         /* compute inner(/normal) L2 header size, defined in 2 Bytes */
 907         l2_len = l3.hdr - l2_hdr;
 908         hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L2LEN_S, l2_len >> 1);
 909
 910         /* compute inner(/normal) L3 header size, defined in 4 Bytes */
 911         l3_len = l4.hdr - l3.hdr;
 912         hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L3LEN_S, l3_len >> 2);
 913
 914         /* compute inner(/normal) L4 header size, defined in 4 Bytes */
 915         switch (l4_proto) {
 916         case IPPROTO_TCP:
 917                 hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L4CS_B, 1);
 918                 hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L4T_S,
 919                                HNS3_L4T_TCP);
 920                 hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L4LEN_S,
 921                                l4.tcp->doff);
 922                 break;
 923         case IPPROTO_UDP:
 924                 if (hns3_tunnel_csum_bug(skb))
 925                         break;
 926
 927                 hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L4CS_B, 1);
 928                 hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L4T_S,
 929                                HNS3_L4T_UDP);
 930                 hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L4LEN_S,
 931                                (sizeof(struct udphdr) >> 2));
 932                 break;
 933         case IPPROTO_SCTP:
 934                 hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L4CS_B, 1);
 935                 hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L4T_S,
 936                                HNS3_L4T_SCTP);
 937                 hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L4LEN_S,
 938                                (sizeof(struct sctphdr) >> 2));
 939                 break;
 940         default:
 941                 /* drop the skb tunnel packet if hardware don't support,
 942                  * because hardware can't calculate csum when TSO.
 943                  */
 944                 if (skb_is_gso(skb))
 945                         return -EDOM;
 946
 947                 /* the stack computes the IP header already,
 948                  * driver calculate l4 checksum when not TSO.
 949                  */
 950                 skb_checksum_help(skb);
 951                 return 0;
 952         }
 953
 954         return 0;
 955 }
 956
 957 static int hns3_handle_vtags(struct hns3_enet_ring *tx_ring,
 958                              struct sk_buff *skb)
 959 {
 960         struct hnae3_handle *handle = tx_ring->tqp->handle;
 961         struct vlan_ethhdr *vhdr;
 962         int rc;
 963
 964         if (!(skb->protocol == htons(ETH_P_8021Q) ||
 965               skb_vlan_tag_present(skb)))
 966                 return 0;
 967
 968         /* Since HW limitation, if port based insert VLAN enabled, only one VLAN
 969          * header is allowed in skb, otherwise it will cause RAS error.
 970          */
 971         if (unlikely(skb_vlan_tagged_multi(skb) &&
 972                      handle->port_base_vlan_state ==
 973                      HNAE3_PORT_BASE_VLAN_ENABLE))
 974                 return -EINVAL;
 975
 976         if (skb->protocol == htons(ETH_P_8021Q) &&
 977             !(handle->kinfo.netdev->features & NETIF_F_HW_VLAN_CTAG_TX)) {
 978                 /* When HW VLAN acceleration is turned off, and the stack
 979                  * sets the protocol to 802.1q, the driver just need to
 980                  * set the protocol to the encapsulated ethertype.
 981                  */
 982                 skb->protocol = vlan_get_protocol(skb);
 983                 return 0;
 984         }
 985
 986         if (skb_vlan_tag_present(skb)) {
 987                 /* Based on hw strategy, use out_vtag in two layer tag case,
 988                  * and use inner_vtag in one tag case.
 989                  */
 990                 if (skb->protocol == htons(ETH_P_8021Q) &&
 991                     handle->port_base_vlan_state ==
 992                     HNAE3_PORT_BASE_VLAN_DISABLE)
 993                         rc = HNS3_OUTER_VLAN_TAG;
 994                 else
 995                         rc = HNS3_INNER_VLAN_TAG;
 996
 997                 skb->protocol = vlan_get_protocol(skb);
 998                 return rc;
 999         }
1000
1001         rc = skb_cow_head(skb, 0);
1002         if (unlikely(rc < 0))
1003                 return rc;
1004
1005         vhdr = (struct vlan_ethhdr *)skb->data;
1006         vhdr->h_vlan_TCI |= cpu_to_be16((skb->priority << VLAN_PRIO_SHIFT)
1007                                          & VLAN_PRIO_MASK);
1008
1009         skb->protocol = vlan_get_protocol(skb);
1010         return 0;
1011 }
1012
1013 static int hns3_fill_skb_desc(struct hns3_enet_ring *ring,
1014                               struct sk_buff *skb, struct hns3_desc *desc)
1015 {
1016         u32 ol_type_vlan_len_msec = 0;
1017         u32 type_cs_vlan_tso = 0;
1018         u32 paylen = skb->len;
1019         u16 inner_vtag = 0;
1020         u16 out_vtag = 0;
1021         u16 mss = 0;
1022         int ret;
1023
1024         ret = hns3_handle_vtags(ring, skb);
1025         if (unlikely(ret < 0)) {
1026                 u64_stats_update_begin(&ring->syncp);
1027                 ring->stats.tx_vlan_err++;
1028                 u64_stats_update_end(&ring->syncp);
1029                 return ret;
1030         } else if (ret == HNS3_INNER_VLAN_TAG) {
1031                 inner_vtag = skb_vlan_tag_get(skb);
1032                 inner_vtag |= (skb->priority << VLAN_PRIO_SHIFT) &
1033                                 VLAN_PRIO_MASK;
1034                 hns3_set_field(type_cs_vlan_tso, HNS3_TXD_VLAN_B, 1);
1035         } else if (ret == HNS3_OUTER_VLAN_TAG) {
1036                 out_vtag = skb_vlan_tag_get(skb);
1037                 out_vtag |= (skb->priority << VLAN_PRIO_SHIFT) &
1038                                 VLAN_PRIO_MASK;
1039                 hns3_set_field(ol_type_vlan_len_msec, HNS3_TXD_OVLAN_B,
1040                                1);
1041         }
1042
1043         if (skb->ip_summed == CHECKSUM_PARTIAL) {
1044                 u8 ol4_proto, il4_proto;
1045
1046                 skb_reset_mac_len(skb);
1047
1048                 ret = hns3_get_l4_protocol(skb, &ol4_proto, &il4_proto);
1049                 if (unlikely(ret < 0)) {
1050                         u64_stats_update_begin(&ring->syncp);
1051                         ring->stats.tx_l4_proto_err++;
1052                         u64_stats_update_end(&ring->syncp);
1053                         return ret;
1054                 }
1055
1056                 ret = hns3_set_l2l3l4(skb, ol4_proto, il4_proto,
1057                                       &type_cs_vlan_tso,
1058                                       &ol_type_vlan_len_msec);
1059                 if (unlikely(ret < 0)) {
1060                         u64_stats_update_begin(&ring->syncp);
1061                         ring->stats.tx_l2l3l4_err++;
1062                         u64_stats_update_end(&ring->syncp);
1063                         return ret;
1064                 }
1065
1066                 ret = hns3_set_tso(skb, &paylen, &mss,
1067                                    &type_cs_vlan_tso);
1068                 if (unlikely(ret < 0)) {
1069                         u64_stats_update_begin(&ring->syncp);
1070                         ring->stats.tx_tso_err++;
1071                         u64_stats_update_end(&ring->syncp);
1072                         return ret;
1073                 }
1074         }
1075
1076         /* Set txbd */
1077         desc->tx.ol_type_vlan_len_msec =
1078                 cpu_to_le32(ol_type_vlan_len_msec);
1079         desc->tx.type_cs_vlan_tso_len = cpu_to_le32(type_cs_vlan_tso);
1080         desc->tx.paylen = cpu_to_le32(paylen);
1081         desc->tx.mss = cpu_to_le16(mss);
1082         desc->tx.vlan_tag = cpu_to_le16(inner_vtag);
1083         desc->tx.outer_vlan_tag = cpu_to_le16(out_vtag);
1084
1085         return 0;
1086 }
1087
1088 static int hns3_fill_desc(struct hns3_enet_ring *ring, void *priv,
1089                           unsigned int size, enum hns_desc_type type)
1090 {
1091 #define HNS3_LIKELY_BD_NUM      1
1092
1093         struct hns3_desc_cb *desc_cb = &ring->desc_cb[ring->next_to_use];
1094         struct hns3_desc *desc = &ring->desc[ring->next_to_use];
1095         struct device *dev = ring_to_dev(ring);
1096         skb_frag_t *frag;
1097         unsigned int frag_buf_num;
1098         int k, sizeoflast;
1099         dma_addr_t dma;
1100
1101         if (type == DESC_TYPE_SKB) {
1102                 struct sk_buff *skb = (struct sk_buff *)priv;
1103                 int ret;
1104
1105                 ret = hns3_fill_skb_desc(ring, skb, desc);
1106                 if (unlikely(ret < 0))
1107                         return ret;
1108
1109                 dma = dma_map_single(dev, skb->data, size, DMA_TO_DEVICE);
1110         } else {
1111                 frag = (skb_frag_t *)priv;
1112                 dma = skb_frag_dma_map(dev, frag, 0, size, DMA_TO_DEVICE);
1113         }
1114
1115         if (unlikely(dma_mapping_error(dev, dma))) {
1116                 u64_stats_update_begin(&ring->syncp);
1117                 ring->stats.sw_err_cnt++;
1118                 u64_stats_update_end(&ring->syncp);
1119                 return -ENOMEM;
1120         }
1121
1122         desc_cb->length = size;
1123
1124         if (likely(size <= HNS3_MAX_BD_SIZE)) {
1125                 desc_cb->priv = priv;
1126                 desc_cb->dma = dma;
1127                 desc_cb->type = type;
1128                 desc->addr = cpu_to_le64(dma);
1129                 desc->tx.send_size = cpu_to_le16(size);
1130                 desc->tx.bdtp_fe_sc_vld_ra_ri =
1131                         cpu_to_le16(BIT(HNS3_TXD_VLD_B));
1132
1133                 trace_hns3_tx_desc(ring, ring->next_to_use);
1134                 ring_ptr_move_fw(ring, next_to_use);
1135                 return HNS3_LIKELY_BD_NUM;
1136         }
1137
1138         frag_buf_num = hns3_tx_bd_count(size);
1139         sizeoflast = size & HNS3_TX_LAST_SIZE_M;
1140         sizeoflast = sizeoflast ? sizeoflast : HNS3_MAX_BD_SIZE;
1141
1142         /* When frag size is bigger than hardware limit, split this frag */
1143         for (k = 0; k < frag_buf_num; k++) {
1144                 /* The txbd's baseinfo of DESC_TYPE_PAGE & DESC_TYPE_SKB */
1145                 desc_cb->priv = priv;
1146                 desc_cb->dma = dma + HNS3_MAX_BD_SIZE * k;
1147                 desc_cb->type = (type == DESC_TYPE_SKB && !k) ?
1148                                 DESC_TYPE_SKB : DESC_TYPE_PAGE;
1149
1150                 /* now, fill the descriptor */
1151                 desc->addr = cpu_to_le64(dma + HNS3_MAX_BD_SIZE * k);
1152                 desc->tx.send_size = cpu_to_le16((k == frag_buf_num - 1) ?
1153                                      (u16)sizeoflast : (u16)HNS3_MAX_BD_SIZE);
1154                 desc->tx.bdtp_fe_sc_vld_ra_ri =
1155                                 cpu_to_le16(BIT(HNS3_TXD_VLD_B));
1156
1157                 trace_hns3_tx_desc(ring, ring->next_to_use);
1158                 /* move ring pointer to next */
1159                 ring_ptr_move_fw(ring, next_to_use);
1160
1161                 desc_cb = &ring->desc_cb[ring->next_to_use];
1162                 desc = &ring->desc[ring->next_to_use];
1163         }
1164
1165         return frag_buf_num;
1166 }
1167
1168 static unsigned int hns3_skb_bd_num(struct sk_buff *skb, unsigned int *bd_size,
1169                                     unsigned int bd_num)
1170 {
1171         unsigned int size;
1172         int i;
1173
1174         size = skb_headlen(skb);
1175         while (size > HNS3_MAX_BD_SIZE) {
1176                 bd_size[bd_num++] = HNS3_MAX_BD_SIZE;
1177                 size -= HNS3_MAX_BD_SIZE;
1178
1179                 if (bd_num > HNS3_MAX_TSO_BD_NUM)
1180                         return bd_num;
1181         }
1182
1183         if (size) {
1184                 bd_size[bd_num++] = size;
1185                 if (bd_num > HNS3_MAX_TSO_BD_NUM)
1186                         return bd_num;
1187         }
1188
1189         for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
1190                 skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
1191                 size = skb_frag_size(frag);
1192                 if (!size)
1193                         continue;
1194
1195                 while (size > HNS3_MAX_BD_SIZE) {
1196                         bd_size[bd_num++] = HNS3_MAX_BD_SIZE;
1197                         size -= HNS3_MAX_BD_SIZE;
1198
1199                         if (bd_num > HNS3_MAX_TSO_BD_NUM)
1200                                 return bd_num;
1201                 }
1202
1203                 bd_size[bd_num++] = size;
1204                 if (bd_num > HNS3_MAX_TSO_BD_NUM)
1205                         return bd_num;
1206         }
1207
1208         return bd_num;
1209 }
1210
1211 static unsigned int hns3_tx_bd_num(struct sk_buff *skb, unsigned int *bd_size)
1212 {
1213         struct sk_buff *frag_skb;
1214         unsigned int bd_num = 0;
1215
1216         /* If the total len is within the max bd limit */
1217         if (likely(skb->len <= HNS3_MAX_BD_SIZE && !skb_has_frag_list(skb) &&
1218                    skb_shinfo(skb)->nr_frags < HNS3_MAX_NON_TSO_BD_NUM))
1219                 return skb_shinfo(skb)->nr_frags + 1U;
1220
1221         /* The below case will always be linearized, return
1222          * HNS3_MAX_BD_NUM_TSO + 1U to make sure it is linearized.
1223          */
1224         if (unlikely(skb->len > HNS3_MAX_TSO_SIZE ||
1225                      (!skb_is_gso(skb) && skb->len > HNS3_MAX_NON_TSO_SIZE)))
1226                 return HNS3_MAX_TSO_BD_NUM + 1U;
1227
1228         bd_num = hns3_skb_bd_num(skb, bd_size, bd_num);
1229
1230         if (!skb_has_frag_list(skb) || bd_num > HNS3_MAX_TSO_BD_NUM)
1231                 return bd_num;
1232
1233         skb_walk_frags(skb, frag_skb) {
1234                 bd_num = hns3_skb_bd_num(frag_skb, bd_size, bd_num);
1235                 if (bd_num > HNS3_MAX_TSO_BD_NUM)
1236                         return bd_num;
1237         }
1238
1239         return bd_num;
1240 }
1241
1242 static unsigned int hns3_gso_hdr_len(struct sk_buff *skb)
1243 {
1244         if (!skb->encapsulation)
1245                 return skb_transport_offset(skb) + tcp_hdrlen(skb);
1246
1247         return skb_inner_transport_offset(skb) + inner_tcp_hdrlen(skb);
1248 }
1249
1250 /* HW need every continuous 8 buffer data to be larger than MSS,
1251  * we simplify it by ensuring skb_headlen + the first continuous
1252  * 7 frags to to be larger than gso header len + mss, and the remaining
1253  * continuous 7 frags to be larger than MSS except the last 7 frags.
1254  */
1255 static bool hns3_skb_need_linearized(struct sk_buff *skb, unsigned int *bd_size,
1256                                      unsigned int bd_num)
1257 {
1258         unsigned int tot_len = 0;
1259         int i;
1260
1261         for (i = 0; i < HNS3_MAX_NON_TSO_BD_NUM - 1U; i++)
1262                 tot_len += bd_size[i];
1263
1264         /* ensure the first 8 frags is greater than mss + header */
1265         if (tot_len + bd_size[HNS3_MAX_NON_TSO_BD_NUM - 1U] <
1266             skb_shinfo(skb)->gso_size + hns3_gso_hdr_len(skb))
1267                 return true;
1268
1269         /* ensure every continuous 7 buffer is greater than mss
1270          * except the last one.
1271          */
1272         for (i = 0; i < bd_num - HNS3_MAX_NON_TSO_BD_NUM; i++) {
1273                 tot_len -= bd_size[i];
1274                 tot_len += bd_size[i + HNS3_MAX_NON_TSO_BD_NUM - 1U];
1275
1276                 if (tot_len < skb_shinfo(skb)->gso_size)
1277                         return true;
1278         }
1279
1280         return false;
1281 }
1282
1283 void hns3_shinfo_pack(struct skb_shared_info *shinfo, __u32 *size)
1284 {
1285         int i = 0;
1286
1287         for (i = 0; i < MAX_SKB_FRAGS; i++)
1288                 size[i] = skb_frag_size(&shinfo->frags[i]);
1289 }
1290
1291 static int hns3_nic_maybe_stop_tx(struct hns3_enet_ring *ring,
1292                                   struct net_device *netdev,
1293                                   struct sk_buff *skb)
1294 {
1295         struct hns3_nic_priv *priv = netdev_priv(netdev);
1296         unsigned int bd_size[HNS3_MAX_TSO_BD_NUM + 1U];
1297         unsigned int bd_num;
1298
1299         bd_num = hns3_tx_bd_num(skb, bd_size);
1300         if (unlikely(bd_num > HNS3_MAX_NON_TSO_BD_NUM)) {
1301                 if (bd_num <= HNS3_MAX_TSO_BD_NUM && skb_is_gso(skb) &&
1302                     !hns3_skb_need_linearized(skb, bd_size, bd_num)) {
1303                         trace_hns3_over_8bd(skb);
1304                         goto out;
1305                 }
1306
1307                 if (__skb_linearize(skb))
1308                         return -ENOMEM;
1309
1310                 bd_num = hns3_tx_bd_count(skb->len);
1311                 if ((skb_is_gso(skb) && bd_num > HNS3_MAX_TSO_BD_NUM) ||
1312                     (!skb_is_gso(skb) &&
1313                      bd_num > HNS3_MAX_NON_TSO_BD_NUM)) {
1314                         trace_hns3_over_8bd(skb);
1315                         return -ENOMEM;
1316                 }
1317
1318                 u64_stats_update_begin(&ring->syncp);
1319                 ring->stats.tx_copy++;
1320                 u64_stats_update_end(&ring->syncp);
1321         }
1322
1323 out:
1324         if (likely(ring_space(ring) >= bd_num))
1325                 return bd_num;
1326
1327         netif_stop_subqueue(netdev, ring->queue_index);
1328         smp_mb(); /* Memory barrier before checking ring_space */
1329
1330         /* Start queue in case hns3_clean_tx_ring has just made room
1331          * available and has not seen the queue stopped state performed
1332          * by netif_stop_subqueue above.
1333          */
1334         if (ring_space(ring) >= bd_num && netif_carrier_ok(netdev) &&
1335             !test_bit(HNS3_NIC_STATE_DOWN, &priv->state)) {
1336                 netif_start_subqueue(netdev, ring->queue_index);
1337                 return bd_num;
1338         }
1339
1340         return -EBUSY;
1341 }
1342
1343 static void hns3_clear_desc(struct hns3_enet_ring *ring, int next_to_use_orig)
1344 {
1345         struct device *dev = ring_to_dev(ring);
1346         unsigned int i;
1347
1348         for (i = 0; i < ring->desc_num; i++) {
1349                 /* check if this is where we started */
1350                 if (ring->next_to_use == next_to_use_orig)
1351                         break;
1352
1353                 /* rollback one */
1354                 ring_ptr_move_bw(ring, next_to_use);
1355
1356                 /* unmap the descriptor dma address */
1357                 if (ring->desc_cb[ring->next_to_use].type == DESC_TYPE_SKB)
1358                         dma_unmap_single(dev,
1359                                          ring->desc_cb[ring->next_to_use].dma,
1360                                         ring->desc_cb[ring->next_to_use].length,
1361                                         DMA_TO_DEVICE);
1362                 else if (ring->desc_cb[ring->next_to_use].length)
1363                         dma_unmap_page(dev,
1364                                        ring->desc_cb[ring->next_to_use].dma,
1365                                        ring->desc_cb[ring->next_to_use].length,
1366                                        DMA_TO_DEVICE);
1367
1368                 ring->desc_cb[ring->next_to_use].length = 0;
1369                 ring->desc_cb[ring->next_to_use].dma = 0;
1370         }
1371 }
1372
1373 static int hns3_fill_skb_to_desc(struct hns3_enet_ring *ring,
1374                                  struct sk_buff *skb, enum hns_desc_type type)
1375 {
1376         unsigned int size = skb_headlen(skb);
1377         int i, ret, bd_num = 0;
1378
1379         if (size) {
1380                 ret = hns3_fill_desc(ring, skb, size, type);
1381                 if (unlikely(ret < 0))
1382                         return ret;
1383
1384                 bd_num += ret;
1385         }
1386
1387         for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
1388                 skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
1389
1390                 size = skb_frag_size(frag);
1391                 if (!size)
1392                         continue;
1393
1394                 ret = hns3_fill_desc(ring, frag, size, DESC_TYPE_PAGE);
1395                 if (unlikely(ret < 0))
1396                         return ret;
1397
1398                 bd_num += ret;
1399         }
1400
1401         return bd_num;
1402 }
1403
1404 netdev_tx_t hns3_nic_net_xmit(struct sk_buff *skb, struct net_device *netdev)
1405 {
1406         struct hns3_nic_priv *priv = netdev_priv(netdev);
1407         struct hns3_enet_ring *ring = &priv->ring[skb->queue_mapping];
1408         struct netdev_queue *dev_queue;
1409         int pre_ntu, next_to_use_head;
1410         struct sk_buff *frag_skb;
1411         int bd_num = 0;
1412         int ret;
1413
1414         /* Hardware can only handle short frames above 32 bytes */
1415         if (skb_put_padto(skb, HNS3_MIN_TX_LEN))
1416                 return NETDEV_TX_OK;
1417
1418         /* Prefetch the data used later */
1419         prefetch(skb->data);
1420
1421         ret = hns3_nic_maybe_stop_tx(ring, netdev, skb);
1422         if (unlikely(ret <= 0)) {
1423                 if (ret == -EBUSY) {
1424                         u64_stats_update_begin(&ring->syncp);
1425                         ring->stats.tx_busy++;
1426                         u64_stats_update_end(&ring->syncp);
1427                         return NETDEV_TX_BUSY;
1428                 } else if (ret == -ENOMEM) {
1429                         u64_stats_update_begin(&ring->syncp);
1430                         ring->stats.sw_err_cnt++;
1431                         u64_stats_update_end(&ring->syncp);
1432                 }
1433
1434                 hns3_rl_err(netdev, "xmit error: %d!\n", ret);
1435                 goto out_err_tx_ok;
1436         }
1437
1438         next_to_use_head = ring->next_to_use;
1439
1440         ret = hns3_fill_skb_to_desc(ring, skb, DESC_TYPE_SKB);
1441         if (unlikely(ret < 0))
1442                 goto fill_err;
1443
1444         bd_num += ret;
1445
1446         if (!skb_has_frag_list(skb))
1447                 goto out;
1448
1449         skb_walk_frags(skb, frag_skb) {
1450                 ret = hns3_fill_skb_to_desc(ring, frag_skb, DESC_TYPE_PAGE);
1451                 if (unlikely(ret < 0))
1452                         goto fill_err;
1453
1454                 bd_num += ret;
1455         }
1456 out:
1457         pre_ntu = ring->next_to_use ? (ring->next_to_use - 1) :
1458                                         (ring->desc_num - 1);
1459         ring->desc[pre_ntu].tx.bdtp_fe_sc_vld_ra_ri |=
1460                                 cpu_to_le16(BIT(HNS3_TXD_FE_B));
1461         trace_hns3_tx_desc(ring, pre_ntu);
1462
1463         /* Complete translate all packets */
1464         dev_queue = netdev_get_tx_queue(netdev, ring->queue_index);
1465         netdev_tx_sent_queue(dev_queue, skb->len);
1466
1467         wmb(); /* Commit all data before submit */
1468
1469         hnae3_queue_xmit(ring->tqp, bd_num);
1470
1471         return NETDEV_TX_OK;
1472
1473 fill_err:
1474         hns3_clear_desc(ring, next_to_use_head);
1475
1476 out_err_tx_ok:
1477         dev_kfree_skb_any(skb);
1478         return NETDEV_TX_OK;
1479 }
1480
1481 static int hns3_nic_net_set_mac_address(struct net_device *netdev, void *p)
1482 {
1483         struct hnae3_handle *h = hns3_get_handle(netdev);
1484         struct sockaddr *mac_addr = p;
1485         int ret;
1486
1487         if (!mac_addr || !is_valid_ether_addr((const u8 *)mac_addr->sa_data))
1488                 return -EADDRNOTAVAIL;
1489
1490         if (ether_addr_equal(netdev->dev_addr, mac_addr->sa_data)) {
1491                 netdev_info(netdev, "already using mac address %pM\n",
1492                             mac_addr->sa_data);
1493                 return 0;
1494         }
1495
1496         /* For VF device, if there is a perm_addr, then the user will not
1497          * be allowed to change the address.
1498          */
1499         if (!hns3_is_phys_func(h->pdev) &&
1500             !is_zero_ether_addr(netdev->perm_addr)) {
1501                 netdev_err(netdev, "has permanent MAC %pM, user MAC %pM not allow\n",
1502                            netdev->perm_addr, mac_addr->sa_data);
1503                 return -EPERM;
1504         }
1505
1506         ret = h->ae_algo->ops->set_mac_addr(h, mac_addr->sa_data, false);
1507         if (ret) {
1508                 netdev_err(netdev, "set_mac_address fail, ret=%d!\n", ret);
1509                 return ret;
1510         }
1511
1512         ether_addr_copy(netdev->dev_addr, mac_addr->sa_data);
1513
1514         return 0;
1515 }
1516
1517 static int hns3_nic_do_ioctl(struct net_device *netdev,
1518                              struct ifreq *ifr, int cmd)
1519 {
1520         struct hnae3_handle *h = hns3_get_handle(netdev);
1521
1522         if (!netif_running(netdev))
1523                 return -EINVAL;
1524
1525         if (!h->ae_algo->ops->do_ioctl)
1526                 return -EOPNOTSUPP;
1527
1528         return h->ae_algo->ops->do_ioctl(h, ifr, cmd);
1529 }
1530
1531 static int hns3_nic_set_features(struct net_device *netdev,
1532                                  netdev_features_t features)
1533 {
1534         netdev_features_t changed = netdev->features ^ features;
1535         struct hns3_nic_priv *priv = netdev_priv(netdev);
1536         struct hnae3_handle *h = priv->ae_handle;
1537         bool enable;
1538         int ret;
1539
1540         if (changed & (NETIF_F_GRO_HW) && h->ae_algo->ops->set_gro_en) {
1541                 enable = !!(features & NETIF_F_GRO_HW);
1542                 ret = h->ae_algo->ops->set_gro_en(h, enable);
1543                 if (ret)
1544                         return ret;
1545         }
1546
1547         if ((changed & NETIF_F_HW_VLAN_CTAG_FILTER) &&
1548             h->ae_algo->ops->enable_vlan_filter) {
1549                 enable = !!(features & NETIF_F_HW_VLAN_CTAG_FILTER);
1550                 h->ae_algo->ops->enable_vlan_filter(h, enable);
1551         }
1552
1553         if ((changed & NETIF_F_HW_VLAN_CTAG_RX) &&
1554             h->ae_algo->ops->enable_hw_strip_rxvtag) {
1555                 enable = !!(features & NETIF_F_HW_VLAN_CTAG_RX);
1556                 ret = h->ae_algo->ops->enable_hw_strip_rxvtag(h, enable);
1557                 if (ret)
1558                         return ret;
1559         }
1560
1561         if ((changed & NETIF_F_NTUPLE) && h->ae_algo->ops->enable_fd) {
1562                 enable = !!(features & NETIF_F_NTUPLE);
1563                 h->ae_algo->ops->enable_fd(h, enable);
1564         }
1565
1566         netdev->features = features;
1567         return 0;
1568 }
1569
1570 static netdev_features_t hns3_features_check(struct sk_buff *skb,
1571                                              struct net_device *dev,
1572                                              netdev_features_t features)
1573 {
1574 #define HNS3_MAX_HDR_LEN        480U
1575 #define HNS3_MAX_L4_HDR_LEN     60U
1576
1577         size_t len;
1578
1579         if (skb->ip_summed != CHECKSUM_PARTIAL)
1580                 return features;
1581
1582         if (skb->encapsulation)
1583                 len = skb_inner_transport_header(skb) - skb->data;
1584         else
1585                 len = skb_transport_header(skb) - skb->data;
1586
1587         /* Assume L4 is 60 byte as TCP is the only protocol with a
1588          * a flexible value, and it's max len is 60 bytes.
1589          */
1590         len += HNS3_MAX_L4_HDR_LEN;
1591
1592         /* Hardware only supports checksum on the skb with a max header
1593          * len of 480 bytes.
1594          */
1595         if (len > HNS3_MAX_HDR_LEN)
1596                 features &= ~(NETIF_F_CSUM_MASK | NETIF_F_GSO_MASK);
1597
1598         return features;
1599 }
1600
1601 static void hns3_nic_get_stats64(struct net_device *netdev,
1602                                  struct rtnl_link_stats64 *stats)
1603 {
1604         struct hns3_nic_priv *priv = netdev_priv(netdev);
1605         int queue_num = priv->ae_handle->kinfo.num_tqps;
1606         struct hnae3_handle *handle = priv->ae_handle;
1607         struct hns3_enet_ring *ring;
1608         u64 rx_length_errors = 0;
1609         u64 rx_crc_errors = 0;
1610         u64 rx_multicast = 0;
1611         unsigned int start;
1612         u64 tx_errors = 0;
1613         u64 rx_errors = 0;
1614         unsigned int idx;
1615         u64 tx_bytes = 0;
1616         u64 rx_bytes = 0;
1617         u64 tx_pkts = 0;
1618         u64 rx_pkts = 0;
1619         u64 tx_drop = 0;
1620         u64 rx_drop = 0;
1621
1622         if (test_bit(HNS3_NIC_STATE_DOWN, &priv->state))
1623                 return;
1624
1625         handle->ae_algo->ops->update_stats(handle, &netdev->stats);
1626
1627         for (idx = 0; idx < queue_num; idx++) {
1628                 /* fetch the tx stats */
1629                 ring = &priv->ring[idx];
1630                 do {
1631                         start = u64_stats_fetch_begin_irq(&ring->syncp);
1632                         tx_bytes += ring->stats.tx_bytes;
1633                         tx_pkts += ring->stats.tx_pkts;
1634                         tx_drop += ring->stats.sw_err_cnt;
1635                         tx_drop += ring->stats.tx_vlan_err;
1636                         tx_drop += ring->stats.tx_l4_proto_err;
1637                         tx_drop += ring->stats.tx_l2l3l4_err;
1638                         tx_drop += ring->stats.tx_tso_err;
1639                         tx_errors += ring->stats.sw_err_cnt;
1640                         tx_errors += ring->stats.tx_vlan_err;
1641                         tx_errors += ring->stats.tx_l4_proto_err;
1642                         tx_errors += ring->stats.tx_l2l3l4_err;
1643                         tx_errors += ring->stats.tx_tso_err;
1644                 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
1645
1646                 /* fetch the rx stats */
1647                 ring = &priv->ring[idx + queue_num];
1648                 do {
1649                         start = u64_stats_fetch_begin_irq(&ring->syncp);
1650                         rx_bytes += ring->stats.rx_bytes;
1651                         rx_pkts += ring->stats.rx_pkts;
1652                         rx_drop += ring->stats.l2_err;
1653                         rx_errors += ring->stats.l2_err;
1654                         rx_errors += ring->stats.l3l4_csum_err;
1655                         rx_crc_errors += ring->stats.l2_err;
1656                         rx_multicast += ring->stats.rx_multicast;
1657                         rx_length_errors += ring->stats.err_pkt_len;
1658                 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
1659         }
1660
1661         stats->tx_bytes = tx_bytes;
1662         stats->tx_packets = tx_pkts;
1663         stats->rx_bytes = rx_bytes;
1664         stats->rx_packets = rx_pkts;
1665
1666         stats->rx_errors = rx_errors;
1667         stats->multicast = rx_multicast;
1668         stats->rx_length_errors = rx_length_errors;
1669         stats->rx_crc_errors = rx_crc_errors;
1670         stats->rx_missed_errors = netdev->stats.rx_missed_errors;
1671
1672         stats->tx_errors = tx_errors;
1673         stats->rx_dropped = rx_drop;
1674         stats->tx_dropped = tx_drop;
1675         stats->collisions = netdev->stats.collisions;
1676         stats->rx_over_errors = netdev->stats.rx_over_errors;
1677         stats->rx_frame_errors = netdev->stats.rx_frame_errors;
1678         stats->rx_fifo_errors = netdev->stats.rx_fifo_errors;
1679         stats->tx_aborted_errors = netdev->stats.tx_aborted_errors;
1680         stats->tx_carrier_errors = netdev->stats.tx_carrier_errors;
1681         stats->tx_fifo_errors = netdev->stats.tx_fifo_errors;
1682         stats->tx_heartbeat_errors = netdev->stats.tx_heartbeat_errors;
1683         stats->tx_window_errors = netdev->stats.tx_window_errors;
1684         stats->rx_compressed = netdev->stats.rx_compressed;
1685         stats->tx_compressed = netdev->stats.tx_compressed;
1686 }
1687
1688 static int hns3_setup_tc(struct net_device *netdev, void *type_data)
1689 {
1690         struct tc_mqprio_qopt_offload *mqprio_qopt = type_data;
1691         u8 *prio_tc = mqprio_qopt->qopt.prio_tc_map;
1692         struct hnae3_knic_private_info *kinfo;
1693         u8 tc = mqprio_qopt->qopt.num_tc;
1694         u16 mode = mqprio_qopt->mode;
1695         u8 hw = mqprio_qopt->qopt.hw;
1696         struct hnae3_handle *h;
1697
1698         if (!((hw == TC_MQPRIO_HW_OFFLOAD_TCS &&
1699                mode == TC_MQPRIO_MODE_CHANNEL) || (!hw && tc == 0)))
1700                 return -EOPNOTSUPP;
1701
1702         if (tc > HNAE3_MAX_TC)
1703                 return -EINVAL;
1704
1705         if (!netdev)
1706                 return -EINVAL;
1707
1708         h = hns3_get_handle(netdev);
1709         kinfo = &h->kinfo;
1710
1711         netif_dbg(h, drv, netdev, "setup tc: num_tc=%u\n", tc);
1712
1713         return (kinfo->dcb_ops && kinfo->dcb_ops->setup_tc) ?
1714                 kinfo->dcb_ops->setup_tc(h, tc, prio_tc) : -EOPNOTSUPP;
1715 }
1716
1717 static int hns3_nic_setup_tc(struct net_device *dev, enum tc_setup_type type,
1718                              void *type_data)
1719 {
1720         if (type != TC_SETUP_QDISC_MQPRIO)
1721                 return -EOPNOTSUPP;
1722
1723         return hns3_setup_tc(dev, type_data);
1724 }
1725
1726 static int hns3_vlan_rx_add_vid(struct net_device *netdev,
1727                                 __be16 proto, u16 vid)
1728 {
1729         struct hnae3_handle *h = hns3_get_handle(netdev);
1730         int ret = -EIO;
1731
1732         if (h->ae_algo->ops->set_vlan_filter)
1733                 ret = h->ae_algo->ops->set_vlan_filter(h, proto, vid, false);
1734
1735         return ret;
1736 }
1737
1738 static int hns3_vlan_rx_kill_vid(struct net_device *netdev,
1739                                  __be16 proto, u16 vid)
1740 {
1741         struct hnae3_handle *h = hns3_get_handle(netdev);
1742         int ret = -EIO;
1743
1744         if (h->ae_algo->ops->set_vlan_filter)
1745                 ret = h->ae_algo->ops->set_vlan_filter(h, proto, vid, true);
1746
1747         return ret;
1748 }
1749
1750 static int hns3_ndo_set_vf_vlan(struct net_device *netdev, int vf, u16 vlan,
1751                                 u8 qos, __be16 vlan_proto)
1752 {
1753         struct hnae3_handle *h = hns3_get_handle(netdev);
1754         int ret = -EIO;
1755
1756         netif_dbg(h, drv, netdev,
1757                   "set vf vlan: vf=%d, vlan=%u, qos=%u, vlan_proto=0x%x\n",
1758                   vf, vlan, qos, ntohs(vlan_proto));
1759
1760         if (h->ae_algo->ops->set_vf_vlan_filter)
1761                 ret = h->ae_algo->ops->set_vf_vlan_filter(h, vf, vlan,
1762                                                           qos, vlan_proto);
1763
1764         return ret;
1765 }
1766
1767 static int hns3_set_vf_spoofchk(struct net_device *netdev, int vf, bool enable)
1768 {
1769         struct hnae3_handle *handle = hns3_get_handle(netdev);
1770
1771         if (hns3_nic_resetting(netdev))
1772                 return -EBUSY;
1773
1774         if (!handle->ae_algo->ops->set_vf_spoofchk)
1775                 return -EOPNOTSUPP;
1776
1777         return handle->ae_algo->ops->set_vf_spoofchk(handle, vf, enable);
1778 }
1779
1780 static int hns3_set_vf_trust(struct net_device *netdev, int vf, bool enable)
1781 {
1782         struct hnae3_handle *handle = hns3_get_handle(netdev);
1783
1784         if (!handle->ae_algo->ops->set_vf_trust)
1785                 return -EOPNOTSUPP;
1786
1787         return handle->ae_algo->ops->set_vf_trust(handle, vf, enable);
1788 }
1789
1790 static int hns3_nic_change_mtu(struct net_device *netdev, int new_mtu)
1791 {
1792         struct hnae3_handle *h = hns3_get_handle(netdev);
1793         int ret;
1794
1795         if (hns3_nic_resetting(netdev))
1796                 return -EBUSY;
1797
1798         if (!h->ae_algo->ops->set_mtu)
1799                 return -EOPNOTSUPP;
1800
1801         netif_dbg(h, drv, netdev,
1802                   "change mtu from %u to %d\n", netdev->mtu, new_mtu);
1803
1804         ret = h->ae_algo->ops->set_mtu(h, new_mtu);
1805         if (ret)
1806                 netdev_err(netdev, "failed to change MTU in hardware %d\n",
1807                            ret);
1808         else
1809                 netdev->mtu = new_mtu;
1810
1811         return ret;
1812 }
1813
1814 static bool hns3_get_tx_timeo_queue_info(struct net_device *ndev)
1815 {
1816         struct hns3_nic_priv *priv = netdev_priv(ndev);
1817         struct hnae3_handle *h = hns3_get_handle(ndev);
1818         struct hns3_enet_ring *tx_ring;
1819         struct napi_struct *napi;
1820         int timeout_queue = 0;
1821         int hw_head, hw_tail;
1822         int fbd_num, fbd_oft;
1823         int ebd_num, ebd_oft;
1824         int bd_num, bd_err;
1825         int ring_en, tc;
1826         int i;
1827
1828         /* Find the stopped queue the same way the stack does */
1829         for (i = 0; i < ndev->num_tx_queues; i++) {
1830                 struct netdev_queue *q;
1831                 unsigned long trans_start;
1832
1833                 q = netdev_get_tx_queue(ndev, i);
1834                 trans_start = q->trans_start;
1835                 if (netif_xmit_stopped(q) &&
1836                     time_after(jiffies,
1837                                (trans_start + ndev->watchdog_timeo))) {
1838                         timeout_queue = i;
1839                         netdev_info(ndev, "queue state: 0x%lx, delta msecs: %u\n",
1840                                     q->state,
1841                                     jiffies_to_msecs(jiffies - trans_start));
1842                         break;
1843                 }
1844         }
1845
1846         if (i == ndev->num_tx_queues) {
1847                 netdev_info(ndev,
1848                             "no netdev TX timeout queue found, timeout count: %llu\n",
1849                             priv->tx_timeout_count);
1850                 return false;
1851         }
1852
1853         priv->tx_timeout_count++;
1854
1855         tx_ring = &priv->ring[timeout_queue];
1856         napi = &tx_ring->tqp_vector->napi;
1857
1858         netdev_info(ndev,
1859                     "tx_timeout count: %llu, queue id: %d, SW_NTU: 0x%x, SW_NTC: 0x%x, napi state: %lu\n",
1860                     priv->tx_timeout_count, timeout_queue, tx_ring->next_to_use,
1861                     tx_ring->next_to_clean, napi->state);
1862
1863         netdev_info(ndev,
1864                     "tx_pkts: %llu, tx_bytes: %llu, io_err_cnt: %llu, sw_err_cnt: %llu\n",
1865                     tx_ring->stats.tx_pkts, tx_ring->stats.tx_bytes,
1866                     tx_ring->stats.io_err_cnt, tx_ring->stats.sw_err_cnt);
1867
1868         netdev_info(ndev,
1869                     "seg_pkt_cnt: %llu, tx_err_cnt: %llu, restart_queue: %llu, tx_busy: %llu\n",
1870                     tx_ring->stats.seg_pkt_cnt, tx_ring->stats.tx_err_cnt,
1871                     tx_ring->stats.restart_queue, tx_ring->stats.tx_busy);
1872
1873         /* When mac received many pause frames continuous, it's unable to send
1874          * packets, which may cause tx timeout
1875          */
1876         if (h->ae_algo->ops->get_mac_stats) {
1877                 struct hns3_mac_stats mac_stats;
1878
1879                 h->ae_algo->ops->get_mac_stats(h, &mac_stats);
1880                 netdev_info(ndev, "tx_pause_cnt: %llu, rx_pause_cnt: %llu\n",
1881                             mac_stats.tx_pause_cnt, mac_stats.rx_pause_cnt);
1882         }
1883
1884         hw_head = readl_relaxed(tx_ring->tqp->io_base +
1885                                 HNS3_RING_TX_RING_HEAD_REG);
1886         hw_tail = readl_relaxed(tx_ring->tqp->io_base +
1887                                 HNS3_RING_TX_RING_TAIL_REG);
1888         fbd_num = readl_relaxed(tx_ring->tqp->io_base +
1889                                 HNS3_RING_TX_RING_FBDNUM_REG);
1890         fbd_oft = readl_relaxed(tx_ring->tqp->io_base +
1891                                 HNS3_RING_TX_RING_OFFSET_REG);
1892         ebd_num = readl_relaxed(tx_ring->tqp->io_base +
1893                                 HNS3_RING_TX_RING_EBDNUM_REG);
1894         ebd_oft = readl_relaxed(tx_ring->tqp->io_base +
1895                                 HNS3_RING_TX_RING_EBD_OFFSET_REG);
1896         bd_num = readl_relaxed(tx_ring->tqp->io_base +
1897                                HNS3_RING_TX_RING_BD_NUM_REG);
1898         bd_err = readl_relaxed(tx_ring->tqp->io_base +
1899                                HNS3_RING_TX_RING_BD_ERR_REG);
1900         ring_en = readl_relaxed(tx_ring->tqp->io_base + HNS3_RING_EN_REG);
1901         tc = readl_relaxed(tx_ring->tqp->io_base + HNS3_RING_TX_RING_TC_REG);
1902
1903         netdev_info(ndev,
1904                     "BD_NUM: 0x%x HW_HEAD: 0x%x, HW_TAIL: 0x%x, BD_ERR: 0x%x, INT: 0x%x\n",
1905                     bd_num, hw_head, hw_tail, bd_err,
1906                     readl(tx_ring->tqp_vector->mask_addr));
1907         netdev_info(ndev,
1908                     "RING_EN: 0x%x, TC: 0x%x, FBD_NUM: 0x%x FBD_OFT: 0x%x, EBD_NUM: 0x%x, EBD_OFT: 0x%x\n",
1909                     ring_en, tc, fbd_num, fbd_oft, ebd_num, ebd_oft);
1910
1911         return true;
1912 }
1913
1914 static void hns3_nic_net_timeout(struct net_device *ndev, unsigned int txqueue)
1915 {
1916         struct hns3_nic_priv *priv = netdev_priv(ndev);
1917         struct hnae3_handle *h = priv->ae_handle;
1918
1919         if (!hns3_get_tx_timeo_queue_info(ndev))
1920                 return;
1921
1922         /* request the reset, and let the hclge to determine
1923          * which reset level should be done
1924          */
1925         if (h->ae_algo->ops->reset_event)
1926                 h->ae_algo->ops->reset_event(h->pdev, h);
1927 }
1928
1929 #ifdef CONFIG_RFS_ACCEL
1930 static int hns3_rx_flow_steer(struct net_device *dev, const struct sk_buff *skb,
1931                               u16 rxq_index, u32 flow_id)
1932 {
1933         struct hnae3_handle *h = hns3_get_handle(dev);
1934         struct flow_keys fkeys;
1935
1936         if (!h->ae_algo->ops->add_arfs_entry)
1937                 return -EOPNOTSUPP;
1938
1939         if (skb->encapsulation)
1940                 return -EPROTONOSUPPORT;
1941
1942         if (!skb_flow_dissect_flow_keys(skb, &fkeys, 0))
1943                 return -EPROTONOSUPPORT;
1944
1945         if ((fkeys.basic.n_proto != htons(ETH_P_IP) &&
1946              fkeys.basic.n_proto != htons(ETH_P_IPV6)) ||
1947             (fkeys.basic.ip_proto != IPPROTO_TCP &&
1948              fkeys.basic.ip_proto != IPPROTO_UDP))
1949                 return -EPROTONOSUPPORT;
1950
1951         return h->ae_algo->ops->add_arfs_entry(h, rxq_index, flow_id, &fkeys);
1952 }
1953 #endif
1954
1955 static int hns3_nic_get_vf_config(struct net_device *ndev, int vf,
1956                                   struct ifla_vf_info *ivf)
1957 {
1958         struct hnae3_handle *h = hns3_get_handle(ndev);
1959
1960         if (!h->ae_algo->ops->get_vf_config)
1961                 return -EOPNOTSUPP;
1962
1963         return h->ae_algo->ops->get_vf_config(h, vf, ivf);
1964 }
1965
1966 static int hns3_nic_set_vf_link_state(struct net_device *ndev, int vf,
1967                                       int link_state)
1968 {
1969         struct hnae3_handle *h = hns3_get_handle(ndev);
1970
1971         if (!h->ae_algo->ops->set_vf_link_state)
1972                 return -EOPNOTSUPP;
1973
1974         return h->ae_algo->ops->set_vf_link_state(h, vf, link_state);
1975 }
1976
1977 static int hns3_nic_set_vf_rate(struct net_device *ndev, int vf,
1978                                 int min_tx_rate, int max_tx_rate)
1979 {
1980         struct hnae3_handle *h = hns3_get_handle(ndev);
1981
1982         if (!h->ae_algo->ops->set_vf_rate)
1983                 return -EOPNOTSUPP;
1984
1985         return h->ae_algo->ops->set_vf_rate(h, vf, min_tx_rate, max_tx_rate,
1986                                             false);
1987 }
1988
1989 static int hns3_nic_set_vf_mac(struct net_device *netdev, int vf_id, u8 *mac)
1990 {
1991         struct hnae3_handle *h = hns3_get_handle(netdev);
1992
1993         if (!h->ae_algo->ops->set_vf_mac)
1994                 return -EOPNOTSUPP;
1995
1996         if (is_multicast_ether_addr(mac)) {
1997                 netdev_err(netdev,
1998                            "Invalid MAC:%pM specified. Could not set MAC\n",
1999                            mac);
2000                 return -EINVAL;
2001         }
2002
2003         return h->ae_algo->ops->set_vf_mac(h, vf_id, mac);
2004 }
2005
2006 static const struct net_device_ops hns3_nic_netdev_ops = {
2007         .ndo_open               = hns3_nic_net_open,
2008         .ndo_stop               = hns3_nic_net_stop,
2009         .ndo_start_xmit         = hns3_nic_net_xmit,
2010         .ndo_tx_timeout         = hns3_nic_net_timeout,
2011         .ndo_set_mac_address    = hns3_nic_net_set_mac_address,
2012         .ndo_do_ioctl           = hns3_nic_do_ioctl,
2013         .ndo_change_mtu         = hns3_nic_change_mtu,
2014         .ndo_set_features       = hns3_nic_set_features,
2015         .ndo_features_check     = hns3_features_check,
2016         .ndo_get_stats64        = hns3_nic_get_stats64,
2017         .ndo_setup_tc           = hns3_nic_setup_tc,
2018         .ndo_set_rx_mode        = hns3_nic_set_rx_mode,
2019         .ndo_vlan_rx_add_vid    = hns3_vlan_rx_add_vid,
2020         .ndo_vlan_rx_kill_vid   = hns3_vlan_rx_kill_vid,
2021         .ndo_set_vf_vlan        = hns3_ndo_set_vf_vlan,
2022         .ndo_set_vf_spoofchk    = hns3_set_vf_spoofchk,
2023         .ndo_set_vf_trust       = hns3_set_vf_trust,
2024 #ifdef CONFIG_RFS_ACCEL
2025         .ndo_rx_flow_steer      = hns3_rx_flow_steer,
2026 #endif
2027         .ndo_get_vf_config      = hns3_nic_get_vf_config,
2028         .ndo_set_vf_link_state  = hns3_nic_set_vf_link_state,
2029         .ndo_set_vf_rate        = hns3_nic_set_vf_rate,
2030         .ndo_set_vf_mac         = hns3_nic_set_vf_mac,
2031 };
2032
2033 bool hns3_is_phys_func(struct pci_dev *pdev)
2034 {
2035         u32 dev_id = pdev->device;
2036
2037         switch (dev_id) {
2038         case HNAE3_DEV_ID_GE:
2039         case HNAE3_DEV_ID_25GE:
2040         case HNAE3_DEV_ID_25GE_RDMA:
2041         case HNAE3_DEV_ID_25GE_RDMA_MACSEC:
2042         case HNAE3_DEV_ID_50GE_RDMA:
2043         case HNAE3_DEV_ID_50GE_RDMA_MACSEC:
2044         case HNAE3_DEV_ID_100G_RDMA_MACSEC:
2045                 return true;
2046         case HNAE3_DEV_ID_100G_VF:
2047         case HNAE3_DEV_ID_100G_RDMA_DCB_PFC_VF:
2048                 return false;
2049         default:
2050                 dev_warn(&pdev->dev, "un-recognized pci device-id %u",
2051                          dev_id);
2052         }
2053
2054         return false;
2055 }
2056
2057 static void hns3_disable_sriov(struct pci_dev *pdev)
2058 {
2059         /* If our VFs are assigned we cannot shut down SR-IOV
2060          * without causing issues, so just leave the hardware
2061          * available but disabled
2062          */
2063         if (pci_vfs_assigned(pdev)) {
2064                 dev_warn(&pdev->dev,
2065                          "disabling driver while VFs are assigned\n");
2066                 return;
2067         }
2068
2069         pci_disable_sriov(pdev);
2070 }
2071
2072 static void hns3_get_dev_capability(struct pci_dev *pdev,
2073                                     struct hnae3_ae_dev *ae_dev)
2074 {
2075         if (pdev->revision >= 0x21) {
2076                 hnae3_set_bit(ae_dev->flag, HNAE3_DEV_SUPPORT_FD_B, 1);
2077                 hnae3_set_bit(ae_dev->flag, HNAE3_DEV_SUPPORT_GRO_B, 1);
2078         }
2079 }
2080
2081 /* hns3_probe - Device initialization routine
2082  * @pdev: PCI device information struct
2083  * @ent: entry in hns3_pci_tbl
2084  *
2085  * hns3_probe initializes a PF identified by a pci_dev structure.
2086  * The OS initialization, configuring of the PF private structure,
2087  * and a hardware reset occur.
2088  *
2089  * Returns 0 on success, negative on failure
2090  */
2091 static int hns3_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
2092 {
2093         struct hnae3_ae_dev *ae_dev;
2094         int ret;
2095
2096         ae_dev = devm_kzalloc(&pdev->dev, sizeof(*ae_dev), GFP_KERNEL);
2097         if (!ae_dev)
2098                 return -ENOMEM;
2099
2100         ae_dev->pdev = pdev;
2101         ae_dev->flag = ent->driver_data;
2102         ae_dev->reset_type = HNAE3_NONE_RESET;
2103         hns3_get_dev_capability(pdev, ae_dev);
2104         pci_set_drvdata(pdev, ae_dev);
2105
2106         ret = hnae3_register_ae_dev(ae_dev);
2107         if (ret) {
2108                 devm_kfree(&pdev->dev, ae_dev);
2109                 pci_set_drvdata(pdev, NULL);
2110         }
2111
2112         return ret;
2113 }
2114
2115 /* hns3_remove - Device removal routine
2116  * @pdev: PCI device information struct
2117  */
2118 static void hns3_remove(struct pci_dev *pdev)
2119 {
2120         struct hnae3_ae_dev *ae_dev = pci_get_drvdata(pdev);
2121
2122         if (hns3_is_phys_func(pdev) && IS_ENABLED(CONFIG_PCI_IOV))
2123                 hns3_disable_sriov(pdev);
2124
2125         hnae3_unregister_ae_dev(ae_dev);
2126         pci_set_drvdata(pdev, NULL);
2127 }
2128
2129 /**
2130  * hns3_pci_sriov_configure
2131  * @pdev: pointer to a pci_dev structure
2132  * @num_vfs: number of VFs to allocate
2133  *
2134  * Enable or change the number of VFs. Called when the user updates the number
2135  * of VFs in sysfs.
2136  **/
2137 static int hns3_pci_sriov_configure(struct pci_dev *pdev, int num_vfs)
2138 {
2139         int ret;
2140
2141         if (!(hns3_is_phys_func(pdev) && IS_ENABLED(CONFIG_PCI_IOV))) {
2142                 dev_warn(&pdev->dev, "Can not config SRIOV\n");
2143                 return -EINVAL;
2144         }
2145
2146         if (num_vfs) {
2147                 ret = pci_enable_sriov(pdev, num_vfs);
2148                 if (ret)
2149                         dev_err(&pdev->dev, "SRIOV enable failed %d\n", ret);
2150                 else
2151                         return num_vfs;
2152         } else if (!pci_vfs_assigned(pdev)) {
2153                 pci_disable_sriov(pdev);
2154         } else {
2155                 dev_warn(&pdev->dev,
2156                          "Unable to free VFs because some are assigned to VMs.\n");
2157         }
2158
2159         return 0;
2160 }
2161
2162 static void hns3_shutdown(struct pci_dev *pdev)
2163 {
2164         struct hnae3_ae_dev *ae_dev = pci_get_drvdata(pdev);
2165
2166         hnae3_unregister_ae_dev(ae_dev);
2167         devm_kfree(&pdev->dev, ae_dev);
2168         pci_set_drvdata(pdev, NULL);
2169
2170         if (system_state == SYSTEM_POWER_OFF)
2171                 pci_set_power_state(pdev, PCI_D3hot);
2172 }
2173
2174 static pci_ers_result_t hns3_error_detected(struct pci_dev *pdev,
2175                                             pci_channel_state_t state)
2176 {
2177         struct hnae3_ae_dev *ae_dev = pci_get_drvdata(pdev);
2178         pci_ers_result_t ret;
2179
2180         dev_info(&pdev->dev, "PCI error detected, state(=%d)!!\n", state);
2181
2182         if (state == pci_channel_io_perm_failure)
2183                 return PCI_ERS_RESULT_DISCONNECT;
2184
2185         if (!ae_dev || !ae_dev->ops) {
2186                 dev_err(&pdev->dev,
2187                         "Can't recover - error happened before device initialized\n");
2188                 return PCI_ERS_RESULT_NONE;
2189         }
2190
2191         if (ae_dev->ops->handle_hw_ras_error)
2192                 ret = ae_dev->ops->handle_hw_ras_error(ae_dev);
2193         else
2194                 return PCI_ERS_RESULT_NONE;
2195
2196         return ret;
2197 }
2198
2199 static pci_ers_result_t hns3_slot_reset(struct pci_dev *pdev)
2200 {
2201         struct hnae3_ae_dev *ae_dev = pci_get_drvdata(pdev);
2202         const struct hnae3_ae_ops *ops;
2203         enum hnae3_reset_type reset_type;
2204         struct device *dev = &pdev->dev;
2205
2206         if (!ae_dev || !ae_dev->ops)
2207                 return PCI_ERS_RESULT_NONE;
2208
2209         ops = ae_dev->ops;
2210         /* request the reset */
2211         if (ops->reset_event && ops->get_reset_level &&
2212             ops->set_default_reset_request) {
2213                 if (ae_dev->hw_err_reset_req) {
2214                         reset_type = ops->get_reset_level(ae_dev,
2215                                                 &ae_dev->hw_err_reset_req);
2216                         ops->set_default_reset_request(ae_dev, reset_type);
2217                         dev_info(dev, "requesting reset due to PCI error\n");
2218                         ops->reset_event(pdev, NULL);
2219                 }
2220
2221                 return PCI_ERS_RESULT_RECOVERED;
2222         }
2223
2224         return PCI_ERS_RESULT_DISCONNECT;
2225 }
2226
2227 static void hns3_reset_prepare(struct pci_dev *pdev)
2228 {
2229         struct hnae3_ae_dev *ae_dev = pci_get_drvdata(pdev);
2230
2231         dev_info(&pdev->dev, "hns3 flr prepare\n");
2232         if (ae_dev && ae_dev->ops && ae_dev->ops->flr_prepare)
2233                 ae_dev->ops->flr_prepare(ae_dev);
2234 }
2235
2236 static void hns3_reset_done(struct pci_dev *pdev)
2237 {
2238         struct hnae3_ae_dev *ae_dev = pci_get_drvdata(pdev);
2239
2240         dev_info(&pdev->dev, "hns3 flr done\n");
2241         if (ae_dev && ae_dev->ops && ae_dev->ops->flr_done)
2242                 ae_dev->ops->flr_done(ae_dev);
2243 }
2244
2245 static const struct pci_error_handlers hns3_err_handler = {
2246         .error_detected = hns3_error_detected,
2247         .slot_reset     = hns3_slot_reset,
2248         .reset_prepare  = hns3_reset_prepare,
2249         .reset_done     = hns3_reset_done,
2250 };
2251
2252 static struct pci_driver hns3_driver = {
2253         .name     = hns3_driver_name,
2254         .id_table = hns3_pci_tbl,
2255         .probe    = hns3_probe,
2256         .remove   = hns3_remove,
2257         .shutdown = hns3_shutdown,
2258         .sriov_configure = hns3_pci_sriov_configure,
2259         .err_handler    = &hns3_err_handler,
2260 };
2261
2262 /* set default feature to hns3 */
2263 static void hns3_set_default_feature(struct net_device *netdev)
2264 {
2265         struct hnae3_handle *h = hns3_get_handle(netdev);
2266         struct pci_dev *pdev = h->pdev;
2267
2268         netdev->priv_flags |= IFF_UNICAST_FLT;
2269
2270         netdev->hw_enc_features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
2271                 NETIF_F_RXCSUM | NETIF_F_SG | NETIF_F_GSO |
2272                 NETIF_F_GRO | NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_GSO_GRE |
2273                 NETIF_F_GSO_GRE_CSUM | NETIF_F_GSO_UDP_TUNNEL |
2274                 NETIF_F_GSO_UDP_TUNNEL_CSUM | NETIF_F_SCTP_CRC |
2275                 NETIF_F_TSO_MANGLEID | NETIF_F_FRAGLIST;
2276
2277         netdev->gso_partial_features |= NETIF_F_GSO_GRE_CSUM;
2278
2279         netdev->features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
2280                 NETIF_F_HW_VLAN_CTAG_FILTER |
2281                 NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX |
2282                 NETIF_F_RXCSUM | NETIF_F_SG | NETIF_F_GSO |
2283                 NETIF_F_GRO | NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_GSO_GRE |
2284                 NETIF_F_GSO_GRE_CSUM | NETIF_F_GSO_UDP_TUNNEL |
2285                 NETIF_F_GSO_UDP_TUNNEL_CSUM | NETIF_F_SCTP_CRC |
2286                 NETIF_F_FRAGLIST;
2287
2288         netdev->vlan_features |=
2289                 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM | NETIF_F_RXCSUM |
2290                 NETIF_F_SG | NETIF_F_GSO | NETIF_F_GRO |
2291                 NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_GSO_GRE |
2292                 NETIF_F_GSO_GRE_CSUM | NETIF_F_GSO_UDP_TUNNEL |
2293                 NETIF_F_GSO_UDP_TUNNEL_CSUM | NETIF_F_SCTP_CRC |
2294                 NETIF_F_FRAGLIST;
2295
2296         netdev->hw_features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
2297                 NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX |
2298                 NETIF_F_RXCSUM | NETIF_F_SG | NETIF_F_GSO |
2299                 NETIF_F_GRO | NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_GSO_GRE |
2300                 NETIF_F_GSO_GRE_CSUM | NETIF_F_GSO_UDP_TUNNEL |
2301                 NETIF_F_GSO_UDP_TUNNEL_CSUM | NETIF_F_SCTP_CRC |
2302                 NETIF_F_FRAGLIST;
2303
2304         if (pdev->revision >= 0x21) {
2305                 netdev->hw_features |= NETIF_F_GRO_HW;
2306                 netdev->features |= NETIF_F_GRO_HW;
2307
2308                 if (!(h->flags & HNAE3_SUPPORT_VF)) {
2309                         netdev->hw_features |= NETIF_F_NTUPLE;
2310                         netdev->features |= NETIF_F_NTUPLE;
2311                 }
2312         }
2313 }
2314
2315 static int hns3_alloc_buffer(struct hns3_enet_ring *ring,
2316                              struct hns3_desc_cb *cb)
2317 {
2318         unsigned int order = hns3_page_order(ring);
2319         struct page *p;
2320
2321         p = dev_alloc_pages(order);
2322         if (!p)
2323                 return -ENOMEM;
2324
2325         cb->priv = p;
2326         cb->page_offset = 0;
2327         cb->reuse_flag = 0;
2328         cb->buf  = page_address(p);
2329         cb->length = hns3_page_size(ring);
2330         cb->type = DESC_TYPE_PAGE;
2331
2332         return 0;
2333 }
2334
2335 static void hns3_free_buffer(struct hns3_enet_ring *ring,
2336                              struct hns3_desc_cb *cb)
2337 {
2338         if (cb->type == DESC_TYPE_SKB)
2339                 dev_kfree_skb_any((struct sk_buff *)cb->priv);
2340         else if (!HNAE3_IS_TX_RING(ring))
2341                 put_page((struct page *)cb->priv);
2342         memset(cb, 0, sizeof(*cb));
2343 }
2344
2345 static int hns3_map_buffer(struct hns3_enet_ring *ring, struct hns3_desc_cb *cb)
2346 {
2347         cb->dma = dma_map_page(ring_to_dev(ring), cb->priv, 0,
2348                                cb->length, ring_to_dma_dir(ring));
2349
2350         if (unlikely(dma_mapping_error(ring_to_dev(ring), cb->dma)))
2351                 return -EIO;
2352
2353         return 0;
2354 }
2355
2356 static void hns3_unmap_buffer(struct hns3_enet_ring *ring,
2357                               struct hns3_desc_cb *cb)
2358 {
2359         if (cb->type == DESC_TYPE_SKB)
2360                 dma_unmap_single(ring_to_dev(ring), cb->dma, cb->length,
2361                                  ring_to_dma_dir(ring));
2362         else if (cb->length)
2363                 dma_unmap_page(ring_to_dev(ring), cb->dma, cb->length,
2364                                ring_to_dma_dir(ring));
2365 }
2366
2367 static void hns3_buffer_detach(struct hns3_enet_ring *ring, int i)
2368 {
2369         hns3_unmap_buffer(ring, &ring->desc_cb[i]);
2370         ring->desc[i].addr = 0;
2371 }
2372
2373 static void hns3_free_buffer_detach(struct hns3_enet_ring *ring, int i)
2374 {
2375         struct hns3_desc_cb *cb = &ring->desc_cb[i];
2376
2377         if (!ring->desc_cb[i].dma)
2378                 return;
2379
2380         hns3_buffer_detach(ring, i);
2381         hns3_free_buffer(ring, cb);
2382 }
2383
2384 static void hns3_free_buffers(struct hns3_enet_ring *ring)
2385 {
2386         int i;
2387
2388         for (i = 0; i < ring->desc_num; i++)
2389                 hns3_free_buffer_detach(ring, i);
2390 }
2391
2392 /* free desc along with its attached buffer */
2393 static void hns3_free_desc(struct hns3_enet_ring *ring)
2394 {
2395         int size = ring->desc_num * sizeof(ring->desc[0]);
2396
2397         hns3_free_buffers(ring);
2398
2399         if (ring->desc) {
2400                 dma_free_coherent(ring_to_dev(ring), size,
2401                                   ring->desc, ring->desc_dma_addr);
2402                 ring->desc = NULL;
2403         }
2404 }
2405
2406 static int hns3_alloc_desc(struct hns3_enet_ring *ring)
2407 {
2408         int size = ring->desc_num * sizeof(ring->desc[0]);
2409
2410         ring->desc = dma_alloc_coherent(ring_to_dev(ring), size,
2411                                         &ring->desc_dma_addr, GFP_KERNEL);
2412         if (!ring->desc)
2413                 return -ENOMEM;
2414
2415         return 0;
2416 }
2417
2418 static int hns3_reserve_buffer_map(struct hns3_enet_ring *ring,
2419                                    struct hns3_desc_cb *cb)
2420 {
2421         int ret;
2422
2423         ret = hns3_alloc_buffer(ring, cb);
2424         if (ret)
2425                 goto out;
2426
2427         ret = hns3_map_buffer(ring, cb);
2428         if (ret)
2429                 goto out_with_buf;
2430
2431         return 0;
2432
2433 out_with_buf:
2434         hns3_free_buffer(ring, cb);
2435 out:
2436         return ret;
2437 }
2438
2439 static int hns3_alloc_buffer_attach(struct hns3_enet_ring *ring, int i)
2440 {
2441         int ret = hns3_reserve_buffer_map(ring, &ring->desc_cb[i]);
2442
2443         if (ret)
2444                 return ret;
2445
2446         ring->desc[i].addr = cpu_to_le64(ring->desc_cb[i].dma);
2447
2448         return 0;
2449 }
2450
2451 /* Allocate memory for raw pkg, and map with dma */
2452 static int hns3_alloc_ring_buffers(struct hns3_enet_ring *ring)
2453 {
2454         int i, j, ret;
2455
2456         for (i = 0; i < ring->desc_num; i++) {
2457                 ret = hns3_alloc_buffer_attach(ring, i);
2458                 if (ret)
2459                         goto out_buffer_fail;
2460         }
2461
2462         return 0;
2463
2464 out_buffer_fail:
2465         for (j = i - 1; j >= 0; j--)
2466                 hns3_free_buffer_detach(ring, j);
2467         return ret;
2468 }
2469
2470 /* detach a in-used buffer and replace with a reserved one */
2471 static void hns3_replace_buffer(struct hns3_enet_ring *ring, int i,
2472                                 struct hns3_desc_cb *res_cb)
2473 {
2474         hns3_unmap_buffer(ring, &ring->desc_cb[i]);
2475         ring->desc_cb[i] = *res_cb;
2476         ring->desc[i].addr = cpu_to_le64(ring->desc_cb[i].dma);
2477         ring->desc[i].rx.bd_base_info = 0;
2478 }
2479
2480 static void hns3_reuse_buffer(struct hns3_enet_ring *ring, int i)
2481 {
2482         ring->desc_cb[i].reuse_flag = 0;
2483         ring->desc[i].addr = cpu_to_le64(ring->desc_cb[i].dma +
2484                                          ring->desc_cb[i].page_offset);
2485         ring->desc[i].rx.bd_base_info = 0;
2486 }
2487
2488 static void hns3_nic_reclaim_desc(struct hns3_enet_ring *ring, int head,
2489                                   int *bytes, int *pkts)
2490 {
2491         int ntc = ring->next_to_clean;
2492         struct hns3_desc_cb *desc_cb;
2493
2494         while (head != ntc) {
2495                 desc_cb = &ring->desc_cb[ntc];
2496                 (*pkts) += (desc_cb->type == DESC_TYPE_SKB);
2497                 (*bytes) += desc_cb->length;
2498                 /* desc_cb will be cleaned, after hnae3_free_buffer_detach */
2499                 hns3_free_buffer_detach(ring, ntc);
2500
2501                 if (++ntc == ring->desc_num)
2502                         ntc = 0;
2503
2504                 /* Issue prefetch for next Tx descriptor */
2505                 prefetch(&ring->desc_cb[ntc]);
2506         }
2507
2508         /* This smp_store_release() pairs with smp_load_acquire() in
2509          * ring_space called by hns3_nic_net_xmit.
2510          */
2511         smp_store_release(&ring->next_to_clean, ntc);
2512 }
2513
2514 static int is_valid_clean_head(struct hns3_enet_ring *ring, int h)
2515 {
2516         int u = ring->next_to_use;
2517         int c = ring->next_to_clean;
2518
2519         if (unlikely(h > ring->desc_num))
2520                 return 0;
2521
2522         return u > c ? (h > c && h <= u) : (h > c || h <= u);
2523 }
2524
2525 void hns3_clean_tx_ring(struct hns3_enet_ring *ring)
2526 {
2527         struct net_device *netdev = ring_to_netdev(ring);
2528         struct hns3_nic_priv *priv = netdev_priv(netdev);
2529         struct netdev_queue *dev_queue;
2530         int bytes, pkts;
2531         int head;
2532
2533         head = readl_relaxed(ring->tqp->io_base + HNS3_RING_TX_RING_HEAD_REG);
2534
2535         if (is_ring_empty(ring) || head == ring->next_to_clean)
2536                 return; /* no data to poll */
2537
2538         rmb(); /* Make sure head is ready before touch any data */
2539
2540         if (unlikely(!is_valid_clean_head(ring, head))) {
2541                 hns3_rl_err(netdev, "wrong head (%d, %d-%d)\n", head,
2542                             ring->next_to_use, ring->next_to_clean);
2543
2544                 u64_stats_update_begin(&ring->syncp);
2545                 ring->stats.io_err_cnt++;
2546                 u64_stats_update_end(&ring->syncp);
2547                 return;
2548         }
2549
2550         bytes = 0;
2551         pkts = 0;
2552         hns3_nic_reclaim_desc(ring, head, &bytes, &pkts);
2553
2554         ring->tqp_vector->tx_group.total_bytes += bytes;
2555         ring->tqp_vector->tx_group.total_packets += pkts;
2556
2557         u64_stats_update_begin(&ring->syncp);
2558         ring->stats.tx_bytes += bytes;
2559         ring->stats.tx_pkts += pkts;
2560         u64_stats_update_end(&ring->syncp);
2561
2562         dev_queue = netdev_get_tx_queue(netdev, ring->tqp->tqp_index);
2563         netdev_tx_completed_queue(dev_queue, pkts, bytes);
2564
2565         if (unlikely(netif_carrier_ok(netdev) &&
2566                      ring_space(ring) > HNS3_MAX_TSO_BD_NUM)) {
2567                 /* Make sure that anybody stopping the queue after this
2568                  * sees the new next_to_clean.
2569                  */
2570                 smp_mb();
2571                 if (netif_tx_queue_stopped(dev_queue) &&
2572                     !test_bit(HNS3_NIC_STATE_DOWN, &priv->state)) {
2573                         netif_tx_wake_queue(dev_queue);
2574                         ring->stats.restart_queue++;
2575                 }
2576         }
2577 }
2578
2579 static int hns3_desc_unused(struct hns3_enet_ring *ring)
2580 {
2581         int ntc = ring->next_to_clean;
2582         int ntu = ring->next_to_use;
2583
2584         return ((ntc >= ntu) ? 0 : ring->desc_num) + ntc - ntu;
2585 }
2586
2587 static void hns3_nic_alloc_rx_buffers(struct hns3_enet_ring *ring,
2588                                       int cleand_count)
2589 {
2590         struct hns3_desc_cb *desc_cb;
2591         struct hns3_desc_cb res_cbs;
2592         int i, ret;
2593
2594         for (i = 0; i < cleand_count; i++) {
2595                 desc_cb = &ring->desc_cb[ring->next_to_use];
2596                 if (desc_cb->reuse_flag) {
2597                         u64_stats_update_begin(&ring->syncp);
2598                         ring->stats.reuse_pg_cnt++;
2599                         u64_stats_update_end(&ring->syncp);
2600
2601                         hns3_reuse_buffer(ring, ring->next_to_use);
2602                 } else {
2603                         ret = hns3_reserve_buffer_map(ring, &res_cbs);
2604                         if (ret) {
2605                                 u64_stats_update_begin(&ring->syncp);
2606                                 ring->stats.sw_err_cnt++;
2607                                 u64_stats_update_end(&ring->syncp);
2608
2609                                 hns3_rl_err(ring_to_netdev(ring),
2610                                             "alloc rx buffer failed: %d\n",
2611                                             ret);
2612                                 break;
2613                         }
2614                         hns3_replace_buffer(ring, ring->next_to_use, &res_cbs);
2615
2616                         u64_stats_update_begin(&ring->syncp);
2617                         ring->stats.non_reuse_pg++;
2618                         u64_stats_update_end(&ring->syncp);
2619                 }
2620
2621                 ring_ptr_move_fw(ring, next_to_use);
2622         }
2623
2624         wmb(); /* Make all data has been write before submit */
2625         writel_relaxed(i, ring->tqp->io_base + HNS3_RING_RX_RING_HEAD_REG);
2626 }
2627
2628 static bool hns3_page_is_reusable(struct page *page)
2629 {
2630         return page_to_nid(page) == numa_mem_id() &&
2631                 !page_is_pfmemalloc(page);
2632 }
2633
2634 static void hns3_nic_reuse_page(struct sk_buff *skb, int i,
2635                                 struct hns3_enet_ring *ring, int pull_len,
2636                                 struct hns3_desc_cb *desc_cb)
2637 {
2638         struct hns3_desc *desc = &ring->desc[ring->next_to_clean];
2639         int size = le16_to_cpu(desc->rx.size);
2640         u32 truesize = hns3_buf_size(ring);
2641
2642         skb_add_rx_frag(skb, i, desc_cb->priv, desc_cb->page_offset + pull_len,
2643                         size - pull_len, truesize);
2644
2645         /* Avoid re-using remote pages, or the stack is still using the page
2646          * when page_offset rollback to zero, flag default unreuse
2647          */
2648         if (unlikely(!hns3_page_is_reusable(desc_cb->priv)) ||
2649             (!desc_cb->page_offset && page_count(desc_cb->priv) > 1))
2650                 return;
2651
2652         /* Move offset up to the next cache line */
2653         desc_cb->page_offset += truesize;
2654
2655         if (desc_cb->page_offset + truesize <= hns3_page_size(ring)) {
2656                 desc_cb->reuse_flag = 1;
2657                 /* Bump ref count on page before it is given */
2658                 get_page(desc_cb->priv);
2659         } else if (page_count(desc_cb->priv) == 1) {
2660                 desc_cb->reuse_flag = 1;
2661                 desc_cb->page_offset = 0;
2662                 get_page(desc_cb->priv);
2663         }
2664 }
2665
2666 static int hns3_gro_complete(struct sk_buff *skb, u32 l234info)
2667 {
2668         __be16 type = skb->protocol;
2669         struct tcphdr *th;
2670         int depth = 0;
2671
2672         while (eth_type_vlan(type)) {
2673                 struct vlan_hdr *vh;
2674
2675                 if ((depth + VLAN_HLEN) > skb_headlen(skb))
2676                         return -EFAULT;
2677
2678                 vh = (struct vlan_hdr *)(skb->data + depth);
2679                 type = vh->h_vlan_encapsulated_proto;
2680                 depth += VLAN_HLEN;
2681         }
2682
2683         skb_set_network_header(skb, depth);
2684
2685         if (type == htons(ETH_P_IP)) {
2686                 const struct iphdr *iph = ip_hdr(skb);
2687
2688                 depth += sizeof(struct iphdr);
2689                 skb_set_transport_header(skb, depth);
2690                 th = tcp_hdr(skb);
2691                 th->check = ~tcp_v4_check(skb->len - depth, iph->saddr,
2692                                           iph->daddr, 0);
2693         } else if (type == htons(ETH_P_IPV6)) {
2694                 const struct ipv6hdr *iph = ipv6_hdr(skb);
2695
2696                 depth += sizeof(struct ipv6hdr);
2697                 skb_set_transport_header(skb, depth);
2698                 th = tcp_hdr(skb);
2699                 th->check = ~tcp_v6_check(skb->len - depth, &iph->saddr,
2700                                           &iph->daddr, 0);
2701         } else {
2702                 hns3_rl_err(skb->dev,
2703                             "Error: FW GRO supports only IPv4/IPv6, not 0x%04x, depth: %d\n",
2704                             be16_to_cpu(type), depth);
2705                 return -EFAULT;
2706         }
2707
2708         skb_shinfo(skb)->gso_segs = NAPI_GRO_CB(skb)->count;
2709         if (th->cwr)
2710                 skb_shinfo(skb)->gso_type |= SKB_GSO_TCP_ECN;
2711
2712         if (l234info & BIT(HNS3_RXD_GRO_FIXID_B))
2713                 skb_shinfo(skb)->gso_type |= SKB_GSO_TCP_FIXEDID;
2714
2715         skb->csum_start = (unsigned char *)th - skb->head;
2716         skb->csum_offset = offsetof(struct tcphdr, check);
2717         skb->ip_summed = CHECKSUM_PARTIAL;
2718
2719         trace_hns3_gro(skb);
2720
2721         return 0;
2722 }
2723
2724 static void hns3_rx_checksum(struct hns3_enet_ring *ring, struct sk_buff *skb,
2725                              u32 l234info, u32 bd_base_info, u32 ol_info)
2726 {
2727         struct net_device *netdev = ring_to_netdev(ring);
2728         int l3_type, l4_type;
2729         int ol4_type;
2730
2731         skb->ip_summed = CHECKSUM_NONE;
2732
2733         skb_checksum_none_assert(skb);
2734
2735         if (!(netdev->features & NETIF_F_RXCSUM))
2736                 return;
2737
2738         /* check if hardware has done checksum */
2739         if (!(bd_base_info & BIT(HNS3_RXD_L3L4P_B)))
2740                 return;
2741
2742         if (unlikely(l234info & (BIT(HNS3_RXD_L3E_B) | BIT(HNS3_RXD_L4E_B) |
2743                                  BIT(HNS3_RXD_OL3E_B) |
2744                                  BIT(HNS3_RXD_OL4E_B)))) {
2745                 u64_stats_update_begin(&ring->syncp);
2746                 ring->stats.l3l4_csum_err++;
2747                 u64_stats_update_end(&ring->syncp);
2748
2749                 return;
2750         }
2751
2752         ol4_type = hnae3_get_field(ol_info, HNS3_RXD_OL4ID_M,
2753                                    HNS3_RXD_OL4ID_S);
2754         switch (ol4_type) {
2755         case HNS3_OL4_TYPE_MAC_IN_UDP:
2756         case HNS3_OL4_TYPE_NVGRE:
2757                 skb->csum_level = 1;
2758                 /* fall through */
2759         case HNS3_OL4_TYPE_NO_TUN:
2760                 l3_type = hnae3_get_field(l234info, HNS3_RXD_L3ID_M,
2761                                           HNS3_RXD_L3ID_S);
2762                 l4_type = hnae3_get_field(l234info, HNS3_RXD_L4ID_M,
2763                                           HNS3_RXD_L4ID_S);
2764
2765                 /* Can checksum ipv4 or ipv6 + UDP/TCP/SCTP packets */
2766                 if ((l3_type == HNS3_L3_TYPE_IPV4 ||
2767                      l3_type == HNS3_L3_TYPE_IPV6) &&
2768                     (l4_type == HNS3_L4_TYPE_UDP ||
2769                      l4_type == HNS3_L4_TYPE_TCP ||
2770                      l4_type == HNS3_L4_TYPE_SCTP))
2771                         skb->ip_summed = CHECKSUM_UNNECESSARY;
2772                 break;
2773         default:
2774                 break;
2775         }
2776 }
2777
2778 static void hns3_rx_skb(struct hns3_enet_ring *ring, struct sk_buff *skb)
2779 {
2780         if (skb_has_frag_list(skb))
2781                 napi_gro_flush(&ring->tqp_vector->napi, false);
2782
2783         napi_gro_receive(&ring->tqp_vector->napi, skb);
2784 }
2785
2786 static bool hns3_parse_vlan_tag(struct hns3_enet_ring *ring,
2787                                 struct hns3_desc *desc, u32 l234info,
2788                                 u16 *vlan_tag)
2789 {
2790         struct hnae3_handle *handle = ring->tqp->handle;
2791         struct pci_dev *pdev = ring->tqp->handle->pdev;
2792
2793         if (pdev->revision == 0x20) {
2794                 *vlan_tag = le16_to_cpu(desc->rx.ot_vlan_tag);
2795                 if (!(*vlan_tag & VLAN_VID_MASK))
2796                         *vlan_tag = le16_to_cpu(desc->rx.vlan_tag);
2797
2798                 return (*vlan_tag != 0);
2799         }
2800
2801 #define HNS3_STRP_OUTER_VLAN    0x1
2802 #define HNS3_STRP_INNER_VLAN    0x2
2803 #define HNS3_STRP_BOTH          0x3
2804
2805         /* Hardware always insert VLAN tag into RX descriptor when
2806          * remove the tag from packet, driver needs to determine
2807          * reporting which tag to stack.
2808          */
2809         switch (hnae3_get_field(l234info, HNS3_RXD_STRP_TAGP_M,
2810                                 HNS3_RXD_STRP_TAGP_S)) {
2811         case HNS3_STRP_OUTER_VLAN:
2812                 if (handle->port_base_vlan_state !=
2813                                 HNAE3_PORT_BASE_VLAN_DISABLE)
2814                         return false;
2815
2816                 *vlan_tag = le16_to_cpu(desc->rx.ot_vlan_tag);
2817                 return true;
2818         case HNS3_STRP_INNER_VLAN:
2819                 if (handle->port_base_vlan_state !=
2820                                 HNAE3_PORT_BASE_VLAN_DISABLE)
2821                         return false;
2822
2823                 *vlan_tag = le16_to_cpu(desc->rx.vlan_tag);
2824                 return true;
2825         case HNS3_STRP_BOTH:
2826                 if (handle->port_base_vlan_state ==
2827                                 HNAE3_PORT_BASE_VLAN_DISABLE)
2828                         *vlan_tag = le16_to_cpu(desc->rx.ot_vlan_tag);
2829                 else
2830                         *vlan_tag = le16_to_cpu(desc->rx.vlan_tag);
2831
2832                 return true;
2833         default:
2834                 return false;
2835         }
2836 }
2837
2838 static int hns3_alloc_skb(struct hns3_enet_ring *ring, unsigned int length,
2839                           unsigned char *va)
2840 {
2841         struct hns3_desc_cb *desc_cb = &ring->desc_cb[ring->next_to_clean];
2842         struct net_device *netdev = ring_to_netdev(ring);
2843         struct sk_buff *skb;
2844
2845         ring->skb = napi_alloc_skb(&ring->tqp_vector->napi, HNS3_RX_HEAD_SIZE);
2846         skb = ring->skb;
2847         if (unlikely(!skb)) {
2848                 hns3_rl_err(netdev, "alloc rx skb fail\n");
2849
2850                 u64_stats_update_begin(&ring->syncp);
2851                 ring->stats.sw_err_cnt++;
2852                 u64_stats_update_end(&ring->syncp);
2853
2854                 return -ENOMEM;
2855         }
2856
2857         trace_hns3_rx_desc(ring);
2858         prefetchw(skb->data);
2859
2860         ring->pending_buf = 1;
2861         ring->frag_num = 0;
2862         ring->tail_skb = NULL;
2863         if (length <= HNS3_RX_HEAD_SIZE) {
2864                 memcpy(__skb_put(skb, length), va, ALIGN(length, sizeof(long)));
2865
2866                 /* We can reuse buffer as-is, just make sure it is local */
2867                 if (likely(hns3_page_is_reusable(desc_cb->priv)))
2868                         desc_cb->reuse_flag = 1;
2869                 else /* This page cannot be reused so discard it */
2870                         put_page(desc_cb->priv);
2871
2872                 ring_ptr_move_fw(ring, next_to_clean);
2873                 return 0;
2874         }
2875         u64_stats_update_begin(&ring->syncp);
2876         ring->stats.seg_pkt_cnt++;
2877         u64_stats_update_end(&ring->syncp);
2878
2879         ring->pull_len = eth_get_headlen(netdev, va, HNS3_RX_HEAD_SIZE);
2880         __skb_put(skb, ring->pull_len);
2881         hns3_nic_reuse_page(skb, ring->frag_num++, ring, ring->pull_len,
2882                             desc_cb);
2883         ring_ptr_move_fw(ring, next_to_clean);
2884
2885         return 0;
2886 }
2887
2888 static int hns3_add_frag(struct hns3_enet_ring *ring)
2889 {
2890         struct sk_buff *skb = ring->skb;
2891         struct sk_buff *head_skb = skb;
2892         struct sk_buff *new_skb;
2893         struct hns3_desc_cb *desc_cb;
2894         struct hns3_desc *desc;
2895         u32 bd_base_info;
2896
2897         do {
2898                 desc = &ring->desc[ring->next_to_clean];
2899                 desc_cb = &ring->desc_cb[ring->next_to_clean];
2900                 bd_base_info = le32_to_cpu(desc->rx.bd_base_info);
2901                 /* make sure HW write desc complete */
2902                 dma_rmb();
2903                 if (!(bd_base_info & BIT(HNS3_RXD_VLD_B)))
2904                         return -ENXIO;
2905
2906                 if (unlikely(ring->frag_num >= MAX_SKB_FRAGS)) {
2907                         new_skb = napi_alloc_skb(&ring->tqp_vector->napi, 0);
2908                         if (unlikely(!new_skb)) {
2909                                 hns3_rl_err(ring_to_netdev(ring),
2910                                             "alloc rx fraglist skb fail\n");
2911                                 return -ENXIO;
2912                         }
2913                         ring->frag_num = 0;
2914
2915                         if (ring->tail_skb) {
2916                                 ring->tail_skb->next = new_skb;
2917                                 ring->tail_skb = new_skb;
2918                         } else {
2919                                 skb_shinfo(skb)->frag_list = new_skb;
2920                                 ring->tail_skb = new_skb;
2921                         }
2922                 }
2923
2924                 if (ring->tail_skb) {
2925                         head_skb->truesize += hns3_buf_size(ring);
2926                         head_skb->data_len += le16_to_cpu(desc->rx.size);
2927                         head_skb->len += le16_to_cpu(desc->rx.size);
2928                         skb = ring->tail_skb;
2929                 }
2930
2931                 hns3_nic_reuse_page(skb, ring->frag_num++, ring, 0, desc_cb);
2932                 trace_hns3_rx_desc(ring);
2933                 ring_ptr_move_fw(ring, next_to_clean);
2934                 ring->pending_buf++;
2935         } while (!(bd_base_info & BIT(HNS3_RXD_FE_B)));
2936
2937         return 0;
2938 }
2939
2940 static int hns3_set_gro_and_checksum(struct hns3_enet_ring *ring,
2941                                      struct sk_buff *skb, u32 l234info,
2942                                      u32 bd_base_info, u32 ol_info)
2943 {
2944         u32 l3_type;
2945
2946         skb_shinfo(skb)->gso_size = hnae3_get_field(bd_base_info,
2947                                                     HNS3_RXD_GRO_SIZE_M,
2948                                                     HNS3_RXD_GRO_SIZE_S);
2949         /* if there is no HW GRO, do not set gro params */
2950         if (!skb_shinfo(skb)->gso_size) {
2951                 hns3_rx_checksum(ring, skb, l234info, bd_base_info, ol_info);
2952                 return 0;
2953         }
2954
2955         NAPI_GRO_CB(skb)->count = hnae3_get_field(l234info,
2956                                                   HNS3_RXD_GRO_COUNT_M,
2957                                                   HNS3_RXD_GRO_COUNT_S);
2958
2959         l3_type = hnae3_get_field(l234info, HNS3_RXD_L3ID_M, HNS3_RXD_L3ID_S);
2960         if (l3_type == HNS3_L3_TYPE_IPV4)
2961                 skb_shinfo(skb)->gso_type = SKB_GSO_TCPV4;
2962         else if (l3_type == HNS3_L3_TYPE_IPV6)
2963                 skb_shinfo(skb)->gso_type = SKB_GSO_TCPV6;
2964         else
2965                 return -EFAULT;
2966
2967         return  hns3_gro_complete(skb, l234info);
2968 }
2969
2970 static void hns3_set_rx_skb_rss_type(struct hns3_enet_ring *ring,
2971                                      struct sk_buff *skb, u32 rss_hash)
2972 {
2973         struct hnae3_handle *handle = ring->tqp->handle;
2974         enum pkt_hash_types rss_type;
2975
2976         if (rss_hash)
2977                 rss_type = handle->kinfo.rss_type;
2978         else
2979                 rss_type = PKT_HASH_TYPE_NONE;
2980
2981         skb_set_hash(skb, rss_hash, rss_type);
2982 }
2983
2984 static int hns3_handle_bdinfo(struct hns3_enet_ring *ring, struct sk_buff *skb)
2985 {
2986         struct net_device *netdev = ring_to_netdev(ring);
2987         enum hns3_pkt_l2t_type l2_frame_type;
2988         u32 bd_base_info, l234info, ol_info;
2989         struct hns3_desc *desc;
2990         unsigned int len;
2991         int pre_ntc, ret;
2992
2993         /* bdinfo handled below is only valid on the last BD of the
2994          * current packet, and ring->next_to_clean indicates the first
2995          * descriptor of next packet, so need - 1 below.
2996          */
2997         pre_ntc = ring->next_to_clean ? (ring->next_to_clean - 1) :
2998                                         (ring->desc_num - 1);
2999         desc = &ring->desc[pre_ntc];
3000         bd_base_info = le32_to_cpu(desc->rx.bd_base_info);
3001         l234info = le32_to_cpu(desc->rx.l234_info);
3002         ol_info = le32_to_cpu(desc->rx.ol_info);
3003
3004         /* Based on hw strategy, the tag offloaded will be stored at
3005          * ot_vlan_tag in two layer tag case, and stored at vlan_tag
3006          * in one layer tag case.
3007          */
3008         if (netdev->features & NETIF_F_HW_VLAN_CTAG_RX) {
3009                 u16 vlan_tag;
3010
3011                 if (hns3_parse_vlan_tag(ring, desc, l234info, &vlan_tag))
3012                         __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q),
3013                                                vlan_tag);
3014         }
3015
3016         if (unlikely(!desc->rx.pkt_len || (l234info & (BIT(HNS3_RXD_TRUNCAT_B) |
3017                                   BIT(HNS3_RXD_L2E_B))))) {
3018                 u64_stats_update_begin(&ring->syncp);
3019                 if (l234info & BIT(HNS3_RXD_L2E_B))
3020                         ring->stats.l2_err++;
3021                 else
3022                         ring->stats.err_pkt_len++;
3023                 u64_stats_update_end(&ring->syncp);
3024
3025                 return -EFAULT;
3026         }
3027
3028         len = skb->len;
3029
3030         /* Do update ip stack process */
3031         skb->protocol = eth_type_trans(skb, netdev);
3032
3033         /* This is needed in order to enable forwarding support */
3034         ret = hns3_set_gro_and_checksum(ring, skb, l234info,
3035                                         bd_base_info, ol_info);
3036         if (unlikely(ret)) {
3037                 u64_stats_update_begin(&ring->syncp);
3038                 ring->stats.rx_err_cnt++;
3039                 u64_stats_update_end(&ring->syncp);
3040                 return ret;
3041         }
3042
3043         l2_frame_type = hnae3_get_field(l234info, HNS3_RXD_DMAC_M,
3044                                         HNS3_RXD_DMAC_S);
3045
3046         u64_stats_update_begin(&ring->syncp);
3047         ring->stats.rx_pkts++;
3048         ring->stats.rx_bytes += len;
3049
3050         if (l2_frame_type == HNS3_L2_TYPE_MULTICAST)
3051                 ring->stats.rx_multicast++;
3052
3053         u64_stats_update_end(&ring->syncp);
3054
3055         ring->tqp_vector->rx_group.total_bytes += len;
3056
3057         hns3_set_rx_skb_rss_type(ring, skb, le32_to_cpu(desc->rx.rss_hash));
3058         return 0;
3059 }
3060
3061 static int hns3_handle_rx_bd(struct hns3_enet_ring *ring)
3062 {
3063         struct sk_buff *skb = ring->skb;
3064         struct hns3_desc_cb *desc_cb;
3065         struct hns3_desc *desc;
3066         unsigned int length;
3067         u32 bd_base_info;
3068         int ret;
3069
3070         desc = &ring->desc[ring->next_to_clean];
3071         desc_cb = &ring->desc_cb[ring->next_to_clean];
3072
3073         prefetch(desc);
3074
3075         length = le16_to_cpu(desc->rx.size);
3076         bd_base_info = le32_to_cpu(desc->rx.bd_base_info);
3077
3078         /* Check valid BD */
3079         if (unlikely(!(bd_base_info & BIT(HNS3_RXD_VLD_B))))
3080                 return -ENXIO;
3081
3082         if (!skb)
3083                 ring->va = (unsigned char *)desc_cb->buf + desc_cb->page_offset;
3084
3085         /* Prefetch first cache line of first page
3086          * Idea is to cache few bytes of the header of the packet. Our L1 Cache
3087          * line size is 64B so need to prefetch twice to make it 128B. But in
3088          * actual we can have greater size of caches with 128B Level 1 cache
3089          * lines. In such a case, single fetch would suffice to cache in the
3090          * relevant part of the header.
3091          */
3092         prefetch(ring->va);
3093 #if L1_CACHE_BYTES < 128
3094         prefetch(ring->va + L1_CACHE_BYTES);
3095 #endif
3096
3097         if (!skb) {
3098                 ret = hns3_alloc_skb(ring, length, ring->va);
3099                 skb = ring->skb;
3100
3101                 if (ret < 0) /* alloc buffer fail */
3102                         return ret;
3103                 if (!(bd_base_info & BIT(HNS3_RXD_FE_B))) { /* need add frag */
3104                         ret = hns3_add_frag(ring);
3105                         if (ret)
3106                                 return ret;
3107                 }
3108         } else {
3109                 ret = hns3_add_frag(ring);
3110                 if (ret)
3111                         return ret;
3112         }
3113
3114         /* As the head data may be changed when GRO enable, copy
3115          * the head data in after other data rx completed
3116          */
3117         if (skb->len > HNS3_RX_HEAD_SIZE)
3118                 memcpy(skb->data, ring->va,
3119                        ALIGN(ring->pull_len, sizeof(long)));
3120
3121         ret = hns3_handle_bdinfo(ring, skb);
3122         if (unlikely(ret)) {
3123                 dev_kfree_skb_any(skb);
3124                 return ret;
3125         }
3126
3127         skb_record_rx_queue(skb, ring->tqp->tqp_index);
3128         return 0;
3129 }
3130
3131 int hns3_clean_rx_ring(struct hns3_enet_ring *ring, int budget,
3132                        void (*rx_fn)(struct hns3_enet_ring *, struct sk_buff *))
3133 {
3134 #define RCB_NOF_ALLOC_RX_BUFF_ONCE 16
3135         int unused_count = hns3_desc_unused(ring);
3136         int recv_pkts = 0;
3137         int recv_bds = 0;
3138         int err, num;
3139
3140         num = readl_relaxed(ring->tqp->io_base + HNS3_RING_RX_RING_FBDNUM_REG);
3141         num -= unused_count;
3142         unused_count -= ring->pending_buf;
3143
3144         if (num <= 0)
3145                 goto out;
3146
3147         rmb(); /* Make sure num taken effect before the other data is touched */
3148
3149         while (recv_pkts < budget && recv_bds < num) {
3150                 /* Reuse or realloc buffers */
3151                 if (unused_count >= RCB_NOF_ALLOC_RX_BUFF_ONCE) {
3152                         hns3_nic_alloc_rx_buffers(ring, unused_count);
3153                         unused_count = hns3_desc_unused(ring) -
3154                                         ring->pending_buf;
3155                 }
3156
3157                 /* Poll one pkt */
3158                 err = hns3_handle_rx_bd(ring);
3159                 /* Do not get FE for the packet or failed to alloc skb */
3160                 if (unlikely(!ring->skb || err == -ENXIO)) {
3161                         goto out;
3162                 } else if (likely(!err)) {
3163                         rx_fn(ring, ring->skb);
3164                         recv_pkts++;
3165                 }
3166
3167                 recv_bds += ring->pending_buf;
3168                 unused_count += ring->pending_buf;
3169                 ring->skb = NULL;
3170                 ring->pending_buf = 0;
3171         }
3172
3173 out:
3174         /* Make all data has been write before submit */
3175         if (unused_count > 0)
3176                 hns3_nic_alloc_rx_buffers(ring, unused_count);
3177
3178         return recv_pkts;
3179 }
3180
3181 static bool hns3_get_new_flow_lvl(struct hns3_enet_ring_group *ring_group)
3182 {
3183 #define HNS3_RX_LOW_BYTE_RATE 10000
3184 #define HNS3_RX_MID_BYTE_RATE 20000
3185 #define HNS3_RX_ULTRA_PACKET_RATE 40
3186
3187         enum hns3_flow_level_range new_flow_level;
3188         struct hns3_enet_tqp_vector *tqp_vector;
3189         int packets_per_msecs, bytes_per_msecs;
3190         u32 time_passed_ms;
3191
3192         tqp_vector = ring_group->ring->tqp_vector;
3193         time_passed_ms =
3194                 jiffies_to_msecs(jiffies - tqp_vector->last_jiffies);
3195         if (!time_passed_ms)
3196                 return false;
3197
3198         do_div(ring_group->total_packets, time_passed_ms);
3199         packets_per_msecs = ring_group->total_packets;
3200
3201         do_div(ring_group->total_bytes, time_passed_ms);
3202         bytes_per_msecs = ring_group->total_bytes;
3203
3204         new_flow_level = ring_group->coal.flow_level;
3205
3206         /* Simple throttlerate management
3207          * 0-10MB/s   lower     (50000 ints/s)
3208          * 10-20MB/s   middle    (20000 ints/s)
3209          * 20-1249MB/s high      (18000 ints/s)
3210          * > 40000pps  ultra     (8000 ints/s)
3211          */
3212         switch (new_flow_level) {
3213         case HNS3_FLOW_LOW:
3214                 if (bytes_per_msecs > HNS3_RX_LOW_BYTE_RATE)
3215                         new_flow_level = HNS3_FLOW_MID;
3216                 break;
3217         case HNS3_FLOW_MID:
3218                 if (bytes_per_msecs > HNS3_RX_MID_BYTE_RATE)
3219                         new_flow_level = HNS3_FLOW_HIGH;
3220                 else if (bytes_per_msecs <= HNS3_RX_LOW_BYTE_RATE)
3221                         new_flow_level = HNS3_FLOW_LOW;
3222                 break;
3223         case HNS3_FLOW_HIGH:
3224         case HNS3_FLOW_ULTRA:
3225         default:
3226                 if (bytes_per_msecs <= HNS3_RX_MID_BYTE_RATE)
3227                         new_flow_level = HNS3_FLOW_MID;
3228                 break;
3229         }
3230
3231         if (packets_per_msecs > HNS3_RX_ULTRA_PACKET_RATE &&
3232             &tqp_vector->rx_group == ring_group)
3233                 new_flow_level = HNS3_FLOW_ULTRA;
3234
3235         ring_group->total_bytes = 0;
3236         ring_group->total_packets = 0;
3237         ring_group->coal.flow_level = new_flow_level;
3238
3239         return true;
3240 }
3241
3242 static bool hns3_get_new_int_gl(struct hns3_enet_ring_group *ring_group)
3243 {
3244         struct hns3_enet_tqp_vector *tqp_vector;
3245         u16 new_int_gl;
3246
3247         if (!ring_group->ring)
3248                 return false;
3249
3250         tqp_vector = ring_group->ring->tqp_vector;
3251         if (!tqp_vector->last_jiffies)
3252                 return false;
3253
3254         if (ring_group->total_packets == 0) {
3255                 ring_group->coal.int_gl = HNS3_INT_GL_50K;
3256                 ring_group->coal.flow_level = HNS3_FLOW_LOW;
3257                 return true;
3258         }
3259
3260         if (!hns3_get_new_flow_lvl(ring_group))
3261                 return false;
3262
3263         new_int_gl = ring_group->coal.int_gl;
3264         switch (ring_group->coal.flow_level) {
3265         case HNS3_FLOW_LOW:
3266                 new_int_gl = HNS3_INT_GL_50K;
3267                 break;
3268         case HNS3_FLOW_MID:
3269                 new_int_gl = HNS3_INT_GL_20K;
3270                 break;
3271         case HNS3_FLOW_HIGH:
3272                 new_int_gl = HNS3_INT_GL_18K;
3273                 break;
3274         case HNS3_FLOW_ULTRA:
3275                 new_int_gl = HNS3_INT_GL_8K;
3276                 break;
3277         default:
3278                 break;
3279         }
3280
3281         if (new_int_gl != ring_group->coal.int_gl) {
3282                 ring_group->coal.int_gl = new_int_gl;
3283                 return true;
3284         }
3285         return false;
3286 }
3287
3288 static void hns3_update_new_int_gl(struct hns3_enet_tqp_vector *tqp_vector)
3289 {
3290         struct hns3_enet_ring_group *rx_group = &tqp_vector->rx_group;
3291         struct hns3_enet_ring_group *tx_group = &tqp_vector->tx_group;
3292         bool rx_update, tx_update;
3293
3294         /* update param every 1000ms */
3295         if (time_before(jiffies,
3296                         tqp_vector->last_jiffies + msecs_to_jiffies(1000)))
3297                 return;
3298
3299         if (rx_group->coal.gl_adapt_enable) {
3300                 rx_update = hns3_get_new_int_gl(rx_group);
3301                 if (rx_update)
3302                         hns3_set_vector_coalesce_rx_gl(tqp_vector,
3303                                                        rx_group->coal.int_gl);
3304         }
3305
3306         if (tx_group->coal.gl_adapt_enable) {
3307                 tx_update = hns3_get_new_int_gl(tx_group);
3308                 if (tx_update)
3309                         hns3_set_vector_coalesce_tx_gl(tqp_vector,
3310                                                        tx_group->coal.int_gl);
3311         }
3312
3313         tqp_vector->last_jiffies = jiffies;
3314 }
3315
3316 static int hns3_nic_common_poll(struct napi_struct *napi, int budget)
3317 {
3318         struct hns3_nic_priv *priv = netdev_priv(napi->dev);
3319         struct hns3_enet_ring *ring;
3320         int rx_pkt_total = 0;
3321
3322         struct hns3_enet_tqp_vector *tqp_vector =
3323                 container_of(napi, struct hns3_enet_tqp_vector, napi);
3324         bool clean_complete = true;
3325         int rx_budget = budget;
3326
3327         if (unlikely(test_bit(HNS3_NIC_STATE_DOWN, &priv->state))) {
3328                 napi_complete(napi);
3329                 return 0;
3330         }
3331
3332         /* Since the actual Tx work is minimal, we can give the Tx a larger
3333          * budget and be more aggressive about cleaning up the Tx descriptors.
3334          */
3335         hns3_for_each_ring(ring, tqp_vector->tx_group)
3336                 hns3_clean_tx_ring(ring);
3337
3338         /* make sure rx ring budget not smaller than 1 */
3339         if (tqp_vector->num_tqps > 1)
3340                 rx_budget = max(budget / tqp_vector->num_tqps, 1);
3341
3342         hns3_for_each_ring(ring, tqp_vector->rx_group) {
3343                 int rx_cleaned = hns3_clean_rx_ring(ring, rx_budget,
3344                                                     hns3_rx_skb);
3345
3346                 if (rx_cleaned >= rx_budget)
3347                         clean_complete = false;
3348
3349                 rx_pkt_total += rx_cleaned;
3350         }
3351
3352         tqp_vector->rx_group.total_packets += rx_pkt_total;
3353
3354         if (!clean_complete)
3355                 return budget;
3356
3357         if (napi_complete(napi) &&
3358             likely(!test_bit(HNS3_NIC_STATE_DOWN, &priv->state))) {
3359                 hns3_update_new_int_gl(tqp_vector);
3360                 hns3_mask_vector_irq(tqp_vector, 1);
3361         }
3362
3363         return rx_pkt_total;
3364 }
3365
3366 static int hns3_get_vector_ring_chain(struct hns3_enet_tqp_vector *tqp_vector,
3367                                       struct hnae3_ring_chain_node *head)
3368 {
3369         struct pci_dev *pdev = tqp_vector->handle->pdev;
3370         struct hnae3_ring_chain_node *cur_chain = head;
3371         struct hnae3_ring_chain_node *chain;
3372         struct hns3_enet_ring *tx_ring;
3373         struct hns3_enet_ring *rx_ring;
3374
3375         tx_ring = tqp_vector->tx_group.ring;
3376         if (tx_ring) {
3377                 cur_chain->tqp_index = tx_ring->tqp->tqp_index;
3378                 hnae3_set_bit(cur_chain->flag, HNAE3_RING_TYPE_B,
3379                               HNAE3_RING_TYPE_TX);
3380                 hnae3_set_field(cur_chain->int_gl_idx, HNAE3_RING_GL_IDX_M,
3381                                 HNAE3_RING_GL_IDX_S, HNAE3_RING_GL_TX);
3382
3383                 cur_chain->next = NULL;
3384
3385                 while (tx_ring->next) {
3386                         tx_ring = tx_ring->next;
3387
3388                         chain = devm_kzalloc(&pdev->dev, sizeof(*chain),
3389                                              GFP_KERNEL);
3390                         if (!chain)
3391                                 goto err_free_chain;
3392
3393                         cur_chain->next = chain;
3394                         chain->tqp_index = tx_ring->tqp->tqp_index;
3395                         hnae3_set_bit(chain->flag, HNAE3_RING_TYPE_B,
3396                                       HNAE3_RING_TYPE_TX);
3397                         hnae3_set_field(chain->int_gl_idx,
3398                                         HNAE3_RING_GL_IDX_M,
3399                                         HNAE3_RING_GL_IDX_S,
3400                                         HNAE3_RING_GL_TX);
3401
3402                         cur_chain = chain;
3403                 }
3404         }
3405
3406         rx_ring = tqp_vector->rx_group.ring;
3407         if (!tx_ring && rx_ring) {
3408                 cur_chain->next = NULL;
3409                 cur_chain->tqp_index = rx_ring->tqp->tqp_index;
3410                 hnae3_set_bit(cur_chain->flag, HNAE3_RING_TYPE_B,
3411                               HNAE3_RING_TYPE_RX);
3412                 hnae3_set_field(cur_chain->int_gl_idx, HNAE3_RING_GL_IDX_M,
3413                                 HNAE3_RING_GL_IDX_S, HNAE3_RING_GL_RX);
3414
3415                 rx_ring = rx_ring->next;
3416         }
3417
3418         while (rx_ring) {
3419                 chain = devm_kzalloc(&pdev->dev, sizeof(*chain), GFP_KERNEL);
3420                 if (!chain)
3421                         goto err_free_chain;
3422
3423                 cur_chain->next = chain;
3424                 chain->tqp_index = rx_ring->tqp->tqp_index;
3425                 hnae3_set_bit(chain->flag, HNAE3_RING_TYPE_B,
3426                               HNAE3_RING_TYPE_RX);
3427                 hnae3_set_field(chain->int_gl_idx, HNAE3_RING_GL_IDX_M,
3428                                 HNAE3_RING_GL_IDX_S, HNAE3_RING_GL_RX);
3429
3430                 cur_chain = chain;
3431
3432                 rx_ring = rx_ring->next;
3433         }
3434
3435         return 0;
3436
3437 err_free_chain:
3438         cur_chain = head->next;
3439         while (cur_chain) {
3440                 chain = cur_chain->next;
3441                 devm_kfree(&pdev->dev, cur_chain);
3442                 cur_chain = chain;
3443         }
3444         head->next = NULL;
3445
3446         return -ENOMEM;
3447 }
3448
3449 static void hns3_free_vector_ring_chain(struct hns3_enet_tqp_vector *tqp_vector,
3450                                         struct hnae3_ring_chain_node *head)
3451 {
3452         struct pci_dev *pdev = tqp_vector->handle->pdev;
3453         struct hnae3_ring_chain_node *chain_tmp, *chain;
3454
3455         chain = head->next;
3456
3457         while (chain) {
3458                 chain_tmp = chain->next;
3459                 devm_kfree(&pdev->dev, chain);
3460                 chain = chain_tmp;
3461         }
3462 }
3463
3464 static void hns3_add_ring_to_group(struct hns3_enet_ring_group *group,
3465                                    struct hns3_enet_ring *ring)
3466 {
3467         ring->next = group->ring;
3468         group->ring = ring;
3469
3470         group->count++;
3471 }
3472
3473 static void hns3_nic_set_cpumask(struct hns3_nic_priv *priv)
3474 {
3475         struct pci_dev *pdev = priv->ae_handle->pdev;
3476         struct hns3_enet_tqp_vector *tqp_vector;
3477         int num_vectors = priv->vector_num;
3478         int numa_node;
3479         int vector_i;
3480
3481         numa_node = dev_to_node(&pdev->dev);
3482
3483         for (vector_i = 0; vector_i < num_vectors; vector_i++) {
3484                 tqp_vector = &priv->tqp_vector[vector_i];
3485                 cpumask_set_cpu(cpumask_local_spread(vector_i, numa_node),
3486                                 &tqp_vector->affinity_mask);
3487         }
3488 }
3489
3490 static int hns3_nic_init_vector_data(struct hns3_nic_priv *priv)
3491 {
3492         struct hnae3_ring_chain_node vector_ring_chain;
3493         struct hnae3_handle *h = priv->ae_handle;
3494         struct hns3_enet_tqp_vector *tqp_vector;
3495         int ret = 0;
3496         int i;
3497
3498         hns3_nic_set_cpumask(priv);
3499
3500         for (i = 0; i < priv->vector_num; i++) {
3501                 tqp_vector = &priv->tqp_vector[i];
3502                 hns3_vector_gl_rl_init_hw(tqp_vector, priv);
3503                 tqp_vector->num_tqps = 0;
3504         }
3505
3506         for (i = 0; i < h->kinfo.num_tqps; i++) {
3507                 u16 vector_i = i % priv->vector_num;
3508                 u16 tqp_num = h->kinfo.num_tqps;
3509
3510                 tqp_vector = &priv->tqp_vector[vector_i];
3511
3512                 hns3_add_ring_to_group(&tqp_vector->tx_group,
3513                                        &priv->ring[i]);
3514
3515                 hns3_add_ring_to_group(&tqp_vector->rx_group,
3516                                        &priv->ring[i + tqp_num]);
3517
3518                 priv->ring[i].tqp_vector = tqp_vector;
3519                 priv->ring[i + tqp_num].tqp_vector = tqp_vector;
3520                 tqp_vector->num_tqps++;
3521         }
3522
3523         for (i = 0; i < priv->vector_num; i++) {
3524                 tqp_vector = &priv->tqp_vector[i];
3525
3526                 tqp_vector->rx_group.total_bytes = 0;
3527                 tqp_vector->rx_group.total_packets = 0;
3528                 tqp_vector->tx_group.total_bytes = 0;
3529                 tqp_vector->tx_group.total_packets = 0;
3530                 tqp_vector->handle = h;
3531
3532                 ret = hns3_get_vector_ring_chain(tqp_vector,
3533                                                  &vector_ring_chain);
3534                 if (ret)
3535                         goto map_ring_fail;
3536
3537                 ret = h->ae_algo->ops->map_ring_to_vector(h,
3538                         tqp_vector->vector_irq, &vector_ring_chain);
3539
3540                 hns3_free_vector_ring_chain(tqp_vector, &vector_ring_chain);
3541
3542                 if (ret)
3543                         goto map_ring_fail;
3544
3545                 netif_napi_add(priv->netdev, &tqp_vector->napi,
3546                                hns3_nic_common_poll, NAPI_POLL_WEIGHT);
3547         }
3548
3549         return 0;
3550
3551 map_ring_fail:
3552         while (i--)
3553                 netif_napi_del(&priv->tqp_vector[i].napi);
3554
3555         return ret;
3556 }
3557
3558 static int hns3_nic_alloc_vector_data(struct hns3_nic_priv *priv)
3559 {
3560 #define HNS3_VECTOR_PF_MAX_NUM          64
3561
3562         struct hnae3_handle *h = priv->ae_handle;
3563         struct hns3_enet_tqp_vector *tqp_vector;
3564         struct hnae3_vector_info *vector;
3565         struct pci_dev *pdev = h->pdev;
3566         u16 tqp_num = h->kinfo.num_tqps;
3567         u16 vector_num;
3568         int ret = 0;
3569         u16 i;
3570
3571         /* RSS size, cpu online and vector_num should be the same */
3572         /* Should consider 2p/4p later */
3573         vector_num = min_t(u16, num_online_cpus(), tqp_num);
3574         vector_num = min_t(u16, vector_num, HNS3_VECTOR_PF_MAX_NUM);
3575
3576         vector = devm_kcalloc(&pdev->dev, vector_num, sizeof(*vector),
3577                               GFP_KERNEL);
3578         if (!vector)
3579                 return -ENOMEM;
3580
3581         /* save the actual available vector number */
3582         vector_num = h->ae_algo->ops->get_vector(h, vector_num, vector);
3583
3584         priv->vector_num = vector_num;
3585         priv->tqp_vector = (struct hns3_enet_tqp_vector *)
3586                 devm_kcalloc(&pdev->dev, vector_num, sizeof(*priv->tqp_vector),
3587                              GFP_KERNEL);
3588         if (!priv->tqp_vector) {
3589                 ret = -ENOMEM;
3590                 goto out;
3591         }
3592
3593         for (i = 0; i < priv->vector_num; i++) {
3594                 tqp_vector = &priv->tqp_vector[i];
3595                 tqp_vector->idx = i;
3596                 tqp_vector->mask_addr = vector[i].io_addr;
3597                 tqp_vector->vector_irq = vector[i].vector;
3598                 hns3_vector_gl_rl_init(tqp_vector, priv);
3599         }
3600
3601 out:
3602         devm_kfree(&pdev->dev, vector);
3603         return ret;
3604 }
3605
3606 static void hns3_clear_ring_group(struct hns3_enet_ring_group *group)
3607 {
3608         group->ring = NULL;
3609         group->count = 0;
3610 }
3611
3612 static void hns3_nic_uninit_vector_data(struct hns3_nic_priv *priv)
3613 {
3614         struct hnae3_ring_chain_node vector_ring_chain;
3615         struct hnae3_handle *h = priv->ae_handle;
3616         struct hns3_enet_tqp_vector *tqp_vector;
3617         int i;
3618
3619         for (i = 0; i < priv->vector_num; i++) {
3620                 tqp_vector = &priv->tqp_vector[i];
3621
3622                 if (!tqp_vector->rx_group.ring && !tqp_vector->tx_group.ring)
3623                         continue;
3624
3625                 /* Since the mapping can be overwritten, when fail to get the
3626                  * chain between vector and ring, we should go on to deal with
3627                  * the remaining options.
3628                  */
3629                 if (hns3_get_vector_ring_chain(tqp_vector, &vector_ring_chain))
3630                         dev_warn(priv->dev, "failed to get ring chain\n");
3631
3632                 h->ae_algo->ops->unmap_ring_from_vector(h,
3633                         tqp_vector->vector_irq, &vector_ring_chain);
3634
3635                 hns3_free_vector_ring_chain(tqp_vector, &vector_ring_chain);
3636
3637                 hns3_clear_ring_group(&tqp_vector->rx_group);
3638                 hns3_clear_ring_group(&tqp_vector->tx_group);
3639                 netif_napi_del(&priv->tqp_vector[i].napi);
3640         }
3641 }
3642
3643 static void hns3_nic_dealloc_vector_data(struct hns3_nic_priv *priv)
3644 {
3645         struct hnae3_handle *h = priv->ae_handle;
3646         struct pci_dev *pdev = h->pdev;
3647         int i, ret;
3648
3649         for (i = 0; i < priv->vector_num; i++) {
3650                 struct hns3_enet_tqp_vector *tqp_vector;
3651
3652                 tqp_vector = &priv->tqp_vector[i];
3653                 ret = h->ae_algo->ops->put_vector(h, tqp_vector->vector_irq);
3654                 if (ret)
3655                         return;
3656         }
3657
3658         devm_kfree(&pdev->dev, priv->tqp_vector);
3659 }
3660
3661 static void hns3_ring_get_cfg(struct hnae3_queue *q, struct hns3_nic_priv *priv,
3662                               unsigned int ring_type)
3663 {
3664         int queue_num = priv->ae_handle->kinfo.num_tqps;
3665         struct hns3_enet_ring *ring;
3666         int desc_num;
3667
3668         if (ring_type == HNAE3_RING_TYPE_TX) {
3669                 ring = &priv->ring[q->tqp_index];
3670                 desc_num = priv->ae_handle->kinfo.num_tx_desc;
3671                 ring->queue_index = q->tqp_index;
3672                 ring->io_base = (u8 __iomem *)q->io_base + HNS3_TX_REG_OFFSET;
3673         } else {
3674                 ring = &priv->ring[q->tqp_index + queue_num];
3675                 desc_num = priv->ae_handle->kinfo.num_rx_desc;
3676                 ring->queue_index = q->tqp_index;
3677                 ring->io_base = q->io_base;
3678         }
3679
3680         hnae3_set_bit(ring->flag, HNAE3_RING_TYPE_B, ring_type);
3681
3682         ring->tqp = q;
3683         ring->desc = NULL;
3684         ring->desc_cb = NULL;
3685         ring->dev = priv->dev;
3686         ring->desc_dma_addr = 0;
3687         ring->buf_size = q->buf_size;
3688         ring->desc_num = desc_num;
3689         ring->next_to_use = 0;
3690         ring->next_to_clean = 0;
3691 }
3692
3693 static void hns3_queue_to_ring(struct hnae3_queue *tqp,
3694                                struct hns3_nic_priv *priv)
3695 {
3696         hns3_ring_get_cfg(tqp, priv, HNAE3_RING_TYPE_TX);
3697         hns3_ring_get_cfg(tqp, priv, HNAE3_RING_TYPE_RX);
3698 }
3699
3700 static int hns3_get_ring_config(struct hns3_nic_priv *priv)
3701 {
3702         struct hnae3_handle *h = priv->ae_handle;
3703         struct pci_dev *pdev = h->pdev;
3704         int i;
3705
3706         priv->ring = devm_kzalloc(&pdev->dev,
3707                                   array3_size(h->kinfo.num_tqps,
3708                                               sizeof(*priv->ring), 2),
3709                                   GFP_KERNEL);
3710         if (!priv->ring)
3711                 return -ENOMEM;
3712
3713         for (i = 0; i < h->kinfo.num_tqps; i++)
3714                 hns3_queue_to_ring(h->kinfo.tqp[i], priv);
3715
3716         return 0;
3717 }
3718
3719 static void hns3_put_ring_config(struct hns3_nic_priv *priv)
3720 {
3721         if (!priv->ring)
3722                 return;
3723
3724         devm_kfree(priv->dev, priv->ring);
3725         priv->ring = NULL;
3726 }
3727
3728 static int hns3_alloc_ring_memory(struct hns3_enet_ring *ring)
3729 {
3730         int ret;
3731
3732         if (ring->desc_num <= 0 || ring->buf_size <= 0)
3733                 return -EINVAL;
3734
3735         ring->desc_cb = devm_kcalloc(ring_to_dev(ring), ring->desc_num,
3736                                      sizeof(ring->desc_cb[0]), GFP_KERNEL);
3737         if (!ring->desc_cb) {
3738                 ret = -ENOMEM;
3739                 goto out;
3740         }
3741
3742         ret = hns3_alloc_desc(ring);
3743         if (ret)
3744                 goto out_with_desc_cb;
3745
3746         if (!HNAE3_IS_TX_RING(ring)) {
3747                 ret = hns3_alloc_ring_buffers(ring);
3748                 if (ret)
3749                         goto out_with_desc;
3750         }
3751
3752         return 0;
3753
3754 out_with_desc:
3755         hns3_free_desc(ring);
3756 out_with_desc_cb:
3757         devm_kfree(ring_to_dev(ring), ring->desc_cb);
3758         ring->desc_cb = NULL;
3759 out:
3760         return ret;
3761 }
3762
3763 void hns3_fini_ring(struct hns3_enet_ring *ring)
3764 {
3765         hns3_free_desc(ring);
3766         devm_kfree(ring_to_dev(ring), ring->desc_cb);
3767         ring->desc_cb = NULL;
3768         ring->next_to_clean = 0;
3769         ring->next_to_use = 0;
3770         ring->pending_buf = 0;
3771         if (ring->skb) {
3772                 dev_kfree_skb_any(ring->skb);
3773                 ring->skb = NULL;
3774         }
3775 }
3776
3777 static int hns3_buf_size2type(u32 buf_size)
3778 {
3779         int bd_size_type;
3780
3781         switch (buf_size) {
3782         case 512:
3783                 bd_size_type = HNS3_BD_SIZE_512_TYPE;
3784                 break;
3785         case 1024:
3786                 bd_size_type = HNS3_BD_SIZE_1024_TYPE;
3787                 break;
3788         case 2048:
3789                 bd_size_type = HNS3_BD_SIZE_2048_TYPE;
3790                 break;
3791         case 4096:
3792                 bd_size_type = HNS3_BD_SIZE_4096_TYPE;
3793                 break;
3794         default:
3795                 bd_size_type = HNS3_BD_SIZE_2048_TYPE;
3796         }
3797
3798         return bd_size_type;
3799 }
3800
3801 static void hns3_init_ring_hw(struct hns3_enet_ring *ring)
3802 {
3803         dma_addr_t dma = ring->desc_dma_addr;
3804         struct hnae3_queue *q = ring->tqp;
3805
3806         if (!HNAE3_IS_TX_RING(ring)) {
3807                 hns3_write_dev(q, HNS3_RING_RX_RING_BASEADDR_L_REG, (u32)dma);
3808                 hns3_write_dev(q, HNS3_RING_RX_RING_BASEADDR_H_REG,
3809                                (u32)((dma >> 31) >> 1));
3810
3811                 hns3_write_dev(q, HNS3_RING_RX_RING_BD_LEN_REG,
3812                                hns3_buf_size2type(ring->buf_size));
3813                 hns3_write_dev(q, HNS3_RING_RX_RING_BD_NUM_REG,
3814                                ring->desc_num / 8 - 1);
3815
3816         } else {
3817                 hns3_write_dev(q, HNS3_RING_TX_RING_BASEADDR_L_REG,
3818                                (u32)dma);
3819                 hns3_write_dev(q, HNS3_RING_TX_RING_BASEADDR_H_REG,
3820                                (u32)((dma >> 31) >> 1));
3821
3822                 hns3_write_dev(q, HNS3_RING_TX_RING_BD_NUM_REG,
3823                                ring->desc_num / 8 - 1);
3824         }
3825 }
3826
3827 static void hns3_init_tx_ring_tc(struct hns3_nic_priv *priv)
3828 {
3829         struct hnae3_knic_private_info *kinfo = &priv->ae_handle->kinfo;
3830         int i;
3831
3832         for (i = 0; i < HNAE3_MAX_TC; i++) {
3833                 struct hnae3_tc_info *tc_info = &kinfo->tc_info[i];
3834                 int j;
3835
3836                 if (!tc_info->enable)
3837                         continue;
3838
3839                 for (j = 0; j < tc_info->tqp_count; j++) {
3840                         struct hnae3_queue *q;
3841
3842                         q = priv->ring[tc_info->tqp_offset + j].tqp;
3843                         hns3_write_dev(q, HNS3_RING_TX_RING_TC_REG,
3844                                        tc_info->tc);
3845                 }
3846         }
3847 }
3848
3849 int hns3_init_all_ring(struct hns3_nic_priv *priv)
3850 {
3851         struct hnae3_handle *h = priv->ae_handle;
3852         int ring_num = h->kinfo.num_tqps * 2;
3853         int i, j;
3854         int ret;
3855
3856         for (i = 0; i < ring_num; i++) {
3857                 ret = hns3_alloc_ring_memory(&priv->ring[i]);
3858                 if (ret) {
3859                         dev_err(priv->dev,
3860                                 "Alloc ring memory fail! ret=%d\n", ret);
3861                         goto out_when_alloc_ring_memory;
3862                 }
3863
3864                 u64_stats_init(&priv->ring[i].syncp);
3865         }
3866
3867         return 0;
3868
3869 out_when_alloc_ring_memory:
3870         for (j = i - 1; j >= 0; j--)
3871                 hns3_fini_ring(&priv->ring[j]);
3872
3873         return -ENOMEM;
3874 }
3875
3876 int hns3_uninit_all_ring(struct hns3_nic_priv *priv)
3877 {
3878         struct hnae3_handle *h = priv->ae_handle;
3879         int i;
3880
3881         for (i = 0; i < h->kinfo.num_tqps; i++) {
3882                 hns3_fini_ring(&priv->ring[i]);
3883                 hns3_fini_ring(&priv->ring[i + h->kinfo.num_tqps]);
3884         }
3885         return 0;
3886 }
3887
3888 /* Set mac addr if it is configured. or leave it to the AE driver */
3889 static int hns3_init_mac_addr(struct net_device *netdev)
3890 {
3891         struct hns3_nic_priv *priv = netdev_priv(netdev);
3892         struct hnae3_handle *h = priv->ae_handle;
3893         u8 mac_addr_temp[ETH_ALEN];
3894         int ret = 0;
3895
3896         if (h->ae_algo->ops->get_mac_addr)
3897                 h->ae_algo->ops->get_mac_addr(h, mac_addr_temp);
3898
3899         /* Check if the MAC address is valid, if not get a random one */
3900         if (!is_valid_ether_addr(mac_addr_temp)) {
3901                 eth_hw_addr_random(netdev);
3902                 dev_warn(priv->dev, "using random MAC address %pM\n",
3903                          netdev->dev_addr);
3904         } else {
3905                 ether_addr_copy(netdev->dev_addr, mac_addr_temp);
3906                 ether_addr_copy(netdev->perm_addr, mac_addr_temp);
3907         }
3908
3909         if (h->ae_algo->ops->set_mac_addr)
3910                 ret = h->ae_algo->ops->set_mac_addr(h, netdev->dev_addr, true);
3911
3912         return ret;
3913 }
3914
3915 static int hns3_init_phy(struct net_device *netdev)
3916 {
3917         struct hnae3_handle *h = hns3_get_handle(netdev);
3918         int ret = 0;
3919
3920         if (h->ae_algo->ops->mac_connect_phy)
3921                 ret = h->ae_algo->ops->mac_connect_phy(h);
3922
3923         return ret;
3924 }
3925
3926 static void hns3_uninit_phy(struct net_device *netdev)
3927 {
3928         struct hnae3_handle *h = hns3_get_handle(netdev);
3929
3930         if (h->ae_algo->ops->mac_disconnect_phy)
3931                 h->ae_algo->ops->mac_disconnect_phy(h);
3932 }
3933
3934 static int hns3_restore_fd_rules(struct net_device *netdev)
3935 {
3936         struct hnae3_handle *h = hns3_get_handle(netdev);
3937         int ret = 0;
3938
3939         if (h->ae_algo->ops->restore_fd_rules)
3940                 ret = h->ae_algo->ops->restore_fd_rules(h);
3941
3942         return ret;
3943 }
3944
3945 static void hns3_del_all_fd_rules(struct net_device *netdev, bool clear_list)
3946 {
3947         struct hnae3_handle *h = hns3_get_handle(netdev);
3948
3949         if (h->ae_algo->ops->del_all_fd_entries)
3950                 h->ae_algo->ops->del_all_fd_entries(h, clear_list);
3951 }
3952
3953 static int hns3_client_start(struct hnae3_handle *handle)
3954 {
3955         if (!handle->ae_algo->ops->client_start)
3956                 return 0;
3957
3958         return handle->ae_algo->ops->client_start(handle);
3959 }
3960
3961 static void hns3_client_stop(struct hnae3_handle *handle)
3962 {
3963         if (!handle->ae_algo->ops->client_stop)
3964                 return;
3965
3966         handle->ae_algo->ops->client_stop(handle);
3967 }
3968
3969 static void hns3_info_show(struct hns3_nic_priv *priv)
3970 {
3971         struct hnae3_knic_private_info *kinfo = &priv->ae_handle->kinfo;
3972
3973         dev_info(priv->dev, "MAC address: %pM\n", priv->netdev->dev_addr);
3974         dev_info(priv->dev, "Task queue pairs numbers: %u\n", kinfo->num_tqps);
3975         dev_info(priv->dev, "RSS size: %u\n", kinfo->rss_size);
3976         dev_info(priv->dev, "Allocated RSS size: %u\n", kinfo->req_rss_size);
3977         dev_info(priv->dev, "RX buffer length: %u\n", kinfo->rx_buf_len);
3978         dev_info(priv->dev, "Desc num per TX queue: %u\n", kinfo->num_tx_desc);
3979         dev_info(priv->dev, "Desc num per RX queue: %u\n", kinfo->num_rx_desc);
3980         dev_info(priv->dev, "Total number of enabled TCs: %u\n", kinfo->num_tc);
3981         dev_info(priv->dev, "Max mtu size: %u\n", priv->netdev->max_mtu);
3982 }
3983
3984 static int hns3_client_init(struct hnae3_handle *handle)
3985 {
3986         struct pci_dev *pdev = handle->pdev;
3987         u16 alloc_tqps, max_rss_size;
3988         struct hns3_nic_priv *priv;
3989         struct net_device *netdev;
3990         int ret;
3991
3992         handle->ae_algo->ops->get_tqps_and_rss_info(handle, &alloc_tqps,
3993                                                     &max_rss_size);
3994         netdev = alloc_etherdev_mq(sizeof(struct hns3_nic_priv), alloc_tqps);
3995         if (!netdev)
3996                 return -ENOMEM;
3997
3998         priv = netdev_priv(netdev);
3999         priv->dev = &pdev->dev;
4000         priv->netdev = netdev;
4001         priv->ae_handle = handle;
4002         priv->tx_timeout_count = 0;
4003         set_bit(HNS3_NIC_STATE_DOWN, &priv->state);
4004
4005         handle->msg_enable = netif_msg_init(debug, DEFAULT_MSG_LEVEL);
4006
4007         handle->kinfo.netdev = netdev;
4008         handle->priv = (void *)priv;
4009
4010         hns3_init_mac_addr(netdev);
4011
4012         hns3_set_default_feature(netdev);
4013
4014         netdev->watchdog_timeo = HNS3_TX_TIMEOUT;
4015         netdev->priv_flags |= IFF_UNICAST_FLT;
4016         netdev->netdev_ops = &hns3_nic_netdev_ops;
4017         SET_NETDEV_DEV(netdev, &pdev->dev);
4018         hns3_ethtool_set_ops(netdev);
4019
4020         /* Carrier off reporting is important to ethtool even BEFORE open */
4021         netif_carrier_off(netdev);
4022
4023         ret = hns3_get_ring_config(priv);
4024         if (ret) {
4025                 ret = -ENOMEM;
4026                 goto out_get_ring_cfg;
4027         }
4028
4029         ret = hns3_nic_alloc_vector_data(priv);
4030         if (ret) {
4031                 ret = -ENOMEM;
4032                 goto out_alloc_vector_data;
4033         }
4034
4035         ret = hns3_nic_init_vector_data(priv);
4036         if (ret) {
4037                 ret = -ENOMEM;
4038                 goto out_init_vector_data;
4039         }
4040
4041         ret = hns3_init_all_ring(priv);
4042         if (ret) {
4043                 ret = -ENOMEM;
4044                 goto out_init_ring;
4045         }
4046
4047         ret = hns3_init_phy(netdev);
4048         if (ret)
4049                 goto out_init_phy;
4050
4051         ret = register_netdev(netdev);
4052         if (ret) {
4053                 dev_err(priv->dev, "probe register netdev fail!\n");
4054                 goto out_reg_netdev_fail;
4055         }
4056
4057         /* the device can work without cpu rmap, only aRFS needs it */
4058         ret = hns3_set_rx_cpu_rmap(netdev);
4059         if (ret)
4060                 dev_warn(priv->dev, "set rx cpu rmap fail, ret=%d\n", ret);
4061
4062         ret = hns3_nic_init_irq(priv);
4063         if (ret) {
4064                 dev_err(priv->dev, "init irq failed! ret=%d\n", ret);
4065                 hns3_free_rx_cpu_rmap(netdev);
4066                 goto out_init_irq_fail;
4067         }
4068
4069         ret = hns3_client_start(handle);
4070         if (ret) {
4071                 dev_err(priv->dev, "hns3_client_start fail! ret=%d\n", ret);
4072                 goto out_client_start;
4073         }
4074
4075         hns3_dcbnl_setup(handle);
4076
4077         hns3_dbg_init(handle);
4078
4079         /* MTU range: (ETH_MIN_MTU(kernel default) - 9702) */
4080         netdev->max_mtu = HNS3_MAX_MTU;
4081
4082         set_bit(HNS3_NIC_STATE_INITED, &priv->state);
4083
4084         if (netif_msg_drv(handle))
4085                 hns3_info_show(priv);
4086
4087         return ret;
4088
4089 out_client_start:
4090         hns3_free_rx_cpu_rmap(netdev);
4091         hns3_nic_uninit_irq(priv);
4092 out_init_irq_fail:
4093         unregister_netdev(netdev);
4094 out_reg_netdev_fail:
4095         hns3_uninit_phy(netdev);
4096 out_init_phy:
4097         hns3_uninit_all_ring(priv);
4098 out_init_ring:
4099         hns3_nic_uninit_vector_data(priv);
4100 out_init_vector_data:
4101         hns3_nic_dealloc_vector_data(priv);
4102 out_alloc_vector_data:
4103         priv->ring = NULL;
4104 out_get_ring_cfg:
4105         priv->ae_handle = NULL;
4106         free_netdev(netdev);
4107         return ret;
4108 }
4109
4110 static void hns3_client_uninit(struct hnae3_handle *handle, bool reset)
4111 {
4112         struct net_device *netdev = handle->kinfo.netdev;
4113         struct hns3_nic_priv *priv = netdev_priv(netdev);
4114         int ret;
4115
4116         hns3_remove_hw_addr(netdev);
4117
4118         if (netdev->reg_state != NETREG_UNINITIALIZED)
4119                 unregister_netdev(netdev);
4120
4121         hns3_client_stop(handle);
4122
4123         hns3_uninit_phy(netdev);
4124
4125         if (!test_and_clear_bit(HNS3_NIC_STATE_INITED, &priv->state)) {
4126                 netdev_warn(netdev, "already uninitialized\n");
4127                 goto out_netdev_free;
4128         }
4129
4130         hns3_free_rx_cpu_rmap(netdev);
4131
4132         hns3_nic_uninit_irq(priv);
4133
4134         hns3_del_all_fd_rules(netdev, true);
4135
4136         hns3_clear_all_ring(handle, true);
4137
4138         hns3_nic_uninit_vector_data(priv);
4139
4140         hns3_nic_dealloc_vector_data(priv);
4141
4142         ret = hns3_uninit_all_ring(priv);
4143         if (ret)
4144                 netdev_err(netdev, "uninit ring error\n");
4145
4146         hns3_put_ring_config(priv);
4147
4148         hns3_dbg_uninit(handle);
4149
4150 out_netdev_free:
4151         free_netdev(netdev);
4152 }
4153
4154 static void hns3_link_status_change(struct hnae3_handle *handle, bool linkup)
4155 {
4156         struct net_device *netdev = handle->kinfo.netdev;
4157
4158         if (!netdev)
4159                 return;
4160
4161         if (linkup) {
4162                 netif_carrier_on(netdev);
4163                 netif_tx_wake_all_queues(netdev);
4164                 if (netif_msg_link(handle))
4165                         netdev_info(netdev, "link up\n");
4166         } else {
4167                 netif_carrier_off(netdev);
4168                 netif_tx_stop_all_queues(netdev);
4169                 if (netif_msg_link(handle))
4170                         netdev_info(netdev, "link down\n");
4171         }
4172 }
4173
4174 static int hns3_client_setup_tc(struct hnae3_handle *handle, u8 tc)
4175 {
4176         struct hnae3_knic_private_info *kinfo = &handle->kinfo;
4177         struct net_device *ndev = kinfo->netdev;
4178
4179         if (tc > HNAE3_MAX_TC)
4180                 return -EINVAL;
4181
4182         if (!ndev)
4183                 return -ENODEV;
4184
4185         return hns3_nic_set_real_num_queue(ndev);
4186 }
4187
4188 static int hns3_recover_hw_addr(struct net_device *ndev)
4189 {
4190         struct netdev_hw_addr_list *list;
4191         struct netdev_hw_addr *ha, *tmp;
4192         int ret = 0;
4193
4194         netif_addr_lock_bh(ndev);
4195         /* go through and sync uc_addr entries to the device */
4196         list = &ndev->uc;
4197         list_for_each_entry_safe(ha, tmp, &list->list, list) {
4198                 ret = hns3_nic_uc_sync(ndev, ha->addr);
4199                 if (ret)
4200                         goto out;
4201         }
4202
4203         /* go through and sync mc_addr entries to the device */
4204         list = &ndev->mc;
4205         list_for_each_entry_safe(ha, tmp, &list->list, list) {
4206                 ret = hns3_nic_mc_sync(ndev, ha->addr);
4207                 if (ret)
4208                         goto out;
4209         }
4210
4211 out:
4212         netif_addr_unlock_bh(ndev);
4213         return ret;
4214 }
4215
4216 static void hns3_remove_hw_addr(struct net_device *netdev)
4217 {
4218         struct netdev_hw_addr_list *list;
4219         struct netdev_hw_addr *ha, *tmp;
4220
4221         hns3_nic_uc_unsync(netdev, netdev->dev_addr);
4222
4223         netif_addr_lock_bh(netdev);
4224         /* go through and unsync uc_addr entries to the device */
4225         list = &netdev->uc;
4226         list_for_each_entry_safe(ha, tmp, &list->list, list)
4227                 hns3_nic_uc_unsync(netdev, ha->addr);
4228
4229         /* go through and unsync mc_addr entries to the device */
4230         list = &netdev->mc;
4231         list_for_each_entry_safe(ha, tmp, &list->list, list)
4232                 if (ha->refcount > 1)
4233                         hns3_nic_mc_unsync(netdev, ha->addr);
4234
4235         netif_addr_unlock_bh(netdev);
4236 }
4237
4238 static void hns3_clear_tx_ring(struct hns3_enet_ring *ring)
4239 {
4240         while (ring->next_to_clean != ring->next_to_use) {
4241                 ring->desc[ring->next_to_clean].tx.bdtp_fe_sc_vld_ra_ri = 0;
4242                 hns3_free_buffer_detach(ring, ring->next_to_clean);
4243                 ring_ptr_move_fw(ring, next_to_clean);
4244         }
4245 }
4246
4247 static int hns3_clear_rx_ring(struct hns3_enet_ring *ring)
4248 {
4249         struct hns3_desc_cb res_cbs;
4250         int ret;
4251
4252         while (ring->next_to_use != ring->next_to_clean) {
4253                 /* When a buffer is not reused, it's memory has been
4254                  * freed in hns3_handle_rx_bd or will be freed by
4255                  * stack, so we need to replace the buffer here.
4256                  */
4257                 if (!ring->desc_cb[ring->next_to_use].reuse_flag) {
4258                         ret = hns3_reserve_buffer_map(ring, &res_cbs);
4259                         if (ret) {
4260                                 u64_stats_update_begin(&ring->syncp);
4261                                 ring->stats.sw_err_cnt++;
4262                                 u64_stats_update_end(&ring->syncp);
4263                                 /* if alloc new buffer fail, exit directly
4264                                  * and reclear in up flow.
4265                                  */
4266                                 netdev_warn(ring_to_netdev(ring),
4267                                             "reserve buffer map failed, ret = %d\n",
4268                                             ret);
4269                                 return ret;
4270                         }
4271                         hns3_replace_buffer(ring, ring->next_to_use, &res_cbs);
4272                 }
4273                 ring_ptr_move_fw(ring, next_to_use);
4274         }
4275
4276         /* Free the pending skb in rx ring */
4277         if (ring->skb) {
4278                 dev_kfree_skb_any(ring->skb);
4279                 ring->skb = NULL;
4280                 ring->pending_buf = 0;
4281         }
4282
4283         return 0;
4284 }
4285
4286 static void hns3_force_clear_rx_ring(struct hns3_enet_ring *ring)
4287 {
4288         while (ring->next_to_use != ring->next_to_clean) {
4289                 /* When a buffer is not reused, it's memory has been
4290                  * freed in hns3_handle_rx_bd or will be freed by
4291                  * stack, so only need to unmap the buffer here.
4292                  */
4293                 if (!ring->desc_cb[ring->next_to_use].reuse_flag) {
4294                         hns3_unmap_buffer(ring,
4295                                           &ring->desc_cb[ring->next_to_use]);
4296                         ring->desc_cb[ring->next_to_use].dma = 0;
4297                 }
4298
4299                 ring_ptr_move_fw(ring, next_to_use);
4300         }
4301 }
4302
4303 static void hns3_clear_all_ring(struct hnae3_handle *h, bool force)
4304 {
4305         struct net_device *ndev = h->kinfo.netdev;
4306         struct hns3_nic_priv *priv = netdev_priv(ndev);
4307         u32 i;
4308
4309         for (i = 0; i < h->kinfo.num_tqps; i++) {
4310                 struct hns3_enet_ring *ring;
4311
4312                 ring = &priv->ring[i];
4313                 hns3_clear_tx_ring(ring);
4314
4315                 ring = &priv->ring[i + h->kinfo.num_tqps];
4316                 /* Continue to clear other rings even if clearing some
4317                  * rings failed.
4318                  */
4319                 if (force)
4320                         hns3_force_clear_rx_ring(ring);
4321                 else
4322                         hns3_clear_rx_ring(ring);
4323         }
4324 }
4325
4326 int hns3_nic_reset_all_ring(struct hnae3_handle *h)
4327 {
4328         struct net_device *ndev = h->kinfo.netdev;
4329         struct hns3_nic_priv *priv = netdev_priv(ndev);
4330         struct hns3_enet_ring *rx_ring;
4331         int i, j;
4332         int ret;
4333
4334         for (i = 0; i < h->kinfo.num_tqps; i++) {
4335                 ret = h->ae_algo->ops->reset_queue(h, i);
4336                 if (ret)
4337                         return ret;
4338
4339                 hns3_init_ring_hw(&priv->ring[i]);
4340
4341                 /* We need to clear tx ring here because self test will
4342                  * use the ring and will not run down before up
4343                  */
4344                 hns3_clear_tx_ring(&priv->ring[i]);
4345                 priv->ring[i].next_to_clean = 0;
4346                 priv->ring[i].next_to_use = 0;
4347
4348                 rx_ring = &priv->ring[i + h->kinfo.num_tqps];
4349                 hns3_init_ring_hw(rx_ring);
4350                 ret = hns3_clear_rx_ring(rx_ring);
4351                 if (ret)
4352                         return ret;
4353
4354                 /* We can not know the hardware head and tail when this
4355                  * function is called in reset flow, so we reuse all desc.
4356                  */
4357                 for (j = 0; j < rx_ring->desc_num; j++)
4358                         hns3_reuse_buffer(rx_ring, j);
4359
4360                 rx_ring->next_to_clean = 0;
4361                 rx_ring->next_to_use = 0;
4362         }
4363
4364         hns3_init_tx_ring_tc(priv);
4365
4366         return 0;
4367 }
4368
4369 static void hns3_store_coal(struct hns3_nic_priv *priv)
4370 {
4371         /* ethtool only support setting and querying one coal
4372          * configuration for now, so save the vector 0' coal
4373          * configuration here in order to restore it.
4374          */
4375         memcpy(&priv->tx_coal, &priv->tqp_vector[0].tx_group.coal,
4376                sizeof(struct hns3_enet_coalesce));
4377         memcpy(&priv->rx_coal, &priv->tqp_vector[0].rx_group.coal,
4378                sizeof(struct hns3_enet_coalesce));
4379 }
4380
4381 static void hns3_restore_coal(struct hns3_nic_priv *priv)
4382 {
4383         u16 vector_num = priv->vector_num;
4384         int i;
4385
4386         for (i = 0; i < vector_num; i++) {
4387                 memcpy(&priv->tqp_vector[i].tx_group.coal, &priv->tx_coal,
4388                        sizeof(struct hns3_enet_coalesce));
4389                 memcpy(&priv->tqp_vector[i].rx_group.coal, &priv->rx_coal,
4390                        sizeof(struct hns3_enet_coalesce));
4391         }
4392 }
4393
4394 static int hns3_reset_notify_down_enet(struct hnae3_handle *handle)
4395 {
4396         struct hnae3_ae_dev *ae_dev = pci_get_drvdata(handle->pdev);
4397         struct hnae3_knic_private_info *kinfo = &handle->kinfo;
4398         struct net_device *ndev = kinfo->netdev;
4399         struct hns3_nic_priv *priv = netdev_priv(ndev);
4400
4401         if (test_and_set_bit(HNS3_NIC_STATE_RESETTING, &priv->state))
4402                 return 0;
4403
4404         /* it is cumbersome for hardware to pick-and-choose entries for deletion
4405          * from table space. Hence, for function reset software intervention is
4406          * required to delete the entries
4407          */
4408         if (hns3_dev_ongoing_func_reset(ae_dev)) {
4409                 hns3_remove_hw_addr(ndev);
4410                 hns3_del_all_fd_rules(ndev, false);
4411         }
4412
4413         if (!netif_running(ndev))
4414                 return 0;
4415
4416         return hns3_nic_net_stop(ndev);
4417 }
4418
4419 static int hns3_reset_notify_up_enet(struct hnae3_handle *handle)
4420 {
4421         struct hnae3_knic_private_info *kinfo = &handle->kinfo;
4422         struct hns3_nic_priv *priv = netdev_priv(kinfo->netdev);
4423         int ret = 0;
4424
4425         clear_bit(HNS3_NIC_STATE_RESETTING, &priv->state);
4426
4427         if (netif_running(kinfo->netdev)) {
4428                 ret = hns3_nic_net_open(kinfo->netdev);
4429                 if (ret) {
4430                         set_bit(HNS3_NIC_STATE_RESETTING, &priv->state);
4431                         netdev_err(kinfo->netdev,
4432                                    "net up fail, ret=%d!\n", ret);
4433                         return ret;
4434                 }
4435         }
4436
4437         return ret;
4438 }
4439
4440 static int hns3_reset_notify_init_enet(struct hnae3_handle *handle)
4441 {
4442         struct net_device *netdev = handle->kinfo.netdev;
4443         struct hns3_nic_priv *priv = netdev_priv(netdev);
4444         int ret;
4445
4446         /* Carrier off reporting is important to ethtool even BEFORE open */
4447         netif_carrier_off(netdev);
4448
4449         ret = hns3_get_ring_config(priv);
4450         if (ret)
4451                 return ret;
4452
4453         ret = hns3_nic_alloc_vector_data(priv);
4454         if (ret)
4455                 goto err_put_ring;
4456
4457         hns3_restore_coal(priv);
4458
4459         ret = hns3_nic_init_vector_data(priv);
4460         if (ret)
4461                 goto err_dealloc_vector;
4462
4463         ret = hns3_init_all_ring(priv);
4464         if (ret)
4465                 goto err_uninit_vector;
4466
4467         /* the device can work without cpu rmap, only aRFS needs it */
4468         ret = hns3_set_rx_cpu_rmap(netdev);
4469         if (ret)
4470                 dev_warn(priv->dev, "set rx cpu rmap fail, ret=%d\n", ret);
4471
4472         ret = hns3_nic_init_irq(priv);
4473         if (ret) {
4474                 dev_err(priv->dev, "init irq failed! ret=%d\n", ret);
4475                 hns3_free_rx_cpu_rmap(netdev);
4476                 goto err_init_irq_fail;
4477         }
4478
4479         ret = hns3_client_start(handle);
4480         if (ret) {
4481                 dev_err(priv->dev, "hns3_client_start fail! ret=%d\n", ret);
4482                 goto err_client_start_fail;
4483         }
4484
4485         set_bit(HNS3_NIC_STATE_INITED, &priv->state);
4486
4487         return ret;
4488
4489 err_client_start_fail:
4490         hns3_free_rx_cpu_rmap(netdev);
4491         hns3_nic_uninit_irq(priv);
4492 err_init_irq_fail:
4493         hns3_uninit_all_ring(priv);
4494 err_uninit_vector:
4495         hns3_nic_uninit_vector_data(priv);
4496 err_dealloc_vector:
4497         hns3_nic_dealloc_vector_data(priv);
4498 err_put_ring:
4499         hns3_put_ring_config(priv);
4500
4501         return ret;
4502 }
4503
4504 static int hns3_reset_notify_restore_enet(struct hnae3_handle *handle)
4505 {
4506         struct net_device *netdev = handle->kinfo.netdev;
4507         bool vlan_filter_enable;
4508         int ret;
4509
4510         ret = hns3_init_mac_addr(netdev);
4511         if (ret)
4512                 return ret;
4513
4514         ret = hns3_recover_hw_addr(netdev);
4515         if (ret)
4516                 return ret;
4517
4518         ret = hns3_update_promisc_mode(netdev, handle->netdev_flags);
4519         if (ret)
4520                 return ret;
4521
4522         vlan_filter_enable = netdev->flags & IFF_PROMISC ? false : true;
4523         hns3_enable_vlan_filter(netdev, vlan_filter_enable);
4524
4525         if (handle->ae_algo->ops->restore_vlan_table)
4526                 handle->ae_algo->ops->restore_vlan_table(handle);
4527
4528         return hns3_restore_fd_rules(netdev);
4529 }
4530
4531 static int hns3_reset_notify_uninit_enet(struct hnae3_handle *handle)
4532 {
4533         struct net_device *netdev = handle->kinfo.netdev;
4534         struct hns3_nic_priv *priv = netdev_priv(netdev);
4535         int ret;
4536
4537         if (!test_and_clear_bit(HNS3_NIC_STATE_INITED, &priv->state)) {
4538                 netdev_warn(netdev, "already uninitialized\n");
4539                 return 0;
4540         }
4541
4542         hns3_free_rx_cpu_rmap(netdev);
4543         hns3_nic_uninit_irq(priv);
4544         hns3_clear_all_ring(handle, true);
4545         hns3_reset_tx_queue(priv->ae_handle);
4546
4547         hns3_nic_uninit_vector_data(priv);
4548
4549         hns3_store_coal(priv);
4550
4551         hns3_nic_dealloc_vector_data(priv);
4552
4553         ret = hns3_uninit_all_ring(priv);
4554         if (ret)
4555                 netdev_err(netdev, "uninit ring error\n");
4556
4557         hns3_put_ring_config(priv);
4558
4559         return ret;
4560 }
4561
4562 static int hns3_reset_notify(struct hnae3_handle *handle,
4563                              enum hnae3_reset_notify_type type)
4564 {
4565         int ret = 0;
4566
4567         switch (type) {
4568         case HNAE3_UP_CLIENT:
4569                 ret = hns3_reset_notify_up_enet(handle);
4570                 break;
4571         case HNAE3_DOWN_CLIENT:
4572                 ret = hns3_reset_notify_down_enet(handle);
4573                 break;
4574         case HNAE3_INIT_CLIENT:
4575                 ret = hns3_reset_notify_init_enet(handle);
4576                 break;
4577         case HNAE3_UNINIT_CLIENT:
4578                 ret = hns3_reset_notify_uninit_enet(handle);
4579                 break;
4580         case HNAE3_RESTORE_CLIENT:
4581                 ret = hns3_reset_notify_restore_enet(handle);
4582                 break;
4583         default:
4584                 break;
4585         }
4586
4587         return ret;
4588 }
4589
4590 static int hns3_change_channels(struct hnae3_handle *handle, u32 new_tqp_num,
4591                                 bool rxfh_configured)
4592 {
4593         int ret;
4594
4595         ret = handle->ae_algo->ops->set_channels(handle, new_tqp_num,
4596                                                  rxfh_configured);
4597         if (ret) {
4598                 dev_err(&handle->pdev->dev,
4599                         "Change tqp num(%u) fail.\n", new_tqp_num);
4600                 return ret;
4601         }
4602
4603         ret = hns3_reset_notify(handle, HNAE3_INIT_CLIENT);
4604         if (ret)
4605                 return ret;
4606
4607         ret =  hns3_reset_notify(handle, HNAE3_UP_CLIENT);
4608         if (ret)
4609                 hns3_reset_notify(handle, HNAE3_UNINIT_CLIENT);
4610
4611         return ret;
4612 }
4613
4614 int hns3_set_channels(struct net_device *netdev,
4615                       struct ethtool_channels *ch)
4616 {
4617         struct hnae3_handle *h = hns3_get_handle(netdev);
4618         struct hnae3_knic_private_info *kinfo = &h->kinfo;
4619         bool rxfh_configured = netif_is_rxfh_configured(netdev);
4620         u32 new_tqp_num = ch->combined_count;
4621         u16 org_tqp_num;
4622         int ret;
4623
4624         if (hns3_nic_resetting(netdev))
4625                 return -EBUSY;
4626
4627         if (ch->rx_count || ch->tx_count)
4628                 return -EINVAL;
4629
4630         if (new_tqp_num > hns3_get_max_available_channels(h) ||
4631             new_tqp_num < 1) {
4632                 dev_err(&netdev->dev,
4633                         "Change tqps fail, the tqp range is from 1 to %u",
4634                         hns3_get_max_available_channels(h));
4635                 return -EINVAL;
4636         }
4637
4638         if (kinfo->rss_size == new_tqp_num)
4639                 return 0;
4640
4641         netif_dbg(h, drv, netdev,
4642                   "set channels: tqp_num=%u, rxfh=%d\n",
4643                   new_tqp_num, rxfh_configured);
4644
4645         ret = hns3_reset_notify(h, HNAE3_DOWN_CLIENT);
4646         if (ret)
4647                 return ret;
4648
4649         ret = hns3_reset_notify(h, HNAE3_UNINIT_CLIENT);
4650         if (ret)
4651                 return ret;
4652
4653         org_tqp_num = h->kinfo.num_tqps;
4654         ret = hns3_change_channels(h, new_tqp_num, rxfh_configured);
4655         if (ret) {
4656                 int ret1;
4657
4658                 netdev_warn(netdev,
4659                             "Change channels fail, revert to old value\n");
4660                 ret1 = hns3_change_channels(h, org_tqp_num, rxfh_configured);
4661                 if (ret1) {
4662                         netdev_err(netdev,
4663                                    "revert to old channel fail\n");
4664                         return ret1;
4665                 }
4666
4667                 return ret;
4668         }
4669
4670         return 0;
4671 }
4672
4673 static const struct hns3_hw_error_info hns3_hw_err[] = {
4674         { .type = HNAE3_PPU_POISON_ERROR,
4675           .msg = "PPU poison" },
4676         { .type = HNAE3_CMDQ_ECC_ERROR,
4677           .msg = "IMP CMDQ error" },
4678         { .type = HNAE3_IMP_RD_POISON_ERROR,
4679           .msg = "IMP RD poison" },
4680 };
4681
4682 static void hns3_process_hw_error(struct hnae3_handle *handle,
4683                                   enum hnae3_hw_error_type type)
4684 {
4685         int i;
4686
4687         for (i = 0; i < ARRAY_SIZE(hns3_hw_err); i++) {
4688                 if (hns3_hw_err[i].type == type) {
4689                         dev_err(&handle->pdev->dev, "Detected %s!\n",
4690                                 hns3_hw_err[i].msg);
4691                         break;
4692                 }
4693         }
4694 }
4695
4696 static const struct hnae3_client_ops client_ops = {
4697         .init_instance = hns3_client_init,
4698         .uninit_instance = hns3_client_uninit,
4699         .link_status_change = hns3_link_status_change,
4700         .setup_tc = hns3_client_setup_tc,
4701         .reset_notify = hns3_reset_notify,
4702         .process_hw_error = hns3_process_hw_error,
4703 };
4704
4705 /* hns3_init_module - Driver registration routine
4706  * hns3_init_module is the first routine called when the driver is
4707  * loaded. All it does is register with the PCI subsystem.
4708  */
4709 static int __init hns3_init_module(void)
4710 {
4711         int ret;
4712
4713         pr_info("%s: %s - version\n", hns3_driver_name, hns3_driver_string);
4714         pr_info("%s: %s\n", hns3_driver_name, hns3_copyright);
4715
4716         client.type = HNAE3_CLIENT_KNIC;
4717         snprintf(client.name, HNAE3_CLIENT_NAME_LENGTH, "%s",
4718                  hns3_driver_name);
4719
4720         client.ops = &client_ops;
4721
4722         INIT_LIST_HEAD(&client.node);
4723
4724         hns3_dbg_register_debugfs(hns3_driver_name);
4725
4726         ret = hnae3_register_client(&client);
4727         if (ret)
4728                 goto err_reg_client;
4729
4730         ret = pci_register_driver(&hns3_driver);
4731         if (ret)
4732                 goto err_reg_driver;
4733
4734         return ret;
4735
4736 err_reg_driver:
4737         hnae3_unregister_client(&client);
4738 err_reg_client:
4739         hns3_dbg_unregister_debugfs();
4740         return ret;
4741 }
4742 module_init(hns3_init_module);
4743
4744 /* hns3_exit_module - Driver exit cleanup routine
4745  * hns3_exit_module is called just before the driver is removed
4746  * from memory.
4747  */
4748 static void __exit hns3_exit_module(void)
4749 {
4750         pci_unregister_driver(&hns3_driver);
4751         hnae3_unregister_client(&client);
4752         hns3_dbg_unregister_debugfs();
4753 }
4754 module_exit(hns3_exit_module);
4755
4756 MODULE_DESCRIPTION("HNS3: Hisilicon Ethernet Driver");
4757 MODULE_AUTHOR("Huawei Tech. Co., Ltd.");
4758 MODULE_LICENSE("GPL");
4759 MODULE_ALIAS("pci:hns-nic");
4760 MODULE_VERSION(HNS3_MOD_VERSION);