drivers/net/ethernet/hisilicon/hns3/hns3_enet.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 // Copyright (c) 2016-2017 Hisilicon Limited.
   3
   4 #include <linux/dma-mapping.h>
   5 #include <linux/etherdevice.h>
   6 #include <linux/interrupt.h>
   7 #ifdef CONFIG_RFS_ACCEL
   8 #include <linux/cpu_rmap.h>
   9 #endif
  10 #include <linux/if_vlan.h>
  11 #include <linux/irq.h>
  12 #include <linux/ip.h>
  13 #include <linux/ipv6.h>
  14 #include <linux/module.h>
  15 #include <linux/pci.h>
  16 #include <linux/aer.h>
  17 #include <linux/skbuff.h>
  18 #include <linux/sctp.h>
  19 #include <net/gre.h>
  20 #include <net/ip6_checksum.h>
  21 #include <net/pkt_cls.h>
  22 #include <net/tcp.h>
  23 #include <net/vxlan.h>
  24 #include <net/geneve.h>
  25
  26 #include "hnae3.h"
  27 #include "hns3_enet.h"
  28 /* All hns3 tracepoints are defined by the include below, which
  29  * must be included exactly once across the whole kernel with
  30  * CREATE_TRACE_POINTS defined
  31  */
  32 #define CREATE_TRACE_POINTS
  33 #include "hns3_trace.h"
  34
  35 #define hns3_set_field(origin, shift, val)      ((origin) |= (val) << (shift))
  36 #define hns3_tx_bd_count(S)     DIV_ROUND_UP(S, HNS3_MAX_BD_SIZE)
  37
  38 #define hns3_rl_err(fmt, ...)                                           \
  39         do {                                                            \
  40                 if (net_ratelimit())                                    \
  41                         netdev_err(fmt, ##__VA_ARGS__);                 \
  42         } while (0)
  43
  44 static void hns3_clear_all_ring(struct hnae3_handle *h, bool force);
  45
  46 static const char hns3_driver_name[] = "hns3";
  47 static const char hns3_driver_string[] =
  48                         "Hisilicon Ethernet Network Driver for Hip08 Family";
  49 static const char hns3_copyright[] = "Copyright (c) 2017 Huawei Corporation.";
  50 static struct hnae3_client client;
  51
  52 static int debug = -1;
  53 module_param(debug, int, 0);
  54 MODULE_PARM_DESC(debug, " Network interface message level setting");
  55
  56 #define DEFAULT_MSG_LEVEL (NETIF_MSG_PROBE | NETIF_MSG_LINK | \
  57                            NETIF_MSG_IFDOWN | NETIF_MSG_IFUP)
  58
  59 #define HNS3_INNER_VLAN_TAG     1
  60 #define HNS3_OUTER_VLAN_TAG     2
  61
  62 #define HNS3_MIN_TX_LEN         33U
  63
  64 /* hns3_pci_tbl - PCI Device ID Table
  65  *
  66  * Last entry must be all 0s
  67  *
  68  * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
  69  *   Class, Class Mask, private data (not used) }
  70  */
  71 static const struct pci_device_id hns3_pci_tbl[] = {
  72         {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_GE), 0},
  73         {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_25GE), 0},
  74         {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_25GE_RDMA),
  75          HNAE3_DEV_SUPPORT_ROCE_DCB_BITS},
  76         {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_25GE_RDMA_MACSEC),
  77          HNAE3_DEV_SUPPORT_ROCE_DCB_BITS},
  78         {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_50GE_RDMA),
  79          HNAE3_DEV_SUPPORT_ROCE_DCB_BITS},
  80         {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_50GE_RDMA_MACSEC),
  81          HNAE3_DEV_SUPPORT_ROCE_DCB_BITS},
  82         {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_100G_RDMA_MACSEC),
  83          HNAE3_DEV_SUPPORT_ROCE_DCB_BITS},
  84         {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_200G_RDMA),
  85          HNAE3_DEV_SUPPORT_ROCE_DCB_BITS},
  86         {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_VF), 0},
  87         {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_RDMA_DCB_PFC_VF),
  88          HNAE3_DEV_SUPPORT_ROCE_DCB_BITS},
  89         /* required last entry */
  90         {0, }
  91 };
  92 MODULE_DEVICE_TABLE(pci, hns3_pci_tbl);
  93
  94 static irqreturn_t hns3_irq_handle(int irq, void *vector)
  95 {
  96         struct hns3_enet_tqp_vector *tqp_vector = vector;
  97
  98         napi_schedule_irqoff(&tqp_vector->napi);
  99
 100         return IRQ_HANDLED;
 101 }
 102
 103 static void hns3_nic_uninit_irq(struct hns3_nic_priv *priv)
 104 {
 105         struct hns3_enet_tqp_vector *tqp_vectors;
 106         unsigned int i;
 107
 108         for (i = 0; i < priv->vector_num; i++) {
 109                 tqp_vectors = &priv->tqp_vector[i];
 110
 111                 if (tqp_vectors->irq_init_flag != HNS3_VECTOR_INITED)
 112                         continue;
 113
 114                 /* clear the affinity mask */
 115                 irq_set_affinity_hint(tqp_vectors->vector_irq, NULL);
 116
 117                 /* release the irq resource */
 118                 free_irq(tqp_vectors->vector_irq, tqp_vectors);
 119                 tqp_vectors->irq_init_flag = HNS3_VECTOR_NOT_INITED;
 120         }
 121 }
 122
 123 static int hns3_nic_init_irq(struct hns3_nic_priv *priv)
 124 {
 125         struct hns3_enet_tqp_vector *tqp_vectors;
 126         int txrx_int_idx = 0;
 127         int rx_int_idx = 0;
 128         int tx_int_idx = 0;
 129         unsigned int i;
 130         int ret;
 131
 132         for (i = 0; i < priv->vector_num; i++) {
 133                 tqp_vectors = &priv->tqp_vector[i];
 134
 135                 if (tqp_vectors->irq_init_flag == HNS3_VECTOR_INITED)
 136                         continue;
 137
 138                 if (tqp_vectors->tx_group.ring && tqp_vectors->rx_group.ring) {
 139                         snprintf(tqp_vectors->name, HNAE3_INT_NAME_LEN,
 140                                  "%s-%s-%s-%d", hns3_driver_name,
 141                                  pci_name(priv->ae_handle->pdev),
 142                                  "TxRx", txrx_int_idx++);
 143                         txrx_int_idx++;
 144                 } else if (tqp_vectors->rx_group.ring) {
 145                         snprintf(tqp_vectors->name, HNAE3_INT_NAME_LEN,
 146                                  "%s-%s-%s-%d", hns3_driver_name,
 147                                  pci_name(priv->ae_handle->pdev),
 148                                  "Rx", rx_int_idx++);
 149                 } else if (tqp_vectors->tx_group.ring) {
 150                         snprintf(tqp_vectors->name, HNAE3_INT_NAME_LEN,
 151                                  "%s-%s-%s-%d", hns3_driver_name,
 152                                  pci_name(priv->ae_handle->pdev),
 153                                  "Tx", tx_int_idx++);
 154                 } else {
 155                         /* Skip this unused q_vector */
 156                         continue;
 157                 }
 158
 159                 tqp_vectors->name[HNAE3_INT_NAME_LEN - 1] = '\0';
 160
 161                 irq_set_status_flags(tqp_vectors->vector_irq, IRQ_NOAUTOEN);
 162                 ret = request_irq(tqp_vectors->vector_irq, hns3_irq_handle, 0,
 163                                   tqp_vectors->name, tqp_vectors);
 164                 if (ret) {
 165                         netdev_err(priv->netdev, "request irq(%d) fail\n",
 166                                    tqp_vectors->vector_irq);
 167                         hns3_nic_uninit_irq(priv);
 168                         return ret;
 169                 }
 170
 171                 irq_set_affinity_hint(tqp_vectors->vector_irq,
 172                                       &tqp_vectors->affinity_mask);
 173
 174                 tqp_vectors->irq_init_flag = HNS3_VECTOR_INITED;
 175         }
 176
 177         return 0;
 178 }
 179
 180 static void hns3_mask_vector_irq(struct hns3_enet_tqp_vector *tqp_vector,
 181                                  u32 mask_en)
 182 {
 183         writel(mask_en, tqp_vector->mask_addr);
 184 }
 185
 186 static void hns3_vector_enable(struct hns3_enet_tqp_vector *tqp_vector)
 187 {
 188         napi_enable(&tqp_vector->napi);
 189         enable_irq(tqp_vector->vector_irq);
 190
 191         /* enable vector */
 192         hns3_mask_vector_irq(tqp_vector, 1);
 193 }
 194
 195 static void hns3_vector_disable(struct hns3_enet_tqp_vector *tqp_vector)
 196 {
 197         /* disable vector */
 198         hns3_mask_vector_irq(tqp_vector, 0);
 199
 200         disable_irq(tqp_vector->vector_irq);
 201         napi_disable(&tqp_vector->napi);
 202 }
 203
 204 void hns3_set_vector_coalesce_rl(struct hns3_enet_tqp_vector *tqp_vector,
 205                                  u32 rl_value)
 206 {
 207         u32 rl_reg = hns3_rl_usec_to_reg(rl_value);
 208
 209         /* this defines the configuration for RL (Interrupt Rate Limiter).
 210          * Rl defines rate of interrupts i.e. number of interrupts-per-second
 211          * GL and RL(Rate Limiter) are 2 ways to acheive interrupt coalescing
 212          */
 213         if (rl_reg > 0 && !tqp_vector->tx_group.coal.adapt_enable &&
 214             !tqp_vector->rx_group.coal.adapt_enable)
 215                 /* According to the hardware, the range of rl_reg is
 216                  * 0-59 and the unit is 4.
 217                  */
 218                 rl_reg |=  HNS3_INT_RL_ENABLE_MASK;
 219
 220         writel(rl_reg, tqp_vector->mask_addr + HNS3_VECTOR_RL_OFFSET);
 221 }
 222
 223 void hns3_set_vector_coalesce_rx_gl(struct hns3_enet_tqp_vector *tqp_vector,
 224                                     u32 gl_value)
 225 {
 226         u32 new_val;
 227
 228         if (tqp_vector->rx_group.coal.unit_1us)
 229                 new_val = gl_value | HNS3_INT_GL_1US;
 230         else
 231                 new_val = hns3_gl_usec_to_reg(gl_value);
 232
 233         writel(new_val, tqp_vector->mask_addr + HNS3_VECTOR_GL0_OFFSET);
 234 }
 235
 236 void hns3_set_vector_coalesce_tx_gl(struct hns3_enet_tqp_vector *tqp_vector,
 237                                     u32 gl_value)
 238 {
 239         u32 new_val;
 240
 241         if (tqp_vector->tx_group.coal.unit_1us)
 242                 new_val = gl_value | HNS3_INT_GL_1US;
 243         else
 244                 new_val = hns3_gl_usec_to_reg(gl_value);
 245
 246         writel(new_val, tqp_vector->mask_addr + HNS3_VECTOR_GL1_OFFSET);
 247 }
 248
 249 void hns3_set_vector_coalesce_tx_ql(struct hns3_enet_tqp_vector *tqp_vector,
 250                                     u32 ql_value)
 251 {
 252         writel(ql_value, tqp_vector->mask_addr + HNS3_VECTOR_TX_QL_OFFSET);
 253 }
 254
 255 void hns3_set_vector_coalesce_rx_ql(struct hns3_enet_tqp_vector *tqp_vector,
 256                                     u32 ql_value)
 257 {
 258         writel(ql_value, tqp_vector->mask_addr + HNS3_VECTOR_RX_QL_OFFSET);
 259 }
 260
 261 static void hns3_vector_coalesce_init(struct hns3_enet_tqp_vector *tqp_vector,
 262                                       struct hns3_nic_priv *priv)
 263 {
 264         struct hnae3_ae_dev *ae_dev = pci_get_drvdata(priv->ae_handle->pdev);
 265         struct hns3_enet_coalesce *tx_coal = &tqp_vector->tx_group.coal;
 266         struct hns3_enet_coalesce *rx_coal = &tqp_vector->rx_group.coal;
 267
 268         /* initialize the configuration for interrupt coalescing.
 269          * 1. GL (Interrupt Gap Limiter)
 270          * 2. RL (Interrupt Rate Limiter)
 271          * 3. QL (Interrupt Quantity Limiter)
 272          *
 273          * Default: enable interrupt coalescing self-adaptive and GL
 274          */
 275         tx_coal->adapt_enable = 1;
 276         rx_coal->adapt_enable = 1;
 277
 278         tx_coal->int_gl = HNS3_INT_GL_50K;
 279         rx_coal->int_gl = HNS3_INT_GL_50K;
 280
 281         rx_coal->flow_level = HNS3_FLOW_LOW;
 282         tx_coal->flow_level = HNS3_FLOW_LOW;
 283
 284         /* device version above V3(include V3), GL can configure 1us
 285          * unit, so uses 1us unit.
 286          */
 287         if (ae_dev->dev_version >= HNAE3_DEVICE_VERSION_V3) {
 288                 tx_coal->unit_1us = 1;
 289                 rx_coal->unit_1us = 1;
 290         }
 291
 292         if (ae_dev->dev_specs.int_ql_max) {
 293                 tx_coal->ql_enable = 1;
 294                 rx_coal->ql_enable = 1;
 295                 tx_coal->int_ql_max = ae_dev->dev_specs.int_ql_max;
 296                 rx_coal->int_ql_max = ae_dev->dev_specs.int_ql_max;
 297                 tx_coal->int_ql = HNS3_INT_QL_DEFAULT_CFG;
 298                 rx_coal->int_ql = HNS3_INT_QL_DEFAULT_CFG;
 299         }
 300 }
 301
 302 static void
 303 hns3_vector_coalesce_init_hw(struct hns3_enet_tqp_vector *tqp_vector,
 304                              struct hns3_nic_priv *priv)
 305 {
 306         struct hns3_enet_coalesce *tx_coal = &tqp_vector->tx_group.coal;
 307         struct hns3_enet_coalesce *rx_coal = &tqp_vector->rx_group.coal;
 308         struct hnae3_handle *h = priv->ae_handle;
 309
 310         hns3_set_vector_coalesce_tx_gl(tqp_vector, tx_coal->int_gl);
 311         hns3_set_vector_coalesce_rx_gl(tqp_vector, rx_coal->int_gl);
 312         hns3_set_vector_coalesce_rl(tqp_vector, h->kinfo.int_rl_setting);
 313
 314         if (tx_coal->ql_enable)
 315                 hns3_set_vector_coalesce_tx_ql(tqp_vector, tx_coal->int_ql);
 316
 317         if (rx_coal->ql_enable)
 318                 hns3_set_vector_coalesce_rx_ql(tqp_vector, rx_coal->int_ql);
 319 }
 320
 321 static int hns3_nic_set_real_num_queue(struct net_device *netdev)
 322 {
 323         struct hnae3_handle *h = hns3_get_handle(netdev);
 324         struct hnae3_knic_private_info *kinfo = &h->kinfo;
 325         struct hnae3_tc_info *tc_info = &kinfo->tc_info;
 326         unsigned int queue_size = kinfo->num_tqps;
 327         int i, ret;
 328
 329         if (tc_info->num_tc <= 1 && !tc_info->mqprio_active) {
 330                 netdev_reset_tc(netdev);
 331         } else {
 332                 ret = netdev_set_num_tc(netdev, tc_info->num_tc);
 333                 if (ret) {
 334                         netdev_err(netdev,
 335                                    "netdev_set_num_tc fail, ret=%d!\n", ret);
 336                         return ret;
 337                 }
 338
 339                 for (i = 0; i < HNAE3_MAX_TC; i++) {
 340                         if (!test_bit(i, &tc_info->tc_en))
 341                                 continue;
 342
 343                         netdev_set_tc_queue(netdev, i, tc_info->tqp_count[i],
 344                                             tc_info->tqp_offset[i]);
 345                 }
 346         }
 347
 348         ret = netif_set_real_num_tx_queues(netdev, queue_size);
 349         if (ret) {
 350                 netdev_err(netdev,
 351                            "netif_set_real_num_tx_queues fail, ret=%d!\n", ret);
 352                 return ret;
 353         }
 354
 355         ret = netif_set_real_num_rx_queues(netdev, queue_size);
 356         if (ret) {
 357                 netdev_err(netdev,
 358                            "netif_set_real_num_rx_queues fail, ret=%d!\n", ret);
 359                 return ret;
 360         }
 361
 362         return 0;
 363 }
 364
 365 static u16 hns3_get_max_available_channels(struct hnae3_handle *h)
 366 {
 367         u16 alloc_tqps, max_rss_size, rss_size;
 368
 369         h->ae_algo->ops->get_tqps_and_rss_info(h, &alloc_tqps, &max_rss_size);
 370         rss_size = alloc_tqps / h->kinfo.tc_info.num_tc;
 371
 372         return min_t(u16, rss_size, max_rss_size);
 373 }
 374
 375 static void hns3_tqp_enable(struct hnae3_queue *tqp)
 376 {
 377         u32 rcb_reg;
 378
 379         rcb_reg = hns3_read_dev(tqp, HNS3_RING_EN_REG);
 380         rcb_reg |= BIT(HNS3_RING_EN_B);
 381         hns3_write_dev(tqp, HNS3_RING_EN_REG, rcb_reg);
 382 }
 383
 384 static void hns3_tqp_disable(struct hnae3_queue *tqp)
 385 {
 386         u32 rcb_reg;
 387
 388         rcb_reg = hns3_read_dev(tqp, HNS3_RING_EN_REG);
 389         rcb_reg &= ~BIT(HNS3_RING_EN_B);
 390         hns3_write_dev(tqp, HNS3_RING_EN_REG, rcb_reg);
 391 }
 392
 393 static void hns3_free_rx_cpu_rmap(struct net_device *netdev)
 394 {
 395 #ifdef CONFIG_RFS_ACCEL
 396         free_irq_cpu_rmap(netdev->rx_cpu_rmap);
 397         netdev->rx_cpu_rmap = NULL;
 398 #endif
 399 }
 400
 401 static int hns3_set_rx_cpu_rmap(struct net_device *netdev)
 402 {
 403 #ifdef CONFIG_RFS_ACCEL
 404         struct hns3_nic_priv *priv = netdev_priv(netdev);
 405         struct hns3_enet_tqp_vector *tqp_vector;
 406         int i, ret;
 407
 408         if (!netdev->rx_cpu_rmap) {
 409                 netdev->rx_cpu_rmap = alloc_irq_cpu_rmap(priv->vector_num);
 410                 if (!netdev->rx_cpu_rmap)
 411                         return -ENOMEM;
 412         }
 413
 414         for (i = 0; i < priv->vector_num; i++) {
 415                 tqp_vector = &priv->tqp_vector[i];
 416                 ret = irq_cpu_rmap_add(netdev->rx_cpu_rmap,
 417                                        tqp_vector->vector_irq);
 418                 if (ret) {
 419                         hns3_free_rx_cpu_rmap(netdev);
 420                         return ret;
 421                 }
 422         }
 423 #endif
 424         return 0;
 425 }
 426
 427 static int hns3_nic_net_up(struct net_device *netdev)
 428 {
 429         struct hns3_nic_priv *priv = netdev_priv(netdev);
 430         struct hnae3_handle *h = priv->ae_handle;
 431         int i, j;
 432         int ret;
 433
 434         ret = hns3_nic_reset_all_ring(h);
 435         if (ret)
 436                 return ret;
 437
 438         clear_bit(HNS3_NIC_STATE_DOWN, &priv->state);
 439
 440         /* enable the vectors */
 441         for (i = 0; i < priv->vector_num; i++)
 442                 hns3_vector_enable(&priv->tqp_vector[i]);
 443
 444         /* enable rcb */
 445         for (j = 0; j < h->kinfo.num_tqps; j++)
 446                 hns3_tqp_enable(h->kinfo.tqp[j]);
 447
 448         /* start the ae_dev */
 449         ret = h->ae_algo->ops->start ? h->ae_algo->ops->start(h) : 0;
 450         if (ret) {
 451                 set_bit(HNS3_NIC_STATE_DOWN, &priv->state);
 452                 while (j--)
 453                         hns3_tqp_disable(h->kinfo.tqp[j]);
 454
 455                 for (j = i - 1; j >= 0; j--)
 456                         hns3_vector_disable(&priv->tqp_vector[j]);
 457         }
 458
 459         return ret;
 460 }
 461
 462 static void hns3_config_xps(struct hns3_nic_priv *priv)
 463 {
 464         int i;
 465
 466         for (i = 0; i < priv->vector_num; i++) {
 467                 struct hns3_enet_tqp_vector *tqp_vector = &priv->tqp_vector[i];
 468                 struct hns3_enet_ring *ring = tqp_vector->tx_group.ring;
 469
 470                 while (ring) {
 471                         int ret;
 472
 473                         ret = netif_set_xps_queue(priv->netdev,
 474                                                   &tqp_vector->affinity_mask,
 475                                                   ring->tqp->tqp_index);
 476                         if (ret)
 477                                 netdev_warn(priv->netdev,
 478                                             "set xps queue failed: %d", ret);
 479
 480                         ring = ring->next;
 481                 }
 482         }
 483 }
 484
 485 static int hns3_nic_net_open(struct net_device *netdev)
 486 {
 487         struct hns3_nic_priv *priv = netdev_priv(netdev);
 488         struct hnae3_handle *h = hns3_get_handle(netdev);
 489         struct hnae3_knic_private_info *kinfo;
 490         int i, ret;
 491
 492         if (hns3_nic_resetting(netdev))
 493                 return -EBUSY;
 494
 495         netif_carrier_off(netdev);
 496
 497         ret = hns3_nic_set_real_num_queue(netdev);
 498         if (ret)
 499                 return ret;
 500
 501         ret = hns3_nic_net_up(netdev);
 502         if (ret) {
 503                 netdev_err(netdev, "net up fail, ret=%d!\n", ret);
 504                 return ret;
 505         }
 506
 507         kinfo = &h->kinfo;
 508         for (i = 0; i < HNAE3_MAX_USER_PRIO; i++)
 509                 netdev_set_prio_tc_map(netdev, i, kinfo->tc_info.prio_tc[i]);
 510
 511         if (h->ae_algo->ops->set_timer_task)
 512                 h->ae_algo->ops->set_timer_task(priv->ae_handle, true);
 513
 514         hns3_config_xps(priv);
 515
 516         netif_dbg(h, drv, netdev, "net open\n");
 517
 518         return 0;
 519 }
 520
 521 static void hns3_reset_tx_queue(struct hnae3_handle *h)
 522 {
 523         struct net_device *ndev = h->kinfo.netdev;
 524         struct hns3_nic_priv *priv = netdev_priv(ndev);
 525         struct netdev_queue *dev_queue;
 526         u32 i;
 527
 528         for (i = 0; i < h->kinfo.num_tqps; i++) {
 529                 dev_queue = netdev_get_tx_queue(ndev,
 530                                                 priv->ring[i].queue_index);
 531                 netdev_tx_reset_queue(dev_queue);
 532         }
 533 }
 534
 535 static void hns3_nic_net_down(struct net_device *netdev)
 536 {
 537         struct hns3_nic_priv *priv = netdev_priv(netdev);
 538         struct hnae3_handle *h = hns3_get_handle(netdev);
 539         const struct hnae3_ae_ops *ops;
 540         int i;
 541
 542         /* disable vectors */
 543         for (i = 0; i < priv->vector_num; i++)
 544                 hns3_vector_disable(&priv->tqp_vector[i]);
 545
 546         /* disable rcb */
 547         for (i = 0; i < h->kinfo.num_tqps; i++)
 548                 hns3_tqp_disable(h->kinfo.tqp[i]);
 549
 550         /* stop ae_dev */
 551         ops = priv->ae_handle->ae_algo->ops;
 552         if (ops->stop)
 553                 ops->stop(priv->ae_handle);
 554
 555         /* delay ring buffer clearing to hns3_reset_notify_uninit_enet
 556          * during reset process, because driver may not be able
 557          * to disable the ring through firmware when downing the netdev.
 558          */
 559         if (!hns3_nic_resetting(netdev))
 560                 hns3_clear_all_ring(priv->ae_handle, false);
 561
 562         hns3_reset_tx_queue(priv->ae_handle);
 563 }
 564
 565 static int hns3_nic_net_stop(struct net_device *netdev)
 566 {
 567         struct hns3_nic_priv *priv = netdev_priv(netdev);
 568         struct hnae3_handle *h = hns3_get_handle(netdev);
 569
 570         if (test_and_set_bit(HNS3_NIC_STATE_DOWN, &priv->state))
 571                 return 0;
 572
 573         netif_dbg(h, drv, netdev, "net stop\n");
 574
 575         if (h->ae_algo->ops->set_timer_task)
 576                 h->ae_algo->ops->set_timer_task(priv->ae_handle, false);
 577
 578         netif_carrier_off(netdev);
 579         netif_tx_disable(netdev);
 580
 581         hns3_nic_net_down(netdev);
 582
 583         return 0;
 584 }
 585
 586 static int hns3_nic_uc_sync(struct net_device *netdev,
 587                             const unsigned char *addr)
 588 {
 589         struct hnae3_handle *h = hns3_get_handle(netdev);
 590
 591         if (h->ae_algo->ops->add_uc_addr)
 592                 return h->ae_algo->ops->add_uc_addr(h, addr);
 593
 594         return 0;
 595 }
 596
 597 static int hns3_nic_uc_unsync(struct net_device *netdev,
 598                               const unsigned char *addr)
 599 {
 600         struct hnae3_handle *h = hns3_get_handle(netdev);
 601
 602         /* need ignore the request of removing device address, because
 603          * we store the device address and other addresses of uc list
 604          * in the function's mac filter list.
 605          */
 606         if (ether_addr_equal(addr, netdev->dev_addr))
 607                 return 0;
 608
 609         if (h->ae_algo->ops->rm_uc_addr)
 610                 return h->ae_algo->ops->rm_uc_addr(h, addr);
 611
 612         return 0;
 613 }
 614
 615 static int hns3_nic_mc_sync(struct net_device *netdev,
 616                             const unsigned char *addr)
 617 {
 618         struct hnae3_handle *h = hns3_get_handle(netdev);
 619
 620         if (h->ae_algo->ops->add_mc_addr)
 621                 return h->ae_algo->ops->add_mc_addr(h, addr);
 622
 623         return 0;
 624 }
 625
 626 static int hns3_nic_mc_unsync(struct net_device *netdev,
 627                               const unsigned char *addr)
 628 {
 629         struct hnae3_handle *h = hns3_get_handle(netdev);
 630
 631         if (h->ae_algo->ops->rm_mc_addr)
 632                 return h->ae_algo->ops->rm_mc_addr(h, addr);
 633
 634         return 0;
 635 }
 636
 637 static u8 hns3_get_netdev_flags(struct net_device *netdev)
 638 {
 639         u8 flags = 0;
 640
 641         if (netdev->flags & IFF_PROMISC) {
 642                 flags = HNAE3_USER_UPE | HNAE3_USER_MPE | HNAE3_BPE;
 643         } else {
 644                 flags |= HNAE3_VLAN_FLTR;
 645                 if (netdev->flags & IFF_ALLMULTI)
 646                         flags |= HNAE3_USER_MPE;
 647         }
 648
 649         return flags;
 650 }
 651
 652 static void hns3_nic_set_rx_mode(struct net_device *netdev)
 653 {
 654         struct hnae3_handle *h = hns3_get_handle(netdev);
 655         u8 new_flags;
 656
 657         new_flags = hns3_get_netdev_flags(netdev);
 658
 659         __dev_uc_sync(netdev, hns3_nic_uc_sync, hns3_nic_uc_unsync);
 660         __dev_mc_sync(netdev, hns3_nic_mc_sync, hns3_nic_mc_unsync);
 661
 662         /* User mode Promisc mode enable and vlan filtering is disabled to
 663          * let all packets in.
 664          */
 665         h->netdev_flags = new_flags;
 666         hns3_request_update_promisc_mode(h);
 667 }
 668
 669 void hns3_request_update_promisc_mode(struct hnae3_handle *handle)
 670 {
 671         const struct hnae3_ae_ops *ops = handle->ae_algo->ops;
 672
 673         if (ops->request_update_promisc_mode)
 674                 ops->request_update_promisc_mode(handle);
 675 }
 676
 677 void hns3_enable_vlan_filter(struct net_device *netdev, bool enable)
 678 {
 679         struct hns3_nic_priv *priv = netdev_priv(netdev);
 680         struct hnae3_handle *h = priv->ae_handle;
 681         struct hnae3_ae_dev *ae_dev = pci_get_drvdata(h->pdev);
 682         bool last_state;
 683
 684         if (ae_dev->dev_version >= HNAE3_DEVICE_VERSION_V2 &&
 685             h->ae_algo->ops->enable_vlan_filter) {
 686                 last_state = h->netdev_flags & HNAE3_VLAN_FLTR ? true : false;
 687                 if (enable != last_state) {
 688                         netdev_info(netdev,
 689                                     "%s vlan filter\n",
 690                                     enable ? "enable" : "disable");
 691                         h->ae_algo->ops->enable_vlan_filter(h, enable);
 692                 }
 693         }
 694 }
 695
 696 static int hns3_set_tso(struct sk_buff *skb, u32 *paylen_fdop_ol4cs,
 697                         u16 *mss, u32 *type_cs_vlan_tso, u32 *send_bytes)
 698 {
 699         u32 l4_offset, hdr_len;
 700         union l3_hdr_info l3;
 701         union l4_hdr_info l4;
 702         u32 l4_paylen;
 703         int ret;
 704
 705         if (!skb_is_gso(skb))
 706                 return 0;
 707
 708         ret = skb_cow_head(skb, 0);
 709         if (unlikely(ret < 0))
 710                 return ret;
 711
 712         l3.hdr = skb_network_header(skb);
 713         l4.hdr = skb_transport_header(skb);
 714
 715         /* Software should clear the IPv4's checksum field when tso is
 716          * needed.
 717          */
 718         if (l3.v4->version == 4)
 719                 l3.v4->check = 0;
 720
 721         /* tunnel packet */
 722         if (skb_shinfo(skb)->gso_type & (SKB_GSO_GRE |
 723                                          SKB_GSO_GRE_CSUM |
 724                                          SKB_GSO_UDP_TUNNEL |
 725                                          SKB_GSO_UDP_TUNNEL_CSUM)) {
 726                 /* reset l3&l4 pointers from outer to inner headers */
 727                 l3.hdr = skb_inner_network_header(skb);
 728                 l4.hdr = skb_inner_transport_header(skb);
 729
 730                 /* Software should clear the IPv4's checksum field when
 731                  * tso is needed.
 732                  */
 733                 if (l3.v4->version == 4)
 734                         l3.v4->check = 0;
 735         }
 736
 737         /* normal or tunnel packet */
 738         l4_offset = l4.hdr - skb->data;
 739
 740         /* remove payload length from inner pseudo checksum when tso */
 741         l4_paylen = skb->len - l4_offset;
 742
 743         if (skb_shinfo(skb)->gso_type & SKB_GSO_UDP_L4) {
 744                 hdr_len = sizeof(*l4.udp) + l4_offset;
 745                 csum_replace_by_diff(&l4.udp->check,
 746                                      (__force __wsum)htonl(l4_paylen));
 747         } else {
 748                 hdr_len = (l4.tcp->doff << 2) + l4_offset;
 749                 csum_replace_by_diff(&l4.tcp->check,
 750                                      (__force __wsum)htonl(l4_paylen));
 751         }
 752
 753         *send_bytes = (skb_shinfo(skb)->gso_segs - 1) * hdr_len + skb->len;
 754
 755         /* find the txbd field values */
 756         *paylen_fdop_ol4cs = skb->len - hdr_len;
 757         hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_TSO_B, 1);
 758
 759         /* offload outer UDP header checksum */
 760         if (skb_shinfo(skb)->gso_type & SKB_GSO_UDP_TUNNEL_CSUM)
 761                 hns3_set_field(*paylen_fdop_ol4cs, HNS3_TXD_OL4CS_B, 1);
 762
 763         /* get MSS for TSO */
 764         *mss = skb_shinfo(skb)->gso_size;
 765
 766         trace_hns3_tso(skb);
 767
 768         return 0;
 769 }
 770
 771 static int hns3_get_l4_protocol(struct sk_buff *skb, u8 *ol4_proto,
 772                                 u8 *il4_proto)
 773 {
 774         union l3_hdr_info l3;
 775         unsigned char *l4_hdr;
 776         unsigned char *exthdr;
 777         u8 l4_proto_tmp;
 778         __be16 frag_off;
 779
 780         /* find outer header point */
 781         l3.hdr = skb_network_header(skb);
 782         l4_hdr = skb_transport_header(skb);
 783
 784         if (skb->protocol == htons(ETH_P_IPV6)) {
 785                 exthdr = l3.hdr + sizeof(*l3.v6);
 786                 l4_proto_tmp = l3.v6->nexthdr;
 787                 if (l4_hdr != exthdr)
 788                         ipv6_skip_exthdr(skb, exthdr - skb->data,
 789                                          &l4_proto_tmp, &frag_off);
 790         } else if (skb->protocol == htons(ETH_P_IP)) {
 791                 l4_proto_tmp = l3.v4->protocol;
 792         } else {
 793                 return -EINVAL;
 794         }
 795
 796         *ol4_proto = l4_proto_tmp;
 797
 798         /* tunnel packet */
 799         if (!skb->encapsulation) {
 800                 *il4_proto = 0;
 801                 return 0;
 802         }
 803
 804         /* find inner header point */
 805         l3.hdr = skb_inner_network_header(skb);
 806         l4_hdr = skb_inner_transport_header(skb);
 807
 808         if (l3.v6->version == 6) {
 809                 exthdr = l3.hdr + sizeof(*l3.v6);
 810                 l4_proto_tmp = l3.v6->nexthdr;
 811                 if (l4_hdr != exthdr)
 812                         ipv6_skip_exthdr(skb, exthdr - skb->data,
 813                                          &l4_proto_tmp, &frag_off);
 814         } else if (l3.v4->version == 4) {
 815                 l4_proto_tmp = l3.v4->protocol;
 816         }
 817
 818         *il4_proto = l4_proto_tmp;
 819
 820         return 0;
 821 }
 822
 823 /* when skb->encapsulation is 0, skb->ip_summed is CHECKSUM_PARTIAL
 824  * and it is udp packet, which has a dest port as the IANA assigned.
 825  * the hardware is expected to do the checksum offload, but the
 826  * hardware will not do the checksum offload when udp dest port is
 827  * 4789, 4790 or 6081.
 828  */
 829 static bool hns3_tunnel_csum_bug(struct sk_buff *skb)
 830 {
 831         struct hns3_nic_priv *priv = netdev_priv(skb->dev);
 832         struct hnae3_ae_dev *ae_dev = pci_get_drvdata(priv->ae_handle->pdev);
 833         union l4_hdr_info l4;
 834
 835         /* device version above V3(include V3), the hardware can
 836          * do this checksum offload.
 837          */
 838         if (ae_dev->dev_version >= HNAE3_DEVICE_VERSION_V3)
 839                 return false;
 840
 841         l4.hdr = skb_transport_header(skb);
 842
 843         if (!(!skb->encapsulation &&
 844               (l4.udp->dest == htons(IANA_VXLAN_UDP_PORT) ||
 845               l4.udp->dest == htons(GENEVE_UDP_PORT) ||
 846               l4.udp->dest == htons(4790))))
 847                 return false;
 848
 849         skb_checksum_help(skb);
 850
 851         return true;
 852 }
 853
 854 static void hns3_set_outer_l2l3l4(struct sk_buff *skb, u8 ol4_proto,
 855                                   u32 *ol_type_vlan_len_msec)
 856 {
 857         u32 l2_len, l3_len, l4_len;
 858         unsigned char *il2_hdr;
 859         union l3_hdr_info l3;
 860         union l4_hdr_info l4;
 861
 862         l3.hdr = skb_network_header(skb);
 863         l4.hdr = skb_transport_header(skb);
 864
 865         /* compute OL2 header size, defined in 2 Bytes */
 866         l2_len = l3.hdr - skb->data;
 867         hns3_set_field(*ol_type_vlan_len_msec, HNS3_TXD_L2LEN_S, l2_len >> 1);
 868
 869         /* compute OL3 header size, defined in 4 Bytes */
 870         l3_len = l4.hdr - l3.hdr;
 871         hns3_set_field(*ol_type_vlan_len_msec, HNS3_TXD_L3LEN_S, l3_len >> 2);
 872
 873         il2_hdr = skb_inner_mac_header(skb);
 874         /* compute OL4 header size, defined in 4 Bytes */
 875         l4_len = il2_hdr - l4.hdr;
 876         hns3_set_field(*ol_type_vlan_len_msec, HNS3_TXD_L4LEN_S, l4_len >> 2);
 877
 878         /* define outer network header type */
 879         if (skb->protocol == htons(ETH_P_IP)) {
 880                 if (skb_is_gso(skb))
 881                         hns3_set_field(*ol_type_vlan_len_msec,
 882                                        HNS3_TXD_OL3T_S,
 883                                        HNS3_OL3T_IPV4_CSUM);
 884                 else
 885                         hns3_set_field(*ol_type_vlan_len_msec,
 886                                        HNS3_TXD_OL3T_S,
 887                                        HNS3_OL3T_IPV4_NO_CSUM);
 888         } else if (skb->protocol == htons(ETH_P_IPV6)) {
 889                 hns3_set_field(*ol_type_vlan_len_msec, HNS3_TXD_OL3T_S,
 890                                HNS3_OL3T_IPV6);
 891         }
 892
 893         if (ol4_proto == IPPROTO_UDP)
 894                 hns3_set_field(*ol_type_vlan_len_msec, HNS3_TXD_TUNTYPE_S,
 895                                HNS3_TUN_MAC_IN_UDP);
 896         else if (ol4_proto == IPPROTO_GRE)
 897                 hns3_set_field(*ol_type_vlan_len_msec, HNS3_TXD_TUNTYPE_S,
 898                                HNS3_TUN_NVGRE);
 899 }
 900
 901 static int hns3_set_l2l3l4(struct sk_buff *skb, u8 ol4_proto,
 902                            u8 il4_proto, u32 *type_cs_vlan_tso,
 903                            u32 *ol_type_vlan_len_msec)
 904 {
 905         unsigned char *l2_hdr = skb->data;
 906         u32 l4_proto = ol4_proto;
 907         union l4_hdr_info l4;
 908         union l3_hdr_info l3;
 909         u32 l2_len, l3_len;
 910
 911         l4.hdr = skb_transport_header(skb);
 912         l3.hdr = skb_network_header(skb);
 913
 914         /* handle encapsulation skb */
 915         if (skb->encapsulation) {
 916                 /* If this is a not UDP/GRE encapsulation skb */
 917                 if (!(ol4_proto == IPPROTO_UDP || ol4_proto == IPPROTO_GRE)) {
 918                         /* drop the skb tunnel packet if hardware don't support,
 919                          * because hardware can't calculate csum when TSO.
 920                          */
 921                         if (skb_is_gso(skb))
 922                                 return -EDOM;
 923
 924                         /* the stack computes the IP header already,
 925                          * driver calculate l4 checksum when not TSO.
 926                          */
 927                         skb_checksum_help(skb);
 928                         return 0;
 929                 }
 930
 931                 hns3_set_outer_l2l3l4(skb, ol4_proto, ol_type_vlan_len_msec);
 932
 933                 /* switch to inner header */
 934                 l2_hdr = skb_inner_mac_header(skb);
 935                 l3.hdr = skb_inner_network_header(skb);
 936                 l4.hdr = skb_inner_transport_header(skb);
 937                 l4_proto = il4_proto;
 938         }
 939
 940         if (l3.v4->version == 4) {
 941                 hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L3T_S,
 942                                HNS3_L3T_IPV4);
 943
 944                 /* the stack computes the IP header already, the only time we
 945                  * need the hardware to recompute it is in the case of TSO.
 946                  */
 947                 if (skb_is_gso(skb))
 948                         hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L3CS_B, 1);
 949         } else if (l3.v6->version == 6) {
 950                 hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L3T_S,
 951                                HNS3_L3T_IPV6);
 952         }
 953
 954         /* compute inner(/normal) L2 header size, defined in 2 Bytes */
 955         l2_len = l3.hdr - l2_hdr;
 956         hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L2LEN_S, l2_len >> 1);
 957
 958         /* compute inner(/normal) L3 header size, defined in 4 Bytes */
 959         l3_len = l4.hdr - l3.hdr;
 960         hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L3LEN_S, l3_len >> 2);
 961
 962         /* compute inner(/normal) L4 header size, defined in 4 Bytes */
 963         switch (l4_proto) {
 964         case IPPROTO_TCP:
 965                 hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L4CS_B, 1);
 966                 hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L4T_S,
 967                                HNS3_L4T_TCP);
 968                 hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L4LEN_S,
 969                                l4.tcp->doff);
 970                 break;
 971         case IPPROTO_UDP:
 972                 if (hns3_tunnel_csum_bug(skb))
 973                         break;
 974
 975                 hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L4CS_B, 1);
 976                 hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L4T_S,
 977                                HNS3_L4T_UDP);
 978                 hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L4LEN_S,
 979                                (sizeof(struct udphdr) >> 2));
 980                 break;
 981         case IPPROTO_SCTP:
 982                 hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L4CS_B, 1);
 983                 hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L4T_S,
 984                                HNS3_L4T_SCTP);
 985                 hns3_set_field(*type_cs_vlan_tso, HNS3_TXD_L4LEN_S,
 986                                (sizeof(struct sctphdr) >> 2));
 987                 break;
 988         default:
 989                 /* drop the skb tunnel packet if hardware don't support,
 990                  * because hardware can't calculate csum when TSO.
 991                  */
 992                 if (skb_is_gso(skb))
 993                         return -EDOM;
 994
 995                 /* the stack computes the IP header already,
 996                  * driver calculate l4 checksum when not TSO.
 997                  */
 998                 skb_checksum_help(skb);
 999                 return 0;
1000         }
1001
1002         return 0;
1003 }
1004
1005 static int hns3_handle_vtags(struct hns3_enet_ring *tx_ring,
1006                              struct sk_buff *skb)
1007 {
1008         struct hnae3_handle *handle = tx_ring->tqp->handle;
1009         struct hnae3_ae_dev *ae_dev;
1010         struct vlan_ethhdr *vhdr;
1011         int rc;
1012
1013         if (!(skb->protocol == htons(ETH_P_8021Q) ||
1014               skb_vlan_tag_present(skb)))
1015                 return 0;
1016
1017         /* For HW limitation on HNAE3_DEVICE_VERSION_V2, if port based insert
1018          * VLAN enabled, only one VLAN header is allowed in skb, otherwise it
1019          * will cause RAS error.
1020          */
1021         ae_dev = pci_get_drvdata(handle->pdev);
1022         if (unlikely(skb_vlan_tagged_multi(skb) &&
1023                      ae_dev->dev_version <= HNAE3_DEVICE_VERSION_V2 &&
1024                      handle->port_base_vlan_state ==
1025                      HNAE3_PORT_BASE_VLAN_ENABLE))
1026                 return -EINVAL;
1027
1028         if (skb->protocol == htons(ETH_P_8021Q) &&
1029             !(handle->kinfo.netdev->features & NETIF_F_HW_VLAN_CTAG_TX)) {
1030                 /* When HW VLAN acceleration is turned off, and the stack
1031                  * sets the protocol to 802.1q, the driver just need to
1032                  * set the protocol to the encapsulated ethertype.
1033                  */
1034                 skb->protocol = vlan_get_protocol(skb);
1035                 return 0;
1036         }
1037
1038         if (skb_vlan_tag_present(skb)) {
1039                 /* Based on hw strategy, use out_vtag in two layer tag case,
1040                  * and use inner_vtag in one tag case.
1041                  */
1042                 if (skb->protocol == htons(ETH_P_8021Q) &&
1043                     handle->port_base_vlan_state ==
1044                     HNAE3_PORT_BASE_VLAN_DISABLE)
1045                         rc = HNS3_OUTER_VLAN_TAG;
1046                 else
1047                         rc = HNS3_INNER_VLAN_TAG;
1048
1049                 skb->protocol = vlan_get_protocol(skb);
1050                 return rc;
1051         }
1052
1053         rc = skb_cow_head(skb, 0);
1054         if (unlikely(rc < 0))
1055                 return rc;
1056
1057         vhdr = (struct vlan_ethhdr *)skb->data;
1058         vhdr->h_vlan_TCI |= cpu_to_be16((skb->priority << VLAN_PRIO_SHIFT)
1059                                          & VLAN_PRIO_MASK);
1060
1061         skb->protocol = vlan_get_protocol(skb);
1062         return 0;
1063 }
1064
1065 /* check if the hardware is capable of checksum offloading */
1066 static bool hns3_check_hw_tx_csum(struct sk_buff *skb)
1067 {
1068         struct hns3_nic_priv *priv = netdev_priv(skb->dev);
1069
1070         /* Kindly note, due to backward compatibility of the TX descriptor,
1071          * HW checksum of the non-IP packets and GSO packets is handled at
1072          * different place in the following code
1073          */
1074         if (skb_csum_is_sctp(skb) || skb_is_gso(skb) ||
1075             !test_bit(HNS3_NIC_STATE_HW_TX_CSUM_ENABLE, &priv->state))
1076                 return false;
1077
1078         return true;
1079 }
1080
1081 static int hns3_fill_skb_desc(struct hns3_enet_ring *ring,
1082                               struct sk_buff *skb, struct hns3_desc *desc,
1083                               struct hns3_desc_cb *desc_cb)
1084 {
1085         u32 ol_type_vlan_len_msec = 0;
1086         u32 paylen_ol4cs = skb->len;
1087         u32 type_cs_vlan_tso = 0;
1088         u16 mss_hw_csum = 0;
1089         u16 inner_vtag = 0;
1090         u16 out_vtag = 0;
1091         int ret;
1092
1093         ret = hns3_handle_vtags(ring, skb);
1094         if (unlikely(ret < 0)) {
1095                 u64_stats_update_begin(&ring->syncp);
1096                 ring->stats.tx_vlan_err++;
1097                 u64_stats_update_end(&ring->syncp);
1098                 return ret;
1099         } else if (ret == HNS3_INNER_VLAN_TAG) {
1100                 inner_vtag = skb_vlan_tag_get(skb);
1101                 inner_vtag |= (skb->priority << VLAN_PRIO_SHIFT) &
1102                                 VLAN_PRIO_MASK;
1103                 hns3_set_field(type_cs_vlan_tso, HNS3_TXD_VLAN_B, 1);
1104         } else if (ret == HNS3_OUTER_VLAN_TAG) {
1105                 out_vtag = skb_vlan_tag_get(skb);
1106                 out_vtag |= (skb->priority << VLAN_PRIO_SHIFT) &
1107                                 VLAN_PRIO_MASK;
1108                 hns3_set_field(ol_type_vlan_len_msec, HNS3_TXD_OVLAN_B,
1109                                1);
1110         }
1111
1112         desc_cb->send_bytes = skb->len;
1113
1114         if (skb->ip_summed == CHECKSUM_PARTIAL) {
1115                 u8 ol4_proto, il4_proto;
1116
1117                 if (hns3_check_hw_tx_csum(skb)) {
1118                         /* set checksum start and offset, defined in 2 Bytes */
1119                         hns3_set_field(type_cs_vlan_tso, HNS3_TXD_CSUM_START_S,
1120                                        skb_checksum_start_offset(skb) >> 1);
1121                         hns3_set_field(ol_type_vlan_len_msec,
1122                                        HNS3_TXD_CSUM_OFFSET_S,
1123                                        skb->csum_offset >> 1);
1124                         mss_hw_csum |= BIT(HNS3_TXD_HW_CS_B);
1125                         goto out_hw_tx_csum;
1126                 }
1127
1128                 skb_reset_mac_len(skb);
1129
1130                 ret = hns3_get_l4_protocol(skb, &ol4_proto, &il4_proto);
1131                 if (unlikely(ret < 0)) {
1132                         u64_stats_update_begin(&ring->syncp);
1133                         ring->stats.tx_l4_proto_err++;
1134                         u64_stats_update_end(&ring->syncp);
1135                         return ret;
1136                 }
1137
1138                 ret = hns3_set_l2l3l4(skb, ol4_proto, il4_proto,
1139                                       &type_cs_vlan_tso,
1140                                       &ol_type_vlan_len_msec);
1141                 if (unlikely(ret < 0)) {
1142                         u64_stats_update_begin(&ring->syncp);
1143                         ring->stats.tx_l2l3l4_err++;
1144                         u64_stats_update_end(&ring->syncp);
1145                         return ret;
1146                 }
1147
1148                 ret = hns3_set_tso(skb, &paylen_ol4cs, &mss_hw_csum,
1149                                    &type_cs_vlan_tso, &desc_cb->send_bytes);
1150                 if (unlikely(ret < 0)) {
1151                         u64_stats_update_begin(&ring->syncp);
1152                         ring->stats.tx_tso_err++;
1153                         u64_stats_update_end(&ring->syncp);
1154                         return ret;
1155                 }
1156         }
1157
1158 out_hw_tx_csum:
1159         /* Set txbd */
1160         desc->tx.ol_type_vlan_len_msec =
1161                 cpu_to_le32(ol_type_vlan_len_msec);
1162         desc->tx.type_cs_vlan_tso_len = cpu_to_le32(type_cs_vlan_tso);
1163         desc->tx.paylen_ol4cs = cpu_to_le32(paylen_ol4cs);
1164         desc->tx.mss_hw_csum = cpu_to_le16(mss_hw_csum);
1165         desc->tx.vlan_tag = cpu_to_le16(inner_vtag);
1166         desc->tx.outer_vlan_tag = cpu_to_le16(out_vtag);
1167
1168         return 0;
1169 }
1170
1171 static int hns3_fill_desc(struct hns3_enet_ring *ring, void *priv,
1172                           unsigned int size, enum hns_desc_type type)
1173 {
1174 #define HNS3_LIKELY_BD_NUM      1
1175
1176         struct hns3_desc_cb *desc_cb = &ring->desc_cb[ring->next_to_use];
1177         struct hns3_desc *desc = &ring->desc[ring->next_to_use];
1178         struct device *dev = ring_to_dev(ring);
1179         skb_frag_t *frag;
1180         unsigned int frag_buf_num;
1181         int k, sizeoflast;
1182         dma_addr_t dma;
1183
1184         if (type == DESC_TYPE_FRAGLIST_SKB ||
1185             type == DESC_TYPE_SKB) {
1186                 struct sk_buff *skb = (struct sk_buff *)priv;
1187
1188                 dma = dma_map_single(dev, skb->data, size, DMA_TO_DEVICE);
1189         } else {
1190                 frag = (skb_frag_t *)priv;
1191                 dma = skb_frag_dma_map(dev, frag, 0, size, DMA_TO_DEVICE);
1192         }
1193
1194         if (unlikely(dma_mapping_error(dev, dma))) {
1195                 u64_stats_update_begin(&ring->syncp);
1196                 ring->stats.sw_err_cnt++;
1197                 u64_stats_update_end(&ring->syncp);
1198                 return -ENOMEM;
1199         }
1200
1201         desc_cb->priv = priv;
1202         desc_cb->length = size;
1203         desc_cb->dma = dma;
1204         desc_cb->type = type;
1205
1206         if (likely(size <= HNS3_MAX_BD_SIZE)) {
1207                 desc->addr = cpu_to_le64(dma);
1208                 desc->tx.send_size = cpu_to_le16(size);
1209                 desc->tx.bdtp_fe_sc_vld_ra_ri =
1210                         cpu_to_le16(BIT(HNS3_TXD_VLD_B));
1211
1212                 trace_hns3_tx_desc(ring, ring->next_to_use);
1213                 ring_ptr_move_fw(ring, next_to_use);
1214                 return HNS3_LIKELY_BD_NUM;
1215         }
1216
1217         frag_buf_num = hns3_tx_bd_count(size);
1218         sizeoflast = size % HNS3_MAX_BD_SIZE;
1219         sizeoflast = sizeoflast ? sizeoflast : HNS3_MAX_BD_SIZE;
1220
1221         /* When frag size is bigger than hardware limit, split this frag */
1222         for (k = 0; k < frag_buf_num; k++) {
1223                 /* now, fill the descriptor */
1224                 desc->addr = cpu_to_le64(dma + HNS3_MAX_BD_SIZE * k);
1225                 desc->tx.send_size = cpu_to_le16((k == frag_buf_num - 1) ?
1226                                      (u16)sizeoflast : (u16)HNS3_MAX_BD_SIZE);
1227                 desc->tx.bdtp_fe_sc_vld_ra_ri =
1228                                 cpu_to_le16(BIT(HNS3_TXD_VLD_B));
1229
1230                 trace_hns3_tx_desc(ring, ring->next_to_use);
1231                 /* move ring pointer to next */
1232                 ring_ptr_move_fw(ring, next_to_use);
1233
1234                 desc = &ring->desc[ring->next_to_use];
1235         }
1236
1237         return frag_buf_num;
1238 }
1239
1240 static unsigned int hns3_skb_bd_num(struct sk_buff *skb, unsigned int *bd_size,
1241                                     unsigned int bd_num)
1242 {
1243         unsigned int size;
1244         int i;
1245
1246         size = skb_headlen(skb);
1247         while (size > HNS3_MAX_BD_SIZE) {
1248                 bd_size[bd_num++] = HNS3_MAX_BD_SIZE;
1249                 size -= HNS3_MAX_BD_SIZE;
1250
1251                 if (bd_num > HNS3_MAX_TSO_BD_NUM)
1252                         return bd_num;
1253         }
1254
1255         if (size) {
1256                 bd_size[bd_num++] = size;
1257                 if (bd_num > HNS3_MAX_TSO_BD_NUM)
1258                         return bd_num;
1259         }
1260
1261         for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
1262                 skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
1263                 size = skb_frag_size(frag);
1264                 if (!size)
1265                         continue;
1266
1267                 while (size > HNS3_MAX_BD_SIZE) {
1268                         bd_size[bd_num++] = HNS3_MAX_BD_SIZE;
1269                         size -= HNS3_MAX_BD_SIZE;
1270
1271                         if (bd_num > HNS3_MAX_TSO_BD_NUM)
1272                                 return bd_num;
1273                 }
1274
1275                 bd_size[bd_num++] = size;
1276                 if (bd_num > HNS3_MAX_TSO_BD_NUM)
1277                         return bd_num;
1278         }
1279
1280         return bd_num;
1281 }
1282
1283 static unsigned int hns3_tx_bd_num(struct sk_buff *skb, unsigned int *bd_size,
1284                                    u8 max_non_tso_bd_num, unsigned int bd_num,
1285                                    unsigned int recursion_level)
1286 {
1287 #define HNS3_MAX_RECURSION_LEVEL        24
1288
1289         struct sk_buff *frag_skb;
1290
1291         /* If the total len is within the max bd limit */
1292         if (likely(skb->len <= HNS3_MAX_BD_SIZE && !recursion_level &&
1293                    !skb_has_frag_list(skb) &&
1294                    skb_shinfo(skb)->nr_frags < max_non_tso_bd_num))
1295                 return skb_shinfo(skb)->nr_frags + 1U;
1296
1297         if (unlikely(recursion_level >= HNS3_MAX_RECURSION_LEVEL))
1298                 return UINT_MAX;
1299
1300         bd_num = hns3_skb_bd_num(skb, bd_size, bd_num);
1301         if (!skb_has_frag_list(skb) || bd_num > HNS3_MAX_TSO_BD_NUM)
1302                 return bd_num;
1303
1304         skb_walk_frags(skb, frag_skb) {
1305                 bd_num = hns3_tx_bd_num(frag_skb, bd_size, max_non_tso_bd_num,
1306                                         bd_num, recursion_level + 1);
1307                 if (bd_num > HNS3_MAX_TSO_BD_NUM)
1308                         return bd_num;
1309         }
1310
1311         return bd_num;
1312 }
1313
1314 static unsigned int hns3_gso_hdr_len(struct sk_buff *skb)
1315 {
1316         if (!skb->encapsulation)
1317                 return skb_transport_offset(skb) + tcp_hdrlen(skb);
1318
1319         return skb_inner_transport_offset(skb) + inner_tcp_hdrlen(skb);
1320 }
1321
1322 /* HW need every continuous max_non_tso_bd_num buffer data to be larger
1323  * than MSS, we simplify it by ensuring skb_headlen + the first continuous
1324  * max_non_tso_bd_num - 1 frags to be larger than gso header len + mss,
1325  * and the remaining continuous max_non_tso_bd_num - 1 frags to be larger
1326  * than MSS except the last max_non_tso_bd_num - 1 frags.
1327  */
1328 static bool hns3_skb_need_linearized(struct sk_buff *skb, unsigned int *bd_size,
1329                                      unsigned int bd_num, u8 max_non_tso_bd_num)
1330 {
1331         unsigned int tot_len = 0;
1332         int i;
1333
1334         for (i = 0; i < max_non_tso_bd_num - 1U; i++)
1335                 tot_len += bd_size[i];
1336
1337         /* ensure the first max_non_tso_bd_num frags is greater than
1338          * mss + header
1339          */
1340         if (tot_len + bd_size[max_non_tso_bd_num - 1U] <
1341             skb_shinfo(skb)->gso_size + hns3_gso_hdr_len(skb))
1342                 return true;
1343
1344         /* ensure every continuous max_non_tso_bd_num - 1 buffer is greater
1345          * than mss except the last one.
1346          */
1347         for (i = 0; i < bd_num - max_non_tso_bd_num; i++) {
1348                 tot_len -= bd_size[i];
1349                 tot_len += bd_size[i + max_non_tso_bd_num - 1U];
1350
1351                 if (tot_len < skb_shinfo(skb)->gso_size)
1352                         return true;
1353         }
1354
1355         return false;
1356 }
1357
1358 void hns3_shinfo_pack(struct skb_shared_info *shinfo, __u32 *size)
1359 {
1360         int i;
1361
1362         for (i = 0; i < MAX_SKB_FRAGS; i++)
1363                 size[i] = skb_frag_size(&shinfo->frags[i]);
1364 }
1365
1366 static int hns3_skb_linearize(struct hns3_enet_ring *ring,
1367                               struct sk_buff *skb,
1368                               u8 max_non_tso_bd_num,
1369                               unsigned int bd_num)
1370 {
1371         /* 'bd_num == UINT_MAX' means the skb' fraglist has a
1372          * recursion level of over HNS3_MAX_RECURSION_LEVEL.
1373          */
1374         if (bd_num == UINT_MAX) {
1375                 u64_stats_update_begin(&ring->syncp);
1376                 ring->stats.over_max_recursion++;
1377                 u64_stats_update_end(&ring->syncp);
1378                 return -ENOMEM;
1379         }
1380
1381         /* The skb->len has exceeded the hw limitation, linearization
1382          * will not help.
1383          */
1384         if (skb->len > HNS3_MAX_TSO_SIZE ||
1385             (!skb_is_gso(skb) && skb->len >
1386              HNS3_MAX_NON_TSO_SIZE(max_non_tso_bd_num))) {
1387                 u64_stats_update_begin(&ring->syncp);
1388                 ring->stats.hw_limitation++;
1389                 u64_stats_update_end(&ring->syncp);
1390                 return -ENOMEM;
1391         }
1392
1393         if (__skb_linearize(skb)) {
1394                 u64_stats_update_begin(&ring->syncp);
1395                 ring->stats.sw_err_cnt++;
1396                 u64_stats_update_end(&ring->syncp);
1397                 return -ENOMEM;
1398         }
1399
1400         return 0;
1401 }
1402
1403 static int hns3_nic_maybe_stop_tx(struct hns3_enet_ring *ring,
1404                                   struct net_device *netdev,
1405                                   struct sk_buff *skb)
1406 {
1407         struct hns3_nic_priv *priv = netdev_priv(netdev);
1408         u8 max_non_tso_bd_num = priv->max_non_tso_bd_num;
1409         unsigned int bd_size[HNS3_MAX_TSO_BD_NUM + 1U];
1410         unsigned int bd_num;
1411
1412         bd_num = hns3_tx_bd_num(skb, bd_size, max_non_tso_bd_num, 0, 0);
1413         if (unlikely(bd_num > max_non_tso_bd_num)) {
1414                 if (bd_num <= HNS3_MAX_TSO_BD_NUM && skb_is_gso(skb) &&
1415                     !hns3_skb_need_linearized(skb, bd_size, bd_num,
1416                                               max_non_tso_bd_num)) {
1417                         trace_hns3_over_max_bd(skb);
1418                         goto out;
1419                 }
1420
1421                 if (hns3_skb_linearize(ring, skb, max_non_tso_bd_num,
1422                                        bd_num))
1423                         return -ENOMEM;
1424
1425                 bd_num = hns3_tx_bd_count(skb->len);
1426
1427                 u64_stats_update_begin(&ring->syncp);
1428                 ring->stats.tx_copy++;
1429                 u64_stats_update_end(&ring->syncp);
1430         }
1431
1432 out:
1433         if (likely(ring_space(ring) >= bd_num))
1434                 return bd_num;
1435
1436         netif_stop_subqueue(netdev, ring->queue_index);
1437         smp_mb(); /* Memory barrier before checking ring_space */
1438
1439         /* Start queue in case hns3_clean_tx_ring has just made room
1440          * available and has not seen the queue stopped state performed
1441          * by netif_stop_subqueue above.
1442          */
1443         if (ring_space(ring) >= bd_num && netif_carrier_ok(netdev) &&
1444             !test_bit(HNS3_NIC_STATE_DOWN, &priv->state)) {
1445                 netif_start_subqueue(netdev, ring->queue_index);
1446                 return bd_num;
1447         }
1448
1449         u64_stats_update_begin(&ring->syncp);
1450         ring->stats.tx_busy++;
1451         u64_stats_update_end(&ring->syncp);
1452
1453         return -EBUSY;
1454 }
1455
1456 static void hns3_clear_desc(struct hns3_enet_ring *ring, int next_to_use_orig)
1457 {
1458         struct device *dev = ring_to_dev(ring);
1459         unsigned int i;
1460
1461         for (i = 0; i < ring->desc_num; i++) {
1462                 struct hns3_desc *desc = &ring->desc[ring->next_to_use];
1463
1464                 memset(desc, 0, sizeof(*desc));
1465
1466                 /* check if this is where we started */
1467                 if (ring->next_to_use == next_to_use_orig)
1468                         break;
1469
1470                 /* rollback one */
1471                 ring_ptr_move_bw(ring, next_to_use);
1472
1473                 if (!ring->desc_cb[ring->next_to_use].dma)
1474                         continue;
1475
1476                 /* unmap the descriptor dma address */
1477                 if (ring->desc_cb[ring->next_to_use].type == DESC_TYPE_SKB ||
1478                     ring->desc_cb[ring->next_to_use].type ==
1479                     DESC_TYPE_FRAGLIST_SKB)
1480                         dma_unmap_single(dev,
1481                                          ring->desc_cb[ring->next_to_use].dma,
1482                                         ring->desc_cb[ring->next_to_use].length,
1483                                         DMA_TO_DEVICE);
1484                 else if (ring->desc_cb[ring->next_to_use].length)
1485                         dma_unmap_page(dev,
1486                                        ring->desc_cb[ring->next_to_use].dma,
1487                                        ring->desc_cb[ring->next_to_use].length,
1488                                        DMA_TO_DEVICE);
1489
1490                 ring->desc_cb[ring->next_to_use].length = 0;
1491                 ring->desc_cb[ring->next_to_use].dma = 0;
1492                 ring->desc_cb[ring->next_to_use].type = DESC_TYPE_UNKNOWN;
1493         }
1494 }
1495
1496 static int hns3_fill_skb_to_desc(struct hns3_enet_ring *ring,
1497                                  struct sk_buff *skb, enum hns_desc_type type)
1498 {
1499         unsigned int size = skb_headlen(skb);
1500         struct sk_buff *frag_skb;
1501         int i, ret, bd_num = 0;
1502
1503         if (size) {
1504                 ret = hns3_fill_desc(ring, skb, size, type);
1505                 if (unlikely(ret < 0))
1506                         return ret;
1507
1508                 bd_num += ret;
1509         }
1510
1511         for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
1512                 skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
1513
1514                 size = skb_frag_size(frag);
1515                 if (!size)
1516                         continue;
1517
1518                 ret = hns3_fill_desc(ring, frag, size, DESC_TYPE_PAGE);
1519                 if (unlikely(ret < 0))
1520                         return ret;
1521
1522                 bd_num += ret;
1523         }
1524
1525         skb_walk_frags(skb, frag_skb) {
1526                 ret = hns3_fill_skb_to_desc(ring, frag_skb,
1527                                             DESC_TYPE_FRAGLIST_SKB);
1528                 if (unlikely(ret < 0))
1529                         return ret;
1530
1531                 bd_num += ret;
1532         }
1533
1534         return bd_num;
1535 }
1536
1537 static void hns3_tx_doorbell(struct hns3_enet_ring *ring, int num,
1538                              bool doorbell)
1539 {
1540         ring->pending_buf += num;
1541
1542         if (!doorbell) {
1543                 u64_stats_update_begin(&ring->syncp);
1544                 ring->stats.tx_more++;
1545                 u64_stats_update_end(&ring->syncp);
1546                 return;
1547         }
1548
1549         if (!ring->pending_buf)
1550                 return;
1551
1552         writel(ring->pending_buf,
1553                ring->tqp->io_base + HNS3_RING_TX_RING_TAIL_REG);
1554         ring->pending_buf = 0;
1555         WRITE_ONCE(ring->last_to_use, ring->next_to_use);
1556 }
1557
1558 netdev_tx_t hns3_nic_net_xmit(struct sk_buff *skb, struct net_device *netdev)
1559 {
1560         struct hns3_nic_priv *priv = netdev_priv(netdev);
1561         struct hns3_enet_ring *ring = &priv->ring[skb->queue_mapping];
1562         struct hns3_desc_cb *desc_cb = &ring->desc_cb[ring->next_to_use];
1563         struct netdev_queue *dev_queue;
1564         int pre_ntu, next_to_use_head;
1565         bool doorbell;
1566         int ret;
1567
1568         /* Hardware can only handle short frames above 32 bytes */
1569         if (skb_put_padto(skb, HNS3_MIN_TX_LEN)) {
1570                 hns3_tx_doorbell(ring, 0, !netdev_xmit_more());
1571
1572                 u64_stats_update_begin(&ring->syncp);
1573                 ring->stats.sw_err_cnt++;
1574                 u64_stats_update_end(&ring->syncp);
1575
1576                 return NETDEV_TX_OK;
1577         }
1578
1579         /* Prefetch the data used later */
1580         prefetch(skb->data);
1581
1582         ret = hns3_nic_maybe_stop_tx(ring, netdev, skb);
1583         if (unlikely(ret <= 0)) {
1584                 if (ret == -EBUSY) {
1585                         hns3_tx_doorbell(ring, 0, true);
1586                         return NETDEV_TX_BUSY;
1587                 }
1588
1589                 hns3_rl_err(netdev, "xmit error: %d!\n", ret);
1590                 goto out_err_tx_ok;
1591         }
1592
1593         next_to_use_head = ring->next_to_use;
1594
1595         ret = hns3_fill_skb_desc(ring, skb, &ring->desc[ring->next_to_use],
1596                                  desc_cb);
1597         if (unlikely(ret < 0))
1598                 goto fill_err;
1599
1600         /* 'ret < 0' means filling error, 'ret == 0' means skb->len is
1601          * zero, which is unlikely, and 'ret > 0' means how many tx desc
1602          * need to be notified to the hw.
1603          */
1604         ret = hns3_fill_skb_to_desc(ring, skb, DESC_TYPE_SKB);
1605         if (unlikely(ret <= 0))
1606                 goto fill_err;
1607
1608         pre_ntu = ring->next_to_use ? (ring->next_to_use - 1) :
1609                                         (ring->desc_num - 1);
1610         ring->desc[pre_ntu].tx.bdtp_fe_sc_vld_ra_ri |=
1611                                 cpu_to_le16(BIT(HNS3_TXD_FE_B));
1612         trace_hns3_tx_desc(ring, pre_ntu);
1613
1614         /* Complete translate all packets */
1615         dev_queue = netdev_get_tx_queue(netdev, ring->queue_index);
1616         doorbell = __netdev_tx_sent_queue(dev_queue, desc_cb->send_bytes,
1617                                           netdev_xmit_more());
1618         hns3_tx_doorbell(ring, ret, doorbell);
1619
1620         return NETDEV_TX_OK;
1621
1622 fill_err:
1623         hns3_clear_desc(ring, next_to_use_head);
1624
1625 out_err_tx_ok:
1626         dev_kfree_skb_any(skb);
1627         hns3_tx_doorbell(ring, 0, !netdev_xmit_more());
1628         return NETDEV_TX_OK;
1629 }
1630
1631 static int hns3_nic_net_set_mac_address(struct net_device *netdev, void *p)
1632 {
1633         struct hnae3_handle *h = hns3_get_handle(netdev);
1634         struct sockaddr *mac_addr = p;
1635         int ret;
1636
1637         if (!mac_addr || !is_valid_ether_addr((const u8 *)mac_addr->sa_data))
1638                 return -EADDRNOTAVAIL;
1639
1640         if (ether_addr_equal(netdev->dev_addr, mac_addr->sa_data)) {
1641                 netdev_info(netdev, "already using mac address %pM\n",
1642                             mac_addr->sa_data);
1643                 return 0;
1644         }
1645
1646         /* For VF device, if there is a perm_addr, then the user will not
1647          * be allowed to change the address.
1648          */
1649         if (!hns3_is_phys_func(h->pdev) &&
1650             !is_zero_ether_addr(netdev->perm_addr)) {
1651                 netdev_err(netdev, "has permanent MAC %pM, user MAC %pM not allow\n",
1652                            netdev->perm_addr, mac_addr->sa_data);
1653                 return -EPERM;
1654         }
1655
1656         ret = h->ae_algo->ops->set_mac_addr(h, mac_addr->sa_data, false);
1657         if (ret) {
1658                 netdev_err(netdev, "set_mac_address fail, ret=%d!\n", ret);
1659                 return ret;
1660         }
1661
1662         ether_addr_copy(netdev->dev_addr, mac_addr->sa_data);
1663
1664         return 0;
1665 }
1666
1667 static int hns3_nic_do_ioctl(struct net_device *netdev,
1668                              struct ifreq *ifr, int cmd)
1669 {
1670         struct hnae3_handle *h = hns3_get_handle(netdev);
1671
1672         if (!netif_running(netdev))
1673                 return -EINVAL;
1674
1675         if (!h->ae_algo->ops->do_ioctl)
1676                 return -EOPNOTSUPP;
1677
1678         return h->ae_algo->ops->do_ioctl(h, ifr, cmd);
1679 }
1680
1681 static int hns3_nic_set_features(struct net_device *netdev,
1682                                  netdev_features_t features)
1683 {
1684         netdev_features_t changed = netdev->features ^ features;
1685         struct hns3_nic_priv *priv = netdev_priv(netdev);
1686         struct hnae3_handle *h = priv->ae_handle;
1687         bool enable;
1688         int ret;
1689
1690         if (changed & (NETIF_F_GRO_HW) && h->ae_algo->ops->set_gro_en) {
1691                 enable = !!(features & NETIF_F_GRO_HW);
1692                 ret = h->ae_algo->ops->set_gro_en(h, enable);
1693                 if (ret)
1694                         return ret;
1695         }
1696
1697         if ((changed & NETIF_F_HW_VLAN_CTAG_RX) &&
1698             h->ae_algo->ops->enable_hw_strip_rxvtag) {
1699                 enable = !!(features & NETIF_F_HW_VLAN_CTAG_RX);
1700                 ret = h->ae_algo->ops->enable_hw_strip_rxvtag(h, enable);
1701                 if (ret)
1702                         return ret;
1703         }
1704
1705         if ((changed & NETIF_F_NTUPLE) && h->ae_algo->ops->enable_fd) {
1706                 enable = !!(features & NETIF_F_NTUPLE);
1707                 h->ae_algo->ops->enable_fd(h, enable);
1708         }
1709
1710         if ((netdev->features & NETIF_F_HW_TC) > (features & NETIF_F_HW_TC) &&
1711             h->ae_algo->ops->cls_flower_active(h)) {
1712                 netdev_err(netdev,
1713                            "there are offloaded TC filters active, cannot disable HW TC offload");
1714                 return -EINVAL;
1715         }
1716
1717         netdev->features = features;
1718         return 0;
1719 }
1720
1721 static netdev_features_t hns3_features_check(struct sk_buff *skb,
1722                                              struct net_device *dev,
1723                                              netdev_features_t features)
1724 {
1725 #define HNS3_MAX_HDR_LEN        480U
1726 #define HNS3_MAX_L4_HDR_LEN     60U
1727
1728         size_t len;
1729
1730         if (skb->ip_summed != CHECKSUM_PARTIAL)
1731                 return features;
1732
1733         if (skb->encapsulation)
1734                 len = skb_inner_transport_header(skb) - skb->data;
1735         else
1736                 len = skb_transport_header(skb) - skb->data;
1737
1738         /* Assume L4 is 60 byte as TCP is the only protocol with a
1739          * a flexible value, and it's max len is 60 bytes.
1740          */
1741         len += HNS3_MAX_L4_HDR_LEN;
1742
1743         /* Hardware only supports checksum on the skb with a max header
1744          * len of 480 bytes.
1745          */
1746         if (len > HNS3_MAX_HDR_LEN)
1747                 features &= ~(NETIF_F_CSUM_MASK | NETIF_F_GSO_MASK);
1748
1749         return features;
1750 }
1751
1752 static void hns3_nic_get_stats64(struct net_device *netdev,
1753                                  struct rtnl_link_stats64 *stats)
1754 {
1755         struct hns3_nic_priv *priv = netdev_priv(netdev);
1756         int queue_num = priv->ae_handle->kinfo.num_tqps;
1757         struct hnae3_handle *handle = priv->ae_handle;
1758         struct hns3_enet_ring *ring;
1759         u64 rx_length_errors = 0;
1760         u64 rx_crc_errors = 0;
1761         u64 rx_multicast = 0;
1762         unsigned int start;
1763         u64 tx_errors = 0;
1764         u64 rx_errors = 0;
1765         unsigned int idx;
1766         u64 tx_bytes = 0;
1767         u64 rx_bytes = 0;
1768         u64 tx_pkts = 0;
1769         u64 rx_pkts = 0;
1770         u64 tx_drop = 0;
1771         u64 rx_drop = 0;
1772
1773         if (test_bit(HNS3_NIC_STATE_DOWN, &priv->state))
1774                 return;
1775
1776         handle->ae_algo->ops->update_stats(handle, &netdev->stats);
1777
1778         for (idx = 0; idx < queue_num; idx++) {
1779                 /* fetch the tx stats */
1780                 ring = &priv->ring[idx];
1781                 do {
1782                         start = u64_stats_fetch_begin_irq(&ring->syncp);
1783                         tx_bytes += ring->stats.tx_bytes;
1784                         tx_pkts += ring->stats.tx_pkts;
1785                         tx_drop += ring->stats.sw_err_cnt;
1786                         tx_drop += ring->stats.tx_vlan_err;
1787                         tx_drop += ring->stats.tx_l4_proto_err;
1788                         tx_drop += ring->stats.tx_l2l3l4_err;
1789                         tx_drop += ring->stats.tx_tso_err;
1790                         tx_drop += ring->stats.over_max_recursion;
1791                         tx_drop += ring->stats.hw_limitation;
1792                         tx_errors += ring->stats.sw_err_cnt;
1793                         tx_errors += ring->stats.tx_vlan_err;
1794                         tx_errors += ring->stats.tx_l4_proto_err;
1795                         tx_errors += ring->stats.tx_l2l3l4_err;
1796                         tx_errors += ring->stats.tx_tso_err;
1797                         tx_errors += ring->stats.over_max_recursion;
1798                         tx_errors += ring->stats.hw_limitation;
1799                 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
1800
1801                 /* fetch the rx stats */
1802                 ring = &priv->ring[idx + queue_num];
1803                 do {
1804                         start = u64_stats_fetch_begin_irq(&ring->syncp);
1805                         rx_bytes += ring->stats.rx_bytes;
1806                         rx_pkts += ring->stats.rx_pkts;
1807                         rx_drop += ring->stats.l2_err;
1808                         rx_errors += ring->stats.l2_err;
1809                         rx_errors += ring->stats.l3l4_csum_err;
1810                         rx_crc_errors += ring->stats.l2_err;
1811                         rx_multicast += ring->stats.rx_multicast;
1812                         rx_length_errors += ring->stats.err_pkt_len;
1813                 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
1814         }
1815
1816         stats->tx_bytes = tx_bytes;
1817         stats->tx_packets = tx_pkts;
1818         stats->rx_bytes = rx_bytes;
1819         stats->rx_packets = rx_pkts;
1820
1821         stats->rx_errors = rx_errors;
1822         stats->multicast = rx_multicast;
1823         stats->rx_length_errors = rx_length_errors;
1824         stats->rx_crc_errors = rx_crc_errors;
1825         stats->rx_missed_errors = netdev->stats.rx_missed_errors;
1826
1827         stats->tx_errors = tx_errors;
1828         stats->rx_dropped = rx_drop;
1829         stats->tx_dropped = tx_drop;
1830         stats->collisions = netdev->stats.collisions;
1831         stats->rx_over_errors = netdev->stats.rx_over_errors;
1832         stats->rx_frame_errors = netdev->stats.rx_frame_errors;
1833         stats->rx_fifo_errors = netdev->stats.rx_fifo_errors;
1834         stats->tx_aborted_errors = netdev->stats.tx_aborted_errors;
1835         stats->tx_carrier_errors = netdev->stats.tx_carrier_errors;
1836         stats->tx_fifo_errors = netdev->stats.tx_fifo_errors;
1837         stats->tx_heartbeat_errors = netdev->stats.tx_heartbeat_errors;
1838         stats->tx_window_errors = netdev->stats.tx_window_errors;
1839         stats->rx_compressed = netdev->stats.rx_compressed;
1840         stats->tx_compressed = netdev->stats.tx_compressed;
1841 }
1842
1843 static int hns3_setup_tc(struct net_device *netdev, void *type_data)
1844 {
1845         struct tc_mqprio_qopt_offload *mqprio_qopt = type_data;
1846         struct hnae3_knic_private_info *kinfo;
1847         u8 tc = mqprio_qopt->qopt.num_tc;
1848         u16 mode = mqprio_qopt->mode;
1849         u8 hw = mqprio_qopt->qopt.hw;
1850         struct hnae3_handle *h;
1851
1852         if (!((hw == TC_MQPRIO_HW_OFFLOAD_TCS &&
1853                mode == TC_MQPRIO_MODE_CHANNEL) || (!hw && tc == 0)))
1854                 return -EOPNOTSUPP;
1855
1856         if (tc > HNAE3_MAX_TC)
1857                 return -EINVAL;
1858
1859         if (!netdev)
1860                 return -EINVAL;
1861
1862         h = hns3_get_handle(netdev);
1863         kinfo = &h->kinfo;
1864
1865         netif_dbg(h, drv, netdev, "setup tc: num_tc=%u\n", tc);
1866
1867         return (kinfo->dcb_ops && kinfo->dcb_ops->setup_tc) ?
1868                 kinfo->dcb_ops->setup_tc(h, mqprio_qopt) : -EOPNOTSUPP;
1869 }
1870
1871 static int hns3_setup_tc_cls_flower(struct hns3_nic_priv *priv,
1872                                     struct flow_cls_offload *flow)
1873 {
1874         int tc = tc_classid_to_hwtc(priv->netdev, flow->classid);
1875         struct hnae3_handle *h = hns3_get_handle(priv->netdev);
1876
1877         switch (flow->command) {
1878         case FLOW_CLS_REPLACE:
1879                 if (h->ae_algo->ops->add_cls_flower)
1880                         return h->ae_algo->ops->add_cls_flower(h, flow, tc);
1881                 break;
1882         case FLOW_CLS_DESTROY:
1883                 if (h->ae_algo->ops->del_cls_flower)
1884                         return h->ae_algo->ops->del_cls_flower(h, flow);
1885                 break;
1886         default:
1887                 break;
1888         }
1889
1890         return -EOPNOTSUPP;
1891 }
1892
1893 static int hns3_setup_tc_block_cb(enum tc_setup_type type, void *type_data,
1894                                   void *cb_priv)
1895 {
1896         struct hns3_nic_priv *priv = cb_priv;
1897
1898         if (!tc_cls_can_offload_and_chain0(priv->netdev, type_data))
1899                 return -EOPNOTSUPP;
1900
1901         switch (type) {
1902         case TC_SETUP_CLSFLOWER:
1903                 return hns3_setup_tc_cls_flower(priv, type_data);
1904         default:
1905                 return -EOPNOTSUPP;
1906         }
1907 }
1908
1909 static LIST_HEAD(hns3_block_cb_list);
1910
1911 static int hns3_nic_setup_tc(struct net_device *dev, enum tc_setup_type type,
1912                              void *type_data)
1913 {
1914         struct hns3_nic_priv *priv = netdev_priv(dev);
1915         int ret;
1916
1917         switch (type) {
1918         case TC_SETUP_QDISC_MQPRIO:
1919                 ret = hns3_setup_tc(dev, type_data);
1920                 break;
1921         case TC_SETUP_BLOCK:
1922                 ret = flow_block_cb_setup_simple(type_data,
1923                                                  &hns3_block_cb_list,
1924                                                  hns3_setup_tc_block_cb,
1925                                                  priv, priv, true);
1926                 break;
1927         default:
1928                 return -EOPNOTSUPP;
1929         }
1930
1931         return ret;
1932 }
1933
1934 static int hns3_vlan_rx_add_vid(struct net_device *netdev,
1935                                 __be16 proto, u16 vid)
1936 {
1937         struct hnae3_handle *h = hns3_get_handle(netdev);
1938         int ret = -EIO;
1939
1940         if (h->ae_algo->ops->set_vlan_filter)
1941                 ret = h->ae_algo->ops->set_vlan_filter(h, proto, vid, false);
1942
1943         return ret;
1944 }
1945
1946 static int hns3_vlan_rx_kill_vid(struct net_device *netdev,
1947                                  __be16 proto, u16 vid)
1948 {
1949         struct hnae3_handle *h = hns3_get_handle(netdev);
1950         int ret = -EIO;
1951
1952         if (h->ae_algo->ops->set_vlan_filter)
1953                 ret = h->ae_algo->ops->set_vlan_filter(h, proto, vid, true);
1954
1955         return ret;
1956 }
1957
1958 static int hns3_ndo_set_vf_vlan(struct net_device *netdev, int vf, u16 vlan,
1959                                 u8 qos, __be16 vlan_proto)
1960 {
1961         struct hnae3_handle *h = hns3_get_handle(netdev);
1962         int ret = -EIO;
1963
1964         netif_dbg(h, drv, netdev,
1965                   "set vf vlan: vf=%d, vlan=%u, qos=%u, vlan_proto=0x%x\n",
1966                   vf, vlan, qos, ntohs(vlan_proto));
1967
1968         if (h->ae_algo->ops->set_vf_vlan_filter)
1969                 ret = h->ae_algo->ops->set_vf_vlan_filter(h, vf, vlan,
1970                                                           qos, vlan_proto);
1971
1972         return ret;
1973 }
1974
1975 static int hns3_set_vf_spoofchk(struct net_device *netdev, int vf, bool enable)
1976 {
1977         struct hnae3_handle *handle = hns3_get_handle(netdev);
1978
1979         if (hns3_nic_resetting(netdev))
1980                 return -EBUSY;
1981
1982         if (!handle->ae_algo->ops->set_vf_spoofchk)
1983                 return -EOPNOTSUPP;
1984
1985         return handle->ae_algo->ops->set_vf_spoofchk(handle, vf, enable);
1986 }
1987
1988 static int hns3_set_vf_trust(struct net_device *netdev, int vf, bool enable)
1989 {
1990         struct hnae3_handle *handle = hns3_get_handle(netdev);
1991
1992         if (!handle->ae_algo->ops->set_vf_trust)
1993                 return -EOPNOTSUPP;
1994
1995         return handle->ae_algo->ops->set_vf_trust(handle, vf, enable);
1996 }
1997
1998 static int hns3_nic_change_mtu(struct net_device *netdev, int new_mtu)
1999 {
2000         struct hnae3_handle *h = hns3_get_handle(netdev);
2001         int ret;
2002
2003         if (hns3_nic_resetting(netdev))
2004                 return -EBUSY;
2005
2006         if (!h->ae_algo->ops->set_mtu)
2007                 return -EOPNOTSUPP;
2008
2009         netif_dbg(h, drv, netdev,
2010                   "change mtu from %u to %d\n", netdev->mtu, new_mtu);
2011
2012         ret = h->ae_algo->ops->set_mtu(h, new_mtu);
2013         if (ret)
2014                 netdev_err(netdev, "failed to change MTU in hardware %d\n",
2015                            ret);
2016         else
2017                 netdev->mtu = new_mtu;
2018
2019         return ret;
2020 }
2021
2022 static bool hns3_get_tx_timeo_queue_info(struct net_device *ndev)
2023 {
2024         struct hns3_nic_priv *priv = netdev_priv(ndev);
2025         struct hnae3_handle *h = hns3_get_handle(ndev);
2026         struct hns3_enet_ring *tx_ring;
2027         struct napi_struct *napi;
2028         int timeout_queue = 0;
2029         int hw_head, hw_tail;
2030         int fbd_num, fbd_oft;
2031         int ebd_num, ebd_oft;
2032         int bd_num, bd_err;
2033         int ring_en, tc;
2034         int i;
2035
2036         /* Find the stopped queue the same way the stack does */
2037         for (i = 0; i < ndev->num_tx_queues; i++) {
2038                 struct netdev_queue *q;
2039                 unsigned long trans_start;
2040
2041                 q = netdev_get_tx_queue(ndev, i);
2042                 trans_start = q->trans_start;
2043                 if (netif_xmit_stopped(q) &&
2044                     time_after(jiffies,
2045                                (trans_start + ndev->watchdog_timeo))) {
2046                         timeout_queue = i;
2047                         netdev_info(ndev, "queue state: 0x%lx, delta msecs: %u\n",
2048                                     q->state,
2049                                     jiffies_to_msecs(jiffies - trans_start));
2050                         break;
2051                 }
2052         }
2053
2054         if (i == ndev->num_tx_queues) {
2055                 netdev_info(ndev,
2056                             "no netdev TX timeout queue found, timeout count: %llu\n",
2057                             priv->tx_timeout_count);
2058                 return false;
2059         }
2060
2061         priv->tx_timeout_count++;
2062
2063         tx_ring = &priv->ring[timeout_queue];
2064         napi = &tx_ring->tqp_vector->napi;
2065
2066         netdev_info(ndev,
2067                     "tx_timeout count: %llu, queue id: %d, SW_NTU: 0x%x, SW_NTC: 0x%x, napi state: %lu\n",
2068                     priv->tx_timeout_count, timeout_queue, tx_ring->next_to_use,
2069                     tx_ring->next_to_clean, napi->state);
2070
2071         netdev_info(ndev,
2072                     "tx_pkts: %llu, tx_bytes: %llu, sw_err_cnt: %llu, tx_pending: %d\n",
2073                     tx_ring->stats.tx_pkts, tx_ring->stats.tx_bytes,
2074                     tx_ring->stats.sw_err_cnt, tx_ring->pending_buf);
2075
2076         netdev_info(ndev,
2077                     "seg_pkt_cnt: %llu, tx_more: %llu, restart_queue: %llu, tx_busy: %llu\n",
2078                     tx_ring->stats.seg_pkt_cnt, tx_ring->stats.tx_more,
2079                     tx_ring->stats.restart_queue, tx_ring->stats.tx_busy);
2080
2081         /* When mac received many pause frames continuous, it's unable to send
2082          * packets, which may cause tx timeout
2083          */
2084         if (h->ae_algo->ops->get_mac_stats) {
2085                 struct hns3_mac_stats mac_stats;
2086
2087                 h->ae_algo->ops->get_mac_stats(h, &mac_stats);
2088                 netdev_info(ndev, "tx_pause_cnt: %llu, rx_pause_cnt: %llu\n",
2089                             mac_stats.tx_pause_cnt, mac_stats.rx_pause_cnt);
2090         }
2091
2092         hw_head = readl_relaxed(tx_ring->tqp->io_base +
2093                                 HNS3_RING_TX_RING_HEAD_REG);
2094         hw_tail = readl_relaxed(tx_ring->tqp->io_base +
2095                                 HNS3_RING_TX_RING_TAIL_REG);
2096         fbd_num = readl_relaxed(tx_ring->tqp->io_base +
2097                                 HNS3_RING_TX_RING_FBDNUM_REG);
2098         fbd_oft = readl_relaxed(tx_ring->tqp->io_base +
2099                                 HNS3_RING_TX_RING_OFFSET_REG);
2100         ebd_num = readl_relaxed(tx_ring->tqp->io_base +
2101                                 HNS3_RING_TX_RING_EBDNUM_REG);
2102         ebd_oft = readl_relaxed(tx_ring->tqp->io_base +
2103                                 HNS3_RING_TX_RING_EBD_OFFSET_REG);
2104         bd_num = readl_relaxed(tx_ring->tqp->io_base +
2105                                HNS3_RING_TX_RING_BD_NUM_REG);
2106         bd_err = readl_relaxed(tx_ring->tqp->io_base +
2107                                HNS3_RING_TX_RING_BD_ERR_REG);
2108         ring_en = readl_relaxed(tx_ring->tqp->io_base + HNS3_RING_EN_REG);
2109         tc = readl_relaxed(tx_ring->tqp->io_base + HNS3_RING_TX_RING_TC_REG);
2110
2111         netdev_info(ndev,
2112                     "BD_NUM: 0x%x HW_HEAD: 0x%x, HW_TAIL: 0x%x, BD_ERR: 0x%x, INT: 0x%x\n",
2113                     bd_num, hw_head, hw_tail, bd_err,
2114                     readl(tx_ring->tqp_vector->mask_addr));
2115         netdev_info(ndev,
2116                     "RING_EN: 0x%x, TC: 0x%x, FBD_NUM: 0x%x FBD_OFT: 0x%x, EBD_NUM: 0x%x, EBD_OFT: 0x%x\n",
2117                     ring_en, tc, fbd_num, fbd_oft, ebd_num, ebd_oft);
2118
2119         return true;
2120 }
2121
2122 static void hns3_nic_net_timeout(struct net_device *ndev, unsigned int txqueue)
2123 {
2124         struct hns3_nic_priv *priv = netdev_priv(ndev);
2125         struct hnae3_handle *h = priv->ae_handle;
2126
2127         if (!hns3_get_tx_timeo_queue_info(ndev))
2128                 return;
2129
2130         /* request the reset, and let the hclge to determine
2131          * which reset level should be done
2132          */
2133         if (h->ae_algo->ops->reset_event)
2134                 h->ae_algo->ops->reset_event(h->pdev, h);
2135 }
2136
2137 #ifdef CONFIG_RFS_ACCEL
2138 static int hns3_rx_flow_steer(struct net_device *dev, const struct sk_buff *skb,
2139                               u16 rxq_index, u32 flow_id)
2140 {
2141         struct hnae3_handle *h = hns3_get_handle(dev);
2142         struct flow_keys fkeys;
2143
2144         if (!h->ae_algo->ops->add_arfs_entry)
2145                 return -EOPNOTSUPP;
2146
2147         if (skb->encapsulation)
2148                 return -EPROTONOSUPPORT;
2149
2150         if (!skb_flow_dissect_flow_keys(skb, &fkeys, 0))
2151                 return -EPROTONOSUPPORT;
2152
2153         if ((fkeys.basic.n_proto != htons(ETH_P_IP) &&
2154              fkeys.basic.n_proto != htons(ETH_P_IPV6)) ||
2155             (fkeys.basic.ip_proto != IPPROTO_TCP &&
2156              fkeys.basic.ip_proto != IPPROTO_UDP))
2157                 return -EPROTONOSUPPORT;
2158
2159         return h->ae_algo->ops->add_arfs_entry(h, rxq_index, flow_id, &fkeys);
2160 }
2161 #endif
2162
2163 static int hns3_nic_get_vf_config(struct net_device *ndev, int vf,
2164                                   struct ifla_vf_info *ivf)
2165 {
2166         struct hnae3_handle *h = hns3_get_handle(ndev);
2167
2168         if (!h->ae_algo->ops->get_vf_config)
2169                 return -EOPNOTSUPP;
2170
2171         return h->ae_algo->ops->get_vf_config(h, vf, ivf);
2172 }
2173
2174 static int hns3_nic_set_vf_link_state(struct net_device *ndev, int vf,
2175                                       int link_state)
2176 {
2177         struct hnae3_handle *h = hns3_get_handle(ndev);
2178
2179         if (!h->ae_algo->ops->set_vf_link_state)
2180                 return -EOPNOTSUPP;
2181
2182         return h->ae_algo->ops->set_vf_link_state(h, vf, link_state);
2183 }
2184
2185 static int hns3_nic_set_vf_rate(struct net_device *ndev, int vf,
2186                                 int min_tx_rate, int max_tx_rate)
2187 {
2188         struct hnae3_handle *h = hns3_get_handle(ndev);
2189
2190         if (!h->ae_algo->ops->set_vf_rate)
2191                 return -EOPNOTSUPP;
2192
2193         return h->ae_algo->ops->set_vf_rate(h, vf, min_tx_rate, max_tx_rate,
2194                                             false);
2195 }
2196
2197 static int hns3_nic_set_vf_mac(struct net_device *netdev, int vf_id, u8 *mac)
2198 {
2199         struct hnae3_handle *h = hns3_get_handle(netdev);
2200
2201         if (!h->ae_algo->ops->set_vf_mac)
2202                 return -EOPNOTSUPP;
2203
2204         if (is_multicast_ether_addr(mac)) {
2205                 netdev_err(netdev,
2206                            "Invalid MAC:%pM specified. Could not set MAC\n",
2207                            mac);
2208                 return -EINVAL;
2209         }
2210
2211         return h->ae_algo->ops->set_vf_mac(h, vf_id, mac);
2212 }
2213
2214 static const struct net_device_ops hns3_nic_netdev_ops = {
2215         .ndo_open               = hns3_nic_net_open,
2216         .ndo_stop               = hns3_nic_net_stop,
2217         .ndo_start_xmit         = hns3_nic_net_xmit,
2218         .ndo_tx_timeout         = hns3_nic_net_timeout,
2219         .ndo_set_mac_address    = hns3_nic_net_set_mac_address,
2220         .ndo_do_ioctl           = hns3_nic_do_ioctl,
2221         .ndo_change_mtu         = hns3_nic_change_mtu,
2222         .ndo_set_features       = hns3_nic_set_features,
2223         .ndo_features_check     = hns3_features_check,
2224         .ndo_get_stats64        = hns3_nic_get_stats64,
2225         .ndo_setup_tc           = hns3_nic_setup_tc,
2226         .ndo_set_rx_mode        = hns3_nic_set_rx_mode,
2227         .ndo_vlan_rx_add_vid    = hns3_vlan_rx_add_vid,
2228         .ndo_vlan_rx_kill_vid   = hns3_vlan_rx_kill_vid,
2229         .ndo_set_vf_vlan        = hns3_ndo_set_vf_vlan,
2230         .ndo_set_vf_spoofchk    = hns3_set_vf_spoofchk,
2231         .ndo_set_vf_trust       = hns3_set_vf_trust,
2232 #ifdef CONFIG_RFS_ACCEL
2233         .ndo_rx_flow_steer      = hns3_rx_flow_steer,
2234 #endif
2235         .ndo_get_vf_config      = hns3_nic_get_vf_config,
2236         .ndo_set_vf_link_state  = hns3_nic_set_vf_link_state,
2237         .ndo_set_vf_rate        = hns3_nic_set_vf_rate,
2238         .ndo_set_vf_mac         = hns3_nic_set_vf_mac,
2239 };
2240
2241 bool hns3_is_phys_func(struct pci_dev *pdev)
2242 {
2243         u32 dev_id = pdev->device;
2244
2245         switch (dev_id) {
2246         case HNAE3_DEV_ID_GE:
2247         case HNAE3_DEV_ID_25GE:
2248         case HNAE3_DEV_ID_25GE_RDMA:
2249         case HNAE3_DEV_ID_25GE_RDMA_MACSEC:
2250         case HNAE3_DEV_ID_50GE_RDMA:
2251         case HNAE3_DEV_ID_50GE_RDMA_MACSEC:
2252         case HNAE3_DEV_ID_100G_RDMA_MACSEC:
2253         case HNAE3_DEV_ID_200G_RDMA:
2254                 return true;
2255         case HNAE3_DEV_ID_VF:
2256         case HNAE3_DEV_ID_RDMA_DCB_PFC_VF:
2257                 return false;
2258         default:
2259                 dev_warn(&pdev->dev, "un-recognized pci device-id %u",
2260                          dev_id);
2261         }
2262
2263         return false;
2264 }
2265
2266 static void hns3_disable_sriov(struct pci_dev *pdev)
2267 {
2268         /* If our VFs are assigned we cannot shut down SR-IOV
2269          * without causing issues, so just leave the hardware
2270          * available but disabled
2271          */
2272         if (pci_vfs_assigned(pdev)) {
2273                 dev_warn(&pdev->dev,
2274                          "disabling driver while VFs are assigned\n");
2275                 return;
2276         }
2277
2278         pci_disable_sriov(pdev);
2279 }
2280
2281 /* hns3_probe - Device initialization routine
2282  * @pdev: PCI device information struct
2283  * @ent: entry in hns3_pci_tbl
2284  *
2285  * hns3_probe initializes a PF identified by a pci_dev structure.
2286  * The OS initialization, configuring of the PF private structure,
2287  * and a hardware reset occur.
2288  *
2289  * Returns 0 on success, negative on failure
2290  */
2291 static int hns3_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
2292 {
2293         struct hnae3_ae_dev *ae_dev;
2294         int ret;
2295
2296         ae_dev = devm_kzalloc(&pdev->dev, sizeof(*ae_dev), GFP_KERNEL);
2297         if (!ae_dev)
2298                 return -ENOMEM;
2299
2300         ae_dev->pdev = pdev;
2301         ae_dev->flag = ent->driver_data;
2302         pci_set_drvdata(pdev, ae_dev);
2303
2304         ret = hnae3_register_ae_dev(ae_dev);
2305         if (ret)
2306                 pci_set_drvdata(pdev, NULL);
2307
2308         return ret;
2309 }
2310
2311 /* hns3_remove - Device removal routine
2312  * @pdev: PCI device information struct
2313  */
2314 static void hns3_remove(struct pci_dev *pdev)
2315 {
2316         struct hnae3_ae_dev *ae_dev = pci_get_drvdata(pdev);
2317
2318         if (hns3_is_phys_func(pdev) && IS_ENABLED(CONFIG_PCI_IOV))
2319                 hns3_disable_sriov(pdev);
2320
2321         hnae3_unregister_ae_dev(ae_dev);
2322         pci_set_drvdata(pdev, NULL);
2323 }
2324
2325 /**
2326  * hns3_pci_sriov_configure
2327  * @pdev: pointer to a pci_dev structure
2328  * @num_vfs: number of VFs to allocate
2329  *
2330  * Enable or change the number of VFs. Called when the user updates the number
2331  * of VFs in sysfs.
2332  **/
2333 static int hns3_pci_sriov_configure(struct pci_dev *pdev, int num_vfs)
2334 {
2335         int ret;
2336
2337         if (!(hns3_is_phys_func(pdev) && IS_ENABLED(CONFIG_PCI_IOV))) {
2338                 dev_warn(&pdev->dev, "Can not config SRIOV\n");
2339                 return -EINVAL;
2340         }
2341
2342         if (num_vfs) {
2343                 ret = pci_enable_sriov(pdev, num_vfs);
2344                 if (ret)
2345                         dev_err(&pdev->dev, "SRIOV enable failed %d\n", ret);
2346                 else
2347                         return num_vfs;
2348         } else if (!pci_vfs_assigned(pdev)) {
2349                 pci_disable_sriov(pdev);
2350         } else {
2351                 dev_warn(&pdev->dev,
2352                          "Unable to free VFs because some are assigned to VMs.\n");
2353         }
2354
2355         return 0;
2356 }
2357
2358 static void hns3_shutdown(struct pci_dev *pdev)
2359 {
2360         struct hnae3_ae_dev *ae_dev = pci_get_drvdata(pdev);
2361
2362         hnae3_unregister_ae_dev(ae_dev);
2363         pci_set_drvdata(pdev, NULL);
2364
2365         if (system_state == SYSTEM_POWER_OFF)
2366                 pci_set_power_state(pdev, PCI_D3hot);
2367 }
2368
2369 static int __maybe_unused hns3_suspend(struct device *dev)
2370 {
2371         struct hnae3_ae_dev *ae_dev = dev_get_drvdata(dev);
2372
2373         if (ae_dev && hns3_is_phys_func(ae_dev->pdev)) {
2374                 dev_info(dev, "Begin to suspend.\n");
2375                 if (ae_dev->ops && ae_dev->ops->reset_prepare)
2376                         ae_dev->ops->reset_prepare(ae_dev, HNAE3_FUNC_RESET);
2377         }
2378
2379         return 0;
2380 }
2381
2382 static int __maybe_unused hns3_resume(struct device *dev)
2383 {
2384         struct hnae3_ae_dev *ae_dev = dev_get_drvdata(dev);
2385
2386         if (ae_dev && hns3_is_phys_func(ae_dev->pdev)) {
2387                 dev_info(dev, "Begin to resume.\n");
2388                 if (ae_dev->ops && ae_dev->ops->reset_done)
2389                         ae_dev->ops->reset_done(ae_dev);
2390         }
2391
2392         return 0;
2393 }
2394
2395 static pci_ers_result_t hns3_error_detected(struct pci_dev *pdev,
2396                                             pci_channel_state_t state)
2397 {
2398         struct hnae3_ae_dev *ae_dev = pci_get_drvdata(pdev);
2399         pci_ers_result_t ret;
2400
2401         dev_info(&pdev->dev, "PCI error detected, state(=%u)!!\n", state);
2402
2403         if (state == pci_channel_io_perm_failure)
2404                 return PCI_ERS_RESULT_DISCONNECT;
2405
2406         if (!ae_dev || !ae_dev->ops) {
2407                 dev_err(&pdev->dev,
2408                         "Can't recover - error happened before device initialized\n");
2409                 return PCI_ERS_RESULT_NONE;
2410         }
2411
2412         if (ae_dev->ops->handle_hw_ras_error)
2413                 ret = ae_dev->ops->handle_hw_ras_error(ae_dev);
2414         else
2415                 return PCI_ERS_RESULT_NONE;
2416
2417         return ret;
2418 }
2419
2420 static pci_ers_result_t hns3_slot_reset(struct pci_dev *pdev)
2421 {
2422         struct hnae3_ae_dev *ae_dev = pci_get_drvdata(pdev);
2423         const struct hnae3_ae_ops *ops;
2424         enum hnae3_reset_type reset_type;
2425         struct device *dev = &pdev->dev;
2426
2427         if (!ae_dev || !ae_dev->ops)
2428                 return PCI_ERS_RESULT_NONE;
2429
2430         ops = ae_dev->ops;
2431         /* request the reset */
2432         if (ops->reset_event && ops->get_reset_level &&
2433             ops->set_default_reset_request) {
2434                 if (ae_dev->hw_err_reset_req) {
2435                         reset_type = ops->get_reset_level(ae_dev,
2436                                                 &ae_dev->hw_err_reset_req);
2437                         ops->set_default_reset_request(ae_dev, reset_type);
2438                         dev_info(dev, "requesting reset due to PCI error\n");
2439                         ops->reset_event(pdev, NULL);
2440                 }
2441
2442                 return PCI_ERS_RESULT_RECOVERED;
2443         }
2444
2445         return PCI_ERS_RESULT_DISCONNECT;
2446 }
2447
2448 static void hns3_reset_prepare(struct pci_dev *pdev)
2449 {
2450         struct hnae3_ae_dev *ae_dev = pci_get_drvdata(pdev);
2451
2452         dev_info(&pdev->dev, "FLR prepare\n");
2453         if (ae_dev && ae_dev->ops && ae_dev->ops->reset_prepare)
2454                 ae_dev->ops->reset_prepare(ae_dev, HNAE3_FLR_RESET);
2455 }
2456
2457 static void hns3_reset_done(struct pci_dev *pdev)
2458 {
2459         struct hnae3_ae_dev *ae_dev = pci_get_drvdata(pdev);
2460
2461         dev_info(&pdev->dev, "FLR done\n");
2462         if (ae_dev && ae_dev->ops && ae_dev->ops->reset_done)
2463                 ae_dev->ops->reset_done(ae_dev);
2464 }
2465
2466 static const struct pci_error_handlers hns3_err_handler = {
2467         .error_detected = hns3_error_detected,
2468         .slot_reset     = hns3_slot_reset,
2469         .reset_prepare  = hns3_reset_prepare,
2470         .reset_done     = hns3_reset_done,
2471 };
2472
2473 static SIMPLE_DEV_PM_OPS(hns3_pm_ops, hns3_suspend, hns3_resume);
2474
2475 static struct pci_driver hns3_driver = {
2476         .name     = hns3_driver_name,
2477         .id_table = hns3_pci_tbl,
2478         .probe    = hns3_probe,
2479         .remove   = hns3_remove,
2480         .shutdown = hns3_shutdown,
2481         .driver.pm  = &hns3_pm_ops,
2482         .sriov_configure = hns3_pci_sriov_configure,
2483         .err_handler    = &hns3_err_handler,
2484 };
2485
2486 /* set default feature to hns3 */
2487 static void hns3_set_default_feature(struct net_device *netdev)
2488 {
2489         struct hnae3_handle *h = hns3_get_handle(netdev);
2490         struct pci_dev *pdev = h->pdev;
2491         struct hnae3_ae_dev *ae_dev = pci_get_drvdata(pdev);
2492
2493         netdev->priv_flags |= IFF_UNICAST_FLT;
2494
2495         netdev->hw_enc_features |= NETIF_F_RXCSUM | NETIF_F_SG | NETIF_F_GSO |
2496                 NETIF_F_GRO | NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_GSO_GRE |
2497                 NETIF_F_GSO_GRE_CSUM | NETIF_F_GSO_UDP_TUNNEL |
2498                 NETIF_F_SCTP_CRC | NETIF_F_TSO_MANGLEID | NETIF_F_FRAGLIST;
2499
2500         netdev->gso_partial_features |= NETIF_F_GSO_GRE_CSUM;
2501
2502         netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER |
2503                 NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX |
2504                 NETIF_F_RXCSUM | NETIF_F_SG | NETIF_F_GSO |
2505                 NETIF_F_GRO | NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_GSO_GRE |
2506                 NETIF_F_GSO_GRE_CSUM | NETIF_F_GSO_UDP_TUNNEL |
2507                 NETIF_F_SCTP_CRC | NETIF_F_FRAGLIST;
2508
2509         netdev->vlan_features |= NETIF_F_RXCSUM |
2510                 NETIF_F_SG | NETIF_F_GSO | NETIF_F_GRO |
2511                 NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_GSO_GRE |
2512                 NETIF_F_GSO_GRE_CSUM | NETIF_F_GSO_UDP_TUNNEL |
2513                 NETIF_F_SCTP_CRC | NETIF_F_FRAGLIST;
2514
2515         netdev->hw_features |= NETIF_F_HW_VLAN_CTAG_TX |
2516                 NETIF_F_HW_VLAN_CTAG_RX |
2517                 NETIF_F_RXCSUM | NETIF_F_SG | NETIF_F_GSO |
2518                 NETIF_F_GRO | NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_GSO_GRE |
2519                 NETIF_F_GSO_GRE_CSUM | NETIF_F_GSO_UDP_TUNNEL |
2520                 NETIF_F_SCTP_CRC | NETIF_F_FRAGLIST;
2521
2522         if (ae_dev->dev_version >= HNAE3_DEVICE_VERSION_V2) {
2523                 netdev->hw_features |= NETIF_F_GRO_HW;
2524                 netdev->features |= NETIF_F_GRO_HW;
2525
2526                 if (!(h->flags & HNAE3_SUPPORT_VF)) {
2527                         netdev->hw_features |= NETIF_F_NTUPLE;
2528                         netdev->features |= NETIF_F_NTUPLE;
2529                 }
2530         }
2531
2532         if (test_bit(HNAE3_DEV_SUPPORT_UDP_GSO_B, ae_dev->caps)) {
2533                 netdev->hw_features |= NETIF_F_GSO_UDP_L4;
2534                 netdev->features |= NETIF_F_GSO_UDP_L4;
2535                 netdev->vlan_features |= NETIF_F_GSO_UDP_L4;
2536                 netdev->hw_enc_features |= NETIF_F_GSO_UDP_L4;
2537         }
2538
2539         if (test_bit(HNAE3_DEV_SUPPORT_HW_TX_CSUM_B, ae_dev->caps)) {
2540                 netdev->hw_features |= NETIF_F_HW_CSUM;
2541                 netdev->features |= NETIF_F_HW_CSUM;
2542                 netdev->vlan_features |= NETIF_F_HW_CSUM;
2543                 netdev->hw_enc_features |= NETIF_F_HW_CSUM;
2544         } else {
2545                 netdev->hw_features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM;
2546                 netdev->features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM;
2547                 netdev->vlan_features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM;
2548                 netdev->hw_enc_features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM;
2549         }
2550
2551         if (test_bit(HNAE3_DEV_SUPPORT_UDP_TUNNEL_CSUM_B, ae_dev->caps)) {
2552                 netdev->hw_features |= NETIF_F_GSO_UDP_TUNNEL_CSUM;
2553                 netdev->features |= NETIF_F_GSO_UDP_TUNNEL_CSUM;
2554                 netdev->vlan_features |= NETIF_F_GSO_UDP_TUNNEL_CSUM;
2555                 netdev->hw_enc_features |= NETIF_F_GSO_UDP_TUNNEL_CSUM;
2556         }
2557
2558         if (test_bit(HNAE3_DEV_SUPPORT_FD_FORWARD_TC_B, ae_dev->caps)) {
2559                 netdev->hw_features |= NETIF_F_HW_TC;
2560                 netdev->features |= NETIF_F_HW_TC;
2561         }
2562 }
2563
2564 static int hns3_alloc_buffer(struct hns3_enet_ring *ring,
2565                              struct hns3_desc_cb *cb)
2566 {
2567         unsigned int order = hns3_page_order(ring);
2568         struct page *p;
2569
2570         p = dev_alloc_pages(order);
2571         if (!p)
2572                 return -ENOMEM;
2573
2574         cb->priv = p;
2575         cb->page_offset = 0;
2576         cb->reuse_flag = 0;
2577         cb->buf  = page_address(p);
2578         cb->length = hns3_page_size(ring);
2579         cb->type = DESC_TYPE_PAGE;
2580         page_ref_add(p, USHRT_MAX - 1);
2581         cb->pagecnt_bias = USHRT_MAX;
2582
2583         return 0;
2584 }
2585
2586 static void hns3_free_buffer(struct hns3_enet_ring *ring,
2587                              struct hns3_desc_cb *cb, int budget)
2588 {
2589         if (cb->type == DESC_TYPE_SKB)
2590                 napi_consume_skb(cb->priv, budget);
2591         else if (!HNAE3_IS_TX_RING(ring) && cb->pagecnt_bias)
2592                 __page_frag_cache_drain(cb->priv, cb->pagecnt_bias);
2593         memset(cb, 0, sizeof(*cb));
2594 }
2595
2596 static int hns3_map_buffer(struct hns3_enet_ring *ring, struct hns3_desc_cb *cb)
2597 {
2598         cb->dma = dma_map_page(ring_to_dev(ring), cb->priv, 0,
2599                                cb->length, ring_to_dma_dir(ring));
2600
2601         if (unlikely(dma_mapping_error(ring_to_dev(ring), cb->dma)))
2602                 return -EIO;
2603
2604         return 0;
2605 }
2606
2607 static void hns3_unmap_buffer(struct hns3_enet_ring *ring,
2608                               struct hns3_desc_cb *cb)
2609 {
2610         if (cb->type == DESC_TYPE_SKB || cb->type == DESC_TYPE_FRAGLIST_SKB)
2611                 dma_unmap_single(ring_to_dev(ring), cb->dma, cb->length,
2612                                  ring_to_dma_dir(ring));
2613         else if (cb->length)
2614                 dma_unmap_page(ring_to_dev(ring), cb->dma, cb->length,
2615                                ring_to_dma_dir(ring));
2616 }
2617
2618 static void hns3_buffer_detach(struct hns3_enet_ring *ring, int i)
2619 {
2620         hns3_unmap_buffer(ring, &ring->desc_cb[i]);
2621         ring->desc[i].addr = 0;
2622 }
2623
2624 static void hns3_free_buffer_detach(struct hns3_enet_ring *ring, int i,
2625                                     int budget)
2626 {
2627         struct hns3_desc_cb *cb = &ring->desc_cb[i];
2628
2629         if (!ring->desc_cb[i].dma)
2630                 return;
2631
2632         hns3_buffer_detach(ring, i);
2633         hns3_free_buffer(ring, cb, budget);
2634 }
2635
2636 static void hns3_free_buffers(struct hns3_enet_ring *ring)
2637 {
2638         int i;
2639
2640         for (i = 0; i < ring->desc_num; i++)
2641                 hns3_free_buffer_detach(ring, i, 0);
2642 }
2643
2644 /* free desc along with its attached buffer */
2645 static void hns3_free_desc(struct hns3_enet_ring *ring)
2646 {
2647         int size = ring->desc_num * sizeof(ring->desc[0]);
2648
2649         hns3_free_buffers(ring);
2650
2651         if (ring->desc) {
2652                 dma_free_coherent(ring_to_dev(ring), size,
2653                                   ring->desc, ring->desc_dma_addr);
2654                 ring->desc = NULL;
2655         }
2656 }
2657
2658 static int hns3_alloc_desc(struct hns3_enet_ring *ring)
2659 {
2660         int size = ring->desc_num * sizeof(ring->desc[0]);
2661
2662         ring->desc = dma_alloc_coherent(ring_to_dev(ring), size,
2663                                         &ring->desc_dma_addr, GFP_KERNEL);
2664         if (!ring->desc)
2665                 return -ENOMEM;
2666
2667         return 0;
2668 }
2669
2670 static int hns3_alloc_and_map_buffer(struct hns3_enet_ring *ring,
2671                                    struct hns3_desc_cb *cb)
2672 {
2673         int ret;
2674
2675         ret = hns3_alloc_buffer(ring, cb);
2676         if (ret)
2677                 goto out;
2678
2679         ret = hns3_map_buffer(ring, cb);
2680         if (ret)
2681                 goto out_with_buf;
2682
2683         return 0;
2684
2685 out_with_buf:
2686         hns3_free_buffer(ring, cb, 0);
2687 out:
2688         return ret;
2689 }
2690
2691 static int hns3_alloc_and_attach_buffer(struct hns3_enet_ring *ring, int i)
2692 {
2693         int ret = hns3_alloc_and_map_buffer(ring, &ring->desc_cb[i]);
2694
2695         if (ret)
2696                 return ret;
2697
2698         ring->desc[i].addr = cpu_to_le64(ring->desc_cb[i].dma);
2699
2700         return 0;
2701 }
2702
2703 /* Allocate memory for raw pkg, and map with dma */
2704 static int hns3_alloc_ring_buffers(struct hns3_enet_ring *ring)
2705 {
2706         int i, j, ret;
2707
2708         for (i = 0; i < ring->desc_num; i++) {
2709                 ret = hns3_alloc_and_attach_buffer(ring, i);
2710                 if (ret)
2711                         goto out_buffer_fail;
2712         }
2713
2714         return 0;
2715
2716 out_buffer_fail:
2717         for (j = i - 1; j >= 0; j--)
2718                 hns3_free_buffer_detach(ring, j, 0);
2719         return ret;
2720 }
2721
2722 /* detach a in-used buffer and replace with a reserved one */
2723 static void hns3_replace_buffer(struct hns3_enet_ring *ring, int i,
2724                                 struct hns3_desc_cb *res_cb)
2725 {
2726         hns3_unmap_buffer(ring, &ring->desc_cb[i]);
2727         ring->desc_cb[i] = *res_cb;
2728         ring->desc[i].addr = cpu_to_le64(ring->desc_cb[i].dma);
2729         ring->desc[i].rx.bd_base_info = 0;
2730 }
2731
2732 static void hns3_reuse_buffer(struct hns3_enet_ring *ring, int i)
2733 {
2734         ring->desc_cb[i].reuse_flag = 0;
2735         ring->desc[i].addr = cpu_to_le64(ring->desc_cb[i].dma +
2736                                          ring->desc_cb[i].page_offset);
2737         ring->desc[i].rx.bd_base_info = 0;
2738
2739         dma_sync_single_for_device(ring_to_dev(ring),
2740                         ring->desc_cb[i].dma + ring->desc_cb[i].page_offset,
2741                         hns3_buf_size(ring),
2742                         DMA_FROM_DEVICE);
2743 }
2744
2745 static bool hns3_nic_reclaim_desc(struct hns3_enet_ring *ring,
2746                                   int *bytes, int *pkts, int budget)
2747 {
2748         /* pair with ring->last_to_use update in hns3_tx_doorbell(),
2749          * smp_store_release() is not used in hns3_tx_doorbell() because
2750          * the doorbell operation already have the needed barrier operation.
2751          */
2752         int ltu = smp_load_acquire(&ring->last_to_use);
2753         int ntc = ring->next_to_clean;
2754         struct hns3_desc_cb *desc_cb;
2755         bool reclaimed = false;
2756         struct hns3_desc *desc;
2757
2758         while (ltu != ntc) {
2759                 desc = &ring->desc[ntc];
2760
2761                 if (le16_to_cpu(desc->tx.bdtp_fe_sc_vld_ra_ri) &
2762                                 BIT(HNS3_TXD_VLD_B))
2763                         break;
2764
2765                 desc_cb = &ring->desc_cb[ntc];
2766
2767                 if (desc_cb->type == DESC_TYPE_SKB) {
2768                         (*pkts)++;
2769                         (*bytes) += desc_cb->send_bytes;
2770                 }
2771
2772                 /* desc_cb will be cleaned, after hnae3_free_buffer_detach */
2773                 hns3_free_buffer_detach(ring, ntc, budget);
2774
2775                 if (++ntc == ring->desc_num)
2776                         ntc = 0;
2777
2778                 /* Issue prefetch for next Tx descriptor */
2779                 prefetch(&ring->desc_cb[ntc]);
2780                 reclaimed = true;
2781         }
2782
2783         if (unlikely(!reclaimed))
2784                 return false;
2785
2786         /* This smp_store_release() pairs with smp_load_acquire() in
2787          * ring_space called by hns3_nic_net_xmit.
2788          */
2789         smp_store_release(&ring->next_to_clean, ntc);
2790         return true;
2791 }
2792
2793 void hns3_clean_tx_ring(struct hns3_enet_ring *ring, int budget)
2794 {
2795         struct net_device *netdev = ring_to_netdev(ring);
2796         struct hns3_nic_priv *priv = netdev_priv(netdev);
2797         struct netdev_queue *dev_queue;
2798         int bytes, pkts;
2799
2800         bytes = 0;
2801         pkts = 0;
2802
2803         if (unlikely(!hns3_nic_reclaim_desc(ring, &bytes, &pkts, budget)))
2804                 return;
2805
2806         ring->tqp_vector->tx_group.total_bytes += bytes;
2807         ring->tqp_vector->tx_group.total_packets += pkts;
2808
2809         u64_stats_update_begin(&ring->syncp);
2810         ring->stats.tx_bytes += bytes;
2811         ring->stats.tx_pkts += pkts;
2812         u64_stats_update_end(&ring->syncp);
2813
2814         dev_queue = netdev_get_tx_queue(netdev, ring->tqp->tqp_index);
2815         netdev_tx_completed_queue(dev_queue, pkts, bytes);
2816
2817         if (unlikely(netif_carrier_ok(netdev) &&
2818                      ring_space(ring) > HNS3_MAX_TSO_BD_NUM)) {
2819                 /* Make sure that anybody stopping the queue after this
2820                  * sees the new next_to_clean.
2821                  */
2822                 smp_mb();
2823                 if (netif_tx_queue_stopped(dev_queue) &&
2824                     !test_bit(HNS3_NIC_STATE_DOWN, &priv->state)) {
2825                         netif_tx_wake_queue(dev_queue);
2826                         ring->stats.restart_queue++;
2827                 }
2828         }
2829 }
2830
2831 static int hns3_desc_unused(struct hns3_enet_ring *ring)
2832 {
2833         int ntc = ring->next_to_clean;
2834         int ntu = ring->next_to_use;
2835
2836         return ((ntc >= ntu) ? 0 : ring->desc_num) + ntc - ntu;
2837 }
2838
2839 static void hns3_nic_alloc_rx_buffers(struct hns3_enet_ring *ring,
2840                                       int cleand_count)
2841 {
2842         struct hns3_desc_cb *desc_cb;
2843         struct hns3_desc_cb res_cbs;
2844         int i, ret;
2845
2846         for (i = 0; i < cleand_count; i++) {
2847                 desc_cb = &ring->desc_cb[ring->next_to_use];
2848                 if (desc_cb->reuse_flag) {
2849                         u64_stats_update_begin(&ring->syncp);
2850                         ring->stats.reuse_pg_cnt++;
2851                         u64_stats_update_end(&ring->syncp);
2852
2853                         hns3_reuse_buffer(ring, ring->next_to_use);
2854                 } else {
2855                         ret = hns3_alloc_and_map_buffer(ring, &res_cbs);
2856                         if (ret) {
2857                                 u64_stats_update_begin(&ring->syncp);
2858                                 ring->stats.sw_err_cnt++;
2859                                 u64_stats_update_end(&ring->syncp);
2860
2861                                 hns3_rl_err(ring_to_netdev(ring),
2862                                             "alloc rx buffer failed: %d\n",
2863                                             ret);
2864                                 break;
2865                         }
2866                         hns3_replace_buffer(ring, ring->next_to_use, &res_cbs);
2867
2868                         u64_stats_update_begin(&ring->syncp);
2869                         ring->stats.non_reuse_pg++;
2870                         u64_stats_update_end(&ring->syncp);
2871                 }
2872
2873                 ring_ptr_move_fw(ring, next_to_use);
2874         }
2875
2876         writel(i, ring->tqp->io_base + HNS3_RING_RX_RING_HEAD_REG);
2877 }
2878
2879 static bool hns3_can_reuse_page(struct hns3_desc_cb *cb)
2880 {
2881         return (page_count(cb->priv) - cb->pagecnt_bias) == 1;
2882 }
2883
2884 static void hns3_nic_reuse_page(struct sk_buff *skb, int i,
2885                                 struct hns3_enet_ring *ring, int pull_len,
2886                                 struct hns3_desc_cb *desc_cb)
2887 {
2888         struct hns3_desc *desc = &ring->desc[ring->next_to_clean];
2889         int size = le16_to_cpu(desc->rx.size);
2890         u32 truesize = hns3_buf_size(ring);
2891
2892         desc_cb->pagecnt_bias--;
2893         skb_add_rx_frag(skb, i, desc_cb->priv, desc_cb->page_offset + pull_len,
2894                         size - pull_len, truesize);
2895
2896         /* Avoid re-using remote and pfmemalloc pages, or the stack is still
2897          * using the page when page_offset rollback to zero, flag default
2898          * unreuse
2899          */
2900         if (!dev_page_is_reusable(desc_cb->priv) ||
2901             (!desc_cb->page_offset && !hns3_can_reuse_page(desc_cb))) {
2902                 __page_frag_cache_drain(desc_cb->priv, desc_cb->pagecnt_bias);
2903                 return;
2904         }
2905
2906         /* Move offset up to the next cache line */
2907         desc_cb->page_offset += truesize;
2908
2909         if (desc_cb->page_offset + truesize <= hns3_page_size(ring)) {
2910                 desc_cb->reuse_flag = 1;
2911         } else if (hns3_can_reuse_page(desc_cb)) {
2912                 desc_cb->reuse_flag = 1;
2913                 desc_cb->page_offset = 0;
2914         } else if (desc_cb->pagecnt_bias) {
2915                 __page_frag_cache_drain(desc_cb->priv, desc_cb->pagecnt_bias);
2916                 return;
2917         }
2918
2919         if (unlikely(!desc_cb->pagecnt_bias)) {
2920                 page_ref_add(desc_cb->priv, USHRT_MAX);
2921                 desc_cb->pagecnt_bias = USHRT_MAX;
2922         }
2923 }
2924
2925 static int hns3_gro_complete(struct sk_buff *skb, u32 l234info)
2926 {
2927         __be16 type = skb->protocol;
2928         struct tcphdr *th;
2929         int depth = 0;
2930
2931         while (eth_type_vlan(type)) {
2932                 struct vlan_hdr *vh;
2933
2934                 if ((depth + VLAN_HLEN) > skb_headlen(skb))
2935                         return -EFAULT;
2936
2937                 vh = (struct vlan_hdr *)(skb->data + depth);
2938                 type = vh->h_vlan_encapsulated_proto;
2939                 depth += VLAN_HLEN;
2940         }
2941
2942         skb_set_network_header(skb, depth);
2943
2944         if (type == htons(ETH_P_IP)) {
2945                 const struct iphdr *iph = ip_hdr(skb);
2946
2947                 depth += sizeof(struct iphdr);
2948                 skb_set_transport_header(skb, depth);
2949                 th = tcp_hdr(skb);
2950                 th->check = ~tcp_v4_check(skb->len - depth, iph->saddr,
2951                                           iph->daddr, 0);
2952         } else if (type == htons(ETH_P_IPV6)) {
2953                 const struct ipv6hdr *iph = ipv6_hdr(skb);
2954
2955                 depth += sizeof(struct ipv6hdr);
2956                 skb_set_transport_header(skb, depth);
2957                 th = tcp_hdr(skb);
2958                 th->check = ~tcp_v6_check(skb->len - depth, &iph->saddr,
2959                                           &iph->daddr, 0);
2960         } else {
2961                 hns3_rl_err(skb->dev,
2962                             "Error: FW GRO supports only IPv4/IPv6, not 0x%04x, depth: %d\n",
2963                             be16_to_cpu(type), depth);
2964                 return -EFAULT;
2965         }
2966
2967         skb_shinfo(skb)->gso_segs = NAPI_GRO_CB(skb)->count;
2968         if (th->cwr)
2969                 skb_shinfo(skb)->gso_type |= SKB_GSO_TCP_ECN;
2970
2971         if (l234info & BIT(HNS3_RXD_GRO_FIXID_B))
2972                 skb_shinfo(skb)->gso_type |= SKB_GSO_TCP_FIXEDID;
2973
2974         skb->csum_start = (unsigned char *)th - skb->head;
2975         skb->csum_offset = offsetof(struct tcphdr, check);
2976         skb->ip_summed = CHECKSUM_PARTIAL;
2977
2978         trace_hns3_gro(skb);
2979
2980         return 0;
2981 }
2982
2983 static void hns3_checksum_complete(struct hns3_enet_ring *ring,
2984                                    struct sk_buff *skb, u32 l234info)
2985 {
2986         u32 lo, hi;
2987
2988         u64_stats_update_begin(&ring->syncp);
2989         ring->stats.csum_complete++;
2990         u64_stats_update_end(&ring->syncp);
2991         skb->ip_summed = CHECKSUM_COMPLETE;
2992         lo = hnae3_get_field(l234info, HNS3_RXD_L2_CSUM_L_M,
2993                              HNS3_RXD_L2_CSUM_L_S);
2994         hi = hnae3_get_field(l234info, HNS3_RXD_L2_CSUM_H_M,
2995                              HNS3_RXD_L2_CSUM_H_S);
2996         skb->csum = csum_unfold((__force __sum16)(lo | hi << 8));
2997 }
2998
2999 static void hns3_rx_checksum(struct hns3_enet_ring *ring, struct sk_buff *skb,
3000                              u32 l234info, u32 bd_base_info, u32 ol_info)
3001 {
3002         struct net_device *netdev = ring_to_netdev(ring);
3003         int l3_type, l4_type;
3004         int ol4_type;
3005
3006         skb->ip_summed = CHECKSUM_NONE;
3007
3008         skb_checksum_none_assert(skb);
3009
3010         if (!(netdev->features & NETIF_F_RXCSUM))
3011                 return;
3012
3013         if (l234info & BIT(HNS3_RXD_L2_CSUM_B)) {
3014                 hns3_checksum_complete(ring, skb, l234info);
3015                 return;
3016         }
3017
3018         /* check if hardware has done checksum */
3019         if (!(bd_base_info & BIT(HNS3_RXD_L3L4P_B)))
3020                 return;
3021
3022         if (unlikely(l234info & (BIT(HNS3_RXD_L3E_B) | BIT(HNS3_RXD_L4E_B) |
3023                                  BIT(HNS3_RXD_OL3E_B) |
3024                                  BIT(HNS3_RXD_OL4E_B)))) {
3025                 u64_stats_update_begin(&ring->syncp);
3026                 ring->stats.l3l4_csum_err++;
3027                 u64_stats_update_end(&ring->syncp);
3028
3029                 return;
3030         }
3031
3032         ol4_type = hnae3_get_field(ol_info, HNS3_RXD_OL4ID_M,
3033                                    HNS3_RXD_OL4ID_S);
3034         switch (ol4_type) {
3035         case HNS3_OL4_TYPE_MAC_IN_UDP:
3036         case HNS3_OL4_TYPE_NVGRE:
3037                 skb->csum_level = 1;
3038                 fallthrough;
3039         case HNS3_OL4_TYPE_NO_TUN:
3040                 l3_type = hnae3_get_field(l234info, HNS3_RXD_L3ID_M,
3041                                           HNS3_RXD_L3ID_S);
3042                 l4_type = hnae3_get_field(l234info, HNS3_RXD_L4ID_M,
3043                                           HNS3_RXD_L4ID_S);
3044                 /* Can checksum ipv4 or ipv6 + UDP/TCP/SCTP packets */
3045                 if ((l3_type == HNS3_L3_TYPE_IPV4 ||
3046                      l3_type == HNS3_L3_TYPE_IPV6) &&
3047                     (l4_type == HNS3_L4_TYPE_UDP ||
3048                      l4_type == HNS3_L4_TYPE_TCP ||
3049                      l4_type == HNS3_L4_TYPE_SCTP))
3050                         skb->ip_summed = CHECKSUM_UNNECESSARY;
3051                 break;
3052         default:
3053                 break;
3054         }
3055 }
3056
3057 static void hns3_rx_skb(struct hns3_enet_ring *ring, struct sk_buff *skb)
3058 {
3059         if (skb_has_frag_list(skb))
3060                 napi_gro_flush(&ring->tqp_vector->napi, false);
3061
3062         napi_gro_receive(&ring->tqp_vector->napi, skb);
3063 }
3064
3065 static bool hns3_parse_vlan_tag(struct hns3_enet_ring *ring,
3066                                 struct hns3_desc *desc, u32 l234info,
3067                                 u16 *vlan_tag)
3068 {
3069         struct hnae3_handle *handle = ring->tqp->handle;
3070         struct pci_dev *pdev = ring->tqp->handle->pdev;
3071         struct hnae3_ae_dev *ae_dev = pci_get_drvdata(pdev);
3072
3073         if (unlikely(ae_dev->dev_version < HNAE3_DEVICE_VERSION_V2)) {
3074                 *vlan_tag = le16_to_cpu(desc->rx.ot_vlan_tag);
3075                 if (!(*vlan_tag & VLAN_VID_MASK))
3076                         *vlan_tag = le16_to_cpu(desc->rx.vlan_tag);
3077
3078                 return (*vlan_tag != 0);
3079         }
3080
3081 #define HNS3_STRP_OUTER_VLAN    0x1
3082 #define HNS3_STRP_INNER_VLAN    0x2
3083 #define HNS3_STRP_BOTH          0x3
3084
3085         /* Hardware always insert VLAN tag into RX descriptor when
3086          * remove the tag from packet, driver needs to determine
3087          * reporting which tag to stack.
3088          */
3089         switch (hnae3_get_field(l234info, HNS3_RXD_STRP_TAGP_M,
3090                                 HNS3_RXD_STRP_TAGP_S)) {
3091         case HNS3_STRP_OUTER_VLAN:
3092                 if (handle->port_base_vlan_state !=
3093                                 HNAE3_PORT_BASE_VLAN_DISABLE)
3094                         return false;
3095
3096                 *vlan_tag = le16_to_cpu(desc->rx.ot_vlan_tag);
3097                 return true;
3098         case HNS3_STRP_INNER_VLAN:
3099                 if (handle->port_base_vlan_state !=
3100                                 HNAE3_PORT_BASE_VLAN_DISABLE)
3101                         return false;
3102
3103                 *vlan_tag = le16_to_cpu(desc->rx.vlan_tag);
3104                 return true;
3105         case HNS3_STRP_BOTH:
3106                 if (handle->port_base_vlan_state ==
3107                                 HNAE3_PORT_BASE_VLAN_DISABLE)
3108                         *vlan_tag = le16_to_cpu(desc->rx.ot_vlan_tag);
3109                 else
3110                         *vlan_tag = le16_to_cpu(desc->rx.vlan_tag);
3111
3112                 return true;
3113         default:
3114                 return false;
3115         }
3116 }
3117
3118 static void hns3_rx_ring_move_fw(struct hns3_enet_ring *ring)
3119 {
3120         ring->desc[ring->next_to_clean].rx.bd_base_info &=
3121                 cpu_to_le32(~BIT(HNS3_RXD_VLD_B));
3122         ring->next_to_clean += 1;
3123
3124         if (unlikely(ring->next_to_clean == ring->desc_num))
3125                 ring->next_to_clean = 0;
3126 }
3127
3128 static int hns3_alloc_skb(struct hns3_enet_ring *ring, unsigned int length,
3129                           unsigned char *va)
3130 {
3131         struct hns3_desc_cb *desc_cb = &ring->desc_cb[ring->next_to_clean];
3132         struct net_device *netdev = ring_to_netdev(ring);
3133         struct sk_buff *skb;
3134
3135         ring->skb = napi_alloc_skb(&ring->tqp_vector->napi, HNS3_RX_HEAD_SIZE);
3136         skb = ring->skb;
3137         if (unlikely(!skb)) {
3138                 hns3_rl_err(netdev, "alloc rx skb fail\n");
3139
3140                 u64_stats_update_begin(&ring->syncp);
3141                 ring->stats.sw_err_cnt++;
3142                 u64_stats_update_end(&ring->syncp);
3143
3144                 return -ENOMEM;
3145         }
3146
3147         trace_hns3_rx_desc(ring);
3148         prefetchw(skb->data);
3149
3150         ring->pending_buf = 1;
3151         ring->frag_num = 0;
3152         ring->tail_skb = NULL;
3153         if (length <= HNS3_RX_HEAD_SIZE) {
3154                 memcpy(__skb_put(skb, length), va, ALIGN(length, sizeof(long)));
3155
3156                 /* We can reuse buffer as-is, just make sure it is reusable */
3157                 if (dev_page_is_reusable(desc_cb->priv))
3158                         desc_cb->reuse_flag = 1;
3159                 else /* This page cannot be reused so discard it */
3160                         __page_frag_cache_drain(desc_cb->priv,
3161                                                 desc_cb->pagecnt_bias);
3162
3163                 hns3_rx_ring_move_fw(ring);
3164                 return 0;
3165         }
3166         u64_stats_update_begin(&ring->syncp);
3167         ring->stats.seg_pkt_cnt++;
3168         u64_stats_update_end(&ring->syncp);
3169
3170         ring->pull_len = eth_get_headlen(netdev, va, HNS3_RX_HEAD_SIZE);
3171         __skb_put(skb, ring->pull_len);
3172         hns3_nic_reuse_page(skb, ring->frag_num++, ring, ring->pull_len,
3173                             desc_cb);
3174         hns3_rx_ring_move_fw(ring);
3175
3176         return 0;
3177 }
3178
3179 static int hns3_add_frag(struct hns3_enet_ring *ring)
3180 {
3181         struct sk_buff *skb = ring->skb;
3182         struct sk_buff *head_skb = skb;
3183         struct sk_buff *new_skb;
3184         struct hns3_desc_cb *desc_cb;
3185         struct hns3_desc *desc;
3186         u32 bd_base_info;
3187
3188         do {
3189                 desc = &ring->desc[ring->next_to_clean];
3190                 desc_cb = &ring->desc_cb[ring->next_to_clean];
3191                 bd_base_info = le32_to_cpu(desc->rx.bd_base_info);
3192                 /* make sure HW write desc complete */
3193                 dma_rmb();
3194                 if (!(bd_base_info & BIT(HNS3_RXD_VLD_B)))
3195                         return -ENXIO;
3196
3197                 if (unlikely(ring->frag_num >= MAX_SKB_FRAGS)) {
3198                         new_skb = napi_alloc_skb(&ring->tqp_vector->napi, 0);
3199                         if (unlikely(!new_skb)) {
3200                                 hns3_rl_err(ring_to_netdev(ring),
3201                                             "alloc rx fraglist skb fail\n");
3202                                 return -ENXIO;
3203                         }
3204                         ring->frag_num = 0;
3205
3206                         if (ring->tail_skb) {
3207                                 ring->tail_skb->next = new_skb;
3208                                 ring->tail_skb = new_skb;
3209                         } else {
3210                                 skb_shinfo(skb)->frag_list = new_skb;
3211                                 ring->tail_skb = new_skb;
3212                         }
3213                 }
3214
3215                 if (ring->tail_skb) {
3216                         head_skb->truesize += hns3_buf_size(ring);
3217                         head_skb->data_len += le16_to_cpu(desc->rx.size);
3218                         head_skb->len += le16_to_cpu(desc->rx.size);
3219                         skb = ring->tail_skb;
3220                 }
3221
3222                 dma_sync_single_for_cpu(ring_to_dev(ring),
3223                                 desc_cb->dma + desc_cb->page_offset,
3224                                 hns3_buf_size(ring),
3225                                 DMA_FROM_DEVICE);
3226
3227                 hns3_nic_reuse_page(skb, ring->frag_num++, ring, 0, desc_cb);
3228                 trace_hns3_rx_desc(ring);
3229                 hns3_rx_ring_move_fw(ring);
3230                 ring->pending_buf++;
3231         } while (!(bd_base_info & BIT(HNS3_RXD_FE_B)));
3232
3233         return 0;
3234 }
3235
3236 static int hns3_set_gro_and_checksum(struct hns3_enet_ring *ring,
3237                                      struct sk_buff *skb, u32 l234info,
3238                                      u32 bd_base_info, u32 ol_info)
3239 {
3240         u32 l3_type;
3241
3242         skb_shinfo(skb)->gso_size = hnae3_get_field(bd_base_info,
3243                                                     HNS3_RXD_GRO_SIZE_M,
3244                                                     HNS3_RXD_GRO_SIZE_S);
3245         /* if there is no HW GRO, do not set gro params */
3246         if (!skb_shinfo(skb)->gso_size) {
3247                 hns3_rx_checksum(ring, skb, l234info, bd_base_info, ol_info);
3248                 return 0;
3249         }
3250
3251         NAPI_GRO_CB(skb)->count = hnae3_get_field(l234info,
3252                                                   HNS3_RXD_GRO_COUNT_M,
3253                                                   HNS3_RXD_GRO_COUNT_S);
3254
3255         l3_type = hnae3_get_field(l234info, HNS3_RXD_L3ID_M, HNS3_RXD_L3ID_S);
3256         if (l3_type == HNS3_L3_TYPE_IPV4)
3257                 skb_shinfo(skb)->gso_type = SKB_GSO_TCPV4;
3258         else if (l3_type == HNS3_L3_TYPE_IPV6)
3259                 skb_shinfo(skb)->gso_type = SKB_GSO_TCPV6;
3260         else
3261                 return -EFAULT;
3262
3263         return  hns3_gro_complete(skb, l234info);
3264 }
3265
3266 static void hns3_set_rx_skb_rss_type(struct hns3_enet_ring *ring,
3267                                      struct sk_buff *skb, u32 rss_hash)
3268 {
3269         struct hnae3_handle *handle = ring->tqp->handle;
3270         enum pkt_hash_types rss_type;
3271
3272         if (rss_hash)
3273                 rss_type = handle->kinfo.rss_type;
3274         else
3275                 rss_type = PKT_HASH_TYPE_NONE;
3276
3277         skb_set_hash(skb, rss_hash, rss_type);
3278 }
3279
3280 static int hns3_handle_bdinfo(struct hns3_enet_ring *ring, struct sk_buff *skb)
3281 {
3282         struct net_device *netdev = ring_to_netdev(ring);
3283         enum hns3_pkt_l2t_type l2_frame_type;
3284         u32 bd_base_info, l234info, ol_info;
3285         struct hns3_desc *desc;
3286         unsigned int len;
3287         int pre_ntc, ret;
3288
3289         /* bdinfo handled below is only valid on the last BD of the
3290          * current packet, and ring->next_to_clean indicates the first
3291          * descriptor of next packet, so need - 1 below.
3292          */
3293         pre_ntc = ring->next_to_clean ? (ring->next_to_clean - 1) :
3294                                         (ring->desc_num - 1);
3295         desc = &ring->desc[pre_ntc];
3296         bd_base_info = le32_to_cpu(desc->rx.bd_base_info);
3297         l234info = le32_to_cpu(desc->rx.l234_info);
3298         ol_info = le32_to_cpu(desc->rx.ol_info);
3299
3300         /* Based on hw strategy, the tag offloaded will be stored at
3301          * ot_vlan_tag in two layer tag case, and stored at vlan_tag
3302          * in one layer tag case.
3303          */
3304         if (netdev->features & NETIF_F_HW_VLAN_CTAG_RX) {
3305                 u16 vlan_tag;
3306
3307                 if (hns3_parse_vlan_tag(ring, desc, l234info, &vlan_tag))
3308                         __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q),
3309                                                vlan_tag);
3310         }
3311
3312         if (unlikely(!desc->rx.pkt_len || (l234info & (BIT(HNS3_RXD_TRUNCAT_B) |
3313                                   BIT(HNS3_RXD_L2E_B))))) {
3314                 u64_stats_update_begin(&ring->syncp);
3315                 if (l234info & BIT(HNS3_RXD_L2E_B))
3316                         ring->stats.l2_err++;
3317                 else
3318                         ring->stats.err_pkt_len++;
3319                 u64_stats_update_end(&ring->syncp);
3320
3321                 return -EFAULT;
3322         }
3323
3324         len = skb->len;
3325
3326         /* Do update ip stack process */
3327         skb->protocol = eth_type_trans(skb, netdev);
3328
3329         /* This is needed in order to enable forwarding support */
3330         ret = hns3_set_gro_and_checksum(ring, skb, l234info,
3331                                         bd_base_info, ol_info);
3332         if (unlikely(ret)) {
3333                 u64_stats_update_begin(&ring->syncp);
3334                 ring->stats.rx_err_cnt++;
3335                 u64_stats_update_end(&ring->syncp);
3336                 return ret;
3337         }
3338
3339         l2_frame_type = hnae3_get_field(l234info, HNS3_RXD_DMAC_M,
3340                                         HNS3_RXD_DMAC_S);
3341
3342         u64_stats_update_begin(&ring->syncp);
3343         ring->stats.rx_pkts++;
3344         ring->stats.rx_bytes += len;
3345
3346         if (l2_frame_type == HNS3_L2_TYPE_MULTICAST)
3347                 ring->stats.rx_multicast++;
3348
3349         u64_stats_update_end(&ring->syncp);
3350
3351         ring->tqp_vector->rx_group.total_bytes += len;
3352
3353         hns3_set_rx_skb_rss_type(ring, skb, le32_to_cpu(desc->rx.rss_hash));
3354         return 0;
3355 }
3356
3357 static int hns3_handle_rx_bd(struct hns3_enet_ring *ring)
3358 {
3359         struct sk_buff *skb = ring->skb;
3360         struct hns3_desc_cb *desc_cb;
3361         struct hns3_desc *desc;
3362         unsigned int length;
3363         u32 bd_base_info;
3364         int ret;
3365
3366         desc = &ring->desc[ring->next_to_clean];
3367         desc_cb = &ring->desc_cb[ring->next_to_clean];
3368
3369         prefetch(desc);
3370
3371         if (!skb) {
3372                 bd_base_info = le32_to_cpu(desc->rx.bd_base_info);
3373                 /* Check valid BD */
3374                 if (unlikely(!(bd_base_info & BIT(HNS3_RXD_VLD_B))))
3375                         return -ENXIO;
3376
3377                 dma_rmb();
3378                 length = le16_to_cpu(desc->rx.size);
3379
3380                 ring->va = desc_cb->buf + desc_cb->page_offset;
3381
3382                 dma_sync_single_for_cpu(ring_to_dev(ring),
3383                                 desc_cb->dma + desc_cb->page_offset,
3384                                 hns3_buf_size(ring),
3385                                 DMA_FROM_DEVICE);
3386
3387                 /* Prefetch first cache line of first page.
3388                  * Idea is to cache few bytes of the header of the packet.
3389                  * Our L1 Cache line size is 64B so need to prefetch twice to make
3390                  * it 128B. But in actual we can have greater size of caches with
3391                  * 128B Level 1 cache lines. In such a case, single fetch would
3392                  * suffice to cache in the relevant part of the header.
3393                  */
3394                 net_prefetch(ring->va);
3395
3396                 ret = hns3_alloc_skb(ring, length, ring->va);
3397                 skb = ring->skb;
3398
3399                 if (ret < 0) /* alloc buffer fail */
3400                         return ret;
3401                 if (!(bd_base_info & BIT(HNS3_RXD_FE_B))) { /* need add frag */
3402                         ret = hns3_add_frag(ring);
3403                         if (ret)
3404                                 return ret;
3405                 }
3406         } else {
3407                 ret = hns3_add_frag(ring);
3408                 if (ret)
3409                         return ret;
3410         }
3411
3412         /* As the head data may be changed when GRO enable, copy
3413          * the head data in after other data rx completed
3414          */
3415         if (skb->len > HNS3_RX_HEAD_SIZE)
3416                 memcpy(skb->data, ring->va,
3417                        ALIGN(ring->pull_len, sizeof(long)));
3418
3419         ret = hns3_handle_bdinfo(ring, skb);
3420         if (unlikely(ret)) {
3421                 dev_kfree_skb_any(skb);
3422                 return ret;
3423         }
3424
3425         skb_record_rx_queue(skb, ring->tqp->tqp_index);
3426         return 0;
3427 }
3428
3429 int hns3_clean_rx_ring(struct hns3_enet_ring *ring, int budget,
3430                        void (*rx_fn)(struct hns3_enet_ring *, struct sk_buff *))
3431 {
3432 #define RCB_NOF_ALLOC_RX_BUFF_ONCE 16
3433         int unused_count = hns3_desc_unused(ring);
3434         int recv_pkts = 0;
3435         int err;
3436
3437         unused_count -= ring->pending_buf;
3438
3439         while (recv_pkts < budget) {
3440                 /* Reuse or realloc buffers */
3441                 if (unused_count >= RCB_NOF_ALLOC_RX_BUFF_ONCE) {
3442                         hns3_nic_alloc_rx_buffers(ring, unused_count);
3443                         unused_count = hns3_desc_unused(ring) -
3444                                         ring->pending_buf;
3445                 }
3446
3447                 /* Poll one pkt */
3448                 err = hns3_handle_rx_bd(ring);
3449                 /* Do not get FE for the packet or failed to alloc skb */
3450                 if (unlikely(!ring->skb || err == -ENXIO)) {
3451                         goto out;
3452                 } else if (likely(!err)) {
3453                         rx_fn(ring, ring->skb);
3454                         recv_pkts++;
3455                 }
3456
3457                 unused_count += ring->pending_buf;
3458                 ring->skb = NULL;
3459                 ring->pending_buf = 0;
3460         }
3461
3462 out:
3463         /* Make all data has been write before submit */
3464         if (unused_count > 0)
3465                 hns3_nic_alloc_rx_buffers(ring, unused_count);
3466
3467         return recv_pkts;
3468 }
3469
3470 static bool hns3_get_new_flow_lvl(struct hns3_enet_ring_group *ring_group)
3471 {
3472 #define HNS3_RX_LOW_BYTE_RATE 10000
3473 #define HNS3_RX_MID_BYTE_RATE 20000
3474 #define HNS3_RX_ULTRA_PACKET_RATE 40
3475
3476         enum hns3_flow_level_range new_flow_level;
3477         struct hns3_enet_tqp_vector *tqp_vector;
3478         int packets_per_msecs, bytes_per_msecs;
3479         u32 time_passed_ms;
3480
3481         tqp_vector = ring_group->ring->tqp_vector;
3482         time_passed_ms =
3483                 jiffies_to_msecs(jiffies - tqp_vector->last_jiffies);
3484         if (!time_passed_ms)
3485                 return false;
3486
3487         do_div(ring_group->total_packets, time_passed_ms);
3488         packets_per_msecs = ring_group->total_packets;
3489
3490         do_div(ring_group->total_bytes, time_passed_ms);
3491         bytes_per_msecs = ring_group->total_bytes;
3492
3493         new_flow_level = ring_group->coal.flow_level;
3494
3495         /* Simple throttlerate management
3496          * 0-10MB/s   lower     (50000 ints/s)
3497          * 10-20MB/s   middle    (20000 ints/s)
3498          * 20-1249MB/s high      (18000 ints/s)
3499          * > 40000pps  ultra     (8000 ints/s)
3500          */
3501         switch (new_flow_level) {
3502         case HNS3_FLOW_LOW:
3503                 if (bytes_per_msecs > HNS3_RX_LOW_BYTE_RATE)
3504                         new_flow_level = HNS3_FLOW_MID;
3505                 break;
3506         case HNS3_FLOW_MID:
3507                 if (bytes_per_msecs > HNS3_RX_MID_BYTE_RATE)
3508                         new_flow_level = HNS3_FLOW_HIGH;
3509                 else if (bytes_per_msecs <= HNS3_RX_LOW_BYTE_RATE)
3510                         new_flow_level = HNS3_FLOW_LOW;
3511                 break;
3512         case HNS3_FLOW_HIGH:
3513         case HNS3_FLOW_ULTRA:
3514         default:
3515                 if (bytes_per_msecs <= HNS3_RX_MID_BYTE_RATE)
3516                         new_flow_level = HNS3_FLOW_MID;
3517                 break;
3518         }
3519
3520         if (packets_per_msecs > HNS3_RX_ULTRA_PACKET_RATE &&
3521             &tqp_vector->rx_group == ring_group)
3522                 new_flow_level = HNS3_FLOW_ULTRA;
3523
3524         ring_group->total_bytes = 0;
3525         ring_group->total_packets = 0;
3526         ring_group->coal.flow_level = new_flow_level;
3527
3528         return true;
3529 }
3530
3531 static bool hns3_get_new_int_gl(struct hns3_enet_ring_group *ring_group)
3532 {
3533         struct hns3_enet_tqp_vector *tqp_vector;
3534         u16 new_int_gl;
3535
3536         if (!ring_group->ring)
3537                 return false;
3538
3539         tqp_vector = ring_group->ring->tqp_vector;
3540         if (!tqp_vector->last_jiffies)
3541                 return false;
3542
3543         if (ring_group->total_packets == 0) {
3544                 ring_group->coal.int_gl = HNS3_INT_GL_50K;
3545                 ring_group->coal.flow_level = HNS3_FLOW_LOW;
3546                 return true;
3547         }
3548
3549         if (!hns3_get_new_flow_lvl(ring_group))
3550                 return false;
3551
3552         new_int_gl = ring_group->coal.int_gl;
3553         switch (ring_group->coal.flow_level) {
3554         case HNS3_FLOW_LOW:
3555                 new_int_gl = HNS3_INT_GL_50K;
3556                 break;
3557         case HNS3_FLOW_MID:
3558                 new_int_gl = HNS3_INT_GL_20K;
3559                 break;
3560         case HNS3_FLOW_HIGH:
3561                 new_int_gl = HNS3_INT_GL_18K;
3562                 break;
3563         case HNS3_FLOW_ULTRA:
3564                 new_int_gl = HNS3_INT_GL_8K;
3565                 break;
3566         default:
3567                 break;
3568         }
3569
3570         if (new_int_gl != ring_group->coal.int_gl) {
3571                 ring_group->coal.int_gl = new_int_gl;
3572                 return true;
3573         }
3574         return false;
3575 }
3576
3577 static void hns3_update_new_int_gl(struct hns3_enet_tqp_vector *tqp_vector)
3578 {
3579         struct hns3_enet_ring_group *rx_group = &tqp_vector->rx_group;
3580         struct hns3_enet_ring_group *tx_group = &tqp_vector->tx_group;
3581         bool rx_update, tx_update;
3582
3583         /* update param every 1000ms */
3584         if (time_before(jiffies,
3585                         tqp_vector->last_jiffies + msecs_to_jiffies(1000)))
3586                 return;
3587
3588         if (rx_group->coal.adapt_enable) {
3589                 rx_update = hns3_get_new_int_gl(rx_group);
3590                 if (rx_update)
3591                         hns3_set_vector_coalesce_rx_gl(tqp_vector,
3592                                                        rx_group->coal.int_gl);
3593         }
3594
3595         if (tx_group->coal.adapt_enable) {
3596                 tx_update = hns3_get_new_int_gl(tx_group);
3597                 if (tx_update)
3598                         hns3_set_vector_coalesce_tx_gl(tqp_vector,
3599                                                        tx_group->coal.int_gl);
3600         }
3601
3602         tqp_vector->last_jiffies = jiffies;
3603 }
3604
3605 static int hns3_nic_common_poll(struct napi_struct *napi, int budget)
3606 {
3607         struct hns3_nic_priv *priv = netdev_priv(napi->dev);
3608         struct hns3_enet_ring *ring;
3609         int rx_pkt_total = 0;
3610
3611         struct hns3_enet_tqp_vector *tqp_vector =
3612                 container_of(napi, struct hns3_enet_tqp_vector, napi);
3613         bool clean_complete = true;
3614         int rx_budget = budget;
3615
3616         if (unlikely(test_bit(HNS3_NIC_STATE_DOWN, &priv->state))) {
3617                 napi_complete(napi);
3618                 return 0;
3619         }
3620
3621         /* Since the actual Tx work is minimal, we can give the Tx a larger
3622          * budget and be more aggressive about cleaning up the Tx descriptors.
3623          */
3624         hns3_for_each_ring(ring, tqp_vector->tx_group)
3625                 hns3_clean_tx_ring(ring, budget);
3626
3627         /* make sure rx ring budget not smaller than 1 */
3628         if (tqp_vector->num_tqps > 1)
3629                 rx_budget = max(budget / tqp_vector->num_tqps, 1);
3630
3631         hns3_for_each_ring(ring, tqp_vector->rx_group) {
3632                 int rx_cleaned = hns3_clean_rx_ring(ring, rx_budget,
3633                                                     hns3_rx_skb);
3634                 if (rx_cleaned >= rx_budget)
3635                         clean_complete = false;
3636
3637                 rx_pkt_total += rx_cleaned;
3638         }
3639
3640         tqp_vector->rx_group.total_packets += rx_pkt_total;
3641
3642         if (!clean_complete)
3643                 return budget;
3644
3645         if (napi_complete(napi) &&
3646             likely(!test_bit(HNS3_NIC_STATE_DOWN, &priv->state))) {
3647                 hns3_update_new_int_gl(tqp_vector);
3648                 hns3_mask_vector_irq(tqp_vector, 1);
3649         }
3650
3651         return rx_pkt_total;
3652 }
3653
3654 static int hns3_get_vector_ring_chain(struct hns3_enet_tqp_vector *tqp_vector,
3655                                       struct hnae3_ring_chain_node *head)
3656 {
3657         struct pci_dev *pdev = tqp_vector->handle->pdev;
3658         struct hnae3_ring_chain_node *cur_chain = head;
3659         struct hnae3_ring_chain_node *chain;
3660         struct hns3_enet_ring *tx_ring;
3661         struct hns3_enet_ring *rx_ring;
3662
3663         tx_ring = tqp_vector->tx_group.ring;
3664         if (tx_ring) {
3665                 cur_chain->tqp_index = tx_ring->tqp->tqp_index;
3666                 hnae3_set_bit(cur_chain->flag, HNAE3_RING_TYPE_B,
3667                               HNAE3_RING_TYPE_TX);
3668                 hnae3_set_field(cur_chain->int_gl_idx, HNAE3_RING_GL_IDX_M,
3669                                 HNAE3_RING_GL_IDX_S, HNAE3_RING_GL_TX);
3670
3671                 cur_chain->next = NULL;
3672
3673                 while (tx_ring->next) {
3674                         tx_ring = tx_ring->next;
3675
3676                         chain = devm_kzalloc(&pdev->dev, sizeof(*chain),
3677                                              GFP_KERNEL);
3678                         if (!chain)
3679                                 goto err_free_chain;
3680
3681                         cur_chain->next = chain;
3682                         chain->tqp_index = tx_ring->tqp->tqp_index;
3683                         hnae3_set_bit(chain->flag, HNAE3_RING_TYPE_B,
3684                                       HNAE3_RING_TYPE_TX);
3685                         hnae3_set_field(chain->int_gl_idx,
3686                                         HNAE3_RING_GL_IDX_M,
3687                                         HNAE3_RING_GL_IDX_S,
3688                                         HNAE3_RING_GL_TX);
3689
3690                         cur_chain = chain;
3691                 }
3692         }
3693
3694         rx_ring = tqp_vector->rx_group.ring;
3695         if (!tx_ring && rx_ring) {
3696                 cur_chain->next = NULL;
3697                 cur_chain->tqp_index = rx_ring->tqp->tqp_index;
3698                 hnae3_set_bit(cur_chain->flag, HNAE3_RING_TYPE_B,
3699                               HNAE3_RING_TYPE_RX);
3700                 hnae3_set_field(cur_chain->int_gl_idx, HNAE3_RING_GL_IDX_M,
3701                                 HNAE3_RING_GL_IDX_S, HNAE3_RING_GL_RX);
3702
3703                 rx_ring = rx_ring->next;
3704         }
3705
3706         while (rx_ring) {
3707                 chain = devm_kzalloc(&pdev->dev, sizeof(*chain), GFP_KERNEL);
3708                 if (!chain)
3709                         goto err_free_chain;
3710
3711                 cur_chain->next = chain;
3712                 chain->tqp_index = rx_ring->tqp->tqp_index;
3713                 hnae3_set_bit(chain->flag, HNAE3_RING_TYPE_B,
3714                               HNAE3_RING_TYPE_RX);
3715                 hnae3_set_field(chain->int_gl_idx, HNAE3_RING_GL_IDX_M,
3716                                 HNAE3_RING_GL_IDX_S, HNAE3_RING_GL_RX);
3717
3718                 cur_chain = chain;
3719
3720                 rx_ring = rx_ring->next;
3721         }
3722
3723         return 0;
3724
3725 err_free_chain:
3726         cur_chain = head->next;
3727         while (cur_chain) {
3728                 chain = cur_chain->next;
3729                 devm_kfree(&pdev->dev, cur_chain);
3730                 cur_chain = chain;
3731         }
3732         head->next = NULL;
3733
3734         return -ENOMEM;
3735 }
3736
3737 static void hns3_free_vector_ring_chain(struct hns3_enet_tqp_vector *tqp_vector,
3738                                         struct hnae3_ring_chain_node *head)
3739 {
3740         struct pci_dev *pdev = tqp_vector->handle->pdev;
3741         struct hnae3_ring_chain_node *chain_tmp, *chain;
3742
3743         chain = head->next;
3744
3745         while (chain) {
3746                 chain_tmp = chain->next;
3747                 devm_kfree(&pdev->dev, chain);
3748                 chain = chain_tmp;
3749         }
3750 }
3751
3752 static void hns3_add_ring_to_group(struct hns3_enet_ring_group *group,
3753                                    struct hns3_enet_ring *ring)
3754 {
3755         ring->next = group->ring;
3756         group->ring = ring;
3757
3758         group->count++;
3759 }
3760
3761 static void hns3_nic_set_cpumask(struct hns3_nic_priv *priv)
3762 {
3763         struct pci_dev *pdev = priv->ae_handle->pdev;
3764         struct hns3_enet_tqp_vector *tqp_vector;
3765         int num_vectors = priv->vector_num;
3766         int numa_node;
3767         int vector_i;
3768
3769         numa_node = dev_to_node(&pdev->dev);
3770
3771         for (vector_i = 0; vector_i < num_vectors; vector_i++) {
3772                 tqp_vector = &priv->tqp_vector[vector_i];
3773                 cpumask_set_cpu(cpumask_local_spread(vector_i, numa_node),
3774                                 &tqp_vector->affinity_mask);
3775         }
3776 }
3777
3778 static int hns3_nic_init_vector_data(struct hns3_nic_priv *priv)
3779 {
3780         struct hnae3_handle *h = priv->ae_handle;
3781         struct hns3_enet_tqp_vector *tqp_vector;
3782         int ret;
3783         int i;
3784
3785         hns3_nic_set_cpumask(priv);
3786
3787         for (i = 0; i < priv->vector_num; i++) {
3788                 tqp_vector = &priv->tqp_vector[i];
3789                 hns3_vector_coalesce_init_hw(tqp_vector, priv);
3790                 tqp_vector->num_tqps = 0;
3791         }
3792
3793         for (i = 0; i < h->kinfo.num_tqps; i++) {
3794                 u16 vector_i = i % priv->vector_num;
3795                 u16 tqp_num = h->kinfo.num_tqps;
3796
3797                 tqp_vector = &priv->tqp_vector[vector_i];
3798
3799                 hns3_add_ring_to_group(&tqp_vector->tx_group,
3800                                        &priv->ring[i]);
3801
3802                 hns3_add_ring_to_group(&tqp_vector->rx_group,
3803                                        &priv->ring[i + tqp_num]);
3804
3805                 priv->ring[i].tqp_vector = tqp_vector;
3806                 priv->ring[i + tqp_num].tqp_vector = tqp_vector;
3807                 tqp_vector->num_tqps++;
3808         }
3809
3810         for (i = 0; i < priv->vector_num; i++) {
3811                 struct hnae3_ring_chain_node vector_ring_chain;
3812
3813                 tqp_vector = &priv->tqp_vector[i];
3814
3815                 tqp_vector->rx_group.total_bytes = 0;
3816                 tqp_vector->rx_group.total_packets = 0;
3817                 tqp_vector->tx_group.total_bytes = 0;
3818                 tqp_vector->tx_group.total_packets = 0;
3819                 tqp_vector->handle = h;
3820
3821                 ret = hns3_get_vector_ring_chain(tqp_vector,
3822                                                  &vector_ring_chain);
3823                 if (ret)
3824                         goto map_ring_fail;
3825
3826                 ret = h->ae_algo->ops->map_ring_to_vector(h,
3827                         tqp_vector->vector_irq, &vector_ring_chain);
3828
3829                 hns3_free_vector_ring_chain(tqp_vector, &vector_ring_chain);
3830
3831                 if (ret)
3832                         goto map_ring_fail;
3833
3834                 netif_napi_add(priv->netdev, &tqp_vector->napi,
3835                                hns3_nic_common_poll, NAPI_POLL_WEIGHT);
3836         }
3837
3838         return 0;
3839
3840 map_ring_fail:
3841         while (i--)
3842                 netif_napi_del(&priv->tqp_vector[i].napi);
3843
3844         return ret;
3845 }
3846
3847 static int hns3_nic_alloc_vector_data(struct hns3_nic_priv *priv)
3848 {
3849         struct hnae3_handle *h = priv->ae_handle;
3850         struct hns3_enet_tqp_vector *tqp_vector;
3851         struct hnae3_vector_info *vector;
3852         struct pci_dev *pdev = h->pdev;
3853         u16 tqp_num = h->kinfo.num_tqps;
3854         u16 vector_num;
3855         int ret = 0;
3856         u16 i;
3857
3858         /* RSS size, cpu online and vector_num should be the same */
3859         /* Should consider 2p/4p later */
3860         vector_num = min_t(u16, num_online_cpus(), tqp_num);
3861
3862         vector = devm_kcalloc(&pdev->dev, vector_num, sizeof(*vector),
3863                               GFP_KERNEL);
3864         if (!vector)
3865                 return -ENOMEM;
3866
3867         /* save the actual available vector number */
3868         vector_num = h->ae_algo->ops->get_vector(h, vector_num, vector);
3869
3870         priv->vector_num = vector_num;
3871         priv->tqp_vector = (struct hns3_enet_tqp_vector *)
3872                 devm_kcalloc(&pdev->dev, vector_num, sizeof(*priv->tqp_vector),
3873                              GFP_KERNEL);
3874         if (!priv->tqp_vector) {
3875                 ret = -ENOMEM;
3876                 goto out;
3877         }
3878
3879         for (i = 0; i < priv->vector_num; i++) {
3880                 tqp_vector = &priv->tqp_vector[i];
3881                 tqp_vector->idx = i;
3882                 tqp_vector->mask_addr = vector[i].io_addr;
3883                 tqp_vector->vector_irq = vector[i].vector;
3884                 hns3_vector_coalesce_init(tqp_vector, priv);
3885         }
3886
3887 out:
3888         devm_kfree(&pdev->dev, vector);
3889         return ret;
3890 }
3891
3892 static void hns3_clear_ring_group(struct hns3_enet_ring_group *group)
3893 {
3894         group->ring = NULL;
3895         group->count = 0;
3896 }
3897
3898 static void hns3_nic_uninit_vector_data(struct hns3_nic_priv *priv)
3899 {
3900         struct hnae3_ring_chain_node vector_ring_chain;
3901         struct hnae3_handle *h = priv->ae_handle;
3902         struct hns3_enet_tqp_vector *tqp_vector;
3903         int i;
3904
3905         for (i = 0; i < priv->vector_num; i++) {
3906                 tqp_vector = &priv->tqp_vector[i];
3907
3908                 if (!tqp_vector->rx_group.ring && !tqp_vector->tx_group.ring)
3909                         continue;
3910
3911                 /* Since the mapping can be overwritten, when fail to get the
3912                  * chain between vector and ring, we should go on to deal with
3913                  * the remaining options.
3914                  */
3915                 if (hns3_get_vector_ring_chain(tqp_vector, &vector_ring_chain))
3916                         dev_warn(priv->dev, "failed to get ring chain\n");
3917
3918                 h->ae_algo->ops->unmap_ring_from_vector(h,
3919                         tqp_vector->vector_irq, &vector_ring_chain);
3920
3921                 hns3_free_vector_ring_chain(tqp_vector, &vector_ring_chain);
3922
3923                 hns3_clear_ring_group(&tqp_vector->rx_group);
3924                 hns3_clear_ring_group(&tqp_vector->tx_group);
3925                 netif_napi_del(&priv->tqp_vector[i].napi);
3926         }
3927 }
3928
3929 static void hns3_nic_dealloc_vector_data(struct hns3_nic_priv *priv)
3930 {
3931         struct hnae3_handle *h = priv->ae_handle;
3932         struct pci_dev *pdev = h->pdev;
3933         int i, ret;
3934
3935         for (i = 0; i < priv->vector_num; i++) {
3936                 struct hns3_enet_tqp_vector *tqp_vector;
3937
3938                 tqp_vector = &priv->tqp_vector[i];
3939                 ret = h->ae_algo->ops->put_vector(h, tqp_vector->vector_irq);
3940                 if (ret)
3941                         return;
3942         }
3943
3944         devm_kfree(&pdev->dev, priv->tqp_vector);
3945 }
3946
3947 static void hns3_ring_get_cfg(struct hnae3_queue *q, struct hns3_nic_priv *priv,
3948                               unsigned int ring_type)
3949 {
3950         int queue_num = priv->ae_handle->kinfo.num_tqps;
3951         struct hns3_enet_ring *ring;
3952         int desc_num;
3953
3954         if (ring_type == HNAE3_RING_TYPE_TX) {
3955                 ring = &priv->ring[q->tqp_index];
3956                 desc_num = priv->ae_handle->kinfo.num_tx_desc;
3957                 ring->queue_index = q->tqp_index;
3958         } else {
3959                 ring = &priv->ring[q->tqp_index + queue_num];
3960                 desc_num = priv->ae_handle->kinfo.num_rx_desc;
3961                 ring->queue_index = q->tqp_index;
3962         }
3963
3964         hnae3_set_bit(ring->flag, HNAE3_RING_TYPE_B, ring_type);
3965
3966         ring->tqp = q;
3967         ring->desc = NULL;
3968         ring->desc_cb = NULL;
3969         ring->dev = priv->dev;
3970         ring->desc_dma_addr = 0;
3971         ring->buf_size = q->buf_size;
3972         ring->desc_num = desc_num;
3973         ring->next_to_use = 0;
3974         ring->next_to_clean = 0;
3975         ring->last_to_use = 0;
3976 }
3977
3978 static void hns3_queue_to_ring(struct hnae3_queue *tqp,
3979                                struct hns3_nic_priv *priv)
3980 {
3981         hns3_ring_get_cfg(tqp, priv, HNAE3_RING_TYPE_TX);
3982         hns3_ring_get_cfg(tqp, priv, HNAE3_RING_TYPE_RX);
3983 }
3984
3985 static int hns3_get_ring_config(struct hns3_nic_priv *priv)
3986 {
3987         struct hnae3_handle *h = priv->ae_handle;
3988         struct pci_dev *pdev = h->pdev;
3989         int i;
3990
3991         priv->ring = devm_kzalloc(&pdev->dev,
3992                                   array3_size(h->kinfo.num_tqps,
3993                                               sizeof(*priv->ring), 2),
3994                                   GFP_KERNEL);
3995         if (!priv->ring)
3996                 return -ENOMEM;
3997
3998         for (i = 0; i < h->kinfo.num_tqps; i++)
3999                 hns3_queue_to_ring(h->kinfo.tqp[i], priv);
4000
4001         return 0;
4002 }
4003
4004 static void hns3_put_ring_config(struct hns3_nic_priv *priv)
4005 {
4006         if (!priv->ring)
4007                 return;
4008
4009         devm_kfree(priv->dev, priv->ring);
4010         priv->ring = NULL;
4011 }
4012
4013 static int hns3_alloc_ring_memory(struct hns3_enet_ring *ring)
4014 {
4015         int ret;
4016
4017         if (ring->desc_num <= 0 || ring->buf_size <= 0)
4018                 return -EINVAL;
4019
4020         ring->desc_cb = devm_kcalloc(ring_to_dev(ring), ring->desc_num,
4021                                      sizeof(ring->desc_cb[0]), GFP_KERNEL);
4022         if (!ring->desc_cb) {
4023                 ret = -ENOMEM;
4024                 goto out;
4025         }
4026
4027         ret = hns3_alloc_desc(ring);
4028         if (ret)
4029                 goto out_with_desc_cb;
4030
4031         if (!HNAE3_IS_TX_RING(ring)) {
4032                 ret = hns3_alloc_ring_buffers(ring);
4033                 if (ret)
4034                         goto out_with_desc;
4035         }
4036
4037         return 0;
4038
4039 out_with_desc:
4040         hns3_free_desc(ring);
4041 out_with_desc_cb:
4042         devm_kfree(ring_to_dev(ring), ring->desc_cb);
4043         ring->desc_cb = NULL;
4044 out:
4045         return ret;
4046 }
4047
4048 void hns3_fini_ring(struct hns3_enet_ring *ring)
4049 {
4050         hns3_free_desc(ring);
4051         devm_kfree(ring_to_dev(ring), ring->desc_cb);
4052         ring->desc_cb = NULL;
4053         ring->next_to_clean = 0;
4054         ring->next_to_use = 0;
4055         ring->last_to_use = 0;
4056         ring->pending_buf = 0;
4057         if (ring->skb) {
4058                 dev_kfree_skb_any(ring->skb);
4059                 ring->skb = NULL;
4060         }
4061 }
4062
4063 static int hns3_buf_size2type(u32 buf_size)
4064 {
4065         int bd_size_type;
4066
4067         switch (buf_size) {
4068         case 512:
4069                 bd_size_type = HNS3_BD_SIZE_512_TYPE;
4070                 break;
4071         case 1024:
4072                 bd_size_type = HNS3_BD_SIZE_1024_TYPE;
4073                 break;
4074         case 2048:
4075                 bd_size_type = HNS3_BD_SIZE_2048_TYPE;
4076                 break;
4077         case 4096:
4078                 bd_size_type = HNS3_BD_SIZE_4096_TYPE;
4079                 break;
4080         default:
4081                 bd_size_type = HNS3_BD_SIZE_2048_TYPE;
4082         }
4083
4084         return bd_size_type;
4085 }
4086
4087 static void hns3_init_ring_hw(struct hns3_enet_ring *ring)
4088 {
4089         dma_addr_t dma = ring->desc_dma_addr;
4090         struct hnae3_queue *q = ring->tqp;
4091
4092         if (!HNAE3_IS_TX_RING(ring)) {
4093                 hns3_write_dev(q, HNS3_RING_RX_RING_BASEADDR_L_REG, (u32)dma);
4094                 hns3_write_dev(q, HNS3_RING_RX_RING_BASEADDR_H_REG,
4095                                (u32)((dma >> 31) >> 1));
4096
4097                 hns3_write_dev(q, HNS3_RING_RX_RING_BD_LEN_REG,
4098                                hns3_buf_size2type(ring->buf_size));
4099                 hns3_write_dev(q, HNS3_RING_RX_RING_BD_NUM_REG,
4100                                ring->desc_num / 8 - 1);
4101         } else {
4102                 hns3_write_dev(q, HNS3_RING_TX_RING_BASEADDR_L_REG,
4103                                (u32)dma);
4104                 hns3_write_dev(q, HNS3_RING_TX_RING_BASEADDR_H_REG,
4105                                (u32)((dma >> 31) >> 1));
4106
4107                 hns3_write_dev(q, HNS3_RING_TX_RING_BD_NUM_REG,
4108                                ring->desc_num / 8 - 1);
4109         }
4110 }
4111
4112 static void hns3_init_tx_ring_tc(struct hns3_nic_priv *priv)
4113 {
4114         struct hnae3_knic_private_info *kinfo = &priv->ae_handle->kinfo;
4115         struct hnae3_tc_info *tc_info = &kinfo->tc_info;
4116         int i;
4117
4118         for (i = 0; i < HNAE3_MAX_TC; i++) {
4119                 int j;
4120
4121                 if (!test_bit(i, &tc_info->tc_en))
4122                         continue;
4123
4124                 for (j = 0; j < tc_info->tqp_count[i]; j++) {
4125                         struct hnae3_queue *q;
4126
4127                         q = priv->ring[tc_info->tqp_offset[i] + j].tqp;
4128                         hns3_write_dev(q, HNS3_RING_TX_RING_TC_REG, i);
4129                 }
4130         }
4131 }
4132
4133 int hns3_init_all_ring(struct hns3_nic_priv *priv)
4134 {
4135         struct hnae3_handle *h = priv->ae_handle;
4136         int ring_num = h->kinfo.num_tqps * 2;
4137         int i, j;
4138         int ret;
4139
4140         for (i = 0; i < ring_num; i++) {
4141                 ret = hns3_alloc_ring_memory(&priv->ring[i]);
4142                 if (ret) {
4143                         dev_err(priv->dev,
4144                                 "Alloc ring memory fail! ret=%d\n", ret);
4145                         goto out_when_alloc_ring_memory;
4146                 }
4147
4148                 u64_stats_init(&priv->ring[i].syncp);
4149         }
4150
4151         return 0;
4152
4153 out_when_alloc_ring_memory:
4154         for (j = i - 1; j >= 0; j--)
4155                 hns3_fini_ring(&priv->ring[j]);
4156
4157         return -ENOMEM;
4158 }
4159
4160 static void hns3_uninit_all_ring(struct hns3_nic_priv *priv)
4161 {
4162         struct hnae3_handle *h = priv->ae_handle;
4163         int i;
4164
4165         for (i = 0; i < h->kinfo.num_tqps; i++) {
4166                 hns3_fini_ring(&priv->ring[i]);
4167                 hns3_fini_ring(&priv->ring[i + h->kinfo.num_tqps]);
4168         }
4169 }
4170
4171 /* Set mac addr if it is configured. or leave it to the AE driver */
4172 static int hns3_init_mac_addr(struct net_device *netdev)
4173 {
4174         struct hns3_nic_priv *priv = netdev_priv(netdev);
4175         struct hnae3_handle *h = priv->ae_handle;
4176         u8 mac_addr_temp[ETH_ALEN];
4177         int ret = 0;
4178
4179         if (h->ae_algo->ops->get_mac_addr)
4180                 h->ae_algo->ops->get_mac_addr(h, mac_addr_temp);
4181
4182         /* Check if the MAC address is valid, if not get a random one */
4183         if (!is_valid_ether_addr(mac_addr_temp)) {
4184                 eth_hw_addr_random(netdev);
4185                 dev_warn(priv->dev, "using random MAC address %pM\n",
4186                          netdev->dev_addr);
4187         } else if (!ether_addr_equal(netdev->dev_addr, mac_addr_temp)) {
4188                 ether_addr_copy(netdev->dev_addr, mac_addr_temp);
4189                 ether_addr_copy(netdev->perm_addr, mac_addr_temp);
4190         } else {
4191                 return 0;
4192         }
4193
4194         if (h->ae_algo->ops->set_mac_addr)
4195                 ret = h->ae_algo->ops->set_mac_addr(h, netdev->dev_addr, true);
4196
4197         return ret;
4198 }
4199
4200 static int hns3_init_phy(struct net_device *netdev)
4201 {
4202         struct hnae3_handle *h = hns3_get_handle(netdev);
4203         int ret = 0;
4204
4205         if (h->ae_algo->ops->mac_connect_phy)
4206                 ret = h->ae_algo->ops->mac_connect_phy(h);
4207
4208         return ret;
4209 }
4210
4211 static void hns3_uninit_phy(struct net_device *netdev)
4212 {
4213         struct hnae3_handle *h = hns3_get_handle(netdev);
4214
4215         if (h->ae_algo->ops->mac_disconnect_phy)
4216                 h->ae_algo->ops->mac_disconnect_phy(h);
4217 }
4218
4219 static int hns3_client_start(struct hnae3_handle *handle)
4220 {
4221         if (!handle->ae_algo->ops->client_start)
4222                 return 0;
4223
4224         return handle->ae_algo->ops->client_start(handle);
4225 }
4226
4227 static void hns3_client_stop(struct hnae3_handle *handle)
4228 {
4229         if (!handle->ae_algo->ops->client_stop)
4230                 return;
4231
4232         handle->ae_algo->ops->client_stop(handle);
4233 }
4234
4235 static void hns3_info_show(struct hns3_nic_priv *priv)
4236 {
4237         struct hnae3_knic_private_info *kinfo = &priv->ae_handle->kinfo;
4238
4239         dev_info(priv->dev, "MAC address: %pM\n", priv->netdev->dev_addr);
4240         dev_info(priv->dev, "Task queue pairs numbers: %u\n", kinfo->num_tqps);
4241         dev_info(priv->dev, "RSS size: %u\n", kinfo->rss_size);
4242         dev_info(priv->dev, "Allocated RSS size: %u\n", kinfo->req_rss_size);
4243         dev_info(priv->dev, "RX buffer length: %u\n", kinfo->rx_buf_len);
4244         dev_info(priv->dev, "Desc num per TX queue: %u\n", kinfo->num_tx_desc);
4245         dev_info(priv->dev, "Desc num per RX queue: %u\n", kinfo->num_rx_desc);
4246         dev_info(priv->dev, "Total number of enabled TCs: %u\n",
4247                  kinfo->tc_info.num_tc);
4248         dev_info(priv->dev, "Max mtu size: %u\n", priv->netdev->max_mtu);
4249 }
4250
4251 static int hns3_client_init(struct hnae3_handle *handle)
4252 {
4253         struct pci_dev *pdev = handle->pdev;
4254         struct hnae3_ae_dev *ae_dev = pci_get_drvdata(pdev);
4255         u16 alloc_tqps, max_rss_size;
4256         struct hns3_nic_priv *priv;
4257         struct net_device *netdev;
4258         int ret;
4259
4260         handle->ae_algo->ops->get_tqps_and_rss_info(handle, &alloc_tqps,
4261                                                     &max_rss_size);
4262         netdev = alloc_etherdev_mq(sizeof(struct hns3_nic_priv), alloc_tqps);
4263         if (!netdev)
4264                 return -ENOMEM;
4265
4266         priv = netdev_priv(netdev);
4267         priv->dev = &pdev->dev;
4268         priv->netdev = netdev;
4269         priv->ae_handle = handle;
4270         priv->tx_timeout_count = 0;
4271         priv->max_non_tso_bd_num = ae_dev->dev_specs.max_non_tso_bd_num;
4272         set_bit(HNS3_NIC_STATE_DOWN, &priv->state);
4273
4274         handle->msg_enable = netif_msg_init(debug, DEFAULT_MSG_LEVEL);
4275
4276         handle->kinfo.netdev = netdev;
4277         handle->priv = (void *)priv;
4278
4279         hns3_init_mac_addr(netdev);
4280
4281         hns3_set_default_feature(netdev);
4282
4283         netdev->watchdog_timeo = HNS3_TX_TIMEOUT;
4284         netdev->priv_flags |= IFF_UNICAST_FLT;
4285         netdev->netdev_ops = &hns3_nic_netdev_ops;
4286         SET_NETDEV_DEV(netdev, &pdev->dev);
4287         hns3_ethtool_set_ops(netdev);
4288
4289         /* Carrier off reporting is important to ethtool even BEFORE open */
4290         netif_carrier_off(netdev);
4291
4292         ret = hns3_get_ring_config(priv);
4293         if (ret) {
4294                 ret = -ENOMEM;
4295                 goto out_get_ring_cfg;
4296         }
4297
4298         ret = hns3_nic_alloc_vector_data(priv);
4299         if (ret) {
4300                 ret = -ENOMEM;
4301                 goto out_alloc_vector_data;
4302         }
4303
4304         ret = hns3_nic_init_vector_data(priv);
4305         if (ret) {
4306                 ret = -ENOMEM;
4307                 goto out_init_vector_data;
4308         }
4309
4310         ret = hns3_init_all_ring(priv);
4311         if (ret) {
4312                 ret = -ENOMEM;
4313                 goto out_init_ring;
4314         }
4315
4316         ret = hns3_init_phy(netdev);
4317         if (ret)
4318                 goto out_init_phy;
4319
4320         ret = register_netdev(netdev);
4321         if (ret) {
4322                 dev_err(priv->dev, "probe register netdev fail!\n");
4323                 goto out_reg_netdev_fail;
4324         }
4325
4326         /* the device can work without cpu rmap, only aRFS needs it */
4327         ret = hns3_set_rx_cpu_rmap(netdev);
4328         if (ret)
4329                 dev_warn(priv->dev, "set rx cpu rmap fail, ret=%d\n", ret);
4330
4331         ret = hns3_nic_init_irq(priv);
4332         if (ret) {
4333                 dev_err(priv->dev, "init irq failed! ret=%d\n", ret);
4334                 hns3_free_rx_cpu_rmap(netdev);
4335                 goto out_init_irq_fail;
4336         }
4337
4338         ret = hns3_client_start(handle);
4339         if (ret) {
4340                 dev_err(priv->dev, "hns3_client_start fail! ret=%d\n", ret);
4341                 goto out_client_start;
4342         }
4343
4344         hns3_dcbnl_setup(handle);
4345
4346         hns3_dbg_init(handle);
4347
4348         netdev->max_mtu = HNS3_MAX_MTU(ae_dev->dev_specs.max_frm_size);
4349
4350         if (test_bit(HNAE3_DEV_SUPPORT_HW_TX_CSUM_B, ae_dev->caps))
4351                 set_bit(HNS3_NIC_STATE_HW_TX_CSUM_ENABLE, &priv->state);
4352
4353         set_bit(HNS3_NIC_STATE_INITED, &priv->state);
4354
4355         if (ae_dev->dev_version >= HNAE3_DEVICE_VERSION_V3)
4356                 set_bit(HNAE3_PFLAG_LIMIT_PROMISC, &handle->supported_pflags);
4357
4358         if (netif_msg_drv(handle))
4359                 hns3_info_show(priv);
4360
4361         return ret;
4362
4363 out_client_start:
4364         hns3_free_rx_cpu_rmap(netdev);
4365         hns3_nic_uninit_irq(priv);
4366 out_init_irq_fail:
4367         unregister_netdev(netdev);
4368 out_reg_netdev_fail:
4369         hns3_uninit_phy(netdev);
4370 out_init_phy:
4371         hns3_uninit_all_ring(priv);
4372 out_init_ring:
4373         hns3_nic_uninit_vector_data(priv);
4374 out_init_vector_data:
4375         hns3_nic_dealloc_vector_data(priv);
4376 out_alloc_vector_data:
4377         priv->ring = NULL;
4378 out_get_ring_cfg:
4379         priv->ae_handle = NULL;
4380         free_netdev(netdev);
4381         return ret;
4382 }
4383
4384 static void hns3_client_uninit(struct hnae3_handle *handle, bool reset)
4385 {
4386         struct net_device *netdev = handle->kinfo.netdev;
4387         struct hns3_nic_priv *priv = netdev_priv(netdev);
4388
4389         if (netdev->reg_state != NETREG_UNINITIALIZED)
4390                 unregister_netdev(netdev);
4391
4392         hns3_client_stop(handle);
4393
4394         hns3_uninit_phy(netdev);
4395
4396         if (!test_and_clear_bit(HNS3_NIC_STATE_INITED, &priv->state)) {
4397                 netdev_warn(netdev, "already uninitialized\n");
4398                 goto out_netdev_free;
4399         }
4400
4401         hns3_free_rx_cpu_rmap(netdev);
4402
4403         hns3_nic_uninit_irq(priv);
4404
4405         hns3_clear_all_ring(handle, true);
4406
4407         hns3_nic_uninit_vector_data(priv);
4408
4409         hns3_nic_dealloc_vector_data(priv);
4410
4411         hns3_uninit_all_ring(priv);
4412
4413         hns3_put_ring_config(priv);
4414
4415 out_netdev_free:
4416         hns3_dbg_uninit(handle);
4417         free_netdev(netdev);
4418 }
4419
4420 static void hns3_link_status_change(struct hnae3_handle *handle, bool linkup)
4421 {
4422         struct net_device *netdev = handle->kinfo.netdev;
4423
4424         if (!netdev)
4425                 return;
4426
4427         if (linkup) {
4428                 netif_tx_wake_all_queues(netdev);
4429                 netif_carrier_on(netdev);
4430                 if (netif_msg_link(handle))
4431                         netdev_info(netdev, "link up\n");
4432         } else {
4433                 netif_carrier_off(netdev);
4434                 netif_tx_stop_all_queues(netdev);
4435                 if (netif_msg_link(handle))
4436                         netdev_info(netdev, "link down\n");
4437         }
4438 }
4439
4440 static void hns3_clear_tx_ring(struct hns3_enet_ring *ring)
4441 {
4442         while (ring->next_to_clean != ring->next_to_use) {
4443                 ring->desc[ring->next_to_clean].tx.bdtp_fe_sc_vld_ra_ri = 0;
4444                 hns3_free_buffer_detach(ring, ring->next_to_clean, 0);
4445                 ring_ptr_move_fw(ring, next_to_clean);
4446         }
4447
4448         ring->pending_buf = 0;
4449 }
4450
4451 static int hns3_clear_rx_ring(struct hns3_enet_ring *ring)
4452 {
4453         struct hns3_desc_cb res_cbs;
4454         int ret;
4455
4456         while (ring->next_to_use != ring->next_to_clean) {
4457                 /* When a buffer is not reused, it's memory has been
4458                  * freed in hns3_handle_rx_bd or will be freed by
4459                  * stack, so we need to replace the buffer here.
4460                  */
4461                 if (!ring->desc_cb[ring->next_to_use].reuse_flag) {
4462                         ret = hns3_alloc_and_map_buffer(ring, &res_cbs);
4463                         if (ret) {
4464                                 u64_stats_update_begin(&ring->syncp);
4465                                 ring->stats.sw_err_cnt++;
4466                                 u64_stats_update_end(&ring->syncp);
4467                                 /* if alloc new buffer fail, exit directly
4468                                  * and reclear in up flow.
4469                                  */
4470                                 netdev_warn(ring_to_netdev(ring),
4471                                             "reserve buffer map failed, ret = %d\n",
4472                                             ret);
4473                                 return ret;
4474                         }
4475                         hns3_replace_buffer(ring, ring->next_to_use, &res_cbs);
4476                 }
4477                 ring_ptr_move_fw(ring, next_to_use);
4478         }
4479
4480         /* Free the pending skb in rx ring */
4481         if (ring->skb) {
4482                 dev_kfree_skb_any(ring->skb);
4483                 ring->skb = NULL;
4484                 ring->pending_buf = 0;
4485         }
4486
4487         return 0;
4488 }
4489
4490 static void hns3_force_clear_rx_ring(struct hns3_enet_ring *ring)
4491 {
4492         while (ring->next_to_use != ring->next_to_clean) {
4493                 /* When a buffer is not reused, it's memory has been
4494                  * freed in hns3_handle_rx_bd or will be freed by
4495                  * stack, so only need to unmap the buffer here.
4496                  */
4497                 if (!ring->desc_cb[ring->next_to_use].reuse_flag) {
4498                         hns3_unmap_buffer(ring,
4499                                           &ring->desc_cb[ring->next_to_use]);
4500                         ring->desc_cb[ring->next_to_use].dma = 0;
4501                 }
4502
4503                 ring_ptr_move_fw(ring, next_to_use);
4504         }
4505 }
4506
4507 static void hns3_clear_all_ring(struct hnae3_handle *h, bool force)
4508 {
4509         struct net_device *ndev = h->kinfo.netdev;
4510         struct hns3_nic_priv *priv = netdev_priv(ndev);
4511         u32 i;
4512
4513         for (i = 0; i < h->kinfo.num_tqps; i++) {
4514                 struct hns3_enet_ring *ring;
4515
4516                 ring = &priv->ring[i];
4517                 hns3_clear_tx_ring(ring);
4518
4519                 ring = &priv->ring[i + h->kinfo.num_tqps];
4520                 /* Continue to clear other rings even if clearing some
4521                  * rings failed.
4522                  */
4523                 if (force)
4524                         hns3_force_clear_rx_ring(ring);
4525                 else
4526                         hns3_clear_rx_ring(ring);
4527         }
4528 }
4529
4530 int hns3_nic_reset_all_ring(struct hnae3_handle *h)
4531 {
4532         struct net_device *ndev = h->kinfo.netdev;
4533         struct hns3_nic_priv *priv = netdev_priv(ndev);
4534         struct hns3_enet_ring *rx_ring;
4535         int i, j;
4536         int ret;
4537
4538         ret = h->ae_algo->ops->reset_queue(h);
4539         if (ret)
4540                 return ret;
4541
4542         for (i = 0; i < h->kinfo.num_tqps; i++) {
4543                 hns3_init_ring_hw(&priv->ring[i]);
4544
4545                 /* We need to clear tx ring here because self test will
4546                  * use the ring and will not run down before up
4547                  */
4548                 hns3_clear_tx_ring(&priv->ring[i]);
4549                 priv->ring[i].next_to_clean = 0;
4550                 priv->ring[i].next_to_use = 0;
4551                 priv->ring[i].last_to_use = 0;
4552
4553                 rx_ring = &priv->ring[i + h->kinfo.num_tqps];
4554                 hns3_init_ring_hw(rx_ring);
4555                 ret = hns3_clear_rx_ring(rx_ring);
4556                 if (ret)
4557                         return ret;
4558
4559                 /* We can not know the hardware head and tail when this
4560                  * function is called in reset flow, so we reuse all desc.
4561                  */
4562                 for (j = 0; j < rx_ring->desc_num; j++)
4563                         hns3_reuse_buffer(rx_ring, j);
4564
4565                 rx_ring->next_to_clean = 0;
4566                 rx_ring->next_to_use = 0;
4567         }
4568
4569         hns3_init_tx_ring_tc(priv);
4570
4571         return 0;
4572 }
4573
4574 static void hns3_store_coal(struct hns3_nic_priv *priv)
4575 {
4576         /* ethtool only support setting and querying one coal
4577          * configuration for now, so save the vector 0' coal
4578          * configuration here in order to restore it.
4579          */
4580         memcpy(&priv->tx_coal, &priv->tqp_vector[0].tx_group.coal,
4581                sizeof(struct hns3_enet_coalesce));
4582         memcpy(&priv->rx_coal, &priv->tqp_vector[0].rx_group.coal,
4583                sizeof(struct hns3_enet_coalesce));
4584 }
4585
4586 static void hns3_restore_coal(struct hns3_nic_priv *priv)
4587 {
4588         u16 vector_num = priv->vector_num;
4589         int i;
4590
4591         for (i = 0; i < vector_num; i++) {
4592                 memcpy(&priv->tqp_vector[i].tx_group.coal, &priv->tx_coal,
4593                        sizeof(struct hns3_enet_coalesce));
4594                 memcpy(&priv->tqp_vector[i].rx_group.coal, &priv->rx_coal,
4595                        sizeof(struct hns3_enet_coalesce));
4596         }
4597 }
4598
4599 static int hns3_reset_notify_down_enet(struct hnae3_handle *handle)
4600 {
4601         struct hnae3_knic_private_info *kinfo = &handle->kinfo;
4602         struct net_device *ndev = kinfo->netdev;
4603         struct hns3_nic_priv *priv = netdev_priv(ndev);
4604
4605         if (test_and_set_bit(HNS3_NIC_STATE_RESETTING, &priv->state))
4606                 return 0;
4607
4608         if (!netif_running(ndev))
4609                 return 0;
4610
4611         return hns3_nic_net_stop(ndev);
4612 }
4613
4614 static int hns3_reset_notify_up_enet(struct hnae3_handle *handle)
4615 {
4616         struct hnae3_knic_private_info *kinfo = &handle->kinfo;
4617         struct hns3_nic_priv *priv = netdev_priv(kinfo->netdev);
4618         int ret = 0;
4619
4620         if (!test_bit(HNS3_NIC_STATE_INITED, &priv->state)) {
4621                 netdev_err(kinfo->netdev, "device is not initialized yet\n");
4622                 return -EFAULT;
4623         }
4624
4625         clear_bit(HNS3_NIC_STATE_RESETTING, &priv->state);
4626
4627         if (netif_running(kinfo->netdev)) {
4628                 ret = hns3_nic_net_open(kinfo->netdev);
4629                 if (ret) {
4630                         set_bit(HNS3_NIC_STATE_RESETTING, &priv->state);
4631                         netdev_err(kinfo->netdev,
4632                                    "net up fail, ret=%d!\n", ret);
4633                         return ret;
4634                 }
4635         }
4636
4637         return ret;
4638 }
4639
4640 static int hns3_reset_notify_init_enet(struct hnae3_handle *handle)
4641 {
4642         struct net_device *netdev = handle->kinfo.netdev;
4643         struct hns3_nic_priv *priv = netdev_priv(netdev);
4644         int ret;
4645
4646         /* Carrier off reporting is important to ethtool even BEFORE open */
4647         netif_carrier_off(netdev);
4648
4649         ret = hns3_get_ring_config(priv);
4650         if (ret)
4651                 return ret;
4652
4653         ret = hns3_nic_alloc_vector_data(priv);
4654         if (ret)
4655                 goto err_put_ring;
4656
4657         hns3_restore_coal(priv);
4658
4659         ret = hns3_nic_init_vector_data(priv);
4660         if (ret)
4661                 goto err_dealloc_vector;
4662
4663         ret = hns3_init_all_ring(priv);
4664         if (ret)
4665                 goto err_uninit_vector;
4666
4667         /* the device can work without cpu rmap, only aRFS needs it */
4668         ret = hns3_set_rx_cpu_rmap(netdev);
4669         if (ret)
4670                 dev_warn(priv->dev, "set rx cpu rmap fail, ret=%d\n", ret);
4671
4672         ret = hns3_nic_init_irq(priv);
4673         if (ret) {
4674                 dev_err(priv->dev, "init irq failed! ret=%d\n", ret);
4675                 hns3_free_rx_cpu_rmap(netdev);
4676                 goto err_init_irq_fail;
4677         }
4678
4679         if (!hns3_is_phys_func(handle->pdev))
4680                 hns3_init_mac_addr(netdev);
4681
4682         ret = hns3_client_start(handle);
4683         if (ret) {
4684                 dev_err(priv->dev, "hns3_client_start fail! ret=%d\n", ret);
4685                 goto err_client_start_fail;
4686         }
4687
4688         set_bit(HNS3_NIC_STATE_INITED, &priv->state);
4689
4690         return ret;
4691
4692 err_client_start_fail:
4693         hns3_free_rx_cpu_rmap(netdev);
4694         hns3_nic_uninit_irq(priv);
4695 err_init_irq_fail:
4696         hns3_uninit_all_ring(priv);
4697 err_uninit_vector:
4698         hns3_nic_uninit_vector_data(priv);
4699 err_dealloc_vector:
4700         hns3_nic_dealloc_vector_data(priv);
4701 err_put_ring:
4702         hns3_put_ring_config(priv);
4703
4704         return ret;
4705 }
4706
4707 static int hns3_reset_notify_uninit_enet(struct hnae3_handle *handle)
4708 {
4709         struct net_device *netdev = handle->kinfo.netdev;
4710         struct hns3_nic_priv *priv = netdev_priv(netdev);
4711
4712         if (!test_and_clear_bit(HNS3_NIC_STATE_INITED, &priv->state)) {
4713                 netdev_warn(netdev, "already uninitialized\n");
4714                 return 0;
4715         }
4716
4717         hns3_free_rx_cpu_rmap(netdev);
4718         hns3_nic_uninit_irq(priv);
4719         hns3_clear_all_ring(handle, true);
4720         hns3_reset_tx_queue(priv->ae_handle);
4721
4722         hns3_nic_uninit_vector_data(priv);
4723
4724         hns3_store_coal(priv);
4725
4726         hns3_nic_dealloc_vector_data(priv);
4727
4728         hns3_uninit_all_ring(priv);
4729
4730         hns3_put_ring_config(priv);
4731
4732         return 0;
4733 }
4734
4735 static int hns3_reset_notify(struct hnae3_handle *handle,
4736                              enum hnae3_reset_notify_type type)
4737 {
4738         int ret = 0;
4739
4740         switch (type) {
4741         case HNAE3_UP_CLIENT:
4742                 ret = hns3_reset_notify_up_enet(handle);
4743                 break;
4744         case HNAE3_DOWN_CLIENT:
4745                 ret = hns3_reset_notify_down_enet(handle);
4746                 break;
4747         case HNAE3_INIT_CLIENT:
4748                 ret = hns3_reset_notify_init_enet(handle);
4749                 break;
4750         case HNAE3_UNINIT_CLIENT:
4751                 ret = hns3_reset_notify_uninit_enet(handle);
4752                 break;
4753         default:
4754                 break;
4755         }
4756
4757         return ret;
4758 }
4759
4760 static int hns3_change_channels(struct hnae3_handle *handle, u32 new_tqp_num,
4761                                 bool rxfh_configured)
4762 {
4763         int ret;
4764
4765         ret = handle->ae_algo->ops->set_channels(handle, new_tqp_num,
4766                                                  rxfh_configured);
4767         if (ret) {
4768                 dev_err(&handle->pdev->dev,
4769                         "Change tqp num(%u) fail.\n", new_tqp_num);
4770                 return ret;
4771         }
4772
4773         ret = hns3_reset_notify(handle, HNAE3_INIT_CLIENT);
4774         if (ret)
4775                 return ret;
4776
4777         ret =  hns3_reset_notify(handle, HNAE3_UP_CLIENT);
4778         if (ret)
4779                 hns3_reset_notify(handle, HNAE3_UNINIT_CLIENT);
4780
4781         return ret;
4782 }
4783
4784 int hns3_set_channels(struct net_device *netdev,
4785                       struct ethtool_channels *ch)
4786 {
4787         struct hnae3_handle *h = hns3_get_handle(netdev);
4788         struct hnae3_knic_private_info *kinfo = &h->kinfo;
4789         bool rxfh_configured = netif_is_rxfh_configured(netdev);
4790         u32 new_tqp_num = ch->combined_count;
4791         u16 org_tqp_num;
4792         int ret;
4793
4794         if (hns3_nic_resetting(netdev))
4795                 return -EBUSY;
4796
4797         if (ch->rx_count || ch->tx_count)
4798                 return -EINVAL;
4799
4800         if (kinfo->tc_info.mqprio_active) {
4801                 dev_err(&netdev->dev,
4802                         "it's not allowed to set channels via ethtool when MQPRIO mode is on\n");
4803                 return -EINVAL;
4804         }
4805
4806         if (new_tqp_num > hns3_get_max_available_channels(h) ||
4807             new_tqp_num < 1) {
4808                 dev_err(&netdev->dev,
4809                         "Change tqps fail, the tqp range is from 1 to %u",
4810                         hns3_get_max_available_channels(h));
4811                 return -EINVAL;
4812         }
4813
4814         if (kinfo->rss_size == new_tqp_num)
4815                 return 0;
4816
4817         netif_dbg(h, drv, netdev,
4818                   "set channels: tqp_num=%u, rxfh=%d\n",
4819                   new_tqp_num, rxfh_configured);
4820
4821         ret = hns3_reset_notify(h, HNAE3_DOWN_CLIENT);
4822         if (ret)
4823                 return ret;
4824
4825         ret = hns3_reset_notify(h, HNAE3_UNINIT_CLIENT);
4826         if (ret)
4827                 return ret;
4828
4829         org_tqp_num = h->kinfo.num_tqps;
4830         ret = hns3_change_channels(h, new_tqp_num, rxfh_configured);
4831         if (ret) {
4832                 int ret1;
4833
4834                 netdev_warn(netdev,
4835                             "Change channels fail, revert to old value\n");
4836                 ret1 = hns3_change_channels(h, org_tqp_num, rxfh_configured);
4837                 if (ret1) {
4838                         netdev_err(netdev,
4839                                    "revert to old channel fail\n");
4840                         return ret1;
4841                 }
4842
4843                 return ret;
4844         }
4845
4846         return 0;
4847 }
4848
4849 static const struct hns3_hw_error_info hns3_hw_err[] = {
4850         { .type = HNAE3_PPU_POISON_ERROR,
4851           .msg = "PPU poison" },
4852         { .type = HNAE3_CMDQ_ECC_ERROR,
4853           .msg = "IMP CMDQ error" },
4854         { .type = HNAE3_IMP_RD_POISON_ERROR,
4855           .msg = "IMP RD poison" },
4856         { .type = HNAE3_ROCEE_AXI_RESP_ERROR,
4857           .msg = "ROCEE AXI RESP error" },
4858 };
4859
4860 static void hns3_process_hw_error(struct hnae3_handle *handle,
4861                                   enum hnae3_hw_error_type type)
4862 {
4863         int i;
4864
4865         for (i = 0; i < ARRAY_SIZE(hns3_hw_err); i++) {
4866                 if (hns3_hw_err[i].type == type) {
4867                         dev_err(&handle->pdev->dev, "Detected %s!\n",
4868                                 hns3_hw_err[i].msg);
4869                         break;
4870                 }
4871         }
4872 }
4873
4874 static const struct hnae3_client_ops client_ops = {
4875         .init_instance = hns3_client_init,
4876         .uninit_instance = hns3_client_uninit,
4877         .link_status_change = hns3_link_status_change,
4878         .reset_notify = hns3_reset_notify,
4879         .process_hw_error = hns3_process_hw_error,
4880 };
4881
4882 /* hns3_init_module - Driver registration routine
4883  * hns3_init_module is the first routine called when the driver is
4884  * loaded. All it does is register with the PCI subsystem.
4885  */
4886 static int __init hns3_init_module(void)
4887 {
4888         int ret;
4889
4890         pr_info("%s: %s - version\n", hns3_driver_name, hns3_driver_string);
4891         pr_info("%s: %s\n", hns3_driver_name, hns3_copyright);
4892
4893         client.type = HNAE3_CLIENT_KNIC;
4894         snprintf(client.name, HNAE3_CLIENT_NAME_LENGTH, "%s",
4895                  hns3_driver_name);
4896
4897         client.ops = &client_ops;
4898
4899         INIT_LIST_HEAD(&client.node);
4900
4901         hns3_dbg_register_debugfs(hns3_driver_name);
4902
4903         ret = hnae3_register_client(&client);
4904         if (ret)
4905                 goto err_reg_client;
4906
4907         ret = pci_register_driver(&hns3_driver);
4908         if (ret)
4909                 goto err_reg_driver;
4910
4911         return ret;
4912
4913 err_reg_driver:
4914         hnae3_unregister_client(&client);
4915 err_reg_client:
4916         hns3_dbg_unregister_debugfs();
4917         return ret;
4918 }
4919 module_init(hns3_init_module);
4920
4921 /* hns3_exit_module - Driver exit cleanup routine
4922  * hns3_exit_module is called just before the driver is removed
4923  * from memory.
4924  */
4925 static void __exit hns3_exit_module(void)
4926 {
4927         pci_unregister_driver(&hns3_driver);
4928         hnae3_unregister_client(&client);
4929         hns3_dbg_unregister_debugfs();
4930 }
4931 module_exit(hns3_exit_module);
4932
4933 MODULE_DESCRIPTION("HNS3: Hisilicon Ethernet Driver");
4934 MODULE_AUTHOR("Huawei Tech. Co., Ltd.");
4935 MODULE_LICENSE("GPL");
4936 MODULE_ALIAS("pci:hns-nic");