1 /*******************************************************************************
3 * Intel Ethernet Controller XL710 Family Linux Driver
4 * Copyright(c) 2013 - 2014 Intel Corporation.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * You should have received a copy of the GNU General Public License along
16 * with this program. If not, see <http://www.gnu.org/licenses/>.
18 * The full GNU General Public License is included in this distribution in
19 * the file called "COPYING".
21 * Contact Information:
22 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25 ******************************************************************************/
29 #include "i40e_diag.h"
30 #ifdef CONFIG_I40E_VXLAN
31 #include <net/vxlan.h>
34 const char i40e_driver_name[] = "i40e";
35 static const char i40e_driver_string[] =
36 "Intel(R) Ethernet Connection XL710 Network Driver";
40 #define DRV_VERSION_MAJOR 0
41 #define DRV_VERSION_MINOR 4
42 #define DRV_VERSION_BUILD 17
43 #define DRV_VERSION __stringify(DRV_VERSION_MAJOR) "." \
44 __stringify(DRV_VERSION_MINOR) "." \
45 __stringify(DRV_VERSION_BUILD) DRV_KERN
46 const char i40e_driver_version_str[] = DRV_VERSION;
47 static const char i40e_copyright[] = "Copyright (c) 2013 - 2014 Intel Corporation.";
49 /* a bit of forward declarations */
50 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi);
51 static void i40e_handle_reset_warning(struct i40e_pf *pf);
52 static int i40e_add_vsi(struct i40e_vsi *vsi);
53 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi);
54 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit);
55 static int i40e_setup_misc_vector(struct i40e_pf *pf);
56 static void i40e_determine_queue_usage(struct i40e_pf *pf);
57 static int i40e_setup_pf_filter_control(struct i40e_pf *pf);
58 static void i40e_fdir_sb_setup(struct i40e_pf *pf);
59 static int i40e_veb_get_bw_info(struct i40e_veb *veb);
61 /* i40e_pci_tbl - PCI Device ID Table
63 * Last entry must be all 0s
65 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
66 * Class, Class Mask, private data (not used) }
68 static DEFINE_PCI_DEVICE_TABLE(i40e_pci_tbl) = {
69 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_XL710), 0},
70 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QEMU), 0},
71 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_A), 0},
72 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_B), 0},
73 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_C), 0},
74 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_A), 0},
75 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_B), 0},
76 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_C), 0},
77 /* required last entry */
80 MODULE_DEVICE_TABLE(pci, i40e_pci_tbl);
82 #define I40E_MAX_VF_COUNT 128
83 static int debug = -1;
84 module_param(debug, int, 0);
85 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
87 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
88 MODULE_DESCRIPTION("Intel(R) Ethernet Connection XL710 Network Driver");
89 MODULE_LICENSE("GPL");
90 MODULE_VERSION(DRV_VERSION);
93 * i40e_allocate_dma_mem_d - OS specific memory alloc for shared code
94 * @hw: pointer to the HW structure
95 * @mem: ptr to mem struct to fill out
96 * @size: size of memory requested
97 * @alignment: what to align the allocation to
99 int i40e_allocate_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem,
100 u64 size, u32 alignment)
102 struct i40e_pf *pf = (struct i40e_pf *)hw->back;
104 mem->size = ALIGN(size, alignment);
105 mem->va = dma_zalloc_coherent(&pf->pdev->dev, mem->size,
106 &mem->pa, GFP_KERNEL);
114 * i40e_free_dma_mem_d - OS specific memory free for shared code
115 * @hw: pointer to the HW structure
116 * @mem: ptr to mem struct to free
118 int i40e_free_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem)
120 struct i40e_pf *pf = (struct i40e_pf *)hw->back;
122 dma_free_coherent(&pf->pdev->dev, mem->size, mem->va, mem->pa);
131 * i40e_allocate_virt_mem_d - OS specific memory alloc for shared code
132 * @hw: pointer to the HW structure
133 * @mem: ptr to mem struct to fill out
134 * @size: size of memory requested
136 int i40e_allocate_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem,
140 mem->va = kzalloc(size, GFP_KERNEL);
149 * i40e_free_virt_mem_d - OS specific memory free for shared code
150 * @hw: pointer to the HW structure
151 * @mem: ptr to mem struct to free
153 int i40e_free_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem)
155 /* it's ok to kfree a NULL pointer */
164 * i40e_get_lump - find a lump of free generic resource
165 * @pf: board private structure
166 * @pile: the pile of resource to search
167 * @needed: the number of items needed
168 * @id: an owner id to stick on the items assigned
170 * Returns the base item index of the lump, or negative for error
172 * The search_hint trick and lack of advanced fit-finding only work
173 * because we're highly likely to have all the same size lump requests.
174 * Linear search time and any fragmentation should be minimal.
176 static int i40e_get_lump(struct i40e_pf *pf, struct i40e_lump_tracking *pile,
182 if (!pile || needed == 0 || id >= I40E_PILE_VALID_BIT) {
183 dev_info(&pf->pdev->dev,
184 "param err: pile=%p needed=%d id=0x%04x\n",
189 /* start the linear search with an imperfect hint */
190 i = pile->search_hint;
191 while (i < pile->num_entries) {
192 /* skip already allocated entries */
193 if (pile->list[i] & I40E_PILE_VALID_BIT) {
198 /* do we have enough in this lump? */
199 for (j = 0; (j < needed) && ((i+j) < pile->num_entries); j++) {
200 if (pile->list[i+j] & I40E_PILE_VALID_BIT)
205 /* there was enough, so assign it to the requestor */
206 for (j = 0; j < needed; j++)
207 pile->list[i+j] = id | I40E_PILE_VALID_BIT;
209 pile->search_hint = i + j;
212 /* not enough, so skip over it and continue looking */
221 * i40e_put_lump - return a lump of generic resource
222 * @pile: the pile of resource to search
223 * @index: the base item index
224 * @id: the owner id of the items assigned
226 * Returns the count of items in the lump
228 static int i40e_put_lump(struct i40e_lump_tracking *pile, u16 index, u16 id)
230 int valid_id = (id | I40E_PILE_VALID_BIT);
234 if (!pile || index >= pile->num_entries)
238 i < pile->num_entries && pile->list[i] == valid_id;
244 if (count && index < pile->search_hint)
245 pile->search_hint = index;
251 * i40e_service_event_schedule - Schedule the service task to wake up
252 * @pf: board private structure
254 * If not already scheduled, this puts the task into the work queue
256 static void i40e_service_event_schedule(struct i40e_pf *pf)
258 if (!test_bit(__I40E_DOWN, &pf->state) &&
259 !test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state) &&
260 !test_and_set_bit(__I40E_SERVICE_SCHED, &pf->state))
261 schedule_work(&pf->service_task);
265 * i40e_tx_timeout - Respond to a Tx Hang
266 * @netdev: network interface device structure
268 * If any port has noticed a Tx timeout, it is likely that the whole
269 * device is munged, not just the one netdev port, so go for the full
272 static void i40e_tx_timeout(struct net_device *netdev)
274 struct i40e_netdev_priv *np = netdev_priv(netdev);
275 struct i40e_vsi *vsi = np->vsi;
276 struct i40e_pf *pf = vsi->back;
278 pf->tx_timeout_count++;
280 if (time_after(jiffies, (pf->tx_timeout_last_recovery + HZ*20)))
281 pf->tx_timeout_recovery_level = 1;
282 pf->tx_timeout_last_recovery = jiffies;
283 netdev_info(netdev, "tx_timeout recovery level %d\n",
284 pf->tx_timeout_recovery_level);
286 switch (pf->tx_timeout_recovery_level) {
288 /* disable and re-enable queues for the VSI */
289 if (in_interrupt()) {
290 set_bit(__I40E_REINIT_REQUESTED, &pf->state);
291 set_bit(__I40E_REINIT_REQUESTED, &vsi->state);
293 i40e_vsi_reinit_locked(vsi);
297 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
300 set_bit(__I40E_CORE_RESET_REQUESTED, &pf->state);
303 set_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state);
306 netdev_err(netdev, "tx_timeout recovery unsuccessful\n");
307 set_bit(__I40E_DOWN_REQUESTED, &pf->state);
308 set_bit(__I40E_DOWN_REQUESTED, &vsi->state);
311 i40e_service_event_schedule(pf);
312 pf->tx_timeout_recovery_level++;
316 * i40e_release_rx_desc - Store the new tail and head values
317 * @rx_ring: ring to bump
318 * @val: new head index
320 static inline void i40e_release_rx_desc(struct i40e_ring *rx_ring, u32 val)
322 rx_ring->next_to_use = val;
324 /* Force memory writes to complete before letting h/w
325 * know there are new descriptors to fetch. (Only
326 * applicable for weak-ordered memory model archs,
330 writel(val, rx_ring->tail);
334 * i40e_get_vsi_stats_struct - Get System Network Statistics
335 * @vsi: the VSI we care about
337 * Returns the address of the device statistics structure.
338 * The statistics are actually updated from the service task.
340 struct rtnl_link_stats64 *i40e_get_vsi_stats_struct(struct i40e_vsi *vsi)
342 return &vsi->net_stats;
346 * i40e_get_netdev_stats_struct - Get statistics for netdev interface
347 * @netdev: network interface device structure
349 * Returns the address of the device statistics structure.
350 * The statistics are actually updated from the service task.
352 static struct rtnl_link_stats64 *i40e_get_netdev_stats_struct(
353 struct net_device *netdev,
354 struct rtnl_link_stats64 *stats)
356 struct i40e_netdev_priv *np = netdev_priv(netdev);
357 struct i40e_ring *tx_ring, *rx_ring;
358 struct i40e_vsi *vsi = np->vsi;
359 struct rtnl_link_stats64 *vsi_stats = i40e_get_vsi_stats_struct(vsi);
362 if (test_bit(__I40E_DOWN, &vsi->state))
369 for (i = 0; i < vsi->num_queue_pairs; i++) {
373 tx_ring = ACCESS_ONCE(vsi->tx_rings[i]);
378 start = u64_stats_fetch_begin_irq(&tx_ring->syncp);
379 packets = tx_ring->stats.packets;
380 bytes = tx_ring->stats.bytes;
381 } while (u64_stats_fetch_retry_irq(&tx_ring->syncp, start));
383 stats->tx_packets += packets;
384 stats->tx_bytes += bytes;
385 rx_ring = &tx_ring[1];
388 start = u64_stats_fetch_begin_irq(&rx_ring->syncp);
389 packets = rx_ring->stats.packets;
390 bytes = rx_ring->stats.bytes;
391 } while (u64_stats_fetch_retry_irq(&rx_ring->syncp, start));
393 stats->rx_packets += packets;
394 stats->rx_bytes += bytes;
398 /* following stats updated by i40e_watchdog_subtask() */
399 stats->multicast = vsi_stats->multicast;
400 stats->tx_errors = vsi_stats->tx_errors;
401 stats->tx_dropped = vsi_stats->tx_dropped;
402 stats->rx_errors = vsi_stats->rx_errors;
403 stats->rx_crc_errors = vsi_stats->rx_crc_errors;
404 stats->rx_length_errors = vsi_stats->rx_length_errors;
410 * i40e_vsi_reset_stats - Resets all stats of the given vsi
411 * @vsi: the VSI to have its stats reset
413 void i40e_vsi_reset_stats(struct i40e_vsi *vsi)
415 struct rtnl_link_stats64 *ns;
421 ns = i40e_get_vsi_stats_struct(vsi);
422 memset(ns, 0, sizeof(*ns));
423 memset(&vsi->net_stats_offsets, 0, sizeof(vsi->net_stats_offsets));
424 memset(&vsi->eth_stats, 0, sizeof(vsi->eth_stats));
425 memset(&vsi->eth_stats_offsets, 0, sizeof(vsi->eth_stats_offsets));
426 if (vsi->rx_rings && vsi->rx_rings[0]) {
427 for (i = 0; i < vsi->num_queue_pairs; i++) {
428 memset(&vsi->rx_rings[i]->stats, 0 ,
429 sizeof(vsi->rx_rings[i]->stats));
430 memset(&vsi->rx_rings[i]->rx_stats, 0 ,
431 sizeof(vsi->rx_rings[i]->rx_stats));
432 memset(&vsi->tx_rings[i]->stats, 0 ,
433 sizeof(vsi->tx_rings[i]->stats));
434 memset(&vsi->tx_rings[i]->tx_stats, 0,
435 sizeof(vsi->tx_rings[i]->tx_stats));
438 vsi->stat_offsets_loaded = false;
442 * i40e_pf_reset_stats - Reset all of the stats for the given pf
443 * @pf: the PF to be reset
445 void i40e_pf_reset_stats(struct i40e_pf *pf)
449 memset(&pf->stats, 0, sizeof(pf->stats));
450 memset(&pf->stats_offsets, 0, sizeof(pf->stats_offsets));
451 pf->stat_offsets_loaded = false;
453 for (i = 0; i < I40E_MAX_VEB; i++) {
455 memset(&pf->veb[i]->stats, 0,
456 sizeof(pf->veb[i]->stats));
457 memset(&pf->veb[i]->stats_offsets, 0,
458 sizeof(pf->veb[i]->stats_offsets));
459 pf->veb[i]->stat_offsets_loaded = false;
465 * i40e_stat_update48 - read and update a 48 bit stat from the chip
466 * @hw: ptr to the hardware info
467 * @hireg: the high 32 bit reg to read
468 * @loreg: the low 32 bit reg to read
469 * @offset_loaded: has the initial offset been loaded yet
470 * @offset: ptr to current offset value
471 * @stat: ptr to the stat
473 * Since the device stats are not reset at PFReset, they likely will not
474 * be zeroed when the driver starts. We'll save the first values read
475 * and use them as offsets to be subtracted from the raw values in order
476 * to report stats that count from zero. In the process, we also manage
477 * the potential roll-over.
479 static void i40e_stat_update48(struct i40e_hw *hw, u32 hireg, u32 loreg,
480 bool offset_loaded, u64 *offset, u64 *stat)
484 if (hw->device_id == I40E_DEV_ID_QEMU) {
485 new_data = rd32(hw, loreg);
486 new_data |= ((u64)(rd32(hw, hireg) & 0xFFFF)) << 32;
488 new_data = rd64(hw, loreg);
492 if (likely(new_data >= *offset))
493 *stat = new_data - *offset;
495 *stat = (new_data + ((u64)1 << 48)) - *offset;
496 *stat &= 0xFFFFFFFFFFFFULL;
500 * i40e_stat_update32 - read and update a 32 bit stat from the chip
501 * @hw: ptr to the hardware info
502 * @reg: the hw reg to read
503 * @offset_loaded: has the initial offset been loaded yet
504 * @offset: ptr to current offset value
505 * @stat: ptr to the stat
507 static void i40e_stat_update32(struct i40e_hw *hw, u32 reg,
508 bool offset_loaded, u64 *offset, u64 *stat)
512 new_data = rd32(hw, reg);
515 if (likely(new_data >= *offset))
516 *stat = (u32)(new_data - *offset);
518 *stat = (u32)((new_data + ((u64)1 << 32)) - *offset);
522 * i40e_update_eth_stats - Update VSI-specific ethernet statistics counters.
523 * @vsi: the VSI to be updated
525 void i40e_update_eth_stats(struct i40e_vsi *vsi)
527 int stat_idx = le16_to_cpu(vsi->info.stat_counter_idx);
528 struct i40e_pf *pf = vsi->back;
529 struct i40e_hw *hw = &pf->hw;
530 struct i40e_eth_stats *oes;
531 struct i40e_eth_stats *es; /* device's eth stats */
533 es = &vsi->eth_stats;
534 oes = &vsi->eth_stats_offsets;
536 /* Gather up the stats that the hw collects */
537 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx),
538 vsi->stat_offsets_loaded,
539 &oes->tx_errors, &es->tx_errors);
540 i40e_stat_update32(hw, I40E_GLV_RDPC(stat_idx),
541 vsi->stat_offsets_loaded,
542 &oes->rx_discards, &es->rx_discards);
543 i40e_stat_update32(hw, I40E_GLV_RUPP(stat_idx),
544 vsi->stat_offsets_loaded,
545 &oes->rx_unknown_protocol, &es->rx_unknown_protocol);
546 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx),
547 vsi->stat_offsets_loaded,
548 &oes->tx_errors, &es->tx_errors);
550 i40e_stat_update48(hw, I40E_GLV_GORCH(stat_idx),
551 I40E_GLV_GORCL(stat_idx),
552 vsi->stat_offsets_loaded,
553 &oes->rx_bytes, &es->rx_bytes);
554 i40e_stat_update48(hw, I40E_GLV_UPRCH(stat_idx),
555 I40E_GLV_UPRCL(stat_idx),
556 vsi->stat_offsets_loaded,
557 &oes->rx_unicast, &es->rx_unicast);
558 i40e_stat_update48(hw, I40E_GLV_MPRCH(stat_idx),
559 I40E_GLV_MPRCL(stat_idx),
560 vsi->stat_offsets_loaded,
561 &oes->rx_multicast, &es->rx_multicast);
562 i40e_stat_update48(hw, I40E_GLV_BPRCH(stat_idx),
563 I40E_GLV_BPRCL(stat_idx),
564 vsi->stat_offsets_loaded,
565 &oes->rx_broadcast, &es->rx_broadcast);
567 i40e_stat_update48(hw, I40E_GLV_GOTCH(stat_idx),
568 I40E_GLV_GOTCL(stat_idx),
569 vsi->stat_offsets_loaded,
570 &oes->tx_bytes, &es->tx_bytes);
571 i40e_stat_update48(hw, I40E_GLV_UPTCH(stat_idx),
572 I40E_GLV_UPTCL(stat_idx),
573 vsi->stat_offsets_loaded,
574 &oes->tx_unicast, &es->tx_unicast);
575 i40e_stat_update48(hw, I40E_GLV_MPTCH(stat_idx),
576 I40E_GLV_MPTCL(stat_idx),
577 vsi->stat_offsets_loaded,
578 &oes->tx_multicast, &es->tx_multicast);
579 i40e_stat_update48(hw, I40E_GLV_BPTCH(stat_idx),
580 I40E_GLV_BPTCL(stat_idx),
581 vsi->stat_offsets_loaded,
582 &oes->tx_broadcast, &es->tx_broadcast);
583 vsi->stat_offsets_loaded = true;
587 * i40e_update_veb_stats - Update Switch component statistics
588 * @veb: the VEB being updated
590 static void i40e_update_veb_stats(struct i40e_veb *veb)
592 struct i40e_pf *pf = veb->pf;
593 struct i40e_hw *hw = &pf->hw;
594 struct i40e_eth_stats *oes;
595 struct i40e_eth_stats *es; /* device's eth stats */
598 idx = veb->stats_idx;
600 oes = &veb->stats_offsets;
602 /* Gather up the stats that the hw collects */
603 i40e_stat_update32(hw, I40E_GLSW_TDPC(idx),
604 veb->stat_offsets_loaded,
605 &oes->tx_discards, &es->tx_discards);
606 if (hw->revision_id > 0)
607 i40e_stat_update32(hw, I40E_GLSW_RUPP(idx),
608 veb->stat_offsets_loaded,
609 &oes->rx_unknown_protocol,
610 &es->rx_unknown_protocol);
611 i40e_stat_update48(hw, I40E_GLSW_GORCH(idx), I40E_GLSW_GORCL(idx),
612 veb->stat_offsets_loaded,
613 &oes->rx_bytes, &es->rx_bytes);
614 i40e_stat_update48(hw, I40E_GLSW_UPRCH(idx), I40E_GLSW_UPRCL(idx),
615 veb->stat_offsets_loaded,
616 &oes->rx_unicast, &es->rx_unicast);
617 i40e_stat_update48(hw, I40E_GLSW_MPRCH(idx), I40E_GLSW_MPRCL(idx),
618 veb->stat_offsets_loaded,
619 &oes->rx_multicast, &es->rx_multicast);
620 i40e_stat_update48(hw, I40E_GLSW_BPRCH(idx), I40E_GLSW_BPRCL(idx),
621 veb->stat_offsets_loaded,
622 &oes->rx_broadcast, &es->rx_broadcast);
624 i40e_stat_update48(hw, I40E_GLSW_GOTCH(idx), I40E_GLSW_GOTCL(idx),
625 veb->stat_offsets_loaded,
626 &oes->tx_bytes, &es->tx_bytes);
627 i40e_stat_update48(hw, I40E_GLSW_UPTCH(idx), I40E_GLSW_UPTCL(idx),
628 veb->stat_offsets_loaded,
629 &oes->tx_unicast, &es->tx_unicast);
630 i40e_stat_update48(hw, I40E_GLSW_MPTCH(idx), I40E_GLSW_MPTCL(idx),
631 veb->stat_offsets_loaded,
632 &oes->tx_multicast, &es->tx_multicast);
633 i40e_stat_update48(hw, I40E_GLSW_BPTCH(idx), I40E_GLSW_BPTCL(idx),
634 veb->stat_offsets_loaded,
635 &oes->tx_broadcast, &es->tx_broadcast);
636 veb->stat_offsets_loaded = true;
640 * i40e_update_link_xoff_rx - Update XOFF received in link flow control mode
641 * @pf: the corresponding PF
643 * Update the Rx XOFF counter (PAUSE frames) in link flow control mode
645 static void i40e_update_link_xoff_rx(struct i40e_pf *pf)
647 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
648 struct i40e_hw_port_stats *nsd = &pf->stats;
649 struct i40e_hw *hw = &pf->hw;
653 if ((hw->fc.current_mode != I40E_FC_FULL) &&
654 (hw->fc.current_mode != I40E_FC_RX_PAUSE))
657 xoff = nsd->link_xoff_rx;
658 i40e_stat_update32(hw, I40E_GLPRT_LXOFFRXC(hw->port),
659 pf->stat_offsets_loaded,
660 &osd->link_xoff_rx, &nsd->link_xoff_rx);
662 /* No new LFC xoff rx */
663 if (!(nsd->link_xoff_rx - xoff))
666 /* Clear the __I40E_HANG_CHECK_ARMED bit for all Tx rings */
667 for (v = 0; v < pf->num_alloc_vsi; v++) {
668 struct i40e_vsi *vsi = pf->vsi[v];
670 if (!vsi || !vsi->tx_rings[0])
673 for (i = 0; i < vsi->num_queue_pairs; i++) {
674 struct i40e_ring *ring = vsi->tx_rings[i];
675 clear_bit(__I40E_HANG_CHECK_ARMED, &ring->state);
681 * i40e_update_prio_xoff_rx - Update XOFF received in PFC mode
682 * @pf: the corresponding PF
684 * Update the Rx XOFF counter (PAUSE frames) in PFC mode
686 static void i40e_update_prio_xoff_rx(struct i40e_pf *pf)
688 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
689 struct i40e_hw_port_stats *nsd = &pf->stats;
690 bool xoff[I40E_MAX_TRAFFIC_CLASS] = {false};
691 struct i40e_dcbx_config *dcb_cfg;
692 struct i40e_hw *hw = &pf->hw;
696 dcb_cfg = &hw->local_dcbx_config;
698 /* See if DCB enabled with PFC TC */
699 if (!(pf->flags & I40E_FLAG_DCB_ENABLED) ||
700 !(dcb_cfg->pfc.pfcenable)) {
701 i40e_update_link_xoff_rx(pf);
705 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
706 u64 prio_xoff = nsd->priority_xoff_rx[i];
707 i40e_stat_update32(hw, I40E_GLPRT_PXOFFRXC(hw->port, i),
708 pf->stat_offsets_loaded,
709 &osd->priority_xoff_rx[i],
710 &nsd->priority_xoff_rx[i]);
712 /* No new PFC xoff rx */
713 if (!(nsd->priority_xoff_rx[i] - prio_xoff))
715 /* Get the TC for given priority */
716 tc = dcb_cfg->etscfg.prioritytable[i];
720 /* Clear the __I40E_HANG_CHECK_ARMED bit for Tx rings */
721 for (v = 0; v < pf->num_alloc_vsi; v++) {
722 struct i40e_vsi *vsi = pf->vsi[v];
724 if (!vsi || !vsi->tx_rings[0])
727 for (i = 0; i < vsi->num_queue_pairs; i++) {
728 struct i40e_ring *ring = vsi->tx_rings[i];
732 clear_bit(__I40E_HANG_CHECK_ARMED,
739 * i40e_update_vsi_stats - Update the vsi statistics counters.
740 * @vsi: the VSI to be updated
742 * There are a few instances where we store the same stat in a
743 * couple of different structs. This is partly because we have
744 * the netdev stats that need to be filled out, which is slightly
745 * different from the "eth_stats" defined by the chip and used in
746 * VF communications. We sort it out here.
748 static void i40e_update_vsi_stats(struct i40e_vsi *vsi)
750 struct i40e_pf *pf = vsi->back;
751 struct rtnl_link_stats64 *ons;
752 struct rtnl_link_stats64 *ns; /* netdev stats */
753 struct i40e_eth_stats *oes;
754 struct i40e_eth_stats *es; /* device's eth stats */
755 u32 tx_restart, tx_busy;
761 if (test_bit(__I40E_DOWN, &vsi->state) ||
762 test_bit(__I40E_CONFIG_BUSY, &pf->state))
765 ns = i40e_get_vsi_stats_struct(vsi);
766 ons = &vsi->net_stats_offsets;
767 es = &vsi->eth_stats;
768 oes = &vsi->eth_stats_offsets;
770 /* Gather up the netdev and vsi stats that the driver collects
771 * on the fly during packet processing
775 tx_restart = tx_busy = 0;
779 for (q = 0; q < vsi->num_queue_pairs; q++) {
785 p = ACCESS_ONCE(vsi->tx_rings[q]);
788 start = u64_stats_fetch_begin_irq(&p->syncp);
789 packets = p->stats.packets;
790 bytes = p->stats.bytes;
791 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
794 tx_restart += p->tx_stats.restart_queue;
795 tx_busy += p->tx_stats.tx_busy;
797 /* Rx queue is part of the same block as Tx queue */
800 start = u64_stats_fetch_begin_irq(&p->syncp);
801 packets = p->stats.packets;
802 bytes = p->stats.bytes;
803 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
806 rx_buf += p->rx_stats.alloc_buff_failed;
807 rx_page += p->rx_stats.alloc_page_failed;
810 vsi->tx_restart = tx_restart;
811 vsi->tx_busy = tx_busy;
812 vsi->rx_page_failed = rx_page;
813 vsi->rx_buf_failed = rx_buf;
815 ns->rx_packets = rx_p;
817 ns->tx_packets = tx_p;
820 /* update netdev stats from eth stats */
821 i40e_update_eth_stats(vsi);
822 ons->tx_errors = oes->tx_errors;
823 ns->tx_errors = es->tx_errors;
824 ons->multicast = oes->rx_multicast;
825 ns->multicast = es->rx_multicast;
826 ons->rx_dropped = oes->rx_discards;
827 ns->rx_dropped = es->rx_discards;
828 ons->tx_dropped = oes->tx_discards;
829 ns->tx_dropped = es->tx_discards;
831 /* pull in a couple PF stats if this is the main vsi */
832 if (vsi == pf->vsi[pf->lan_vsi]) {
833 ns->rx_crc_errors = pf->stats.crc_errors;
834 ns->rx_errors = pf->stats.crc_errors + pf->stats.illegal_bytes;
835 ns->rx_length_errors = pf->stats.rx_length_errors;
840 * i40e_update_pf_stats - Update the pf statistics counters.
841 * @pf: the PF to be updated
843 static void i40e_update_pf_stats(struct i40e_pf *pf)
845 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
846 struct i40e_hw_port_stats *nsd = &pf->stats;
847 struct i40e_hw *hw = &pf->hw;
851 i40e_stat_update48(hw, I40E_GLPRT_GORCH(hw->port),
852 I40E_GLPRT_GORCL(hw->port),
853 pf->stat_offsets_loaded,
854 &osd->eth.rx_bytes, &nsd->eth.rx_bytes);
855 i40e_stat_update48(hw, I40E_GLPRT_GOTCH(hw->port),
856 I40E_GLPRT_GOTCL(hw->port),
857 pf->stat_offsets_loaded,
858 &osd->eth.tx_bytes, &nsd->eth.tx_bytes);
859 i40e_stat_update32(hw, I40E_GLPRT_RDPC(hw->port),
860 pf->stat_offsets_loaded,
861 &osd->eth.rx_discards,
862 &nsd->eth.rx_discards);
863 i40e_stat_update32(hw, I40E_GLPRT_TDPC(hw->port),
864 pf->stat_offsets_loaded,
865 &osd->eth.tx_discards,
866 &nsd->eth.tx_discards);
868 i40e_stat_update48(hw, I40E_GLPRT_UPRCH(hw->port),
869 I40E_GLPRT_UPRCL(hw->port),
870 pf->stat_offsets_loaded,
871 &osd->eth.rx_unicast,
872 &nsd->eth.rx_unicast);
873 i40e_stat_update48(hw, I40E_GLPRT_MPRCH(hw->port),
874 I40E_GLPRT_MPRCL(hw->port),
875 pf->stat_offsets_loaded,
876 &osd->eth.rx_multicast,
877 &nsd->eth.rx_multicast);
878 i40e_stat_update48(hw, I40E_GLPRT_BPRCH(hw->port),
879 I40E_GLPRT_BPRCL(hw->port),
880 pf->stat_offsets_loaded,
881 &osd->eth.rx_broadcast,
882 &nsd->eth.rx_broadcast);
883 i40e_stat_update48(hw, I40E_GLPRT_UPTCH(hw->port),
884 I40E_GLPRT_UPTCL(hw->port),
885 pf->stat_offsets_loaded,
886 &osd->eth.tx_unicast,
887 &nsd->eth.tx_unicast);
888 i40e_stat_update48(hw, I40E_GLPRT_MPTCH(hw->port),
889 I40E_GLPRT_MPTCL(hw->port),
890 pf->stat_offsets_loaded,
891 &osd->eth.tx_multicast,
892 &nsd->eth.tx_multicast);
893 i40e_stat_update48(hw, I40E_GLPRT_BPTCH(hw->port),
894 I40E_GLPRT_BPTCL(hw->port),
895 pf->stat_offsets_loaded,
896 &osd->eth.tx_broadcast,
897 &nsd->eth.tx_broadcast);
899 i40e_stat_update32(hw, I40E_GLPRT_TDOLD(hw->port),
900 pf->stat_offsets_loaded,
901 &osd->tx_dropped_link_down,
902 &nsd->tx_dropped_link_down);
904 i40e_stat_update32(hw, I40E_GLPRT_CRCERRS(hw->port),
905 pf->stat_offsets_loaded,
906 &osd->crc_errors, &nsd->crc_errors);
908 i40e_stat_update32(hw, I40E_GLPRT_ILLERRC(hw->port),
909 pf->stat_offsets_loaded,
910 &osd->illegal_bytes, &nsd->illegal_bytes);
912 i40e_stat_update32(hw, I40E_GLPRT_MLFC(hw->port),
913 pf->stat_offsets_loaded,
914 &osd->mac_local_faults,
915 &nsd->mac_local_faults);
916 i40e_stat_update32(hw, I40E_GLPRT_MRFC(hw->port),
917 pf->stat_offsets_loaded,
918 &osd->mac_remote_faults,
919 &nsd->mac_remote_faults);
921 i40e_stat_update32(hw, I40E_GLPRT_RLEC(hw->port),
922 pf->stat_offsets_loaded,
923 &osd->rx_length_errors,
924 &nsd->rx_length_errors);
926 i40e_stat_update32(hw, I40E_GLPRT_LXONRXC(hw->port),
927 pf->stat_offsets_loaded,
928 &osd->link_xon_rx, &nsd->link_xon_rx);
929 i40e_stat_update32(hw, I40E_GLPRT_LXONTXC(hw->port),
930 pf->stat_offsets_loaded,
931 &osd->link_xon_tx, &nsd->link_xon_tx);
932 i40e_update_prio_xoff_rx(pf); /* handles I40E_GLPRT_LXOFFRXC */
933 i40e_stat_update32(hw, I40E_GLPRT_LXOFFTXC(hw->port),
934 pf->stat_offsets_loaded,
935 &osd->link_xoff_tx, &nsd->link_xoff_tx);
937 for (i = 0; i < 8; i++) {
938 i40e_stat_update32(hw, I40E_GLPRT_PXONRXC(hw->port, i),
939 pf->stat_offsets_loaded,
940 &osd->priority_xon_rx[i],
941 &nsd->priority_xon_rx[i]);
942 i40e_stat_update32(hw, I40E_GLPRT_PXONTXC(hw->port, i),
943 pf->stat_offsets_loaded,
944 &osd->priority_xon_tx[i],
945 &nsd->priority_xon_tx[i]);
946 i40e_stat_update32(hw, I40E_GLPRT_PXOFFTXC(hw->port, i),
947 pf->stat_offsets_loaded,
948 &osd->priority_xoff_tx[i],
949 &nsd->priority_xoff_tx[i]);
950 i40e_stat_update32(hw,
951 I40E_GLPRT_RXON2OFFCNT(hw->port, i),
952 pf->stat_offsets_loaded,
953 &osd->priority_xon_2_xoff[i],
954 &nsd->priority_xon_2_xoff[i]);
957 i40e_stat_update48(hw, I40E_GLPRT_PRC64H(hw->port),
958 I40E_GLPRT_PRC64L(hw->port),
959 pf->stat_offsets_loaded,
960 &osd->rx_size_64, &nsd->rx_size_64);
961 i40e_stat_update48(hw, I40E_GLPRT_PRC127H(hw->port),
962 I40E_GLPRT_PRC127L(hw->port),
963 pf->stat_offsets_loaded,
964 &osd->rx_size_127, &nsd->rx_size_127);
965 i40e_stat_update48(hw, I40E_GLPRT_PRC255H(hw->port),
966 I40E_GLPRT_PRC255L(hw->port),
967 pf->stat_offsets_loaded,
968 &osd->rx_size_255, &nsd->rx_size_255);
969 i40e_stat_update48(hw, I40E_GLPRT_PRC511H(hw->port),
970 I40E_GLPRT_PRC511L(hw->port),
971 pf->stat_offsets_loaded,
972 &osd->rx_size_511, &nsd->rx_size_511);
973 i40e_stat_update48(hw, I40E_GLPRT_PRC1023H(hw->port),
974 I40E_GLPRT_PRC1023L(hw->port),
975 pf->stat_offsets_loaded,
976 &osd->rx_size_1023, &nsd->rx_size_1023);
977 i40e_stat_update48(hw, I40E_GLPRT_PRC1522H(hw->port),
978 I40E_GLPRT_PRC1522L(hw->port),
979 pf->stat_offsets_loaded,
980 &osd->rx_size_1522, &nsd->rx_size_1522);
981 i40e_stat_update48(hw, I40E_GLPRT_PRC9522H(hw->port),
982 I40E_GLPRT_PRC9522L(hw->port),
983 pf->stat_offsets_loaded,
984 &osd->rx_size_big, &nsd->rx_size_big);
986 i40e_stat_update48(hw, I40E_GLPRT_PTC64H(hw->port),
987 I40E_GLPRT_PTC64L(hw->port),
988 pf->stat_offsets_loaded,
989 &osd->tx_size_64, &nsd->tx_size_64);
990 i40e_stat_update48(hw, I40E_GLPRT_PTC127H(hw->port),
991 I40E_GLPRT_PTC127L(hw->port),
992 pf->stat_offsets_loaded,
993 &osd->tx_size_127, &nsd->tx_size_127);
994 i40e_stat_update48(hw, I40E_GLPRT_PTC255H(hw->port),
995 I40E_GLPRT_PTC255L(hw->port),
996 pf->stat_offsets_loaded,
997 &osd->tx_size_255, &nsd->tx_size_255);
998 i40e_stat_update48(hw, I40E_GLPRT_PTC511H(hw->port),
999 I40E_GLPRT_PTC511L(hw->port),
1000 pf->stat_offsets_loaded,
1001 &osd->tx_size_511, &nsd->tx_size_511);
1002 i40e_stat_update48(hw, I40E_GLPRT_PTC1023H(hw->port),
1003 I40E_GLPRT_PTC1023L(hw->port),
1004 pf->stat_offsets_loaded,
1005 &osd->tx_size_1023, &nsd->tx_size_1023);
1006 i40e_stat_update48(hw, I40E_GLPRT_PTC1522H(hw->port),
1007 I40E_GLPRT_PTC1522L(hw->port),
1008 pf->stat_offsets_loaded,
1009 &osd->tx_size_1522, &nsd->tx_size_1522);
1010 i40e_stat_update48(hw, I40E_GLPRT_PTC9522H(hw->port),
1011 I40E_GLPRT_PTC9522L(hw->port),
1012 pf->stat_offsets_loaded,
1013 &osd->tx_size_big, &nsd->tx_size_big);
1015 i40e_stat_update32(hw, I40E_GLPRT_RUC(hw->port),
1016 pf->stat_offsets_loaded,
1017 &osd->rx_undersize, &nsd->rx_undersize);
1018 i40e_stat_update32(hw, I40E_GLPRT_RFC(hw->port),
1019 pf->stat_offsets_loaded,
1020 &osd->rx_fragments, &nsd->rx_fragments);
1021 i40e_stat_update32(hw, I40E_GLPRT_ROC(hw->port),
1022 pf->stat_offsets_loaded,
1023 &osd->rx_oversize, &nsd->rx_oversize);
1024 i40e_stat_update32(hw, I40E_GLPRT_RJC(hw->port),
1025 pf->stat_offsets_loaded,
1026 &osd->rx_jabber, &nsd->rx_jabber);
1029 i40e_stat_update32(hw, I40E_GLQF_PCNT(pf->fd_atr_cnt_idx),
1030 pf->stat_offsets_loaded,
1031 &osd->fd_atr_match, &nsd->fd_atr_match);
1032 i40e_stat_update32(hw, I40E_GLQF_PCNT(pf->fd_sb_cnt_idx),
1033 pf->stat_offsets_loaded,
1034 &osd->fd_sb_match, &nsd->fd_sb_match);
1036 val = rd32(hw, I40E_PRTPM_EEE_STAT);
1037 nsd->tx_lpi_status =
1038 (val & I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_MASK) >>
1039 I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_SHIFT;
1040 nsd->rx_lpi_status =
1041 (val & I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_MASK) >>
1042 I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_SHIFT;
1043 i40e_stat_update32(hw, I40E_PRTPM_TLPIC,
1044 pf->stat_offsets_loaded,
1045 &osd->tx_lpi_count, &nsd->tx_lpi_count);
1046 i40e_stat_update32(hw, I40E_PRTPM_RLPIC,
1047 pf->stat_offsets_loaded,
1048 &osd->rx_lpi_count, &nsd->rx_lpi_count);
1050 pf->stat_offsets_loaded = true;
1054 * i40e_update_stats - Update the various statistics counters.
1055 * @vsi: the VSI to be updated
1057 * Update the various stats for this VSI and its related entities.
1059 void i40e_update_stats(struct i40e_vsi *vsi)
1061 struct i40e_pf *pf = vsi->back;
1063 if (vsi == pf->vsi[pf->lan_vsi])
1064 i40e_update_pf_stats(pf);
1066 i40e_update_vsi_stats(vsi);
1070 * i40e_find_filter - Search VSI filter list for specific mac/vlan filter
1071 * @vsi: the VSI to be searched
1072 * @macaddr: the MAC address
1074 * @is_vf: make sure its a vf filter, else doesn't matter
1075 * @is_netdev: make sure its a netdev filter, else doesn't matter
1077 * Returns ptr to the filter object or NULL
1079 static struct i40e_mac_filter *i40e_find_filter(struct i40e_vsi *vsi,
1080 u8 *macaddr, s16 vlan,
1081 bool is_vf, bool is_netdev)
1083 struct i40e_mac_filter *f;
1085 if (!vsi || !macaddr)
1088 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1089 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1090 (vlan == f->vlan) &&
1091 (!is_vf || f->is_vf) &&
1092 (!is_netdev || f->is_netdev))
1099 * i40e_find_mac - Find a mac addr in the macvlan filters list
1100 * @vsi: the VSI to be searched
1101 * @macaddr: the MAC address we are searching for
1102 * @is_vf: make sure its a vf filter, else doesn't matter
1103 * @is_netdev: make sure its a netdev filter, else doesn't matter
1105 * Returns the first filter with the provided MAC address or NULL if
1106 * MAC address was not found
1108 struct i40e_mac_filter *i40e_find_mac(struct i40e_vsi *vsi, u8 *macaddr,
1109 bool is_vf, bool is_netdev)
1111 struct i40e_mac_filter *f;
1113 if (!vsi || !macaddr)
1116 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1117 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1118 (!is_vf || f->is_vf) &&
1119 (!is_netdev || f->is_netdev))
1126 * i40e_is_vsi_in_vlan - Check if VSI is in vlan mode
1127 * @vsi: the VSI to be searched
1129 * Returns true if VSI is in vlan mode or false otherwise
1131 bool i40e_is_vsi_in_vlan(struct i40e_vsi *vsi)
1133 struct i40e_mac_filter *f;
1135 /* Only -1 for all the filters denotes not in vlan mode
1136 * so we have to go through all the list in order to make sure
1138 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1147 * i40e_put_mac_in_vlan - Make macvlan filters from macaddrs and vlans
1148 * @vsi: the VSI to be searched
1149 * @macaddr: the mac address to be filtered
1150 * @is_vf: true if it is a vf
1151 * @is_netdev: true if it is a netdev
1153 * Goes through all the macvlan filters and adds a
1154 * macvlan filter for each unique vlan that already exists
1156 * Returns first filter found on success, else NULL
1158 struct i40e_mac_filter *i40e_put_mac_in_vlan(struct i40e_vsi *vsi, u8 *macaddr,
1159 bool is_vf, bool is_netdev)
1161 struct i40e_mac_filter *f;
1163 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1164 if (!i40e_find_filter(vsi, macaddr, f->vlan,
1165 is_vf, is_netdev)) {
1166 if (!i40e_add_filter(vsi, macaddr, f->vlan,
1172 return list_first_entry_or_null(&vsi->mac_filter_list,
1173 struct i40e_mac_filter, list);
1177 * i40e_rm_default_mac_filter - Remove the default MAC filter set by NVM
1178 * @vsi: the PF Main VSI - inappropriate for any other VSI
1179 * @macaddr: the MAC address
1181 static void i40e_rm_default_mac_filter(struct i40e_vsi *vsi, u8 *macaddr)
1183 struct i40e_aqc_remove_macvlan_element_data element;
1184 struct i40e_pf *pf = vsi->back;
1187 /* Only appropriate for the PF main VSI */
1188 if (vsi->type != I40E_VSI_MAIN)
1191 ether_addr_copy(element.mac_addr, macaddr);
1192 element.vlan_tag = 0;
1193 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH |
1194 I40E_AQC_MACVLAN_DEL_IGNORE_VLAN;
1195 aq_ret = i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1197 dev_err(&pf->pdev->dev, "Could not remove default MAC-VLAN\n");
1201 * i40e_add_filter - Add a mac/vlan filter to the VSI
1202 * @vsi: the VSI to be searched
1203 * @macaddr: the MAC address
1205 * @is_vf: make sure its a vf filter, else doesn't matter
1206 * @is_netdev: make sure its a netdev filter, else doesn't matter
1208 * Returns ptr to the filter object or NULL when no memory available.
1210 struct i40e_mac_filter *i40e_add_filter(struct i40e_vsi *vsi,
1211 u8 *macaddr, s16 vlan,
1212 bool is_vf, bool is_netdev)
1214 struct i40e_mac_filter *f;
1216 if (!vsi || !macaddr)
1219 f = i40e_find_filter(vsi, macaddr, vlan, is_vf, is_netdev);
1221 f = kzalloc(sizeof(*f), GFP_ATOMIC);
1223 goto add_filter_out;
1225 ether_addr_copy(f->macaddr, macaddr);
1229 INIT_LIST_HEAD(&f->list);
1230 list_add(&f->list, &vsi->mac_filter_list);
1233 /* increment counter and add a new flag if needed */
1239 } else if (is_netdev) {
1240 if (!f->is_netdev) {
1241 f->is_netdev = true;
1248 /* changed tells sync_filters_subtask to
1249 * push the filter down to the firmware
1252 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1253 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1261 * i40e_del_filter - Remove a mac/vlan filter from the VSI
1262 * @vsi: the VSI to be searched
1263 * @macaddr: the MAC address
1265 * @is_vf: make sure it's a vf filter, else doesn't matter
1266 * @is_netdev: make sure it's a netdev filter, else doesn't matter
1268 void i40e_del_filter(struct i40e_vsi *vsi,
1269 u8 *macaddr, s16 vlan,
1270 bool is_vf, bool is_netdev)
1272 struct i40e_mac_filter *f;
1274 if (!vsi || !macaddr)
1277 f = i40e_find_filter(vsi, macaddr, vlan, is_vf, is_netdev);
1278 if (!f || f->counter == 0)
1286 } else if (is_netdev) {
1288 f->is_netdev = false;
1292 /* make sure we don't remove a filter in use by vf or netdev */
1294 min_f += (f->is_vf ? 1 : 0);
1295 min_f += (f->is_netdev ? 1 : 0);
1297 if (f->counter > min_f)
1301 /* counter == 0 tells sync_filters_subtask to
1302 * remove the filter from the firmware's list
1304 if (f->counter == 0) {
1306 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1307 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1312 * i40e_set_mac - NDO callback to set mac address
1313 * @netdev: network interface device structure
1314 * @p: pointer to an address structure
1316 * Returns 0 on success, negative on failure
1318 static int i40e_set_mac(struct net_device *netdev, void *p)
1320 struct i40e_netdev_priv *np = netdev_priv(netdev);
1321 struct i40e_vsi *vsi = np->vsi;
1322 struct sockaddr *addr = p;
1323 struct i40e_mac_filter *f;
1325 if (!is_valid_ether_addr(addr->sa_data))
1326 return -EADDRNOTAVAIL;
1328 netdev_info(netdev, "set mac address=%pM\n", addr->sa_data);
1330 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
1331 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
1332 return -EADDRNOTAVAIL;
1334 if (vsi->type == I40E_VSI_MAIN) {
1336 ret = i40e_aq_mac_address_write(&vsi->back->hw,
1337 I40E_AQC_WRITE_TYPE_LAA_WOL,
1338 addr->sa_data, NULL);
1341 "Addr change for Main VSI failed: %d\n",
1343 return -EADDRNOTAVAIL;
1347 f = i40e_find_mac(vsi, addr->sa_data, false, true);
1349 /* In order to be sure to not drop any packets, add the
1350 * new address first then delete the old one.
1352 f = i40e_add_filter(vsi, addr->sa_data, I40E_VLAN_ANY,
1357 i40e_sync_vsi_filters(vsi);
1358 i40e_del_filter(vsi, netdev->dev_addr, I40E_VLAN_ANY,
1360 i40e_sync_vsi_filters(vsi);
1364 if (!ether_addr_equal(netdev->dev_addr, addr->sa_data))
1365 ether_addr_copy(netdev->dev_addr, addr->sa_data);
1371 * i40e_vsi_setup_queue_map - Setup a VSI queue map based on enabled_tc
1372 * @vsi: the VSI being setup
1373 * @ctxt: VSI context structure
1374 * @enabled_tc: Enabled TCs bitmap
1375 * @is_add: True if called before Add VSI
1377 * Setup VSI queue mapping for enabled traffic classes.
1379 static void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
1380 struct i40e_vsi_context *ctxt,
1384 struct i40e_pf *pf = vsi->back;
1394 sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID;
1397 if (enabled_tc && (vsi->back->flags & I40E_FLAG_DCB_ENABLED)) {
1398 /* Find numtc from enabled TC bitmap */
1399 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1400 if (enabled_tc & (1 << i)) /* TC is enabled */
1404 dev_warn(&pf->pdev->dev, "DCB is enabled but no TC enabled, forcing TC0\n");
1408 /* At least TC0 is enabled in case of non-DCB case */
1412 vsi->tc_config.numtc = numtc;
1413 vsi->tc_config.enabled_tc = enabled_tc ? enabled_tc : 1;
1414 /* Number of queues per enabled TC */
1415 num_tc_qps = vsi->alloc_queue_pairs/numtc;
1416 num_tc_qps = min_t(int, num_tc_qps, I40E_MAX_QUEUES_PER_TC);
1418 /* Setup queue offset/count for all TCs for given VSI */
1419 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1420 /* See if the given TC is enabled for the given VSI */
1421 if (vsi->tc_config.enabled_tc & (1 << i)) { /* TC is enabled */
1424 switch (vsi->type) {
1426 qcount = min_t(int, pf->rss_size, num_tc_qps);
1429 case I40E_VSI_SRIOV:
1430 case I40E_VSI_VMDQ2:
1432 qcount = num_tc_qps;
1436 vsi->tc_config.tc_info[i].qoffset = offset;
1437 vsi->tc_config.tc_info[i].qcount = qcount;
1439 /* find the power-of-2 of the number of queue pairs */
1442 while (num_qps && ((1 << pow) < qcount)) {
1447 vsi->tc_config.tc_info[i].netdev_tc = netdev_tc++;
1449 (offset << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) |
1450 (pow << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT);
1454 /* TC is not enabled so set the offset to
1455 * default queue and allocate one queue
1458 vsi->tc_config.tc_info[i].qoffset = 0;
1459 vsi->tc_config.tc_info[i].qcount = 1;
1460 vsi->tc_config.tc_info[i].netdev_tc = 0;
1464 ctxt->info.tc_mapping[i] = cpu_to_le16(qmap);
1467 /* Set actual Tx/Rx queue pairs */
1468 vsi->num_queue_pairs = offset;
1470 /* Scheduler section valid can only be set for ADD VSI */
1472 sections |= I40E_AQ_VSI_PROP_SCHED_VALID;
1474 ctxt->info.up_enable_bits = enabled_tc;
1476 if (vsi->type == I40E_VSI_SRIOV) {
1477 ctxt->info.mapping_flags |=
1478 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_NONCONTIG);
1479 for (i = 0; i < vsi->num_queue_pairs; i++)
1480 ctxt->info.queue_mapping[i] =
1481 cpu_to_le16(vsi->base_queue + i);
1483 ctxt->info.mapping_flags |=
1484 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG);
1485 ctxt->info.queue_mapping[0] = cpu_to_le16(vsi->base_queue);
1487 ctxt->info.valid_sections |= cpu_to_le16(sections);
1491 * i40e_set_rx_mode - NDO callback to set the netdev filters
1492 * @netdev: network interface device structure
1494 static void i40e_set_rx_mode(struct net_device *netdev)
1496 struct i40e_netdev_priv *np = netdev_priv(netdev);
1497 struct i40e_mac_filter *f, *ftmp;
1498 struct i40e_vsi *vsi = np->vsi;
1499 struct netdev_hw_addr *uca;
1500 struct netdev_hw_addr *mca;
1501 struct netdev_hw_addr *ha;
1503 /* add addr if not already in the filter list */
1504 netdev_for_each_uc_addr(uca, netdev) {
1505 if (!i40e_find_mac(vsi, uca->addr, false, true)) {
1506 if (i40e_is_vsi_in_vlan(vsi))
1507 i40e_put_mac_in_vlan(vsi, uca->addr,
1510 i40e_add_filter(vsi, uca->addr, I40E_VLAN_ANY,
1515 netdev_for_each_mc_addr(mca, netdev) {
1516 if (!i40e_find_mac(vsi, mca->addr, false, true)) {
1517 if (i40e_is_vsi_in_vlan(vsi))
1518 i40e_put_mac_in_vlan(vsi, mca->addr,
1521 i40e_add_filter(vsi, mca->addr, I40E_VLAN_ANY,
1526 /* remove filter if not in netdev list */
1527 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1533 if (is_multicast_ether_addr(f->macaddr)) {
1534 netdev_for_each_mc_addr(mca, netdev) {
1535 if (ether_addr_equal(mca->addr, f->macaddr)) {
1541 netdev_for_each_uc_addr(uca, netdev) {
1542 if (ether_addr_equal(uca->addr, f->macaddr)) {
1548 for_each_dev_addr(netdev, ha) {
1549 if (ether_addr_equal(ha->addr, f->macaddr)) {
1557 vsi, f->macaddr, I40E_VLAN_ANY, false, true);
1560 /* check for other flag changes */
1561 if (vsi->current_netdev_flags != vsi->netdev->flags) {
1562 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1563 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1568 * i40e_sync_vsi_filters - Update the VSI filter list to the HW
1569 * @vsi: ptr to the VSI
1571 * Push any outstanding VSI filter changes through the AdminQ.
1573 * Returns 0 or error value
1575 int i40e_sync_vsi_filters(struct i40e_vsi *vsi)
1577 struct i40e_mac_filter *f, *ftmp;
1578 bool promisc_forced_on = false;
1579 bool add_happened = false;
1580 int filter_list_len = 0;
1581 u32 changed_flags = 0;
1582 i40e_status aq_ret = 0;
1588 /* empty array typed pointers, kcalloc later */
1589 struct i40e_aqc_add_macvlan_element_data *add_list;
1590 struct i40e_aqc_remove_macvlan_element_data *del_list;
1592 while (test_and_set_bit(__I40E_CONFIG_BUSY, &vsi->state))
1593 usleep_range(1000, 2000);
1597 changed_flags = vsi->current_netdev_flags ^ vsi->netdev->flags;
1598 vsi->current_netdev_flags = vsi->netdev->flags;
1601 if (vsi->flags & I40E_VSI_FLAG_FILTER_CHANGED) {
1602 vsi->flags &= ~I40E_VSI_FLAG_FILTER_CHANGED;
1604 filter_list_len = pf->hw.aq.asq_buf_size /
1605 sizeof(struct i40e_aqc_remove_macvlan_element_data);
1606 del_list = kcalloc(filter_list_len,
1607 sizeof(struct i40e_aqc_remove_macvlan_element_data),
1612 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1616 if (f->counter != 0)
1621 /* add to delete list */
1622 ether_addr_copy(del_list[num_del].mac_addr, f->macaddr);
1623 del_list[num_del].vlan_tag =
1624 cpu_to_le16((u16)(f->vlan ==
1625 I40E_VLAN_ANY ? 0 : f->vlan));
1627 cmd_flags |= I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
1628 del_list[num_del].flags = cmd_flags;
1631 /* unlink from filter list */
1635 /* flush a full buffer */
1636 if (num_del == filter_list_len) {
1637 aq_ret = i40e_aq_remove_macvlan(&pf->hw,
1638 vsi->seid, del_list, num_del,
1641 memset(del_list, 0, sizeof(*del_list));
1644 pf->hw.aq.asq_last_status !=
1646 dev_info(&pf->pdev->dev,
1647 "ignoring delete macvlan error, err %d, aq_err %d while flushing a full buffer\n",
1649 pf->hw.aq.asq_last_status);
1653 aq_ret = i40e_aq_remove_macvlan(&pf->hw, vsi->seid,
1654 del_list, num_del, NULL);
1658 pf->hw.aq.asq_last_status != I40E_AQ_RC_ENOENT)
1659 dev_info(&pf->pdev->dev,
1660 "ignoring delete macvlan error, err %d, aq_err %d\n",
1661 aq_ret, pf->hw.aq.asq_last_status);
1667 /* do all the adds now */
1668 filter_list_len = pf->hw.aq.asq_buf_size /
1669 sizeof(struct i40e_aqc_add_macvlan_element_data),
1670 add_list = kcalloc(filter_list_len,
1671 sizeof(struct i40e_aqc_add_macvlan_element_data),
1676 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1680 if (f->counter == 0)
1683 add_happened = true;
1686 /* add to add array */
1687 ether_addr_copy(add_list[num_add].mac_addr, f->macaddr);
1688 add_list[num_add].vlan_tag =
1690 (u16)(f->vlan == I40E_VLAN_ANY ? 0 : f->vlan));
1691 add_list[num_add].queue_number = 0;
1693 cmd_flags |= I40E_AQC_MACVLAN_ADD_PERFECT_MATCH;
1694 add_list[num_add].flags = cpu_to_le16(cmd_flags);
1697 /* flush a full buffer */
1698 if (num_add == filter_list_len) {
1699 aq_ret = i40e_aq_add_macvlan(&pf->hw, vsi->seid,
1706 memset(add_list, 0, sizeof(*add_list));
1710 aq_ret = i40e_aq_add_macvlan(&pf->hw, vsi->seid,
1711 add_list, num_add, NULL);
1717 if (add_happened && (!aq_ret)) {
1719 } else if (add_happened && (aq_ret)) {
1720 dev_info(&pf->pdev->dev,
1721 "add filter failed, err %d, aq_err %d\n",
1722 aq_ret, pf->hw.aq.asq_last_status);
1723 if ((pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOSPC) &&
1724 !test_bit(__I40E_FILTER_OVERFLOW_PROMISC,
1726 promisc_forced_on = true;
1727 set_bit(__I40E_FILTER_OVERFLOW_PROMISC,
1729 dev_info(&pf->pdev->dev, "promiscuous mode forced on\n");
1734 /* check for changes in promiscuous modes */
1735 if (changed_flags & IFF_ALLMULTI) {
1736 bool cur_multipromisc;
1737 cur_multipromisc = !!(vsi->current_netdev_flags & IFF_ALLMULTI);
1738 aq_ret = i40e_aq_set_vsi_multicast_promiscuous(&vsi->back->hw,
1743 dev_info(&pf->pdev->dev,
1744 "set multi promisc failed, err %d, aq_err %d\n",
1745 aq_ret, pf->hw.aq.asq_last_status);
1747 if ((changed_flags & IFF_PROMISC) || promisc_forced_on) {
1749 cur_promisc = (!!(vsi->current_netdev_flags & IFF_PROMISC) ||
1750 test_bit(__I40E_FILTER_OVERFLOW_PROMISC,
1752 aq_ret = i40e_aq_set_vsi_unicast_promiscuous(&vsi->back->hw,
1756 dev_info(&pf->pdev->dev,
1757 "set uni promisc failed, err %d, aq_err %d\n",
1758 aq_ret, pf->hw.aq.asq_last_status);
1759 aq_ret = i40e_aq_set_vsi_broadcast(&vsi->back->hw,
1763 dev_info(&pf->pdev->dev,
1764 "set brdcast promisc failed, err %d, aq_err %d\n",
1765 aq_ret, pf->hw.aq.asq_last_status);
1768 clear_bit(__I40E_CONFIG_BUSY, &vsi->state);
1773 * i40e_sync_filters_subtask - Sync the VSI filter list with HW
1774 * @pf: board private structure
1776 static void i40e_sync_filters_subtask(struct i40e_pf *pf)
1780 if (!pf || !(pf->flags & I40E_FLAG_FILTER_SYNC))
1782 pf->flags &= ~I40E_FLAG_FILTER_SYNC;
1784 for (v = 0; v < pf->num_alloc_vsi; v++) {
1786 (pf->vsi[v]->flags & I40E_VSI_FLAG_FILTER_CHANGED))
1787 i40e_sync_vsi_filters(pf->vsi[v]);
1792 * i40e_change_mtu - NDO callback to change the Maximum Transfer Unit
1793 * @netdev: network interface device structure
1794 * @new_mtu: new value for maximum frame size
1796 * Returns 0 on success, negative on failure
1798 static int i40e_change_mtu(struct net_device *netdev, int new_mtu)
1800 struct i40e_netdev_priv *np = netdev_priv(netdev);
1801 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
1802 struct i40e_vsi *vsi = np->vsi;
1804 /* MTU < 68 is an error and causes problems on some kernels */
1805 if ((new_mtu < 68) || (max_frame > I40E_MAX_RXBUFFER))
1808 netdev_info(netdev, "changing MTU from %d to %d\n",
1809 netdev->mtu, new_mtu);
1810 netdev->mtu = new_mtu;
1811 if (netif_running(netdev))
1812 i40e_vsi_reinit_locked(vsi);
1818 * i40e_ioctl - Access the hwtstamp interface
1819 * @netdev: network interface device structure
1820 * @ifr: interface request data
1821 * @cmd: ioctl command
1823 int i40e_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
1825 struct i40e_netdev_priv *np = netdev_priv(netdev);
1826 struct i40e_pf *pf = np->vsi->back;
1830 return i40e_ptp_get_ts_config(pf, ifr);
1832 return i40e_ptp_set_ts_config(pf, ifr);
1839 * i40e_vlan_stripping_enable - Turn on vlan stripping for the VSI
1840 * @vsi: the vsi being adjusted
1842 void i40e_vlan_stripping_enable(struct i40e_vsi *vsi)
1844 struct i40e_vsi_context ctxt;
1847 if ((vsi->info.valid_sections &
1848 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
1849 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_MODE_MASK) == 0))
1850 return; /* already enabled */
1852 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
1853 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
1854 I40E_AQ_VSI_PVLAN_EMOD_STR_BOTH;
1856 ctxt.seid = vsi->seid;
1857 memcpy(&ctxt.info, &vsi->info, sizeof(vsi->info));
1858 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
1860 dev_info(&vsi->back->pdev->dev,
1861 "%s: update vsi failed, aq_err=%d\n",
1862 __func__, vsi->back->hw.aq.asq_last_status);
1867 * i40e_vlan_stripping_disable - Turn off vlan stripping for the VSI
1868 * @vsi: the vsi being adjusted
1870 void i40e_vlan_stripping_disable(struct i40e_vsi *vsi)
1872 struct i40e_vsi_context ctxt;
1875 if ((vsi->info.valid_sections &
1876 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
1877 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_EMOD_MASK) ==
1878 I40E_AQ_VSI_PVLAN_EMOD_MASK))
1879 return; /* already disabled */
1881 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
1882 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
1883 I40E_AQ_VSI_PVLAN_EMOD_NOTHING;
1885 ctxt.seid = vsi->seid;
1886 memcpy(&ctxt.info, &vsi->info, sizeof(vsi->info));
1887 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
1889 dev_info(&vsi->back->pdev->dev,
1890 "%s: update vsi failed, aq_err=%d\n",
1891 __func__, vsi->back->hw.aq.asq_last_status);
1896 * i40e_vlan_rx_register - Setup or shutdown vlan offload
1897 * @netdev: network interface to be adjusted
1898 * @features: netdev features to test if VLAN offload is enabled or not
1900 static void i40e_vlan_rx_register(struct net_device *netdev, u32 features)
1902 struct i40e_netdev_priv *np = netdev_priv(netdev);
1903 struct i40e_vsi *vsi = np->vsi;
1905 if (features & NETIF_F_HW_VLAN_CTAG_RX)
1906 i40e_vlan_stripping_enable(vsi);
1908 i40e_vlan_stripping_disable(vsi);
1912 * i40e_vsi_add_vlan - Add vsi membership for given vlan
1913 * @vsi: the vsi being configured
1914 * @vid: vlan id to be added (0 = untagged only , -1 = any)
1916 int i40e_vsi_add_vlan(struct i40e_vsi *vsi, s16 vid)
1918 struct i40e_mac_filter *f, *add_f;
1919 bool is_netdev, is_vf;
1921 is_vf = (vsi->type == I40E_VSI_SRIOV);
1922 is_netdev = !!(vsi->netdev);
1925 add_f = i40e_add_filter(vsi, vsi->netdev->dev_addr, vid,
1928 dev_info(&vsi->back->pdev->dev,
1929 "Could not add vlan filter %d for %pM\n",
1930 vid, vsi->netdev->dev_addr);
1935 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1936 add_f = i40e_add_filter(vsi, f->macaddr, vid, is_vf, is_netdev);
1938 dev_info(&vsi->back->pdev->dev,
1939 "Could not add vlan filter %d for %pM\n",
1945 /* Now if we add a vlan tag, make sure to check if it is the first
1946 * tag (i.e. a "tag" -1 does exist) and if so replace the -1 "tag"
1947 * with 0, so we now accept untagged and specified tagged traffic
1948 * (and not any taged and untagged)
1951 if (is_netdev && i40e_find_filter(vsi, vsi->netdev->dev_addr,
1953 is_vf, is_netdev)) {
1954 i40e_del_filter(vsi, vsi->netdev->dev_addr,
1955 I40E_VLAN_ANY, is_vf, is_netdev);
1956 add_f = i40e_add_filter(vsi, vsi->netdev->dev_addr, 0,
1959 dev_info(&vsi->back->pdev->dev,
1960 "Could not add filter 0 for %pM\n",
1961 vsi->netdev->dev_addr);
1967 /* Do not assume that I40E_VLAN_ANY should be reset to VLAN 0 */
1968 if (vid > 0 && !vsi->info.pvid) {
1969 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1970 if (i40e_find_filter(vsi, f->macaddr, I40E_VLAN_ANY,
1971 is_vf, is_netdev)) {
1972 i40e_del_filter(vsi, f->macaddr, I40E_VLAN_ANY,
1974 add_f = i40e_add_filter(vsi, f->macaddr,
1975 0, is_vf, is_netdev);
1977 dev_info(&vsi->back->pdev->dev,
1978 "Could not add filter 0 for %pM\n",
1986 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
1987 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
1990 return i40e_sync_vsi_filters(vsi);
1994 * i40e_vsi_kill_vlan - Remove vsi membership for given vlan
1995 * @vsi: the vsi being configured
1996 * @vid: vlan id to be removed (0 = untagged only , -1 = any)
1998 * Return: 0 on success or negative otherwise
2000 int i40e_vsi_kill_vlan(struct i40e_vsi *vsi, s16 vid)
2002 struct net_device *netdev = vsi->netdev;
2003 struct i40e_mac_filter *f, *add_f;
2004 bool is_vf, is_netdev;
2005 int filter_count = 0;
2007 is_vf = (vsi->type == I40E_VSI_SRIOV);
2008 is_netdev = !!(netdev);
2011 i40e_del_filter(vsi, netdev->dev_addr, vid, is_vf, is_netdev);
2013 list_for_each_entry(f, &vsi->mac_filter_list, list)
2014 i40e_del_filter(vsi, f->macaddr, vid, is_vf, is_netdev);
2016 /* go through all the filters for this VSI and if there is only
2017 * vid == 0 it means there are no other filters, so vid 0 must
2018 * be replaced with -1. This signifies that we should from now
2019 * on accept any traffic (with any tag present, or untagged)
2021 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2024 ether_addr_equal(netdev->dev_addr, f->macaddr))
2032 if (!filter_count && is_netdev) {
2033 i40e_del_filter(vsi, netdev->dev_addr, 0, is_vf, is_netdev);
2034 f = i40e_add_filter(vsi, netdev->dev_addr, I40E_VLAN_ANY,
2037 dev_info(&vsi->back->pdev->dev,
2038 "Could not add filter %d for %pM\n",
2039 I40E_VLAN_ANY, netdev->dev_addr);
2044 if (!filter_count) {
2045 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2046 i40e_del_filter(vsi, f->macaddr, 0, is_vf, is_netdev);
2047 add_f = i40e_add_filter(vsi, f->macaddr, I40E_VLAN_ANY,
2050 dev_info(&vsi->back->pdev->dev,
2051 "Could not add filter %d for %pM\n",
2052 I40E_VLAN_ANY, f->macaddr);
2058 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
2059 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
2062 return i40e_sync_vsi_filters(vsi);
2066 * i40e_vlan_rx_add_vid - Add a vlan id filter to HW offload
2067 * @netdev: network interface to be adjusted
2068 * @vid: vlan id to be added
2070 * net_device_ops implementation for adding vlan ids
2072 static int i40e_vlan_rx_add_vid(struct net_device *netdev,
2073 __always_unused __be16 proto, u16 vid)
2075 struct i40e_netdev_priv *np = netdev_priv(netdev);
2076 struct i40e_vsi *vsi = np->vsi;
2082 netdev_info(netdev, "adding %pM vid=%d\n", netdev->dev_addr, vid);
2084 /* If the network stack called us with vid = 0 then
2085 * it is asking to receive priority tagged packets with
2086 * vlan id 0. Our HW receives them by default when configured
2087 * to receive untagged packets so there is no need to add an
2088 * extra filter for vlan 0 tagged packets.
2091 ret = i40e_vsi_add_vlan(vsi, vid);
2093 if (!ret && (vid < VLAN_N_VID))
2094 set_bit(vid, vsi->active_vlans);
2100 * i40e_vlan_rx_kill_vid - Remove a vlan id filter from HW offload
2101 * @netdev: network interface to be adjusted
2102 * @vid: vlan id to be removed
2104 * net_device_ops implementation for removing vlan ids
2106 static int i40e_vlan_rx_kill_vid(struct net_device *netdev,
2107 __always_unused __be16 proto, u16 vid)
2109 struct i40e_netdev_priv *np = netdev_priv(netdev);
2110 struct i40e_vsi *vsi = np->vsi;
2112 netdev_info(netdev, "removing %pM vid=%d\n", netdev->dev_addr, vid);
2114 /* return code is ignored as there is nothing a user
2115 * can do about failure to remove and a log message was
2116 * already printed from the other function
2118 i40e_vsi_kill_vlan(vsi, vid);
2120 clear_bit(vid, vsi->active_vlans);
2126 * i40e_restore_vlan - Reinstate vlans when vsi/netdev comes back up
2127 * @vsi: the vsi being brought back up
2129 static void i40e_restore_vlan(struct i40e_vsi *vsi)
2136 i40e_vlan_rx_register(vsi->netdev, vsi->netdev->features);
2138 for_each_set_bit(vid, vsi->active_vlans, VLAN_N_VID)
2139 i40e_vlan_rx_add_vid(vsi->netdev, htons(ETH_P_8021Q),
2144 * i40e_vsi_add_pvid - Add pvid for the VSI
2145 * @vsi: the vsi being adjusted
2146 * @vid: the vlan id to set as a PVID
2148 int i40e_vsi_add_pvid(struct i40e_vsi *vsi, u16 vid)
2150 struct i40e_vsi_context ctxt;
2153 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2154 vsi->info.pvid = cpu_to_le16(vid);
2155 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_TAGGED |
2156 I40E_AQ_VSI_PVLAN_INSERT_PVID |
2157 I40E_AQ_VSI_PVLAN_EMOD_STR;
2159 ctxt.seid = vsi->seid;
2160 memcpy(&ctxt.info, &vsi->info, sizeof(vsi->info));
2161 aq_ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2163 dev_info(&vsi->back->pdev->dev,
2164 "%s: update vsi failed, aq_err=%d\n",
2165 __func__, vsi->back->hw.aq.asq_last_status);
2173 * i40e_vsi_remove_pvid - Remove the pvid from the VSI
2174 * @vsi: the vsi being adjusted
2176 * Just use the vlan_rx_register() service to put it back to normal
2178 void i40e_vsi_remove_pvid(struct i40e_vsi *vsi)
2180 i40e_vlan_stripping_disable(vsi);
2186 * i40e_vsi_setup_tx_resources - Allocate VSI Tx queue resources
2187 * @vsi: ptr to the VSI
2189 * If this function returns with an error, then it's possible one or
2190 * more of the rings is populated (while the rest are not). It is the
2191 * callers duty to clean those orphaned rings.
2193 * Return 0 on success, negative on failure
2195 static int i40e_vsi_setup_tx_resources(struct i40e_vsi *vsi)
2199 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2200 err = i40e_setup_tx_descriptors(vsi->tx_rings[i]);
2206 * i40e_vsi_free_tx_resources - Free Tx resources for VSI queues
2207 * @vsi: ptr to the VSI
2209 * Free VSI's transmit software resources
2211 static void i40e_vsi_free_tx_resources(struct i40e_vsi *vsi)
2218 for (i = 0; i < vsi->num_queue_pairs; i++)
2219 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc)
2220 i40e_free_tx_resources(vsi->tx_rings[i]);
2224 * i40e_vsi_setup_rx_resources - Allocate VSI queues Rx resources
2225 * @vsi: ptr to the VSI
2227 * If this function returns with an error, then it's possible one or
2228 * more of the rings is populated (while the rest are not). It is the
2229 * callers duty to clean those orphaned rings.
2231 * Return 0 on success, negative on failure
2233 static int i40e_vsi_setup_rx_resources(struct i40e_vsi *vsi)
2237 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2238 err = i40e_setup_rx_descriptors(vsi->rx_rings[i]);
2243 * i40e_vsi_free_rx_resources - Free Rx Resources for VSI queues
2244 * @vsi: ptr to the VSI
2246 * Free all receive software resources
2248 static void i40e_vsi_free_rx_resources(struct i40e_vsi *vsi)
2255 for (i = 0; i < vsi->num_queue_pairs; i++)
2256 if (vsi->rx_rings[i] && vsi->rx_rings[i]->desc)
2257 i40e_free_rx_resources(vsi->rx_rings[i]);
2261 * i40e_configure_tx_ring - Configure a transmit ring context and rest
2262 * @ring: The Tx ring to configure
2264 * Configure the Tx descriptor ring in the HMC context.
2266 static int i40e_configure_tx_ring(struct i40e_ring *ring)
2268 struct i40e_vsi *vsi = ring->vsi;
2269 u16 pf_q = vsi->base_queue + ring->queue_index;
2270 struct i40e_hw *hw = &vsi->back->hw;
2271 struct i40e_hmc_obj_txq tx_ctx;
2272 i40e_status err = 0;
2275 /* some ATR related tx ring init */
2276 if (vsi->back->flags & I40E_FLAG_FD_ATR_ENABLED) {
2277 ring->atr_sample_rate = vsi->back->atr_sample_rate;
2278 ring->atr_count = 0;
2280 ring->atr_sample_rate = 0;
2283 /* initialize XPS */
2284 if (ring->q_vector && ring->netdev &&
2285 vsi->tc_config.numtc <= 1 &&
2286 !test_and_set_bit(__I40E_TX_XPS_INIT_DONE, &ring->state))
2287 netif_set_xps_queue(ring->netdev,
2288 &ring->q_vector->affinity_mask,
2291 /* clear the context structure first */
2292 memset(&tx_ctx, 0, sizeof(tx_ctx));
2294 tx_ctx.new_context = 1;
2295 tx_ctx.base = (ring->dma / 128);
2296 tx_ctx.qlen = ring->count;
2297 tx_ctx.fd_ena = !!(vsi->back->flags & (I40E_FLAG_FD_SB_ENABLED |
2298 I40E_FLAG_FD_ATR_ENABLED));
2299 tx_ctx.timesync_ena = !!(vsi->back->flags & I40E_FLAG_PTP);
2300 /* FDIR VSI tx ring can still use RS bit and writebacks */
2301 if (vsi->type != I40E_VSI_FDIR)
2302 tx_ctx.head_wb_ena = 1;
2303 tx_ctx.head_wb_addr = ring->dma +
2304 (ring->count * sizeof(struct i40e_tx_desc));
2306 /* As part of VSI creation/update, FW allocates certain
2307 * Tx arbitration queue sets for each TC enabled for
2308 * the VSI. The FW returns the handles to these queue
2309 * sets as part of the response buffer to Add VSI,
2310 * Update VSI, etc. AQ commands. It is expected that
2311 * these queue set handles be associated with the Tx
2312 * queues by the driver as part of the TX queue context
2313 * initialization. This has to be done regardless of
2314 * DCB as by default everything is mapped to TC0.
2316 tx_ctx.rdylist = le16_to_cpu(vsi->info.qs_handle[ring->dcb_tc]);
2317 tx_ctx.rdylist_act = 0;
2319 /* clear the context in the HMC */
2320 err = i40e_clear_lan_tx_queue_context(hw, pf_q);
2322 dev_info(&vsi->back->pdev->dev,
2323 "Failed to clear LAN Tx queue context on Tx ring %d (pf_q %d), error: %d\n",
2324 ring->queue_index, pf_q, err);
2328 /* set the context in the HMC */
2329 err = i40e_set_lan_tx_queue_context(hw, pf_q, &tx_ctx);
2331 dev_info(&vsi->back->pdev->dev,
2332 "Failed to set LAN Tx queue context on Tx ring %d (pf_q %d, error: %d\n",
2333 ring->queue_index, pf_q, err);
2337 /* Now associate this queue with this PCI function */
2338 if (vsi->type == I40E_VSI_VMDQ2)
2339 qtx_ctl = I40E_QTX_CTL_VM_QUEUE;
2341 qtx_ctl = I40E_QTX_CTL_PF_QUEUE;
2342 qtx_ctl |= ((hw->pf_id << I40E_QTX_CTL_PF_INDX_SHIFT) &
2343 I40E_QTX_CTL_PF_INDX_MASK);
2344 wr32(hw, I40E_QTX_CTL(pf_q), qtx_ctl);
2347 clear_bit(__I40E_HANG_CHECK_ARMED, &ring->state);
2349 /* cache tail off for easier writes later */
2350 ring->tail = hw->hw_addr + I40E_QTX_TAIL(pf_q);
2356 * i40e_configure_rx_ring - Configure a receive ring context
2357 * @ring: The Rx ring to configure
2359 * Configure the Rx descriptor ring in the HMC context.
2361 static int i40e_configure_rx_ring(struct i40e_ring *ring)
2363 struct i40e_vsi *vsi = ring->vsi;
2364 u32 chain_len = vsi->back->hw.func_caps.rx_buf_chain_len;
2365 u16 pf_q = vsi->base_queue + ring->queue_index;
2366 struct i40e_hw *hw = &vsi->back->hw;
2367 struct i40e_hmc_obj_rxq rx_ctx;
2368 i40e_status err = 0;
2372 /* clear the context structure first */
2373 memset(&rx_ctx, 0, sizeof(rx_ctx));
2375 ring->rx_buf_len = vsi->rx_buf_len;
2376 ring->rx_hdr_len = vsi->rx_hdr_len;
2378 rx_ctx.dbuff = ring->rx_buf_len >> I40E_RXQ_CTX_DBUFF_SHIFT;
2379 rx_ctx.hbuff = ring->rx_hdr_len >> I40E_RXQ_CTX_HBUFF_SHIFT;
2381 rx_ctx.base = (ring->dma / 128);
2382 rx_ctx.qlen = ring->count;
2384 if (vsi->back->flags & I40E_FLAG_16BYTE_RX_DESC_ENABLED) {
2385 set_ring_16byte_desc_enabled(ring);
2391 rx_ctx.dtype = vsi->dtype;
2393 set_ring_ps_enabled(ring);
2394 rx_ctx.hsplit_0 = I40E_RX_SPLIT_L2 |
2396 I40E_RX_SPLIT_TCP_UDP |
2399 rx_ctx.hsplit_0 = 0;
2402 rx_ctx.rxmax = min_t(u16, vsi->max_frame,
2403 (chain_len * ring->rx_buf_len));
2404 rx_ctx.tphrdesc_ena = 1;
2405 rx_ctx.tphwdesc_ena = 1;
2406 rx_ctx.tphdata_ena = 1;
2407 rx_ctx.tphhead_ena = 1;
2408 if (hw->revision_id == 0)
2409 rx_ctx.lrxqthresh = 0;
2411 rx_ctx.lrxqthresh = 2;
2412 rx_ctx.crcstrip = 1;
2415 /* set the prefena field to 1 because the manual says to */
2418 /* clear the context in the HMC */
2419 err = i40e_clear_lan_rx_queue_context(hw, pf_q);
2421 dev_info(&vsi->back->pdev->dev,
2422 "Failed to clear LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
2423 ring->queue_index, pf_q, err);
2427 /* set the context in the HMC */
2428 err = i40e_set_lan_rx_queue_context(hw, pf_q, &rx_ctx);
2430 dev_info(&vsi->back->pdev->dev,
2431 "Failed to set LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
2432 ring->queue_index, pf_q, err);
2436 /* cache tail for quicker writes, and clear the reg before use */
2437 ring->tail = hw->hw_addr + I40E_QRX_TAIL(pf_q);
2438 writel(0, ring->tail);
2440 i40e_alloc_rx_buffers(ring, I40E_DESC_UNUSED(ring));
2446 * i40e_vsi_configure_tx - Configure the VSI for Tx
2447 * @vsi: VSI structure describing this set of rings and resources
2449 * Configure the Tx VSI for operation.
2451 static int i40e_vsi_configure_tx(struct i40e_vsi *vsi)
2456 for (i = 0; (i < vsi->num_queue_pairs) && !err; i++)
2457 err = i40e_configure_tx_ring(vsi->tx_rings[i]);
2463 * i40e_vsi_configure_rx - Configure the VSI for Rx
2464 * @vsi: the VSI being configured
2466 * Configure the Rx VSI for operation.
2468 static int i40e_vsi_configure_rx(struct i40e_vsi *vsi)
2473 if (vsi->netdev && (vsi->netdev->mtu > ETH_DATA_LEN))
2474 vsi->max_frame = vsi->netdev->mtu + ETH_HLEN
2475 + ETH_FCS_LEN + VLAN_HLEN;
2477 vsi->max_frame = I40E_RXBUFFER_2048;
2479 /* figure out correct receive buffer length */
2480 switch (vsi->back->flags & (I40E_FLAG_RX_1BUF_ENABLED |
2481 I40E_FLAG_RX_PS_ENABLED)) {
2482 case I40E_FLAG_RX_1BUF_ENABLED:
2483 vsi->rx_hdr_len = 0;
2484 vsi->rx_buf_len = vsi->max_frame;
2485 vsi->dtype = I40E_RX_DTYPE_NO_SPLIT;
2487 case I40E_FLAG_RX_PS_ENABLED:
2488 vsi->rx_hdr_len = I40E_RX_HDR_SIZE;
2489 vsi->rx_buf_len = I40E_RXBUFFER_2048;
2490 vsi->dtype = I40E_RX_DTYPE_HEADER_SPLIT;
2493 vsi->rx_hdr_len = I40E_RX_HDR_SIZE;
2494 vsi->rx_buf_len = I40E_RXBUFFER_2048;
2495 vsi->dtype = I40E_RX_DTYPE_SPLIT_ALWAYS;
2499 /* round up for the chip's needs */
2500 vsi->rx_hdr_len = ALIGN(vsi->rx_hdr_len,
2501 (1 << I40E_RXQ_CTX_HBUFF_SHIFT));
2502 vsi->rx_buf_len = ALIGN(vsi->rx_buf_len,
2503 (1 << I40E_RXQ_CTX_DBUFF_SHIFT));
2505 /* set up individual rings */
2506 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2507 err = i40e_configure_rx_ring(vsi->rx_rings[i]);
2513 * i40e_vsi_config_dcb_rings - Update rings to reflect DCB TC
2514 * @vsi: ptr to the VSI
2516 static void i40e_vsi_config_dcb_rings(struct i40e_vsi *vsi)
2518 struct i40e_ring *tx_ring, *rx_ring;
2519 u16 qoffset, qcount;
2522 if (!(vsi->back->flags & I40E_FLAG_DCB_ENABLED))
2525 for (n = 0; n < I40E_MAX_TRAFFIC_CLASS; n++) {
2526 if (!(vsi->tc_config.enabled_tc & (1 << n)))
2529 qoffset = vsi->tc_config.tc_info[n].qoffset;
2530 qcount = vsi->tc_config.tc_info[n].qcount;
2531 for (i = qoffset; i < (qoffset + qcount); i++) {
2532 rx_ring = vsi->rx_rings[i];
2533 tx_ring = vsi->tx_rings[i];
2534 rx_ring->dcb_tc = n;
2535 tx_ring->dcb_tc = n;
2541 * i40e_set_vsi_rx_mode - Call set_rx_mode on a VSI
2542 * @vsi: ptr to the VSI
2544 static void i40e_set_vsi_rx_mode(struct i40e_vsi *vsi)
2547 i40e_set_rx_mode(vsi->netdev);
2551 * i40e_fdir_filter_restore - Restore the Sideband Flow Director filters
2552 * @vsi: Pointer to the targeted VSI
2554 * This function replays the hlist on the hw where all the SB Flow Director
2555 * filters were saved.
2557 static void i40e_fdir_filter_restore(struct i40e_vsi *vsi)
2559 struct i40e_fdir_filter *filter;
2560 struct i40e_pf *pf = vsi->back;
2561 struct hlist_node *node;
2563 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
2566 hlist_for_each_entry_safe(filter, node,
2567 &pf->fdir_filter_list, fdir_node) {
2568 i40e_add_del_fdir(vsi, filter, true);
2573 * i40e_vsi_configure - Set up the VSI for action
2574 * @vsi: the VSI being configured
2576 static int i40e_vsi_configure(struct i40e_vsi *vsi)
2580 i40e_set_vsi_rx_mode(vsi);
2581 i40e_restore_vlan(vsi);
2582 i40e_vsi_config_dcb_rings(vsi);
2583 err = i40e_vsi_configure_tx(vsi);
2585 err = i40e_vsi_configure_rx(vsi);
2591 * i40e_vsi_configure_msix - MSIX mode Interrupt Config in the HW
2592 * @vsi: the VSI being configured
2594 static void i40e_vsi_configure_msix(struct i40e_vsi *vsi)
2596 struct i40e_pf *pf = vsi->back;
2597 struct i40e_q_vector *q_vector;
2598 struct i40e_hw *hw = &pf->hw;
2604 /* The interrupt indexing is offset by 1 in the PFINT_ITRn
2605 * and PFINT_LNKLSTn registers, e.g.:
2606 * PFINT_ITRn[0..n-1] gets msix-1..msix-n (qpair interrupts)
2608 qp = vsi->base_queue;
2609 vector = vsi->base_vector;
2610 for (i = 0; i < vsi->num_q_vectors; i++, vector++) {
2611 q_vector = vsi->q_vectors[i];
2612 q_vector->rx.itr = ITR_TO_REG(vsi->rx_itr_setting);
2613 q_vector->rx.latency_range = I40E_LOW_LATENCY;
2614 wr32(hw, I40E_PFINT_ITRN(I40E_RX_ITR, vector - 1),
2616 q_vector->tx.itr = ITR_TO_REG(vsi->tx_itr_setting);
2617 q_vector->tx.latency_range = I40E_LOW_LATENCY;
2618 wr32(hw, I40E_PFINT_ITRN(I40E_TX_ITR, vector - 1),
2621 /* Linked list for the queuepairs assigned to this vector */
2622 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), qp);
2623 for (q = 0; q < q_vector->num_ringpairs; q++) {
2624 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
2625 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
2626 (vector << I40E_QINT_RQCTL_MSIX_INDX_SHIFT) |
2627 (qp << I40E_QINT_RQCTL_NEXTQ_INDX_SHIFT)|
2629 << I40E_QINT_RQCTL_NEXTQ_TYPE_SHIFT);
2631 wr32(hw, I40E_QINT_RQCTL(qp), val);
2633 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
2634 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
2635 (vector << I40E_QINT_TQCTL_MSIX_INDX_SHIFT) |
2636 ((qp+1) << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT)|
2638 << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
2640 /* Terminate the linked list */
2641 if (q == (q_vector->num_ringpairs - 1))
2642 val |= (I40E_QUEUE_END_OF_LIST
2643 << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
2645 wr32(hw, I40E_QINT_TQCTL(qp), val);
2654 * i40e_enable_misc_int_causes - enable the non-queue interrupts
2655 * @hw: ptr to the hardware info
2657 static void i40e_enable_misc_int_causes(struct i40e_hw *hw)
2661 /* clear things first */
2662 wr32(hw, I40E_PFINT_ICR0_ENA, 0); /* disable all */
2663 rd32(hw, I40E_PFINT_ICR0); /* read to clear */
2665 val = I40E_PFINT_ICR0_ENA_ECC_ERR_MASK |
2666 I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK |
2667 I40E_PFINT_ICR0_ENA_GRST_MASK |
2668 I40E_PFINT_ICR0_ENA_PCI_EXCEPTION_MASK |
2669 I40E_PFINT_ICR0_ENA_GPIO_MASK |
2670 I40E_PFINT_ICR0_ENA_TIMESYNC_MASK |
2671 I40E_PFINT_ICR0_ENA_HMC_ERR_MASK |
2672 I40E_PFINT_ICR0_ENA_VFLR_MASK |
2673 I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
2675 wr32(hw, I40E_PFINT_ICR0_ENA, val);
2677 /* SW_ITR_IDX = 0, but don't change INTENA */
2678 wr32(hw, I40E_PFINT_DYN_CTL0, I40E_PFINT_DYN_CTL0_SW_ITR_INDX_MASK |
2679 I40E_PFINT_DYN_CTL0_INTENA_MSK_MASK);
2681 /* OTHER_ITR_IDX = 0 */
2682 wr32(hw, I40E_PFINT_STAT_CTL0, 0);
2686 * i40e_configure_msi_and_legacy - Legacy mode interrupt config in the HW
2687 * @vsi: the VSI being configured
2689 static void i40e_configure_msi_and_legacy(struct i40e_vsi *vsi)
2691 struct i40e_q_vector *q_vector = vsi->q_vectors[0];
2692 struct i40e_pf *pf = vsi->back;
2693 struct i40e_hw *hw = &pf->hw;
2696 /* set the ITR configuration */
2697 q_vector->rx.itr = ITR_TO_REG(vsi->rx_itr_setting);
2698 q_vector->rx.latency_range = I40E_LOW_LATENCY;
2699 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), q_vector->rx.itr);
2700 q_vector->tx.itr = ITR_TO_REG(vsi->tx_itr_setting);
2701 q_vector->tx.latency_range = I40E_LOW_LATENCY;
2702 wr32(hw, I40E_PFINT_ITR0(I40E_TX_ITR), q_vector->tx.itr);
2704 i40e_enable_misc_int_causes(hw);
2706 /* FIRSTQ_INDX = 0, FIRSTQ_TYPE = 0 (rx) */
2707 wr32(hw, I40E_PFINT_LNKLST0, 0);
2709 /* Associate the queue pair to the vector and enable the queue int */
2710 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
2711 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
2712 (I40E_QUEUE_TYPE_TX << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
2714 wr32(hw, I40E_QINT_RQCTL(0), val);
2716 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
2717 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
2718 (I40E_QUEUE_END_OF_LIST << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
2720 wr32(hw, I40E_QINT_TQCTL(0), val);
2725 * i40e_irq_dynamic_disable_icr0 - Disable default interrupt generation for icr0
2726 * @pf: board private structure
2728 void i40e_irq_dynamic_disable_icr0(struct i40e_pf *pf)
2730 struct i40e_hw *hw = &pf->hw;
2732 wr32(hw, I40E_PFINT_DYN_CTL0,
2733 I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT);
2738 * i40e_irq_dynamic_enable_icr0 - Enable default interrupt generation for icr0
2739 * @pf: board private structure
2741 void i40e_irq_dynamic_enable_icr0(struct i40e_pf *pf)
2743 struct i40e_hw *hw = &pf->hw;
2746 val = I40E_PFINT_DYN_CTL0_INTENA_MASK |
2747 I40E_PFINT_DYN_CTL0_CLEARPBA_MASK |
2748 (I40E_ITR_NONE << I40E_PFINT_DYN_CTL0_ITR_INDX_SHIFT);
2750 wr32(hw, I40E_PFINT_DYN_CTL0, val);
2755 * i40e_irq_dynamic_enable - Enable default interrupt generation settings
2756 * @vsi: pointer to a vsi
2757 * @vector: enable a particular Hw Interrupt vector
2759 void i40e_irq_dynamic_enable(struct i40e_vsi *vsi, int vector)
2761 struct i40e_pf *pf = vsi->back;
2762 struct i40e_hw *hw = &pf->hw;
2765 val = I40E_PFINT_DYN_CTLN_INTENA_MASK |
2766 I40E_PFINT_DYN_CTLN_CLEARPBA_MASK |
2767 (I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT);
2768 wr32(hw, I40E_PFINT_DYN_CTLN(vector - 1), val);
2769 /* skip the flush */
2773 * i40e_irq_dynamic_disable - Disable default interrupt generation settings
2774 * @vsi: pointer to a vsi
2775 * @vector: enable a particular Hw Interrupt vector
2777 void i40e_irq_dynamic_disable(struct i40e_vsi *vsi, int vector)
2779 struct i40e_pf *pf = vsi->back;
2780 struct i40e_hw *hw = &pf->hw;
2783 val = I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT;
2784 wr32(hw, I40E_PFINT_DYN_CTLN(vector - 1), val);
2789 * i40e_msix_clean_rings - MSIX mode Interrupt Handler
2790 * @irq: interrupt number
2791 * @data: pointer to a q_vector
2793 static irqreturn_t i40e_msix_clean_rings(int irq, void *data)
2795 struct i40e_q_vector *q_vector = data;
2797 if (!q_vector->tx.ring && !q_vector->rx.ring)
2800 napi_schedule(&q_vector->napi);
2806 * i40e_vsi_request_irq_msix - Initialize MSI-X interrupts
2807 * @vsi: the VSI being configured
2808 * @basename: name for the vector
2810 * Allocates MSI-X vectors and requests interrupts from the kernel.
2812 static int i40e_vsi_request_irq_msix(struct i40e_vsi *vsi, char *basename)
2814 int q_vectors = vsi->num_q_vectors;
2815 struct i40e_pf *pf = vsi->back;
2816 int base = vsi->base_vector;
2821 for (vector = 0; vector < q_vectors; vector++) {
2822 struct i40e_q_vector *q_vector = vsi->q_vectors[vector];
2824 if (q_vector->tx.ring && q_vector->rx.ring) {
2825 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2826 "%s-%s-%d", basename, "TxRx", rx_int_idx++);
2828 } else if (q_vector->rx.ring) {
2829 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2830 "%s-%s-%d", basename, "rx", rx_int_idx++);
2831 } else if (q_vector->tx.ring) {
2832 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2833 "%s-%s-%d", basename, "tx", tx_int_idx++);
2835 /* skip this unused q_vector */
2838 err = request_irq(pf->msix_entries[base + vector].vector,
2844 dev_info(&pf->pdev->dev,
2845 "%s: request_irq failed, error: %d\n",
2847 goto free_queue_irqs;
2849 /* assign the mask for this irq */
2850 irq_set_affinity_hint(pf->msix_entries[base + vector].vector,
2851 &q_vector->affinity_mask);
2854 vsi->irqs_ready = true;
2860 irq_set_affinity_hint(pf->msix_entries[base + vector].vector,
2862 free_irq(pf->msix_entries[base + vector].vector,
2863 &(vsi->q_vectors[vector]));
2869 * i40e_vsi_disable_irq - Mask off queue interrupt generation on the VSI
2870 * @vsi: the VSI being un-configured
2872 static void i40e_vsi_disable_irq(struct i40e_vsi *vsi)
2874 struct i40e_pf *pf = vsi->back;
2875 struct i40e_hw *hw = &pf->hw;
2876 int base = vsi->base_vector;
2879 for (i = 0; i < vsi->num_queue_pairs; i++) {
2880 wr32(hw, I40E_QINT_TQCTL(vsi->tx_rings[i]->reg_idx), 0);
2881 wr32(hw, I40E_QINT_RQCTL(vsi->rx_rings[i]->reg_idx), 0);
2884 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
2885 for (i = vsi->base_vector;
2886 i < (vsi->num_q_vectors + vsi->base_vector); i++)
2887 wr32(hw, I40E_PFINT_DYN_CTLN(i - 1), 0);
2890 for (i = 0; i < vsi->num_q_vectors; i++)
2891 synchronize_irq(pf->msix_entries[i + base].vector);
2893 /* Legacy and MSI mode - this stops all interrupt handling */
2894 wr32(hw, I40E_PFINT_ICR0_ENA, 0);
2895 wr32(hw, I40E_PFINT_DYN_CTL0, 0);
2897 synchronize_irq(pf->pdev->irq);
2902 * i40e_vsi_enable_irq - Enable IRQ for the given VSI
2903 * @vsi: the VSI being configured
2905 static int i40e_vsi_enable_irq(struct i40e_vsi *vsi)
2907 struct i40e_pf *pf = vsi->back;
2910 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
2911 for (i = vsi->base_vector;
2912 i < (vsi->num_q_vectors + vsi->base_vector); i++)
2913 i40e_irq_dynamic_enable(vsi, i);
2915 i40e_irq_dynamic_enable_icr0(pf);
2918 i40e_flush(&pf->hw);
2923 * i40e_stop_misc_vector - Stop the vector that handles non-queue events
2924 * @pf: board private structure
2926 static void i40e_stop_misc_vector(struct i40e_pf *pf)
2929 wr32(&pf->hw, I40E_PFINT_ICR0_ENA, 0);
2930 i40e_flush(&pf->hw);
2934 * i40e_intr - MSI/Legacy and non-queue interrupt handler
2935 * @irq: interrupt number
2936 * @data: pointer to a q_vector
2938 * This is the handler used for all MSI/Legacy interrupts, and deals
2939 * with both queue and non-queue interrupts. This is also used in
2940 * MSIX mode to handle the non-queue interrupts.
2942 static irqreturn_t i40e_intr(int irq, void *data)
2944 struct i40e_pf *pf = (struct i40e_pf *)data;
2945 struct i40e_hw *hw = &pf->hw;
2946 irqreturn_t ret = IRQ_NONE;
2947 u32 icr0, icr0_remaining;
2950 icr0 = rd32(hw, I40E_PFINT_ICR0);
2951 ena_mask = rd32(hw, I40E_PFINT_ICR0_ENA);
2953 /* if sharing a legacy IRQ, we might get called w/o an intr pending */
2954 if ((icr0 & I40E_PFINT_ICR0_INTEVENT_MASK) == 0)
2957 /* if interrupt but no bits showing, must be SWINT */
2958 if (((icr0 & ~I40E_PFINT_ICR0_INTEVENT_MASK) == 0) ||
2959 (icr0 & I40E_PFINT_ICR0_SWINT_MASK))
2962 /* only q0 is used in MSI/Legacy mode, and none are used in MSIX */
2963 if (icr0 & I40E_PFINT_ICR0_QUEUE_0_MASK) {
2965 /* temporarily disable queue cause for NAPI processing */
2966 u32 qval = rd32(hw, I40E_QINT_RQCTL(0));
2967 qval &= ~I40E_QINT_RQCTL_CAUSE_ENA_MASK;
2968 wr32(hw, I40E_QINT_RQCTL(0), qval);
2970 qval = rd32(hw, I40E_QINT_TQCTL(0));
2971 qval &= ~I40E_QINT_TQCTL_CAUSE_ENA_MASK;
2972 wr32(hw, I40E_QINT_TQCTL(0), qval);
2974 if (!test_bit(__I40E_DOWN, &pf->state))
2975 napi_schedule(&pf->vsi[pf->lan_vsi]->q_vectors[0]->napi);
2978 if (icr0 & I40E_PFINT_ICR0_ADMINQ_MASK) {
2979 ena_mask &= ~I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
2980 set_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state);
2983 if (icr0 & I40E_PFINT_ICR0_MAL_DETECT_MASK) {
2984 ena_mask &= ~I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
2985 set_bit(__I40E_MDD_EVENT_PENDING, &pf->state);
2988 if (icr0 & I40E_PFINT_ICR0_VFLR_MASK) {
2989 ena_mask &= ~I40E_PFINT_ICR0_ENA_VFLR_MASK;
2990 set_bit(__I40E_VFLR_EVENT_PENDING, &pf->state);
2993 if (icr0 & I40E_PFINT_ICR0_GRST_MASK) {
2994 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state))
2995 set_bit(__I40E_RESET_INTR_RECEIVED, &pf->state);
2996 ena_mask &= ~I40E_PFINT_ICR0_ENA_GRST_MASK;
2997 val = rd32(hw, I40E_GLGEN_RSTAT);
2998 val = (val & I40E_GLGEN_RSTAT_RESET_TYPE_MASK)
2999 >> I40E_GLGEN_RSTAT_RESET_TYPE_SHIFT;
3000 if (val == I40E_RESET_CORER) {
3002 } else if (val == I40E_RESET_GLOBR) {
3004 } else if (val == I40E_RESET_EMPR) {
3006 set_bit(__I40E_EMP_RESET_REQUESTED, &pf->state);
3010 if (icr0 & I40E_PFINT_ICR0_HMC_ERR_MASK) {
3011 icr0 &= ~I40E_PFINT_ICR0_HMC_ERR_MASK;
3012 dev_info(&pf->pdev->dev, "HMC error interrupt\n");
3015 if (icr0 & I40E_PFINT_ICR0_TIMESYNC_MASK) {
3016 u32 prttsyn_stat = rd32(hw, I40E_PRTTSYN_STAT_0);
3018 if (prttsyn_stat & I40E_PRTTSYN_STAT_0_TXTIME_MASK) {
3019 icr0 &= ~I40E_PFINT_ICR0_ENA_TIMESYNC_MASK;
3020 i40e_ptp_tx_hwtstamp(pf);
3024 /* If a critical error is pending we have no choice but to reset the
3026 * Report and mask out any remaining unexpected interrupts.
3028 icr0_remaining = icr0 & ena_mask;
3029 if (icr0_remaining) {
3030 dev_info(&pf->pdev->dev, "unhandled interrupt icr0=0x%08x\n",
3032 if ((icr0_remaining & I40E_PFINT_ICR0_PE_CRITERR_MASK) ||
3033 (icr0_remaining & I40E_PFINT_ICR0_PCI_EXCEPTION_MASK) ||
3034 (icr0_remaining & I40E_PFINT_ICR0_ECC_ERR_MASK)) {
3035 dev_info(&pf->pdev->dev, "device will be reset\n");
3036 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
3037 i40e_service_event_schedule(pf);
3039 ena_mask &= ~icr0_remaining;
3044 /* re-enable interrupt causes */
3045 wr32(hw, I40E_PFINT_ICR0_ENA, ena_mask);
3046 if (!test_bit(__I40E_DOWN, &pf->state)) {
3047 i40e_service_event_schedule(pf);
3048 i40e_irq_dynamic_enable_icr0(pf);
3055 * i40e_clean_fdir_tx_irq - Reclaim resources after transmit completes
3056 * @tx_ring: tx ring to clean
3057 * @budget: how many cleans we're allowed
3059 * Returns true if there's any budget left (e.g. the clean is finished)
3061 static bool i40e_clean_fdir_tx_irq(struct i40e_ring *tx_ring, int budget)
3063 struct i40e_vsi *vsi = tx_ring->vsi;
3064 u16 i = tx_ring->next_to_clean;
3065 struct i40e_tx_buffer *tx_buf;
3066 struct i40e_tx_desc *tx_desc;
3068 tx_buf = &tx_ring->tx_bi[i];
3069 tx_desc = I40E_TX_DESC(tx_ring, i);
3070 i -= tx_ring->count;
3073 struct i40e_tx_desc *eop_desc = tx_buf->next_to_watch;
3075 /* if next_to_watch is not set then there is no work pending */
3079 /* prevent any other reads prior to eop_desc */
3080 read_barrier_depends();
3082 /* if the descriptor isn't done, no work yet to do */
3083 if (!(eop_desc->cmd_type_offset_bsz &
3084 cpu_to_le64(I40E_TX_DESC_DTYPE_DESC_DONE)))
3087 /* clear next_to_watch to prevent false hangs */
3088 tx_buf->next_to_watch = NULL;
3090 /* unmap skb header data */
3091 dma_unmap_single(tx_ring->dev,
3092 dma_unmap_addr(tx_buf, dma),
3093 dma_unmap_len(tx_buf, len),
3096 dma_unmap_len_set(tx_buf, len, 0);
3099 /* move to the next desc and buffer to clean */
3104 i -= tx_ring->count;
3105 tx_buf = tx_ring->tx_bi;
3106 tx_desc = I40E_TX_DESC(tx_ring, 0);
3109 /* update budget accounting */
3111 } while (likely(budget));
3113 i += tx_ring->count;
3114 tx_ring->next_to_clean = i;
3116 if (vsi->back->flags & I40E_FLAG_MSIX_ENABLED) {
3117 i40e_irq_dynamic_enable(vsi,
3118 tx_ring->q_vector->v_idx + vsi->base_vector);
3124 * i40e_fdir_clean_ring - Interrupt Handler for FDIR SB ring
3125 * @irq: interrupt number
3126 * @data: pointer to a q_vector
3128 static irqreturn_t i40e_fdir_clean_ring(int irq, void *data)
3130 struct i40e_q_vector *q_vector = data;
3131 struct i40e_vsi *vsi;
3133 if (!q_vector->tx.ring)
3136 vsi = q_vector->tx.ring->vsi;
3137 i40e_clean_fdir_tx_irq(q_vector->tx.ring, vsi->work_limit);
3143 * i40e_map_vector_to_qp - Assigns the queue pair to the vector
3144 * @vsi: the VSI being configured
3145 * @v_idx: vector index
3146 * @qp_idx: queue pair index
3148 static void map_vector_to_qp(struct i40e_vsi *vsi, int v_idx, int qp_idx)
3150 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
3151 struct i40e_ring *tx_ring = vsi->tx_rings[qp_idx];
3152 struct i40e_ring *rx_ring = vsi->rx_rings[qp_idx];
3154 tx_ring->q_vector = q_vector;
3155 tx_ring->next = q_vector->tx.ring;
3156 q_vector->tx.ring = tx_ring;
3157 q_vector->tx.count++;
3159 rx_ring->q_vector = q_vector;
3160 rx_ring->next = q_vector->rx.ring;
3161 q_vector->rx.ring = rx_ring;
3162 q_vector->rx.count++;
3166 * i40e_vsi_map_rings_to_vectors - Maps descriptor rings to vectors
3167 * @vsi: the VSI being configured
3169 * This function maps descriptor rings to the queue-specific vectors
3170 * we were allotted through the MSI-X enabling code. Ideally, we'd have
3171 * one vector per queue pair, but on a constrained vector budget, we
3172 * group the queue pairs as "efficiently" as possible.
3174 static void i40e_vsi_map_rings_to_vectors(struct i40e_vsi *vsi)
3176 int qp_remaining = vsi->num_queue_pairs;
3177 int q_vectors = vsi->num_q_vectors;
3182 /* If we don't have enough vectors for a 1-to-1 mapping, we'll have to
3183 * group them so there are multiple queues per vector.
3184 * It is also important to go through all the vectors available to be
3185 * sure that if we don't use all the vectors, that the remaining vectors
3186 * are cleared. This is especially important when decreasing the
3187 * number of queues in use.
3189 for (; v_start < q_vectors; v_start++) {
3190 struct i40e_q_vector *q_vector = vsi->q_vectors[v_start];
3192 num_ringpairs = DIV_ROUND_UP(qp_remaining, q_vectors - v_start);
3194 q_vector->num_ringpairs = num_ringpairs;
3196 q_vector->rx.count = 0;
3197 q_vector->tx.count = 0;
3198 q_vector->rx.ring = NULL;
3199 q_vector->tx.ring = NULL;
3201 while (num_ringpairs--) {
3202 map_vector_to_qp(vsi, v_start, qp_idx);
3210 * i40e_vsi_request_irq - Request IRQ from the OS
3211 * @vsi: the VSI being configured
3212 * @basename: name for the vector
3214 static int i40e_vsi_request_irq(struct i40e_vsi *vsi, char *basename)
3216 struct i40e_pf *pf = vsi->back;
3219 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
3220 err = i40e_vsi_request_irq_msix(vsi, basename);
3221 else if (pf->flags & I40E_FLAG_MSI_ENABLED)
3222 err = request_irq(pf->pdev->irq, i40e_intr, 0,
3223 pf->misc_int_name, pf);
3225 err = request_irq(pf->pdev->irq, i40e_intr, IRQF_SHARED,
3226 pf->misc_int_name, pf);
3229 dev_info(&pf->pdev->dev, "request_irq failed, Error %d\n", err);
3234 #ifdef CONFIG_NET_POLL_CONTROLLER
3236 * i40e_netpoll - A Polling 'interrupt'handler
3237 * @netdev: network interface device structure
3239 * This is used by netconsole to send skbs without having to re-enable
3240 * interrupts. It's not called while the normal interrupt routine is executing.
3242 static void i40e_netpoll(struct net_device *netdev)
3244 struct i40e_netdev_priv *np = netdev_priv(netdev);
3245 struct i40e_vsi *vsi = np->vsi;
3246 struct i40e_pf *pf = vsi->back;
3249 /* if interface is down do nothing */
3250 if (test_bit(__I40E_DOWN, &vsi->state))
3253 pf->flags |= I40E_FLAG_IN_NETPOLL;
3254 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3255 for (i = 0; i < vsi->num_q_vectors; i++)
3256 i40e_msix_clean_rings(0, vsi->q_vectors[i]);
3258 i40e_intr(pf->pdev->irq, netdev);
3260 pf->flags &= ~I40E_FLAG_IN_NETPOLL;
3265 * i40e_pf_txq_wait - Wait for a PF's Tx queue to be enabled or disabled
3266 * @pf: the PF being configured
3267 * @pf_q: the PF queue
3268 * @enable: enable or disable state of the queue
3270 * This routine will wait for the given Tx queue of the PF to reach the
3271 * enabled or disabled state.
3272 * Returns -ETIMEDOUT in case of failing to reach the requested state after
3273 * multiple retries; else will return 0 in case of success.
3275 static int i40e_pf_txq_wait(struct i40e_pf *pf, int pf_q, bool enable)
3280 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) {
3281 tx_reg = rd32(&pf->hw, I40E_QTX_ENA(pf_q));
3282 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
3287 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT)
3294 * i40e_vsi_control_tx - Start or stop a VSI's rings
3295 * @vsi: the VSI being configured
3296 * @enable: start or stop the rings
3298 static int i40e_vsi_control_tx(struct i40e_vsi *vsi, bool enable)
3300 struct i40e_pf *pf = vsi->back;
3301 struct i40e_hw *hw = &pf->hw;
3302 int i, j, pf_q, ret = 0;
3305 pf_q = vsi->base_queue;
3306 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
3308 /* warn the TX unit of coming changes */
3309 i40e_pre_tx_queue_cfg(&pf->hw, pf_q, enable);
3313 for (j = 0; j < 50; j++) {
3314 tx_reg = rd32(hw, I40E_QTX_ENA(pf_q));
3315 if (((tx_reg >> I40E_QTX_ENA_QENA_REQ_SHIFT) & 1) ==
3316 ((tx_reg >> I40E_QTX_ENA_QENA_STAT_SHIFT) & 1))
3318 usleep_range(1000, 2000);
3320 /* Skip if the queue is already in the requested state */
3321 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
3324 /* turn on/off the queue */
3326 wr32(hw, I40E_QTX_HEAD(pf_q), 0);
3327 tx_reg |= I40E_QTX_ENA_QENA_REQ_MASK;
3329 tx_reg &= ~I40E_QTX_ENA_QENA_REQ_MASK;
3332 wr32(hw, I40E_QTX_ENA(pf_q), tx_reg);
3334 /* wait for the change to finish */
3335 ret = i40e_pf_txq_wait(pf, pf_q, enable);
3337 dev_info(&pf->pdev->dev,
3338 "%s: VSI seid %d Tx ring %d %sable timeout\n",
3339 __func__, vsi->seid, pf_q,
3340 (enable ? "en" : "dis"));
3345 if (hw->revision_id == 0)
3351 * i40e_pf_rxq_wait - Wait for a PF's Rx queue to be enabled or disabled
3352 * @pf: the PF being configured
3353 * @pf_q: the PF queue
3354 * @enable: enable or disable state of the queue
3356 * This routine will wait for the given Rx queue of the PF to reach the
3357 * enabled or disabled state.
3358 * Returns -ETIMEDOUT in case of failing to reach the requested state after
3359 * multiple retries; else will return 0 in case of success.
3361 static int i40e_pf_rxq_wait(struct i40e_pf *pf, int pf_q, bool enable)
3366 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) {
3367 rx_reg = rd32(&pf->hw, I40E_QRX_ENA(pf_q));
3368 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
3373 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT)
3380 * i40e_vsi_control_rx - Start or stop a VSI's rings
3381 * @vsi: the VSI being configured
3382 * @enable: start or stop the rings
3384 static int i40e_vsi_control_rx(struct i40e_vsi *vsi, bool enable)
3386 struct i40e_pf *pf = vsi->back;
3387 struct i40e_hw *hw = &pf->hw;
3388 int i, j, pf_q, ret = 0;
3391 pf_q = vsi->base_queue;
3392 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
3393 for (j = 0; j < 50; j++) {
3394 rx_reg = rd32(hw, I40E_QRX_ENA(pf_q));
3395 if (((rx_reg >> I40E_QRX_ENA_QENA_REQ_SHIFT) & 1) ==
3396 ((rx_reg >> I40E_QRX_ENA_QENA_STAT_SHIFT) & 1))
3398 usleep_range(1000, 2000);
3401 /* Skip if the queue is already in the requested state */
3402 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
3405 /* turn on/off the queue */
3407 rx_reg |= I40E_QRX_ENA_QENA_REQ_MASK;
3409 rx_reg &= ~I40E_QRX_ENA_QENA_REQ_MASK;
3410 wr32(hw, I40E_QRX_ENA(pf_q), rx_reg);
3412 /* wait for the change to finish */
3413 ret = i40e_pf_rxq_wait(pf, pf_q, enable);
3415 dev_info(&pf->pdev->dev,
3416 "%s: VSI seid %d Rx ring %d %sable timeout\n",
3417 __func__, vsi->seid, pf_q,
3418 (enable ? "en" : "dis"));
3427 * i40e_vsi_control_rings - Start or stop a VSI's rings
3428 * @vsi: the VSI being configured
3429 * @enable: start or stop the rings
3431 int i40e_vsi_control_rings(struct i40e_vsi *vsi, bool request)
3435 /* do rx first for enable and last for disable */
3437 ret = i40e_vsi_control_rx(vsi, request);
3440 ret = i40e_vsi_control_tx(vsi, request);
3442 /* Ignore return value, we need to shutdown whatever we can */
3443 i40e_vsi_control_tx(vsi, request);
3444 i40e_vsi_control_rx(vsi, request);
3451 * i40e_vsi_free_irq - Free the irq association with the OS
3452 * @vsi: the VSI being configured
3454 static void i40e_vsi_free_irq(struct i40e_vsi *vsi)
3456 struct i40e_pf *pf = vsi->back;
3457 struct i40e_hw *hw = &pf->hw;
3458 int base = vsi->base_vector;
3462 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3463 if (!vsi->q_vectors)
3466 if (!vsi->irqs_ready)
3469 vsi->irqs_ready = false;
3470 for (i = 0; i < vsi->num_q_vectors; i++) {
3471 u16 vector = i + base;
3473 /* free only the irqs that were actually requested */
3474 if (!vsi->q_vectors[i] ||
3475 !vsi->q_vectors[i]->num_ringpairs)
3478 /* clear the affinity_mask in the IRQ descriptor */
3479 irq_set_affinity_hint(pf->msix_entries[vector].vector,
3481 free_irq(pf->msix_entries[vector].vector,
3484 /* Tear down the interrupt queue link list
3486 * We know that they come in pairs and always
3487 * the Rx first, then the Tx. To clear the
3488 * link list, stick the EOL value into the
3489 * next_q field of the registers.
3491 val = rd32(hw, I40E_PFINT_LNKLSTN(vector - 1));
3492 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
3493 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
3494 val |= I40E_QUEUE_END_OF_LIST
3495 << I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
3496 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), val);
3498 while (qp != I40E_QUEUE_END_OF_LIST) {
3501 val = rd32(hw, I40E_QINT_RQCTL(qp));
3503 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK |
3504 I40E_QINT_RQCTL_MSIX0_INDX_MASK |
3505 I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3506 I40E_QINT_RQCTL_INTEVENT_MASK);
3508 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
3509 I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
3511 wr32(hw, I40E_QINT_RQCTL(qp), val);
3513 val = rd32(hw, I40E_QINT_TQCTL(qp));
3515 next = (val & I40E_QINT_TQCTL_NEXTQ_INDX_MASK)
3516 >> I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT;
3518 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK |
3519 I40E_QINT_TQCTL_MSIX0_INDX_MASK |
3520 I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3521 I40E_QINT_TQCTL_INTEVENT_MASK);
3523 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
3524 I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
3526 wr32(hw, I40E_QINT_TQCTL(qp), val);
3531 free_irq(pf->pdev->irq, pf);
3533 val = rd32(hw, I40E_PFINT_LNKLST0);
3534 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
3535 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
3536 val |= I40E_QUEUE_END_OF_LIST
3537 << I40E_PFINT_LNKLST0_FIRSTQ_INDX_SHIFT;
3538 wr32(hw, I40E_PFINT_LNKLST0, val);
3540 val = rd32(hw, I40E_QINT_RQCTL(qp));
3541 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK |
3542 I40E_QINT_RQCTL_MSIX0_INDX_MASK |
3543 I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3544 I40E_QINT_RQCTL_INTEVENT_MASK);
3546 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
3547 I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
3549 wr32(hw, I40E_QINT_RQCTL(qp), val);
3551 val = rd32(hw, I40E_QINT_TQCTL(qp));
3553 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK |
3554 I40E_QINT_TQCTL_MSIX0_INDX_MASK |
3555 I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3556 I40E_QINT_TQCTL_INTEVENT_MASK);
3558 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
3559 I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
3561 wr32(hw, I40E_QINT_TQCTL(qp), val);
3566 * i40e_free_q_vector - Free memory allocated for specific interrupt vector
3567 * @vsi: the VSI being configured
3568 * @v_idx: Index of vector to be freed
3570 * This function frees the memory allocated to the q_vector. In addition if
3571 * NAPI is enabled it will delete any references to the NAPI struct prior
3572 * to freeing the q_vector.
3574 static void i40e_free_q_vector(struct i40e_vsi *vsi, int v_idx)
3576 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
3577 struct i40e_ring *ring;
3582 /* disassociate q_vector from rings */
3583 i40e_for_each_ring(ring, q_vector->tx)
3584 ring->q_vector = NULL;
3586 i40e_for_each_ring(ring, q_vector->rx)
3587 ring->q_vector = NULL;
3589 /* only VSI w/ an associated netdev is set up w/ NAPI */
3591 netif_napi_del(&q_vector->napi);
3593 vsi->q_vectors[v_idx] = NULL;
3595 kfree_rcu(q_vector, rcu);
3599 * i40e_vsi_free_q_vectors - Free memory allocated for interrupt vectors
3600 * @vsi: the VSI being un-configured
3602 * This frees the memory allocated to the q_vectors and
3603 * deletes references to the NAPI struct.
3605 static void i40e_vsi_free_q_vectors(struct i40e_vsi *vsi)
3609 for (v_idx = 0; v_idx < vsi->num_q_vectors; v_idx++)
3610 i40e_free_q_vector(vsi, v_idx);
3614 * i40e_reset_interrupt_capability - Disable interrupt setup in OS
3615 * @pf: board private structure
3617 static void i40e_reset_interrupt_capability(struct i40e_pf *pf)
3619 /* If we're in Legacy mode, the interrupt was cleaned in vsi_close */
3620 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3621 pci_disable_msix(pf->pdev);
3622 kfree(pf->msix_entries);
3623 pf->msix_entries = NULL;
3624 } else if (pf->flags & I40E_FLAG_MSI_ENABLED) {
3625 pci_disable_msi(pf->pdev);
3627 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED);
3631 * i40e_clear_interrupt_scheme - Clear the current interrupt scheme settings
3632 * @pf: board private structure
3634 * We go through and clear interrupt specific resources and reset the structure
3635 * to pre-load conditions
3637 static void i40e_clear_interrupt_scheme(struct i40e_pf *pf)
3641 i40e_put_lump(pf->irq_pile, 0, I40E_PILE_VALID_BIT-1);
3642 for (i = 0; i < pf->num_alloc_vsi; i++)
3644 i40e_vsi_free_q_vectors(pf->vsi[i]);
3645 i40e_reset_interrupt_capability(pf);
3649 * i40e_napi_enable_all - Enable NAPI for all q_vectors in the VSI
3650 * @vsi: the VSI being configured
3652 static void i40e_napi_enable_all(struct i40e_vsi *vsi)
3659 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++)
3660 napi_enable(&vsi->q_vectors[q_idx]->napi);
3664 * i40e_napi_disable_all - Disable NAPI for all q_vectors in the VSI
3665 * @vsi: the VSI being configured
3667 static void i40e_napi_disable_all(struct i40e_vsi *vsi)
3674 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++)
3675 napi_disable(&vsi->q_vectors[q_idx]->napi);
3679 * i40e_vsi_close - Shut down a VSI
3680 * @vsi: the vsi to be quelled
3682 static void i40e_vsi_close(struct i40e_vsi *vsi)
3684 if (!test_and_set_bit(__I40E_DOWN, &vsi->state))
3686 i40e_vsi_free_irq(vsi);
3687 i40e_vsi_free_tx_resources(vsi);
3688 i40e_vsi_free_rx_resources(vsi);
3692 * i40e_quiesce_vsi - Pause a given VSI
3693 * @vsi: the VSI being paused
3695 static void i40e_quiesce_vsi(struct i40e_vsi *vsi)
3697 if (test_bit(__I40E_DOWN, &vsi->state))
3700 set_bit(__I40E_NEEDS_RESTART, &vsi->state);
3701 if (vsi->netdev && netif_running(vsi->netdev)) {
3702 vsi->netdev->netdev_ops->ndo_stop(vsi->netdev);
3704 i40e_vsi_close(vsi);
3709 * i40e_unquiesce_vsi - Resume a given VSI
3710 * @vsi: the VSI being resumed
3712 static void i40e_unquiesce_vsi(struct i40e_vsi *vsi)
3714 if (!test_bit(__I40E_NEEDS_RESTART, &vsi->state))
3717 clear_bit(__I40E_NEEDS_RESTART, &vsi->state);
3718 if (vsi->netdev && netif_running(vsi->netdev))
3719 vsi->netdev->netdev_ops->ndo_open(vsi->netdev);
3721 i40e_vsi_open(vsi); /* this clears the DOWN bit */
3725 * i40e_pf_quiesce_all_vsi - Pause all VSIs on a PF
3728 static void i40e_pf_quiesce_all_vsi(struct i40e_pf *pf)
3732 for (v = 0; v < pf->num_alloc_vsi; v++) {
3734 i40e_quiesce_vsi(pf->vsi[v]);
3739 * i40e_pf_unquiesce_all_vsi - Resume all VSIs on a PF
3742 static void i40e_pf_unquiesce_all_vsi(struct i40e_pf *pf)
3746 for (v = 0; v < pf->num_alloc_vsi; v++) {
3748 i40e_unquiesce_vsi(pf->vsi[v]);
3753 * i40e_dcb_get_num_tc - Get the number of TCs from DCBx config
3754 * @dcbcfg: the corresponding DCBx configuration structure
3756 * Return the number of TCs from given DCBx configuration
3758 static u8 i40e_dcb_get_num_tc(struct i40e_dcbx_config *dcbcfg)
3763 /* Scan the ETS Config Priority Table to find
3764 * traffic class enabled for a given priority
3765 * and use the traffic class index to get the
3766 * number of traffic classes enabled
3768 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
3769 if (dcbcfg->etscfg.prioritytable[i] > num_tc)
3770 num_tc = dcbcfg->etscfg.prioritytable[i];
3773 /* Traffic class index starts from zero so
3774 * increment to return the actual count
3780 * i40e_dcb_get_enabled_tc - Get enabled traffic classes
3781 * @dcbcfg: the corresponding DCBx configuration structure
3783 * Query the current DCB configuration and return the number of
3784 * traffic classes enabled from the given DCBX config
3786 static u8 i40e_dcb_get_enabled_tc(struct i40e_dcbx_config *dcbcfg)
3788 u8 num_tc = i40e_dcb_get_num_tc(dcbcfg);
3792 for (i = 0; i < num_tc; i++)
3793 enabled_tc |= 1 << i;
3799 * i40e_pf_get_num_tc - Get enabled traffic classes for PF
3800 * @pf: PF being queried
3802 * Return number of traffic classes enabled for the given PF
3804 static u8 i40e_pf_get_num_tc(struct i40e_pf *pf)
3806 struct i40e_hw *hw = &pf->hw;
3809 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
3811 /* If DCB is not enabled then always in single TC */
3812 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
3815 /* MFP mode return count of enabled TCs for this PF */
3816 if (pf->flags & I40E_FLAG_MFP_ENABLED) {
3817 enabled_tc = pf->hw.func_caps.enabled_tcmap;
3818 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
3819 if (enabled_tc & (1 << i))
3825 /* SFP mode will be enabled for all TCs on port */
3826 return i40e_dcb_get_num_tc(dcbcfg);
3830 * i40e_pf_get_default_tc - Get bitmap for first enabled TC
3831 * @pf: PF being queried
3833 * Return a bitmap for first enabled traffic class for this PF.
3835 static u8 i40e_pf_get_default_tc(struct i40e_pf *pf)
3837 u8 enabled_tc = pf->hw.func_caps.enabled_tcmap;
3841 return 0x1; /* TC0 */
3843 /* Find the first enabled TC */
3844 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
3845 if (enabled_tc & (1 << i))
3853 * i40e_pf_get_pf_tc_map - Get bitmap for enabled traffic classes
3854 * @pf: PF being queried
3856 * Return a bitmap for enabled traffic classes for this PF.
3858 static u8 i40e_pf_get_tc_map(struct i40e_pf *pf)
3860 /* If DCB is not enabled for this PF then just return default TC */
3861 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
3862 return i40e_pf_get_default_tc(pf);
3864 /* MFP mode will have enabled TCs set by FW */
3865 if (pf->flags & I40E_FLAG_MFP_ENABLED)
3866 return pf->hw.func_caps.enabled_tcmap;
3868 /* SFP mode we want PF to be enabled for all TCs */
3869 return i40e_dcb_get_enabled_tc(&pf->hw.local_dcbx_config);
3873 * i40e_vsi_get_bw_info - Query VSI BW Information
3874 * @vsi: the VSI being queried
3876 * Returns 0 on success, negative value on failure
3878 static int i40e_vsi_get_bw_info(struct i40e_vsi *vsi)
3880 struct i40e_aqc_query_vsi_ets_sla_config_resp bw_ets_config = {0};
3881 struct i40e_aqc_query_vsi_bw_config_resp bw_config = {0};
3882 struct i40e_pf *pf = vsi->back;
3883 struct i40e_hw *hw = &pf->hw;
3888 /* Get the VSI level BW configuration */
3889 aq_ret = i40e_aq_query_vsi_bw_config(hw, vsi->seid, &bw_config, NULL);
3891 dev_info(&pf->pdev->dev,
3892 "couldn't get pf vsi bw config, err %d, aq_err %d\n",
3893 aq_ret, pf->hw.aq.asq_last_status);
3897 /* Get the VSI level BW configuration per TC */
3898 aq_ret = i40e_aq_query_vsi_ets_sla_config(hw, vsi->seid, &bw_ets_config,
3901 dev_info(&pf->pdev->dev,
3902 "couldn't get pf vsi ets bw config, err %d, aq_err %d\n",
3903 aq_ret, pf->hw.aq.asq_last_status);
3907 if (bw_config.tc_valid_bits != bw_ets_config.tc_valid_bits) {
3908 dev_info(&pf->pdev->dev,
3909 "Enabled TCs mismatch from querying VSI BW info 0x%08x 0x%08x\n",
3910 bw_config.tc_valid_bits,
3911 bw_ets_config.tc_valid_bits);
3912 /* Still continuing */
3915 vsi->bw_limit = le16_to_cpu(bw_config.port_bw_limit);
3916 vsi->bw_max_quanta = bw_config.max_bw;
3917 tc_bw_max = le16_to_cpu(bw_ets_config.tc_bw_max[0]) |
3918 (le16_to_cpu(bw_ets_config.tc_bw_max[1]) << 16);
3919 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
3920 vsi->bw_ets_share_credits[i] = bw_ets_config.share_credits[i];
3921 vsi->bw_ets_limit_credits[i] =
3922 le16_to_cpu(bw_ets_config.credits[i]);
3923 /* 3 bits out of 4 for each TC */
3924 vsi->bw_ets_max_quanta[i] = (u8)((tc_bw_max >> (i*4)) & 0x7);
3931 * i40e_vsi_configure_bw_alloc - Configure VSI BW allocation per TC
3932 * @vsi: the VSI being configured
3933 * @enabled_tc: TC bitmap
3934 * @bw_credits: BW shared credits per TC
3936 * Returns 0 on success, negative value on failure
3938 static int i40e_vsi_configure_bw_alloc(struct i40e_vsi *vsi, u8 enabled_tc,
3941 struct i40e_aqc_configure_vsi_tc_bw_data bw_data;
3945 bw_data.tc_valid_bits = enabled_tc;
3946 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
3947 bw_data.tc_bw_credits[i] = bw_share[i];
3949 aq_ret = i40e_aq_config_vsi_tc_bw(&vsi->back->hw, vsi->seid, &bw_data,
3952 dev_info(&vsi->back->pdev->dev,
3953 "AQ command Config VSI BW allocation per TC failed = %d\n",
3954 vsi->back->hw.aq.asq_last_status);
3958 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
3959 vsi->info.qs_handle[i] = bw_data.qs_handles[i];
3965 * i40e_vsi_config_netdev_tc - Setup the netdev TC configuration
3966 * @vsi: the VSI being configured
3967 * @enabled_tc: TC map to be enabled
3970 static void i40e_vsi_config_netdev_tc(struct i40e_vsi *vsi, u8 enabled_tc)
3972 struct net_device *netdev = vsi->netdev;
3973 struct i40e_pf *pf = vsi->back;
3974 struct i40e_hw *hw = &pf->hw;
3977 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
3983 netdev_reset_tc(netdev);
3987 /* Set up actual enabled TCs on the VSI */
3988 if (netdev_set_num_tc(netdev, vsi->tc_config.numtc))
3991 /* set per TC queues for the VSI */
3992 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
3993 /* Only set TC queues for enabled tcs
3995 * e.g. For a VSI that has TC0 and TC3 enabled the
3996 * enabled_tc bitmap would be 0x00001001; the driver
3997 * will set the numtc for netdev as 2 that will be
3998 * referenced by the netdev layer as TC 0 and 1.
4000 if (vsi->tc_config.enabled_tc & (1 << i))
4001 netdev_set_tc_queue(netdev,
4002 vsi->tc_config.tc_info[i].netdev_tc,
4003 vsi->tc_config.tc_info[i].qcount,
4004 vsi->tc_config.tc_info[i].qoffset);
4007 /* Assign UP2TC map for the VSI */
4008 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
4009 /* Get the actual TC# for the UP */
4010 u8 ets_tc = dcbcfg->etscfg.prioritytable[i];
4011 /* Get the mapped netdev TC# for the UP */
4012 netdev_tc = vsi->tc_config.tc_info[ets_tc].netdev_tc;
4013 netdev_set_prio_tc_map(netdev, i, netdev_tc);
4018 * i40e_vsi_update_queue_map - Update our copy of VSi info with new queue map
4019 * @vsi: the VSI being configured
4020 * @ctxt: the ctxt buffer returned from AQ VSI update param command
4022 static void i40e_vsi_update_queue_map(struct i40e_vsi *vsi,
4023 struct i40e_vsi_context *ctxt)
4025 /* copy just the sections touched not the entire info
4026 * since not all sections are valid as returned by
4029 vsi->info.mapping_flags = ctxt->info.mapping_flags;
4030 memcpy(&vsi->info.queue_mapping,
4031 &ctxt->info.queue_mapping, sizeof(vsi->info.queue_mapping));
4032 memcpy(&vsi->info.tc_mapping, ctxt->info.tc_mapping,
4033 sizeof(vsi->info.tc_mapping));
4037 * i40e_vsi_config_tc - Configure VSI Tx Scheduler for given TC map
4038 * @vsi: VSI to be configured
4039 * @enabled_tc: TC bitmap
4041 * This configures a particular VSI for TCs that are mapped to the
4042 * given TC bitmap. It uses default bandwidth share for TCs across
4043 * VSIs to configure TC for a particular VSI.
4046 * It is expected that the VSI queues have been quisced before calling
4049 static int i40e_vsi_config_tc(struct i40e_vsi *vsi, u8 enabled_tc)
4051 u8 bw_share[I40E_MAX_TRAFFIC_CLASS] = {0};
4052 struct i40e_vsi_context ctxt;
4056 /* Check if enabled_tc is same as existing or new TCs */
4057 if (vsi->tc_config.enabled_tc == enabled_tc)
4060 /* Enable ETS TCs with equal BW Share for now across all VSIs */
4061 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4062 if (enabled_tc & (1 << i))
4066 ret = i40e_vsi_configure_bw_alloc(vsi, enabled_tc, bw_share);
4068 dev_info(&vsi->back->pdev->dev,
4069 "Failed configuring TC map %d for VSI %d\n",
4070 enabled_tc, vsi->seid);
4074 /* Update Queue Pairs Mapping for currently enabled UPs */
4075 ctxt.seid = vsi->seid;
4076 ctxt.pf_num = vsi->back->hw.pf_id;
4078 ctxt.uplink_seid = vsi->uplink_seid;
4079 memcpy(&ctxt.info, &vsi->info, sizeof(vsi->info));
4080 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
4082 /* Update the VSI after updating the VSI queue-mapping information */
4083 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
4085 dev_info(&vsi->back->pdev->dev,
4086 "update vsi failed, aq_err=%d\n",
4087 vsi->back->hw.aq.asq_last_status);
4090 /* update the local VSI info with updated queue map */
4091 i40e_vsi_update_queue_map(vsi, &ctxt);
4092 vsi->info.valid_sections = 0;
4094 /* Update current VSI BW information */
4095 ret = i40e_vsi_get_bw_info(vsi);
4097 dev_info(&vsi->back->pdev->dev,
4098 "Failed updating vsi bw info, aq_err=%d\n",
4099 vsi->back->hw.aq.asq_last_status);
4103 /* Update the netdev TC setup */
4104 i40e_vsi_config_netdev_tc(vsi, enabled_tc);
4110 * i40e_veb_config_tc - Configure TCs for given VEB
4112 * @enabled_tc: TC bitmap
4114 * Configures given TC bitmap for VEB (switching) element
4116 int i40e_veb_config_tc(struct i40e_veb *veb, u8 enabled_tc)
4118 struct i40e_aqc_configure_switching_comp_bw_config_data bw_data = {0};
4119 struct i40e_pf *pf = veb->pf;
4123 /* No TCs or already enabled TCs just return */
4124 if (!enabled_tc || veb->enabled_tc == enabled_tc)
4127 bw_data.tc_valid_bits = enabled_tc;
4128 /* bw_data.absolute_credits is not set (relative) */
4130 /* Enable ETS TCs with equal BW Share for now */
4131 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4132 if (enabled_tc & (1 << i))
4133 bw_data.tc_bw_share_credits[i] = 1;
4136 ret = i40e_aq_config_switch_comp_bw_config(&pf->hw, veb->seid,
4139 dev_info(&pf->pdev->dev,
4140 "veb bw config failed, aq_err=%d\n",
4141 pf->hw.aq.asq_last_status);
4145 /* Update the BW information */
4146 ret = i40e_veb_get_bw_info(veb);
4148 dev_info(&pf->pdev->dev,
4149 "Failed getting veb bw config, aq_err=%d\n",
4150 pf->hw.aq.asq_last_status);
4157 #ifdef CONFIG_I40E_DCB
4159 * i40e_dcb_reconfigure - Reconfigure all VEBs and VSIs
4162 * Reconfigure VEB/VSIs on a given PF; it is assumed that
4163 * the caller would've quiesce all the VSIs before calling
4166 static void i40e_dcb_reconfigure(struct i40e_pf *pf)
4172 /* Enable the TCs available on PF to all VEBs */
4173 tc_map = i40e_pf_get_tc_map(pf);
4174 for (v = 0; v < I40E_MAX_VEB; v++) {
4177 ret = i40e_veb_config_tc(pf->veb[v], tc_map);
4179 dev_info(&pf->pdev->dev,
4180 "Failed configuring TC for VEB seid=%d\n",
4182 /* Will try to configure as many components */
4186 /* Update each VSI */
4187 for (v = 0; v < pf->num_alloc_vsi; v++) {
4191 /* - Enable all TCs for the LAN VSI
4192 * - For all others keep them at TC0 for now
4194 if (v == pf->lan_vsi)
4195 tc_map = i40e_pf_get_tc_map(pf);
4197 tc_map = i40e_pf_get_default_tc(pf);
4199 ret = i40e_vsi_config_tc(pf->vsi[v], tc_map);
4201 dev_info(&pf->pdev->dev,
4202 "Failed configuring TC for VSI seid=%d\n",
4204 /* Will try to configure as many components */
4206 /* Re-configure VSI vectors based on updated TC map */
4207 i40e_vsi_map_rings_to_vectors(pf->vsi[v]);
4208 if (pf->vsi[v]->netdev)
4209 i40e_dcbnl_set_all(pf->vsi[v]);
4215 * i40e_init_pf_dcb - Initialize DCB configuration
4216 * @pf: PF being configured
4218 * Query the current DCB configuration and cache it
4219 * in the hardware structure
4221 static int i40e_init_pf_dcb(struct i40e_pf *pf)
4223 struct i40e_hw *hw = &pf->hw;
4226 if (pf->hw.func_caps.npar_enable)
4229 /* Get the initial DCB configuration */
4230 err = i40e_init_dcb(hw);
4232 /* Device/Function is not DCBX capable */
4233 if ((!hw->func_caps.dcb) ||
4234 (hw->dcbx_status == I40E_DCBX_STATUS_DISABLED)) {
4235 dev_info(&pf->pdev->dev,
4236 "DCBX offload is not supported or is disabled for this PF.\n");
4238 if (pf->flags & I40E_FLAG_MFP_ENABLED)
4242 /* When status is not DISABLED then DCBX in FW */
4243 pf->dcbx_cap = DCB_CAP_DCBX_LLD_MANAGED |
4244 DCB_CAP_DCBX_VER_IEEE;
4246 pf->flags |= I40E_FLAG_DCB_CAPABLE;
4247 /* Enable DCB tagging only when more than one TC */
4248 if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1)
4249 pf->flags |= I40E_FLAG_DCB_ENABLED;
4252 dev_info(&pf->pdev->dev, "AQ Querying DCB configuration failed: %d\n",
4253 pf->hw.aq.asq_last_status);
4259 #endif /* CONFIG_I40E_DCB */
4260 #define SPEED_SIZE 14
4263 * i40e_print_link_message - print link up or down
4264 * @vsi: the VSI for which link needs a message
4266 static void i40e_print_link_message(struct i40e_vsi *vsi, bool isup)
4268 char speed[SPEED_SIZE] = "Unknown";
4269 char fc[FC_SIZE] = "RX/TX";
4272 netdev_info(vsi->netdev, "NIC Link is Down\n");
4276 switch (vsi->back->hw.phy.link_info.link_speed) {
4277 case I40E_LINK_SPEED_40GB:
4278 strncpy(speed, "40 Gbps", SPEED_SIZE);
4280 case I40E_LINK_SPEED_10GB:
4281 strncpy(speed, "10 Gbps", SPEED_SIZE);
4283 case I40E_LINK_SPEED_1GB:
4284 strncpy(speed, "1000 Mbps", SPEED_SIZE);
4290 switch (vsi->back->hw.fc.current_mode) {
4292 strncpy(fc, "RX/TX", FC_SIZE);
4294 case I40E_FC_TX_PAUSE:
4295 strncpy(fc, "TX", FC_SIZE);
4297 case I40E_FC_RX_PAUSE:
4298 strncpy(fc, "RX", FC_SIZE);
4301 strncpy(fc, "None", FC_SIZE);
4305 netdev_info(vsi->netdev, "NIC Link is Up %s Full Duplex, Flow Control: %s\n",
4310 * i40e_up_complete - Finish the last steps of bringing up a connection
4311 * @vsi: the VSI being configured
4313 static int i40e_up_complete(struct i40e_vsi *vsi)
4315 struct i40e_pf *pf = vsi->back;
4318 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
4319 i40e_vsi_configure_msix(vsi);
4321 i40e_configure_msi_and_legacy(vsi);
4324 err = i40e_vsi_control_rings(vsi, true);
4328 clear_bit(__I40E_DOWN, &vsi->state);
4329 i40e_napi_enable_all(vsi);
4330 i40e_vsi_enable_irq(vsi);
4332 if ((pf->hw.phy.link_info.link_info & I40E_AQ_LINK_UP) &&
4334 i40e_print_link_message(vsi, true);
4335 netif_tx_start_all_queues(vsi->netdev);
4336 netif_carrier_on(vsi->netdev);
4337 } else if (vsi->netdev) {
4338 i40e_print_link_message(vsi, false);
4341 /* replay FDIR SB filters */
4342 if (vsi->type == I40E_VSI_FDIR)
4343 i40e_fdir_filter_restore(vsi);
4344 i40e_service_event_schedule(pf);
4350 * i40e_vsi_reinit_locked - Reset the VSI
4351 * @vsi: the VSI being configured
4353 * Rebuild the ring structs after some configuration
4354 * has changed, e.g. MTU size.
4356 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi)
4358 struct i40e_pf *pf = vsi->back;
4360 WARN_ON(in_interrupt());
4361 while (test_and_set_bit(__I40E_CONFIG_BUSY, &pf->state))
4362 usleep_range(1000, 2000);
4365 /* Give a VF some time to respond to the reset. The
4366 * two second wait is based upon the watchdog cycle in
4369 if (vsi->type == I40E_VSI_SRIOV)
4372 clear_bit(__I40E_CONFIG_BUSY, &pf->state);
4376 * i40e_up - Bring the connection back up after being down
4377 * @vsi: the VSI being configured
4379 int i40e_up(struct i40e_vsi *vsi)
4383 err = i40e_vsi_configure(vsi);
4385 err = i40e_up_complete(vsi);
4391 * i40e_down - Shutdown the connection processing
4392 * @vsi: the VSI being stopped
4394 void i40e_down(struct i40e_vsi *vsi)
4398 /* It is assumed that the caller of this function
4399 * sets the vsi->state __I40E_DOWN bit.
4402 netif_carrier_off(vsi->netdev);
4403 netif_tx_disable(vsi->netdev);
4405 i40e_vsi_disable_irq(vsi);
4406 i40e_vsi_control_rings(vsi, false);
4407 i40e_napi_disable_all(vsi);
4409 for (i = 0; i < vsi->num_queue_pairs; i++) {
4410 i40e_clean_tx_ring(vsi->tx_rings[i]);
4411 i40e_clean_rx_ring(vsi->rx_rings[i]);
4416 * i40e_setup_tc - configure multiple traffic classes
4417 * @netdev: net device to configure
4418 * @tc: number of traffic classes to enable
4420 static int i40e_setup_tc(struct net_device *netdev, u8 tc)
4422 struct i40e_netdev_priv *np = netdev_priv(netdev);
4423 struct i40e_vsi *vsi = np->vsi;
4424 struct i40e_pf *pf = vsi->back;
4429 /* Check if DCB enabled to continue */
4430 if (!(pf->flags & I40E_FLAG_DCB_ENABLED)) {
4431 netdev_info(netdev, "DCB is not enabled for adapter\n");
4435 /* Check if MFP enabled */
4436 if (pf->flags & I40E_FLAG_MFP_ENABLED) {
4437 netdev_info(netdev, "Configuring TC not supported in MFP mode\n");
4441 /* Check whether tc count is within enabled limit */
4442 if (tc > i40e_pf_get_num_tc(pf)) {
4443 netdev_info(netdev, "TC count greater than enabled on link for adapter\n");
4447 /* Generate TC map for number of tc requested */
4448 for (i = 0; i < tc; i++)
4449 enabled_tc |= (1 << i);
4451 /* Requesting same TC configuration as already enabled */
4452 if (enabled_tc == vsi->tc_config.enabled_tc)
4455 /* Quiesce VSI queues */
4456 i40e_quiesce_vsi(vsi);
4458 /* Configure VSI for enabled TCs */
4459 ret = i40e_vsi_config_tc(vsi, enabled_tc);
4461 netdev_info(netdev, "Failed configuring TC for VSI seid=%d\n",
4467 i40e_unquiesce_vsi(vsi);
4474 * i40e_open - Called when a network interface is made active
4475 * @netdev: network interface device structure
4477 * The open entry point is called when a network interface is made
4478 * active by the system (IFF_UP). At this point all resources needed
4479 * for transmit and receive operations are allocated, the interrupt
4480 * handler is registered with the OS, the netdev watchdog subtask is
4481 * enabled, and the stack is notified that the interface is ready.
4483 * Returns 0 on success, negative value on failure
4485 static int i40e_open(struct net_device *netdev)
4487 struct i40e_netdev_priv *np = netdev_priv(netdev);
4488 struct i40e_vsi *vsi = np->vsi;
4489 struct i40e_pf *pf = vsi->back;
4492 /* disallow open during test or if eeprom is broken */
4493 if (test_bit(__I40E_TESTING, &pf->state) ||
4494 test_bit(__I40E_BAD_EEPROM, &pf->state))
4497 netif_carrier_off(netdev);
4499 err = i40e_vsi_open(vsi);
4503 /* configure global TSO hardware offload settings */
4504 wr32(&pf->hw, I40E_GLLAN_TSOMSK_F, be32_to_cpu(TCP_FLAG_PSH |
4505 TCP_FLAG_FIN) >> 16);
4506 wr32(&pf->hw, I40E_GLLAN_TSOMSK_M, be32_to_cpu(TCP_FLAG_PSH |
4508 TCP_FLAG_CWR) >> 16);
4509 wr32(&pf->hw, I40E_GLLAN_TSOMSK_L, be32_to_cpu(TCP_FLAG_CWR) >> 16);
4511 #ifdef CONFIG_I40E_VXLAN
4512 vxlan_get_rx_port(netdev);
4520 * @vsi: the VSI to open
4522 * Finish initialization of the VSI.
4524 * Returns 0 on success, negative value on failure
4526 int i40e_vsi_open(struct i40e_vsi *vsi)
4528 struct i40e_pf *pf = vsi->back;
4529 char int_name[IFNAMSIZ];
4532 /* allocate descriptors */
4533 err = i40e_vsi_setup_tx_resources(vsi);
4536 err = i40e_vsi_setup_rx_resources(vsi);
4540 err = i40e_vsi_configure(vsi);
4545 snprintf(int_name, sizeof(int_name) - 1, "%s-%s",
4546 dev_driver_string(&pf->pdev->dev), vsi->netdev->name);
4547 err = i40e_vsi_request_irq(vsi, int_name);
4551 /* Notify the stack of the actual queue counts. */
4552 err = netif_set_real_num_tx_queues(vsi->netdev,
4553 vsi->num_queue_pairs);
4555 goto err_set_queues;
4557 err = netif_set_real_num_rx_queues(vsi->netdev,
4558 vsi->num_queue_pairs);
4560 goto err_set_queues;
4562 } else if (vsi->type == I40E_VSI_FDIR) {
4563 snprintf(int_name, sizeof(int_name) - 1, "%s-fdir",
4564 dev_driver_string(&pf->pdev->dev));
4565 err = i40e_vsi_request_irq(vsi, int_name);
4571 err = i40e_up_complete(vsi);
4573 goto err_up_complete;
4580 i40e_vsi_free_irq(vsi);
4582 i40e_vsi_free_rx_resources(vsi);
4584 i40e_vsi_free_tx_resources(vsi);
4585 if (vsi == pf->vsi[pf->lan_vsi])
4586 i40e_do_reset(pf, (1 << __I40E_PF_RESET_REQUESTED));
4592 * i40e_fdir_filter_exit - Cleans up the Flow Director accounting
4593 * @pf: Pointer to pf
4595 * This function destroys the hlist where all the Flow Director
4596 * filters were saved.
4598 static void i40e_fdir_filter_exit(struct i40e_pf *pf)
4600 struct i40e_fdir_filter *filter;
4601 struct hlist_node *node2;
4603 hlist_for_each_entry_safe(filter, node2,
4604 &pf->fdir_filter_list, fdir_node) {
4605 hlist_del(&filter->fdir_node);
4608 pf->fdir_pf_active_filters = 0;
4612 * i40e_close - Disables a network interface
4613 * @netdev: network interface device structure
4615 * The close entry point is called when an interface is de-activated
4616 * by the OS. The hardware is still under the driver's control, but
4617 * this netdev interface is disabled.
4619 * Returns 0, this is not allowed to fail
4621 static int i40e_close(struct net_device *netdev)
4623 struct i40e_netdev_priv *np = netdev_priv(netdev);
4624 struct i40e_vsi *vsi = np->vsi;
4626 i40e_vsi_close(vsi);
4632 * i40e_do_reset - Start a PF or Core Reset sequence
4633 * @pf: board private structure
4634 * @reset_flags: which reset is requested
4636 * The essential difference in resets is that the PF Reset
4637 * doesn't clear the packet buffers, doesn't reset the PE
4638 * firmware, and doesn't bother the other PFs on the chip.
4640 void i40e_do_reset(struct i40e_pf *pf, u32 reset_flags)
4644 WARN_ON(in_interrupt());
4646 if (i40e_check_asq_alive(&pf->hw))
4647 i40e_vc_notify_reset(pf);
4649 /* do the biggest reset indicated */
4650 if (reset_flags & (1 << __I40E_GLOBAL_RESET_REQUESTED)) {
4652 /* Request a Global Reset
4654 * This will start the chip's countdown to the actual full
4655 * chip reset event, and a warning interrupt to be sent
4656 * to all PFs, including the requestor. Our handler
4657 * for the warning interrupt will deal with the shutdown
4658 * and recovery of the switch setup.
4660 dev_dbg(&pf->pdev->dev, "GlobalR requested\n");
4661 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
4662 val |= I40E_GLGEN_RTRIG_GLOBR_MASK;
4663 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
4665 } else if (reset_flags & (1 << __I40E_CORE_RESET_REQUESTED)) {
4667 /* Request a Core Reset
4669 * Same as Global Reset, except does *not* include the MAC/PHY
4671 dev_dbg(&pf->pdev->dev, "CoreR requested\n");
4672 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
4673 val |= I40E_GLGEN_RTRIG_CORER_MASK;
4674 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
4675 i40e_flush(&pf->hw);
4677 } else if (reset_flags & (1 << __I40E_EMP_RESET_REQUESTED)) {
4679 /* Request a Firmware Reset
4681 * Same as Global reset, plus restarting the
4682 * embedded firmware engine.
4684 /* enable EMP Reset */
4685 val = rd32(&pf->hw, I40E_GLGEN_RSTENA_EMP);
4686 val |= I40E_GLGEN_RSTENA_EMP_EMP_RST_ENA_MASK;
4687 wr32(&pf->hw, I40E_GLGEN_RSTENA_EMP, val);
4689 /* force the reset */
4690 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
4691 val |= I40E_GLGEN_RTRIG_EMPFWR_MASK;
4692 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
4693 i40e_flush(&pf->hw);
4695 } else if (reset_flags & (1 << __I40E_PF_RESET_REQUESTED)) {
4697 /* Request a PF Reset
4699 * Resets only the PF-specific registers
4701 * This goes directly to the tear-down and rebuild of
4702 * the switch, since we need to do all the recovery as
4703 * for the Core Reset.
4705 dev_dbg(&pf->pdev->dev, "PFR requested\n");
4706 i40e_handle_reset_warning(pf);
4708 } else if (reset_flags & (1 << __I40E_REINIT_REQUESTED)) {
4711 /* Find the VSI(s) that requested a re-init */
4712 dev_info(&pf->pdev->dev,
4713 "VSI reinit requested\n");
4714 for (v = 0; v < pf->num_alloc_vsi; v++) {
4715 struct i40e_vsi *vsi = pf->vsi[v];
4717 test_bit(__I40E_REINIT_REQUESTED, &vsi->state)) {
4718 i40e_vsi_reinit_locked(pf->vsi[v]);
4719 clear_bit(__I40E_REINIT_REQUESTED, &vsi->state);
4723 /* no further action needed, so return now */
4725 } else if (reset_flags & (1 << __I40E_DOWN_REQUESTED)) {
4728 /* Find the VSI(s) that needs to be brought down */
4729 dev_info(&pf->pdev->dev, "VSI down requested\n");
4730 for (v = 0; v < pf->num_alloc_vsi; v++) {
4731 struct i40e_vsi *vsi = pf->vsi[v];
4733 test_bit(__I40E_DOWN_REQUESTED, &vsi->state)) {
4734 set_bit(__I40E_DOWN, &vsi->state);
4736 clear_bit(__I40E_DOWN_REQUESTED, &vsi->state);
4740 /* no further action needed, so return now */
4743 dev_info(&pf->pdev->dev,
4744 "bad reset request 0x%08x\n", reset_flags);
4749 #ifdef CONFIG_I40E_DCB
4751 * i40e_dcb_need_reconfig - Check if DCB needs reconfig
4752 * @pf: board private structure
4753 * @old_cfg: current DCB config
4754 * @new_cfg: new DCB config
4756 bool i40e_dcb_need_reconfig(struct i40e_pf *pf,
4757 struct i40e_dcbx_config *old_cfg,
4758 struct i40e_dcbx_config *new_cfg)
4760 bool need_reconfig = false;
4762 /* Check if ETS configuration has changed */
4763 if (memcmp(&new_cfg->etscfg,
4765 sizeof(new_cfg->etscfg))) {
4766 /* If Priority Table has changed reconfig is needed */
4767 if (memcmp(&new_cfg->etscfg.prioritytable,
4768 &old_cfg->etscfg.prioritytable,
4769 sizeof(new_cfg->etscfg.prioritytable))) {
4770 need_reconfig = true;
4771 dev_dbg(&pf->pdev->dev, "ETS UP2TC changed.\n");
4774 if (memcmp(&new_cfg->etscfg.tcbwtable,
4775 &old_cfg->etscfg.tcbwtable,
4776 sizeof(new_cfg->etscfg.tcbwtable)))
4777 dev_dbg(&pf->pdev->dev, "ETS TC BW Table changed.\n");
4779 if (memcmp(&new_cfg->etscfg.tsatable,
4780 &old_cfg->etscfg.tsatable,
4781 sizeof(new_cfg->etscfg.tsatable)))
4782 dev_dbg(&pf->pdev->dev, "ETS TSA Table changed.\n");
4785 /* Check if PFC configuration has changed */
4786 if (memcmp(&new_cfg->pfc,
4788 sizeof(new_cfg->pfc))) {
4789 need_reconfig = true;
4790 dev_dbg(&pf->pdev->dev, "PFC config change detected.\n");
4793 /* Check if APP Table has changed */
4794 if (memcmp(&new_cfg->app,
4796 sizeof(new_cfg->app))) {
4797 need_reconfig = true;
4798 dev_dbg(&pf->pdev->dev, "APP Table change detected.\n");
4801 return need_reconfig;
4805 * i40e_handle_lldp_event - Handle LLDP Change MIB event
4806 * @pf: board private structure
4807 * @e: event info posted on ARQ
4809 static int i40e_handle_lldp_event(struct i40e_pf *pf,
4810 struct i40e_arq_event_info *e)
4812 struct i40e_aqc_lldp_get_mib *mib =
4813 (struct i40e_aqc_lldp_get_mib *)&e->desc.params.raw;
4814 struct i40e_hw *hw = &pf->hw;
4815 struct i40e_dcbx_config *dcbx_cfg = &hw->local_dcbx_config;
4816 struct i40e_dcbx_config tmp_dcbx_cfg;
4817 bool need_reconfig = false;
4821 /* Not DCB capable or capability disabled */
4822 if (!(pf->flags & I40E_FLAG_DCB_CAPABLE))
4825 /* Ignore if event is not for Nearest Bridge */
4826 type = ((mib->type >> I40E_AQ_LLDP_BRIDGE_TYPE_SHIFT)
4827 & I40E_AQ_LLDP_BRIDGE_TYPE_MASK);
4828 if (type != I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE)
4831 /* Check MIB Type and return if event for Remote MIB update */
4832 type = mib->type & I40E_AQ_LLDP_MIB_TYPE_MASK;
4833 if (type == I40E_AQ_LLDP_MIB_REMOTE) {
4834 /* Update the remote cached instance and return */
4835 ret = i40e_aq_get_dcb_config(hw, I40E_AQ_LLDP_MIB_REMOTE,
4836 I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE,
4837 &hw->remote_dcbx_config);
4841 /* Convert/store the DCBX data from LLDPDU temporarily */
4842 memset(&tmp_dcbx_cfg, 0, sizeof(tmp_dcbx_cfg));
4843 ret = i40e_lldp_to_dcb_config(e->msg_buf, &tmp_dcbx_cfg);
4845 /* Error in LLDPDU parsing return */
4846 dev_info(&pf->pdev->dev, "Failed parsing LLDPDU from event buffer\n");
4850 /* No change detected in DCBX configs */
4851 if (!memcmp(&tmp_dcbx_cfg, dcbx_cfg, sizeof(tmp_dcbx_cfg))) {
4852 dev_dbg(&pf->pdev->dev, "No change detected in DCBX configuration.\n");
4856 need_reconfig = i40e_dcb_need_reconfig(pf, dcbx_cfg, &tmp_dcbx_cfg);
4858 i40e_dcbnl_flush_apps(pf, &tmp_dcbx_cfg);
4860 /* Overwrite the new configuration */
4861 *dcbx_cfg = tmp_dcbx_cfg;
4866 /* Enable DCB tagging only when more than one TC */
4867 if (i40e_dcb_get_num_tc(dcbx_cfg) > 1)
4868 pf->flags |= I40E_FLAG_DCB_ENABLED;
4870 pf->flags &= ~I40E_FLAG_DCB_ENABLED;
4872 /* Reconfiguration needed quiesce all VSIs */
4873 i40e_pf_quiesce_all_vsi(pf);
4875 /* Changes in configuration update VEB/VSI */
4876 i40e_dcb_reconfigure(pf);
4878 i40e_pf_unquiesce_all_vsi(pf);
4882 #endif /* CONFIG_I40E_DCB */
4885 * i40e_do_reset_safe - Protected reset path for userland calls.
4886 * @pf: board private structure
4887 * @reset_flags: which reset is requested
4890 void i40e_do_reset_safe(struct i40e_pf *pf, u32 reset_flags)
4893 i40e_do_reset(pf, reset_flags);
4898 * i40e_handle_lan_overflow_event - Handler for LAN queue overflow event
4899 * @pf: board private structure
4900 * @e: event info posted on ARQ
4902 * Handler for LAN Queue Overflow Event generated by the firmware for PF
4905 static void i40e_handle_lan_overflow_event(struct i40e_pf *pf,
4906 struct i40e_arq_event_info *e)
4908 struct i40e_aqc_lan_overflow *data =
4909 (struct i40e_aqc_lan_overflow *)&e->desc.params.raw;
4910 u32 queue = le32_to_cpu(data->prtdcb_rupto);
4911 u32 qtx_ctl = le32_to_cpu(data->otx_ctl);
4912 struct i40e_hw *hw = &pf->hw;
4916 dev_dbg(&pf->pdev->dev, "overflow Rx Queue Number = %d QTX_CTL=0x%08x\n",
4919 /* Queue belongs to VF, find the VF and issue VF reset */
4920 if (((qtx_ctl & I40E_QTX_CTL_PFVF_Q_MASK)
4921 >> I40E_QTX_CTL_PFVF_Q_SHIFT) == I40E_QTX_CTL_VF_QUEUE) {
4922 vf_id = (u16)((qtx_ctl & I40E_QTX_CTL_VFVM_INDX_MASK)
4923 >> I40E_QTX_CTL_VFVM_INDX_SHIFT);
4924 vf_id -= hw->func_caps.vf_base_id;
4925 vf = &pf->vf[vf_id];
4926 i40e_vc_notify_vf_reset(vf);
4927 /* Allow VF to process pending reset notification */
4929 i40e_reset_vf(vf, false);
4934 * i40e_service_event_complete - Finish up the service event
4935 * @pf: board private structure
4937 static void i40e_service_event_complete(struct i40e_pf *pf)
4939 BUG_ON(!test_bit(__I40E_SERVICE_SCHED, &pf->state));
4941 /* flush memory to make sure state is correct before next watchog */
4942 smp_mb__before_atomic();
4943 clear_bit(__I40E_SERVICE_SCHED, &pf->state);
4947 * i40e_get_cur_guaranteed_fd_count - Get the consumed guaranteed FD filters
4948 * @pf: board private structure
4950 int i40e_get_cur_guaranteed_fd_count(struct i40e_pf *pf)
4954 val = rd32(&pf->hw, I40E_PFQF_FDSTAT);
4955 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK);
4960 * i40e_get_current_fd_count - Get the count of total FD filters programmed
4961 * @pf: board private structure
4963 int i40e_get_current_fd_count(struct i40e_pf *pf)
4966 val = rd32(&pf->hw, I40E_PFQF_FDSTAT);
4967 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK) +
4968 ((val & I40E_PFQF_FDSTAT_BEST_CNT_MASK) >>
4969 I40E_PFQF_FDSTAT_BEST_CNT_SHIFT);
4973 * i40e_fdir_check_and_reenable - Function to reenabe FD ATR or SB if disabled
4974 * @pf: board private structure
4976 void i40e_fdir_check_and_reenable(struct i40e_pf *pf)
4978 u32 fcnt_prog, fcnt_avail;
4980 /* Check if, FD SB or ATR was auto disabled and if there is enough room
4983 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
4984 (pf->flags & I40E_FLAG_FD_SB_ENABLED))
4986 fcnt_prog = i40e_get_cur_guaranteed_fd_count(pf);
4987 fcnt_avail = pf->fdir_pf_filter_count;
4988 if (fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM)) {
4989 if ((pf->flags & I40E_FLAG_FD_SB_ENABLED) &&
4990 (pf->auto_disable_flags & I40E_FLAG_FD_SB_ENABLED)) {
4991 pf->auto_disable_flags &= ~I40E_FLAG_FD_SB_ENABLED;
4992 dev_info(&pf->pdev->dev, "FD Sideband/ntuple is being enabled since we have space in the table now\n");
4995 /* Wait for some more space to be available to turn on ATR */
4996 if (fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM * 2)) {
4997 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
4998 (pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED)) {
4999 pf->auto_disable_flags &= ~I40E_FLAG_FD_ATR_ENABLED;
5000 dev_info(&pf->pdev->dev, "ATR is being enabled since we have space in the table now\n");
5006 * i40e_fdir_reinit_subtask - Worker thread to reinit FDIR filter table
5007 * @pf: board private structure
5009 static void i40e_fdir_reinit_subtask(struct i40e_pf *pf)
5011 if (!(pf->flags & I40E_FLAG_FDIR_REQUIRES_REINIT))
5014 /* if interface is down do nothing */
5015 if (test_bit(__I40E_DOWN, &pf->state))
5017 i40e_fdir_check_and_reenable(pf);
5019 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
5020 (pf->flags & I40E_FLAG_FD_SB_ENABLED))
5021 pf->flags &= ~I40E_FLAG_FDIR_REQUIRES_REINIT;
5025 * i40e_vsi_link_event - notify VSI of a link event
5026 * @vsi: vsi to be notified
5027 * @link_up: link up or down
5029 static void i40e_vsi_link_event(struct i40e_vsi *vsi, bool link_up)
5034 switch (vsi->type) {
5036 if (!vsi->netdev || !vsi->netdev_registered)
5040 netif_carrier_on(vsi->netdev);
5041 netif_tx_wake_all_queues(vsi->netdev);
5043 netif_carrier_off(vsi->netdev);
5044 netif_tx_stop_all_queues(vsi->netdev);
5048 case I40E_VSI_SRIOV:
5051 case I40E_VSI_VMDQ2:
5053 case I40E_VSI_MIRROR:
5055 /* there is no notification for other VSIs */
5061 * i40e_veb_link_event - notify elements on the veb of a link event
5062 * @veb: veb to be notified
5063 * @link_up: link up or down
5065 static void i40e_veb_link_event(struct i40e_veb *veb, bool link_up)
5070 if (!veb || !veb->pf)
5074 /* depth first... */
5075 for (i = 0; i < I40E_MAX_VEB; i++)
5076 if (pf->veb[i] && (pf->veb[i]->uplink_seid == veb->seid))
5077 i40e_veb_link_event(pf->veb[i], link_up);
5079 /* ... now the local VSIs */
5080 for (i = 0; i < pf->num_alloc_vsi; i++)
5081 if (pf->vsi[i] && (pf->vsi[i]->uplink_seid == veb->seid))
5082 i40e_vsi_link_event(pf->vsi[i], link_up);
5086 * i40e_link_event - Update netif_carrier status
5087 * @pf: board private structure
5089 static void i40e_link_event(struct i40e_pf *pf)
5091 bool new_link, old_link;
5093 new_link = (pf->hw.phy.link_info.link_info & I40E_AQ_LINK_UP);
5094 old_link = (pf->hw.phy.link_info_old.link_info & I40E_AQ_LINK_UP);
5096 if (new_link == old_link)
5098 if (!test_bit(__I40E_DOWN, &pf->vsi[pf->lan_vsi]->state))
5099 i40e_print_link_message(pf->vsi[pf->lan_vsi], new_link);
5101 /* Notify the base of the switch tree connected to
5102 * the link. Floating VEBs are not notified.
5104 if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb])
5105 i40e_veb_link_event(pf->veb[pf->lan_veb], new_link);
5107 i40e_vsi_link_event(pf->vsi[pf->lan_vsi], new_link);
5110 i40e_vc_notify_link_state(pf);
5112 if (pf->flags & I40E_FLAG_PTP)
5113 i40e_ptp_set_increment(pf);
5117 * i40e_check_hang_subtask - Check for hung queues and dropped interrupts
5118 * @pf: board private structure
5120 * Set the per-queue flags to request a check for stuck queues in the irq
5121 * clean functions, then force interrupts to be sure the irq clean is called.
5123 static void i40e_check_hang_subtask(struct i40e_pf *pf)
5127 /* If we're down or resetting, just bail */
5128 if (test_bit(__I40E_CONFIG_BUSY, &pf->state))
5131 /* for each VSI/netdev
5133 * set the check flag
5135 * force an interrupt
5137 for (v = 0; v < pf->num_alloc_vsi; v++) {
5138 struct i40e_vsi *vsi = pf->vsi[v];
5142 test_bit(__I40E_DOWN, &vsi->state) ||
5143 (vsi->netdev && !netif_carrier_ok(vsi->netdev)))
5146 for (i = 0; i < vsi->num_queue_pairs; i++) {
5147 set_check_for_tx_hang(vsi->tx_rings[i]);
5148 if (test_bit(__I40E_HANG_CHECK_ARMED,
5149 &vsi->tx_rings[i]->state))
5154 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED)) {
5155 wr32(&vsi->back->hw, I40E_PFINT_DYN_CTL0,
5156 (I40E_PFINT_DYN_CTL0_INTENA_MASK |
5157 I40E_PFINT_DYN_CTL0_SWINT_TRIG_MASK));
5159 u16 vec = vsi->base_vector - 1;
5160 u32 val = (I40E_PFINT_DYN_CTLN_INTENA_MASK |
5161 I40E_PFINT_DYN_CTLN_SWINT_TRIG_MASK);
5162 for (i = 0; i < vsi->num_q_vectors; i++, vec++)
5163 wr32(&vsi->back->hw,
5164 I40E_PFINT_DYN_CTLN(vec), val);
5166 i40e_flush(&vsi->back->hw);
5172 * i40e_watchdog_subtask - Check and bring link up
5173 * @pf: board private structure
5175 static void i40e_watchdog_subtask(struct i40e_pf *pf)
5179 /* if interface is down do nothing */
5180 if (test_bit(__I40E_DOWN, &pf->state) ||
5181 test_bit(__I40E_CONFIG_BUSY, &pf->state))
5184 /* Update the stats for active netdevs so the network stack
5185 * can look at updated numbers whenever it cares to
5187 for (i = 0; i < pf->num_alloc_vsi; i++)
5188 if (pf->vsi[i] && pf->vsi[i]->netdev)
5189 i40e_update_stats(pf->vsi[i]);
5191 /* Update the stats for the active switching components */
5192 for (i = 0; i < I40E_MAX_VEB; i++)
5194 i40e_update_veb_stats(pf->veb[i]);
5196 i40e_ptp_rx_hang(pf->vsi[pf->lan_vsi]);
5200 * i40e_reset_subtask - Set up for resetting the device and driver
5201 * @pf: board private structure
5203 static void i40e_reset_subtask(struct i40e_pf *pf)
5205 u32 reset_flags = 0;
5208 if (test_bit(__I40E_REINIT_REQUESTED, &pf->state)) {
5209 reset_flags |= (1 << __I40E_REINIT_REQUESTED);
5210 clear_bit(__I40E_REINIT_REQUESTED, &pf->state);
5212 if (test_bit(__I40E_PF_RESET_REQUESTED, &pf->state)) {
5213 reset_flags |= (1 << __I40E_PF_RESET_REQUESTED);
5214 clear_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
5216 if (test_bit(__I40E_CORE_RESET_REQUESTED, &pf->state)) {
5217 reset_flags |= (1 << __I40E_CORE_RESET_REQUESTED);
5218 clear_bit(__I40E_CORE_RESET_REQUESTED, &pf->state);
5220 if (test_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state)) {
5221 reset_flags |= (1 << __I40E_GLOBAL_RESET_REQUESTED);
5222 clear_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state);
5224 if (test_bit(__I40E_DOWN_REQUESTED, &pf->state)) {
5225 reset_flags |= (1 << __I40E_DOWN_REQUESTED);
5226 clear_bit(__I40E_DOWN_REQUESTED, &pf->state);
5229 /* If there's a recovery already waiting, it takes
5230 * precedence before starting a new reset sequence.
5232 if (test_bit(__I40E_RESET_INTR_RECEIVED, &pf->state)) {
5233 i40e_handle_reset_warning(pf);
5237 /* If we're already down or resetting, just bail */
5239 !test_bit(__I40E_DOWN, &pf->state) &&
5240 !test_bit(__I40E_CONFIG_BUSY, &pf->state))
5241 i40e_do_reset(pf, reset_flags);
5248 * i40e_handle_link_event - Handle link event
5249 * @pf: board private structure
5250 * @e: event info posted on ARQ
5252 static void i40e_handle_link_event(struct i40e_pf *pf,
5253 struct i40e_arq_event_info *e)
5255 struct i40e_hw *hw = &pf->hw;
5256 struct i40e_aqc_get_link_status *status =
5257 (struct i40e_aqc_get_link_status *)&e->desc.params.raw;
5258 struct i40e_link_status *hw_link_info = &hw->phy.link_info;
5260 /* save off old link status information */
5261 memcpy(&pf->hw.phy.link_info_old, hw_link_info,
5262 sizeof(pf->hw.phy.link_info_old));
5264 /* update link status */
5265 hw_link_info->phy_type = (enum i40e_aq_phy_type)status->phy_type;
5266 hw_link_info->link_speed = (enum i40e_aq_link_speed)status->link_speed;
5267 hw_link_info->link_info = status->link_info;
5268 hw_link_info->an_info = status->an_info;
5269 hw_link_info->ext_info = status->ext_info;
5270 hw_link_info->lse_enable =
5271 le16_to_cpu(status->command_flags) &
5274 /* process the event */
5275 i40e_link_event(pf);
5277 /* Do a new status request to re-enable LSE reporting
5278 * and load new status information into the hw struct,
5279 * then see if the status changed while processing the
5282 i40e_aq_get_link_info(&pf->hw, true, NULL, NULL);
5283 i40e_link_event(pf);
5287 * i40e_clean_adminq_subtask - Clean the AdminQ rings
5288 * @pf: board private structure
5290 static void i40e_clean_adminq_subtask(struct i40e_pf *pf)
5292 struct i40e_arq_event_info event;
5293 struct i40e_hw *hw = &pf->hw;
5300 if (!test_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state))
5303 /* check for error indications */
5304 val = rd32(&pf->hw, pf->hw.aq.arq.len);
5306 if (val & I40E_PF_ARQLEN_ARQVFE_MASK) {
5307 dev_info(&pf->pdev->dev, "ARQ VF Error detected\n");
5308 val &= ~I40E_PF_ARQLEN_ARQVFE_MASK;
5310 if (val & I40E_PF_ARQLEN_ARQOVFL_MASK) {
5311 dev_info(&pf->pdev->dev, "ARQ Overflow Error detected\n");
5312 val &= ~I40E_PF_ARQLEN_ARQOVFL_MASK;
5314 if (val & I40E_PF_ARQLEN_ARQCRIT_MASK) {
5315 dev_info(&pf->pdev->dev, "ARQ Critical Error detected\n");
5316 val &= ~I40E_PF_ARQLEN_ARQCRIT_MASK;
5319 wr32(&pf->hw, pf->hw.aq.arq.len, val);
5321 val = rd32(&pf->hw, pf->hw.aq.asq.len);
5323 if (val & I40E_PF_ATQLEN_ATQVFE_MASK) {
5324 dev_info(&pf->pdev->dev, "ASQ VF Error detected\n");
5325 val &= ~I40E_PF_ATQLEN_ATQVFE_MASK;
5327 if (val & I40E_PF_ATQLEN_ATQOVFL_MASK) {
5328 dev_info(&pf->pdev->dev, "ASQ Overflow Error detected\n");
5329 val &= ~I40E_PF_ATQLEN_ATQOVFL_MASK;
5331 if (val & I40E_PF_ATQLEN_ATQCRIT_MASK) {
5332 dev_info(&pf->pdev->dev, "ASQ Critical Error detected\n");
5333 val &= ~I40E_PF_ATQLEN_ATQCRIT_MASK;
5336 wr32(&pf->hw, pf->hw.aq.asq.len, val);
5338 event.msg_size = I40E_MAX_AQ_BUF_SIZE;
5339 event.msg_buf = kzalloc(event.msg_size, GFP_KERNEL);
5344 event.msg_size = I40E_MAX_AQ_BUF_SIZE; /* reinit each time */
5345 ret = i40e_clean_arq_element(hw, &event, &pending);
5346 if (ret == I40E_ERR_ADMIN_QUEUE_NO_WORK) {
5347 dev_info(&pf->pdev->dev, "No ARQ event found\n");
5350 dev_info(&pf->pdev->dev, "ARQ event error %d\n", ret);
5354 opcode = le16_to_cpu(event.desc.opcode);
5357 case i40e_aqc_opc_get_link_status:
5358 i40e_handle_link_event(pf, &event);
5360 case i40e_aqc_opc_send_msg_to_pf:
5361 ret = i40e_vc_process_vf_msg(pf,
5362 le16_to_cpu(event.desc.retval),
5363 le32_to_cpu(event.desc.cookie_high),
5364 le32_to_cpu(event.desc.cookie_low),
5368 case i40e_aqc_opc_lldp_update_mib:
5369 dev_dbg(&pf->pdev->dev, "ARQ: Update LLDP MIB event received\n");
5370 #ifdef CONFIG_I40E_DCB
5372 ret = i40e_handle_lldp_event(pf, &event);
5374 #endif /* CONFIG_I40E_DCB */
5376 case i40e_aqc_opc_event_lan_overflow:
5377 dev_dbg(&pf->pdev->dev, "ARQ LAN queue overflow event received\n");
5378 i40e_handle_lan_overflow_event(pf, &event);
5380 case i40e_aqc_opc_send_msg_to_peer:
5381 dev_info(&pf->pdev->dev, "ARQ: Msg from other pf\n");
5384 dev_info(&pf->pdev->dev,
5385 "ARQ Error: Unknown event 0x%04x received\n",
5389 } while (pending && (i++ < pf->adminq_work_limit));
5391 clear_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state);
5392 /* re-enable Admin queue interrupt cause */
5393 val = rd32(hw, I40E_PFINT_ICR0_ENA);
5394 val |= I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
5395 wr32(hw, I40E_PFINT_ICR0_ENA, val);
5398 kfree(event.msg_buf);
5402 * i40e_verify_eeprom - make sure eeprom is good to use
5403 * @pf: board private structure
5405 static void i40e_verify_eeprom(struct i40e_pf *pf)
5409 err = i40e_diag_eeprom_test(&pf->hw);
5411 /* retry in case of garbage read */
5412 err = i40e_diag_eeprom_test(&pf->hw);
5414 dev_info(&pf->pdev->dev, "eeprom check failed (%d), Tx/Rx traffic disabled\n",
5416 set_bit(__I40E_BAD_EEPROM, &pf->state);
5420 if (!err && test_bit(__I40E_BAD_EEPROM, &pf->state)) {
5421 dev_info(&pf->pdev->dev, "eeprom check passed, Tx/Rx traffic enabled\n");
5422 clear_bit(__I40E_BAD_EEPROM, &pf->state);
5427 * i40e_reconstitute_veb - rebuild the VEB and anything connected to it
5428 * @veb: pointer to the VEB instance
5430 * This is a recursive function that first builds the attached VSIs then
5431 * recurses in to build the next layer of VEB. We track the connections
5432 * through our own index numbers because the seid's from the HW could
5433 * change across the reset.
5435 static int i40e_reconstitute_veb(struct i40e_veb *veb)
5437 struct i40e_vsi *ctl_vsi = NULL;
5438 struct i40e_pf *pf = veb->pf;
5442 /* build VSI that owns this VEB, temporarily attached to base VEB */
5443 for (v = 0; v < pf->num_alloc_vsi && !ctl_vsi; v++) {
5445 pf->vsi[v]->veb_idx == veb->idx &&
5446 pf->vsi[v]->flags & I40E_VSI_FLAG_VEB_OWNER) {
5447 ctl_vsi = pf->vsi[v];
5452 dev_info(&pf->pdev->dev,
5453 "missing owner VSI for veb_idx %d\n", veb->idx);
5455 goto end_reconstitute;
5457 if (ctl_vsi != pf->vsi[pf->lan_vsi])
5458 ctl_vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
5459 ret = i40e_add_vsi(ctl_vsi);
5461 dev_info(&pf->pdev->dev,
5462 "rebuild of owner VSI failed: %d\n", ret);
5463 goto end_reconstitute;
5465 i40e_vsi_reset_stats(ctl_vsi);
5467 /* create the VEB in the switch and move the VSI onto the VEB */
5468 ret = i40e_add_veb(veb, ctl_vsi);
5470 goto end_reconstitute;
5472 /* create the remaining VSIs attached to this VEB */
5473 for (v = 0; v < pf->num_alloc_vsi; v++) {
5474 if (!pf->vsi[v] || pf->vsi[v] == ctl_vsi)
5477 if (pf->vsi[v]->veb_idx == veb->idx) {
5478 struct i40e_vsi *vsi = pf->vsi[v];
5479 vsi->uplink_seid = veb->seid;
5480 ret = i40e_add_vsi(vsi);
5482 dev_info(&pf->pdev->dev,
5483 "rebuild of vsi_idx %d failed: %d\n",
5485 goto end_reconstitute;
5487 i40e_vsi_reset_stats(vsi);
5491 /* create any VEBs attached to this VEB - RECURSION */
5492 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
5493 if (pf->veb[veb_idx] && pf->veb[veb_idx]->veb_idx == veb->idx) {
5494 pf->veb[veb_idx]->uplink_seid = veb->seid;
5495 ret = i40e_reconstitute_veb(pf->veb[veb_idx]);
5506 * i40e_get_capabilities - get info about the HW
5507 * @pf: the PF struct
5509 static int i40e_get_capabilities(struct i40e_pf *pf)
5511 struct i40e_aqc_list_capabilities_element_resp *cap_buf;
5516 buf_len = 40 * sizeof(struct i40e_aqc_list_capabilities_element_resp);
5518 cap_buf = kzalloc(buf_len, GFP_KERNEL);
5522 /* this loads the data into the hw struct for us */
5523 err = i40e_aq_discover_capabilities(&pf->hw, cap_buf, buf_len,
5525 i40e_aqc_opc_list_func_capabilities,
5527 /* data loaded, buffer no longer needed */
5530 if (pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOMEM) {
5531 /* retry with a larger buffer */
5532 buf_len = data_size;
5533 } else if (pf->hw.aq.asq_last_status != I40E_AQ_RC_OK) {
5534 dev_info(&pf->pdev->dev,
5535 "capability discovery failed: aq=%d\n",
5536 pf->hw.aq.asq_last_status);
5541 if (((pf->hw.aq.fw_maj_ver == 2) && (pf->hw.aq.fw_min_ver < 22)) ||
5542 (pf->hw.aq.fw_maj_ver < 2)) {
5543 pf->hw.func_caps.num_msix_vectors++;
5544 pf->hw.func_caps.num_msix_vectors_vf++;
5547 if (pf->hw.debug_mask & I40E_DEBUG_USER)
5548 dev_info(&pf->pdev->dev,
5549 "pf=%d, num_vfs=%d, msix_pf=%d, msix_vf=%d, fd_g=%d, fd_b=%d, pf_max_q=%d num_vsi=%d\n",
5550 pf->hw.pf_id, pf->hw.func_caps.num_vfs,
5551 pf->hw.func_caps.num_msix_vectors,
5552 pf->hw.func_caps.num_msix_vectors_vf,
5553 pf->hw.func_caps.fd_filters_guaranteed,
5554 pf->hw.func_caps.fd_filters_best_effort,
5555 pf->hw.func_caps.num_tx_qp,
5556 pf->hw.func_caps.num_vsis);
5558 #define DEF_NUM_VSI (1 + (pf->hw.func_caps.fcoe ? 1 : 0) \
5559 + pf->hw.func_caps.num_vfs)
5560 if (pf->hw.revision_id == 0 && (DEF_NUM_VSI > pf->hw.func_caps.num_vsis)) {
5561 dev_info(&pf->pdev->dev,
5562 "got num_vsis %d, setting num_vsis to %d\n",
5563 pf->hw.func_caps.num_vsis, DEF_NUM_VSI);
5564 pf->hw.func_caps.num_vsis = DEF_NUM_VSI;
5570 static int i40e_vsi_clear(struct i40e_vsi *vsi);
5573 * i40e_fdir_sb_setup - initialize the Flow Director resources for Sideband
5574 * @pf: board private structure
5576 static void i40e_fdir_sb_setup(struct i40e_pf *pf)
5578 struct i40e_vsi *vsi;
5581 /* quick workaround for an NVM issue that leaves a critical register
5584 if (!rd32(&pf->hw, I40E_GLQF_HKEY(0))) {
5585 static const u32 hkey[] = {
5586 0xe640d33f, 0xcdfe98ab, 0x73fa7161, 0x0d7a7d36,
5587 0xeacb7d61, 0xaa4f05b6, 0x9c5c89ed, 0xfc425ddb,
5588 0xa4654832, 0xfc7461d4, 0x8f827619, 0xf5c63c21,
5591 for (i = 0; i <= I40E_GLQF_HKEY_MAX_INDEX; i++)
5592 wr32(&pf->hw, I40E_GLQF_HKEY(i), hkey[i]);
5595 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
5598 /* find existing VSI and see if it needs configuring */
5600 for (i = 0; i < pf->num_alloc_vsi; i++) {
5601 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
5607 /* create a new VSI if none exists */
5609 vsi = i40e_vsi_setup(pf, I40E_VSI_FDIR,
5610 pf->vsi[pf->lan_vsi]->seid, 0);
5612 dev_info(&pf->pdev->dev, "Couldn't create FDir VSI\n");
5613 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
5618 i40e_vsi_setup_irqhandler(vsi, i40e_fdir_clean_ring);
5622 * i40e_fdir_teardown - release the Flow Director resources
5623 * @pf: board private structure
5625 static void i40e_fdir_teardown(struct i40e_pf *pf)
5629 i40e_fdir_filter_exit(pf);
5630 for (i = 0; i < pf->num_alloc_vsi; i++) {
5631 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
5632 i40e_vsi_release(pf->vsi[i]);
5639 * i40e_prep_for_reset - prep for the core to reset
5640 * @pf: board private structure
5642 * Close up the VFs and other things in prep for pf Reset.
5644 static void i40e_prep_for_reset(struct i40e_pf *pf)
5646 struct i40e_hw *hw = &pf->hw;
5647 i40e_status ret = 0;
5650 clear_bit(__I40E_RESET_INTR_RECEIVED, &pf->state);
5651 if (test_and_set_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state))
5654 dev_dbg(&pf->pdev->dev, "Tearing down internal switch for reset\n");
5656 /* quiesce the VSIs and their queues that are not already DOWN */
5657 i40e_pf_quiesce_all_vsi(pf);
5659 for (v = 0; v < pf->num_alloc_vsi; v++) {
5661 pf->vsi[v]->seid = 0;
5664 i40e_shutdown_adminq(&pf->hw);
5666 /* call shutdown HMC */
5667 if (hw->hmc.hmc_obj) {
5668 ret = i40e_shutdown_lan_hmc(hw);
5670 dev_warn(&pf->pdev->dev,
5671 "shutdown_lan_hmc failed: %d\n", ret);
5676 * i40e_send_version - update firmware with driver version
5679 static void i40e_send_version(struct i40e_pf *pf)
5681 struct i40e_driver_version dv;
5683 dv.major_version = DRV_VERSION_MAJOR;
5684 dv.minor_version = DRV_VERSION_MINOR;
5685 dv.build_version = DRV_VERSION_BUILD;
5686 dv.subbuild_version = 0;
5687 strncpy(dv.driver_string, DRV_VERSION, sizeof(dv.driver_string));
5688 i40e_aq_send_driver_version(&pf->hw, &dv, NULL);
5692 * i40e_reset_and_rebuild - reset and rebuild using a saved config
5693 * @pf: board private structure
5694 * @reinit: if the Main VSI needs to re-initialized.
5696 static void i40e_reset_and_rebuild(struct i40e_pf *pf, bool reinit)
5698 struct i40e_hw *hw = &pf->hw;
5702 /* Now we wait for GRST to settle out.
5703 * We don't have to delete the VEBs or VSIs from the hw switch
5704 * because the reset will make them disappear.
5706 ret = i40e_pf_reset(hw);
5708 dev_info(&pf->pdev->dev, "PF reset failed, %d\n", ret);
5709 goto end_core_reset;
5713 if (test_bit(__I40E_DOWN, &pf->state))
5714 goto end_core_reset;
5715 dev_dbg(&pf->pdev->dev, "Rebuilding internal switch\n");
5717 /* rebuild the basics for the AdminQ, HMC, and initial HW switch */
5718 ret = i40e_init_adminq(&pf->hw);
5720 dev_info(&pf->pdev->dev, "Rebuild AdminQ failed, %d\n", ret);
5721 goto end_core_reset;
5724 /* re-verify the eeprom if we just had an EMP reset */
5725 if (test_bit(__I40E_EMP_RESET_REQUESTED, &pf->state)) {
5726 clear_bit(__I40E_EMP_RESET_REQUESTED, &pf->state);
5727 i40e_verify_eeprom(pf);
5730 i40e_clear_pxe_mode(hw);
5731 ret = i40e_get_capabilities(pf);
5733 dev_info(&pf->pdev->dev, "i40e_get_capabilities failed, %d\n",
5735 goto end_core_reset;
5738 ret = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
5739 hw->func_caps.num_rx_qp,
5740 pf->fcoe_hmc_cntx_num, pf->fcoe_hmc_filt_num);
5742 dev_info(&pf->pdev->dev, "init_lan_hmc failed: %d\n", ret);
5743 goto end_core_reset;
5745 ret = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
5747 dev_info(&pf->pdev->dev, "configure_lan_hmc failed: %d\n", ret);
5748 goto end_core_reset;
5751 #ifdef CONFIG_I40E_DCB
5752 ret = i40e_init_pf_dcb(pf);
5754 dev_info(&pf->pdev->dev, "init_pf_dcb failed: %d\n", ret);
5755 goto end_core_reset;
5757 #endif /* CONFIG_I40E_DCB */
5759 /* do basic switch setup */
5760 ret = i40e_setup_pf_switch(pf, reinit);
5762 goto end_core_reset;
5764 /* Rebuild the VSIs and VEBs that existed before reset.
5765 * They are still in our local switch element arrays, so only
5766 * need to rebuild the switch model in the HW.
5768 * If there were VEBs but the reconstitution failed, we'll try
5769 * try to recover minimal use by getting the basic PF VSI working.
5771 if (pf->vsi[pf->lan_vsi]->uplink_seid != pf->mac_seid) {
5772 dev_dbg(&pf->pdev->dev, "attempting to rebuild switch\n");
5773 /* find the one VEB connected to the MAC, and find orphans */
5774 for (v = 0; v < I40E_MAX_VEB; v++) {
5778 if (pf->veb[v]->uplink_seid == pf->mac_seid ||
5779 pf->veb[v]->uplink_seid == 0) {
5780 ret = i40e_reconstitute_veb(pf->veb[v]);
5785 /* If Main VEB failed, we're in deep doodoo,
5786 * so give up rebuilding the switch and set up
5787 * for minimal rebuild of PF VSI.
5788 * If orphan failed, we'll report the error
5789 * but try to keep going.
5791 if (pf->veb[v]->uplink_seid == pf->mac_seid) {
5792 dev_info(&pf->pdev->dev,
5793 "rebuild of switch failed: %d, will try to set up simple PF connection\n",
5795 pf->vsi[pf->lan_vsi]->uplink_seid
5798 } else if (pf->veb[v]->uplink_seid == 0) {
5799 dev_info(&pf->pdev->dev,
5800 "rebuild of orphan VEB failed: %d\n",
5807 if (pf->vsi[pf->lan_vsi]->uplink_seid == pf->mac_seid) {
5808 dev_dbg(&pf->pdev->dev, "attempting to rebuild PF VSI\n");
5809 /* no VEB, so rebuild only the Main VSI */
5810 ret = i40e_add_vsi(pf->vsi[pf->lan_vsi]);
5812 dev_info(&pf->pdev->dev,
5813 "rebuild of Main VSI failed: %d\n", ret);
5814 goto end_core_reset;
5818 /* reinit the misc interrupt */
5819 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
5820 ret = i40e_setup_misc_vector(pf);
5822 /* restart the VSIs that were rebuilt and running before the reset */
5823 i40e_pf_unquiesce_all_vsi(pf);
5825 if (pf->num_alloc_vfs) {
5826 for (v = 0; v < pf->num_alloc_vfs; v++)
5827 i40e_reset_vf(&pf->vf[v], true);
5830 /* tell the firmware that we're starting */
5831 i40e_send_version(pf);
5834 clear_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state);
5838 * i40e_handle_reset_warning - prep for the pf to reset, reset and rebuild
5839 * @pf: board private structure
5841 * Close up the VFs and other things in prep for a Core Reset,
5842 * then get ready to rebuild the world.
5844 static void i40e_handle_reset_warning(struct i40e_pf *pf)
5846 i40e_prep_for_reset(pf);
5847 i40e_reset_and_rebuild(pf, false);
5851 * i40e_handle_mdd_event
5852 * @pf: pointer to the pf structure
5854 * Called from the MDD irq handler to identify possibly malicious vfs
5856 static void i40e_handle_mdd_event(struct i40e_pf *pf)
5858 struct i40e_hw *hw = &pf->hw;
5859 bool mdd_detected = false;
5860 bool pf_mdd_detected = false;
5865 if (!test_bit(__I40E_MDD_EVENT_PENDING, &pf->state))
5868 /* find what triggered the MDD event */
5869 reg = rd32(hw, I40E_GL_MDET_TX);
5870 if (reg & I40E_GL_MDET_TX_VALID_MASK) {
5871 u8 pf_num = (reg & I40E_GL_MDET_TX_PF_NUM_MASK) >>
5872 I40E_GL_MDET_TX_PF_NUM_SHIFT;
5873 u8 vf_num = (reg & I40E_GL_MDET_TX_VF_NUM_MASK) >>
5874 I40E_GL_MDET_TX_VF_NUM_SHIFT;
5875 u8 event = (reg & I40E_GL_MDET_TX_EVENT_SHIFT) >>
5876 I40E_GL_MDET_TX_EVENT_SHIFT;
5877 u8 queue = (reg & I40E_GL_MDET_TX_QUEUE_MASK) >>
5878 I40E_GL_MDET_TX_QUEUE_SHIFT;
5879 dev_info(&pf->pdev->dev,
5880 "Malicious Driver Detection event 0x%02x on TX queue %d pf number 0x%02x vf number 0x%02x\n",
5881 event, queue, pf_num, vf_num);
5882 wr32(hw, I40E_GL_MDET_TX, 0xffffffff);
5883 mdd_detected = true;
5885 reg = rd32(hw, I40E_GL_MDET_RX);
5886 if (reg & I40E_GL_MDET_RX_VALID_MASK) {
5887 u8 func = (reg & I40E_GL_MDET_RX_FUNCTION_MASK) >>
5888 I40E_GL_MDET_RX_FUNCTION_SHIFT;
5889 u8 event = (reg & I40E_GL_MDET_RX_EVENT_SHIFT) >>
5890 I40E_GL_MDET_RX_EVENT_SHIFT;
5891 u8 queue = (reg & I40E_GL_MDET_RX_QUEUE_MASK) >>
5892 I40E_GL_MDET_RX_QUEUE_SHIFT;
5893 dev_info(&pf->pdev->dev,
5894 "Malicious Driver Detection event 0x%02x on RX queue %d of function 0x%02x\n",
5895 event, queue, func);
5896 wr32(hw, I40E_GL_MDET_RX, 0xffffffff);
5897 mdd_detected = true;
5901 reg = rd32(hw, I40E_PF_MDET_TX);
5902 if (reg & I40E_PF_MDET_TX_VALID_MASK) {
5903 wr32(hw, I40E_PF_MDET_TX, 0xFFFF);
5904 dev_info(&pf->pdev->dev,
5905 "MDD TX event is for this function 0x%08x, requesting PF reset.\n",
5907 pf_mdd_detected = true;
5909 reg = rd32(hw, I40E_PF_MDET_RX);
5910 if (reg & I40E_PF_MDET_RX_VALID_MASK) {
5911 wr32(hw, I40E_PF_MDET_RX, 0xFFFF);
5912 dev_info(&pf->pdev->dev,
5913 "MDD RX event is for this function 0x%08x, requesting PF reset.\n",
5915 pf_mdd_detected = true;
5917 /* Queue belongs to the PF, initiate a reset */
5918 if (pf_mdd_detected) {
5919 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
5920 i40e_service_event_schedule(pf);
5924 /* see if one of the VFs needs its hand slapped */
5925 for (i = 0; i < pf->num_alloc_vfs && mdd_detected; i++) {
5927 reg = rd32(hw, I40E_VP_MDET_TX(i));
5928 if (reg & I40E_VP_MDET_TX_VALID_MASK) {
5929 wr32(hw, I40E_VP_MDET_TX(i), 0xFFFF);
5930 vf->num_mdd_events++;
5931 dev_info(&pf->pdev->dev, "MDD TX event on VF %d\n", i);
5934 reg = rd32(hw, I40E_VP_MDET_RX(i));
5935 if (reg & I40E_VP_MDET_RX_VALID_MASK) {
5936 wr32(hw, I40E_VP_MDET_RX(i), 0xFFFF);
5937 vf->num_mdd_events++;
5938 dev_info(&pf->pdev->dev, "MDD RX event on VF %d\n", i);
5941 if (vf->num_mdd_events > I40E_DEFAULT_NUM_MDD_EVENTS_ALLOWED) {
5942 dev_info(&pf->pdev->dev,
5943 "Too many MDD events on VF %d, disabled\n", i);
5944 dev_info(&pf->pdev->dev,
5945 "Use PF Control I/F to re-enable the VF\n");
5946 set_bit(I40E_VF_STAT_DISABLED, &vf->vf_states);
5950 /* re-enable mdd interrupt cause */
5951 clear_bit(__I40E_MDD_EVENT_PENDING, &pf->state);
5952 reg = rd32(hw, I40E_PFINT_ICR0_ENA);
5953 reg |= I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
5954 wr32(hw, I40E_PFINT_ICR0_ENA, reg);
5958 #ifdef CONFIG_I40E_VXLAN
5960 * i40e_sync_vxlan_filters_subtask - Sync the VSI filter list with HW
5961 * @pf: board private structure
5963 static void i40e_sync_vxlan_filters_subtask(struct i40e_pf *pf)
5965 struct i40e_hw *hw = &pf->hw;
5971 if (!(pf->flags & I40E_FLAG_VXLAN_FILTER_SYNC))
5974 pf->flags &= ~I40E_FLAG_VXLAN_FILTER_SYNC;
5976 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) {
5977 if (pf->pending_vxlan_bitmap & (1 << i)) {
5978 pf->pending_vxlan_bitmap &= ~(1 << i);
5979 port = pf->vxlan_ports[i];
5981 i40e_aq_add_udp_tunnel(hw, ntohs(port),
5982 I40E_AQC_TUNNEL_TYPE_VXLAN,
5983 &filter_index, NULL)
5984 : i40e_aq_del_udp_tunnel(hw, i, NULL);
5987 dev_info(&pf->pdev->dev, "Failed to execute AQ command for %s port %d with index %d\n",
5988 port ? "adding" : "deleting",
5989 ntohs(port), port ? i : i);
5991 pf->vxlan_ports[i] = 0;
5993 dev_info(&pf->pdev->dev, "%s port %d with AQ command with index %d\n",
5994 port ? "Added" : "Deleted",
5995 ntohs(port), port ? i : filter_index);
6003 * i40e_service_task - Run the driver's async subtasks
6004 * @work: pointer to work_struct containing our data
6006 static void i40e_service_task(struct work_struct *work)
6008 struct i40e_pf *pf = container_of(work,
6011 unsigned long start_time = jiffies;
6013 /* don't bother with service tasks if a reset is in progress */
6014 if (test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) {
6015 i40e_service_event_complete(pf);
6019 i40e_reset_subtask(pf);
6020 i40e_handle_mdd_event(pf);
6021 i40e_vc_process_vflr_event(pf);
6022 i40e_watchdog_subtask(pf);
6023 i40e_fdir_reinit_subtask(pf);
6024 i40e_check_hang_subtask(pf);
6025 i40e_sync_filters_subtask(pf);
6026 #ifdef CONFIG_I40E_VXLAN
6027 i40e_sync_vxlan_filters_subtask(pf);
6029 i40e_clean_adminq_subtask(pf);
6031 i40e_service_event_complete(pf);
6033 /* If the tasks have taken longer than one timer cycle or there
6034 * is more work to be done, reschedule the service task now
6035 * rather than wait for the timer to tick again.
6037 if (time_after(jiffies, (start_time + pf->service_timer_period)) ||
6038 test_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state) ||
6039 test_bit(__I40E_MDD_EVENT_PENDING, &pf->state) ||
6040 test_bit(__I40E_VFLR_EVENT_PENDING, &pf->state))
6041 i40e_service_event_schedule(pf);
6045 * i40e_service_timer - timer callback
6046 * @data: pointer to PF struct
6048 static void i40e_service_timer(unsigned long data)
6050 struct i40e_pf *pf = (struct i40e_pf *)data;
6052 mod_timer(&pf->service_timer,
6053 round_jiffies(jiffies + pf->service_timer_period));
6054 i40e_service_event_schedule(pf);
6058 * i40e_set_num_rings_in_vsi - Determine number of rings in the VSI
6059 * @vsi: the VSI being configured
6061 static int i40e_set_num_rings_in_vsi(struct i40e_vsi *vsi)
6063 struct i40e_pf *pf = vsi->back;
6065 switch (vsi->type) {
6067 vsi->alloc_queue_pairs = pf->num_lan_qps;
6068 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
6069 I40E_REQ_DESCRIPTOR_MULTIPLE);
6070 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
6071 vsi->num_q_vectors = pf->num_lan_msix;
6073 vsi->num_q_vectors = 1;
6078 vsi->alloc_queue_pairs = 1;
6079 vsi->num_desc = ALIGN(I40E_FDIR_RING_COUNT,
6080 I40E_REQ_DESCRIPTOR_MULTIPLE);
6081 vsi->num_q_vectors = 1;
6084 case I40E_VSI_VMDQ2:
6085 vsi->alloc_queue_pairs = pf->num_vmdq_qps;
6086 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
6087 I40E_REQ_DESCRIPTOR_MULTIPLE);
6088 vsi->num_q_vectors = pf->num_vmdq_msix;
6091 case I40E_VSI_SRIOV:
6092 vsi->alloc_queue_pairs = pf->num_vf_qps;
6093 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
6094 I40E_REQ_DESCRIPTOR_MULTIPLE);
6106 * i40e_vsi_alloc_arrays - Allocate queue and vector pointer arrays for the vsi
6107 * @type: VSI pointer
6108 * @alloc_qvectors: a bool to specify if q_vectors need to be allocated.
6110 * On error: returns error code (negative)
6111 * On success: returns 0
6113 static int i40e_vsi_alloc_arrays(struct i40e_vsi *vsi, bool alloc_qvectors)
6118 /* allocate memory for both Tx and Rx ring pointers */
6119 size = sizeof(struct i40e_ring *) * vsi->alloc_queue_pairs * 2;
6120 vsi->tx_rings = kzalloc(size, GFP_KERNEL);
6123 vsi->rx_rings = &vsi->tx_rings[vsi->alloc_queue_pairs];
6125 if (alloc_qvectors) {
6126 /* allocate memory for q_vector pointers */
6127 size = sizeof(struct i40e_q_vectors *) * vsi->num_q_vectors;
6128 vsi->q_vectors = kzalloc(size, GFP_KERNEL);
6129 if (!vsi->q_vectors) {
6137 kfree(vsi->tx_rings);
6142 * i40e_vsi_mem_alloc - Allocates the next available struct vsi in the PF
6143 * @pf: board private structure
6144 * @type: type of VSI
6146 * On error: returns error code (negative)
6147 * On success: returns vsi index in PF (positive)
6149 static int i40e_vsi_mem_alloc(struct i40e_pf *pf, enum i40e_vsi_type type)
6152 struct i40e_vsi *vsi;
6156 /* Need to protect the allocation of the VSIs at the PF level */
6157 mutex_lock(&pf->switch_mutex);
6159 /* VSI list may be fragmented if VSI creation/destruction has
6160 * been happening. We can afford to do a quick scan to look
6161 * for any free VSIs in the list.
6163 * find next empty vsi slot, looping back around if necessary
6166 while (i < pf->num_alloc_vsi && pf->vsi[i])
6168 if (i >= pf->num_alloc_vsi) {
6170 while (i < pf->next_vsi && pf->vsi[i])
6174 if (i < pf->num_alloc_vsi && !pf->vsi[i]) {
6175 vsi_idx = i; /* Found one! */
6178 goto unlock_pf; /* out of VSI slots! */
6182 vsi = kzalloc(sizeof(*vsi), GFP_KERNEL);
6189 set_bit(__I40E_DOWN, &vsi->state);
6192 vsi->rx_itr_setting = pf->rx_itr_default;
6193 vsi->tx_itr_setting = pf->tx_itr_default;
6194 vsi->netdev_registered = false;
6195 vsi->work_limit = I40E_DEFAULT_IRQ_WORK;
6196 INIT_LIST_HEAD(&vsi->mac_filter_list);
6197 vsi->irqs_ready = false;
6199 ret = i40e_set_num_rings_in_vsi(vsi);
6203 ret = i40e_vsi_alloc_arrays(vsi, true);
6207 /* Setup default MSIX irq handler for VSI */
6208 i40e_vsi_setup_irqhandler(vsi, i40e_msix_clean_rings);
6210 pf->vsi[vsi_idx] = vsi;
6215 pf->next_vsi = i - 1;
6218 mutex_unlock(&pf->switch_mutex);
6223 * i40e_vsi_free_arrays - Free queue and vector pointer arrays for the VSI
6224 * @type: VSI pointer
6225 * @free_qvectors: a bool to specify if q_vectors need to be freed.
6227 * On error: returns error code (negative)
6228 * On success: returns 0
6230 static void i40e_vsi_free_arrays(struct i40e_vsi *vsi, bool free_qvectors)
6232 /* free the ring and vector containers */
6233 if (free_qvectors) {
6234 kfree(vsi->q_vectors);
6235 vsi->q_vectors = NULL;
6237 kfree(vsi->tx_rings);
6238 vsi->tx_rings = NULL;
6239 vsi->rx_rings = NULL;
6243 * i40e_vsi_clear - Deallocate the VSI provided
6244 * @vsi: the VSI being un-configured
6246 static int i40e_vsi_clear(struct i40e_vsi *vsi)
6257 mutex_lock(&pf->switch_mutex);
6258 if (!pf->vsi[vsi->idx]) {
6259 dev_err(&pf->pdev->dev, "pf->vsi[%d] is NULL, just free vsi[%d](%p,type %d)\n",
6260 vsi->idx, vsi->idx, vsi, vsi->type);
6264 if (pf->vsi[vsi->idx] != vsi) {
6265 dev_err(&pf->pdev->dev,
6266 "pf->vsi[%d](%p, type %d) != vsi[%d](%p,type %d): no free!\n",
6267 pf->vsi[vsi->idx]->idx,
6269 pf->vsi[vsi->idx]->type,
6270 vsi->idx, vsi, vsi->type);
6274 /* updates the pf for this cleared vsi */
6275 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
6276 i40e_put_lump(pf->irq_pile, vsi->base_vector, vsi->idx);
6278 i40e_vsi_free_arrays(vsi, true);
6280 pf->vsi[vsi->idx] = NULL;
6281 if (vsi->idx < pf->next_vsi)
6282 pf->next_vsi = vsi->idx;
6285 mutex_unlock(&pf->switch_mutex);
6293 * i40e_vsi_clear_rings - Deallocates the Rx and Tx rings for the provided VSI
6294 * @vsi: the VSI being cleaned
6296 static void i40e_vsi_clear_rings(struct i40e_vsi *vsi)
6300 if (vsi->tx_rings && vsi->tx_rings[0]) {
6301 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
6302 kfree_rcu(vsi->tx_rings[i], rcu);
6303 vsi->tx_rings[i] = NULL;
6304 vsi->rx_rings[i] = NULL;
6310 * i40e_alloc_rings - Allocates the Rx and Tx rings for the provided VSI
6311 * @vsi: the VSI being configured
6313 static int i40e_alloc_rings(struct i40e_vsi *vsi)
6315 struct i40e_ring *tx_ring, *rx_ring;
6316 struct i40e_pf *pf = vsi->back;
6319 /* Set basic values in the rings to be used later during open() */
6320 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
6321 /* allocate space for both Tx and Rx in one shot */
6322 tx_ring = kzalloc(sizeof(struct i40e_ring) * 2, GFP_KERNEL);
6326 tx_ring->queue_index = i;
6327 tx_ring->reg_idx = vsi->base_queue + i;
6328 tx_ring->ring_active = false;
6330 tx_ring->netdev = vsi->netdev;
6331 tx_ring->dev = &pf->pdev->dev;
6332 tx_ring->count = vsi->num_desc;
6334 tx_ring->dcb_tc = 0;
6335 vsi->tx_rings[i] = tx_ring;
6337 rx_ring = &tx_ring[1];
6338 rx_ring->queue_index = i;
6339 rx_ring->reg_idx = vsi->base_queue + i;
6340 rx_ring->ring_active = false;
6342 rx_ring->netdev = vsi->netdev;
6343 rx_ring->dev = &pf->pdev->dev;
6344 rx_ring->count = vsi->num_desc;
6346 rx_ring->dcb_tc = 0;
6347 if (pf->flags & I40E_FLAG_16BYTE_RX_DESC_ENABLED)
6348 set_ring_16byte_desc_enabled(rx_ring);
6350 clear_ring_16byte_desc_enabled(rx_ring);
6351 vsi->rx_rings[i] = rx_ring;
6357 i40e_vsi_clear_rings(vsi);
6362 * i40e_reserve_msix_vectors - Reserve MSI-X vectors in the kernel
6363 * @pf: board private structure
6364 * @vectors: the number of MSI-X vectors to request
6366 * Returns the number of vectors reserved, or error
6368 static int i40e_reserve_msix_vectors(struct i40e_pf *pf, int vectors)
6370 vectors = pci_enable_msix_range(pf->pdev, pf->msix_entries,
6371 I40E_MIN_MSIX, vectors);
6373 dev_info(&pf->pdev->dev,
6374 "MSI-X vector reservation failed: %d\n", vectors);
6382 * i40e_init_msix - Setup the MSIX capability
6383 * @pf: board private structure
6385 * Work with the OS to set up the MSIX vectors needed.
6387 * Returns 0 on success, negative on failure
6389 static int i40e_init_msix(struct i40e_pf *pf)
6391 i40e_status err = 0;
6392 struct i40e_hw *hw = &pf->hw;
6396 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED))
6399 /* The number of vectors we'll request will be comprised of:
6400 * - Add 1 for "other" cause for Admin Queue events, etc.
6401 * - The number of LAN queue pairs
6402 * - Queues being used for RSS.
6403 * We don't need as many as max_rss_size vectors.
6404 * use rss_size instead in the calculation since that
6405 * is governed by number of cpus in the system.
6406 * - assumes symmetric Tx/Rx pairing
6407 * - The number of VMDq pairs
6408 * Once we count this up, try the request.
6410 * If we can't get what we want, we'll simplify to nearly nothing
6411 * and try again. If that still fails, we punt.
6413 pf->num_lan_msix = pf->num_lan_qps - (pf->rss_size_max - pf->rss_size);
6414 pf->num_vmdq_msix = pf->num_vmdq_qps;
6415 v_budget = 1 + pf->num_lan_msix;
6416 v_budget += (pf->num_vmdq_vsis * pf->num_vmdq_msix);
6417 if (pf->flags & I40E_FLAG_FD_SB_ENABLED)
6420 /* Scale down if necessary, and the rings will share vectors */
6421 v_budget = min_t(int, v_budget, hw->func_caps.num_msix_vectors);
6423 pf->msix_entries = kcalloc(v_budget, sizeof(struct msix_entry),
6425 if (!pf->msix_entries)
6428 for (i = 0; i < v_budget; i++)
6429 pf->msix_entries[i].entry = i;
6430 vec = i40e_reserve_msix_vectors(pf, v_budget);
6432 if (vec != v_budget) {
6433 /* If we have limited resources, we will start with no vectors
6434 * for the special features and then allocate vectors to some
6435 * of these features based on the policy and at the end disable
6436 * the features that did not get any vectors.
6438 pf->num_vmdq_msix = 0;
6441 if (vec < I40E_MIN_MSIX) {
6442 pf->flags &= ~I40E_FLAG_MSIX_ENABLED;
6443 kfree(pf->msix_entries);
6444 pf->msix_entries = NULL;
6447 } else if (vec == I40E_MIN_MSIX) {
6448 /* Adjust for minimal MSIX use */
6449 pf->num_vmdq_vsis = 0;
6450 pf->num_vmdq_qps = 0;
6451 pf->num_lan_qps = 1;
6452 pf->num_lan_msix = 1;
6454 } else if (vec != v_budget) {
6455 /* reserve the misc vector */
6458 /* Scale vector usage down */
6459 pf->num_vmdq_msix = 1; /* force VMDqs to only one vector */
6460 pf->num_vmdq_vsis = 1;
6462 /* partition out the remaining vectors */
6465 pf->num_lan_msix = 1;
6468 pf->num_lan_msix = 2;
6471 pf->num_lan_msix = min_t(int, (vec / 2),
6473 pf->num_vmdq_vsis = min_t(int, (vec - pf->num_lan_msix),
6474 I40E_DEFAULT_NUM_VMDQ_VSI);
6479 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&
6480 (pf->num_vmdq_msix == 0)) {
6481 dev_info(&pf->pdev->dev, "VMDq disabled, not enough MSI-X vectors\n");
6482 pf->flags &= ~I40E_FLAG_VMDQ_ENABLED;
6488 * i40e_vsi_alloc_q_vector - Allocate memory for a single interrupt vector
6489 * @vsi: the VSI being configured
6490 * @v_idx: index of the vector in the vsi struct
6492 * We allocate one q_vector. If allocation fails we return -ENOMEM.
6494 static int i40e_vsi_alloc_q_vector(struct i40e_vsi *vsi, int v_idx)
6496 struct i40e_q_vector *q_vector;
6498 /* allocate q_vector */
6499 q_vector = kzalloc(sizeof(struct i40e_q_vector), GFP_KERNEL);
6503 q_vector->vsi = vsi;
6504 q_vector->v_idx = v_idx;
6505 cpumask_set_cpu(v_idx, &q_vector->affinity_mask);
6507 netif_napi_add(vsi->netdev, &q_vector->napi,
6508 i40e_napi_poll, NAPI_POLL_WEIGHT);
6510 q_vector->rx.latency_range = I40E_LOW_LATENCY;
6511 q_vector->tx.latency_range = I40E_LOW_LATENCY;
6513 /* tie q_vector and vsi together */
6514 vsi->q_vectors[v_idx] = q_vector;
6520 * i40e_vsi_alloc_q_vectors - Allocate memory for interrupt vectors
6521 * @vsi: the VSI being configured
6523 * We allocate one q_vector per queue interrupt. If allocation fails we
6526 static int i40e_vsi_alloc_q_vectors(struct i40e_vsi *vsi)
6528 struct i40e_pf *pf = vsi->back;
6529 int v_idx, num_q_vectors;
6532 /* if not MSIX, give the one vector only to the LAN VSI */
6533 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
6534 num_q_vectors = vsi->num_q_vectors;
6535 else if (vsi == pf->vsi[pf->lan_vsi])
6540 for (v_idx = 0; v_idx < num_q_vectors; v_idx++) {
6541 err = i40e_vsi_alloc_q_vector(vsi, v_idx);
6550 i40e_free_q_vector(vsi, v_idx);
6556 * i40e_init_interrupt_scheme - Determine proper interrupt scheme
6557 * @pf: board private structure to initialize
6559 static void i40e_init_interrupt_scheme(struct i40e_pf *pf)
6563 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
6564 err = i40e_init_msix(pf);
6566 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED |
6567 I40E_FLAG_RSS_ENABLED |
6568 I40E_FLAG_DCB_CAPABLE |
6569 I40E_FLAG_SRIOV_ENABLED |
6570 I40E_FLAG_FD_SB_ENABLED |
6571 I40E_FLAG_FD_ATR_ENABLED |
6572 I40E_FLAG_VMDQ_ENABLED);
6574 /* rework the queue expectations without MSIX */
6575 i40e_determine_queue_usage(pf);
6579 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED) &&
6580 (pf->flags & I40E_FLAG_MSI_ENABLED)) {
6581 dev_info(&pf->pdev->dev, "MSI-X not available, trying MSI\n");
6582 err = pci_enable_msi(pf->pdev);
6584 dev_info(&pf->pdev->dev, "MSI init failed - %d\n", err);
6585 pf->flags &= ~I40E_FLAG_MSI_ENABLED;
6589 if (!(pf->flags & (I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED)))
6590 dev_info(&pf->pdev->dev, "MSI-X and MSI not available, falling back to Legacy IRQ\n");
6592 /* track first vector for misc interrupts */
6593 err = i40e_get_lump(pf, pf->irq_pile, 1, I40E_PILE_VALID_BIT-1);
6597 * i40e_setup_misc_vector - Setup the misc vector to handle non queue events
6598 * @pf: board private structure
6600 * This sets up the handler for MSIX 0, which is used to manage the
6601 * non-queue interrupts, e.g. AdminQ and errors. This is not used
6602 * when in MSI or Legacy interrupt mode.
6604 static int i40e_setup_misc_vector(struct i40e_pf *pf)
6606 struct i40e_hw *hw = &pf->hw;
6609 /* Only request the irq if this is the first time through, and
6610 * not when we're rebuilding after a Reset
6612 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) {
6613 err = request_irq(pf->msix_entries[0].vector,
6614 i40e_intr, 0, pf->misc_int_name, pf);
6616 dev_info(&pf->pdev->dev,
6617 "request_irq for %s failed: %d\n",
6618 pf->misc_int_name, err);
6623 i40e_enable_misc_int_causes(hw);
6625 /* associate no queues to the misc vector */
6626 wr32(hw, I40E_PFINT_LNKLST0, I40E_QUEUE_END_OF_LIST);
6627 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), I40E_ITR_8K);
6631 i40e_irq_dynamic_enable_icr0(pf);
6637 * i40e_config_rss - Prepare for RSS if used
6638 * @pf: board private structure
6640 static int i40e_config_rss(struct i40e_pf *pf)
6642 /* Set of random keys generated using kernel random number generator */
6643 static const u32 seed[I40E_PFQF_HKEY_MAX_INDEX + 1] = {0x41b01687,
6644 0x183cfd8c, 0xce880440, 0x580cbc3c, 0x35897377,
6645 0x328b25e1, 0x4fa98922, 0xb7d90c14, 0xd5bad70d,
6646 0xcd15a2c1, 0xe8580225, 0x4a1e9d11, 0xfe5731be};
6647 struct i40e_hw *hw = &pf->hw;
6653 /* Fill out hash function seed */
6654 for (i = 0; i <= I40E_PFQF_HKEY_MAX_INDEX; i++)
6655 wr32(hw, I40E_PFQF_HKEY(i), seed[i]);
6657 /* By default we enable TCP/UDP with IPv4/IPv6 ptypes */
6658 hena = (u64)rd32(hw, I40E_PFQF_HENA(0)) |
6659 ((u64)rd32(hw, I40E_PFQF_HENA(1)) << 32);
6660 hena |= I40E_DEFAULT_RSS_HENA;
6661 wr32(hw, I40E_PFQF_HENA(0), (u32)hena);
6662 wr32(hw, I40E_PFQF_HENA(1), (u32)(hena >> 32));
6664 /* Check capability and Set table size and register per hw expectation*/
6665 reg_val = rd32(hw, I40E_PFQF_CTL_0);
6666 if (hw->func_caps.rss_table_size == 512) {
6667 reg_val |= I40E_PFQF_CTL_0_HASHLUTSIZE_512;
6668 pf->rss_table_size = 512;
6670 pf->rss_table_size = 128;
6671 reg_val &= ~I40E_PFQF_CTL_0_HASHLUTSIZE_512;
6673 wr32(hw, I40E_PFQF_CTL_0, reg_val);
6675 /* Populate the LUT with max no. of queues in round robin fashion */
6676 for (i = 0, j = 0; i < pf->rss_table_size; i++, j++) {
6678 /* The assumption is that lan qp count will be the highest
6679 * qp count for any PF VSI that needs RSS.
6680 * If multiple VSIs need RSS support, all the qp counts
6681 * for those VSIs should be a power of 2 for RSS to work.
6682 * If LAN VSI is the only consumer for RSS then this requirement
6685 if (j == pf->rss_size)
6687 /* lut = 4-byte sliding window of 4 lut entries */
6688 lut = (lut << 8) | (j &
6689 ((0x1 << pf->hw.func_caps.rss_table_entry_width) - 1));
6690 /* On i = 3, we have 4 entries in lut; write to the register */
6692 wr32(hw, I40E_PFQF_HLUT(i >> 2), lut);
6700 * i40e_reconfig_rss_queues - change number of queues for rss and rebuild
6701 * @pf: board private structure
6702 * @queue_count: the requested queue count for rss.
6704 * returns 0 if rss is not enabled, if enabled returns the final rss queue
6705 * count which may be different from the requested queue count.
6707 int i40e_reconfig_rss_queues(struct i40e_pf *pf, int queue_count)
6709 if (!(pf->flags & I40E_FLAG_RSS_ENABLED))
6712 queue_count = min_t(int, queue_count, pf->rss_size_max);
6714 if (queue_count != pf->rss_size) {
6715 i40e_prep_for_reset(pf);
6717 pf->rss_size = queue_count;
6719 i40e_reset_and_rebuild(pf, true);
6720 i40e_config_rss(pf);
6722 dev_info(&pf->pdev->dev, "RSS count: %d\n", pf->rss_size);
6723 return pf->rss_size;
6727 * i40e_sw_init - Initialize general software structures (struct i40e_pf)
6728 * @pf: board private structure to initialize
6730 * i40e_sw_init initializes the Adapter private data structure.
6731 * Fields are initialized based on PCI device information and
6732 * OS network device settings (MTU size).
6734 static int i40e_sw_init(struct i40e_pf *pf)
6739 pf->msg_enable = netif_msg_init(I40E_DEFAULT_MSG_ENABLE,
6740 (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK));
6741 pf->hw.debug_mask = pf->msg_enable | I40E_DEBUG_DIAG;
6742 if (debug != -1 && debug != I40E_DEFAULT_MSG_ENABLE) {
6743 if (I40E_DEBUG_USER & debug)
6744 pf->hw.debug_mask = debug;
6745 pf->msg_enable = netif_msg_init((debug & ~I40E_DEBUG_USER),
6746 I40E_DEFAULT_MSG_ENABLE);
6749 /* Set default capability flags */
6750 pf->flags = I40E_FLAG_RX_CSUM_ENABLED |
6751 I40E_FLAG_MSI_ENABLED |
6752 I40E_FLAG_MSIX_ENABLED |
6753 I40E_FLAG_RX_1BUF_ENABLED;
6755 /* Set default ITR */
6756 pf->rx_itr_default = I40E_ITR_DYNAMIC | I40E_ITR_RX_DEF;
6757 pf->tx_itr_default = I40E_ITR_DYNAMIC | I40E_ITR_TX_DEF;
6759 /* Depending on PF configurations, it is possible that the RSS
6760 * maximum might end up larger than the available queues
6762 pf->rss_size_max = 0x1 << pf->hw.func_caps.rss_table_entry_width;
6763 pf->rss_size_max = min_t(int, pf->rss_size_max,
6764 pf->hw.func_caps.num_tx_qp);
6765 if (pf->hw.func_caps.rss) {
6766 pf->flags |= I40E_FLAG_RSS_ENABLED;
6767 pf->rss_size = min_t(int, pf->rss_size_max, num_online_cpus());
6772 /* MFP mode enabled */
6773 if (pf->hw.func_caps.npar_enable || pf->hw.func_caps.mfp_mode_1) {
6774 pf->flags |= I40E_FLAG_MFP_ENABLED;
6775 dev_info(&pf->pdev->dev, "MFP mode Enabled\n");
6778 /* FW/NVM is not yet fixed in this regard */
6779 if ((pf->hw.func_caps.fd_filters_guaranteed > 0) ||
6780 (pf->hw.func_caps.fd_filters_best_effort > 0)) {
6781 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
6782 pf->atr_sample_rate = I40E_DEFAULT_ATR_SAMPLE_RATE;
6783 /* Setup a counter for fd_atr per pf */
6784 pf->fd_atr_cnt_idx = I40E_FD_ATR_STAT_IDX(pf->hw.pf_id);
6785 if (!(pf->flags & I40E_FLAG_MFP_ENABLED)) {
6786 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
6787 /* Setup a counter for fd_sb per pf */
6788 pf->fd_sb_cnt_idx = I40E_FD_SB_STAT_IDX(pf->hw.pf_id);
6790 dev_info(&pf->pdev->dev,
6791 "Flow Director Sideband mode Disabled in MFP mode\n");
6793 pf->fdir_pf_filter_count =
6794 pf->hw.func_caps.fd_filters_guaranteed;
6795 pf->hw.fdir_shared_filter_count =
6796 pf->hw.func_caps.fd_filters_best_effort;
6799 if (pf->hw.func_caps.vmdq) {
6800 pf->flags |= I40E_FLAG_VMDQ_ENABLED;
6801 pf->num_vmdq_vsis = I40E_DEFAULT_NUM_VMDQ_VSI;
6802 pf->num_vmdq_qps = I40E_DEFAULT_QUEUES_PER_VMDQ;
6805 #ifdef CONFIG_PCI_IOV
6806 if (pf->hw.func_caps.num_vfs) {
6807 pf->num_vf_qps = I40E_DEFAULT_QUEUES_PER_VF;
6808 pf->flags |= I40E_FLAG_SRIOV_ENABLED;
6809 pf->num_req_vfs = min_t(int,
6810 pf->hw.func_caps.num_vfs,
6813 #endif /* CONFIG_PCI_IOV */
6814 pf->eeprom_version = 0xDEAD;
6815 pf->lan_veb = I40E_NO_VEB;
6816 pf->lan_vsi = I40E_NO_VSI;
6818 /* set up queue assignment tracking */
6819 size = sizeof(struct i40e_lump_tracking)
6820 + (sizeof(u16) * pf->hw.func_caps.num_tx_qp);
6821 pf->qp_pile = kzalloc(size, GFP_KERNEL);
6826 pf->qp_pile->num_entries = pf->hw.func_caps.num_tx_qp;
6827 pf->qp_pile->search_hint = 0;
6829 /* set up vector assignment tracking */
6830 size = sizeof(struct i40e_lump_tracking)
6831 + (sizeof(u16) * pf->hw.func_caps.num_msix_vectors);
6832 pf->irq_pile = kzalloc(size, GFP_KERNEL);
6833 if (!pf->irq_pile) {
6838 pf->irq_pile->num_entries = pf->hw.func_caps.num_msix_vectors;
6839 pf->irq_pile->search_hint = 0;
6841 pf->tx_timeout_recovery_level = 1;
6843 mutex_init(&pf->switch_mutex);
6850 * i40e_set_ntuple - set the ntuple feature flag and take action
6851 * @pf: board private structure to initialize
6852 * @features: the feature set that the stack is suggesting
6854 * returns a bool to indicate if reset needs to happen
6856 bool i40e_set_ntuple(struct i40e_pf *pf, netdev_features_t features)
6858 bool need_reset = false;
6860 /* Check if Flow Director n-tuple support was enabled or disabled. If
6861 * the state changed, we need to reset.
6863 if (features & NETIF_F_NTUPLE) {
6864 /* Enable filters and mark for reset */
6865 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
6867 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
6869 /* turn off filters, mark for reset and clear SW filter list */
6870 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
6872 i40e_fdir_filter_exit(pf);
6874 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
6875 /* if ATR was disabled it can be re-enabled. */
6876 if (!(pf->flags & I40E_FLAG_FD_ATR_ENABLED))
6877 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
6883 * i40e_set_features - set the netdev feature flags
6884 * @netdev: ptr to the netdev being adjusted
6885 * @features: the feature set that the stack is suggesting
6887 static int i40e_set_features(struct net_device *netdev,
6888 netdev_features_t features)
6890 struct i40e_netdev_priv *np = netdev_priv(netdev);
6891 struct i40e_vsi *vsi = np->vsi;
6892 struct i40e_pf *pf = vsi->back;
6895 if (features & NETIF_F_HW_VLAN_CTAG_RX)
6896 i40e_vlan_stripping_enable(vsi);
6898 i40e_vlan_stripping_disable(vsi);
6900 need_reset = i40e_set_ntuple(pf, features);
6903 i40e_do_reset(pf, (1 << __I40E_PF_RESET_REQUESTED));
6908 #ifdef CONFIG_I40E_VXLAN
6910 * i40e_get_vxlan_port_idx - Lookup a possibly offloaded for Rx UDP port
6911 * @pf: board private structure
6912 * @port: The UDP port to look up
6914 * Returns the index number or I40E_MAX_PF_UDP_OFFLOAD_PORTS if port not found
6916 static u8 i40e_get_vxlan_port_idx(struct i40e_pf *pf, __be16 port)
6920 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) {
6921 if (pf->vxlan_ports[i] == port)
6929 * i40e_add_vxlan_port - Get notifications about VXLAN ports that come up
6930 * @netdev: This physical port's netdev
6931 * @sa_family: Socket Family that VXLAN is notifying us about
6932 * @port: New UDP port number that VXLAN started listening to
6934 static void i40e_add_vxlan_port(struct net_device *netdev,
6935 sa_family_t sa_family, __be16 port)
6937 struct i40e_netdev_priv *np = netdev_priv(netdev);
6938 struct i40e_vsi *vsi = np->vsi;
6939 struct i40e_pf *pf = vsi->back;
6943 if (sa_family == AF_INET6)
6946 idx = i40e_get_vxlan_port_idx(pf, port);
6948 /* Check if port already exists */
6949 if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
6950 netdev_info(netdev, "Port %d already offloaded\n", ntohs(port));
6954 /* Now check if there is space to add the new port */
6955 next_idx = i40e_get_vxlan_port_idx(pf, 0);
6957 if (next_idx == I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
6958 netdev_info(netdev, "Maximum number of UDP ports reached, not adding port %d\n",
6963 /* New port: add it and mark its index in the bitmap */
6964 pf->vxlan_ports[next_idx] = port;
6965 pf->pending_vxlan_bitmap |= (1 << next_idx);
6967 pf->flags |= I40E_FLAG_VXLAN_FILTER_SYNC;
6971 * i40e_del_vxlan_port - Get notifications about VXLAN ports that go away
6972 * @netdev: This physical port's netdev
6973 * @sa_family: Socket Family that VXLAN is notifying us about
6974 * @port: UDP port number that VXLAN stopped listening to
6976 static void i40e_del_vxlan_port(struct net_device *netdev,
6977 sa_family_t sa_family, __be16 port)
6979 struct i40e_netdev_priv *np = netdev_priv(netdev);
6980 struct i40e_vsi *vsi = np->vsi;
6981 struct i40e_pf *pf = vsi->back;
6984 if (sa_family == AF_INET6)
6987 idx = i40e_get_vxlan_port_idx(pf, port);
6989 /* Check if port already exists */
6990 if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
6991 /* if port exists, set it to 0 (mark for deletion)
6992 * and make it pending
6994 pf->vxlan_ports[idx] = 0;
6996 pf->pending_vxlan_bitmap |= (1 << idx);
6998 pf->flags |= I40E_FLAG_VXLAN_FILTER_SYNC;
7000 netdev_warn(netdev, "Port %d was not found, not deleting\n",
7007 #ifdef USE_CONST_DEV_UC_CHAR
7008 static int i40e_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
7009 struct net_device *dev,
7010 const unsigned char *addr,
7013 static int i40e_ndo_fdb_add(struct ndmsg *ndm,
7014 struct net_device *dev,
7015 unsigned char *addr,
7019 struct i40e_netdev_priv *np = netdev_priv(dev);
7020 struct i40e_pf *pf = np->vsi->back;
7023 if (!(pf->flags & I40E_FLAG_SRIOV_ENABLED))
7026 /* Hardware does not support aging addresses so if a
7027 * ndm_state is given only allow permanent addresses
7029 if (ndm->ndm_state && !(ndm->ndm_state & NUD_PERMANENT)) {
7030 netdev_info(dev, "FDB only supports static addresses\n");
7034 if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr))
7035 err = dev_uc_add_excl(dev, addr);
7036 else if (is_multicast_ether_addr(addr))
7037 err = dev_mc_add_excl(dev, addr);
7041 /* Only return duplicate errors if NLM_F_EXCL is set */
7042 if (err == -EEXIST && !(flags & NLM_F_EXCL))
7048 #ifndef USE_DEFAULT_FDB_DEL_DUMP
7049 #ifdef USE_CONST_DEV_UC_CHAR
7050 static int i40e_ndo_fdb_del(struct ndmsg *ndm,
7051 struct net_device *dev,
7052 const unsigned char *addr)
7054 static int i40e_ndo_fdb_del(struct ndmsg *ndm,
7055 struct net_device *dev,
7056 unsigned char *addr)
7059 struct i40e_netdev_priv *np = netdev_priv(dev);
7060 struct i40e_pf *pf = np->vsi->back;
7061 int err = -EOPNOTSUPP;
7063 if (ndm->ndm_state & NUD_PERMANENT) {
7064 netdev_info(dev, "FDB only supports static addresses\n");
7068 if (pf->flags & I40E_FLAG_SRIOV_ENABLED) {
7069 if (is_unicast_ether_addr(addr))
7070 err = dev_uc_del(dev, addr);
7071 else if (is_multicast_ether_addr(addr))
7072 err = dev_mc_del(dev, addr);
7080 static int i40e_ndo_fdb_dump(struct sk_buff *skb,
7081 struct netlink_callback *cb,
7082 struct net_device *dev,
7085 struct i40e_netdev_priv *np = netdev_priv(dev);
7086 struct i40e_pf *pf = np->vsi->back;
7088 if (pf->flags & I40E_FLAG_SRIOV_ENABLED)
7089 idx = ndo_dflt_fdb_dump(skb, cb, dev, idx);
7094 #endif /* USE_DEFAULT_FDB_DEL_DUMP */
7095 #endif /* HAVE_FDB_OPS */
7096 static const struct net_device_ops i40e_netdev_ops = {
7097 .ndo_open = i40e_open,
7098 .ndo_stop = i40e_close,
7099 .ndo_start_xmit = i40e_lan_xmit_frame,
7100 .ndo_get_stats64 = i40e_get_netdev_stats_struct,
7101 .ndo_set_rx_mode = i40e_set_rx_mode,
7102 .ndo_validate_addr = eth_validate_addr,
7103 .ndo_set_mac_address = i40e_set_mac,
7104 .ndo_change_mtu = i40e_change_mtu,
7105 .ndo_do_ioctl = i40e_ioctl,
7106 .ndo_tx_timeout = i40e_tx_timeout,
7107 .ndo_vlan_rx_add_vid = i40e_vlan_rx_add_vid,
7108 .ndo_vlan_rx_kill_vid = i40e_vlan_rx_kill_vid,
7109 #ifdef CONFIG_NET_POLL_CONTROLLER
7110 .ndo_poll_controller = i40e_netpoll,
7112 .ndo_setup_tc = i40e_setup_tc,
7113 .ndo_set_features = i40e_set_features,
7114 .ndo_set_vf_mac = i40e_ndo_set_vf_mac,
7115 .ndo_set_vf_vlan = i40e_ndo_set_vf_port_vlan,
7116 .ndo_set_vf_rate = i40e_ndo_set_vf_bw,
7117 .ndo_get_vf_config = i40e_ndo_get_vf_config,
7118 .ndo_set_vf_link_state = i40e_ndo_set_vf_link_state,
7119 .ndo_set_vf_spoofchk = i40e_ndo_set_vf_spoofck,
7120 #ifdef CONFIG_I40E_VXLAN
7121 .ndo_add_vxlan_port = i40e_add_vxlan_port,
7122 .ndo_del_vxlan_port = i40e_del_vxlan_port,
7125 .ndo_fdb_add = i40e_ndo_fdb_add,
7126 #ifndef USE_DEFAULT_FDB_DEL_DUMP
7127 .ndo_fdb_del = i40e_ndo_fdb_del,
7128 .ndo_fdb_dump = i40e_ndo_fdb_dump,
7134 * i40e_config_netdev - Setup the netdev flags
7135 * @vsi: the VSI being configured
7137 * Returns 0 on success, negative value on failure
7139 static int i40e_config_netdev(struct i40e_vsi *vsi)
7141 u8 brdcast[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
7142 struct i40e_pf *pf = vsi->back;
7143 struct i40e_hw *hw = &pf->hw;
7144 struct i40e_netdev_priv *np;
7145 struct net_device *netdev;
7146 u8 mac_addr[ETH_ALEN];
7149 etherdev_size = sizeof(struct i40e_netdev_priv);
7150 netdev = alloc_etherdev_mq(etherdev_size, vsi->alloc_queue_pairs);
7154 vsi->netdev = netdev;
7155 np = netdev_priv(netdev);
7158 netdev->hw_enc_features |= NETIF_F_IP_CSUM |
7159 NETIF_F_GSO_UDP_TUNNEL |
7162 netdev->features = NETIF_F_SG |
7166 NETIF_F_GSO_UDP_TUNNEL |
7167 NETIF_F_HW_VLAN_CTAG_TX |
7168 NETIF_F_HW_VLAN_CTAG_RX |
7169 NETIF_F_HW_VLAN_CTAG_FILTER |
7178 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
7179 netdev->features |= NETIF_F_NTUPLE;
7181 /* copy netdev features into list of user selectable features */
7182 netdev->hw_features |= netdev->features;
7184 if (vsi->type == I40E_VSI_MAIN) {
7185 SET_NETDEV_DEV(netdev, &pf->pdev->dev);
7186 ether_addr_copy(mac_addr, hw->mac.perm_addr);
7187 /* The following two steps are necessary to prevent reception
7188 * of tagged packets - by default the NVM loads a MAC-VLAN
7189 * filter that will accept any tagged packet. This is to
7190 * prevent that during normal operations until a specific
7191 * VLAN tag filter has been set.
7193 i40e_rm_default_mac_filter(vsi, mac_addr);
7194 i40e_add_filter(vsi, mac_addr, I40E_VLAN_ANY, false, true);
7196 /* relate the VSI_VMDQ name to the VSI_MAIN name */
7197 snprintf(netdev->name, IFNAMSIZ, "%sv%%d",
7198 pf->vsi[pf->lan_vsi]->netdev->name);
7199 random_ether_addr(mac_addr);
7200 i40e_add_filter(vsi, mac_addr, I40E_VLAN_ANY, false, false);
7202 i40e_add_filter(vsi, brdcast, I40E_VLAN_ANY, false, false);
7204 ether_addr_copy(netdev->dev_addr, mac_addr);
7205 ether_addr_copy(netdev->perm_addr, mac_addr);
7206 /* vlan gets same features (except vlan offload)
7207 * after any tweaks for specific VSI types
7209 netdev->vlan_features = netdev->features & ~(NETIF_F_HW_VLAN_CTAG_TX |
7210 NETIF_F_HW_VLAN_CTAG_RX |
7211 NETIF_F_HW_VLAN_CTAG_FILTER);
7212 netdev->priv_flags |= IFF_UNICAST_FLT;
7213 netdev->priv_flags |= IFF_SUPP_NOFCS;
7214 /* Setup netdev TC information */
7215 i40e_vsi_config_netdev_tc(vsi, vsi->tc_config.enabled_tc);
7217 netdev->netdev_ops = &i40e_netdev_ops;
7218 netdev->watchdog_timeo = 5 * HZ;
7219 i40e_set_ethtool_ops(netdev);
7225 * i40e_vsi_delete - Delete a VSI from the switch
7226 * @vsi: the VSI being removed
7228 * Returns 0 on success, negative value on failure
7230 static void i40e_vsi_delete(struct i40e_vsi *vsi)
7232 /* remove default VSI is not allowed */
7233 if (vsi == vsi->back->vsi[vsi->back->lan_vsi])
7236 i40e_aq_delete_element(&vsi->back->hw, vsi->seid, NULL);
7240 * i40e_add_vsi - Add a VSI to the switch
7241 * @vsi: the VSI being configured
7243 * This initializes a VSI context depending on the VSI type to be added and
7244 * passes it down to the add_vsi aq command.
7246 static int i40e_add_vsi(struct i40e_vsi *vsi)
7249 struct i40e_mac_filter *f, *ftmp;
7250 struct i40e_pf *pf = vsi->back;
7251 struct i40e_hw *hw = &pf->hw;
7252 struct i40e_vsi_context ctxt;
7253 u8 enabled_tc = 0x1; /* TC0 enabled */
7256 memset(&ctxt, 0, sizeof(ctxt));
7257 switch (vsi->type) {
7259 /* The PF's main VSI is already setup as part of the
7260 * device initialization, so we'll not bother with
7261 * the add_vsi call, but we will retrieve the current
7264 ctxt.seid = pf->main_vsi_seid;
7265 ctxt.pf_num = pf->hw.pf_id;
7267 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
7268 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
7270 dev_info(&pf->pdev->dev,
7271 "couldn't get pf vsi config, err %d, aq_err %d\n",
7272 ret, pf->hw.aq.asq_last_status);
7275 memcpy(&vsi->info, &ctxt.info, sizeof(ctxt.info));
7276 vsi->info.valid_sections = 0;
7278 vsi->seid = ctxt.seid;
7279 vsi->id = ctxt.vsi_number;
7281 enabled_tc = i40e_pf_get_tc_map(pf);
7283 /* MFP mode setup queue map and update VSI */
7284 if (pf->flags & I40E_FLAG_MFP_ENABLED) {
7285 memset(&ctxt, 0, sizeof(ctxt));
7286 ctxt.seid = pf->main_vsi_seid;
7287 ctxt.pf_num = pf->hw.pf_id;
7289 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
7290 ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL);
7292 dev_info(&pf->pdev->dev,
7293 "update vsi failed, aq_err=%d\n",
7294 pf->hw.aq.asq_last_status);
7298 /* update the local VSI info queue map */
7299 i40e_vsi_update_queue_map(vsi, &ctxt);
7300 vsi->info.valid_sections = 0;
7302 /* Default/Main VSI is only enabled for TC0
7303 * reconfigure it to enable all TCs that are
7304 * available on the port in SFP mode.
7306 ret = i40e_vsi_config_tc(vsi, enabled_tc);
7308 dev_info(&pf->pdev->dev,
7309 "failed to configure TCs for main VSI tc_map 0x%08x, err %d, aq_err %d\n",
7311 pf->hw.aq.asq_last_status);
7318 ctxt.pf_num = hw->pf_id;
7320 ctxt.uplink_seid = vsi->uplink_seid;
7321 ctxt.connection_type = 0x1; /* regular data port */
7322 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
7323 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
7326 case I40E_VSI_VMDQ2:
7327 ctxt.pf_num = hw->pf_id;
7329 ctxt.uplink_seid = vsi->uplink_seid;
7330 ctxt.connection_type = 0x1; /* regular data port */
7331 ctxt.flags = I40E_AQ_VSI_TYPE_VMDQ2;
7333 ctxt.info.valid_sections |= cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
7335 /* This VSI is connected to VEB so the switch_id
7336 * should be set to zero by default.
7338 ctxt.info.switch_id = 0;
7339 ctxt.info.switch_id |= cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_LOCAL_LB);
7340 ctxt.info.switch_id |= cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
7342 /* Setup the VSI tx/rx queue map for TC0 only for now */
7343 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
7346 case I40E_VSI_SRIOV:
7347 ctxt.pf_num = hw->pf_id;
7348 ctxt.vf_num = vsi->vf_id + hw->func_caps.vf_base_id;
7349 ctxt.uplink_seid = vsi->uplink_seid;
7350 ctxt.connection_type = 0x1; /* regular data port */
7351 ctxt.flags = I40E_AQ_VSI_TYPE_VF;
7353 ctxt.info.valid_sections |= cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
7355 /* This VSI is connected to VEB so the switch_id
7356 * should be set to zero by default.
7358 ctxt.info.switch_id = cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
7360 ctxt.info.valid_sections |= cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
7361 ctxt.info.port_vlan_flags |= I40E_AQ_VSI_PVLAN_MODE_ALL;
7362 if (pf->vf[vsi->vf_id].spoofchk) {
7363 ctxt.info.valid_sections |=
7364 cpu_to_le16(I40E_AQ_VSI_PROP_SECURITY_VALID);
7365 ctxt.info.sec_flags |=
7366 (I40E_AQ_VSI_SEC_FLAG_ENABLE_VLAN_CHK |
7367 I40E_AQ_VSI_SEC_FLAG_ENABLE_MAC_CHK);
7369 /* Setup the VSI tx/rx queue map for TC0 only for now */
7370 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
7377 if (vsi->type != I40E_VSI_MAIN) {
7378 ret = i40e_aq_add_vsi(hw, &ctxt, NULL);
7380 dev_info(&vsi->back->pdev->dev,
7381 "add vsi failed, aq_err=%d\n",
7382 vsi->back->hw.aq.asq_last_status);
7386 memcpy(&vsi->info, &ctxt.info, sizeof(ctxt.info));
7387 vsi->info.valid_sections = 0;
7388 vsi->seid = ctxt.seid;
7389 vsi->id = ctxt.vsi_number;
7392 /* If macvlan filters already exist, force them to get loaded */
7393 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
7397 if (f->is_laa && vsi->type == I40E_VSI_MAIN) {
7398 i40e_aq_mac_address_write(&vsi->back->hw,
7399 I40E_AQC_WRITE_TYPE_LAA_WOL,
7404 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
7405 pf->flags |= I40E_FLAG_FILTER_SYNC;
7408 /* Update VSI BW information */
7409 ret = i40e_vsi_get_bw_info(vsi);
7411 dev_info(&pf->pdev->dev,
7412 "couldn't get vsi bw info, err %d, aq_err %d\n",
7413 ret, pf->hw.aq.asq_last_status);
7414 /* VSI is already added so not tearing that up */
7423 * i40e_vsi_release - Delete a VSI and free its resources
7424 * @vsi: the VSI being removed
7426 * Returns 0 on success or < 0 on error
7428 int i40e_vsi_release(struct i40e_vsi *vsi)
7430 struct i40e_mac_filter *f, *ftmp;
7431 struct i40e_veb *veb = NULL;
7438 /* release of a VEB-owner or last VSI is not allowed */
7439 if (vsi->flags & I40E_VSI_FLAG_VEB_OWNER) {
7440 dev_info(&pf->pdev->dev, "VSI %d has existing VEB %d\n",
7441 vsi->seid, vsi->uplink_seid);
7444 if (vsi == pf->vsi[pf->lan_vsi] &&
7445 !test_bit(__I40E_DOWN, &pf->state)) {
7446 dev_info(&pf->pdev->dev, "Can't remove PF VSI\n");
7450 uplink_seid = vsi->uplink_seid;
7451 if (vsi->type != I40E_VSI_SRIOV) {
7452 if (vsi->netdev_registered) {
7453 vsi->netdev_registered = false;
7455 /* results in a call to i40e_close() */
7456 unregister_netdev(vsi->netdev);
7459 i40e_vsi_close(vsi);
7461 i40e_vsi_disable_irq(vsi);
7464 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list)
7465 i40e_del_filter(vsi, f->macaddr, f->vlan,
7466 f->is_vf, f->is_netdev);
7467 i40e_sync_vsi_filters(vsi);
7469 i40e_vsi_delete(vsi);
7470 i40e_vsi_free_q_vectors(vsi);
7472 free_netdev(vsi->netdev);
7475 i40e_vsi_clear_rings(vsi);
7476 i40e_vsi_clear(vsi);
7478 /* If this was the last thing on the VEB, except for the
7479 * controlling VSI, remove the VEB, which puts the controlling
7480 * VSI onto the next level down in the switch.
7482 * Well, okay, there's one more exception here: don't remove
7483 * the orphan VEBs yet. We'll wait for an explicit remove request
7484 * from up the network stack.
7486 for (n = 0, i = 0; i < pf->num_alloc_vsi; i++) {
7488 pf->vsi[i]->uplink_seid == uplink_seid &&
7489 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
7490 n++; /* count the VSIs */
7493 for (i = 0; i < I40E_MAX_VEB; i++) {
7496 if (pf->veb[i]->uplink_seid == uplink_seid)
7497 n++; /* count the VEBs */
7498 if (pf->veb[i]->seid == uplink_seid)
7501 if (n == 0 && veb && veb->uplink_seid != 0)
7502 i40e_veb_release(veb);
7508 * i40e_vsi_setup_vectors - Set up the q_vectors for the given VSI
7509 * @vsi: ptr to the VSI
7511 * This should only be called after i40e_vsi_mem_alloc() which allocates the
7512 * corresponding SW VSI structure and initializes num_queue_pairs for the
7513 * newly allocated VSI.
7515 * Returns 0 on success or negative on failure
7517 static int i40e_vsi_setup_vectors(struct i40e_vsi *vsi)
7520 struct i40e_pf *pf = vsi->back;
7522 if (vsi->q_vectors[0]) {
7523 dev_info(&pf->pdev->dev, "VSI %d has existing q_vectors\n",
7528 if (vsi->base_vector) {
7529 dev_info(&pf->pdev->dev, "VSI %d has non-zero base vector %d\n",
7530 vsi->seid, vsi->base_vector);
7534 ret = i40e_vsi_alloc_q_vectors(vsi);
7536 dev_info(&pf->pdev->dev,
7537 "failed to allocate %d q_vector for VSI %d, ret=%d\n",
7538 vsi->num_q_vectors, vsi->seid, ret);
7539 vsi->num_q_vectors = 0;
7540 goto vector_setup_out;
7543 if (vsi->num_q_vectors)
7544 vsi->base_vector = i40e_get_lump(pf, pf->irq_pile,
7545 vsi->num_q_vectors, vsi->idx);
7546 if (vsi->base_vector < 0) {
7547 dev_info(&pf->pdev->dev,
7548 "failed to get queue tracking for VSI %d, err=%d\n",
7549 vsi->seid, vsi->base_vector);
7550 i40e_vsi_free_q_vectors(vsi);
7552 goto vector_setup_out;
7560 * i40e_vsi_reinit_setup - return and reallocate resources for a VSI
7561 * @vsi: pointer to the vsi.
7563 * This re-allocates a vsi's queue resources.
7565 * Returns pointer to the successfully allocated and configured VSI sw struct
7566 * on success, otherwise returns NULL on failure.
7568 static struct i40e_vsi *i40e_vsi_reinit_setup(struct i40e_vsi *vsi)
7570 struct i40e_pf *pf = vsi->back;
7574 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
7575 i40e_vsi_clear_rings(vsi);
7577 i40e_vsi_free_arrays(vsi, false);
7578 i40e_set_num_rings_in_vsi(vsi);
7579 ret = i40e_vsi_alloc_arrays(vsi, false);
7583 ret = i40e_get_lump(pf, pf->qp_pile, vsi->alloc_queue_pairs, vsi->idx);
7585 dev_info(&pf->pdev->dev, "VSI %d get_lump failed %d\n",
7589 vsi->base_queue = ret;
7591 /* Update the FW view of the VSI. Force a reset of TC and queue
7592 * layout configurations.
7594 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
7595 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
7596 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
7597 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
7599 /* assign it some queues */
7600 ret = i40e_alloc_rings(vsi);
7604 /* map all of the rings to the q_vectors */
7605 i40e_vsi_map_rings_to_vectors(vsi);
7609 i40e_vsi_free_q_vectors(vsi);
7610 if (vsi->netdev_registered) {
7611 vsi->netdev_registered = false;
7612 unregister_netdev(vsi->netdev);
7613 free_netdev(vsi->netdev);
7616 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
7618 i40e_vsi_clear(vsi);
7623 * i40e_vsi_setup - Set up a VSI by a given type
7624 * @pf: board private structure
7626 * @uplink_seid: the switch element to link to
7627 * @param1: usage depends upon VSI type. For VF types, indicates VF id
7629 * This allocates the sw VSI structure and its queue resources, then add a VSI
7630 * to the identified VEB.
7632 * Returns pointer to the successfully allocated and configure VSI sw struct on
7633 * success, otherwise returns NULL on failure.
7635 struct i40e_vsi *i40e_vsi_setup(struct i40e_pf *pf, u8 type,
7636 u16 uplink_seid, u32 param1)
7638 struct i40e_vsi *vsi = NULL;
7639 struct i40e_veb *veb = NULL;
7643 /* The requested uplink_seid must be either
7644 * - the PF's port seid
7645 * no VEB is needed because this is the PF
7646 * or this is a Flow Director special case VSI
7647 * - seid of an existing VEB
7648 * - seid of a VSI that owns an existing VEB
7649 * - seid of a VSI that doesn't own a VEB
7650 * a new VEB is created and the VSI becomes the owner
7651 * - seid of the PF VSI, which is what creates the first VEB
7652 * this is a special case of the previous
7654 * Find which uplink_seid we were given and create a new VEB if needed
7656 for (i = 0; i < I40E_MAX_VEB; i++) {
7657 if (pf->veb[i] && pf->veb[i]->seid == uplink_seid) {
7663 if (!veb && uplink_seid != pf->mac_seid) {
7665 for (i = 0; i < pf->num_alloc_vsi; i++) {
7666 if (pf->vsi[i] && pf->vsi[i]->seid == uplink_seid) {
7672 dev_info(&pf->pdev->dev, "no such uplink_seid %d\n",
7677 if (vsi->uplink_seid == pf->mac_seid)
7678 veb = i40e_veb_setup(pf, 0, pf->mac_seid, vsi->seid,
7679 vsi->tc_config.enabled_tc);
7680 else if ((vsi->flags & I40E_VSI_FLAG_VEB_OWNER) == 0)
7681 veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid,
7682 vsi->tc_config.enabled_tc);
7684 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
7685 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
7689 dev_info(&pf->pdev->dev, "couldn't add VEB\n");
7693 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
7694 uplink_seid = veb->seid;
7697 /* get vsi sw struct */
7698 v_idx = i40e_vsi_mem_alloc(pf, type);
7701 vsi = pf->vsi[v_idx];
7705 vsi->veb_idx = (veb ? veb->idx : I40E_NO_VEB);
7707 if (type == I40E_VSI_MAIN)
7708 pf->lan_vsi = v_idx;
7709 else if (type == I40E_VSI_SRIOV)
7710 vsi->vf_id = param1;
7711 /* assign it some queues */
7712 ret = i40e_get_lump(pf, pf->qp_pile, vsi->alloc_queue_pairs,
7715 dev_info(&pf->pdev->dev, "VSI %d get_lump failed %d\n",
7719 vsi->base_queue = ret;
7721 /* get a VSI from the hardware */
7722 vsi->uplink_seid = uplink_seid;
7723 ret = i40e_add_vsi(vsi);
7727 switch (vsi->type) {
7728 /* setup the netdev if needed */
7730 case I40E_VSI_VMDQ2:
7731 ret = i40e_config_netdev(vsi);
7734 ret = register_netdev(vsi->netdev);
7737 vsi->netdev_registered = true;
7738 netif_carrier_off(vsi->netdev);
7739 #ifdef CONFIG_I40E_DCB
7740 /* Setup DCB netlink interface */
7741 i40e_dcbnl_setup(vsi);
7742 #endif /* CONFIG_I40E_DCB */
7746 /* set up vectors and rings if needed */
7747 ret = i40e_vsi_setup_vectors(vsi);
7751 ret = i40e_alloc_rings(vsi);
7755 /* map all of the rings to the q_vectors */
7756 i40e_vsi_map_rings_to_vectors(vsi);
7758 i40e_vsi_reset_stats(vsi);
7762 /* no netdev or rings for the other VSI types */
7769 i40e_vsi_free_q_vectors(vsi);
7771 if (vsi->netdev_registered) {
7772 vsi->netdev_registered = false;
7773 unregister_netdev(vsi->netdev);
7774 free_netdev(vsi->netdev);
7778 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
7780 i40e_vsi_clear(vsi);
7786 * i40e_veb_get_bw_info - Query VEB BW information
7787 * @veb: the veb to query
7789 * Query the Tx scheduler BW configuration data for given VEB
7791 static int i40e_veb_get_bw_info(struct i40e_veb *veb)
7793 struct i40e_aqc_query_switching_comp_ets_config_resp ets_data;
7794 struct i40e_aqc_query_switching_comp_bw_config_resp bw_data;
7795 struct i40e_pf *pf = veb->pf;
7796 struct i40e_hw *hw = &pf->hw;
7801 ret = i40e_aq_query_switch_comp_bw_config(hw, veb->seid,
7804 dev_info(&pf->pdev->dev,
7805 "query veb bw config failed, aq_err=%d\n",
7806 hw->aq.asq_last_status);
7810 ret = i40e_aq_query_switch_comp_ets_config(hw, veb->seid,
7813 dev_info(&pf->pdev->dev,
7814 "query veb bw ets config failed, aq_err=%d\n",
7815 hw->aq.asq_last_status);
7819 veb->bw_limit = le16_to_cpu(ets_data.port_bw_limit);
7820 veb->bw_max_quanta = ets_data.tc_bw_max;
7821 veb->is_abs_credits = bw_data.absolute_credits_enable;
7822 tc_bw_max = le16_to_cpu(bw_data.tc_bw_max[0]) |
7823 (le16_to_cpu(bw_data.tc_bw_max[1]) << 16);
7824 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
7825 veb->bw_tc_share_credits[i] = bw_data.tc_bw_share_credits[i];
7826 veb->bw_tc_limit_credits[i] =
7827 le16_to_cpu(bw_data.tc_bw_limits[i]);
7828 veb->bw_tc_max_quanta[i] = ((tc_bw_max >> (i*4)) & 0x7);
7836 * i40e_veb_mem_alloc - Allocates the next available struct veb in the PF
7837 * @pf: board private structure
7839 * On error: returns error code (negative)
7840 * On success: returns vsi index in PF (positive)
7842 static int i40e_veb_mem_alloc(struct i40e_pf *pf)
7845 struct i40e_veb *veb;
7848 /* Need to protect the allocation of switch elements at the PF level */
7849 mutex_lock(&pf->switch_mutex);
7851 /* VEB list may be fragmented if VEB creation/destruction has
7852 * been happening. We can afford to do a quick scan to look
7853 * for any free slots in the list.
7855 * find next empty veb slot, looping back around if necessary
7858 while ((i < I40E_MAX_VEB) && (pf->veb[i] != NULL))
7860 if (i >= I40E_MAX_VEB) {
7862 goto err_alloc_veb; /* out of VEB slots! */
7865 veb = kzalloc(sizeof(*veb), GFP_KERNEL);
7872 veb->enabled_tc = 1;
7877 mutex_unlock(&pf->switch_mutex);
7882 * i40e_switch_branch_release - Delete a branch of the switch tree
7883 * @branch: where to start deleting
7885 * This uses recursion to find the tips of the branch to be
7886 * removed, deleting until we get back to and can delete this VEB.
7888 static void i40e_switch_branch_release(struct i40e_veb *branch)
7890 struct i40e_pf *pf = branch->pf;
7891 u16 branch_seid = branch->seid;
7892 u16 veb_idx = branch->idx;
7895 /* release any VEBs on this VEB - RECURSION */
7896 for (i = 0; i < I40E_MAX_VEB; i++) {
7899 if (pf->veb[i]->uplink_seid == branch->seid)
7900 i40e_switch_branch_release(pf->veb[i]);
7903 /* Release the VSIs on this VEB, but not the owner VSI.
7905 * NOTE: Removing the last VSI on a VEB has the SIDE EFFECT of removing
7906 * the VEB itself, so don't use (*branch) after this loop.
7908 for (i = 0; i < pf->num_alloc_vsi; i++) {
7911 if (pf->vsi[i]->uplink_seid == branch_seid &&
7912 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
7913 i40e_vsi_release(pf->vsi[i]);
7917 /* There's one corner case where the VEB might not have been
7918 * removed, so double check it here and remove it if needed.
7919 * This case happens if the veb was created from the debugfs
7920 * commands and no VSIs were added to it.
7922 if (pf->veb[veb_idx])
7923 i40e_veb_release(pf->veb[veb_idx]);
7927 * i40e_veb_clear - remove veb struct
7928 * @veb: the veb to remove
7930 static void i40e_veb_clear(struct i40e_veb *veb)
7936 struct i40e_pf *pf = veb->pf;
7938 mutex_lock(&pf->switch_mutex);
7939 if (pf->veb[veb->idx] == veb)
7940 pf->veb[veb->idx] = NULL;
7941 mutex_unlock(&pf->switch_mutex);
7948 * i40e_veb_release - Delete a VEB and free its resources
7949 * @veb: the VEB being removed
7951 void i40e_veb_release(struct i40e_veb *veb)
7953 struct i40e_vsi *vsi = NULL;
7959 /* find the remaining VSI and check for extras */
7960 for (i = 0; i < pf->num_alloc_vsi; i++) {
7961 if (pf->vsi[i] && pf->vsi[i]->uplink_seid == veb->seid) {
7967 dev_info(&pf->pdev->dev,
7968 "can't remove VEB %d with %d VSIs left\n",
7973 /* move the remaining VSI to uplink veb */
7974 vsi->flags &= ~I40E_VSI_FLAG_VEB_OWNER;
7975 if (veb->uplink_seid) {
7976 vsi->uplink_seid = veb->uplink_seid;
7977 if (veb->uplink_seid == pf->mac_seid)
7978 vsi->veb_idx = I40E_NO_VEB;
7980 vsi->veb_idx = veb->veb_idx;
7983 vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
7984 vsi->veb_idx = pf->vsi[pf->lan_vsi]->veb_idx;
7987 i40e_aq_delete_element(&pf->hw, veb->seid, NULL);
7988 i40e_veb_clear(veb);
7992 * i40e_add_veb - create the VEB in the switch
7993 * @veb: the VEB to be instantiated
7994 * @vsi: the controlling VSI
7996 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi)
7998 bool is_default = false;
7999 bool is_cloud = false;
8002 /* get a VEB from the hardware */
8003 ret = i40e_aq_add_veb(&veb->pf->hw, veb->uplink_seid, vsi->seid,
8004 veb->enabled_tc, is_default,
8005 is_cloud, &veb->seid, NULL);
8007 dev_info(&veb->pf->pdev->dev,
8008 "couldn't add VEB, err %d, aq_err %d\n",
8009 ret, veb->pf->hw.aq.asq_last_status);
8013 /* get statistics counter */
8014 ret = i40e_aq_get_veb_parameters(&veb->pf->hw, veb->seid, NULL, NULL,
8015 &veb->stats_idx, NULL, NULL, NULL);
8017 dev_info(&veb->pf->pdev->dev,
8018 "couldn't get VEB statistics idx, err %d, aq_err %d\n",
8019 ret, veb->pf->hw.aq.asq_last_status);
8022 ret = i40e_veb_get_bw_info(veb);
8024 dev_info(&veb->pf->pdev->dev,
8025 "couldn't get VEB bw info, err %d, aq_err %d\n",
8026 ret, veb->pf->hw.aq.asq_last_status);
8027 i40e_aq_delete_element(&veb->pf->hw, veb->seid, NULL);
8031 vsi->uplink_seid = veb->seid;
8032 vsi->veb_idx = veb->idx;
8033 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
8039 * i40e_veb_setup - Set up a VEB
8040 * @pf: board private structure
8041 * @flags: VEB setup flags
8042 * @uplink_seid: the switch element to link to
8043 * @vsi_seid: the initial VSI seid
8044 * @enabled_tc: Enabled TC bit-map
8046 * This allocates the sw VEB structure and links it into the switch
8047 * It is possible and legal for this to be a duplicate of an already
8048 * existing VEB. It is also possible for both uplink and vsi seids
8049 * to be zero, in order to create a floating VEB.
8051 * Returns pointer to the successfully allocated VEB sw struct on
8052 * success, otherwise returns NULL on failure.
8054 struct i40e_veb *i40e_veb_setup(struct i40e_pf *pf, u16 flags,
8055 u16 uplink_seid, u16 vsi_seid,
8058 struct i40e_veb *veb, *uplink_veb = NULL;
8059 int vsi_idx, veb_idx;
8062 /* if one seid is 0, the other must be 0 to create a floating relay */
8063 if ((uplink_seid == 0 || vsi_seid == 0) &&
8064 (uplink_seid + vsi_seid != 0)) {
8065 dev_info(&pf->pdev->dev,
8066 "one, not both seid's are 0: uplink=%d vsi=%d\n",
8067 uplink_seid, vsi_seid);
8071 /* make sure there is such a vsi and uplink */
8072 for (vsi_idx = 0; vsi_idx < pf->num_alloc_vsi; vsi_idx++)
8073 if (pf->vsi[vsi_idx] && pf->vsi[vsi_idx]->seid == vsi_seid)
8075 if (vsi_idx >= pf->num_alloc_vsi && vsi_seid != 0) {
8076 dev_info(&pf->pdev->dev, "vsi seid %d not found\n",
8081 if (uplink_seid && uplink_seid != pf->mac_seid) {
8082 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
8083 if (pf->veb[veb_idx] &&
8084 pf->veb[veb_idx]->seid == uplink_seid) {
8085 uplink_veb = pf->veb[veb_idx];
8090 dev_info(&pf->pdev->dev,
8091 "uplink seid %d not found\n", uplink_seid);
8096 /* get veb sw struct */
8097 veb_idx = i40e_veb_mem_alloc(pf);
8100 veb = pf->veb[veb_idx];
8102 veb->uplink_seid = uplink_seid;
8103 veb->veb_idx = (uplink_veb ? uplink_veb->idx : I40E_NO_VEB);
8104 veb->enabled_tc = (enabled_tc ? enabled_tc : 0x1);
8106 /* create the VEB in the switch */
8107 ret = i40e_add_veb(veb, pf->vsi[vsi_idx]);
8110 if (vsi_idx == pf->lan_vsi)
8111 pf->lan_veb = veb->idx;
8116 i40e_veb_clear(veb);
8122 * i40e_setup_pf_switch_element - set pf vars based on switch type
8123 * @pf: board private structure
8124 * @ele: element we are building info from
8125 * @num_reported: total number of elements
8126 * @printconfig: should we print the contents
8128 * helper function to assist in extracting a few useful SEID values.
8130 static void i40e_setup_pf_switch_element(struct i40e_pf *pf,
8131 struct i40e_aqc_switch_config_element_resp *ele,
8132 u16 num_reported, bool printconfig)
8134 u16 downlink_seid = le16_to_cpu(ele->downlink_seid);
8135 u16 uplink_seid = le16_to_cpu(ele->uplink_seid);
8136 u8 element_type = ele->element_type;
8137 u16 seid = le16_to_cpu(ele->seid);
8140 dev_info(&pf->pdev->dev,
8141 "type=%d seid=%d uplink=%d downlink=%d\n",
8142 element_type, seid, uplink_seid, downlink_seid);
8144 switch (element_type) {
8145 case I40E_SWITCH_ELEMENT_TYPE_MAC:
8146 pf->mac_seid = seid;
8148 case I40E_SWITCH_ELEMENT_TYPE_VEB:
8150 if (uplink_seid != pf->mac_seid)
8152 if (pf->lan_veb == I40E_NO_VEB) {
8155 /* find existing or else empty VEB */
8156 for (v = 0; v < I40E_MAX_VEB; v++) {
8157 if (pf->veb[v] && (pf->veb[v]->seid == seid)) {
8162 if (pf->lan_veb == I40E_NO_VEB) {
8163 v = i40e_veb_mem_alloc(pf);
8170 pf->veb[pf->lan_veb]->seid = seid;
8171 pf->veb[pf->lan_veb]->uplink_seid = pf->mac_seid;
8172 pf->veb[pf->lan_veb]->pf = pf;
8173 pf->veb[pf->lan_veb]->veb_idx = I40E_NO_VEB;
8175 case I40E_SWITCH_ELEMENT_TYPE_VSI:
8176 if (num_reported != 1)
8178 /* This is immediately after a reset so we can assume this is
8181 pf->mac_seid = uplink_seid;
8182 pf->pf_seid = downlink_seid;
8183 pf->main_vsi_seid = seid;
8185 dev_info(&pf->pdev->dev,
8186 "pf_seid=%d main_vsi_seid=%d\n",
8187 pf->pf_seid, pf->main_vsi_seid);
8189 case I40E_SWITCH_ELEMENT_TYPE_PF:
8190 case I40E_SWITCH_ELEMENT_TYPE_VF:
8191 case I40E_SWITCH_ELEMENT_TYPE_EMP:
8192 case I40E_SWITCH_ELEMENT_TYPE_BMC:
8193 case I40E_SWITCH_ELEMENT_TYPE_PE:
8194 case I40E_SWITCH_ELEMENT_TYPE_PA:
8195 /* ignore these for now */
8198 dev_info(&pf->pdev->dev, "unknown element type=%d seid=%d\n",
8199 element_type, seid);
8205 * i40e_fetch_switch_configuration - Get switch config from firmware
8206 * @pf: board private structure
8207 * @printconfig: should we print the contents
8209 * Get the current switch configuration from the device and
8210 * extract a few useful SEID values.
8212 int i40e_fetch_switch_configuration(struct i40e_pf *pf, bool printconfig)
8214 struct i40e_aqc_get_switch_config_resp *sw_config;
8220 aq_buf = kzalloc(I40E_AQ_LARGE_BUF, GFP_KERNEL);
8224 sw_config = (struct i40e_aqc_get_switch_config_resp *)aq_buf;
8226 u16 num_reported, num_total;
8228 ret = i40e_aq_get_switch_config(&pf->hw, sw_config,
8232 dev_info(&pf->pdev->dev,
8233 "get switch config failed %d aq_err=%x\n",
8234 ret, pf->hw.aq.asq_last_status);
8239 num_reported = le16_to_cpu(sw_config->header.num_reported);
8240 num_total = le16_to_cpu(sw_config->header.num_total);
8243 dev_info(&pf->pdev->dev,
8244 "header: %d reported %d total\n",
8245 num_reported, num_total);
8247 for (i = 0; i < num_reported; i++) {
8248 struct i40e_aqc_switch_config_element_resp *ele =
8249 &sw_config->element[i];
8251 i40e_setup_pf_switch_element(pf, ele, num_reported,
8254 } while (next_seid != 0);
8261 * i40e_setup_pf_switch - Setup the HW switch on startup or after reset
8262 * @pf: board private structure
8263 * @reinit: if the Main VSI needs to re-initialized.
8265 * Returns 0 on success, negative value on failure
8267 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit)
8269 u32 rxfc = 0, txfc = 0, rxfc_reg;
8272 /* find out what's out there already */
8273 ret = i40e_fetch_switch_configuration(pf, false);
8275 dev_info(&pf->pdev->dev,
8276 "couldn't fetch switch config, err %d, aq_err %d\n",
8277 ret, pf->hw.aq.asq_last_status);
8280 i40e_pf_reset_stats(pf);
8282 /* first time setup */
8283 if (pf->lan_vsi == I40E_NO_VSI || reinit) {
8284 struct i40e_vsi *vsi = NULL;
8287 /* Set up the PF VSI associated with the PF's main VSI
8288 * that is already in the HW switch
8290 if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb])
8291 uplink_seid = pf->veb[pf->lan_veb]->seid;
8293 uplink_seid = pf->mac_seid;
8294 if (pf->lan_vsi == I40E_NO_VSI)
8295 vsi = i40e_vsi_setup(pf, I40E_VSI_MAIN, uplink_seid, 0);
8297 vsi = i40e_vsi_reinit_setup(pf->vsi[pf->lan_vsi]);
8299 dev_info(&pf->pdev->dev, "setup of MAIN VSI failed\n");
8300 i40e_fdir_teardown(pf);
8304 /* force a reset of TC and queue layout configurations */
8305 u8 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
8306 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
8307 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
8308 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
8310 i40e_vlan_stripping_disable(pf->vsi[pf->lan_vsi]);
8312 i40e_fdir_sb_setup(pf);
8314 /* Setup static PF queue filter control settings */
8315 ret = i40e_setup_pf_filter_control(pf);
8317 dev_info(&pf->pdev->dev, "setup_pf_filter_control failed: %d\n",
8319 /* Failure here should not stop continuing other steps */
8322 /* enable RSS in the HW, even for only one queue, as the stack can use
8325 if ((pf->flags & I40E_FLAG_RSS_ENABLED))
8326 i40e_config_rss(pf);
8328 /* fill in link information and enable LSE reporting */
8329 i40e_aq_get_link_info(&pf->hw, true, NULL, NULL);
8330 i40e_link_event(pf);
8332 /* Initialize user-specific link properties */
8333 pf->fc_autoneg_status = ((pf->hw.phy.link_info.an_info &
8334 I40E_AQ_AN_COMPLETED) ? true : false);
8335 /* requested_mode is set in probe or by ethtool */
8336 if (!pf->fc_autoneg_status)
8339 if ((pf->hw.phy.link_info.an_info & I40E_AQ_LINK_PAUSE_TX) &&
8340 (pf->hw.phy.link_info.an_info & I40E_AQ_LINK_PAUSE_RX))
8341 pf->hw.fc.current_mode = I40E_FC_FULL;
8342 else if (pf->hw.phy.link_info.an_info & I40E_AQ_LINK_PAUSE_TX)
8343 pf->hw.fc.current_mode = I40E_FC_TX_PAUSE;
8344 else if (pf->hw.phy.link_info.an_info & I40E_AQ_LINK_PAUSE_RX)
8345 pf->hw.fc.current_mode = I40E_FC_RX_PAUSE;
8347 pf->hw.fc.current_mode = I40E_FC_NONE;
8349 /* sync the flow control settings with the auto-neg values */
8350 switch (pf->hw.fc.current_mode) {
8355 case I40E_FC_TX_PAUSE:
8359 case I40E_FC_RX_PAUSE:
8364 case I40E_FC_DEFAULT:
8371 /* no default case, we have to handle all possibilities here */
8374 wr32(&pf->hw, I40E_PRTDCB_FCCFG, txfc << I40E_PRTDCB_FCCFG_TFCE_SHIFT);
8376 rxfc_reg = rd32(&pf->hw, I40E_PRTDCB_MFLCN) &
8377 ~I40E_PRTDCB_MFLCN_RFCE_MASK;
8378 rxfc_reg |= (rxfc << I40E_PRTDCB_MFLCN_RFCE_SHIFT);
8380 wr32(&pf->hw, I40E_PRTDCB_MFLCN, rxfc_reg);
8385 /* disable L2 flow control, user can turn it on if they wish */
8386 wr32(&pf->hw, I40E_PRTDCB_FCCFG, 0);
8387 wr32(&pf->hw, I40E_PRTDCB_MFLCN, rd32(&pf->hw, I40E_PRTDCB_MFLCN) &
8388 ~I40E_PRTDCB_MFLCN_RFCE_MASK);
8397 * i40e_determine_queue_usage - Work out queue distribution
8398 * @pf: board private structure
8400 static void i40e_determine_queue_usage(struct i40e_pf *pf)
8404 pf->num_lan_qps = 0;
8406 /* Find the max queues to be put into basic use. We'll always be
8407 * using TC0, whether or not DCB is running, and TC0 will get the
8410 queues_left = pf->hw.func_caps.num_tx_qp;
8412 if ((queues_left == 1) ||
8413 !(pf->flags & I40E_FLAG_MSIX_ENABLED)) {
8414 /* one qp for PF, no queues for anything else */
8416 pf->rss_size = pf->num_lan_qps = 1;
8418 /* make sure all the fancies are disabled */
8419 pf->flags &= ~(I40E_FLAG_RSS_ENABLED |
8420 I40E_FLAG_FD_SB_ENABLED |
8421 I40E_FLAG_FD_ATR_ENABLED |
8422 I40E_FLAG_DCB_CAPABLE |
8423 I40E_FLAG_SRIOV_ENABLED |
8424 I40E_FLAG_VMDQ_ENABLED);
8425 } else if (!(pf->flags & (I40E_FLAG_RSS_ENABLED |
8426 I40E_FLAG_FD_SB_ENABLED |
8427 I40E_FLAG_FD_ATR_ENABLED |
8428 I40E_FLAG_DCB_CAPABLE))) {
8430 pf->rss_size = pf->num_lan_qps = 1;
8431 queues_left -= pf->num_lan_qps;
8433 pf->flags &= ~(I40E_FLAG_RSS_ENABLED |
8434 I40E_FLAG_FD_SB_ENABLED |
8435 I40E_FLAG_FD_ATR_ENABLED |
8436 I40E_FLAG_DCB_ENABLED |
8437 I40E_FLAG_VMDQ_ENABLED);
8439 /* Not enough queues for all TCs */
8440 if ((pf->flags & I40E_FLAG_DCB_CAPABLE) &&
8441 (queues_left < I40E_MAX_TRAFFIC_CLASS)) {
8442 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
8443 dev_info(&pf->pdev->dev, "not enough queues for DCB. DCB is disabled.\n");
8445 pf->num_lan_qps = pf->rss_size_max;
8446 queues_left -= pf->num_lan_qps;
8449 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
8450 if (queues_left > 1) {
8451 queues_left -= 1; /* save 1 queue for FD */
8453 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
8454 dev_info(&pf->pdev->dev, "not enough queues for Flow Director. Flow Director feature is disabled\n");
8458 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
8459 pf->num_vf_qps && pf->num_req_vfs && queues_left) {
8460 pf->num_req_vfs = min_t(int, pf->num_req_vfs,
8461 (queues_left / pf->num_vf_qps));
8462 queues_left -= (pf->num_req_vfs * pf->num_vf_qps);
8465 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&
8466 pf->num_vmdq_vsis && pf->num_vmdq_qps && queues_left) {
8467 pf->num_vmdq_vsis = min_t(int, pf->num_vmdq_vsis,
8468 (queues_left / pf->num_vmdq_qps));
8469 queues_left -= (pf->num_vmdq_vsis * pf->num_vmdq_qps);
8472 pf->queues_left = queues_left;
8476 * i40e_setup_pf_filter_control - Setup PF static filter control
8477 * @pf: PF to be setup
8479 * i40e_setup_pf_filter_control sets up a pf's initial filter control
8480 * settings. If PE/FCoE are enabled then it will also set the per PF
8481 * based filter sizes required for them. It also enables Flow director,
8482 * ethertype and macvlan type filter settings for the pf.
8484 * Returns 0 on success, negative on failure
8486 static int i40e_setup_pf_filter_control(struct i40e_pf *pf)
8488 struct i40e_filter_control_settings *settings = &pf->filter_settings;
8490 settings->hash_lut_size = I40E_HASH_LUT_SIZE_128;
8492 /* Flow Director is enabled */
8493 if (pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED))
8494 settings->enable_fdir = true;
8496 /* Ethtype and MACVLAN filters enabled for PF */
8497 settings->enable_ethtype = true;
8498 settings->enable_macvlan = true;
8500 if (i40e_set_filter_control(&pf->hw, settings))
8506 #define INFO_STRING_LEN 255
8507 static void i40e_print_features(struct i40e_pf *pf)
8509 struct i40e_hw *hw = &pf->hw;
8512 string = kzalloc(INFO_STRING_LEN, GFP_KERNEL);
8514 dev_err(&pf->pdev->dev, "Features string allocation failed\n");
8520 buf += sprintf(string, "Features: PF-id[%d] ", hw->pf_id);
8521 #ifdef CONFIG_PCI_IOV
8522 buf += sprintf(buf, "VFs: %d ", pf->num_req_vfs);
8524 buf += sprintf(buf, "VSIs: %d QP: %d ", pf->hw.func_caps.num_vsis,
8525 pf->vsi[pf->lan_vsi]->num_queue_pairs);
8527 if (pf->flags & I40E_FLAG_RSS_ENABLED)
8528 buf += sprintf(buf, "RSS ");
8529 if (pf->flags & I40E_FLAG_FD_ATR_ENABLED)
8530 buf += sprintf(buf, "FD_ATR ");
8531 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
8532 buf += sprintf(buf, "FD_SB ");
8533 buf += sprintf(buf, "NTUPLE ");
8535 if (pf->flags & I40E_FLAG_DCB_CAPABLE)
8536 buf += sprintf(buf, "DCB ");
8537 if (pf->flags & I40E_FLAG_PTP)
8538 buf += sprintf(buf, "PTP ");
8540 BUG_ON(buf > (string + INFO_STRING_LEN));
8541 dev_info(&pf->pdev->dev, "%s\n", string);
8546 * i40e_probe - Device initialization routine
8547 * @pdev: PCI device information struct
8548 * @ent: entry in i40e_pci_tbl
8550 * i40e_probe initializes a pf identified by a pci_dev structure.
8551 * The OS initialization, configuring of the pf private structure,
8552 * and a hardware reset occur.
8554 * Returns 0 on success, negative on failure
8556 static int i40e_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
8560 static u16 pfs_found;
8566 err = pci_enable_device_mem(pdev);
8570 /* set up for high or low dma */
8571 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
8573 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
8576 "DMA configuration failed: 0x%x\n", err);
8581 /* set up pci connections */
8582 err = pci_request_selected_regions(pdev, pci_select_bars(pdev,
8583 IORESOURCE_MEM), i40e_driver_name);
8585 dev_info(&pdev->dev,
8586 "pci_request_selected_regions failed %d\n", err);
8590 pci_enable_pcie_error_reporting(pdev);
8591 pci_set_master(pdev);
8593 /* Now that we have a PCI connection, we need to do the
8594 * low level device setup. This is primarily setting up
8595 * the Admin Queue structures and then querying for the
8596 * device's current profile information.
8598 pf = kzalloc(sizeof(*pf), GFP_KERNEL);
8605 set_bit(__I40E_DOWN, &pf->state);
8609 hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
8610 pci_resource_len(pdev, 0));
8613 dev_info(&pdev->dev, "ioremap(0x%04x, 0x%04x) failed: 0x%x\n",
8614 (unsigned int)pci_resource_start(pdev, 0),
8615 (unsigned int)pci_resource_len(pdev, 0), err);
8618 hw->vendor_id = pdev->vendor;
8619 hw->device_id = pdev->device;
8620 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
8621 hw->subsystem_vendor_id = pdev->subsystem_vendor;
8622 hw->subsystem_device_id = pdev->subsystem_device;
8623 hw->bus.device = PCI_SLOT(pdev->devfn);
8624 hw->bus.func = PCI_FUNC(pdev->devfn);
8625 pf->instance = pfs_found;
8627 /* do a special CORER for clearing PXE mode once at init */
8628 if (hw->revision_id == 0 &&
8629 (rd32(hw, I40E_GLLAN_RCTL_0) & I40E_GLLAN_RCTL_0_PXE_MODE_MASK)) {
8630 wr32(hw, I40E_GLGEN_RTRIG, I40E_GLGEN_RTRIG_CORER_MASK);
8635 i40e_clear_pxe_mode(hw);
8638 /* Reset here to make sure all is clean and to define PF 'n' */
8639 err = i40e_pf_reset(hw);
8641 dev_info(&pdev->dev, "Initial pf_reset failed: %d\n", err);
8646 hw->aq.num_arq_entries = I40E_AQ_LEN;
8647 hw->aq.num_asq_entries = I40E_AQ_LEN;
8648 hw->aq.arq_buf_size = I40E_MAX_AQ_BUF_SIZE;
8649 hw->aq.asq_buf_size = I40E_MAX_AQ_BUF_SIZE;
8650 pf->adminq_work_limit = I40E_AQ_WORK_LIMIT;
8651 snprintf(pf->misc_int_name, sizeof(pf->misc_int_name) - 1,
8653 dev_driver_string(&pf->pdev->dev), pf->hw.pf_id);
8655 err = i40e_init_shared_code(hw);
8657 dev_info(&pdev->dev, "init_shared_code failed: %d\n", err);
8661 /* set up a default setting for link flow control */
8662 pf->hw.fc.requested_mode = I40E_FC_NONE;
8664 err = i40e_init_adminq(hw);
8665 dev_info(&pdev->dev, "%s\n", i40e_fw_version_str(hw));
8667 dev_info(&pdev->dev,
8668 "init_adminq failed: %d expecting API %02x.%02x\n",
8670 I40E_FW_API_VERSION_MAJOR, I40E_FW_API_VERSION_MINOR);
8674 if (hw->aq.api_min_ver > I40E_FW_API_VERSION_MINOR)
8675 dev_info(&pdev->dev,
8676 "Note: FW API version %02x.%02x newer than expected %02x.%02x, recommend driver update.\n",
8677 hw->aq.api_maj_ver, hw->aq.api_min_ver,
8678 I40E_FW_API_VERSION_MAJOR, I40E_FW_API_VERSION_MINOR);
8680 if (hw->aq.api_maj_ver < I40E_FW_API_VERSION_MAJOR ||
8681 hw->aq.api_min_ver < (I40E_FW_API_VERSION_MINOR-1))
8682 dev_info(&pdev->dev,
8683 "Note: FW API version %02x.%02x older than expected %02x.%02x, recommend nvm update.\n",
8684 hw->aq.api_maj_ver, hw->aq.api_min_ver,
8685 I40E_FW_API_VERSION_MAJOR, I40E_FW_API_VERSION_MINOR);
8688 i40e_verify_eeprom(pf);
8690 /* Rev 0 hardware was never productized */
8691 if (hw->revision_id < 1)
8692 dev_warn(&pdev->dev, "This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\n");
8694 i40e_clear_pxe_mode(hw);
8695 err = i40e_get_capabilities(pf);
8697 goto err_adminq_setup;
8699 err = i40e_sw_init(pf);
8701 dev_info(&pdev->dev, "sw_init failed: %d\n", err);
8705 err = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
8706 hw->func_caps.num_rx_qp,
8707 pf->fcoe_hmc_cntx_num, pf->fcoe_hmc_filt_num);
8709 dev_info(&pdev->dev, "init_lan_hmc failed: %d\n", err);
8710 goto err_init_lan_hmc;
8713 err = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
8715 dev_info(&pdev->dev, "configure_lan_hmc failed: %d\n", err);
8717 goto err_configure_lan_hmc;
8720 i40e_get_mac_addr(hw, hw->mac.addr);
8721 if (!is_valid_ether_addr(hw->mac.addr)) {
8722 dev_info(&pdev->dev, "invalid MAC address %pM\n", hw->mac.addr);
8726 dev_info(&pdev->dev, "MAC address: %pM\n", hw->mac.addr);
8727 ether_addr_copy(hw->mac.perm_addr, hw->mac.addr);
8729 pci_set_drvdata(pdev, pf);
8730 pci_save_state(pdev);
8731 #ifdef CONFIG_I40E_DCB
8732 err = i40e_init_pf_dcb(pf);
8734 dev_info(&pdev->dev, "init_pf_dcb failed: %d\n", err);
8735 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
8736 /* Continue without DCB enabled */
8738 #endif /* CONFIG_I40E_DCB */
8740 /* set up periodic task facility */
8741 setup_timer(&pf->service_timer, i40e_service_timer, (unsigned long)pf);
8742 pf->service_timer_period = HZ;
8744 INIT_WORK(&pf->service_task, i40e_service_task);
8745 clear_bit(__I40E_SERVICE_SCHED, &pf->state);
8746 pf->flags |= I40E_FLAG_NEED_LINK_UPDATE;
8747 pf->link_check_timeout = jiffies;
8749 /* WoL defaults to disabled */
8751 device_set_wakeup_enable(&pf->pdev->dev, pf->wol_en);
8753 /* set up the main switch operations */
8754 i40e_determine_queue_usage(pf);
8755 i40e_init_interrupt_scheme(pf);
8757 /* The number of VSIs reported by the FW is the minimum guaranteed
8758 * to us; HW supports far more and we share the remaining pool with
8759 * the other PFs. We allocate space for more than the guarantee with
8760 * the understanding that we might not get them all later.
8762 if (pf->hw.func_caps.num_vsis < I40E_MIN_VSI_ALLOC)
8763 pf->num_alloc_vsi = I40E_MIN_VSI_ALLOC;
8765 pf->num_alloc_vsi = pf->hw.func_caps.num_vsis;
8767 /* Set up the *vsi struct and our local tracking of the MAIN PF vsi. */
8768 len = sizeof(struct i40e_vsi *) * pf->num_alloc_vsi;
8769 pf->vsi = kzalloc(len, GFP_KERNEL);
8772 goto err_switch_setup;
8775 err = i40e_setup_pf_switch(pf, false);
8777 dev_info(&pdev->dev, "setup_pf_switch failed: %d\n", err);
8780 /* if FDIR VSI was set up, start it now */
8781 for (i = 0; i < pf->num_alloc_vsi; i++) {
8782 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
8783 i40e_vsi_open(pf->vsi[i]);
8788 /* The main driver is (mostly) up and happy. We need to set this state
8789 * before setting up the misc vector or we get a race and the vector
8790 * ends up disabled forever.
8792 clear_bit(__I40E_DOWN, &pf->state);
8794 /* In case of MSIX we are going to setup the misc vector right here
8795 * to handle admin queue events etc. In case of legacy and MSI
8796 * the misc functionality and queue processing is combined in
8797 * the same vector and that gets setup at open.
8799 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
8800 err = i40e_setup_misc_vector(pf);
8802 dev_info(&pdev->dev,
8803 "setup of misc vector failed: %d\n", err);
8808 #ifdef CONFIG_PCI_IOV
8809 /* prep for VF support */
8810 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
8811 (pf->flags & I40E_FLAG_MSIX_ENABLED) &&
8812 !test_bit(__I40E_BAD_EEPROM, &pf->state)) {
8815 /* disable link interrupts for VFs */
8816 val = rd32(hw, I40E_PFGEN_PORTMDIO_NUM);
8817 val &= ~I40E_PFGEN_PORTMDIO_NUM_VFLINK_STAT_ENA_MASK;
8818 wr32(hw, I40E_PFGEN_PORTMDIO_NUM, val);
8821 if (pci_num_vf(pdev)) {
8822 dev_info(&pdev->dev,
8823 "Active VFs found, allocating resources.\n");
8824 err = i40e_alloc_vfs(pf, pci_num_vf(pdev));
8826 dev_info(&pdev->dev,
8827 "Error %d allocating resources for existing VFs\n",
8831 #endif /* CONFIG_PCI_IOV */
8835 i40e_dbg_pf_init(pf);
8837 /* tell the firmware that we're starting */
8838 i40e_send_version(pf);
8840 /* since everything's happy, start the service_task timer */
8841 mod_timer(&pf->service_timer,
8842 round_jiffies(jiffies + pf->service_timer_period));
8844 /* Get the negotiated link width and speed from PCI config space */
8845 pcie_capability_read_word(pf->pdev, PCI_EXP_LNKSTA, &link_status);
8847 i40e_set_pci_config_data(hw, link_status);
8849 dev_info(&pdev->dev, "PCI-Express: %s %s\n",
8850 (hw->bus.speed == i40e_bus_speed_8000 ? "Speed 8.0GT/s" :
8851 hw->bus.speed == i40e_bus_speed_5000 ? "Speed 5.0GT/s" :
8852 hw->bus.speed == i40e_bus_speed_2500 ? "Speed 2.5GT/s" :
8854 (hw->bus.width == i40e_bus_width_pcie_x8 ? "Width x8" :
8855 hw->bus.width == i40e_bus_width_pcie_x4 ? "Width x4" :
8856 hw->bus.width == i40e_bus_width_pcie_x2 ? "Width x2" :
8857 hw->bus.width == i40e_bus_width_pcie_x1 ? "Width x1" :
8860 if (hw->bus.width < i40e_bus_width_pcie_x8 ||
8861 hw->bus.speed < i40e_bus_speed_8000) {
8862 dev_warn(&pdev->dev, "PCI-Express bandwidth available for this device may be insufficient for optimal performance.\n");
8863 dev_warn(&pdev->dev, "Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\n");
8866 /* print a string summarizing features */
8867 i40e_print_features(pf);
8871 /* Unwind what we've done if something failed in the setup */
8873 set_bit(__I40E_DOWN, &pf->state);
8874 i40e_clear_interrupt_scheme(pf);
8877 i40e_reset_interrupt_capability(pf);
8878 del_timer_sync(&pf->service_timer);
8880 err_configure_lan_hmc:
8881 (void)i40e_shutdown_lan_hmc(hw);
8884 kfree(pf->irq_pile);
8887 (void)i40e_shutdown_adminq(hw);
8889 iounmap(hw->hw_addr);
8893 pci_disable_pcie_error_reporting(pdev);
8894 pci_release_selected_regions(pdev,
8895 pci_select_bars(pdev, IORESOURCE_MEM));
8898 pci_disable_device(pdev);
8903 * i40e_remove - Device removal routine
8904 * @pdev: PCI device information struct
8906 * i40e_remove is called by the PCI subsystem to alert the driver
8907 * that is should release a PCI device. This could be caused by a
8908 * Hot-Plug event, or because the driver is going to be removed from
8911 static void i40e_remove(struct pci_dev *pdev)
8913 struct i40e_pf *pf = pci_get_drvdata(pdev);
8914 i40e_status ret_code;
8917 i40e_dbg_pf_exit(pf);
8921 /* no more scheduling of any task */
8922 set_bit(__I40E_DOWN, &pf->state);
8923 del_timer_sync(&pf->service_timer);
8924 cancel_work_sync(&pf->service_task);
8926 if (pf->flags & I40E_FLAG_SRIOV_ENABLED) {
8928 pf->flags &= ~I40E_FLAG_SRIOV_ENABLED;
8931 i40e_fdir_teardown(pf);
8933 /* If there is a switch structure or any orphans, remove them.
8934 * This will leave only the PF's VSI remaining.
8936 for (i = 0; i < I40E_MAX_VEB; i++) {
8940 if (pf->veb[i]->uplink_seid == pf->mac_seid ||
8941 pf->veb[i]->uplink_seid == 0)
8942 i40e_switch_branch_release(pf->veb[i]);
8945 /* Now we can shutdown the PF's VSI, just before we kill
8948 if (pf->vsi[pf->lan_vsi])
8949 i40e_vsi_release(pf->vsi[pf->lan_vsi]);
8951 i40e_stop_misc_vector(pf);
8952 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
8953 synchronize_irq(pf->msix_entries[0].vector);
8954 free_irq(pf->msix_entries[0].vector, pf);
8957 /* shutdown and destroy the HMC */
8958 if (pf->hw.hmc.hmc_obj) {
8959 ret_code = i40e_shutdown_lan_hmc(&pf->hw);
8961 dev_warn(&pdev->dev,
8962 "Failed to destroy the HMC resources: %d\n",
8966 /* shutdown the adminq */
8967 ret_code = i40e_shutdown_adminq(&pf->hw);
8969 dev_warn(&pdev->dev,
8970 "Failed to destroy the Admin Queue resources: %d\n",
8973 /* Clear all dynamic memory lists of rings, q_vectors, and VSIs */
8974 i40e_clear_interrupt_scheme(pf);
8975 for (i = 0; i < pf->num_alloc_vsi; i++) {
8977 i40e_vsi_clear_rings(pf->vsi[i]);
8978 i40e_vsi_clear(pf->vsi[i]);
8983 for (i = 0; i < I40E_MAX_VEB; i++) {
8989 kfree(pf->irq_pile);
8992 iounmap(pf->hw.hw_addr);
8994 pci_release_selected_regions(pdev,
8995 pci_select_bars(pdev, IORESOURCE_MEM));
8997 pci_disable_pcie_error_reporting(pdev);
8998 pci_disable_device(pdev);
9002 * i40e_pci_error_detected - warning that something funky happened in PCI land
9003 * @pdev: PCI device information struct
9005 * Called to warn that something happened and the error handling steps
9006 * are in progress. Allows the driver to quiesce things, be ready for
9009 static pci_ers_result_t i40e_pci_error_detected(struct pci_dev *pdev,
9010 enum pci_channel_state error)
9012 struct i40e_pf *pf = pci_get_drvdata(pdev);
9014 dev_info(&pdev->dev, "%s: error %d\n", __func__, error);
9016 /* shutdown all operations */
9017 if (!test_bit(__I40E_SUSPENDED, &pf->state)) {
9019 i40e_prep_for_reset(pf);
9023 /* Request a slot reset */
9024 return PCI_ERS_RESULT_NEED_RESET;
9028 * i40e_pci_error_slot_reset - a PCI slot reset just happened
9029 * @pdev: PCI device information struct
9031 * Called to find if the driver can work with the device now that
9032 * the pci slot has been reset. If a basic connection seems good
9033 * (registers are readable and have sane content) then return a
9034 * happy little PCI_ERS_RESULT_xxx.
9036 static pci_ers_result_t i40e_pci_error_slot_reset(struct pci_dev *pdev)
9038 struct i40e_pf *pf = pci_get_drvdata(pdev);
9039 pci_ers_result_t result;
9043 dev_info(&pdev->dev, "%s\n", __func__);
9044 if (pci_enable_device_mem(pdev)) {
9045 dev_info(&pdev->dev,
9046 "Cannot re-enable PCI device after reset.\n");
9047 result = PCI_ERS_RESULT_DISCONNECT;
9049 pci_set_master(pdev);
9050 pci_restore_state(pdev);
9051 pci_save_state(pdev);
9052 pci_wake_from_d3(pdev, false);
9054 reg = rd32(&pf->hw, I40E_GLGEN_RTRIG);
9056 result = PCI_ERS_RESULT_RECOVERED;
9058 result = PCI_ERS_RESULT_DISCONNECT;
9061 err = pci_cleanup_aer_uncorrect_error_status(pdev);
9063 dev_info(&pdev->dev,
9064 "pci_cleanup_aer_uncorrect_error_status failed 0x%0x\n",
9066 /* non-fatal, continue */
9073 * i40e_pci_error_resume - restart operations after PCI error recovery
9074 * @pdev: PCI device information struct
9076 * Called to allow the driver to bring things back up after PCI error
9077 * and/or reset recovery has finished.
9079 static void i40e_pci_error_resume(struct pci_dev *pdev)
9081 struct i40e_pf *pf = pci_get_drvdata(pdev);
9083 dev_info(&pdev->dev, "%s\n", __func__);
9084 if (test_bit(__I40E_SUSPENDED, &pf->state))
9088 i40e_handle_reset_warning(pf);
9093 * i40e_shutdown - PCI callback for shutting down
9094 * @pdev: PCI device information struct
9096 static void i40e_shutdown(struct pci_dev *pdev)
9098 struct i40e_pf *pf = pci_get_drvdata(pdev);
9099 struct i40e_hw *hw = &pf->hw;
9101 set_bit(__I40E_SUSPENDED, &pf->state);
9102 set_bit(__I40E_DOWN, &pf->state);
9104 i40e_prep_for_reset(pf);
9107 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
9108 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
9110 if (system_state == SYSTEM_POWER_OFF) {
9111 pci_wake_from_d3(pdev, pf->wol_en);
9112 pci_set_power_state(pdev, PCI_D3hot);
9118 * i40e_suspend - PCI callback for moving to D3
9119 * @pdev: PCI device information struct
9121 static int i40e_suspend(struct pci_dev *pdev, pm_message_t state)
9123 struct i40e_pf *pf = pci_get_drvdata(pdev);
9124 struct i40e_hw *hw = &pf->hw;
9126 set_bit(__I40E_SUSPENDED, &pf->state);
9127 set_bit(__I40E_DOWN, &pf->state);
9129 i40e_prep_for_reset(pf);
9132 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
9133 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
9135 pci_wake_from_d3(pdev, pf->wol_en);
9136 pci_set_power_state(pdev, PCI_D3hot);
9142 * i40e_resume - PCI callback for waking up from D3
9143 * @pdev: PCI device information struct
9145 static int i40e_resume(struct pci_dev *pdev)
9147 struct i40e_pf *pf = pci_get_drvdata(pdev);
9150 pci_set_power_state(pdev, PCI_D0);
9151 pci_restore_state(pdev);
9152 /* pci_restore_state() clears dev->state_saves, so
9153 * call pci_save_state() again to restore it.
9155 pci_save_state(pdev);
9157 err = pci_enable_device_mem(pdev);
9160 "%s: Cannot enable PCI device from suspend\n",
9164 pci_set_master(pdev);
9166 /* no wakeup events while running */
9167 pci_wake_from_d3(pdev, false);
9169 /* handling the reset will rebuild the device state */
9170 if (test_and_clear_bit(__I40E_SUSPENDED, &pf->state)) {
9171 clear_bit(__I40E_DOWN, &pf->state);
9173 i40e_reset_and_rebuild(pf, false);
9181 static const struct pci_error_handlers i40e_err_handler = {
9182 .error_detected = i40e_pci_error_detected,
9183 .slot_reset = i40e_pci_error_slot_reset,
9184 .resume = i40e_pci_error_resume,
9187 static struct pci_driver i40e_driver = {
9188 .name = i40e_driver_name,
9189 .id_table = i40e_pci_tbl,
9190 .probe = i40e_probe,
9191 .remove = i40e_remove,
9193 .suspend = i40e_suspend,
9194 .resume = i40e_resume,
9196 .shutdown = i40e_shutdown,
9197 .err_handler = &i40e_err_handler,
9198 .sriov_configure = i40e_pci_sriov_configure,
9202 * i40e_init_module - Driver registration routine
9204 * i40e_init_module is the first routine called when the driver is
9205 * loaded. All it does is register with the PCI subsystem.
9207 static int __init i40e_init_module(void)
9209 pr_info("%s: %s - version %s\n", i40e_driver_name,
9210 i40e_driver_string, i40e_driver_version_str);
9211 pr_info("%s: %s\n", i40e_driver_name, i40e_copyright);
9213 return pci_register_driver(&i40e_driver);
9215 module_init(i40e_init_module);
9218 * i40e_exit_module - Driver exit cleanup routine
9220 * i40e_exit_module is called just before the driver is removed
9223 static void __exit i40e_exit_module(void)
9225 pci_unregister_driver(&i40e_driver);
9228 module_exit(i40e_exit_module);