1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Copyright (c) 2018, Intel Corporation. */
7 #include <linux/types.h>
8 #include <linux/errno.h>
9 #include <linux/kernel.h>
10 #include <linux/module.h>
11 #include <linux/firmware.h>
12 #include <linux/netdevice.h>
13 #include <linux/compiler.h>
14 #include <linux/etherdevice.h>
15 #include <linux/skbuff.h>
16 #include <linux/cpumask.h>
17 #include <linux/rtnetlink.h>
18 #include <linux/if_vlan.h>
19 #include <linux/dma-mapping.h>
20 #include <linux/pci.h>
21 #include <linux/workqueue.h>
22 #include <linux/wait.h>
23 #include <linux/aer.h>
24 #include <linux/interrupt.h>
25 #include <linux/ethtool.h>
26 #include <linux/timer.h>
27 #include <linux/delay.h>
28 #include <linux/bitmap.h>
29 #include <linux/log2.h>
31 #include <linux/sctp.h>
32 #include <linux/ipv6.h>
33 #include <linux/pkt_sched.h>
34 #include <linux/if_bridge.h>
35 #include <linux/ctype.h>
36 #include <linux/bpf.h>
37 #include <linux/btf.h>
38 #include <linux/auxiliary_bus.h>
39 #include <linux/avf/virtchnl.h>
40 #include <linux/cpu_rmap.h>
41 #include <linux/dim.h>
42 #include <net/pkt_cls.h>
43 #include <net/tc_act/tc_mirred.h>
44 #include <net/tc_act/tc_gact.h>
46 #include <net/devlink.h>
48 #include <net/xdp_sock.h>
49 #include <net/xdp_sock_drv.h>
50 #include <net/geneve.h>
52 #include <net/udp_tunnel.h>
53 #include <net/vxlan.h>
54 #if IS_ENABLED(CONFIG_DCB)
55 #include <scsi/iscsi_proto.h>
56 #endif /* CONFIG_DCB */
57 #include "ice_devids.h"
61 #include "ice_switch.h"
62 #include "ice_common.h"
64 #include "ice_sched.h"
65 #include "ice_idc_int.h"
66 #include "ice_virtchnl_pf.h"
67 #include "ice_sriov.h"
73 #include "ice_eswitch.h"
75 #include "ice_vsi_vlan_ops.h"
78 #define ICE_REQ_DESC_MULTIPLE 32
79 #define ICE_MIN_NUM_DESC 64
80 #define ICE_MAX_NUM_DESC 8160
81 #define ICE_DFLT_MIN_RX_DESC 512
82 #define ICE_DFLT_NUM_TX_DESC 256
83 #define ICE_DFLT_NUM_RX_DESC 2048
85 #define ICE_DFLT_TRAFFIC_CLASS BIT(0)
86 #define ICE_INT_NAME_STR_LEN (IFNAMSIZ + 16)
87 #define ICE_AQ_LEN 192
88 #define ICE_MBXSQ_LEN 64
89 #define ICE_SBQ_LEN 64
90 #define ICE_MIN_LAN_TXRX_MSIX 1
91 #define ICE_MIN_LAN_OICR_MSIX 1
92 #define ICE_MIN_MSIX (ICE_MIN_LAN_TXRX_MSIX + ICE_MIN_LAN_OICR_MSIX)
93 #define ICE_FDIR_MSIX 2
94 #define ICE_RDMA_NUM_AEQ_MSIX 4
95 #define ICE_MIN_RDMA_MSIX 2
96 #define ICE_ESWITCH_MSIX 1
97 #define ICE_NO_VSI 0xffff
98 #define ICE_VSI_MAP_CONTIG 0
99 #define ICE_VSI_MAP_SCATTER 1
100 #define ICE_MAX_SCATTER_TXQS 16
101 #define ICE_MAX_SCATTER_RXQS 16
102 #define ICE_Q_WAIT_RETRY_LIMIT 10
103 #define ICE_Q_WAIT_MAX_RETRY (5 * ICE_Q_WAIT_RETRY_LIMIT)
104 #define ICE_MAX_LG_RSS_QS 256
105 #define ICE_RES_VALID_BIT 0x8000
106 #define ICE_RES_MISC_VEC_ID (ICE_RES_VALID_BIT - 1)
107 #define ICE_RES_RDMA_VEC_ID (ICE_RES_MISC_VEC_ID - 1)
108 /* All VF control VSIs share the same IRQ, so assign a unique ID for them */
109 #define ICE_RES_VF_CTRL_VEC_ID (ICE_RES_RDMA_VEC_ID - 1)
110 #define ICE_INVAL_Q_INDEX 0xffff
111 #define ICE_INVAL_VFID 256
113 #define ICE_MAX_RXQS_PER_TC 256 /* Used when setting VSI context per TC Rx queues */
115 #define ICE_CHNL_START_TC 1
117 #define ICE_MAX_RESET_WAIT 20
119 #define ICE_VSIQF_HKEY_ARRAY_SIZE ((VSIQF_HKEY_MAX_INDEX + 1) * 4)
121 #define ICE_DFLT_NETIF_M (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_LINK)
123 #define ICE_MAX_MTU (ICE_AQ_SET_MAC_FRAME_SIZE_MAX - ICE_ETH_PKT_HDR_PAD)
125 #define ICE_UP_TABLE_TRANSLATE(val, i) \
126 (((val) << ICE_AQ_VSI_UP_TABLE_UP##i##_S) & \
127 ICE_AQ_VSI_UP_TABLE_UP##i##_M)
129 #define ICE_TX_DESC(R, i) (&(((struct ice_tx_desc *)((R)->desc))[i]))
130 #define ICE_RX_DESC(R, i) (&(((union ice_32b_rx_flex_desc *)((R)->desc))[i]))
131 #define ICE_TX_CTX_DESC(R, i) (&(((struct ice_tx_ctx_desc *)((R)->desc))[i]))
132 #define ICE_TX_FDIRDESC(R, i) (&(((struct ice_fltr_desc *)((R)->desc))[i]))
134 /* Minimum BW limit is 500 Kbps for any scheduler node */
135 #define ICE_MIN_BW_LIMIT 500
136 /* User can specify BW in either Kbit/Mbit/Gbit and OS converts it in bytes.
137 * use it to convert user specified BW limit into Kbps
139 #define ICE_BW_KBPS_DIVISOR 125
141 /* Macro for each VSI in a PF */
142 #define ice_for_each_vsi(pf, i) \
143 for ((i) = 0; (i) < (pf)->num_alloc_vsi; (i)++)
145 /* Macros for each Tx/Xdp/Rx ring in a VSI */
146 #define ice_for_each_txq(vsi, i) \
147 for ((i) = 0; (i) < (vsi)->num_txq; (i)++)
149 #define ice_for_each_xdp_txq(vsi, i) \
150 for ((i) = 0; (i) < (vsi)->num_xdp_txq; (i)++)
152 #define ice_for_each_rxq(vsi, i) \
153 for ((i) = 0; (i) < (vsi)->num_rxq; (i)++)
155 /* Macros for each allocated Tx/Rx ring whether used or not in a VSI */
156 #define ice_for_each_alloc_txq(vsi, i) \
157 for ((i) = 0; (i) < (vsi)->alloc_txq; (i)++)
159 #define ice_for_each_alloc_rxq(vsi, i) \
160 for ((i) = 0; (i) < (vsi)->alloc_rxq; (i)++)
162 #define ice_for_each_q_vector(vsi, i) \
163 for ((i) = 0; (i) < (vsi)->num_q_vectors; (i)++)
165 #define ice_for_each_chnl_tc(i) \
166 for ((i) = ICE_CHNL_START_TC; (i) < ICE_CHNL_MAX_TC; (i)++)
168 #define ICE_UCAST_PROMISC_BITS (ICE_PROMISC_UCAST_TX | ICE_PROMISC_UCAST_RX)
170 #define ICE_UCAST_VLAN_PROMISC_BITS (ICE_PROMISC_UCAST_TX | \
171 ICE_PROMISC_UCAST_RX | \
172 ICE_PROMISC_VLAN_TX | \
175 #define ICE_MCAST_PROMISC_BITS (ICE_PROMISC_MCAST_TX | ICE_PROMISC_MCAST_RX)
177 #define ICE_MCAST_VLAN_PROMISC_BITS (ICE_PROMISC_MCAST_TX | \
178 ICE_PROMISC_MCAST_RX | \
179 ICE_PROMISC_VLAN_TX | \
182 #define ice_pf_to_dev(pf) (&((pf)->pdev->dev))
190 DECLARE_STATIC_KEY_FALSE(ice_xdp_locking_key);
193 struct list_head list;
201 struct ice_aqc_vsi_props info;
204 atomic_t num_sb_fltr;
205 struct ice_vsi *ch_vsi;
208 struct ice_txq_meta {
209 u32 q_teid; /* Tx-scheduler element identifier */
210 u16 q_id; /* Entry in VSI's txq_map bitmap */
211 u16 q_handle; /* Relative index of Tx queue within TC */
212 u16 vsi_idx; /* VSI index that Tx queue belongs to */
213 u8 tc; /* TC number that Tx queue belongs to */
224 u8 numtc; /* Total number of enabled TCs */
225 u16 ena_tc; /* Tx map */
226 struct ice_tc_info tc_info[ICE_MAX_TRAFFIC_CLASS];
229 struct ice_res_tracker {
236 struct mutex *qs_mutex; /* will be assigned to &pf->avail_q_mutex */
237 unsigned long *pf_map;
238 unsigned long pf_map_size;
239 unsigned int q_count;
240 unsigned int scatter_count;
248 u16 sw_id; /* switch ID for this switch */
249 u16 bridge_mode; /* VEB/VEPA/Port Virtualizer */
250 struct ice_vsi *dflt_vsi; /* default VSI for this switch */
251 u8 dflt_vsi_ena:1; /* true if above dflt_vsi is enabled */
258 ICE_PREPARED_FOR_RESET, /* set by driver when prepared */
259 ICE_RESET_OICR_RECV, /* set by driver after rcv reset OICR */
260 ICE_PFR_REQ, /* set by driver */
261 ICE_CORER_REQ, /* set by driver */
262 ICE_GLOBR_REQ, /* set by driver */
263 ICE_CORER_RECV, /* set by OICR handler */
264 ICE_GLOBR_RECV, /* set by OICR handler */
265 ICE_EMPR_RECV, /* set by OICR handler */
266 ICE_SUSPENDED, /* set on module remove path */
267 ICE_RESET_FAILED, /* set by reset/rebuild */
268 /* When checking for the PF to be in a nominal operating state, the
269 * bits that are grouped at the beginning of the list need to be
270 * checked. Bits occurring before ICE_STATE_NOMINAL_CHECK_BITS will
271 * be checked. If you need to add a bit into consideration for nominal
272 * operating state, it must be added before
273 * ICE_STATE_NOMINAL_CHECK_BITS. Do not move this entry's position
274 * without appropriate consideration.
276 ICE_STATE_NOMINAL_CHECK_BITS,
277 ICE_ADMINQ_EVENT_PENDING,
278 ICE_MAILBOXQ_EVENT_PENDING,
279 ICE_SIDEBANDQ_EVENT_PENDING,
280 ICE_MDD_EVENT_PENDING,
281 ICE_VFLR_EVENT_PENDING,
282 ICE_FLTR_OVERFLOW_PROMISC,
284 ICE_VF_DEINIT_IN_PROGRESS,
289 ICE_OICR_INTR_DIS, /* Global OICR interrupt disabled */
290 ICE_MDD_VF_PRINT_PENDING, /* set when MDD event handle */
291 ICE_VF_RESETS_DISABLED, /* disable resets during ice_remove */
292 ICE_LINK_DEFAULT_OVERRIDE_PENDING,
293 ICE_PHY_INIT_COMPLETE,
294 ICE_FD_VF_FLUSH_CTX, /* set at FD Rx IRQ or timeout */
295 ICE_STATE_NBITS /* must be last */
300 ICE_VSI_NEEDS_RESTART,
301 ICE_VSI_NETDEV_ALLOCD,
302 ICE_VSI_NETDEV_REGISTERED,
303 ICE_VSI_UMAC_FLTR_CHANGED,
304 ICE_VSI_MMAC_FLTR_CHANGED,
305 ICE_VSI_VLAN_FLTR_CHANGED,
306 ICE_VSI_PROMISC_CHANGED,
307 ICE_VSI_STATE_NBITS /* must be last */
310 /* struct that defines a VSI, associated with a dev */
312 struct net_device *netdev;
313 struct ice_sw *vsw; /* switch this VSI is on */
314 struct ice_pf *back; /* back pointer to PF */
315 struct ice_port_info *port_info; /* back pointer to port_info */
316 struct ice_rx_ring **rx_rings; /* Rx ring array */
317 struct ice_tx_ring **tx_rings; /* Tx ring array */
318 struct ice_q_vector **q_vectors; /* q_vector array */
320 irqreturn_t (*irq_handler)(int irq, void *data);
323 DECLARE_BITMAP(state, ICE_VSI_STATE_NBITS);
324 unsigned int current_netdev_flags;
330 u16 base_vector; /* IRQ base for OS reserved vectors */
331 enum ice_vsi_type type;
332 u16 vsi_num; /* HW (absolute) index of this VSI */
333 u16 idx; /* software index in pf->vsi[] */
335 s16 vf_id; /* VF ID for SR-IOV VSIs */
337 u16 ethtype; /* Ethernet protocol for pause frame */
342 u16 rss_table_size; /* HW RSS table size */
343 u16 rss_size; /* Allocated RSS queues */
344 u8 *rss_hkey_user; /* User configured hash keys */
345 u8 *rss_lut_user; /* User configured lookup table entries */
346 u8 rss_lut_type; /* used to configure Get/Set RSS LUT AQ call */
348 /* aRFS members only allocated for the PF VSI */
349 #define ICE_MAX_ARFS_LIST 1024
350 #define ICE_ARFS_LST_MASK (ICE_MAX_ARFS_LIST - 1)
351 struct hlist_head *arfs_fltr_list;
352 struct ice_arfs_active_fltr_cntrs *arfs_fltr_cntrs;
353 spinlock_t arfs_lock; /* protects aRFS hash table and filter state */
354 atomic_t *arfs_last_fltr_id;
359 struct ice_aqc_vsi_props info; /* VSI properties */
362 struct rtnl_link_stats64 net_stats;
363 struct ice_eth_stats eth_stats;
364 struct ice_eth_stats eth_stats_prev;
366 struct list_head tmp_sync_list; /* MAC filters to be synced */
367 struct list_head tmp_unsync_list; /* MAC filters to be unsynced */
370 u8 current_isup:1; /* Sync 'link up' logging */
371 u8 stat_offsets_loaded:1;
372 struct ice_vsi_vlan_ops inner_vlan_ops;
373 struct ice_vsi_vlan_ops outer_vlan_ops;
376 /* queue information */
377 u8 tx_mapping_mode; /* ICE_MAP_MODE_[CONTIG|SCATTER] */
378 u8 rx_mapping_mode; /* ICE_MAP_MODE_[CONTIG|SCATTER] */
379 u16 *txq_map; /* index in pf->avail_txqs */
380 u16 *rxq_map; /* index in pf->avail_rxqs */
381 u16 alloc_txq; /* Allocated Tx queues */
382 u16 num_txq; /* Used Tx queues */
383 u16 alloc_rxq; /* Allocated Rx queues */
384 u16 num_rxq; /* Used Rx queues */
385 u16 req_txq; /* User requested Tx queues */
386 u16 req_rxq; /* User requested Rx queues */
389 u16 qset_handle[ICE_MAX_TRAFFIC_CLASS];
390 struct ice_tc_cfg tc_cfg;
391 struct bpf_prog *xdp_prog;
392 struct ice_tx_ring **xdp_rings; /* XDP ring array */
393 unsigned long *af_xdp_zc_qps; /* tracks AF_XDP ZC enabled qps */
394 u16 num_xdp_txq; /* Used XDP queues */
395 u8 xdp_mapping_mode; /* ICE_MAP_MODE_[CONTIG|SCATTER] */
397 struct net_device **target_netdevs;
399 struct tc_mqprio_qopt_offload mqprio_qopt; /* queue parameters */
401 /* Channel Specific Fields */
402 struct ice_vsi *tc_map_vsi[ICE_CHNL_MAX_TC];
404 u16 next_base_q; /* next queue to be used for channel setup */
405 struct list_head ch_list;
410 /* store away rss size info before configuring ADQ channels so that,
411 * it can be used after tc-qdisc delete, to get back RSS setting as
415 /* this keeps tracks of all enabled TC with and without DCB
416 * and inclusive of ADQ, vsi->mqprio_opt keeps track of queue
422 /* store away TC info, to be used for rebuild logic */
426 struct ice_channel *ch;
428 /* setup back reference, to which aggregator node this VSI
431 struct ice_agg_node *agg_node;
432 } ____cacheline_internodealigned_in_smp;
434 /* struct that defines an interrupt vector */
435 struct ice_q_vector {
438 u16 v_idx; /* index in the vsi->q_vector array. */
440 u8 num_ring_rx; /* total number of Rx rings in vector */
441 u8 num_ring_tx; /* total number of Tx rings in vector */
442 u8 wb_on_itr:1; /* if true, WB on ITR is enabled */
443 /* in usecs, need to use ice_intrl_to_usecs_reg() before writing this
444 * value to the device
448 struct napi_struct napi;
450 struct ice_ring_container rx;
451 struct ice_ring_container tx;
453 cpumask_t affinity_mask;
454 struct irq_affinity_notify affinity_notify;
456 struct ice_channel *ch;
458 char name[ICE_INT_NAME_STR_LEN];
460 u16 total_events; /* net_dim(): number of interrupts processed */
461 } ____cacheline_internodealigned_in_smp;
468 ICE_FLAG_SRIOV_CAPABLE,
469 ICE_FLAG_DCB_CAPABLE,
472 ICE_FLAG_PTP_SUPPORTED, /* PTP is supported by NVM */
473 ICE_FLAG_PTP, /* PTP is enabled by software */
475 ICE_FLAG_ADV_FEATURES,
476 ICE_FLAG_TC_MQPRIO, /* support for Multi queue TC */
478 ICE_FLAG_LINK_DOWN_ON_CLOSE_ENA,
479 ICE_FLAG_TOTAL_PORT_SHUTDOWN_ENA,
481 ICE_FLAG_FW_LLDP_AGENT,
482 ICE_FLAG_MOD_POWER_UNSUPPORTED,
483 ICE_FLAG_PHY_FW_LOAD_FAILED,
484 ICE_FLAG_ETHTOOL_CTXT, /* set when ethtool holds RTNL lock */
486 ICE_FLAG_VF_TRUE_PROMISC_ENA,
487 ICE_FLAG_MDD_AUTO_RESET_VF,
488 ICE_FLAG_VF_VLAN_PRUNING,
489 ICE_FLAG_LINK_LENIENT_MODE_ENA,
490 ICE_FLAG_PLUG_AUX_DEV,
491 ICE_PF_FLAGS_NBITS /* must be last */
494 struct ice_switchdev_info {
495 struct ice_vsi *control_vsi;
496 struct ice_vsi *uplink_vsi;
500 struct ice_agg_node {
502 #define ICE_MAX_VSIS_IN_AGG_NODE 64
508 struct pci_dev *pdev;
510 struct devlink_region *nvm_region;
511 struct devlink_region *sram_region;
512 struct devlink_region *devcaps_region;
514 /* devlink port data */
515 struct devlink_port devlink_port;
517 /* OS reserved IRQ details */
518 struct msix_entry *msix_entries;
519 struct ice_res_tracker *irq_tracker;
520 /* First MSIX vector used by SR-IOV VFs. Calculated by subtracting the
521 * number of MSIX vectors needed for all SR-IOV VFs from the number of
522 * MSIX vectors allowed on this PF.
524 u16 sriov_base_vector;
526 u16 ctrl_vsi_idx; /* control VSI index in pf->vsi array */
528 struct ice_vsi **vsi; /* VSIs created by the driver */
529 struct ice_sw *first_sw; /* first switch created by firmware */
530 u16 eswitch_mode; /* current mode of eswitch */
531 /* Virtchnl/SR-IOV config info */
533 u16 num_alloc_vfs; /* actual number of VFs allocated */
534 u16 num_vfs_supported; /* num VFs supported for this PF */
537 /* used to ratelimit the MDD event logging */
538 unsigned long last_printed_mdd_jiffies;
539 DECLARE_BITMAP(malvfs, ICE_MAX_VF_COUNT);
540 DECLARE_BITMAP(features, ICE_F_MAX);
541 DECLARE_BITMAP(state, ICE_STATE_NBITS);
542 DECLARE_BITMAP(flags, ICE_PF_FLAGS_NBITS);
543 unsigned long *avail_txqs; /* bitmap to track PF Tx queue usage */
544 unsigned long *avail_rxqs; /* bitmap to track PF Rx queue usage */
545 unsigned long serv_tmr_period;
546 unsigned long serv_tmr_prev;
547 struct timer_list serv_tmr;
548 struct work_struct serv_task;
549 struct mutex avail_q_mutex; /* protects access to avail_[rx|tx]qs */
550 struct mutex sw_mutex; /* lock for protecting VSI alloc flow */
551 struct mutex tc_mutex; /* lock to protect TC changes */
554 u16 num_rdma_msix; /* Total MSIX vectors for RDMA driver */
555 u16 rdma_base_vector;
557 /* spinlock to protect the AdminQ wait list */
558 spinlock_t aq_wait_lock;
559 struct hlist_head aq_wait_list;
560 wait_queue_head_t aq_wait_queue;
561 bool fw_emp_reset_disabled;
563 wait_queue_head_t reset_wait_queue;
565 u32 hw_csum_rx_error;
566 u16 oicr_idx; /* Other interrupt cause MSIX vector index */
567 u16 num_avail_sw_msix; /* remaining MSIX SW vectors left unclaimed */
568 u16 max_pf_txqs; /* Total Tx queues PF wide */
569 u16 max_pf_rxqs; /* Total Rx queues PF wide */
570 u16 num_lan_msix; /* Total MSIX vectors for base driver */
571 u16 num_lan_tx; /* num LAN Tx queues setup */
572 u16 num_lan_rx; /* num LAN Rx queues setup */
573 u16 next_vsi; /* Next free slot in pf->vsi[] - 0-based! */
575 u16 corer_count; /* Core reset count */
576 u16 globr_count; /* Global reset count */
577 u16 empr_count; /* EMP reset count */
578 u16 pfr_count; /* PF reset count */
580 u8 wol_ena : 1; /* software state of WoL */
581 u32 wakeup_reason; /* last wakeup reason */
582 struct ice_hw_port_stats stats;
583 struct ice_hw_port_stats stats_prev;
585 u8 stat_prev_loaded:1; /* has previous stats been loaded */
588 u32 tx_timeout_count;
589 unsigned long tx_timeout_last_recovery;
590 u32 tx_timeout_recovery_level;
591 char int_name[ICE_INT_NAME_STR_LEN];
592 struct auxiliary_device *adev;
595 /* count of tc_flower filters specific to channel (aka where filter
596 * action is "hw_tc <tc_num>")
598 u16 num_dmac_chnl_fltrs;
599 struct hlist_head tc_flower_fltr_list;
601 __le64 nvm_phy_type_lo; /* NVM PHY type low */
602 __le64 nvm_phy_type_hi; /* NVM PHY type high */
603 struct ice_link_default_override_tlv link_dflt_override;
604 struct ice_lag *lag; /* Link Aggregation information */
606 struct ice_switchdev_info switchdev;
608 #define ICE_INVALID_AGG_NODE_ID 0
609 #define ICE_PF_AGG_NODE_ID_START 1
610 #define ICE_MAX_PF_AGG_NODES 32
611 struct ice_agg_node pf_agg_node[ICE_MAX_PF_AGG_NODES];
612 #define ICE_VF_AGG_NODE_ID_START 65
613 #define ICE_MAX_VF_AGG_NODES 32
614 struct ice_agg_node vf_agg_node[ICE_MAX_VF_AGG_NODES];
617 struct ice_netdev_priv {
619 struct ice_repr *repr;
620 /* indirect block callbacks on registered higher level devices
621 * (e.g. tunnel devices)
623 * tc_indr_block_cb_priv_list is used to look up indirect callback
626 struct list_head tc_indr_block_priv_list;
630 * ice_vector_ch_enabled
631 * @qv: pointer to q_vector, can be NULL
633 * This function returns true if vector is channel enabled otherwise false
635 static inline bool ice_vector_ch_enabled(struct ice_q_vector *qv)
637 return !!qv->ch; /* Enable it to run with TC */
641 * ice_irq_dynamic_ena - Enable default interrupt generation settings
642 * @hw: pointer to HW struct
643 * @vsi: pointer to VSI struct, can be NULL
644 * @q_vector: pointer to q_vector, can be NULL
647 ice_irq_dynamic_ena(struct ice_hw *hw, struct ice_vsi *vsi,
648 struct ice_q_vector *q_vector)
650 u32 vector = (vsi && q_vector) ? q_vector->reg_idx :
651 ((struct ice_pf *)hw->back)->oicr_idx;
652 int itr = ICE_ITR_NONE;
655 /* clear the PBA here, as this function is meant to clean out all
656 * previous interrupts and enable the interrupt
658 val = GLINT_DYN_CTL_INTENA_M | GLINT_DYN_CTL_CLEARPBA_M |
659 (itr << GLINT_DYN_CTL_ITR_INDX_S);
661 if (test_bit(ICE_VSI_DOWN, vsi->state))
663 wr32(hw, GLINT_DYN_CTL(vector), val);
667 * ice_netdev_to_pf - Retrieve the PF struct associated with a netdev
668 * @netdev: pointer to the netdev struct
670 static inline struct ice_pf *ice_netdev_to_pf(struct net_device *netdev)
672 struct ice_netdev_priv *np = netdev_priv(netdev);
674 return np->vsi->back;
677 static inline bool ice_is_xdp_ena_vsi(struct ice_vsi *vsi)
679 return !!vsi->xdp_prog;
682 static inline void ice_set_ring_xdp(struct ice_tx_ring *ring)
684 ring->flags |= ICE_TX_FLAGS_RING_XDP;
688 * ice_xsk_pool - get XSK buffer pool bound to a ring
689 * @ring: Rx ring to use
691 * Returns a pointer to xdp_umem structure if there is a buffer pool present,
694 static inline struct xsk_buff_pool *ice_xsk_pool(struct ice_rx_ring *ring)
696 struct ice_vsi *vsi = ring->vsi;
697 u16 qid = ring->q_index;
699 if (!ice_is_xdp_ena_vsi(vsi) || !test_bit(qid, vsi->af_xdp_zc_qps))
702 return xsk_get_pool_from_qid(vsi->netdev, qid);
706 * ice_tx_xsk_pool - get XSK buffer pool bound to a ring
707 * @ring: Tx ring to use
709 * Returns a pointer to xdp_umem structure if there is a buffer pool present,
710 * NULL otherwise. Tx equivalent of ice_xsk_pool.
712 static inline struct xsk_buff_pool *ice_tx_xsk_pool(struct ice_tx_ring *ring)
714 struct ice_vsi *vsi = ring->vsi;
717 qid = ring->q_index - vsi->num_xdp_txq;
719 if (!ice_is_xdp_ena_vsi(vsi) || !test_bit(qid, vsi->af_xdp_zc_qps))
722 return xsk_get_pool_from_qid(vsi->netdev, qid);
726 * ice_get_main_vsi - Get the PF VSI
729 * returns pf->vsi[0], which by definition is the PF VSI
731 static inline struct ice_vsi *ice_get_main_vsi(struct ice_pf *pf)
740 * ice_get_netdev_priv_vsi - return VSI associated with netdev priv.
741 * @np: private netdev structure
743 static inline struct ice_vsi *ice_get_netdev_priv_vsi(struct ice_netdev_priv *np)
745 /* In case of port representor return source port VSI. */
747 return np->repr->src_vsi;
753 * ice_get_ctrl_vsi - Get the control VSI
756 static inline struct ice_vsi *ice_get_ctrl_vsi(struct ice_pf *pf)
758 /* if pf->ctrl_vsi_idx is ICE_NO_VSI, control VSI was not set up */
759 if (!pf->vsi || pf->ctrl_vsi_idx == ICE_NO_VSI)
762 return pf->vsi[pf->ctrl_vsi_idx];
766 * ice_is_switchdev_running - check if switchdev is configured
767 * @pf: pointer to PF structure
769 * Returns true if eswitch mode is set to DEVLINK_ESWITCH_MODE_SWITCHDEV
770 * and switchdev is configured, false otherwise.
772 static inline bool ice_is_switchdev_running(struct ice_pf *pf)
774 return pf->switchdev.is_running;
778 * ice_set_sriov_cap - enable SRIOV in PF flags
781 static inline void ice_set_sriov_cap(struct ice_pf *pf)
783 if (pf->hw.func_caps.common_cap.sr_iov_1_1)
784 set_bit(ICE_FLAG_SRIOV_CAPABLE, pf->flags);
788 * ice_clear_sriov_cap - disable SRIOV in PF flags
791 static inline void ice_clear_sriov_cap(struct ice_pf *pf)
793 clear_bit(ICE_FLAG_SRIOV_CAPABLE, pf->flags);
796 #define ICE_FD_STAT_CTR_BLOCK_COUNT 256
797 #define ICE_FD_STAT_PF_IDX(base_idx) \
798 ((base_idx) * ICE_FD_STAT_CTR_BLOCK_COUNT)
799 #define ICE_FD_SB_STAT_IDX(base_idx) ICE_FD_STAT_PF_IDX(base_idx)
800 #define ICE_FD_STAT_CH 1
801 #define ICE_FD_CH_STAT_IDX(base_idx) \
802 (ICE_FD_STAT_PF_IDX(base_idx) + ICE_FD_STAT_CH)
805 * ice_is_adq_active - any active ADQs
808 * This function returns true if there are any ADQs configured (which is
809 * determined by looking at VSI type (which should be VSI_PF), numtc, and
810 * TC_MQPRIO flag) otherwise return false
812 static inline bool ice_is_adq_active(struct ice_pf *pf)
816 vsi = ice_get_main_vsi(pf);
820 /* is ADQ configured */
821 if (vsi->tc_cfg.numtc > ICE_CHNL_START_TC &&
822 test_bit(ICE_FLAG_TC_MQPRIO, pf->flags))
828 bool netif_is_ice(struct net_device *dev);
829 int ice_vsi_setup_tx_rings(struct ice_vsi *vsi);
830 int ice_vsi_setup_rx_rings(struct ice_vsi *vsi);
831 int ice_vsi_open_ctrl(struct ice_vsi *vsi);
832 int ice_vsi_open(struct ice_vsi *vsi);
833 void ice_set_ethtool_ops(struct net_device *netdev);
834 void ice_set_ethtool_repr_ops(struct net_device *netdev);
835 void ice_set_ethtool_safe_mode_ops(struct net_device *netdev);
836 u16 ice_get_avail_txq_count(struct ice_pf *pf);
837 u16 ice_get_avail_rxq_count(struct ice_pf *pf);
838 int ice_vsi_recfg_qs(struct ice_vsi *vsi, int new_rx, int new_tx);
839 void ice_update_vsi_stats(struct ice_vsi *vsi);
840 void ice_update_pf_stats(struct ice_pf *pf);
841 int ice_up(struct ice_vsi *vsi);
842 int ice_down(struct ice_vsi *vsi);
843 int ice_vsi_cfg(struct ice_vsi *vsi);
844 struct ice_vsi *ice_lb_vsi_setup(struct ice_pf *pf, struct ice_port_info *pi);
845 int ice_vsi_determine_xdp_res(struct ice_vsi *vsi);
846 int ice_prepare_xdp_rings(struct ice_vsi *vsi, struct bpf_prog *prog);
847 int ice_destroy_xdp_rings(struct ice_vsi *vsi);
849 ice_xdp_xmit(struct net_device *dev, int n, struct xdp_frame **frames,
851 int ice_set_rss_lut(struct ice_vsi *vsi, u8 *lut, u16 lut_size);
852 int ice_get_rss_lut(struct ice_vsi *vsi, u8 *lut, u16 lut_size);
853 int ice_set_rss_key(struct ice_vsi *vsi, u8 *seed);
854 int ice_get_rss_key(struct ice_vsi *vsi, u8 *seed);
855 void ice_fill_rss_lut(u8 *lut, u16 rss_table_size, u16 rss_size);
856 int ice_schedule_reset(struct ice_pf *pf, enum ice_reset_req reset);
857 void ice_print_link_msg(struct ice_vsi *vsi, bool isup);
858 int ice_plug_aux_dev(struct ice_pf *pf);
859 void ice_unplug_aux_dev(struct ice_pf *pf);
860 int ice_init_rdma(struct ice_pf *pf);
861 const char *ice_aq_str(enum ice_aq_err aq_err);
862 bool ice_is_wol_supported(struct ice_hw *hw);
863 void ice_fdir_del_all_fltrs(struct ice_vsi *vsi);
865 ice_fdir_write_fltr(struct ice_pf *pf, struct ice_fdir_fltr *input, bool add,
867 void ice_vsi_manage_fdir(struct ice_vsi *vsi, bool ena);
868 int ice_add_fdir_ethtool(struct ice_vsi *vsi, struct ethtool_rxnfc *cmd);
869 int ice_del_fdir_ethtool(struct ice_vsi *vsi, struct ethtool_rxnfc *cmd);
870 int ice_get_ethtool_fdir_entry(struct ice_hw *hw, struct ethtool_rxnfc *cmd);
872 ice_get_fdir_fltr_ids(struct ice_hw *hw, struct ethtool_rxnfc *cmd,
874 void ice_fdir_rem_adq_chnl(struct ice_hw *hw, u16 vsi_idx);
875 void ice_fdir_release_flows(struct ice_hw *hw);
876 void ice_fdir_replay_flows(struct ice_hw *hw);
877 void ice_fdir_replay_fltrs(struct ice_pf *pf);
878 int ice_fdir_create_dflt_rules(struct ice_pf *pf);
879 int ice_aq_wait_for_event(struct ice_pf *pf, u16 opcode, unsigned long timeout,
880 struct ice_rq_event_info *event);
881 int ice_open(struct net_device *netdev);
882 int ice_open_internal(struct net_device *netdev);
883 int ice_stop(struct net_device *netdev);
884 void ice_service_task_schedule(struct ice_pf *pf);
887 * ice_set_rdma_cap - enable RDMA support
890 static inline void ice_set_rdma_cap(struct ice_pf *pf)
892 if (pf->hw.func_caps.common_cap.rdma && pf->num_rdma_msix) {
893 set_bit(ICE_FLAG_RDMA_ENA, pf->flags);
894 set_bit(ICE_FLAG_AUX_ENA, pf->flags);
895 set_bit(ICE_FLAG_PLUG_AUX_DEV, pf->flags);
900 * ice_clear_rdma_cap - disable RDMA support
903 static inline void ice_clear_rdma_cap(struct ice_pf *pf)
905 ice_unplug_aux_dev(pf);
906 clear_bit(ICE_FLAG_RDMA_ENA, pf->flags);
907 clear_bit(ICE_FLAG_AUX_ENA, pf->flags);