1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 1999 - 2018 Intel Corporation. */
4 #include <linux/types.h>
5 #include <linux/module.h>
7 #include <linux/netdevice.h>
8 #include <linux/vmalloc.h>
9 #include <linux/string.h>
11 #include <linux/interrupt.h>
13 #include <linux/tcp.h>
14 #include <linux/sctp.h>
15 #include <linux/pkt_sched.h>
16 #include <linux/ipv6.h>
17 #include <linux/slab.h>
18 #include <net/checksum.h>
19 #include <net/ip6_checksum.h>
20 #include <linux/etherdevice.h>
21 #include <linux/ethtool.h>
23 #include <linux/if_vlan.h>
24 #include <linux/if_macvlan.h>
25 #include <linux/if_bridge.h>
26 #include <linux/prefetch.h>
27 #include <linux/bpf.h>
28 #include <linux/bpf_trace.h>
29 #include <linux/atomic.h>
30 #include <scsi/fc/fc_fcoe.h>
31 #include <net/udp_tunnel.h>
32 #include <net/pkt_cls.h>
33 #include <net/tc_act/tc_gact.h>
34 #include <net/tc_act/tc_mirred.h>
35 #include <net/vxlan.h>
37 #include <net/xdp_sock.h>
40 #include "ixgbe_common.h"
41 #include "ixgbe_dcb_82599.h"
42 #include "ixgbe_phy.h"
43 #include "ixgbe_sriov.h"
44 #include "ixgbe_model.h"
45 #include "ixgbe_txrx_common.h"
47 char ixgbe_driver_name[] = "ixgbe";
48 static const char ixgbe_driver_string[] =
49 "Intel(R) 10 Gigabit PCI Express Network Driver";
51 char ixgbe_default_device_descr[] =
52 "Intel(R) 10 Gigabit Network Connection";
54 static char ixgbe_default_device_descr[] =
55 "Intel(R) 10 Gigabit Network Connection";
57 #define DRV_VERSION "5.1.0-k"
58 const char ixgbe_driver_version[] = DRV_VERSION;
59 static const char ixgbe_copyright[] =
60 "Copyright (c) 1999-2016 Intel Corporation.";
62 static const char ixgbe_overheat_msg[] = "Network adapter has been stopped because it has over heated. Restart the computer. If the problem persists, power off the system and replace the adapter";
64 static const struct ixgbe_info *ixgbe_info_tbl[] = {
65 [board_82598] = &ixgbe_82598_info,
66 [board_82599] = &ixgbe_82599_info,
67 [board_X540] = &ixgbe_X540_info,
68 [board_X550] = &ixgbe_X550_info,
69 [board_X550EM_x] = &ixgbe_X550EM_x_info,
70 [board_x550em_x_fw] = &ixgbe_x550em_x_fw_info,
71 [board_x550em_a] = &ixgbe_x550em_a_info,
72 [board_x550em_a_fw] = &ixgbe_x550em_a_fw_info,
75 /* ixgbe_pci_tbl - PCI Device ID Table
77 * Wildcard entries (PCI_ANY_ID) should come last
78 * Last entry must be all 0s
80 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
81 * Class, Class Mask, private data (not used) }
83 static const struct pci_device_id ixgbe_pci_tbl[] = {
84 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598), board_82598 },
85 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_DUAL_PORT), board_82598 },
86 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_SINGLE_PORT), board_82598 },
87 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT), board_82598 },
88 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT2), board_82598 },
89 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_CX4), board_82598 },
90 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_CX4_DUAL_PORT), board_82598 },
91 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_DA_DUAL_PORT), board_82598 },
92 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM), board_82598 },
93 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_XF_LR), board_82598 },
94 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_SFP_LOM), board_82598 },
95 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_BX), board_82598 },
96 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KX4), board_82599 },
97 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_XAUI_LOM), board_82599 },
98 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KR), board_82599 },
99 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP), board_82599 },
100 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_EM), board_82599 },
101 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KX4_MEZZ), board_82599 },
102 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_CX4), board_82599 },
103 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_BACKPLANE_FCOE), board_82599 },
104 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_FCOE), board_82599 },
105 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_T3_LOM), board_82599 },
106 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_COMBO_BACKPLANE), board_82599 },
107 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540T), board_X540 },
108 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_SF2), board_82599 },
109 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_LS), board_82599 },
110 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_QSFP_SF_QP), board_82599 },
111 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599EN_SFP), board_82599 },
112 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_SF_QP), board_82599 },
113 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540T1), board_X540 },
114 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550T), board_X550},
115 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550T1), board_X550},
116 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_KX4), board_X550EM_x},
117 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_XFI), board_X550EM_x},
118 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_KR), board_X550EM_x},
119 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_10G_T), board_X550EM_x},
120 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_SFP), board_X550EM_x},
121 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_1G_T), board_x550em_x_fw},
122 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_KR), board_x550em_a },
123 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_KR_L), board_x550em_a },
124 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_SFP_N), board_x550em_a },
125 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_SGMII), board_x550em_a },
126 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_SGMII_L), board_x550em_a },
127 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_10G_T), board_x550em_a},
128 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_SFP), board_x550em_a },
129 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_1G_T), board_x550em_a_fw },
130 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_1G_T_L), board_x550em_a_fw },
131 /* required last entry */
134 MODULE_DEVICE_TABLE(pci, ixgbe_pci_tbl);
136 #ifdef CONFIG_IXGBE_DCA
137 static int ixgbe_notify_dca(struct notifier_block *, unsigned long event,
139 static struct notifier_block dca_notifier = {
140 .notifier_call = ixgbe_notify_dca,
146 #ifdef CONFIG_PCI_IOV
147 static unsigned int max_vfs;
148 module_param(max_vfs, uint, 0);
149 MODULE_PARM_DESC(max_vfs,
150 "Maximum number of virtual functions to allocate per physical function - default is zero and maximum value is 63. (Deprecated)");
151 #endif /* CONFIG_PCI_IOV */
153 static unsigned int allow_unsupported_sfp;
154 module_param(allow_unsupported_sfp, uint, 0);
155 MODULE_PARM_DESC(allow_unsupported_sfp,
156 "Allow unsupported and untested SFP+ modules on 82599-based adapters");
158 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
159 static int debug = -1;
160 module_param(debug, int, 0);
161 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
163 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
164 MODULE_DESCRIPTION("Intel(R) 10 Gigabit PCI Express Network Driver");
165 MODULE_LICENSE("GPL v2");
166 MODULE_VERSION(DRV_VERSION);
168 static struct workqueue_struct *ixgbe_wq;
170 static bool ixgbe_check_cfg_remove(struct ixgbe_hw *hw, struct pci_dev *pdev);
171 static void ixgbe_watchdog_link_is_down(struct ixgbe_adapter *);
173 static const struct net_device_ops ixgbe_netdev_ops;
175 static bool netif_is_ixgbe(struct net_device *dev)
177 return dev && (dev->netdev_ops == &ixgbe_netdev_ops);
180 static int ixgbe_read_pci_cfg_word_parent(struct ixgbe_adapter *adapter,
183 struct pci_dev *parent_dev;
184 struct pci_bus *parent_bus;
186 parent_bus = adapter->pdev->bus->parent;
190 parent_dev = parent_bus->self;
194 if (!pci_is_pcie(parent_dev))
197 pcie_capability_read_word(parent_dev, reg, value);
198 if (*value == IXGBE_FAILED_READ_CFG_WORD &&
199 ixgbe_check_cfg_remove(&adapter->hw, parent_dev))
204 static s32 ixgbe_get_parent_bus_info(struct ixgbe_adapter *adapter)
206 struct ixgbe_hw *hw = &adapter->hw;
210 hw->bus.type = ixgbe_bus_type_pci_express;
212 /* Get the negotiated link width and speed from PCI config space of the
213 * parent, as this device is behind a switch
215 err = ixgbe_read_pci_cfg_word_parent(adapter, 18, &link_status);
217 /* assume caller will handle error case */
221 hw->bus.width = ixgbe_convert_bus_width(link_status);
222 hw->bus.speed = ixgbe_convert_bus_speed(link_status);
228 * ixgbe_check_from_parent - Determine whether PCIe info should come from parent
229 * @hw: hw specific details
231 * This function is used by probe to determine whether a device's PCI-Express
232 * bandwidth details should be gathered from the parent bus instead of from the
233 * device. Used to ensure that various locations all have the correct device ID
236 static inline bool ixgbe_pcie_from_parent(struct ixgbe_hw *hw)
238 switch (hw->device_id) {
239 case IXGBE_DEV_ID_82599_SFP_SF_QP:
240 case IXGBE_DEV_ID_82599_QSFP_SF_QP:
247 static void ixgbe_check_minimum_link(struct ixgbe_adapter *adapter,
250 struct ixgbe_hw *hw = &adapter->hw;
251 struct pci_dev *pdev;
253 /* Some devices are not connected over PCIe and thus do not negotiate
254 * speed. These devices do not have valid bus info, and thus any report
255 * we generate may not be correct.
257 if (hw->bus.type == ixgbe_bus_type_internal)
260 /* determine whether to use the parent device */
261 if (ixgbe_pcie_from_parent(&adapter->hw))
262 pdev = adapter->pdev->bus->parent->self;
264 pdev = adapter->pdev;
266 pcie_print_link_status(pdev);
269 static void ixgbe_service_event_schedule(struct ixgbe_adapter *adapter)
271 if (!test_bit(__IXGBE_DOWN, &adapter->state) &&
272 !test_bit(__IXGBE_REMOVING, &adapter->state) &&
273 !test_and_set_bit(__IXGBE_SERVICE_SCHED, &adapter->state))
274 queue_work(ixgbe_wq, &adapter->service_task);
277 static void ixgbe_remove_adapter(struct ixgbe_hw *hw)
279 struct ixgbe_adapter *adapter = hw->back;
284 e_dev_err("Adapter removed\n");
285 if (test_bit(__IXGBE_SERVICE_INITED, &adapter->state))
286 ixgbe_service_event_schedule(adapter);
289 static u32 ixgbe_check_remove(struct ixgbe_hw *hw, u32 reg)
291 u8 __iomem *reg_addr;
295 reg_addr = READ_ONCE(hw->hw_addr);
296 if (ixgbe_removed(reg_addr))
297 return IXGBE_FAILED_READ_REG;
299 /* Register read of 0xFFFFFFF can indicate the adapter has been removed,
300 * so perform several status register reads to determine if the adapter
303 for (i = 0; i < IXGBE_FAILED_READ_RETRIES; i++) {
304 value = readl(reg_addr + IXGBE_STATUS);
305 if (value != IXGBE_FAILED_READ_REG)
310 if (value == IXGBE_FAILED_READ_REG)
311 ixgbe_remove_adapter(hw);
313 value = readl(reg_addr + reg);
318 * ixgbe_read_reg - Read from device register
319 * @hw: hw specific details
320 * @reg: offset of register to read
322 * Returns : value read or IXGBE_FAILED_READ_REG if removed
324 * This function is used to read device registers. It checks for device
325 * removal by confirming any read that returns all ones by checking the
326 * status register value for all ones. This function avoids reading from
327 * the hardware if a removal was previously detected in which case it
328 * returns IXGBE_FAILED_READ_REG (all ones).
330 u32 ixgbe_read_reg(struct ixgbe_hw *hw, u32 reg)
332 u8 __iomem *reg_addr = READ_ONCE(hw->hw_addr);
335 if (ixgbe_removed(reg_addr))
336 return IXGBE_FAILED_READ_REG;
337 if (unlikely(hw->phy.nw_mng_if_sel &
338 IXGBE_NW_MNG_IF_SEL_SGMII_ENABLE)) {
339 struct ixgbe_adapter *adapter;
342 for (i = 0; i < 200; ++i) {
343 value = readl(reg_addr + IXGBE_MAC_SGMII_BUSY);
345 goto writes_completed;
346 if (value == IXGBE_FAILED_READ_REG) {
347 ixgbe_remove_adapter(hw);
348 return IXGBE_FAILED_READ_REG;
354 e_warn(hw, "register writes incomplete %08x\n", value);
358 value = readl(reg_addr + reg);
359 if (unlikely(value == IXGBE_FAILED_READ_REG))
360 value = ixgbe_check_remove(hw, reg);
364 static bool ixgbe_check_cfg_remove(struct ixgbe_hw *hw, struct pci_dev *pdev)
368 pci_read_config_word(pdev, PCI_VENDOR_ID, &value);
369 if (value == IXGBE_FAILED_READ_CFG_WORD) {
370 ixgbe_remove_adapter(hw);
376 u16 ixgbe_read_pci_cfg_word(struct ixgbe_hw *hw, u32 reg)
378 struct ixgbe_adapter *adapter = hw->back;
381 if (ixgbe_removed(hw->hw_addr))
382 return IXGBE_FAILED_READ_CFG_WORD;
383 pci_read_config_word(adapter->pdev, reg, &value);
384 if (value == IXGBE_FAILED_READ_CFG_WORD &&
385 ixgbe_check_cfg_remove(hw, adapter->pdev))
386 return IXGBE_FAILED_READ_CFG_WORD;
390 #ifdef CONFIG_PCI_IOV
391 static u32 ixgbe_read_pci_cfg_dword(struct ixgbe_hw *hw, u32 reg)
393 struct ixgbe_adapter *adapter = hw->back;
396 if (ixgbe_removed(hw->hw_addr))
397 return IXGBE_FAILED_READ_CFG_DWORD;
398 pci_read_config_dword(adapter->pdev, reg, &value);
399 if (value == IXGBE_FAILED_READ_CFG_DWORD &&
400 ixgbe_check_cfg_remove(hw, adapter->pdev))
401 return IXGBE_FAILED_READ_CFG_DWORD;
404 #endif /* CONFIG_PCI_IOV */
406 void ixgbe_write_pci_cfg_word(struct ixgbe_hw *hw, u32 reg, u16 value)
408 struct ixgbe_adapter *adapter = hw->back;
410 if (ixgbe_removed(hw->hw_addr))
412 pci_write_config_word(adapter->pdev, reg, value);
415 static void ixgbe_service_event_complete(struct ixgbe_adapter *adapter)
417 BUG_ON(!test_bit(__IXGBE_SERVICE_SCHED, &adapter->state));
419 /* flush memory to make sure state is correct before next watchdog */
420 smp_mb__before_atomic();
421 clear_bit(__IXGBE_SERVICE_SCHED, &adapter->state);
424 struct ixgbe_reg_info {
429 static const struct ixgbe_reg_info ixgbe_reg_info_tbl[] = {
431 /* General Registers */
432 {IXGBE_CTRL, "CTRL"},
433 {IXGBE_STATUS, "STATUS"},
434 {IXGBE_CTRL_EXT, "CTRL_EXT"},
436 /* Interrupt Registers */
437 {IXGBE_EICR, "EICR"},
440 {IXGBE_SRRCTL(0), "SRRCTL"},
441 {IXGBE_DCA_RXCTRL(0), "DRXCTL"},
442 {IXGBE_RDLEN(0), "RDLEN"},
443 {IXGBE_RDH(0), "RDH"},
444 {IXGBE_RDT(0), "RDT"},
445 {IXGBE_RXDCTL(0), "RXDCTL"},
446 {IXGBE_RDBAL(0), "RDBAL"},
447 {IXGBE_RDBAH(0), "RDBAH"},
450 {IXGBE_TDBAL(0), "TDBAL"},
451 {IXGBE_TDBAH(0), "TDBAH"},
452 {IXGBE_TDLEN(0), "TDLEN"},
453 {IXGBE_TDH(0), "TDH"},
454 {IXGBE_TDT(0), "TDT"},
455 {IXGBE_TXDCTL(0), "TXDCTL"},
457 /* List Terminator */
463 * ixgbe_regdump - register printout routine
465 static void ixgbe_regdump(struct ixgbe_hw *hw, struct ixgbe_reg_info *reginfo)
471 switch (reginfo->ofs) {
472 case IXGBE_SRRCTL(0):
473 for (i = 0; i < 64; i++)
474 regs[i] = IXGBE_READ_REG(hw, IXGBE_SRRCTL(i));
476 case IXGBE_DCA_RXCTRL(0):
477 for (i = 0; i < 64; i++)
478 regs[i] = IXGBE_READ_REG(hw, IXGBE_DCA_RXCTRL(i));
481 for (i = 0; i < 64; i++)
482 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDLEN(i));
485 for (i = 0; i < 64; i++)
486 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDH(i));
489 for (i = 0; i < 64; i++)
490 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDT(i));
492 case IXGBE_RXDCTL(0):
493 for (i = 0; i < 64; i++)
494 regs[i] = IXGBE_READ_REG(hw, IXGBE_RXDCTL(i));
497 for (i = 0; i < 64; i++)
498 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDBAL(i));
501 for (i = 0; i < 64; i++)
502 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDBAH(i));
505 for (i = 0; i < 64; i++)
506 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDBAL(i));
509 for (i = 0; i < 64; i++)
510 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDBAH(i));
513 for (i = 0; i < 64; i++)
514 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDLEN(i));
517 for (i = 0; i < 64; i++)
518 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDH(i));
521 for (i = 0; i < 64; i++)
522 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDT(i));
524 case IXGBE_TXDCTL(0):
525 for (i = 0; i < 64; i++)
526 regs[i] = IXGBE_READ_REG(hw, IXGBE_TXDCTL(i));
529 pr_info("%-15s %08x\n",
530 reginfo->name, IXGBE_READ_REG(hw, reginfo->ofs));
540 snprintf(rname, 16, "%s[%d-%d]", reginfo->name, i, i + 7);
541 for (j = 0; j < 8; j++)
542 p += sprintf(p, " %08x", regs[i++]);
543 pr_err("%-15s%s\n", rname, buf);
548 static void ixgbe_print_buffer(struct ixgbe_ring *ring, int n)
550 struct ixgbe_tx_buffer *tx_buffer;
552 tx_buffer = &ring->tx_buffer_info[ring->next_to_clean];
553 pr_info(" %5d %5X %5X %016llX %08X %p %016llX\n",
554 n, ring->next_to_use, ring->next_to_clean,
555 (u64)dma_unmap_addr(tx_buffer, dma),
556 dma_unmap_len(tx_buffer, len),
557 tx_buffer->next_to_watch,
558 (u64)tx_buffer->time_stamp);
562 * ixgbe_dump - Print registers, tx-rings and rx-rings
564 static void ixgbe_dump(struct ixgbe_adapter *adapter)
566 struct net_device *netdev = adapter->netdev;
567 struct ixgbe_hw *hw = &adapter->hw;
568 struct ixgbe_reg_info *reginfo;
570 struct ixgbe_ring *ring;
571 struct ixgbe_tx_buffer *tx_buffer;
572 union ixgbe_adv_tx_desc *tx_desc;
573 struct my_u0 { u64 a; u64 b; } *u0;
574 struct ixgbe_ring *rx_ring;
575 union ixgbe_adv_rx_desc *rx_desc;
576 struct ixgbe_rx_buffer *rx_buffer_info;
579 if (!netif_msg_hw(adapter))
582 /* Print netdevice Info */
584 dev_info(&adapter->pdev->dev, "Net device Info\n");
585 pr_info("Device Name state "
587 pr_info("%-15s %016lX %016lX\n",
590 dev_trans_start(netdev));
593 /* Print Registers */
594 dev_info(&adapter->pdev->dev, "Register Dump\n");
595 pr_info(" Register Name Value\n");
596 for (reginfo = (struct ixgbe_reg_info *)ixgbe_reg_info_tbl;
597 reginfo->name; reginfo++) {
598 ixgbe_regdump(hw, reginfo);
601 /* Print TX Ring Summary */
602 if (!netdev || !netif_running(netdev))
605 dev_info(&adapter->pdev->dev, "TX Rings Summary\n");
606 pr_info(" %s %s %s %s\n",
607 "Queue [NTU] [NTC] [bi(ntc)->dma ]",
608 "leng", "ntw", "timestamp");
609 for (n = 0; n < adapter->num_tx_queues; n++) {
610 ring = adapter->tx_ring[n];
611 ixgbe_print_buffer(ring, n);
614 for (n = 0; n < adapter->num_xdp_queues; n++) {
615 ring = adapter->xdp_ring[n];
616 ixgbe_print_buffer(ring, n);
620 if (!netif_msg_tx_done(adapter))
621 goto rx_ring_summary;
623 dev_info(&adapter->pdev->dev, "TX Rings Dump\n");
625 /* Transmit Descriptor Formats
627 * 82598 Advanced Transmit Descriptor
628 * +--------------------------------------------------------------+
629 * 0 | Buffer Address [63:0] |
630 * +--------------------------------------------------------------+
631 * 8 | PAYLEN | POPTS | IDX | STA | DCMD |DTYP | RSV | DTALEN |
632 * +--------------------------------------------------------------+
633 * 63 46 45 40 39 36 35 32 31 24 23 20 19 0
635 * 82598 Advanced Transmit Descriptor (Write-Back Format)
636 * +--------------------------------------------------------------+
638 * +--------------------------------------------------------------+
639 * 8 | RSV | STA | NXTSEQ |
640 * +--------------------------------------------------------------+
643 * 82599+ Advanced Transmit Descriptor
644 * +--------------------------------------------------------------+
645 * 0 | Buffer Address [63:0] |
646 * +--------------------------------------------------------------+
647 * 8 |PAYLEN |POPTS|CC|IDX |STA |DCMD |DTYP |MAC |RSV |DTALEN |
648 * +--------------------------------------------------------------+
649 * 63 46 45 40 39 38 36 35 32 31 24 23 20 19 18 17 16 15 0
651 * 82599+ Advanced Transmit Descriptor (Write-Back Format)
652 * +--------------------------------------------------------------+
654 * +--------------------------------------------------------------+
655 * 8 | RSV | STA | RSV |
656 * +--------------------------------------------------------------+
660 for (n = 0; n < adapter->num_tx_queues; n++) {
661 ring = adapter->tx_ring[n];
662 pr_info("------------------------------------\n");
663 pr_info("TX QUEUE INDEX = %d\n", ring->queue_index);
664 pr_info("------------------------------------\n");
665 pr_info("%s%s %s %s %s %s\n",
666 "T [desc] [address 63:0 ] ",
667 "[PlPOIdStDDt Ln] [bi->dma ] ",
668 "leng", "ntw", "timestamp", "bi->skb");
670 for (i = 0; ring->desc && (i < ring->count); i++) {
671 tx_desc = IXGBE_TX_DESC(ring, i);
672 tx_buffer = &ring->tx_buffer_info[i];
673 u0 = (struct my_u0 *)tx_desc;
674 if (dma_unmap_len(tx_buffer, len) > 0) {
675 const char *ring_desc;
677 if (i == ring->next_to_use &&
678 i == ring->next_to_clean)
679 ring_desc = " NTC/U";
680 else if (i == ring->next_to_use)
682 else if (i == ring->next_to_clean)
686 pr_info("T [0x%03X] %016llX %016llX %016llX %08X %p %016llX %p%s",
688 le64_to_cpu((__force __le64)u0->a),
689 le64_to_cpu((__force __le64)u0->b),
690 (u64)dma_unmap_addr(tx_buffer, dma),
691 dma_unmap_len(tx_buffer, len),
692 tx_buffer->next_to_watch,
693 (u64)tx_buffer->time_stamp,
697 if (netif_msg_pktdata(adapter) &&
699 print_hex_dump(KERN_INFO, "",
700 DUMP_PREFIX_ADDRESS, 16, 1,
701 tx_buffer->skb->data,
702 dma_unmap_len(tx_buffer, len),
708 /* Print RX Rings Summary */
710 dev_info(&adapter->pdev->dev, "RX Rings Summary\n");
711 pr_info("Queue [NTU] [NTC]\n");
712 for (n = 0; n < adapter->num_rx_queues; n++) {
713 rx_ring = adapter->rx_ring[n];
714 pr_info("%5d %5X %5X\n",
715 n, rx_ring->next_to_use, rx_ring->next_to_clean);
719 if (!netif_msg_rx_status(adapter))
722 dev_info(&adapter->pdev->dev, "RX Rings Dump\n");
724 /* Receive Descriptor Formats
726 * 82598 Advanced Receive Descriptor (Read) Format
728 * +-----------------------------------------------------+
729 * 0 | Packet Buffer Address [63:1] |A0/NSE|
730 * +----------------------------------------------+------+
731 * 8 | Header Buffer Address [63:1] | DD |
732 * +-----------------------------------------------------+
735 * 82598 Advanced Receive Descriptor (Write-Back) Format
737 * 63 48 47 32 31 30 21 20 16 15 4 3 0
738 * +------------------------------------------------------+
739 * 0 | RSS Hash / |SPH| HDR_LEN | RSV |Packet| RSS |
740 * | Packet | IP | | | | Type | Type |
741 * | Checksum | Ident | | | | | |
742 * +------------------------------------------------------+
743 * 8 | VLAN Tag | Length | Extended Error | Extended Status |
744 * +------------------------------------------------------+
745 * 63 48 47 32 31 20 19 0
747 * 82599+ Advanced Receive Descriptor (Read) Format
749 * +-----------------------------------------------------+
750 * 0 | Packet Buffer Address [63:1] |A0/NSE|
751 * +----------------------------------------------+------+
752 * 8 | Header Buffer Address [63:1] | DD |
753 * +-----------------------------------------------------+
756 * 82599+ Advanced Receive Descriptor (Write-Back) Format
758 * 63 48 47 32 31 30 21 20 17 16 4 3 0
759 * +------------------------------------------------------+
760 * 0 |RSS / Frag Checksum|SPH| HDR_LEN |RSC- |Packet| RSS |
761 * |/ RTT / PCoE_PARAM | | | CNT | Type | Type |
762 * |/ Flow Dir Flt ID | | | | | |
763 * +------------------------------------------------------+
764 * 8 | VLAN Tag | Length |Extended Error| Xtnd Status/NEXTP |
765 * +------------------------------------------------------+
766 * 63 48 47 32 31 20 19 0
769 for (n = 0; n < adapter->num_rx_queues; n++) {
770 rx_ring = adapter->rx_ring[n];
771 pr_info("------------------------------------\n");
772 pr_info("RX QUEUE INDEX = %d\n", rx_ring->queue_index);
773 pr_info("------------------------------------\n");
775 "R [desc] [ PktBuf A0] ",
776 "[ HeadBuf DD] [bi->dma ] [bi->skb ] ",
777 "<-- Adv Rx Read format");
779 "RWB[desc] [PcsmIpSHl PtRs] ",
780 "[vl er S cks ln] ---------------- [bi->skb ] ",
781 "<-- Adv Rx Write-Back format");
783 for (i = 0; i < rx_ring->count; i++) {
784 const char *ring_desc;
786 if (i == rx_ring->next_to_use)
788 else if (i == rx_ring->next_to_clean)
793 rx_buffer_info = &rx_ring->rx_buffer_info[i];
794 rx_desc = IXGBE_RX_DESC(rx_ring, i);
795 u0 = (struct my_u0 *)rx_desc;
796 if (rx_desc->wb.upper.length) {
797 /* Descriptor Done */
798 pr_info("RWB[0x%03X] %016llX %016llX ---------------- %p%s\n",
800 le64_to_cpu((__force __le64)u0->a),
801 le64_to_cpu((__force __le64)u0->b),
805 pr_info("R [0x%03X] %016llX %016llX %016llX %p%s\n",
807 le64_to_cpu((__force __le64)u0->a),
808 le64_to_cpu((__force __le64)u0->b),
809 (u64)rx_buffer_info->dma,
813 if (netif_msg_pktdata(adapter) &&
814 rx_buffer_info->dma) {
815 print_hex_dump(KERN_INFO, "",
816 DUMP_PREFIX_ADDRESS, 16, 1,
817 page_address(rx_buffer_info->page) +
818 rx_buffer_info->page_offset,
819 ixgbe_rx_bufsz(rx_ring), true);
826 static void ixgbe_release_hw_control(struct ixgbe_adapter *adapter)
830 /* Let firmware take over control of h/w */
831 ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
832 IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
833 ctrl_ext & ~IXGBE_CTRL_EXT_DRV_LOAD);
836 static void ixgbe_get_hw_control(struct ixgbe_adapter *adapter)
840 /* Let firmware know the driver has taken over */
841 ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
842 IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
843 ctrl_ext | IXGBE_CTRL_EXT_DRV_LOAD);
847 * ixgbe_set_ivar - set the IVAR registers, mapping interrupt causes to vectors
848 * @adapter: pointer to adapter struct
849 * @direction: 0 for Rx, 1 for Tx, -1 for other causes
850 * @queue: queue to map the corresponding interrupt to
851 * @msix_vector: the vector to map to the corresponding queue
854 static void ixgbe_set_ivar(struct ixgbe_adapter *adapter, s8 direction,
855 u8 queue, u8 msix_vector)
858 struct ixgbe_hw *hw = &adapter->hw;
859 switch (hw->mac.type) {
860 case ixgbe_mac_82598EB:
861 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
864 index = (((direction * 64) + queue) >> 2) & 0x1F;
865 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(index));
866 ivar &= ~(0xFF << (8 * (queue & 0x3)));
867 ivar |= (msix_vector << (8 * (queue & 0x3)));
868 IXGBE_WRITE_REG(hw, IXGBE_IVAR(index), ivar);
870 case ixgbe_mac_82599EB:
873 case ixgbe_mac_X550EM_x:
874 case ixgbe_mac_x550em_a:
875 if (direction == -1) {
877 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
878 index = ((queue & 1) * 8);
879 ivar = IXGBE_READ_REG(&adapter->hw, IXGBE_IVAR_MISC);
880 ivar &= ~(0xFF << index);
881 ivar |= (msix_vector << index);
882 IXGBE_WRITE_REG(&adapter->hw, IXGBE_IVAR_MISC, ivar);
885 /* tx or rx causes */
886 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
887 index = ((16 * (queue & 1)) + (8 * direction));
888 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(queue >> 1));
889 ivar &= ~(0xFF << index);
890 ivar |= (msix_vector << index);
891 IXGBE_WRITE_REG(hw, IXGBE_IVAR(queue >> 1), ivar);
899 void ixgbe_irq_rearm_queues(struct ixgbe_adapter *adapter,
904 switch (adapter->hw.mac.type) {
905 case ixgbe_mac_82598EB:
906 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
907 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, mask);
909 case ixgbe_mac_82599EB:
912 case ixgbe_mac_X550EM_x:
913 case ixgbe_mac_x550em_a:
914 mask = (qmask & 0xFFFFFFFF);
915 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(0), mask);
916 mask = (qmask >> 32);
917 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(1), mask);
924 static void ixgbe_update_xoff_rx_lfc(struct ixgbe_adapter *adapter)
926 struct ixgbe_hw *hw = &adapter->hw;
927 struct ixgbe_hw_stats *hwstats = &adapter->stats;
931 if ((hw->fc.current_mode != ixgbe_fc_full) &&
932 (hw->fc.current_mode != ixgbe_fc_rx_pause))
935 switch (hw->mac.type) {
936 case ixgbe_mac_82598EB:
937 data = IXGBE_READ_REG(hw, IXGBE_LXOFFRXC);
940 data = IXGBE_READ_REG(hw, IXGBE_LXOFFRXCNT);
942 hwstats->lxoffrxc += data;
944 /* refill credits (no tx hang) if we received xoff */
948 for (i = 0; i < adapter->num_tx_queues; i++)
949 clear_bit(__IXGBE_HANG_CHECK_ARMED,
950 &adapter->tx_ring[i]->state);
952 for (i = 0; i < adapter->num_xdp_queues; i++)
953 clear_bit(__IXGBE_HANG_CHECK_ARMED,
954 &adapter->xdp_ring[i]->state);
957 static void ixgbe_update_xoff_received(struct ixgbe_adapter *adapter)
959 struct ixgbe_hw *hw = &adapter->hw;
960 struct ixgbe_hw_stats *hwstats = &adapter->stats;
964 bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
966 if (adapter->ixgbe_ieee_pfc)
967 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
969 if (!(adapter->flags & IXGBE_FLAG_DCB_ENABLED) || !pfc_en) {
970 ixgbe_update_xoff_rx_lfc(adapter);
974 /* update stats for each tc, only valid with PFC enabled */
975 for (i = 0; i < MAX_TX_PACKET_BUFFERS; i++) {
978 switch (hw->mac.type) {
979 case ixgbe_mac_82598EB:
980 pxoffrxc = IXGBE_READ_REG(hw, IXGBE_PXOFFRXC(i));
983 pxoffrxc = IXGBE_READ_REG(hw, IXGBE_PXOFFRXCNT(i));
985 hwstats->pxoffrxc[i] += pxoffrxc;
986 /* Get the TC for given UP */
987 tc = netdev_get_prio_tc_map(adapter->netdev, i);
988 xoff[tc] += pxoffrxc;
991 /* disarm tx queues that have received xoff frames */
992 for (i = 0; i < adapter->num_tx_queues; i++) {
993 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
995 tc = tx_ring->dcb_tc;
997 clear_bit(__IXGBE_HANG_CHECK_ARMED, &tx_ring->state);
1000 for (i = 0; i < adapter->num_xdp_queues; i++) {
1001 struct ixgbe_ring *xdp_ring = adapter->xdp_ring[i];
1003 tc = xdp_ring->dcb_tc;
1005 clear_bit(__IXGBE_HANG_CHECK_ARMED, &xdp_ring->state);
1009 static u64 ixgbe_get_tx_completed(struct ixgbe_ring *ring)
1011 return ring->stats.packets;
1014 static u64 ixgbe_get_tx_pending(struct ixgbe_ring *ring)
1016 unsigned int head, tail;
1018 head = ring->next_to_clean;
1019 tail = ring->next_to_use;
1021 return ((head <= tail) ? tail : tail + ring->count) - head;
1024 static inline bool ixgbe_check_tx_hang(struct ixgbe_ring *tx_ring)
1026 u32 tx_done = ixgbe_get_tx_completed(tx_ring);
1027 u32 tx_done_old = tx_ring->tx_stats.tx_done_old;
1028 u32 tx_pending = ixgbe_get_tx_pending(tx_ring);
1030 clear_check_for_tx_hang(tx_ring);
1033 * Check for a hung queue, but be thorough. This verifies
1034 * that a transmit has been completed since the previous
1035 * check AND there is at least one packet pending. The
1036 * ARMED bit is set to indicate a potential hang. The
1037 * bit is cleared if a pause frame is received to remove
1038 * false hang detection due to PFC or 802.3x frames. By
1039 * requiring this to fail twice we avoid races with
1040 * pfc clearing the ARMED bit and conditions where we
1041 * run the check_tx_hang logic with a transmit completion
1042 * pending but without time to complete it yet.
1044 if (tx_done_old == tx_done && tx_pending)
1045 /* make sure it is true for two checks in a row */
1046 return test_and_set_bit(__IXGBE_HANG_CHECK_ARMED,
1048 /* update completed stats and continue */
1049 tx_ring->tx_stats.tx_done_old = tx_done;
1050 /* reset the countdown */
1051 clear_bit(__IXGBE_HANG_CHECK_ARMED, &tx_ring->state);
1057 * ixgbe_tx_timeout_reset - initiate reset due to Tx timeout
1058 * @adapter: driver private struct
1060 static void ixgbe_tx_timeout_reset(struct ixgbe_adapter *adapter)
1063 /* Do the reset outside of interrupt context */
1064 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
1065 set_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
1066 e_warn(drv, "initiating reset due to tx timeout\n");
1067 ixgbe_service_event_schedule(adapter);
1072 * ixgbe_tx_maxrate - callback to set the maximum per-queue bitrate
1073 * @netdev: network interface device structure
1074 * @queue_index: Tx queue to set
1075 * @maxrate: desired maximum transmit bitrate
1077 static int ixgbe_tx_maxrate(struct net_device *netdev,
1078 int queue_index, u32 maxrate)
1080 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1081 struct ixgbe_hw *hw = &adapter->hw;
1082 u32 bcnrc_val = ixgbe_link_mbps(adapter);
1087 /* Calculate the rate factor values to set */
1088 bcnrc_val <<= IXGBE_RTTBCNRC_RF_INT_SHIFT;
1089 bcnrc_val /= maxrate;
1091 /* clear everything but the rate factor */
1092 bcnrc_val &= IXGBE_RTTBCNRC_RF_INT_MASK |
1093 IXGBE_RTTBCNRC_RF_DEC_MASK;
1095 /* enable the rate scheduler */
1096 bcnrc_val |= IXGBE_RTTBCNRC_RS_ENA;
1098 IXGBE_WRITE_REG(hw, IXGBE_RTTDQSEL, queue_index);
1099 IXGBE_WRITE_REG(hw, IXGBE_RTTBCNRC, bcnrc_val);
1105 * ixgbe_clean_tx_irq - Reclaim resources after transmit completes
1106 * @q_vector: structure containing interrupt and ring information
1107 * @tx_ring: tx ring to clean
1108 * @napi_budget: Used to determine if we are in netpoll
1110 static bool ixgbe_clean_tx_irq(struct ixgbe_q_vector *q_vector,
1111 struct ixgbe_ring *tx_ring, int napi_budget)
1113 struct ixgbe_adapter *adapter = q_vector->adapter;
1114 struct ixgbe_tx_buffer *tx_buffer;
1115 union ixgbe_adv_tx_desc *tx_desc;
1116 unsigned int total_bytes = 0, total_packets = 0, total_ipsec = 0;
1117 unsigned int budget = q_vector->tx.work_limit;
1118 unsigned int i = tx_ring->next_to_clean;
1120 if (test_bit(__IXGBE_DOWN, &adapter->state))
1123 tx_buffer = &tx_ring->tx_buffer_info[i];
1124 tx_desc = IXGBE_TX_DESC(tx_ring, i);
1125 i -= tx_ring->count;
1128 union ixgbe_adv_tx_desc *eop_desc = tx_buffer->next_to_watch;
1130 /* if next_to_watch is not set then there is no work pending */
1134 /* prevent any other reads prior to eop_desc */
1137 /* if DD is not set pending work has not been completed */
1138 if (!(eop_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD)))
1141 /* clear next_to_watch to prevent false hangs */
1142 tx_buffer->next_to_watch = NULL;
1144 /* update the statistics for this packet */
1145 total_bytes += tx_buffer->bytecount;
1146 total_packets += tx_buffer->gso_segs;
1147 if (tx_buffer->tx_flags & IXGBE_TX_FLAGS_IPSEC)
1151 if (ring_is_xdp(tx_ring))
1152 xdp_return_frame(tx_buffer->xdpf);
1154 napi_consume_skb(tx_buffer->skb, napi_budget);
1156 /* unmap skb header data */
1157 dma_unmap_single(tx_ring->dev,
1158 dma_unmap_addr(tx_buffer, dma),
1159 dma_unmap_len(tx_buffer, len),
1162 /* clear tx_buffer data */
1163 dma_unmap_len_set(tx_buffer, len, 0);
1165 /* unmap remaining buffers */
1166 while (tx_desc != eop_desc) {
1171 i -= tx_ring->count;
1172 tx_buffer = tx_ring->tx_buffer_info;
1173 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
1176 /* unmap any remaining paged data */
1177 if (dma_unmap_len(tx_buffer, len)) {
1178 dma_unmap_page(tx_ring->dev,
1179 dma_unmap_addr(tx_buffer, dma),
1180 dma_unmap_len(tx_buffer, len),
1182 dma_unmap_len_set(tx_buffer, len, 0);
1186 /* move us one more past the eop_desc for start of next pkt */
1191 i -= tx_ring->count;
1192 tx_buffer = tx_ring->tx_buffer_info;
1193 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
1196 /* issue prefetch for next Tx descriptor */
1199 /* update budget accounting */
1201 } while (likely(budget));
1203 i += tx_ring->count;
1204 tx_ring->next_to_clean = i;
1205 u64_stats_update_begin(&tx_ring->syncp);
1206 tx_ring->stats.bytes += total_bytes;
1207 tx_ring->stats.packets += total_packets;
1208 u64_stats_update_end(&tx_ring->syncp);
1209 q_vector->tx.total_bytes += total_bytes;
1210 q_vector->tx.total_packets += total_packets;
1211 adapter->tx_ipsec += total_ipsec;
1213 if (check_for_tx_hang(tx_ring) && ixgbe_check_tx_hang(tx_ring)) {
1214 /* schedule immediate reset if we believe we hung */
1215 struct ixgbe_hw *hw = &adapter->hw;
1216 e_err(drv, "Detected Tx Unit Hang %s\n"
1218 " TDH, TDT <%x>, <%x>\n"
1219 " next_to_use <%x>\n"
1220 " next_to_clean <%x>\n"
1221 "tx_buffer_info[next_to_clean]\n"
1222 " time_stamp <%lx>\n"
1224 ring_is_xdp(tx_ring) ? "(XDP)" : "",
1225 tx_ring->queue_index,
1226 IXGBE_READ_REG(hw, IXGBE_TDH(tx_ring->reg_idx)),
1227 IXGBE_READ_REG(hw, IXGBE_TDT(tx_ring->reg_idx)),
1228 tx_ring->next_to_use, i,
1229 tx_ring->tx_buffer_info[i].time_stamp, jiffies);
1231 if (!ring_is_xdp(tx_ring))
1232 netif_stop_subqueue(tx_ring->netdev,
1233 tx_ring->queue_index);
1236 "tx hang %d detected on queue %d, resetting adapter\n",
1237 adapter->tx_timeout_count + 1, tx_ring->queue_index);
1239 /* schedule immediate reset if we believe we hung */
1240 ixgbe_tx_timeout_reset(adapter);
1242 /* the adapter is about to reset, no point in enabling stuff */
1246 if (ring_is_xdp(tx_ring))
1249 netdev_tx_completed_queue(txring_txq(tx_ring),
1250 total_packets, total_bytes);
1252 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
1253 if (unlikely(total_packets && netif_carrier_ok(tx_ring->netdev) &&
1254 (ixgbe_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD))) {
1255 /* Make sure that anybody stopping the queue after this
1256 * sees the new next_to_clean.
1259 if (__netif_subqueue_stopped(tx_ring->netdev,
1260 tx_ring->queue_index)
1261 && !test_bit(__IXGBE_DOWN, &adapter->state)) {
1262 netif_wake_subqueue(tx_ring->netdev,
1263 tx_ring->queue_index);
1264 ++tx_ring->tx_stats.restart_queue;
1271 #ifdef CONFIG_IXGBE_DCA
1272 static void ixgbe_update_tx_dca(struct ixgbe_adapter *adapter,
1273 struct ixgbe_ring *tx_ring,
1276 struct ixgbe_hw *hw = &adapter->hw;
1280 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1281 txctrl = dca3_get_tag(tx_ring->dev, cpu);
1283 switch (hw->mac.type) {
1284 case ixgbe_mac_82598EB:
1285 reg_offset = IXGBE_DCA_TXCTRL(tx_ring->reg_idx);
1287 case ixgbe_mac_82599EB:
1288 case ixgbe_mac_X540:
1289 reg_offset = IXGBE_DCA_TXCTRL_82599(tx_ring->reg_idx);
1290 txctrl <<= IXGBE_DCA_TXCTRL_CPUID_SHIFT_82599;
1293 /* for unknown hardware do not write register */
1298 * We can enable relaxed ordering for reads, but not writes when
1299 * DCA is enabled. This is due to a known issue in some chipsets
1300 * which will cause the DCA tag to be cleared.
1302 txctrl |= IXGBE_DCA_TXCTRL_DESC_RRO_EN |
1303 IXGBE_DCA_TXCTRL_DATA_RRO_EN |
1304 IXGBE_DCA_TXCTRL_DESC_DCA_EN;
1306 IXGBE_WRITE_REG(hw, reg_offset, txctrl);
1309 static void ixgbe_update_rx_dca(struct ixgbe_adapter *adapter,
1310 struct ixgbe_ring *rx_ring,
1313 struct ixgbe_hw *hw = &adapter->hw;
1315 u8 reg_idx = rx_ring->reg_idx;
1317 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1318 rxctrl = dca3_get_tag(rx_ring->dev, cpu);
1320 switch (hw->mac.type) {
1321 case ixgbe_mac_82599EB:
1322 case ixgbe_mac_X540:
1323 rxctrl <<= IXGBE_DCA_RXCTRL_CPUID_SHIFT_82599;
1330 * We can enable relaxed ordering for reads, but not writes when
1331 * DCA is enabled. This is due to a known issue in some chipsets
1332 * which will cause the DCA tag to be cleared.
1334 rxctrl |= IXGBE_DCA_RXCTRL_DESC_RRO_EN |
1335 IXGBE_DCA_RXCTRL_DATA_DCA_EN |
1336 IXGBE_DCA_RXCTRL_DESC_DCA_EN;
1338 IXGBE_WRITE_REG(hw, IXGBE_DCA_RXCTRL(reg_idx), rxctrl);
1341 static void ixgbe_update_dca(struct ixgbe_q_vector *q_vector)
1343 struct ixgbe_adapter *adapter = q_vector->adapter;
1344 struct ixgbe_ring *ring;
1345 int cpu = get_cpu();
1347 if (q_vector->cpu == cpu)
1350 ixgbe_for_each_ring(ring, q_vector->tx)
1351 ixgbe_update_tx_dca(adapter, ring, cpu);
1353 ixgbe_for_each_ring(ring, q_vector->rx)
1354 ixgbe_update_rx_dca(adapter, ring, cpu);
1356 q_vector->cpu = cpu;
1361 static void ixgbe_setup_dca(struct ixgbe_adapter *adapter)
1365 /* always use CB2 mode, difference is masked in the CB driver */
1366 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1367 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
1368 IXGBE_DCA_CTRL_DCA_MODE_CB2);
1370 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
1371 IXGBE_DCA_CTRL_DCA_DISABLE);
1373 for (i = 0; i < adapter->num_q_vectors; i++) {
1374 adapter->q_vector[i]->cpu = -1;
1375 ixgbe_update_dca(adapter->q_vector[i]);
1379 static int __ixgbe_notify_dca(struct device *dev, void *data)
1381 struct ixgbe_adapter *adapter = dev_get_drvdata(dev);
1382 unsigned long event = *(unsigned long *)data;
1384 if (!(adapter->flags & IXGBE_FLAG_DCA_CAPABLE))
1388 case DCA_PROVIDER_ADD:
1389 /* if we're already enabled, don't do it again */
1390 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1392 if (dca_add_requester(dev) == 0) {
1393 adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
1394 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
1395 IXGBE_DCA_CTRL_DCA_MODE_CB2);
1398 /* fall through - DCA is disabled. */
1399 case DCA_PROVIDER_REMOVE:
1400 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
1401 dca_remove_requester(dev);
1402 adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
1403 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
1404 IXGBE_DCA_CTRL_DCA_DISABLE);
1412 #endif /* CONFIG_IXGBE_DCA */
1414 #define IXGBE_RSS_L4_TYPES_MASK \
1415 ((1ul << IXGBE_RXDADV_RSSTYPE_IPV4_TCP) | \
1416 (1ul << IXGBE_RXDADV_RSSTYPE_IPV4_UDP) | \
1417 (1ul << IXGBE_RXDADV_RSSTYPE_IPV6_TCP) | \
1418 (1ul << IXGBE_RXDADV_RSSTYPE_IPV6_UDP))
1420 static inline void ixgbe_rx_hash(struct ixgbe_ring *ring,
1421 union ixgbe_adv_rx_desc *rx_desc,
1422 struct sk_buff *skb)
1426 if (!(ring->netdev->features & NETIF_F_RXHASH))
1429 rss_type = le16_to_cpu(rx_desc->wb.lower.lo_dword.hs_rss.pkt_info) &
1430 IXGBE_RXDADV_RSSTYPE_MASK;
1435 skb_set_hash(skb, le32_to_cpu(rx_desc->wb.lower.hi_dword.rss),
1436 (IXGBE_RSS_L4_TYPES_MASK & (1ul << rss_type)) ?
1437 PKT_HASH_TYPE_L4 : PKT_HASH_TYPE_L3);
1442 * ixgbe_rx_is_fcoe - check the rx desc for incoming pkt type
1443 * @ring: structure containing ring specific data
1444 * @rx_desc: advanced rx descriptor
1446 * Returns : true if it is FCoE pkt
1448 static inline bool ixgbe_rx_is_fcoe(struct ixgbe_ring *ring,
1449 union ixgbe_adv_rx_desc *rx_desc)
1451 __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
1453 return test_bit(__IXGBE_RX_FCOE, &ring->state) &&
1454 ((pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_ETQF_MASK)) ==
1455 (cpu_to_le16(IXGBE_ETQF_FILTER_FCOE <<
1456 IXGBE_RXDADV_PKTTYPE_ETQF_SHIFT)));
1459 #endif /* IXGBE_FCOE */
1461 * ixgbe_rx_checksum - indicate in skb if hw indicated a good cksum
1462 * @ring: structure containing ring specific data
1463 * @rx_desc: current Rx descriptor being processed
1464 * @skb: skb currently being received and modified
1466 static inline void ixgbe_rx_checksum(struct ixgbe_ring *ring,
1467 union ixgbe_adv_rx_desc *rx_desc,
1468 struct sk_buff *skb)
1470 __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
1471 bool encap_pkt = false;
1473 skb_checksum_none_assert(skb);
1475 /* Rx csum disabled */
1476 if (!(ring->netdev->features & NETIF_F_RXCSUM))
1479 /* check for VXLAN and Geneve packets */
1480 if (pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_VXLAN)) {
1482 skb->encapsulation = 1;
1485 /* if IP and error */
1486 if (ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_IPCS) &&
1487 ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_IPE)) {
1488 ring->rx_stats.csum_err++;
1492 if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_L4CS))
1495 if (ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_TCPE)) {
1497 * 82599 errata, UDP frames with a 0 checksum can be marked as
1500 if ((pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_UDP)) &&
1501 test_bit(__IXGBE_RX_CSUM_UDP_ZERO_ERR, &ring->state))
1504 ring->rx_stats.csum_err++;
1508 /* It must be a TCP or UDP packet with a valid checksum */
1509 skb->ip_summed = CHECKSUM_UNNECESSARY;
1511 if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_OUTERIPCS))
1514 if (ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_OUTERIPER)) {
1515 skb->ip_summed = CHECKSUM_NONE;
1518 /* If we checked the outer header let the stack know */
1519 skb->csum_level = 1;
1523 static inline unsigned int ixgbe_rx_offset(struct ixgbe_ring *rx_ring)
1525 return ring_uses_build_skb(rx_ring) ? IXGBE_SKB_PAD : 0;
1528 static bool ixgbe_alloc_mapped_page(struct ixgbe_ring *rx_ring,
1529 struct ixgbe_rx_buffer *bi)
1531 struct page *page = bi->page;
1534 /* since we are recycling buffers we should seldom need to alloc */
1538 /* alloc new page for storage */
1539 page = dev_alloc_pages(ixgbe_rx_pg_order(rx_ring));
1540 if (unlikely(!page)) {
1541 rx_ring->rx_stats.alloc_rx_page_failed++;
1545 /* map page for use */
1546 dma = dma_map_page_attrs(rx_ring->dev, page, 0,
1547 ixgbe_rx_pg_size(rx_ring),
1552 * if mapping failed free memory back to system since
1553 * there isn't much point in holding memory we can't use
1555 if (dma_mapping_error(rx_ring->dev, dma)) {
1556 __free_pages(page, ixgbe_rx_pg_order(rx_ring));
1558 rx_ring->rx_stats.alloc_rx_page_failed++;
1564 bi->page_offset = ixgbe_rx_offset(rx_ring);
1565 page_ref_add(page, USHRT_MAX - 1);
1566 bi->pagecnt_bias = USHRT_MAX;
1567 rx_ring->rx_stats.alloc_rx_page++;
1573 * ixgbe_alloc_rx_buffers - Replace used receive buffers
1574 * @rx_ring: ring to place buffers on
1575 * @cleaned_count: number of buffers to replace
1577 void ixgbe_alloc_rx_buffers(struct ixgbe_ring *rx_ring, u16 cleaned_count)
1579 union ixgbe_adv_rx_desc *rx_desc;
1580 struct ixgbe_rx_buffer *bi;
1581 u16 i = rx_ring->next_to_use;
1588 rx_desc = IXGBE_RX_DESC(rx_ring, i);
1589 bi = &rx_ring->rx_buffer_info[i];
1590 i -= rx_ring->count;
1592 bufsz = ixgbe_rx_bufsz(rx_ring);
1595 if (!ixgbe_alloc_mapped_page(rx_ring, bi))
1598 /* sync the buffer for use by the device */
1599 dma_sync_single_range_for_device(rx_ring->dev, bi->dma,
1600 bi->page_offset, bufsz,
1604 * Refresh the desc even if buffer_addrs didn't change
1605 * because each write-back erases this info.
1607 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);
1613 rx_desc = IXGBE_RX_DESC(rx_ring, 0);
1614 bi = rx_ring->rx_buffer_info;
1615 i -= rx_ring->count;
1618 /* clear the length for the next_to_use descriptor */
1619 rx_desc->wb.upper.length = 0;
1622 } while (cleaned_count);
1624 i += rx_ring->count;
1626 if (rx_ring->next_to_use != i) {
1627 rx_ring->next_to_use = i;
1629 /* update next to alloc since we have filled the ring */
1630 rx_ring->next_to_alloc = i;
1632 /* Force memory writes to complete before letting h/w
1633 * know there are new descriptors to fetch. (Only
1634 * applicable for weak-ordered memory model archs,
1638 writel(i, rx_ring->tail);
1642 static void ixgbe_set_rsc_gso_size(struct ixgbe_ring *ring,
1643 struct sk_buff *skb)
1645 u16 hdr_len = skb_headlen(skb);
1647 /* set gso_size to avoid messing up TCP MSS */
1648 skb_shinfo(skb)->gso_size = DIV_ROUND_UP((skb->len - hdr_len),
1649 IXGBE_CB(skb)->append_cnt);
1650 skb_shinfo(skb)->gso_type = SKB_GSO_TCPV4;
1653 static void ixgbe_update_rsc_stats(struct ixgbe_ring *rx_ring,
1654 struct sk_buff *skb)
1656 /* if append_cnt is 0 then frame is not RSC */
1657 if (!IXGBE_CB(skb)->append_cnt)
1660 rx_ring->rx_stats.rsc_count += IXGBE_CB(skb)->append_cnt;
1661 rx_ring->rx_stats.rsc_flush++;
1663 ixgbe_set_rsc_gso_size(rx_ring, skb);
1665 /* gso_size is computed using append_cnt so always clear it last */
1666 IXGBE_CB(skb)->append_cnt = 0;
1670 * ixgbe_process_skb_fields - Populate skb header fields from Rx descriptor
1671 * @rx_ring: rx descriptor ring packet is being transacted on
1672 * @rx_desc: pointer to the EOP Rx descriptor
1673 * @skb: pointer to current skb being populated
1675 * This function checks the ring, descriptor, and packet information in
1676 * order to populate the hash, checksum, VLAN, timestamp, protocol, and
1677 * other fields within the skb.
1679 void ixgbe_process_skb_fields(struct ixgbe_ring *rx_ring,
1680 union ixgbe_adv_rx_desc *rx_desc,
1681 struct sk_buff *skb)
1683 struct net_device *dev = rx_ring->netdev;
1684 u32 flags = rx_ring->q_vector->adapter->flags;
1686 ixgbe_update_rsc_stats(rx_ring, skb);
1688 ixgbe_rx_hash(rx_ring, rx_desc, skb);
1690 ixgbe_rx_checksum(rx_ring, rx_desc, skb);
1692 if (unlikely(flags & IXGBE_FLAG_RX_HWTSTAMP_ENABLED))
1693 ixgbe_ptp_rx_hwtstamp(rx_ring, rx_desc, skb);
1695 if ((dev->features & NETIF_F_HW_VLAN_CTAG_RX) &&
1696 ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_VP)) {
1697 u16 vid = le16_to_cpu(rx_desc->wb.upper.vlan);
1698 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
1701 if (ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_STAT_SECP))
1702 ixgbe_ipsec_rx(rx_ring, rx_desc, skb);
1704 /* record Rx queue, or update MACVLAN statistics */
1705 if (netif_is_ixgbe(dev))
1706 skb_record_rx_queue(skb, rx_ring->queue_index);
1708 macvlan_count_rx(netdev_priv(dev), skb->len + ETH_HLEN, true,
1711 skb->protocol = eth_type_trans(skb, dev);
1714 void ixgbe_rx_skb(struct ixgbe_q_vector *q_vector,
1715 struct sk_buff *skb)
1717 napi_gro_receive(&q_vector->napi, skb);
1721 * ixgbe_is_non_eop - process handling of non-EOP buffers
1722 * @rx_ring: Rx ring being processed
1723 * @rx_desc: Rx descriptor for current buffer
1724 * @skb: Current socket buffer containing buffer in progress
1726 * This function updates next to clean. If the buffer is an EOP buffer
1727 * this function exits returning false, otherwise it will place the
1728 * sk_buff in the next buffer to be chained and return true indicating
1729 * that this is in fact a non-EOP buffer.
1731 static bool ixgbe_is_non_eop(struct ixgbe_ring *rx_ring,
1732 union ixgbe_adv_rx_desc *rx_desc,
1733 struct sk_buff *skb)
1735 u32 ntc = rx_ring->next_to_clean + 1;
1737 /* fetch, update, and store next to clean */
1738 ntc = (ntc < rx_ring->count) ? ntc : 0;
1739 rx_ring->next_to_clean = ntc;
1741 prefetch(IXGBE_RX_DESC(rx_ring, ntc));
1743 /* update RSC append count if present */
1744 if (ring_is_rsc_enabled(rx_ring)) {
1745 __le32 rsc_enabled = rx_desc->wb.lower.lo_dword.data &
1746 cpu_to_le32(IXGBE_RXDADV_RSCCNT_MASK);
1748 if (unlikely(rsc_enabled)) {
1749 u32 rsc_cnt = le32_to_cpu(rsc_enabled);
1751 rsc_cnt >>= IXGBE_RXDADV_RSCCNT_SHIFT;
1752 IXGBE_CB(skb)->append_cnt += rsc_cnt - 1;
1754 /* update ntc based on RSC value */
1755 ntc = le32_to_cpu(rx_desc->wb.upper.status_error);
1756 ntc &= IXGBE_RXDADV_NEXTP_MASK;
1757 ntc >>= IXGBE_RXDADV_NEXTP_SHIFT;
1761 /* if we are the last buffer then there is nothing else to do */
1762 if (likely(ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP)))
1765 /* place skb in next buffer to be received */
1766 rx_ring->rx_buffer_info[ntc].skb = skb;
1767 rx_ring->rx_stats.non_eop_descs++;
1773 * ixgbe_pull_tail - ixgbe specific version of skb_pull_tail
1774 * @rx_ring: rx descriptor ring packet is being transacted on
1775 * @skb: pointer to current skb being adjusted
1777 * This function is an ixgbe specific version of __pskb_pull_tail. The
1778 * main difference between this version and the original function is that
1779 * this function can make several assumptions about the state of things
1780 * that allow for significant optimizations versus the standard function.
1781 * As a result we can do things like drop a frag and maintain an accurate
1782 * truesize for the skb.
1784 static void ixgbe_pull_tail(struct ixgbe_ring *rx_ring,
1785 struct sk_buff *skb)
1787 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
1789 unsigned int pull_len;
1792 * it is valid to use page_address instead of kmap since we are
1793 * working with pages allocated out of the lomem pool per
1794 * alloc_page(GFP_ATOMIC)
1796 va = skb_frag_address(frag);
1799 * we need the header to contain the greater of either ETH_HLEN or
1800 * 60 bytes if the skb->len is less than 60 for skb_pad.
1802 pull_len = eth_get_headlen(va, IXGBE_RX_HDR_SIZE);
1804 /* align pull length to size of long to optimize memcpy performance */
1805 skb_copy_to_linear_data(skb, va, ALIGN(pull_len, sizeof(long)));
1807 /* update all of the pointers */
1808 skb_frag_size_sub(frag, pull_len);
1809 frag->page_offset += pull_len;
1810 skb->data_len -= pull_len;
1811 skb->tail += pull_len;
1815 * ixgbe_dma_sync_frag - perform DMA sync for first frag of SKB
1816 * @rx_ring: rx descriptor ring packet is being transacted on
1817 * @skb: pointer to current skb being updated
1819 * This function provides a basic DMA sync up for the first fragment of an
1820 * skb. The reason for doing this is that the first fragment cannot be
1821 * unmapped until we have reached the end of packet descriptor for a buffer
1824 static void ixgbe_dma_sync_frag(struct ixgbe_ring *rx_ring,
1825 struct sk_buff *skb)
1827 /* if the page was released unmap it, else just sync our portion */
1828 if (unlikely(IXGBE_CB(skb)->page_released)) {
1829 dma_unmap_page_attrs(rx_ring->dev, IXGBE_CB(skb)->dma,
1830 ixgbe_rx_pg_size(rx_ring),
1833 } else if (ring_uses_build_skb(rx_ring)) {
1834 unsigned long offset = (unsigned long)(skb->data) & ~PAGE_MASK;
1836 dma_sync_single_range_for_cpu(rx_ring->dev,
1842 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
1844 dma_sync_single_range_for_cpu(rx_ring->dev,
1847 skb_frag_size(frag),
1853 * ixgbe_cleanup_headers - Correct corrupted or empty headers
1854 * @rx_ring: rx descriptor ring packet is being transacted on
1855 * @rx_desc: pointer to the EOP Rx descriptor
1856 * @skb: pointer to current skb being fixed
1858 * Check if the skb is valid in the XDP case it will be an error pointer.
1859 * Return true in this case to abort processing and advance to next
1862 * Check for corrupted packet headers caused by senders on the local L2
1863 * embedded NIC switch not setting up their Tx Descriptors right. These
1864 * should be very rare.
1866 * Also address the case where we are pulling data in on pages only
1867 * and as such no data is present in the skb header.
1869 * In addition if skb is not at least 60 bytes we need to pad it so that
1870 * it is large enough to qualify as a valid Ethernet frame.
1872 * Returns true if an error was encountered and skb was freed.
1874 bool ixgbe_cleanup_headers(struct ixgbe_ring *rx_ring,
1875 union ixgbe_adv_rx_desc *rx_desc,
1876 struct sk_buff *skb)
1878 struct net_device *netdev = rx_ring->netdev;
1880 /* XDP packets use error pointer so abort at this point */
1884 /* Verify netdev is present, and that packet does not have any
1885 * errors that would be unacceptable to the netdev.
1888 (unlikely(ixgbe_test_staterr(rx_desc,
1889 IXGBE_RXDADV_ERR_FRAME_ERR_MASK) &&
1890 !(netdev->features & NETIF_F_RXALL)))) {
1891 dev_kfree_skb_any(skb);
1895 /* place header in linear portion of buffer */
1896 if (!skb_headlen(skb))
1897 ixgbe_pull_tail(rx_ring, skb);
1900 /* do not attempt to pad FCoE Frames as this will disrupt DDP */
1901 if (ixgbe_rx_is_fcoe(rx_ring, rx_desc))
1905 /* if eth_skb_pad returns an error the skb was freed */
1906 if (eth_skb_pad(skb))
1913 * ixgbe_reuse_rx_page - page flip buffer and store it back on the ring
1914 * @rx_ring: rx descriptor ring to store buffers on
1915 * @old_buff: donor buffer to have page reused
1917 * Synchronizes page for reuse by the adapter
1919 static void ixgbe_reuse_rx_page(struct ixgbe_ring *rx_ring,
1920 struct ixgbe_rx_buffer *old_buff)
1922 struct ixgbe_rx_buffer *new_buff;
1923 u16 nta = rx_ring->next_to_alloc;
1925 new_buff = &rx_ring->rx_buffer_info[nta];
1927 /* update, and store next to alloc */
1929 rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
1931 /* Transfer page from old buffer to new buffer.
1932 * Move each member individually to avoid possible store
1933 * forwarding stalls and unnecessary copy of skb.
1935 new_buff->dma = old_buff->dma;
1936 new_buff->page = old_buff->page;
1937 new_buff->page_offset = old_buff->page_offset;
1938 new_buff->pagecnt_bias = old_buff->pagecnt_bias;
1941 static inline bool ixgbe_page_is_reserved(struct page *page)
1943 return (page_to_nid(page) != numa_mem_id()) || page_is_pfmemalloc(page);
1946 static bool ixgbe_can_reuse_rx_page(struct ixgbe_rx_buffer *rx_buffer)
1948 unsigned int pagecnt_bias = rx_buffer->pagecnt_bias;
1949 struct page *page = rx_buffer->page;
1951 /* avoid re-using remote pages */
1952 if (unlikely(ixgbe_page_is_reserved(page)))
1955 #if (PAGE_SIZE < 8192)
1956 /* if we are only owner of page we can reuse it */
1957 if (unlikely((page_ref_count(page) - pagecnt_bias) > 1))
1960 /* The last offset is a bit aggressive in that we assume the
1961 * worst case of FCoE being enabled and using a 3K buffer.
1962 * However this should have minimal impact as the 1K extra is
1963 * still less than one buffer in size.
1965 #define IXGBE_LAST_OFFSET \
1966 (SKB_WITH_OVERHEAD(PAGE_SIZE) - IXGBE_RXBUFFER_3K)
1967 if (rx_buffer->page_offset > IXGBE_LAST_OFFSET)
1971 /* If we have drained the page fragment pool we need to update
1972 * the pagecnt_bias and page count so that we fully restock the
1973 * number of references the driver holds.
1975 if (unlikely(pagecnt_bias == 1)) {
1976 page_ref_add(page, USHRT_MAX - 1);
1977 rx_buffer->pagecnt_bias = USHRT_MAX;
1984 * ixgbe_add_rx_frag - Add contents of Rx buffer to sk_buff
1985 * @rx_ring: rx descriptor ring to transact packets on
1986 * @rx_buffer: buffer containing page to add
1987 * @skb: sk_buff to place the data into
1988 * @size: size of data in rx_buffer
1990 * This function will add the data contained in rx_buffer->page to the skb.
1991 * This is done either through a direct copy if the data in the buffer is
1992 * less than the skb header size, otherwise it will just attach the page as
1993 * a frag to the skb.
1995 * The function will then update the page offset if necessary and return
1996 * true if the buffer can be reused by the adapter.
1998 static void ixgbe_add_rx_frag(struct ixgbe_ring *rx_ring,
1999 struct ixgbe_rx_buffer *rx_buffer,
2000 struct sk_buff *skb,
2003 #if (PAGE_SIZE < 8192)
2004 unsigned int truesize = ixgbe_rx_pg_size(rx_ring) / 2;
2006 unsigned int truesize = ring_uses_build_skb(rx_ring) ?
2007 SKB_DATA_ALIGN(IXGBE_SKB_PAD + size) :
2008 SKB_DATA_ALIGN(size);
2010 skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, rx_buffer->page,
2011 rx_buffer->page_offset, size, truesize);
2012 #if (PAGE_SIZE < 8192)
2013 rx_buffer->page_offset ^= truesize;
2015 rx_buffer->page_offset += truesize;
2019 static struct ixgbe_rx_buffer *ixgbe_get_rx_buffer(struct ixgbe_ring *rx_ring,
2020 union ixgbe_adv_rx_desc *rx_desc,
2021 struct sk_buff **skb,
2022 const unsigned int size)
2024 struct ixgbe_rx_buffer *rx_buffer;
2026 rx_buffer = &rx_ring->rx_buffer_info[rx_ring->next_to_clean];
2027 prefetchw(rx_buffer->page);
2028 *skb = rx_buffer->skb;
2030 /* Delay unmapping of the first packet. It carries the header
2031 * information, HW may still access the header after the writeback.
2032 * Only unmap it when EOP is reached
2034 if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP)) {
2039 ixgbe_dma_sync_frag(rx_ring, *skb);
2042 /* we are reusing so sync this buffer for CPU use */
2043 dma_sync_single_range_for_cpu(rx_ring->dev,
2045 rx_buffer->page_offset,
2049 rx_buffer->pagecnt_bias--;
2054 static void ixgbe_put_rx_buffer(struct ixgbe_ring *rx_ring,
2055 struct ixgbe_rx_buffer *rx_buffer,
2056 struct sk_buff *skb)
2058 if (ixgbe_can_reuse_rx_page(rx_buffer)) {
2059 /* hand second half of page back to the ring */
2060 ixgbe_reuse_rx_page(rx_ring, rx_buffer);
2062 if (!IS_ERR(skb) && IXGBE_CB(skb)->dma == rx_buffer->dma) {
2063 /* the page has been released from the ring */
2064 IXGBE_CB(skb)->page_released = true;
2066 /* we are not reusing the buffer so unmap it */
2067 dma_unmap_page_attrs(rx_ring->dev, rx_buffer->dma,
2068 ixgbe_rx_pg_size(rx_ring),
2072 __page_frag_cache_drain(rx_buffer->page,
2073 rx_buffer->pagecnt_bias);
2076 /* clear contents of rx_buffer */
2077 rx_buffer->page = NULL;
2078 rx_buffer->skb = NULL;
2081 static struct sk_buff *ixgbe_construct_skb(struct ixgbe_ring *rx_ring,
2082 struct ixgbe_rx_buffer *rx_buffer,
2083 struct xdp_buff *xdp,
2084 union ixgbe_adv_rx_desc *rx_desc)
2086 unsigned int size = xdp->data_end - xdp->data;
2087 #if (PAGE_SIZE < 8192)
2088 unsigned int truesize = ixgbe_rx_pg_size(rx_ring) / 2;
2090 unsigned int truesize = SKB_DATA_ALIGN(xdp->data_end -
2091 xdp->data_hard_start);
2093 struct sk_buff *skb;
2095 /* prefetch first cache line of first page */
2096 prefetch(xdp->data);
2097 #if L1_CACHE_BYTES < 128
2098 prefetch(xdp->data + L1_CACHE_BYTES);
2100 /* Note, we get here by enabling legacy-rx via:
2102 * ethtool --set-priv-flags <dev> legacy-rx on
2104 * In this mode, we currently get 0 extra XDP headroom as
2105 * opposed to having legacy-rx off, where we process XDP
2106 * packets going to stack via ixgbe_build_skb(). The latter
2107 * provides us currently with 192 bytes of headroom.
2109 * For ixgbe_construct_skb() mode it means that the
2110 * xdp->data_meta will always point to xdp->data, since
2111 * the helper cannot expand the head. Should this ever
2112 * change in future for legacy-rx mode on, then lets also
2113 * add xdp->data_meta handling here.
2116 /* allocate a skb to store the frags */
2117 skb = napi_alloc_skb(&rx_ring->q_vector->napi, IXGBE_RX_HDR_SIZE);
2121 if (size > IXGBE_RX_HDR_SIZE) {
2122 if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP))
2123 IXGBE_CB(skb)->dma = rx_buffer->dma;
2125 skb_add_rx_frag(skb, 0, rx_buffer->page,
2126 xdp->data - page_address(rx_buffer->page),
2128 #if (PAGE_SIZE < 8192)
2129 rx_buffer->page_offset ^= truesize;
2131 rx_buffer->page_offset += truesize;
2134 memcpy(__skb_put(skb, size),
2135 xdp->data, ALIGN(size, sizeof(long)));
2136 rx_buffer->pagecnt_bias++;
2142 static struct sk_buff *ixgbe_build_skb(struct ixgbe_ring *rx_ring,
2143 struct ixgbe_rx_buffer *rx_buffer,
2144 struct xdp_buff *xdp,
2145 union ixgbe_adv_rx_desc *rx_desc)
2147 unsigned int metasize = xdp->data - xdp->data_meta;
2148 #if (PAGE_SIZE < 8192)
2149 unsigned int truesize = ixgbe_rx_pg_size(rx_ring) / 2;
2151 unsigned int truesize = SKB_DATA_ALIGN(sizeof(struct skb_shared_info)) +
2152 SKB_DATA_ALIGN(xdp->data_end -
2153 xdp->data_hard_start);
2155 struct sk_buff *skb;
2157 /* Prefetch first cache line of first page. If xdp->data_meta
2158 * is unused, this points extactly as xdp->data, otherwise we
2159 * likely have a consumer accessing first few bytes of meta
2160 * data, and then actual data.
2162 prefetch(xdp->data_meta);
2163 #if L1_CACHE_BYTES < 128
2164 prefetch(xdp->data_meta + L1_CACHE_BYTES);
2167 /* build an skb to around the page buffer */
2168 skb = build_skb(xdp->data_hard_start, truesize);
2172 /* update pointers within the skb to store the data */
2173 skb_reserve(skb, xdp->data - xdp->data_hard_start);
2174 __skb_put(skb, xdp->data_end - xdp->data);
2176 skb_metadata_set(skb, metasize);
2178 /* record DMA address if this is the start of a chain of buffers */
2179 if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP))
2180 IXGBE_CB(skb)->dma = rx_buffer->dma;
2182 /* update buffer offset */
2183 #if (PAGE_SIZE < 8192)
2184 rx_buffer->page_offset ^= truesize;
2186 rx_buffer->page_offset += truesize;
2192 static struct sk_buff *ixgbe_run_xdp(struct ixgbe_adapter *adapter,
2193 struct ixgbe_ring *rx_ring,
2194 struct xdp_buff *xdp)
2196 int err, result = IXGBE_XDP_PASS;
2197 struct bpf_prog *xdp_prog;
2198 struct xdp_frame *xdpf;
2202 xdp_prog = READ_ONCE(rx_ring->xdp_prog);
2207 prefetchw(xdp->data_hard_start); /* xdp_frame write */
2209 act = bpf_prog_run_xdp(xdp_prog, xdp);
2214 xdpf = convert_to_xdp_frame(xdp);
2215 if (unlikely(!xdpf)) {
2216 result = IXGBE_XDP_CONSUMED;
2219 result = ixgbe_xmit_xdp_ring(adapter, xdpf);
2222 err = xdp_do_redirect(adapter->netdev, xdp, xdp_prog);
2224 result = IXGBE_XDP_REDIR;
2226 result = IXGBE_XDP_CONSUMED;
2229 bpf_warn_invalid_xdp_action(act);
2232 trace_xdp_exception(rx_ring->netdev, xdp_prog, act);
2233 /* fallthrough -- handle aborts by dropping packet */
2235 result = IXGBE_XDP_CONSUMED;
2240 return ERR_PTR(-result);
2243 static void ixgbe_rx_buffer_flip(struct ixgbe_ring *rx_ring,
2244 struct ixgbe_rx_buffer *rx_buffer,
2247 #if (PAGE_SIZE < 8192)
2248 unsigned int truesize = ixgbe_rx_pg_size(rx_ring) / 2;
2250 rx_buffer->page_offset ^= truesize;
2252 unsigned int truesize = ring_uses_build_skb(rx_ring) ?
2253 SKB_DATA_ALIGN(IXGBE_SKB_PAD + size) :
2254 SKB_DATA_ALIGN(size);
2256 rx_buffer->page_offset += truesize;
2261 * ixgbe_clean_rx_irq - Clean completed descriptors from Rx ring - bounce buf
2262 * @q_vector: structure containing interrupt and ring information
2263 * @rx_ring: rx descriptor ring to transact packets on
2264 * @budget: Total limit on number of packets to process
2266 * This function provides a "bounce buffer" approach to Rx interrupt
2267 * processing. The advantage to this is that on systems that have
2268 * expensive overhead for IOMMU access this provides a means of avoiding
2269 * it by maintaining the mapping of the page to the syste.
2271 * Returns amount of work completed
2273 static int ixgbe_clean_rx_irq(struct ixgbe_q_vector *q_vector,
2274 struct ixgbe_ring *rx_ring,
2277 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
2278 struct ixgbe_adapter *adapter = q_vector->adapter;
2281 unsigned int mss = 0;
2282 #endif /* IXGBE_FCOE */
2283 u16 cleaned_count = ixgbe_desc_unused(rx_ring);
2284 unsigned int xdp_xmit = 0;
2285 struct xdp_buff xdp;
2287 xdp.rxq = &rx_ring->xdp_rxq;
2289 while (likely(total_rx_packets < budget)) {
2290 union ixgbe_adv_rx_desc *rx_desc;
2291 struct ixgbe_rx_buffer *rx_buffer;
2292 struct sk_buff *skb;
2295 /* return some buffers to hardware, one at a time is too slow */
2296 if (cleaned_count >= IXGBE_RX_BUFFER_WRITE) {
2297 ixgbe_alloc_rx_buffers(rx_ring, cleaned_count);
2301 rx_desc = IXGBE_RX_DESC(rx_ring, rx_ring->next_to_clean);
2302 size = le16_to_cpu(rx_desc->wb.upper.length);
2306 /* This memory barrier is needed to keep us from reading
2307 * any other fields out of the rx_desc until we know the
2308 * descriptor has been written back
2312 rx_buffer = ixgbe_get_rx_buffer(rx_ring, rx_desc, &skb, size);
2314 /* retrieve a buffer from the ring */
2316 xdp.data = page_address(rx_buffer->page) +
2317 rx_buffer->page_offset;
2318 xdp.data_meta = xdp.data;
2319 xdp.data_hard_start = xdp.data -
2320 ixgbe_rx_offset(rx_ring);
2321 xdp.data_end = xdp.data + size;
2323 skb = ixgbe_run_xdp(adapter, rx_ring, &xdp);
2327 unsigned int xdp_res = -PTR_ERR(skb);
2329 if (xdp_res & (IXGBE_XDP_TX | IXGBE_XDP_REDIR)) {
2330 xdp_xmit |= xdp_res;
2331 ixgbe_rx_buffer_flip(rx_ring, rx_buffer, size);
2333 rx_buffer->pagecnt_bias++;
2336 total_rx_bytes += size;
2338 ixgbe_add_rx_frag(rx_ring, rx_buffer, skb, size);
2339 } else if (ring_uses_build_skb(rx_ring)) {
2340 skb = ixgbe_build_skb(rx_ring, rx_buffer,
2343 skb = ixgbe_construct_skb(rx_ring, rx_buffer,
2347 /* exit if we failed to retrieve a buffer */
2349 rx_ring->rx_stats.alloc_rx_buff_failed++;
2350 rx_buffer->pagecnt_bias++;
2354 ixgbe_put_rx_buffer(rx_ring, rx_buffer, skb);
2357 /* place incomplete frames back on ring for completion */
2358 if (ixgbe_is_non_eop(rx_ring, rx_desc, skb))
2361 /* verify the packet layout is correct */
2362 if (ixgbe_cleanup_headers(rx_ring, rx_desc, skb))
2365 /* probably a little skewed due to removing CRC */
2366 total_rx_bytes += skb->len;
2368 /* populate checksum, timestamp, VLAN, and protocol */
2369 ixgbe_process_skb_fields(rx_ring, rx_desc, skb);
2372 /* if ddp, not passing to ULD unless for FCP_RSP or error */
2373 if (ixgbe_rx_is_fcoe(rx_ring, rx_desc)) {
2374 ddp_bytes = ixgbe_fcoe_ddp(adapter, rx_desc, skb);
2375 /* include DDPed FCoE data */
2376 if (ddp_bytes > 0) {
2378 mss = rx_ring->netdev->mtu -
2379 sizeof(struct fcoe_hdr) -
2380 sizeof(struct fc_frame_header) -
2381 sizeof(struct fcoe_crc_eof);
2385 total_rx_bytes += ddp_bytes;
2386 total_rx_packets += DIV_ROUND_UP(ddp_bytes,
2390 dev_kfree_skb_any(skb);
2395 #endif /* IXGBE_FCOE */
2396 ixgbe_rx_skb(q_vector, skb);
2398 /* update budget accounting */
2402 if (xdp_xmit & IXGBE_XDP_REDIR)
2405 if (xdp_xmit & IXGBE_XDP_TX) {
2406 struct ixgbe_ring *ring = adapter->xdp_ring[smp_processor_id()];
2408 /* Force memory writes to complete before letting h/w
2409 * know there are new descriptors to fetch.
2412 writel(ring->next_to_use, ring->tail);
2415 u64_stats_update_begin(&rx_ring->syncp);
2416 rx_ring->stats.packets += total_rx_packets;
2417 rx_ring->stats.bytes += total_rx_bytes;
2418 u64_stats_update_end(&rx_ring->syncp);
2419 q_vector->rx.total_packets += total_rx_packets;
2420 q_vector->rx.total_bytes += total_rx_bytes;
2422 return total_rx_packets;
2426 * ixgbe_configure_msix - Configure MSI-X hardware
2427 * @adapter: board private structure
2429 * ixgbe_configure_msix sets up the hardware to properly generate MSI-X
2432 static void ixgbe_configure_msix(struct ixgbe_adapter *adapter)
2434 struct ixgbe_q_vector *q_vector;
2438 /* Populate MSIX to EITR Select */
2439 if (adapter->num_vfs > 32) {
2440 u32 eitrsel = BIT(adapter->num_vfs - 32) - 1;
2441 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITRSEL, eitrsel);
2445 * Populate the IVAR table and set the ITR values to the
2446 * corresponding register.
2448 for (v_idx = 0; v_idx < adapter->num_q_vectors; v_idx++) {
2449 struct ixgbe_ring *ring;
2450 q_vector = adapter->q_vector[v_idx];
2452 ixgbe_for_each_ring(ring, q_vector->rx)
2453 ixgbe_set_ivar(adapter, 0, ring->reg_idx, v_idx);
2455 ixgbe_for_each_ring(ring, q_vector->tx)
2456 ixgbe_set_ivar(adapter, 1, ring->reg_idx, v_idx);
2458 ixgbe_write_eitr(q_vector);
2461 switch (adapter->hw.mac.type) {
2462 case ixgbe_mac_82598EB:
2463 ixgbe_set_ivar(adapter, -1, IXGBE_IVAR_OTHER_CAUSES_INDEX,
2466 case ixgbe_mac_82599EB:
2467 case ixgbe_mac_X540:
2468 case ixgbe_mac_X550:
2469 case ixgbe_mac_X550EM_x:
2470 case ixgbe_mac_x550em_a:
2471 ixgbe_set_ivar(adapter, -1, 1, v_idx);
2476 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITR(v_idx), 1950);
2478 /* set up to autoclear timer, and the vectors */
2479 mask = IXGBE_EIMS_ENABLE_MASK;
2480 mask &= ~(IXGBE_EIMS_OTHER |
2481 IXGBE_EIMS_MAILBOX |
2484 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIAC, mask);
2488 * ixgbe_update_itr - update the dynamic ITR value based on statistics
2489 * @q_vector: structure containing interrupt and ring information
2490 * @ring_container: structure containing ring performance data
2492 * Stores a new ITR value based on packets and byte
2493 * counts during the last interrupt. The advantage of per interrupt
2494 * computation is faster updates and more accurate ITR for the current
2495 * traffic pattern. Constants in this function were computed
2496 * based on theoretical maximum wire speed and thresholds were set based
2497 * on testing data as well as attempting to minimize response time
2498 * while increasing bulk throughput.
2500 static void ixgbe_update_itr(struct ixgbe_q_vector *q_vector,
2501 struct ixgbe_ring_container *ring_container)
2503 unsigned int itr = IXGBE_ITR_ADAPTIVE_MIN_USECS |
2504 IXGBE_ITR_ADAPTIVE_LATENCY;
2505 unsigned int avg_wire_size, packets, bytes;
2506 unsigned long next_update = jiffies;
2508 /* If we don't have any rings just leave ourselves set for maximum
2509 * possible latency so we take ourselves out of the equation.
2511 if (!ring_container->ring)
2514 /* If we didn't update within up to 1 - 2 jiffies we can assume
2515 * that either packets are coming in so slow there hasn't been
2516 * any work, or that there is so much work that NAPI is dealing
2517 * with interrupt moderation and we don't need to do anything.
2519 if (time_after(next_update, ring_container->next_update))
2522 packets = ring_container->total_packets;
2524 /* We have no packets to actually measure against. This means
2525 * either one of the other queues on this vector is active or
2526 * we are a Tx queue doing TSO with too high of an interrupt rate.
2528 * When this occurs just tick up our delay by the minimum value
2529 * and hope that this extra delay will prevent us from being called
2530 * without any work on our queue.
2533 itr = (q_vector->itr >> 2) + IXGBE_ITR_ADAPTIVE_MIN_INC;
2534 if (itr > IXGBE_ITR_ADAPTIVE_MAX_USECS)
2535 itr = IXGBE_ITR_ADAPTIVE_MAX_USECS;
2536 itr += ring_container->itr & IXGBE_ITR_ADAPTIVE_LATENCY;
2540 bytes = ring_container->total_bytes;
2542 /* If packets are less than 4 or bytes are less than 9000 assume
2543 * insufficient data to use bulk rate limiting approach. We are
2544 * likely latency driven.
2546 if (packets < 4 && bytes < 9000) {
2547 itr = IXGBE_ITR_ADAPTIVE_LATENCY;
2548 goto adjust_by_size;
2551 /* Between 4 and 48 we can assume that our current interrupt delay
2552 * is only slightly too low. As such we should increase it by a small
2556 itr = (q_vector->itr >> 2) + IXGBE_ITR_ADAPTIVE_MIN_INC;
2557 if (itr > IXGBE_ITR_ADAPTIVE_MAX_USECS)
2558 itr = IXGBE_ITR_ADAPTIVE_MAX_USECS;
2562 /* Between 48 and 96 is our "goldilocks" zone where we are working
2563 * out "just right". Just report that our current ITR is good for us.
2566 itr = q_vector->itr >> 2;
2570 /* If packet count is 96 or greater we are likely looking at a slight
2571 * overrun of the delay we want. Try halving our delay to see if that
2572 * will cut the number of packets in half per interrupt.
2574 if (packets < 256) {
2575 itr = q_vector->itr >> 3;
2576 if (itr < IXGBE_ITR_ADAPTIVE_MIN_USECS)
2577 itr = IXGBE_ITR_ADAPTIVE_MIN_USECS;
2581 /* The paths below assume we are dealing with a bulk ITR since number
2582 * of packets is 256 or greater. We are just going to have to compute
2583 * a value and try to bring the count under control, though for smaller
2584 * packet sizes there isn't much we can do as NAPI polling will likely
2585 * be kicking in sooner rather than later.
2587 itr = IXGBE_ITR_ADAPTIVE_BULK;
2590 /* If packet counts are 256 or greater we can assume we have a gross
2591 * overestimation of what the rate should be. Instead of trying to fine
2592 * tune it just use the formula below to try and dial in an exact value
2593 * give the current packet size of the frame.
2595 avg_wire_size = bytes / packets;
2597 /* The following is a crude approximation of:
2598 * wmem_default / (size + overhead) = desired_pkts_per_int
2599 * rate / bits_per_byte / (size + ethernet overhead) = pkt_rate
2600 * (desired_pkt_rate / pkt_rate) * usecs_per_sec = ITR value
2602 * Assuming wmem_default is 212992 and overhead is 640 bytes per
2603 * packet, (256 skb, 64 headroom, 320 shared info), we can reduce the
2606 * (170 * (size + 24)) / (size + 640) = ITR
2608 * We first do some math on the packet size and then finally bitshift
2609 * by 8 after rounding up. We also have to account for PCIe link speed
2610 * difference as ITR scales based on this.
2612 if (avg_wire_size <= 60) {
2613 /* Start at 50k ints/sec */
2614 avg_wire_size = 5120;
2615 } else if (avg_wire_size <= 316) {
2616 /* 50K ints/sec to 16K ints/sec */
2617 avg_wire_size *= 40;
2618 avg_wire_size += 2720;
2619 } else if (avg_wire_size <= 1084) {
2620 /* 16K ints/sec to 9.2K ints/sec */
2621 avg_wire_size *= 15;
2622 avg_wire_size += 11452;
2623 } else if (avg_wire_size <= 1980) {
2624 /* 9.2K ints/sec to 8K ints/sec */
2626 avg_wire_size += 22420;
2628 /* plateau at a limit of 8K ints/sec */
2629 avg_wire_size = 32256;
2632 /* If we are in low latency mode half our delay which doubles the rate
2633 * to somewhere between 100K to 16K ints/sec
2635 if (itr & IXGBE_ITR_ADAPTIVE_LATENCY)
2636 avg_wire_size >>= 1;
2638 /* Resultant value is 256 times larger than it needs to be. This
2639 * gives us room to adjust the value as needed to either increase
2640 * or decrease the value based on link speeds of 10G, 2.5G, 1G, etc.
2642 * Use addition as we have already recorded the new latency flag
2643 * for the ITR value.
2645 switch (q_vector->adapter->link_speed) {
2646 case IXGBE_LINK_SPEED_10GB_FULL:
2647 case IXGBE_LINK_SPEED_100_FULL:
2649 itr += DIV_ROUND_UP(avg_wire_size,
2650 IXGBE_ITR_ADAPTIVE_MIN_INC * 256) *
2651 IXGBE_ITR_ADAPTIVE_MIN_INC;
2653 case IXGBE_LINK_SPEED_2_5GB_FULL:
2654 case IXGBE_LINK_SPEED_1GB_FULL:
2655 case IXGBE_LINK_SPEED_10_FULL:
2656 itr += DIV_ROUND_UP(avg_wire_size,
2657 IXGBE_ITR_ADAPTIVE_MIN_INC * 64) *
2658 IXGBE_ITR_ADAPTIVE_MIN_INC;
2663 /* write back value */
2664 ring_container->itr = itr;
2666 /* next update should occur within next jiffy */
2667 ring_container->next_update = next_update + 1;
2669 ring_container->total_bytes = 0;
2670 ring_container->total_packets = 0;
2674 * ixgbe_write_eitr - write EITR register in hardware specific way
2675 * @q_vector: structure containing interrupt and ring information
2677 * This function is made to be called by ethtool and by the driver
2678 * when it needs to update EITR registers at runtime. Hardware
2679 * specific quirks/differences are taken care of here.
2681 void ixgbe_write_eitr(struct ixgbe_q_vector *q_vector)
2683 struct ixgbe_adapter *adapter = q_vector->adapter;
2684 struct ixgbe_hw *hw = &adapter->hw;
2685 int v_idx = q_vector->v_idx;
2686 u32 itr_reg = q_vector->itr & IXGBE_MAX_EITR;
2688 switch (adapter->hw.mac.type) {
2689 case ixgbe_mac_82598EB:
2690 /* must write high and low 16 bits to reset counter */
2691 itr_reg |= (itr_reg << 16);
2693 case ixgbe_mac_82599EB:
2694 case ixgbe_mac_X540:
2695 case ixgbe_mac_X550:
2696 case ixgbe_mac_X550EM_x:
2697 case ixgbe_mac_x550em_a:
2699 * set the WDIS bit to not clear the timer bits and cause an
2700 * immediate assertion of the interrupt
2702 itr_reg |= IXGBE_EITR_CNT_WDIS;
2707 IXGBE_WRITE_REG(hw, IXGBE_EITR(v_idx), itr_reg);
2710 static void ixgbe_set_itr(struct ixgbe_q_vector *q_vector)
2714 ixgbe_update_itr(q_vector, &q_vector->tx);
2715 ixgbe_update_itr(q_vector, &q_vector->rx);
2717 /* use the smallest value of new ITR delay calculations */
2718 new_itr = min(q_vector->rx.itr, q_vector->tx.itr);
2720 /* Clear latency flag if set, shift into correct position */
2721 new_itr &= ~IXGBE_ITR_ADAPTIVE_LATENCY;
2724 if (new_itr != q_vector->itr) {
2725 /* save the algorithm value here */
2726 q_vector->itr = new_itr;
2728 ixgbe_write_eitr(q_vector);
2733 * ixgbe_check_overtemp_subtask - check for over temperature
2734 * @adapter: pointer to adapter
2736 static void ixgbe_check_overtemp_subtask(struct ixgbe_adapter *adapter)
2738 struct ixgbe_hw *hw = &adapter->hw;
2739 u32 eicr = adapter->interrupt_event;
2742 if (test_bit(__IXGBE_DOWN, &adapter->state))
2745 if (!(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_EVENT))
2748 adapter->flags2 &= ~IXGBE_FLAG2_TEMP_SENSOR_EVENT;
2750 switch (hw->device_id) {
2751 case IXGBE_DEV_ID_82599_T3_LOM:
2753 * Since the warning interrupt is for both ports
2754 * we don't have to check if:
2755 * - This interrupt wasn't for our port.
2756 * - We may have missed the interrupt so always have to
2757 * check if we got a LSC
2759 if (!(eicr & IXGBE_EICR_GPI_SDP0_8259X) &&
2760 !(eicr & IXGBE_EICR_LSC))
2763 if (!(eicr & IXGBE_EICR_LSC) && hw->mac.ops.check_link) {
2765 bool link_up = false;
2767 hw->mac.ops.check_link(hw, &speed, &link_up, false);
2773 /* Check if this is not due to overtemp */
2774 if (hw->phy.ops.check_overtemp(hw) != IXGBE_ERR_OVERTEMP)
2778 case IXGBE_DEV_ID_X550EM_A_1G_T:
2779 case IXGBE_DEV_ID_X550EM_A_1G_T_L:
2780 rc = hw->phy.ops.check_overtemp(hw);
2781 if (rc != IXGBE_ERR_OVERTEMP)
2785 if (adapter->hw.mac.type >= ixgbe_mac_X540)
2787 if (!(eicr & IXGBE_EICR_GPI_SDP0(hw)))
2791 e_crit(drv, "%s\n", ixgbe_overheat_msg);
2793 adapter->interrupt_event = 0;
2796 static void ixgbe_check_fan_failure(struct ixgbe_adapter *adapter, u32 eicr)
2798 struct ixgbe_hw *hw = &adapter->hw;
2800 if ((adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) &&
2801 (eicr & IXGBE_EICR_GPI_SDP1(hw))) {
2802 e_crit(probe, "Fan has stopped, replace the adapter\n");
2803 /* write to clear the interrupt */
2804 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1(hw));
2808 static void ixgbe_check_overtemp_event(struct ixgbe_adapter *adapter, u32 eicr)
2810 struct ixgbe_hw *hw = &adapter->hw;
2812 if (!(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE))
2815 switch (adapter->hw.mac.type) {
2816 case ixgbe_mac_82599EB:
2818 * Need to check link state so complete overtemp check
2821 if (((eicr & IXGBE_EICR_GPI_SDP0(hw)) ||
2822 (eicr & IXGBE_EICR_LSC)) &&
2823 (!test_bit(__IXGBE_DOWN, &adapter->state))) {
2824 adapter->interrupt_event = eicr;
2825 adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_EVENT;
2826 ixgbe_service_event_schedule(adapter);
2830 case ixgbe_mac_x550em_a:
2831 if (eicr & IXGBE_EICR_GPI_SDP0_X550EM_a) {
2832 adapter->interrupt_event = eicr;
2833 adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_EVENT;
2834 ixgbe_service_event_schedule(adapter);
2835 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC,
2836 IXGBE_EICR_GPI_SDP0_X550EM_a);
2837 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICR,
2838 IXGBE_EICR_GPI_SDP0_X550EM_a);
2841 case ixgbe_mac_X550:
2842 case ixgbe_mac_X540:
2843 if (!(eicr & IXGBE_EICR_TS))
2850 e_crit(drv, "%s\n", ixgbe_overheat_msg);
2853 static inline bool ixgbe_is_sfp(struct ixgbe_hw *hw)
2855 switch (hw->mac.type) {
2856 case ixgbe_mac_82598EB:
2857 if (hw->phy.type == ixgbe_phy_nl)
2860 case ixgbe_mac_82599EB:
2861 case ixgbe_mac_X550EM_x:
2862 case ixgbe_mac_x550em_a:
2863 switch (hw->mac.ops.get_media_type(hw)) {
2864 case ixgbe_media_type_fiber:
2865 case ixgbe_media_type_fiber_qsfp:
2875 static void ixgbe_check_sfp_event(struct ixgbe_adapter *adapter, u32 eicr)
2877 struct ixgbe_hw *hw = &adapter->hw;
2878 u32 eicr_mask = IXGBE_EICR_GPI_SDP2(hw);
2880 if (!ixgbe_is_sfp(hw))
2883 /* Later MAC's use different SDP */
2884 if (hw->mac.type >= ixgbe_mac_X540)
2885 eicr_mask = IXGBE_EICR_GPI_SDP0_X540;
2887 if (eicr & eicr_mask) {
2888 /* Clear the interrupt */
2889 IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr_mask);
2890 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2891 adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
2892 adapter->sfp_poll_time = 0;
2893 ixgbe_service_event_schedule(adapter);
2897 if (adapter->hw.mac.type == ixgbe_mac_82599EB &&
2898 (eicr & IXGBE_EICR_GPI_SDP1(hw))) {
2899 /* Clear the interrupt */
2900 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1(hw));
2901 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2902 adapter->flags |= IXGBE_FLAG_NEED_LINK_CONFIG;
2903 ixgbe_service_event_schedule(adapter);
2908 static void ixgbe_check_lsc(struct ixgbe_adapter *adapter)
2910 struct ixgbe_hw *hw = &adapter->hw;
2913 adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
2914 adapter->link_check_timeout = jiffies;
2915 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2916 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_LSC);
2917 IXGBE_WRITE_FLUSH(hw);
2918 ixgbe_service_event_schedule(adapter);
2922 static inline void ixgbe_irq_enable_queues(struct ixgbe_adapter *adapter,
2926 struct ixgbe_hw *hw = &adapter->hw;
2928 switch (hw->mac.type) {
2929 case ixgbe_mac_82598EB:
2930 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
2931 IXGBE_WRITE_REG(hw, IXGBE_EIMS, mask);
2933 case ixgbe_mac_82599EB:
2934 case ixgbe_mac_X540:
2935 case ixgbe_mac_X550:
2936 case ixgbe_mac_X550EM_x:
2937 case ixgbe_mac_x550em_a:
2938 mask = (qmask & 0xFFFFFFFF);
2940 IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(0), mask);
2941 mask = (qmask >> 32);
2943 IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(1), mask);
2948 /* skip the flush */
2951 static inline void ixgbe_irq_disable_queues(struct ixgbe_adapter *adapter,
2955 struct ixgbe_hw *hw = &adapter->hw;
2957 switch (hw->mac.type) {
2958 case ixgbe_mac_82598EB:
2959 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
2960 IXGBE_WRITE_REG(hw, IXGBE_EIMC, mask);
2962 case ixgbe_mac_82599EB:
2963 case ixgbe_mac_X540:
2964 case ixgbe_mac_X550:
2965 case ixgbe_mac_X550EM_x:
2966 case ixgbe_mac_x550em_a:
2967 mask = (qmask & 0xFFFFFFFF);
2969 IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(0), mask);
2970 mask = (qmask >> 32);
2972 IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(1), mask);
2977 /* skip the flush */
2981 * ixgbe_irq_enable - Enable default interrupt generation settings
2982 * @adapter: board private structure
2983 * @queues: enable irqs for queues
2984 * @flush: flush register write
2986 static inline void ixgbe_irq_enable(struct ixgbe_adapter *adapter, bool queues,
2989 struct ixgbe_hw *hw = &adapter->hw;
2990 u32 mask = (IXGBE_EIMS_ENABLE_MASK & ~IXGBE_EIMS_RTX_QUEUE);
2992 /* don't reenable LSC while waiting for link */
2993 if (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE)
2994 mask &= ~IXGBE_EIMS_LSC;
2996 if (adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE)
2997 switch (adapter->hw.mac.type) {
2998 case ixgbe_mac_82599EB:
2999 mask |= IXGBE_EIMS_GPI_SDP0(hw);
3001 case ixgbe_mac_X540:
3002 case ixgbe_mac_X550:
3003 case ixgbe_mac_X550EM_x:
3004 case ixgbe_mac_x550em_a:
3005 mask |= IXGBE_EIMS_TS;
3010 if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE)
3011 mask |= IXGBE_EIMS_GPI_SDP1(hw);
3012 switch (adapter->hw.mac.type) {
3013 case ixgbe_mac_82599EB:
3014 mask |= IXGBE_EIMS_GPI_SDP1(hw);
3015 mask |= IXGBE_EIMS_GPI_SDP2(hw);
3017 case ixgbe_mac_X540:
3018 case ixgbe_mac_X550:
3019 case ixgbe_mac_X550EM_x:
3020 case ixgbe_mac_x550em_a:
3021 if (adapter->hw.device_id == IXGBE_DEV_ID_X550EM_X_SFP ||
3022 adapter->hw.device_id == IXGBE_DEV_ID_X550EM_A_SFP ||
3023 adapter->hw.device_id == IXGBE_DEV_ID_X550EM_A_SFP_N)
3024 mask |= IXGBE_EIMS_GPI_SDP0(&adapter->hw);
3025 if (adapter->hw.phy.type == ixgbe_phy_x550em_ext_t)
3026 mask |= IXGBE_EICR_GPI_SDP0_X540;
3027 mask |= IXGBE_EIMS_ECC;
3028 mask |= IXGBE_EIMS_MAILBOX;
3034 if ((adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) &&
3035 !(adapter->flags2 & IXGBE_FLAG2_FDIR_REQUIRES_REINIT))
3036 mask |= IXGBE_EIMS_FLOW_DIR;
3038 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, mask);
3040 ixgbe_irq_enable_queues(adapter, ~0);
3042 IXGBE_WRITE_FLUSH(&adapter->hw);
3045 static irqreturn_t ixgbe_msix_other(int irq, void *data)
3047 struct ixgbe_adapter *adapter = data;
3048 struct ixgbe_hw *hw = &adapter->hw;
3052 * Workaround for Silicon errata. Use clear-by-write instead
3053 * of clear-by-read. Reading with EICS will return the
3054 * interrupt causes without clearing, which later be done
3055 * with the write to EICR.
3057 eicr = IXGBE_READ_REG(hw, IXGBE_EICS);
3059 /* The lower 16bits of the EICR register are for the queue interrupts
3060 * which should be masked here in order to not accidentally clear them if
3061 * the bits are high when ixgbe_msix_other is called. There is a race
3062 * condition otherwise which results in possible performance loss
3063 * especially if the ixgbe_msix_other interrupt is triggering
3064 * consistently (as it would when PPS is turned on for the X540 device)
3068 IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr);
3070 if (eicr & IXGBE_EICR_LSC)
3071 ixgbe_check_lsc(adapter);
3073 if (eicr & IXGBE_EICR_MAILBOX)
3074 ixgbe_msg_task(adapter);
3076 switch (hw->mac.type) {
3077 case ixgbe_mac_82599EB:
3078 case ixgbe_mac_X540:
3079 case ixgbe_mac_X550:
3080 case ixgbe_mac_X550EM_x:
3081 case ixgbe_mac_x550em_a:
3082 if (hw->phy.type == ixgbe_phy_x550em_ext_t &&
3083 (eicr & IXGBE_EICR_GPI_SDP0_X540)) {
3084 adapter->flags2 |= IXGBE_FLAG2_PHY_INTERRUPT;
3085 ixgbe_service_event_schedule(adapter);
3086 IXGBE_WRITE_REG(hw, IXGBE_EICR,
3087 IXGBE_EICR_GPI_SDP0_X540);
3089 if (eicr & IXGBE_EICR_ECC) {
3090 e_info(link, "Received ECC Err, initiating reset\n");
3091 set_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
3092 ixgbe_service_event_schedule(adapter);
3093 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_ECC);
3095 /* Handle Flow Director Full threshold interrupt */
3096 if (eicr & IXGBE_EICR_FLOW_DIR) {
3097 int reinit_count = 0;
3099 for (i = 0; i < adapter->num_tx_queues; i++) {
3100 struct ixgbe_ring *ring = adapter->tx_ring[i];
3101 if (test_and_clear_bit(__IXGBE_TX_FDIR_INIT_DONE,
3106 /* no more flow director interrupts until after init */
3107 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_FLOW_DIR);
3108 adapter->flags2 |= IXGBE_FLAG2_FDIR_REQUIRES_REINIT;
3109 ixgbe_service_event_schedule(adapter);
3112 ixgbe_check_sfp_event(adapter, eicr);
3113 ixgbe_check_overtemp_event(adapter, eicr);
3119 ixgbe_check_fan_failure(adapter, eicr);
3121 if (unlikely(eicr & IXGBE_EICR_TIMESYNC))
3122 ixgbe_ptp_check_pps_event(adapter);
3124 /* re-enable the original interrupt state, no lsc, no queues */
3125 if (!test_bit(__IXGBE_DOWN, &adapter->state))
3126 ixgbe_irq_enable(adapter, false, false);
3131 static irqreturn_t ixgbe_msix_clean_rings(int irq, void *data)
3133 struct ixgbe_q_vector *q_vector = data;
3135 /* EIAM disabled interrupts (on this vector) for us */
3137 if (q_vector->rx.ring || q_vector->tx.ring)
3138 napi_schedule_irqoff(&q_vector->napi);
3144 * ixgbe_poll - NAPI Rx polling callback
3145 * @napi: structure for representing this polling device
3146 * @budget: how many packets driver is allowed to clean
3148 * This function is used for legacy and MSI, NAPI mode
3150 int ixgbe_poll(struct napi_struct *napi, int budget)
3152 struct ixgbe_q_vector *q_vector =
3153 container_of(napi, struct ixgbe_q_vector, napi);
3154 struct ixgbe_adapter *adapter = q_vector->adapter;
3155 struct ixgbe_ring *ring;
3156 int per_ring_budget, work_done = 0;
3157 bool clean_complete = true;
3159 #ifdef CONFIG_IXGBE_DCA
3160 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
3161 ixgbe_update_dca(q_vector);
3164 ixgbe_for_each_ring(ring, q_vector->tx) {
3165 bool wd = ring->xsk_umem ?
3166 ixgbe_clean_xdp_tx_irq(q_vector, ring, budget) :
3167 ixgbe_clean_tx_irq(q_vector, ring, budget);
3170 clean_complete = false;
3173 /* Exit if we are called by netpoll */
3177 /* attempt to distribute budget to each queue fairly, but don't allow
3178 * the budget to go below 1 because we'll exit polling */
3179 if (q_vector->rx.count > 1)
3180 per_ring_budget = max(budget/q_vector->rx.count, 1);
3182 per_ring_budget = budget;
3184 ixgbe_for_each_ring(ring, q_vector->rx) {
3185 int cleaned = ring->xsk_umem ?
3186 ixgbe_clean_rx_irq_zc(q_vector, ring,
3188 ixgbe_clean_rx_irq(q_vector, ring,
3191 work_done += cleaned;
3192 if (cleaned >= per_ring_budget)
3193 clean_complete = false;
3196 /* If all work not completed, return budget and keep polling */
3197 if (!clean_complete)
3200 /* all work done, exit the polling mode */
3201 if (likely(napi_complete_done(napi, work_done))) {
3202 if (adapter->rx_itr_setting & 1)
3203 ixgbe_set_itr(q_vector);
3204 if (!test_bit(__IXGBE_DOWN, &adapter->state))
3205 ixgbe_irq_enable_queues(adapter,
3206 BIT_ULL(q_vector->v_idx));
3209 return min(work_done, budget - 1);
3213 * ixgbe_request_msix_irqs - Initialize MSI-X interrupts
3214 * @adapter: board private structure
3216 * ixgbe_request_msix_irqs allocates MSI-X vectors and requests
3217 * interrupts from the kernel.
3219 static int ixgbe_request_msix_irqs(struct ixgbe_adapter *adapter)
3221 struct net_device *netdev = adapter->netdev;
3222 unsigned int ri = 0, ti = 0;
3225 for (vector = 0; vector < adapter->num_q_vectors; vector++) {
3226 struct ixgbe_q_vector *q_vector = adapter->q_vector[vector];
3227 struct msix_entry *entry = &adapter->msix_entries[vector];
3229 if (q_vector->tx.ring && q_vector->rx.ring) {
3230 snprintf(q_vector->name, sizeof(q_vector->name),
3231 "%s-TxRx-%u", netdev->name, ri++);
3233 } else if (q_vector->rx.ring) {
3234 snprintf(q_vector->name, sizeof(q_vector->name),
3235 "%s-rx-%u", netdev->name, ri++);
3236 } else if (q_vector->tx.ring) {
3237 snprintf(q_vector->name, sizeof(q_vector->name),
3238 "%s-tx-%u", netdev->name, ti++);
3240 /* skip this unused q_vector */
3243 err = request_irq(entry->vector, &ixgbe_msix_clean_rings, 0,
3244 q_vector->name, q_vector);
3246 e_err(probe, "request_irq failed for MSIX interrupt "
3247 "Error: %d\n", err);
3248 goto free_queue_irqs;
3250 /* If Flow Director is enabled, set interrupt affinity */
3251 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
3252 /* assign the mask for this irq */
3253 irq_set_affinity_hint(entry->vector,
3254 &q_vector->affinity_mask);
3258 err = request_irq(adapter->msix_entries[vector].vector,
3259 ixgbe_msix_other, 0, netdev->name, adapter);
3261 e_err(probe, "request_irq for msix_other failed: %d\n", err);
3262 goto free_queue_irqs;
3270 irq_set_affinity_hint(adapter->msix_entries[vector].vector,
3272 free_irq(adapter->msix_entries[vector].vector,
3273 adapter->q_vector[vector]);
3275 adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
3276 pci_disable_msix(adapter->pdev);
3277 kfree(adapter->msix_entries);
3278 adapter->msix_entries = NULL;
3283 * ixgbe_intr - legacy mode Interrupt Handler
3284 * @irq: interrupt number
3285 * @data: pointer to a network interface device structure
3287 static irqreturn_t ixgbe_intr(int irq, void *data)
3289 struct ixgbe_adapter *adapter = data;
3290 struct ixgbe_hw *hw = &adapter->hw;
3291 struct ixgbe_q_vector *q_vector = adapter->q_vector[0];
3295 * Workaround for silicon errata #26 on 82598. Mask the interrupt
3296 * before the read of EICR.
3298 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_IRQ_CLEAR_MASK);
3300 /* for NAPI, using EIAM to auto-mask tx/rx interrupt bits on read
3301 * therefore no explicit interrupt disable is necessary */
3302 eicr = IXGBE_READ_REG(hw, IXGBE_EICR);
3305 * shared interrupt alert!
3306 * make sure interrupts are enabled because the read will
3307 * have disabled interrupts due to EIAM
3308 * finish the workaround of silicon errata on 82598. Unmask
3309 * the interrupt that we masked before the EICR read.
3311 if (!test_bit(__IXGBE_DOWN, &adapter->state))
3312 ixgbe_irq_enable(adapter, true, true);
3313 return IRQ_NONE; /* Not our interrupt */
3316 if (eicr & IXGBE_EICR_LSC)
3317 ixgbe_check_lsc(adapter);
3319 switch (hw->mac.type) {
3320 case ixgbe_mac_82599EB:
3321 ixgbe_check_sfp_event(adapter, eicr);
3323 case ixgbe_mac_X540:
3324 case ixgbe_mac_X550:
3325 case ixgbe_mac_X550EM_x:
3326 case ixgbe_mac_x550em_a:
3327 if (eicr & IXGBE_EICR_ECC) {
3328 e_info(link, "Received ECC Err, initiating reset\n");
3329 set_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
3330 ixgbe_service_event_schedule(adapter);
3331 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_ECC);
3333 ixgbe_check_overtemp_event(adapter, eicr);
3339 ixgbe_check_fan_failure(adapter, eicr);
3340 if (unlikely(eicr & IXGBE_EICR_TIMESYNC))
3341 ixgbe_ptp_check_pps_event(adapter);
3343 /* would disable interrupts here but EIAM disabled it */
3344 napi_schedule_irqoff(&q_vector->napi);
3347 * re-enable link(maybe) and non-queue interrupts, no flush.
3348 * ixgbe_poll will re-enable the queue interrupts
3350 if (!test_bit(__IXGBE_DOWN, &adapter->state))
3351 ixgbe_irq_enable(adapter, false, false);
3357 * ixgbe_request_irq - initialize interrupts
3358 * @adapter: board private structure
3360 * Attempts to configure interrupts using the best available
3361 * capabilities of the hardware and kernel.
3363 static int ixgbe_request_irq(struct ixgbe_adapter *adapter)
3365 struct net_device *netdev = adapter->netdev;
3368 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
3369 err = ixgbe_request_msix_irqs(adapter);
3370 else if (adapter->flags & IXGBE_FLAG_MSI_ENABLED)
3371 err = request_irq(adapter->pdev->irq, ixgbe_intr, 0,
3372 netdev->name, adapter);
3374 err = request_irq(adapter->pdev->irq, ixgbe_intr, IRQF_SHARED,
3375 netdev->name, adapter);
3378 e_err(probe, "request_irq failed, Error %d\n", err);
3383 static void ixgbe_free_irq(struct ixgbe_adapter *adapter)
3387 if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
3388 free_irq(adapter->pdev->irq, adapter);
3392 if (!adapter->msix_entries)
3395 for (vector = 0; vector < adapter->num_q_vectors; vector++) {
3396 struct ixgbe_q_vector *q_vector = adapter->q_vector[vector];
3397 struct msix_entry *entry = &adapter->msix_entries[vector];
3399 /* free only the irqs that were actually requested */
3400 if (!q_vector->rx.ring && !q_vector->tx.ring)
3403 /* clear the affinity_mask in the IRQ descriptor */
3404 irq_set_affinity_hint(entry->vector, NULL);
3406 free_irq(entry->vector, q_vector);
3409 free_irq(adapter->msix_entries[vector].vector, adapter);
3413 * ixgbe_irq_disable - Mask off interrupt generation on the NIC
3414 * @adapter: board private structure
3416 static inline void ixgbe_irq_disable(struct ixgbe_adapter *adapter)
3418 switch (adapter->hw.mac.type) {
3419 case ixgbe_mac_82598EB:
3420 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, ~0);
3422 case ixgbe_mac_82599EB:
3423 case ixgbe_mac_X540:
3424 case ixgbe_mac_X550:
3425 case ixgbe_mac_X550EM_x:
3426 case ixgbe_mac_x550em_a:
3427 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFF0000);
3428 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(0), ~0);
3429 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(1), ~0);
3434 IXGBE_WRITE_FLUSH(&adapter->hw);
3435 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
3438 for (vector = 0; vector < adapter->num_q_vectors; vector++)
3439 synchronize_irq(adapter->msix_entries[vector].vector);
3441 synchronize_irq(adapter->msix_entries[vector++].vector);
3443 synchronize_irq(adapter->pdev->irq);
3448 * ixgbe_configure_msi_and_legacy - Initialize PIN (INTA...) and MSI interrupts
3449 * @adapter: board private structure
3452 static void ixgbe_configure_msi_and_legacy(struct ixgbe_adapter *adapter)
3454 struct ixgbe_q_vector *q_vector = adapter->q_vector[0];
3456 ixgbe_write_eitr(q_vector);
3458 ixgbe_set_ivar(adapter, 0, 0, 0);
3459 ixgbe_set_ivar(adapter, 1, 0, 0);
3461 e_info(hw, "Legacy interrupt IVAR setup done\n");
3465 * ixgbe_configure_tx_ring - Configure 8259x Tx ring after Reset
3466 * @adapter: board private structure
3467 * @ring: structure containing ring specific data
3469 * Configure the Tx descriptor ring after a reset.
3471 void ixgbe_configure_tx_ring(struct ixgbe_adapter *adapter,
3472 struct ixgbe_ring *ring)
3474 struct ixgbe_hw *hw = &adapter->hw;
3475 u64 tdba = ring->dma;
3477 u32 txdctl = IXGBE_TXDCTL_ENABLE;
3478 u8 reg_idx = ring->reg_idx;
3480 ring->xsk_umem = NULL;
3481 if (ring_is_xdp(ring))
3482 ring->xsk_umem = ixgbe_xsk_umem(adapter, ring);
3484 /* disable queue to avoid issues while updating state */
3485 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), 0);
3486 IXGBE_WRITE_FLUSH(hw);
3488 IXGBE_WRITE_REG(hw, IXGBE_TDBAL(reg_idx),
3489 (tdba & DMA_BIT_MASK(32)));
3490 IXGBE_WRITE_REG(hw, IXGBE_TDBAH(reg_idx), (tdba >> 32));
3491 IXGBE_WRITE_REG(hw, IXGBE_TDLEN(reg_idx),
3492 ring->count * sizeof(union ixgbe_adv_tx_desc));
3493 IXGBE_WRITE_REG(hw, IXGBE_TDH(reg_idx), 0);
3494 IXGBE_WRITE_REG(hw, IXGBE_TDT(reg_idx), 0);
3495 ring->tail = adapter->io_addr + IXGBE_TDT(reg_idx);
3498 * set WTHRESH to encourage burst writeback, it should not be set
3499 * higher than 1 when:
3500 * - ITR is 0 as it could cause false TX hangs
3501 * - ITR is set to > 100k int/sec and BQL is enabled
3503 * In order to avoid issues WTHRESH + PTHRESH should always be equal
3504 * to or less than the number of on chip descriptors, which is
3507 if (!ring->q_vector || (ring->q_vector->itr < IXGBE_100K_ITR))
3508 txdctl |= 1u << 16; /* WTHRESH = 1 */
3510 txdctl |= 8u << 16; /* WTHRESH = 8 */
3513 * Setting PTHRESH to 32 both improves performance
3514 * and avoids a TX hang with DFP enabled
3516 txdctl |= (1u << 8) | /* HTHRESH = 1 */
3517 32; /* PTHRESH = 32 */
3519 /* reinitialize flowdirector state */
3520 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
3521 ring->atr_sample_rate = adapter->atr_sample_rate;
3522 ring->atr_count = 0;
3523 set_bit(__IXGBE_TX_FDIR_INIT_DONE, &ring->state);
3525 ring->atr_sample_rate = 0;
3528 /* initialize XPS */
3529 if (!test_and_set_bit(__IXGBE_TX_XPS_INIT_DONE, &ring->state)) {
3530 struct ixgbe_q_vector *q_vector = ring->q_vector;
3533 netif_set_xps_queue(ring->netdev,
3534 &q_vector->affinity_mask,
3538 clear_bit(__IXGBE_HANG_CHECK_ARMED, &ring->state);
3540 /* reinitialize tx_buffer_info */
3541 memset(ring->tx_buffer_info, 0,
3542 sizeof(struct ixgbe_tx_buffer) * ring->count);
3545 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), txdctl);
3547 /* TXDCTL.EN will return 0 on 82598 if link is down, so skip it */
3548 if (hw->mac.type == ixgbe_mac_82598EB &&
3549 !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
3552 /* poll to verify queue is enabled */
3554 usleep_range(1000, 2000);
3555 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(reg_idx));
3556 } while (--wait_loop && !(txdctl & IXGBE_TXDCTL_ENABLE));
3558 hw_dbg(hw, "Could not enable Tx Queue %d\n", reg_idx);
3561 static void ixgbe_setup_mtqc(struct ixgbe_adapter *adapter)
3563 struct ixgbe_hw *hw = &adapter->hw;
3565 u8 tcs = adapter->hw_tcs;
3567 if (hw->mac.type == ixgbe_mac_82598EB)
3570 /* disable the arbiter while setting MTQC */
3571 rttdcs = IXGBE_READ_REG(hw, IXGBE_RTTDCS);
3572 rttdcs |= IXGBE_RTTDCS_ARBDIS;
3573 IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs);
3575 /* set transmit pool layout */
3576 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
3577 mtqc = IXGBE_MTQC_VT_ENA;
3579 mtqc |= IXGBE_MTQC_RT_ENA | IXGBE_MTQC_8TC_8TQ;
3581 mtqc |= IXGBE_MTQC_RT_ENA | IXGBE_MTQC_4TC_4TQ;
3582 else if (adapter->ring_feature[RING_F_VMDQ].mask ==
3583 IXGBE_82599_VMDQ_4Q_MASK)
3584 mtqc |= IXGBE_MTQC_32VF;
3586 mtqc |= IXGBE_MTQC_64VF;
3589 mtqc = IXGBE_MTQC_RT_ENA | IXGBE_MTQC_8TC_8TQ;
3590 } else if (tcs > 1) {
3591 mtqc = IXGBE_MTQC_RT_ENA | IXGBE_MTQC_4TC_4TQ;
3593 u8 max_txq = adapter->num_tx_queues +
3594 adapter->num_xdp_queues;
3596 mtqc = IXGBE_MTQC_RT_ENA | IXGBE_MTQC_4TC_4TQ;
3598 mtqc = IXGBE_MTQC_64Q_1PB;
3602 IXGBE_WRITE_REG(hw, IXGBE_MTQC, mtqc);
3604 /* Enable Security TX Buffer IFG for multiple pb */
3606 u32 sectx = IXGBE_READ_REG(hw, IXGBE_SECTXMINIFG);
3607 sectx |= IXGBE_SECTX_DCB;
3608 IXGBE_WRITE_REG(hw, IXGBE_SECTXMINIFG, sectx);
3611 /* re-enable the arbiter */
3612 rttdcs &= ~IXGBE_RTTDCS_ARBDIS;
3613 IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs);
3617 * ixgbe_configure_tx - Configure 8259x Transmit Unit after Reset
3618 * @adapter: board private structure
3620 * Configure the Tx unit of the MAC after a reset.
3622 static void ixgbe_configure_tx(struct ixgbe_adapter *adapter)
3624 struct ixgbe_hw *hw = &adapter->hw;
3628 ixgbe_setup_mtqc(adapter);
3630 if (hw->mac.type != ixgbe_mac_82598EB) {
3631 /* DMATXCTL.EN must be before Tx queues are enabled */
3632 dmatxctl = IXGBE_READ_REG(hw, IXGBE_DMATXCTL);
3633 dmatxctl |= IXGBE_DMATXCTL_TE;
3634 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL, dmatxctl);
3637 /* Setup the HW Tx Head and Tail descriptor pointers */
3638 for (i = 0; i < adapter->num_tx_queues; i++)
3639 ixgbe_configure_tx_ring(adapter, adapter->tx_ring[i]);
3640 for (i = 0; i < adapter->num_xdp_queues; i++)
3641 ixgbe_configure_tx_ring(adapter, adapter->xdp_ring[i]);
3644 static void ixgbe_enable_rx_drop(struct ixgbe_adapter *adapter,
3645 struct ixgbe_ring *ring)
3647 struct ixgbe_hw *hw = &adapter->hw;
3648 u8 reg_idx = ring->reg_idx;
3649 u32 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(reg_idx));
3651 srrctl |= IXGBE_SRRCTL_DROP_EN;
3653 IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
3656 static void ixgbe_disable_rx_drop(struct ixgbe_adapter *adapter,
3657 struct ixgbe_ring *ring)
3659 struct ixgbe_hw *hw = &adapter->hw;
3660 u8 reg_idx = ring->reg_idx;
3661 u32 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(reg_idx));
3663 srrctl &= ~IXGBE_SRRCTL_DROP_EN;
3665 IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
3668 #ifdef CONFIG_IXGBE_DCB
3669 void ixgbe_set_rx_drop_en(struct ixgbe_adapter *adapter)
3671 static void ixgbe_set_rx_drop_en(struct ixgbe_adapter *adapter)
3675 bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
3677 if (adapter->ixgbe_ieee_pfc)
3678 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
3681 * We should set the drop enable bit if:
3684 * Number of Rx queues > 1 and flow control is disabled
3686 * This allows us to avoid head of line blocking for security
3687 * and performance reasons.
3689 if (adapter->num_vfs || (adapter->num_rx_queues > 1 &&
3690 !(adapter->hw.fc.current_mode & ixgbe_fc_tx_pause) && !pfc_en)) {
3691 for (i = 0; i < adapter->num_rx_queues; i++)
3692 ixgbe_enable_rx_drop(adapter, adapter->rx_ring[i]);
3694 for (i = 0; i < adapter->num_rx_queues; i++)
3695 ixgbe_disable_rx_drop(adapter, adapter->rx_ring[i]);
3699 #define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
3701 static void ixgbe_configure_srrctl(struct ixgbe_adapter *adapter,
3702 struct ixgbe_ring *rx_ring)
3704 struct ixgbe_hw *hw = &adapter->hw;
3706 u8 reg_idx = rx_ring->reg_idx;
3708 if (hw->mac.type == ixgbe_mac_82598EB) {
3709 u16 mask = adapter->ring_feature[RING_F_RSS].mask;
3712 * if VMDq is not active we must program one srrctl register
3713 * per RSS queue since we have enabled RDRXCTL.MVMEN
3718 /* configure header buffer length, needed for RSC */
3719 srrctl = IXGBE_RX_HDR_SIZE << IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT;
3721 /* configure the packet buffer length */
3722 if (rx_ring->xsk_umem) {
3723 u32 xsk_buf_len = rx_ring->xsk_umem->chunk_size_nohr -
3724 XDP_PACKET_HEADROOM;
3726 /* If the MAC support setting RXDCTL.RLPML, the
3727 * SRRCTL[n].BSIZEPKT is set to PAGE_SIZE and
3728 * RXDCTL.RLPML is set to the actual UMEM buffer
3729 * size. If not, then we are stuck with a 1k buffer
3730 * size resolution. In this case frames larger than
3731 * the UMEM buffer size viewed in a 1k resolution will
3734 if (hw->mac.type != ixgbe_mac_82599EB)
3735 srrctl |= PAGE_SIZE >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
3737 srrctl |= xsk_buf_len >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
3738 } else if (test_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state)) {
3739 srrctl |= IXGBE_RXBUFFER_3K >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
3741 srrctl |= IXGBE_RXBUFFER_2K >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
3744 /* configure descriptor type */
3745 srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF;
3747 IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
3751 * ixgbe_rss_indir_tbl_entries - Return RSS indirection table entries
3752 * @adapter: device handle
3754 * - 82598/82599/X540: 128
3755 * - X550(non-SRIOV mode): 512
3756 * - X550(SRIOV mode): 64
3758 u32 ixgbe_rss_indir_tbl_entries(struct ixgbe_adapter *adapter)
3760 if (adapter->hw.mac.type < ixgbe_mac_X550)
3762 else if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
3769 * ixgbe_store_key - Write the RSS key to HW
3770 * @adapter: device handle
3772 * Write the RSS key stored in adapter.rss_key to HW.
3774 void ixgbe_store_key(struct ixgbe_adapter *adapter)
3776 struct ixgbe_hw *hw = &adapter->hw;
3779 for (i = 0; i < 10; i++)
3780 IXGBE_WRITE_REG(hw, IXGBE_RSSRK(i), adapter->rss_key[i]);
3784 * ixgbe_init_rss_key - Initialize adapter RSS key
3785 * @adapter: device handle
3787 * Allocates and initializes the RSS key if it is not allocated.
3789 static inline int ixgbe_init_rss_key(struct ixgbe_adapter *adapter)
3793 if (!adapter->rss_key) {
3794 rss_key = kzalloc(IXGBE_RSS_KEY_SIZE, GFP_KERNEL);
3795 if (unlikely(!rss_key))
3798 netdev_rss_key_fill(rss_key, IXGBE_RSS_KEY_SIZE);
3799 adapter->rss_key = rss_key;
3806 * ixgbe_store_reta - Write the RETA table to HW
3807 * @adapter: device handle
3809 * Write the RSS redirection table stored in adapter.rss_indir_tbl[] to HW.
3811 void ixgbe_store_reta(struct ixgbe_adapter *adapter)
3813 u32 i, reta_entries = ixgbe_rss_indir_tbl_entries(adapter);
3814 struct ixgbe_hw *hw = &adapter->hw;
3817 u8 *indir_tbl = adapter->rss_indir_tbl;
3819 /* Fill out the redirection table as follows:
3820 * - 82598: 8 bit wide entries containing pair of 4 bit RSS
3822 * - 82599/X540: 8 bit wide entries containing 4 bit RSS index
3823 * - X550: 8 bit wide entries containing 6 bit RSS index
3825 if (adapter->hw.mac.type == ixgbe_mac_82598EB)
3826 indices_multi = 0x11;
3828 indices_multi = 0x1;
3830 /* Write redirection table to HW */
3831 for (i = 0; i < reta_entries; i++) {
3832 reta |= indices_multi * indir_tbl[i] << (i & 0x3) * 8;
3835 IXGBE_WRITE_REG(hw, IXGBE_RETA(i >> 2), reta);
3837 IXGBE_WRITE_REG(hw, IXGBE_ERETA((i >> 2) - 32),
3845 * ixgbe_store_vfreta - Write the RETA table to HW (x550 devices in SRIOV mode)
3846 * @adapter: device handle
3848 * Write the RSS redirection table stored in adapter.rss_indir_tbl[] to HW.
3850 static void ixgbe_store_vfreta(struct ixgbe_adapter *adapter)
3852 u32 i, reta_entries = ixgbe_rss_indir_tbl_entries(adapter);
3853 struct ixgbe_hw *hw = &adapter->hw;
3856 /* Write redirection table to HW */
3857 for (i = 0; i < reta_entries; i++) {
3858 u16 pool = adapter->num_rx_pools;
3860 vfreta |= (u32)adapter->rss_indir_tbl[i] << (i & 0x3) * 8;
3866 IXGBE_PFVFRETA(i >> 2, VMDQ_P(pool)),
3872 static void ixgbe_setup_reta(struct ixgbe_adapter *adapter)
3875 u32 reta_entries = ixgbe_rss_indir_tbl_entries(adapter);
3876 u16 rss_i = adapter->ring_feature[RING_F_RSS].indices;
3878 /* Program table for at least 4 queues w/ SR-IOV so that VFs can
3879 * make full use of any rings they may have. We will use the
3880 * PSRTYPE register to control how many rings we use within the PF.
3882 if ((adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) && (rss_i < 4))
3885 /* Fill out hash function seeds */
3886 ixgbe_store_key(adapter);
3888 /* Fill out redirection table */
3889 memset(adapter->rss_indir_tbl, 0, sizeof(adapter->rss_indir_tbl));
3891 for (i = 0, j = 0; i < reta_entries; i++, j++) {
3895 adapter->rss_indir_tbl[i] = j;
3898 ixgbe_store_reta(adapter);
3901 static void ixgbe_setup_vfreta(struct ixgbe_adapter *adapter)
3903 struct ixgbe_hw *hw = &adapter->hw;
3904 u16 rss_i = adapter->ring_feature[RING_F_RSS].indices;
3907 /* Fill out hash function seeds */
3908 for (i = 0; i < 10; i++) {
3909 u16 pool = adapter->num_rx_pools;
3913 IXGBE_PFVFRSSRK(i, VMDQ_P(pool)),
3914 *(adapter->rss_key + i));
3917 /* Fill out the redirection table */
3918 for (i = 0, j = 0; i < 64; i++, j++) {
3922 adapter->rss_indir_tbl[i] = j;
3925 ixgbe_store_vfreta(adapter);
3928 static void ixgbe_setup_mrqc(struct ixgbe_adapter *adapter)
3930 struct ixgbe_hw *hw = &adapter->hw;
3931 u32 mrqc = 0, rss_field = 0, vfmrqc = 0;
3934 /* Disable indicating checksum in descriptor, enables RSS hash */
3935 rxcsum = IXGBE_READ_REG(hw, IXGBE_RXCSUM);
3936 rxcsum |= IXGBE_RXCSUM_PCSD;
3937 IXGBE_WRITE_REG(hw, IXGBE_RXCSUM, rxcsum);
3939 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
3940 if (adapter->ring_feature[RING_F_RSS].mask)
3941 mrqc = IXGBE_MRQC_RSSEN;
3943 u8 tcs = adapter->hw_tcs;
3945 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
3947 mrqc = IXGBE_MRQC_VMDQRT8TCEN; /* 8 TCs */
3949 mrqc = IXGBE_MRQC_VMDQRT4TCEN; /* 4 TCs */
3950 else if (adapter->ring_feature[RING_F_VMDQ].mask ==
3951 IXGBE_82599_VMDQ_4Q_MASK)
3952 mrqc = IXGBE_MRQC_VMDQRSS32EN;
3954 mrqc = IXGBE_MRQC_VMDQRSS64EN;
3956 /* Enable L3/L4 for Tx Switched packets */
3957 mrqc |= IXGBE_MRQC_L3L4TXSWEN;
3960 mrqc = IXGBE_MRQC_RTRSS8TCEN;
3962 mrqc = IXGBE_MRQC_RTRSS4TCEN;
3964 mrqc = IXGBE_MRQC_RSSEN;
3968 /* Perform hash on these packet types */
3969 rss_field |= IXGBE_MRQC_RSS_FIELD_IPV4 |
3970 IXGBE_MRQC_RSS_FIELD_IPV4_TCP |
3971 IXGBE_MRQC_RSS_FIELD_IPV6 |
3972 IXGBE_MRQC_RSS_FIELD_IPV6_TCP;
3974 if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV4_UDP)
3975 rss_field |= IXGBE_MRQC_RSS_FIELD_IPV4_UDP;
3976 if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV6_UDP)
3977 rss_field |= IXGBE_MRQC_RSS_FIELD_IPV6_UDP;
3979 if ((hw->mac.type >= ixgbe_mac_X550) &&
3980 (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)) {
3981 u16 pool = adapter->num_rx_pools;
3983 /* Enable VF RSS mode */
3984 mrqc |= IXGBE_MRQC_MULTIPLE_RSS;
3985 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
3987 /* Setup RSS through the VF registers */
3988 ixgbe_setup_vfreta(adapter);
3989 vfmrqc = IXGBE_MRQC_RSSEN;
3990 vfmrqc |= rss_field;
3994 IXGBE_PFVFMRQC(VMDQ_P(pool)),
3997 ixgbe_setup_reta(adapter);
3999 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
4004 * ixgbe_configure_rscctl - enable RSC for the indicated ring
4005 * @adapter: address of board private structure
4006 * @ring: structure containing ring specific data
4008 static void ixgbe_configure_rscctl(struct ixgbe_adapter *adapter,
4009 struct ixgbe_ring *ring)
4011 struct ixgbe_hw *hw = &adapter->hw;
4013 u8 reg_idx = ring->reg_idx;
4015 if (!ring_is_rsc_enabled(ring))
4018 rscctrl = IXGBE_READ_REG(hw, IXGBE_RSCCTL(reg_idx));
4019 rscctrl |= IXGBE_RSCCTL_RSCEN;
4021 * we must limit the number of descriptors so that the
4022 * total size of max desc * buf_len is not greater
4025 rscctrl |= IXGBE_RSCCTL_MAXDESC_16;
4026 IXGBE_WRITE_REG(hw, IXGBE_RSCCTL(reg_idx), rscctrl);
4029 #define IXGBE_MAX_RX_DESC_POLL 10
4030 static void ixgbe_rx_desc_queue_enable(struct ixgbe_adapter *adapter,
4031 struct ixgbe_ring *ring)
4033 struct ixgbe_hw *hw = &adapter->hw;
4034 int wait_loop = IXGBE_MAX_RX_DESC_POLL;
4036 u8 reg_idx = ring->reg_idx;
4038 if (ixgbe_removed(hw->hw_addr))
4040 /* RXDCTL.EN will return 0 on 82598 if link is down, so skip it */
4041 if (hw->mac.type == ixgbe_mac_82598EB &&
4042 !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
4046 usleep_range(1000, 2000);
4047 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
4048 } while (--wait_loop && !(rxdctl & IXGBE_RXDCTL_ENABLE));
4051 e_err(drv, "RXDCTL.ENABLE on Rx queue %d not set within "
4052 "the polling period\n", reg_idx);
4056 void ixgbe_configure_rx_ring(struct ixgbe_adapter *adapter,
4057 struct ixgbe_ring *ring)
4059 struct ixgbe_hw *hw = &adapter->hw;
4060 union ixgbe_adv_rx_desc *rx_desc;
4061 u64 rdba = ring->dma;
4063 u8 reg_idx = ring->reg_idx;
4065 xdp_rxq_info_unreg_mem_model(&ring->xdp_rxq);
4066 ring->xsk_umem = ixgbe_xsk_umem(adapter, ring);
4067 if (ring->xsk_umem) {
4068 ring->zca.free = ixgbe_zca_free;
4069 WARN_ON(xdp_rxq_info_reg_mem_model(&ring->xdp_rxq,
4074 WARN_ON(xdp_rxq_info_reg_mem_model(&ring->xdp_rxq,
4075 MEM_TYPE_PAGE_SHARED, NULL));
4078 /* disable queue to avoid use of these values while updating state */
4079 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
4080 rxdctl &= ~IXGBE_RXDCTL_ENABLE;
4082 /* write value back with RXDCTL.ENABLE bit cleared */
4083 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl);
4084 IXGBE_WRITE_FLUSH(hw);
4086 IXGBE_WRITE_REG(hw, IXGBE_RDBAL(reg_idx), (rdba & DMA_BIT_MASK(32)));
4087 IXGBE_WRITE_REG(hw, IXGBE_RDBAH(reg_idx), (rdba >> 32));
4088 IXGBE_WRITE_REG(hw, IXGBE_RDLEN(reg_idx),
4089 ring->count * sizeof(union ixgbe_adv_rx_desc));
4090 /* Force flushing of IXGBE_RDLEN to prevent MDD */
4091 IXGBE_WRITE_FLUSH(hw);
4093 IXGBE_WRITE_REG(hw, IXGBE_RDH(reg_idx), 0);
4094 IXGBE_WRITE_REG(hw, IXGBE_RDT(reg_idx), 0);
4095 ring->tail = adapter->io_addr + IXGBE_RDT(reg_idx);
4097 ixgbe_configure_srrctl(adapter, ring);
4098 ixgbe_configure_rscctl(adapter, ring);
4100 if (hw->mac.type == ixgbe_mac_82598EB) {
4102 * enable cache line friendly hardware writes:
4103 * PTHRESH=32 descriptors (half the internal cache),
4104 * this also removes ugly rx_no_buffer_count increment
4105 * HTHRESH=4 descriptors (to minimize latency on fetch)
4106 * WTHRESH=8 burst writeback up to two cache lines
4108 rxdctl &= ~0x3FFFFF;
4110 #if (PAGE_SIZE < 8192)
4111 /* RXDCTL.RLPML does not work on 82599 */
4112 } else if (hw->mac.type != ixgbe_mac_82599EB) {
4113 rxdctl &= ~(IXGBE_RXDCTL_RLPMLMASK |
4114 IXGBE_RXDCTL_RLPML_EN);
4116 /* Limit the maximum frame size so we don't overrun the skb.
4117 * This can happen in SRIOV mode when the MTU of the VF is
4118 * higher than the MTU of the PF.
4120 if (ring_uses_build_skb(ring) &&
4121 !test_bit(__IXGBE_RX_3K_BUFFER, &ring->state))
4122 rxdctl |= IXGBE_MAX_2K_FRAME_BUILD_SKB |
4123 IXGBE_RXDCTL_RLPML_EN;
4127 if (ring->xsk_umem && hw->mac.type != ixgbe_mac_82599EB) {
4128 u32 xsk_buf_len = ring->xsk_umem->chunk_size_nohr -
4129 XDP_PACKET_HEADROOM;
4131 rxdctl &= ~(IXGBE_RXDCTL_RLPMLMASK |
4132 IXGBE_RXDCTL_RLPML_EN);
4133 rxdctl |= xsk_buf_len | IXGBE_RXDCTL_RLPML_EN;
4135 ring->rx_buf_len = xsk_buf_len;
4138 /* initialize rx_buffer_info */
4139 memset(ring->rx_buffer_info, 0,
4140 sizeof(struct ixgbe_rx_buffer) * ring->count);
4142 /* initialize Rx descriptor 0 */
4143 rx_desc = IXGBE_RX_DESC(ring, 0);
4144 rx_desc->wb.upper.length = 0;
4146 /* enable receive descriptor ring */
4147 rxdctl |= IXGBE_RXDCTL_ENABLE;
4148 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl);
4150 ixgbe_rx_desc_queue_enable(adapter, ring);
4152 ixgbe_alloc_rx_buffers_zc(ring, ixgbe_desc_unused(ring));
4154 ixgbe_alloc_rx_buffers(ring, ixgbe_desc_unused(ring));
4157 static void ixgbe_setup_psrtype(struct ixgbe_adapter *adapter)
4159 struct ixgbe_hw *hw = &adapter->hw;
4160 int rss_i = adapter->ring_feature[RING_F_RSS].indices;
4161 u16 pool = adapter->num_rx_pools;
4163 /* PSRTYPE must be initialized in non 82598 adapters */
4164 u32 psrtype = IXGBE_PSRTYPE_TCPHDR |
4165 IXGBE_PSRTYPE_UDPHDR |
4166 IXGBE_PSRTYPE_IPV4HDR |
4167 IXGBE_PSRTYPE_L2HDR |
4168 IXGBE_PSRTYPE_IPV6HDR;
4170 if (hw->mac.type == ixgbe_mac_82598EB)
4174 psrtype |= 2u << 29;
4176 psrtype |= 1u << 29;
4179 IXGBE_WRITE_REG(hw, IXGBE_PSRTYPE(VMDQ_P(pool)), psrtype);
4182 static void ixgbe_configure_virtualization(struct ixgbe_adapter *adapter)
4184 struct ixgbe_hw *hw = &adapter->hw;
4185 u16 pool = adapter->num_rx_pools;
4186 u32 reg_offset, vf_shift, vmolr;
4187 u32 gcr_ext, vmdctl;
4190 if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
4193 vmdctl = IXGBE_READ_REG(hw, IXGBE_VT_CTL);
4194 vmdctl |= IXGBE_VMD_CTL_VMDQ_EN;
4195 vmdctl &= ~IXGBE_VT_CTL_POOL_MASK;
4196 vmdctl |= VMDQ_P(0) << IXGBE_VT_CTL_POOL_SHIFT;
4197 vmdctl |= IXGBE_VT_CTL_REPLEN;
4198 IXGBE_WRITE_REG(hw, IXGBE_VT_CTL, vmdctl);
4200 /* accept untagged packets until a vlan tag is
4201 * specifically set for the VMDQ queue/pool
4203 vmolr = IXGBE_VMOLR_AUPE;
4205 IXGBE_WRITE_REG(hw, IXGBE_VMOLR(VMDQ_P(pool)), vmolr);
4207 vf_shift = VMDQ_P(0) % 32;
4208 reg_offset = (VMDQ_P(0) >= 32) ? 1 : 0;
4210 /* Enable only the PF's pool for Tx/Rx */
4211 IXGBE_WRITE_REG(hw, IXGBE_VFRE(reg_offset), GENMASK(31, vf_shift));
4212 IXGBE_WRITE_REG(hw, IXGBE_VFRE(reg_offset ^ 1), reg_offset - 1);
4213 IXGBE_WRITE_REG(hw, IXGBE_VFTE(reg_offset), GENMASK(31, vf_shift));
4214 IXGBE_WRITE_REG(hw, IXGBE_VFTE(reg_offset ^ 1), reg_offset - 1);
4215 if (adapter->bridge_mode == BRIDGE_MODE_VEB)
4216 IXGBE_WRITE_REG(hw, IXGBE_PFDTXGSWC, IXGBE_PFDTXGSWC_VT_LBEN);
4218 /* Map PF MAC address in RAR Entry 0 to first pool following VFs */
4219 hw->mac.ops.set_vmdq(hw, 0, VMDQ_P(0));
4221 /* clear VLAN promisc flag so VFTA will be updated if necessary */
4222 adapter->flags2 &= ~IXGBE_FLAG2_VLAN_PROMISC;
4225 * Set up VF register offsets for selected VT Mode,
4226 * i.e. 32 or 64 VFs for SR-IOV
4228 switch (adapter->ring_feature[RING_F_VMDQ].mask) {
4229 case IXGBE_82599_VMDQ_8Q_MASK:
4230 gcr_ext = IXGBE_GCR_EXT_VT_MODE_16;
4232 case IXGBE_82599_VMDQ_4Q_MASK:
4233 gcr_ext = IXGBE_GCR_EXT_VT_MODE_32;
4236 gcr_ext = IXGBE_GCR_EXT_VT_MODE_64;
4240 IXGBE_WRITE_REG(hw, IXGBE_GCR_EXT, gcr_ext);
4242 for (i = 0; i < adapter->num_vfs; i++) {
4243 /* configure spoof checking */
4244 ixgbe_ndo_set_vf_spoofchk(adapter->netdev, i,
4245 adapter->vfinfo[i].spoofchk_enabled);
4247 /* Enable/Disable RSS query feature */
4248 ixgbe_ndo_set_vf_rss_query_en(adapter->netdev, i,
4249 adapter->vfinfo[i].rss_query_enabled);
4253 static void ixgbe_set_rx_buffer_len(struct ixgbe_adapter *adapter)
4255 struct ixgbe_hw *hw = &adapter->hw;
4256 struct net_device *netdev = adapter->netdev;
4257 int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
4258 struct ixgbe_ring *rx_ring;
4263 /* adjust max frame to be able to do baby jumbo for FCoE */
4264 if ((adapter->flags & IXGBE_FLAG_FCOE_ENABLED) &&
4265 (max_frame < IXGBE_FCOE_JUMBO_FRAME_SIZE))
4266 max_frame = IXGBE_FCOE_JUMBO_FRAME_SIZE;
4268 #endif /* IXGBE_FCOE */
4270 /* adjust max frame to be at least the size of a standard frame */
4271 if (max_frame < (ETH_FRAME_LEN + ETH_FCS_LEN))
4272 max_frame = (ETH_FRAME_LEN + ETH_FCS_LEN);
4274 mhadd = IXGBE_READ_REG(hw, IXGBE_MHADD);
4275 if (max_frame != (mhadd >> IXGBE_MHADD_MFS_SHIFT)) {
4276 mhadd &= ~IXGBE_MHADD_MFS_MASK;
4277 mhadd |= max_frame << IXGBE_MHADD_MFS_SHIFT;
4279 IXGBE_WRITE_REG(hw, IXGBE_MHADD, mhadd);
4282 hlreg0 = IXGBE_READ_REG(hw, IXGBE_HLREG0);
4283 /* set jumbo enable since MHADD.MFS is keeping size locked at max_frame */
4284 hlreg0 |= IXGBE_HLREG0_JUMBOEN;
4285 IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hlreg0);
4288 * Setup the HW Rx Head and Tail Descriptor Pointers and
4289 * the Base and Length of the Rx Descriptor Ring
4291 for (i = 0; i < adapter->num_rx_queues; i++) {
4292 rx_ring = adapter->rx_ring[i];
4294 clear_ring_rsc_enabled(rx_ring);
4295 clear_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state);
4296 clear_bit(__IXGBE_RX_BUILD_SKB_ENABLED, &rx_ring->state);
4298 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
4299 set_ring_rsc_enabled(rx_ring);
4301 if (test_bit(__IXGBE_RX_FCOE, &rx_ring->state))
4302 set_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state);
4304 clear_bit(__IXGBE_RX_BUILD_SKB_ENABLED, &rx_ring->state);
4305 if (adapter->flags2 & IXGBE_FLAG2_RX_LEGACY)
4308 set_bit(__IXGBE_RX_BUILD_SKB_ENABLED, &rx_ring->state);
4310 #if (PAGE_SIZE < 8192)
4311 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
4312 set_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state);
4314 if (IXGBE_2K_TOO_SMALL_WITH_PADDING ||
4315 (max_frame > (ETH_FRAME_LEN + ETH_FCS_LEN)))
4316 set_bit(__IXGBE_RX_3K_BUFFER, &rx_ring->state);
4321 static void ixgbe_setup_rdrxctl(struct ixgbe_adapter *adapter)
4323 struct ixgbe_hw *hw = &adapter->hw;
4324 u32 rdrxctl = IXGBE_READ_REG(hw, IXGBE_RDRXCTL);
4326 switch (hw->mac.type) {
4327 case ixgbe_mac_82598EB:
4329 * For VMDq support of different descriptor types or
4330 * buffer sizes through the use of multiple SRRCTL
4331 * registers, RDRXCTL.MVMEN must be set to 1
4333 * also, the manual doesn't mention it clearly but DCA hints
4334 * will only use queue 0's tags unless this bit is set. Side
4335 * effects of setting this bit are only that SRRCTL must be
4336 * fully programmed [0..15]
4338 rdrxctl |= IXGBE_RDRXCTL_MVMEN;
4340 case ixgbe_mac_X550:
4341 case ixgbe_mac_X550EM_x:
4342 case ixgbe_mac_x550em_a:
4343 if (adapter->num_vfs)
4344 rdrxctl |= IXGBE_RDRXCTL_PSP;
4346 case ixgbe_mac_82599EB:
4347 case ixgbe_mac_X540:
4348 /* Disable RSC for ACK packets */
4349 IXGBE_WRITE_REG(hw, IXGBE_RSCDBU,
4350 (IXGBE_RSCDBU_RSCACKDIS | IXGBE_READ_REG(hw, IXGBE_RSCDBU)));
4351 rdrxctl &= ~IXGBE_RDRXCTL_RSCFRSTSIZE;
4352 /* hardware requires some bits to be set by default */
4353 rdrxctl |= (IXGBE_RDRXCTL_RSCACKC | IXGBE_RDRXCTL_FCOE_WRFIX);
4354 rdrxctl |= IXGBE_RDRXCTL_CRCSTRIP;
4357 /* We should do nothing since we don't know this hardware */
4361 IXGBE_WRITE_REG(hw, IXGBE_RDRXCTL, rdrxctl);
4365 * ixgbe_configure_rx - Configure 8259x Receive Unit after Reset
4366 * @adapter: board private structure
4368 * Configure the Rx unit of the MAC after a reset.
4370 static void ixgbe_configure_rx(struct ixgbe_adapter *adapter)
4372 struct ixgbe_hw *hw = &adapter->hw;
4376 /* disable receives while setting up the descriptors */
4377 hw->mac.ops.disable_rx(hw);
4379 ixgbe_setup_psrtype(adapter);
4380 ixgbe_setup_rdrxctl(adapter);
4383 rfctl = IXGBE_READ_REG(hw, IXGBE_RFCTL);
4384 rfctl &= ~IXGBE_RFCTL_RSC_DIS;
4385 if (!(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED))
4386 rfctl |= IXGBE_RFCTL_RSC_DIS;
4388 /* disable NFS filtering */
4389 rfctl |= (IXGBE_RFCTL_NFSW_DIS | IXGBE_RFCTL_NFSR_DIS);
4390 IXGBE_WRITE_REG(hw, IXGBE_RFCTL, rfctl);
4392 /* Program registers for the distribution of queues */
4393 ixgbe_setup_mrqc(adapter);
4395 /* set_rx_buffer_len must be called before ring initialization */
4396 ixgbe_set_rx_buffer_len(adapter);
4399 * Setup the HW Rx Head and Tail Descriptor Pointers and
4400 * the Base and Length of the Rx Descriptor Ring
4402 for (i = 0; i < adapter->num_rx_queues; i++)
4403 ixgbe_configure_rx_ring(adapter, adapter->rx_ring[i]);
4405 rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
4406 /* disable drop enable for 82598 parts */
4407 if (hw->mac.type == ixgbe_mac_82598EB)
4408 rxctrl |= IXGBE_RXCTRL_DMBYPS;
4410 /* enable all receives */
4411 rxctrl |= IXGBE_RXCTRL_RXEN;
4412 hw->mac.ops.enable_rx_dma(hw, rxctrl);
4415 static int ixgbe_vlan_rx_add_vid(struct net_device *netdev,
4416 __be16 proto, u16 vid)
4418 struct ixgbe_adapter *adapter = netdev_priv(netdev);
4419 struct ixgbe_hw *hw = &adapter->hw;
4421 /* add VID to filter table */
4422 if (!vid || !(adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC))
4423 hw->mac.ops.set_vfta(&adapter->hw, vid, VMDQ_P(0), true, !!vid);
4425 set_bit(vid, adapter->active_vlans);
4430 static int ixgbe_find_vlvf_entry(struct ixgbe_hw *hw, u32 vlan)
4435 /* short cut the special case */
4439 /* Search for the vlan id in the VLVF entries */
4440 for (idx = IXGBE_VLVF_ENTRIES; --idx;) {
4441 vlvf = IXGBE_READ_REG(hw, IXGBE_VLVF(idx));
4442 if ((vlvf & VLAN_VID_MASK) == vlan)
4449 void ixgbe_update_pf_promisc_vlvf(struct ixgbe_adapter *adapter, u32 vid)
4451 struct ixgbe_hw *hw = &adapter->hw;
4455 idx = ixgbe_find_vlvf_entry(hw, vid);
4459 /* See if any other pools are set for this VLAN filter
4460 * entry other than the PF.
4462 word = idx * 2 + (VMDQ_P(0) / 32);
4463 bits = ~BIT(VMDQ_P(0) % 32);
4464 bits &= IXGBE_READ_REG(hw, IXGBE_VLVFB(word));
4466 /* Disable the filter so this falls into the default pool. */
4467 if (!bits && !IXGBE_READ_REG(hw, IXGBE_VLVFB(word ^ 1))) {
4468 if (!(adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC))
4469 IXGBE_WRITE_REG(hw, IXGBE_VLVFB(word), 0);
4470 IXGBE_WRITE_REG(hw, IXGBE_VLVF(idx), 0);
4474 static int ixgbe_vlan_rx_kill_vid(struct net_device *netdev,
4475 __be16 proto, u16 vid)
4477 struct ixgbe_adapter *adapter = netdev_priv(netdev);
4478 struct ixgbe_hw *hw = &adapter->hw;
4480 /* remove VID from filter table */
4481 if (vid && !(adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC))
4482 hw->mac.ops.set_vfta(hw, vid, VMDQ_P(0), false, true);
4484 clear_bit(vid, adapter->active_vlans);
4490 * ixgbe_vlan_strip_disable - helper to disable hw vlan stripping
4491 * @adapter: driver data
4493 static void ixgbe_vlan_strip_disable(struct ixgbe_adapter *adapter)
4495 struct ixgbe_hw *hw = &adapter->hw;
4499 switch (hw->mac.type) {
4500 case ixgbe_mac_82598EB:
4501 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
4502 vlnctrl &= ~IXGBE_VLNCTRL_VME;
4503 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4505 case ixgbe_mac_82599EB:
4506 case ixgbe_mac_X540:
4507 case ixgbe_mac_X550:
4508 case ixgbe_mac_X550EM_x:
4509 case ixgbe_mac_x550em_a:
4510 for (i = 0; i < adapter->num_rx_queues; i++) {
4511 struct ixgbe_ring *ring = adapter->rx_ring[i];
4513 if (!netif_is_ixgbe(ring->netdev))
4517 vlnctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
4518 vlnctrl &= ~IXGBE_RXDCTL_VME;
4519 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), vlnctrl);
4528 * ixgbe_vlan_strip_enable - helper to enable hw vlan stripping
4529 * @adapter: driver data
4531 static void ixgbe_vlan_strip_enable(struct ixgbe_adapter *adapter)
4533 struct ixgbe_hw *hw = &adapter->hw;
4537 switch (hw->mac.type) {
4538 case ixgbe_mac_82598EB:
4539 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
4540 vlnctrl |= IXGBE_VLNCTRL_VME;
4541 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4543 case ixgbe_mac_82599EB:
4544 case ixgbe_mac_X540:
4545 case ixgbe_mac_X550:
4546 case ixgbe_mac_X550EM_x:
4547 case ixgbe_mac_x550em_a:
4548 for (i = 0; i < adapter->num_rx_queues; i++) {
4549 struct ixgbe_ring *ring = adapter->rx_ring[i];
4551 if (!netif_is_ixgbe(ring->netdev))
4555 vlnctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
4556 vlnctrl |= IXGBE_RXDCTL_VME;
4557 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), vlnctrl);
4565 static void ixgbe_vlan_promisc_enable(struct ixgbe_adapter *adapter)
4567 struct ixgbe_hw *hw = &adapter->hw;
4570 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
4572 if (adapter->flags & IXGBE_FLAG_VMDQ_ENABLED) {
4573 /* For VMDq and SR-IOV we must leave VLAN filtering enabled */
4574 vlnctrl |= IXGBE_VLNCTRL_VFE;
4575 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4577 vlnctrl &= ~IXGBE_VLNCTRL_VFE;
4578 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4582 /* Nothing to do for 82598 */
4583 if (hw->mac.type == ixgbe_mac_82598EB)
4586 /* We are already in VLAN promisc, nothing to do */
4587 if (adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC)
4590 /* Set flag so we don't redo unnecessary work */
4591 adapter->flags2 |= IXGBE_FLAG2_VLAN_PROMISC;
4593 /* Add PF to all active pools */
4594 for (i = IXGBE_VLVF_ENTRIES; --i;) {
4595 u32 reg_offset = IXGBE_VLVFB(i * 2 + VMDQ_P(0) / 32);
4596 u32 vlvfb = IXGBE_READ_REG(hw, reg_offset);
4598 vlvfb |= BIT(VMDQ_P(0) % 32);
4599 IXGBE_WRITE_REG(hw, reg_offset, vlvfb);
4602 /* Set all bits in the VLAN filter table array */
4603 for (i = hw->mac.vft_size; i--;)
4604 IXGBE_WRITE_REG(hw, IXGBE_VFTA(i), ~0U);
4607 #define VFTA_BLOCK_SIZE 8
4608 static void ixgbe_scrub_vfta(struct ixgbe_adapter *adapter, u32 vfta_offset)
4610 struct ixgbe_hw *hw = &adapter->hw;
4611 u32 vfta[VFTA_BLOCK_SIZE] = { 0 };
4612 u32 vid_start = vfta_offset * 32;
4613 u32 vid_end = vid_start + (VFTA_BLOCK_SIZE * 32);
4614 u32 i, vid, word, bits;
4616 for (i = IXGBE_VLVF_ENTRIES; --i;) {
4617 u32 vlvf = IXGBE_READ_REG(hw, IXGBE_VLVF(i));
4619 /* pull VLAN ID from VLVF */
4620 vid = vlvf & VLAN_VID_MASK;
4622 /* only concern outselves with a certain range */
4623 if (vid < vid_start || vid >= vid_end)
4627 /* record VLAN ID in VFTA */
4628 vfta[(vid - vid_start) / 32] |= BIT(vid % 32);
4630 /* if PF is part of this then continue */
4631 if (test_bit(vid, adapter->active_vlans))
4635 /* remove PF from the pool */
4636 word = i * 2 + VMDQ_P(0) / 32;
4637 bits = ~BIT(VMDQ_P(0) % 32);
4638 bits &= IXGBE_READ_REG(hw, IXGBE_VLVFB(word));
4639 IXGBE_WRITE_REG(hw, IXGBE_VLVFB(word), bits);
4642 /* extract values from active_vlans and write back to VFTA */
4643 for (i = VFTA_BLOCK_SIZE; i--;) {
4644 vid = (vfta_offset + i) * 32;
4645 word = vid / BITS_PER_LONG;
4646 bits = vid % BITS_PER_LONG;
4648 vfta[i] |= adapter->active_vlans[word] >> bits;
4650 IXGBE_WRITE_REG(hw, IXGBE_VFTA(vfta_offset + i), vfta[i]);
4654 static void ixgbe_vlan_promisc_disable(struct ixgbe_adapter *adapter)
4656 struct ixgbe_hw *hw = &adapter->hw;
4659 /* Set VLAN filtering to enabled */
4660 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
4661 vlnctrl |= IXGBE_VLNCTRL_VFE;
4662 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
4664 if (!(adapter->flags & IXGBE_FLAG_VMDQ_ENABLED) ||
4665 hw->mac.type == ixgbe_mac_82598EB)
4668 /* We are not in VLAN promisc, nothing to do */
4669 if (!(adapter->flags2 & IXGBE_FLAG2_VLAN_PROMISC))
4672 /* Set flag so we don't redo unnecessary work */
4673 adapter->flags2 &= ~IXGBE_FLAG2_VLAN_PROMISC;
4675 for (i = 0; i < hw->mac.vft_size; i += VFTA_BLOCK_SIZE)
4676 ixgbe_scrub_vfta(adapter, i);
4679 static void ixgbe_restore_vlan(struct ixgbe_adapter *adapter)
4683 ixgbe_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), 0);
4685 for_each_set_bit_from(vid, adapter->active_vlans, VLAN_N_VID)
4686 ixgbe_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), vid);
4690 * ixgbe_write_mc_addr_list - write multicast addresses to MTA
4691 * @netdev: network interface device structure
4693 * Writes multicast address list to the MTA hash table.
4694 * Returns: -ENOMEM on failure
4695 * 0 on no addresses written
4696 * X on writing X addresses to MTA
4698 static int ixgbe_write_mc_addr_list(struct net_device *netdev)
4700 struct ixgbe_adapter *adapter = netdev_priv(netdev);
4701 struct ixgbe_hw *hw = &adapter->hw;
4703 if (!netif_running(netdev))
4706 if (hw->mac.ops.update_mc_addr_list)
4707 hw->mac.ops.update_mc_addr_list(hw, netdev);
4711 #ifdef CONFIG_PCI_IOV
4712 ixgbe_restore_vf_multicasts(adapter);
4715 return netdev_mc_count(netdev);
4718 #ifdef CONFIG_PCI_IOV
4719 void ixgbe_full_sync_mac_table(struct ixgbe_adapter *adapter)
4721 struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4722 struct ixgbe_hw *hw = &adapter->hw;
4725 for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4726 mac_table->state &= ~IXGBE_MAC_STATE_MODIFIED;
4728 if (mac_table->state & IXGBE_MAC_STATE_IN_USE)
4729 hw->mac.ops.set_rar(hw, i,
4734 hw->mac.ops.clear_rar(hw, i);
4739 static void ixgbe_sync_mac_table(struct ixgbe_adapter *adapter)
4741 struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4742 struct ixgbe_hw *hw = &adapter->hw;
4745 for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4746 if (!(mac_table->state & IXGBE_MAC_STATE_MODIFIED))
4749 mac_table->state &= ~IXGBE_MAC_STATE_MODIFIED;
4751 if (mac_table->state & IXGBE_MAC_STATE_IN_USE)
4752 hw->mac.ops.set_rar(hw, i,
4757 hw->mac.ops.clear_rar(hw, i);
4761 static void ixgbe_flush_sw_mac_table(struct ixgbe_adapter *adapter)
4763 struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4764 struct ixgbe_hw *hw = &adapter->hw;
4767 for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4768 mac_table->state |= IXGBE_MAC_STATE_MODIFIED;
4769 mac_table->state &= ~IXGBE_MAC_STATE_IN_USE;
4772 ixgbe_sync_mac_table(adapter);
4775 static int ixgbe_available_rars(struct ixgbe_adapter *adapter, u16 pool)
4777 struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4778 struct ixgbe_hw *hw = &adapter->hw;
4781 for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4782 /* do not count default RAR as available */
4783 if (mac_table->state & IXGBE_MAC_STATE_DEFAULT)
4786 /* only count unused and addresses that belong to us */
4787 if (mac_table->state & IXGBE_MAC_STATE_IN_USE) {
4788 if (mac_table->pool != pool)
4798 /* this function destroys the first RAR entry */
4799 static void ixgbe_mac_set_default_filter(struct ixgbe_adapter *adapter)
4801 struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4802 struct ixgbe_hw *hw = &adapter->hw;
4804 memcpy(&mac_table->addr, hw->mac.addr, ETH_ALEN);
4805 mac_table->pool = VMDQ_P(0);
4807 mac_table->state = IXGBE_MAC_STATE_DEFAULT | IXGBE_MAC_STATE_IN_USE;
4809 hw->mac.ops.set_rar(hw, 0, mac_table->addr, mac_table->pool,
4813 int ixgbe_add_mac_filter(struct ixgbe_adapter *adapter,
4814 const u8 *addr, u16 pool)
4816 struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4817 struct ixgbe_hw *hw = &adapter->hw;
4820 if (is_zero_ether_addr(addr))
4823 for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4824 if (mac_table->state & IXGBE_MAC_STATE_IN_USE)
4827 ether_addr_copy(mac_table->addr, addr);
4828 mac_table->pool = pool;
4830 mac_table->state |= IXGBE_MAC_STATE_MODIFIED |
4831 IXGBE_MAC_STATE_IN_USE;
4833 ixgbe_sync_mac_table(adapter);
4841 int ixgbe_del_mac_filter(struct ixgbe_adapter *adapter,
4842 const u8 *addr, u16 pool)
4844 struct ixgbe_mac_addr *mac_table = &adapter->mac_table[0];
4845 struct ixgbe_hw *hw = &adapter->hw;
4848 if (is_zero_ether_addr(addr))
4851 /* search table for addr, if found clear IN_USE flag and sync */
4852 for (i = 0; i < hw->mac.num_rar_entries; i++, mac_table++) {
4853 /* we can only delete an entry if it is in use */
4854 if (!(mac_table->state & IXGBE_MAC_STATE_IN_USE))
4856 /* we only care about entries that belong to the given pool */
4857 if (mac_table->pool != pool)
4859 /* we only care about a specific MAC address */
4860 if (!ether_addr_equal(addr, mac_table->addr))
4863 mac_table->state |= IXGBE_MAC_STATE_MODIFIED;
4864 mac_table->state &= ~IXGBE_MAC_STATE_IN_USE;
4866 ixgbe_sync_mac_table(adapter);
4874 static int ixgbe_uc_sync(struct net_device *netdev, const unsigned char *addr)
4876 struct ixgbe_adapter *adapter = netdev_priv(netdev);
4879 ret = ixgbe_add_mac_filter(adapter, addr, VMDQ_P(0));
4881 return min_t(int, ret, 0);
4884 static int ixgbe_uc_unsync(struct net_device *netdev, const unsigned char *addr)
4886 struct ixgbe_adapter *adapter = netdev_priv(netdev);
4888 ixgbe_del_mac_filter(adapter, addr, VMDQ_P(0));
4894 * ixgbe_set_rx_mode - Unicast, Multicast and Promiscuous mode set
4895 * @netdev: network interface device structure
4897 * The set_rx_method entry point is called whenever the unicast/multicast
4898 * address list or the network interface flags are updated. This routine is
4899 * responsible for configuring the hardware for proper unicast, multicast and
4902 void ixgbe_set_rx_mode(struct net_device *netdev)
4904 struct ixgbe_adapter *adapter = netdev_priv(netdev);
4905 struct ixgbe_hw *hw = &adapter->hw;
4906 u32 fctrl, vmolr = IXGBE_VMOLR_BAM | IXGBE_VMOLR_AUPE;
4907 netdev_features_t features = netdev->features;
4910 /* Check for Promiscuous and All Multicast modes */
4911 fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
4913 /* set all bits that we expect to always be set */
4914 fctrl &= ~IXGBE_FCTRL_SBP; /* disable store-bad-packets */
4915 fctrl |= IXGBE_FCTRL_BAM;
4916 fctrl |= IXGBE_FCTRL_DPF; /* discard pause frames when FC enabled */
4917 fctrl |= IXGBE_FCTRL_PMCF;
4919 /* clear the bits we are changing the status of */
4920 fctrl &= ~(IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
4921 if (netdev->flags & IFF_PROMISC) {
4922 hw->addr_ctrl.user_set_promisc = true;
4923 fctrl |= (IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
4924 vmolr |= IXGBE_VMOLR_MPE;
4925 features &= ~NETIF_F_HW_VLAN_CTAG_FILTER;
4927 if (netdev->flags & IFF_ALLMULTI) {
4928 fctrl |= IXGBE_FCTRL_MPE;
4929 vmolr |= IXGBE_VMOLR_MPE;
4931 hw->addr_ctrl.user_set_promisc = false;
4935 * Write addresses to available RAR registers, if there is not
4936 * sufficient space to store all the addresses then enable
4937 * unicast promiscuous mode
4939 if (__dev_uc_sync(netdev, ixgbe_uc_sync, ixgbe_uc_unsync)) {
4940 fctrl |= IXGBE_FCTRL_UPE;
4941 vmolr |= IXGBE_VMOLR_ROPE;
4944 /* Write addresses to the MTA, if the attempt fails
4945 * then we should just turn on promiscuous mode so
4946 * that we can at least receive multicast traffic
4948 count = ixgbe_write_mc_addr_list(netdev);
4950 fctrl |= IXGBE_FCTRL_MPE;
4951 vmolr |= IXGBE_VMOLR_MPE;
4953 vmolr |= IXGBE_VMOLR_ROMPE;
4956 if (hw->mac.type != ixgbe_mac_82598EB) {
4957 vmolr |= IXGBE_READ_REG(hw, IXGBE_VMOLR(VMDQ_P(0))) &
4958 ~(IXGBE_VMOLR_MPE | IXGBE_VMOLR_ROMPE |
4960 IXGBE_WRITE_REG(hw, IXGBE_VMOLR(VMDQ_P(0)), vmolr);
4963 /* This is useful for sniffing bad packets. */
4964 if (features & NETIF_F_RXALL) {
4965 /* UPE and MPE will be handled by normal PROMISC logic
4966 * in e1000e_set_rx_mode */
4967 fctrl |= (IXGBE_FCTRL_SBP | /* Receive bad packets */
4968 IXGBE_FCTRL_BAM | /* RX All Bcast Pkts */
4969 IXGBE_FCTRL_PMCF); /* RX All MAC Ctrl Pkts */
4971 fctrl &= ~(IXGBE_FCTRL_DPF);
4972 /* NOTE: VLAN filtering is disabled by setting PROMISC */
4975 IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
4977 if (features & NETIF_F_HW_VLAN_CTAG_RX)
4978 ixgbe_vlan_strip_enable(adapter);
4980 ixgbe_vlan_strip_disable(adapter);
4982 if (features & NETIF_F_HW_VLAN_CTAG_FILTER)
4983 ixgbe_vlan_promisc_disable(adapter);
4985 ixgbe_vlan_promisc_enable(adapter);
4988 static void ixgbe_napi_enable_all(struct ixgbe_adapter *adapter)
4992 for (q_idx = 0; q_idx < adapter->num_q_vectors; q_idx++)
4993 napi_enable(&adapter->q_vector[q_idx]->napi);
4996 static void ixgbe_napi_disable_all(struct ixgbe_adapter *adapter)
5000 for (q_idx = 0; q_idx < adapter->num_q_vectors; q_idx++)
5001 napi_disable(&adapter->q_vector[q_idx]->napi);
5004 static void ixgbe_clear_udp_tunnel_port(struct ixgbe_adapter *adapter, u32 mask)
5006 struct ixgbe_hw *hw = &adapter->hw;
5009 if (!(adapter->flags & (IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE |
5010 IXGBE_FLAG_GENEVE_OFFLOAD_CAPABLE)))
5013 vxlanctrl = IXGBE_READ_REG(hw, IXGBE_VXLANCTRL) & ~mask;
5014 IXGBE_WRITE_REG(hw, IXGBE_VXLANCTRL, vxlanctrl);
5016 if (mask & IXGBE_VXLANCTRL_VXLAN_UDPPORT_MASK)
5017 adapter->vxlan_port = 0;
5019 if (mask & IXGBE_VXLANCTRL_GENEVE_UDPPORT_MASK)
5020 adapter->geneve_port = 0;
5023 #ifdef CONFIG_IXGBE_DCB
5025 * ixgbe_configure_dcb - Configure DCB hardware
5026 * @adapter: ixgbe adapter struct
5028 * This is called by the driver on open to configure the DCB hardware.
5029 * This is also called by the gennetlink interface when reconfiguring
5032 static void ixgbe_configure_dcb(struct ixgbe_adapter *adapter)
5034 struct ixgbe_hw *hw = &adapter->hw;
5035 int max_frame = adapter->netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
5037 if (!(adapter->flags & IXGBE_FLAG_DCB_ENABLED)) {
5038 if (hw->mac.type == ixgbe_mac_82598EB)
5039 netif_set_gso_max_size(adapter->netdev, 65536);
5043 if (hw->mac.type == ixgbe_mac_82598EB)
5044 netif_set_gso_max_size(adapter->netdev, 32768);
5047 if (adapter->netdev->features & NETIF_F_FCOE_MTU)
5048 max_frame = max(max_frame, IXGBE_FCOE_JUMBO_FRAME_SIZE);
5051 /* reconfigure the hardware */
5052 if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_CEE) {
5053 ixgbe_dcb_calculate_tc_credits(hw, &adapter->dcb_cfg, max_frame,
5055 ixgbe_dcb_calculate_tc_credits(hw, &adapter->dcb_cfg, max_frame,
5057 ixgbe_dcb_hw_config(hw, &adapter->dcb_cfg);
5058 } else if (adapter->ixgbe_ieee_ets && adapter->ixgbe_ieee_pfc) {
5059 ixgbe_dcb_hw_ets(&adapter->hw,
5060 adapter->ixgbe_ieee_ets,
5062 ixgbe_dcb_hw_pfc_config(&adapter->hw,
5063 adapter->ixgbe_ieee_pfc->pfc_en,
5064 adapter->ixgbe_ieee_ets->prio_tc);
5067 /* Enable RSS Hash per TC */
5068 if (hw->mac.type != ixgbe_mac_82598EB) {
5070 u16 rss_i = adapter->ring_feature[RING_F_RSS].indices - 1;
5077 /* write msb to all 8 TCs in one write */
5078 IXGBE_WRITE_REG(hw, IXGBE_RQTC, msb * 0x11111111);
5083 /* Additional bittime to account for IXGBE framing */
5084 #define IXGBE_ETH_FRAMING 20
5087 * ixgbe_hpbthresh - calculate high water mark for flow control
5089 * @adapter: board private structure to calculate for
5090 * @pb: packet buffer to calculate
5092 static int ixgbe_hpbthresh(struct ixgbe_adapter *adapter, int pb)
5094 struct ixgbe_hw *hw = &adapter->hw;
5095 struct net_device *dev = adapter->netdev;
5096 int link, tc, kb, marker;
5099 /* Calculate max LAN frame size */
5100 tc = link = dev->mtu + ETH_HLEN + ETH_FCS_LEN + IXGBE_ETH_FRAMING;
5103 /* FCoE traffic class uses FCOE jumbo frames */
5104 if ((dev->features & NETIF_F_FCOE_MTU) &&
5105 (tc < IXGBE_FCOE_JUMBO_FRAME_SIZE) &&
5106 (pb == ixgbe_fcoe_get_tc(adapter)))
5107 tc = IXGBE_FCOE_JUMBO_FRAME_SIZE;
5110 /* Calculate delay value for device */
5111 switch (hw->mac.type) {
5112 case ixgbe_mac_X540:
5113 case ixgbe_mac_X550:
5114 case ixgbe_mac_X550EM_x:
5115 case ixgbe_mac_x550em_a:
5116 dv_id = IXGBE_DV_X540(link, tc);
5119 dv_id = IXGBE_DV(link, tc);
5123 /* Loopback switch introduces additional latency */
5124 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
5125 dv_id += IXGBE_B2BT(tc);
5127 /* Delay value is calculated in bit times convert to KB */
5128 kb = IXGBE_BT2KB(dv_id);
5129 rx_pba = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(pb)) >> 10;
5131 marker = rx_pba - kb;
5133 /* It is possible that the packet buffer is not large enough
5134 * to provide required headroom. In this case throw an error
5135 * to user and a do the best we can.
5138 e_warn(drv, "Packet Buffer(%i) can not provide enough"
5139 "headroom to support flow control."
5140 "Decrease MTU or number of traffic classes\n", pb);
5148 * ixgbe_lpbthresh - calculate low water mark for for flow control
5150 * @adapter: board private structure to calculate for
5151 * @pb: packet buffer to calculate
5153 static int ixgbe_lpbthresh(struct ixgbe_adapter *adapter, int pb)
5155 struct ixgbe_hw *hw = &adapter->hw;
5156 struct net_device *dev = adapter->netdev;
5160 /* Calculate max LAN frame size */
5161 tc = dev->mtu + ETH_HLEN + ETH_FCS_LEN;
5164 /* FCoE traffic class uses FCOE jumbo frames */
5165 if ((dev->features & NETIF_F_FCOE_MTU) &&
5166 (tc < IXGBE_FCOE_JUMBO_FRAME_SIZE) &&
5167 (pb == netdev_get_prio_tc_map(dev, adapter->fcoe.up)))
5168 tc = IXGBE_FCOE_JUMBO_FRAME_SIZE;
5171 /* Calculate delay value for device */
5172 switch (hw->mac.type) {
5173 case ixgbe_mac_X540:
5174 case ixgbe_mac_X550:
5175 case ixgbe_mac_X550EM_x:
5176 case ixgbe_mac_x550em_a:
5177 dv_id = IXGBE_LOW_DV_X540(tc);
5180 dv_id = IXGBE_LOW_DV(tc);
5184 /* Delay value is calculated in bit times convert to KB */
5185 return IXGBE_BT2KB(dv_id);
5189 * ixgbe_pbthresh_setup - calculate and setup high low water marks
5191 static void ixgbe_pbthresh_setup(struct ixgbe_adapter *adapter)
5193 struct ixgbe_hw *hw = &adapter->hw;
5194 int num_tc = adapter->hw_tcs;
5200 for (i = 0; i < num_tc; i++) {
5201 hw->fc.high_water[i] = ixgbe_hpbthresh(adapter, i);
5202 hw->fc.low_water[i] = ixgbe_lpbthresh(adapter, i);
5204 /* Low water marks must not be larger than high water marks */
5205 if (hw->fc.low_water[i] > hw->fc.high_water[i])
5206 hw->fc.low_water[i] = 0;
5209 for (; i < MAX_TRAFFIC_CLASS; i++)
5210 hw->fc.high_water[i] = 0;
5213 static void ixgbe_configure_pb(struct ixgbe_adapter *adapter)
5215 struct ixgbe_hw *hw = &adapter->hw;
5217 u8 tc = adapter->hw_tcs;
5219 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE ||
5220 adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)
5221 hdrm = 32 << adapter->fdir_pballoc;
5225 hw->mac.ops.set_rxpba(hw, tc, hdrm, PBA_STRATEGY_EQUAL);
5226 ixgbe_pbthresh_setup(adapter);
5229 static void ixgbe_fdir_filter_restore(struct ixgbe_adapter *adapter)
5231 struct ixgbe_hw *hw = &adapter->hw;
5232 struct hlist_node *node2;
5233 struct ixgbe_fdir_filter *filter;
5236 spin_lock(&adapter->fdir_perfect_lock);
5238 if (!hlist_empty(&adapter->fdir_filter_list))
5239 ixgbe_fdir_set_input_mask_82599(hw, &adapter->fdir_mask);
5241 hlist_for_each_entry_safe(filter, node2,
5242 &adapter->fdir_filter_list, fdir_node) {
5243 action = filter->action;
5244 if (action != IXGBE_FDIR_DROP_QUEUE && action != 0)
5246 (action >> ETHTOOL_RX_FLOW_SPEC_RING_VF_OFF) - 1;
5248 ixgbe_fdir_write_perfect_filter_82599(hw,
5251 (action == IXGBE_FDIR_DROP_QUEUE) ?
5252 IXGBE_FDIR_DROP_QUEUE :
5253 adapter->rx_ring[action]->reg_idx);
5256 spin_unlock(&adapter->fdir_perfect_lock);
5260 * ixgbe_clean_rx_ring - Free Rx Buffers per Queue
5261 * @rx_ring: ring to free buffers from
5263 static void ixgbe_clean_rx_ring(struct ixgbe_ring *rx_ring)
5265 u16 i = rx_ring->next_to_clean;
5266 struct ixgbe_rx_buffer *rx_buffer = &rx_ring->rx_buffer_info[i];
5268 if (rx_ring->xsk_umem) {
5269 ixgbe_xsk_clean_rx_ring(rx_ring);
5273 /* Free all the Rx ring sk_buffs */
5274 while (i != rx_ring->next_to_alloc) {
5275 if (rx_buffer->skb) {
5276 struct sk_buff *skb = rx_buffer->skb;
5277 if (IXGBE_CB(skb)->page_released)
5278 dma_unmap_page_attrs(rx_ring->dev,
5280 ixgbe_rx_pg_size(rx_ring),
5286 /* Invalidate cache lines that may have been written to by
5287 * device so that we avoid corrupting memory.
5289 dma_sync_single_range_for_cpu(rx_ring->dev,
5291 rx_buffer->page_offset,
5292 ixgbe_rx_bufsz(rx_ring),
5295 /* free resources associated with mapping */
5296 dma_unmap_page_attrs(rx_ring->dev, rx_buffer->dma,
5297 ixgbe_rx_pg_size(rx_ring),
5300 __page_frag_cache_drain(rx_buffer->page,
5301 rx_buffer->pagecnt_bias);
5305 if (i == rx_ring->count) {
5307 rx_buffer = rx_ring->rx_buffer_info;
5312 rx_ring->next_to_alloc = 0;
5313 rx_ring->next_to_clean = 0;
5314 rx_ring->next_to_use = 0;
5317 static int ixgbe_fwd_ring_up(struct ixgbe_adapter *adapter,
5318 struct ixgbe_fwd_adapter *accel)
5320 u16 rss_i = adapter->ring_feature[RING_F_RSS].indices;
5321 int num_tc = netdev_get_num_tc(adapter->netdev);
5322 struct net_device *vdev = accel->netdev;
5325 baseq = accel->pool * adapter->num_rx_queues_per_pool;
5326 netdev_dbg(vdev, "pool %i:%i queues %i:%i\n",
5327 accel->pool, adapter->num_rx_pools,
5328 baseq, baseq + adapter->num_rx_queues_per_pool);
5330 accel->rx_base_queue = baseq;
5331 accel->tx_base_queue = baseq;
5333 /* record configuration for macvlan interface in vdev */
5334 for (i = 0; i < num_tc; i++)
5335 netdev_bind_sb_channel_queue(adapter->netdev, vdev,
5336 i, rss_i, baseq + (rss_i * i));
5338 for (i = 0; i < adapter->num_rx_queues_per_pool; i++)
5339 adapter->rx_ring[baseq + i]->netdev = vdev;
5341 /* Guarantee all rings are updated before we update the
5342 * MAC address filter.
5346 /* ixgbe_add_mac_filter will return an index if it succeeds, so we
5347 * need to only treat it as an error value if it is negative.
5349 err = ixgbe_add_mac_filter(adapter, vdev->dev_addr,
5350 VMDQ_P(accel->pool));
5354 /* if we cannot add the MAC rule then disable the offload */
5355 macvlan_release_l2fw_offload(vdev);
5357 for (i = 0; i < adapter->num_rx_queues_per_pool; i++)
5358 adapter->rx_ring[baseq + i]->netdev = NULL;
5360 netdev_err(vdev, "L2FW offload disabled due to L2 filter error\n");
5362 /* unbind the queues and drop the subordinate channel config */
5363 netdev_unbind_sb_channel(adapter->netdev, vdev);
5364 netdev_set_sb_channel(vdev, 0);
5366 clear_bit(accel->pool, adapter->fwd_bitmask);
5372 static int ixgbe_macvlan_up(struct net_device *vdev, void *data)
5374 struct ixgbe_adapter *adapter = data;
5375 struct ixgbe_fwd_adapter *accel;
5377 if (!netif_is_macvlan(vdev))
5380 accel = macvlan_accel_priv(vdev);
5384 ixgbe_fwd_ring_up(adapter, accel);
5389 static void ixgbe_configure_dfwd(struct ixgbe_adapter *adapter)
5391 netdev_walk_all_upper_dev_rcu(adapter->netdev,
5392 ixgbe_macvlan_up, adapter);
5395 static void ixgbe_configure(struct ixgbe_adapter *adapter)
5397 struct ixgbe_hw *hw = &adapter->hw;
5399 ixgbe_configure_pb(adapter);
5400 #ifdef CONFIG_IXGBE_DCB
5401 ixgbe_configure_dcb(adapter);
5404 * We must restore virtualization before VLANs or else
5405 * the VLVF registers will not be populated
5407 ixgbe_configure_virtualization(adapter);
5409 ixgbe_set_rx_mode(adapter->netdev);
5410 ixgbe_restore_vlan(adapter);
5411 ixgbe_ipsec_restore(adapter);
5413 switch (hw->mac.type) {
5414 case ixgbe_mac_82599EB:
5415 case ixgbe_mac_X540:
5416 hw->mac.ops.disable_rx_buff(hw);
5422 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
5423 ixgbe_init_fdir_signature_82599(&adapter->hw,
5424 adapter->fdir_pballoc);
5425 } else if (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE) {
5426 ixgbe_init_fdir_perfect_82599(&adapter->hw,
5427 adapter->fdir_pballoc);
5428 ixgbe_fdir_filter_restore(adapter);
5431 switch (hw->mac.type) {
5432 case ixgbe_mac_82599EB:
5433 case ixgbe_mac_X540:
5434 hw->mac.ops.enable_rx_buff(hw);
5440 #ifdef CONFIG_IXGBE_DCA
5442 if (adapter->flags & IXGBE_FLAG_DCA_CAPABLE)
5443 ixgbe_setup_dca(adapter);
5444 #endif /* CONFIG_IXGBE_DCA */
5447 /* configure FCoE L2 filters, redirection table, and Rx control */
5448 ixgbe_configure_fcoe(adapter);
5450 #endif /* IXGBE_FCOE */
5451 ixgbe_configure_tx(adapter);
5452 ixgbe_configure_rx(adapter);
5453 ixgbe_configure_dfwd(adapter);
5457 * ixgbe_sfp_link_config - set up SFP+ link
5458 * @adapter: pointer to private adapter struct
5460 static void ixgbe_sfp_link_config(struct ixgbe_adapter *adapter)
5463 * We are assuming the worst case scenario here, and that
5464 * is that an SFP was inserted/removed after the reset
5465 * but before SFP detection was enabled. As such the best
5466 * solution is to just start searching as soon as we start
5468 if (adapter->hw.mac.type == ixgbe_mac_82598EB)
5469 adapter->flags2 |= IXGBE_FLAG2_SEARCH_FOR_SFP;
5471 adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
5472 adapter->sfp_poll_time = 0;
5476 * ixgbe_non_sfp_link_config - set up non-SFP+ link
5477 * @hw: pointer to private hardware struct
5479 * Returns 0 on success, negative on failure
5481 static int ixgbe_non_sfp_link_config(struct ixgbe_hw *hw)
5484 bool autoneg, link_up = false;
5485 int ret = IXGBE_ERR_LINK_SETUP;
5487 if (hw->mac.ops.check_link)
5488 ret = hw->mac.ops.check_link(hw, &speed, &link_up, false);
5493 speed = hw->phy.autoneg_advertised;
5494 if ((!speed) && (hw->mac.ops.get_link_capabilities))
5495 ret = hw->mac.ops.get_link_capabilities(hw, &speed,
5500 if (hw->mac.ops.setup_link)
5501 ret = hw->mac.ops.setup_link(hw, speed, link_up);
5506 static void ixgbe_setup_gpie(struct ixgbe_adapter *adapter)
5508 struct ixgbe_hw *hw = &adapter->hw;
5511 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
5512 gpie = IXGBE_GPIE_MSIX_MODE | IXGBE_GPIE_PBA_SUPPORT |
5514 gpie |= IXGBE_GPIE_EIAME;
5516 * use EIAM to auto-mask when MSI-X interrupt is asserted
5517 * this saves a register write for every interrupt
5519 switch (hw->mac.type) {
5520 case ixgbe_mac_82598EB:
5521 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
5523 case ixgbe_mac_82599EB:
5524 case ixgbe_mac_X540:
5525 case ixgbe_mac_X550:
5526 case ixgbe_mac_X550EM_x:
5527 case ixgbe_mac_x550em_a:
5529 IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(0), 0xFFFFFFFF);
5530 IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(1), 0xFFFFFFFF);
5534 /* legacy interrupts, use EIAM to auto-mask when reading EICR,
5535 * specifically only auto mask tx and rx interrupts */
5536 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
5539 /* XXX: to interrupt immediately for EICS writes, enable this */
5540 /* gpie |= IXGBE_GPIE_EIMEN; */
5542 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
5543 gpie &= ~IXGBE_GPIE_VTMODE_MASK;
5545 switch (adapter->ring_feature[RING_F_VMDQ].mask) {
5546 case IXGBE_82599_VMDQ_8Q_MASK:
5547 gpie |= IXGBE_GPIE_VTMODE_16;
5549 case IXGBE_82599_VMDQ_4Q_MASK:
5550 gpie |= IXGBE_GPIE_VTMODE_32;
5553 gpie |= IXGBE_GPIE_VTMODE_64;
5558 /* Enable Thermal over heat sensor interrupt */
5559 if (adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE) {
5560 switch (adapter->hw.mac.type) {
5561 case ixgbe_mac_82599EB:
5562 gpie |= IXGBE_SDP0_GPIEN_8259X;
5569 /* Enable fan failure interrupt */
5570 if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE)
5571 gpie |= IXGBE_SDP1_GPIEN(hw);
5573 switch (hw->mac.type) {
5574 case ixgbe_mac_82599EB:
5575 gpie |= IXGBE_SDP1_GPIEN_8259X | IXGBE_SDP2_GPIEN_8259X;
5577 case ixgbe_mac_X550EM_x:
5578 case ixgbe_mac_x550em_a:
5579 gpie |= IXGBE_SDP0_GPIEN_X540;
5585 IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie);
5588 static void ixgbe_up_complete(struct ixgbe_adapter *adapter)
5590 struct ixgbe_hw *hw = &adapter->hw;
5594 ixgbe_get_hw_control(adapter);
5595 ixgbe_setup_gpie(adapter);
5597 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
5598 ixgbe_configure_msix(adapter);
5600 ixgbe_configure_msi_and_legacy(adapter);
5602 /* enable the optics for 82599 SFP+ fiber */
5603 if (hw->mac.ops.enable_tx_laser)
5604 hw->mac.ops.enable_tx_laser(hw);
5606 if (hw->phy.ops.set_phy_power)
5607 hw->phy.ops.set_phy_power(hw, true);
5609 smp_mb__before_atomic();
5610 clear_bit(__IXGBE_DOWN, &adapter->state);
5611 ixgbe_napi_enable_all(adapter);
5613 if (ixgbe_is_sfp(hw)) {
5614 ixgbe_sfp_link_config(adapter);
5616 err = ixgbe_non_sfp_link_config(hw);
5618 e_err(probe, "link_config FAILED %d\n", err);
5621 /* clear any pending interrupts, may auto mask */
5622 IXGBE_READ_REG(hw, IXGBE_EICR);
5623 ixgbe_irq_enable(adapter, true, true);
5626 * If this adapter has a fan, check to see if we had a failure
5627 * before we enabled the interrupt.
5629 if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) {
5630 u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);
5631 if (esdp & IXGBE_ESDP_SDP1)
5632 e_crit(drv, "Fan has stopped, replace the adapter\n");
5635 /* bring the link up in the watchdog, this could race with our first
5636 * link up interrupt but shouldn't be a problem */
5637 adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
5638 adapter->link_check_timeout = jiffies;
5639 mod_timer(&adapter->service_timer, jiffies);
5641 /* Set PF Reset Done bit so PF/VF Mail Ops can work */
5642 ctrl_ext = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT);
5643 ctrl_ext |= IXGBE_CTRL_EXT_PFRSTD;
5644 IXGBE_WRITE_REG(hw, IXGBE_CTRL_EXT, ctrl_ext);
5647 void ixgbe_reinit_locked(struct ixgbe_adapter *adapter)
5649 WARN_ON(in_interrupt());
5650 /* put off any impending NetWatchDogTimeout */
5651 netif_trans_update(adapter->netdev);
5653 while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state))
5654 usleep_range(1000, 2000);
5655 if (adapter->hw.phy.type == ixgbe_phy_fw)
5656 ixgbe_watchdog_link_is_down(adapter);
5657 ixgbe_down(adapter);
5659 * If SR-IOV enabled then wait a bit before bringing the adapter
5660 * back up to give the VFs time to respond to the reset. The
5661 * two second wait is based upon the watchdog timer cycle in
5664 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
5667 clear_bit(__IXGBE_RESETTING, &adapter->state);
5670 void ixgbe_up(struct ixgbe_adapter *adapter)
5672 /* hardware has been reset, we need to reload some things */
5673 ixgbe_configure(adapter);
5675 ixgbe_up_complete(adapter);
5678 static unsigned long ixgbe_get_completion_timeout(struct ixgbe_adapter *adapter)
5682 pcie_capability_read_word(adapter->pdev, PCI_EXP_DEVCTL2, &devctl2);
5684 switch (devctl2 & IXGBE_PCIDEVCTRL2_TIMEO_MASK) {
5685 case IXGBE_PCIDEVCTRL2_17_34s:
5686 case IXGBE_PCIDEVCTRL2_4_8s:
5687 /* For now we cap the upper limit on delay to 2 seconds
5688 * as we end up going up to 34 seconds of delay in worst
5689 * case timeout value.
5691 case IXGBE_PCIDEVCTRL2_1_2s:
5692 return 2000000ul; /* 2.0 s */
5693 case IXGBE_PCIDEVCTRL2_260_520ms:
5694 return 520000ul; /* 520 ms */
5695 case IXGBE_PCIDEVCTRL2_65_130ms:
5696 return 130000ul; /* 130 ms */
5697 case IXGBE_PCIDEVCTRL2_16_32ms:
5698 return 32000ul; /* 32 ms */
5699 case IXGBE_PCIDEVCTRL2_1_2ms:
5700 return 2000ul; /* 2 ms */
5701 case IXGBE_PCIDEVCTRL2_50_100us:
5702 return 100ul; /* 100 us */
5703 case IXGBE_PCIDEVCTRL2_16_32ms_def:
5704 return 32000ul; /* 32 ms */
5709 /* We shouldn't need to hit this path, but just in case default as
5710 * though completion timeout is not supported and support 32ms.
5715 void ixgbe_disable_rx(struct ixgbe_adapter *adapter)
5717 unsigned long wait_delay, delay_interval;
5718 struct ixgbe_hw *hw = &adapter->hw;
5722 /* disable receives */
5723 hw->mac.ops.disable_rx(hw);
5725 if (ixgbe_removed(hw->hw_addr))
5728 /* disable all enabled Rx queues */
5729 for (i = 0; i < adapter->num_rx_queues; i++) {
5730 struct ixgbe_ring *ring = adapter->rx_ring[i];
5731 u8 reg_idx = ring->reg_idx;
5733 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
5734 rxdctl &= ~IXGBE_RXDCTL_ENABLE;
5735 rxdctl |= IXGBE_RXDCTL_SWFLSH;
5737 /* write value back with RXDCTL.ENABLE bit cleared */
5738 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl);
5741 /* RXDCTL.EN may not change on 82598 if link is down, so skip it */
5742 if (hw->mac.type == ixgbe_mac_82598EB &&
5743 !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
5746 /* Determine our minimum delay interval. We will increase this value
5747 * with each subsequent test. This way if the device returns quickly
5748 * we should spend as little time as possible waiting, however as
5749 * the time increases we will wait for larger periods of time.
5751 * The trick here is that we increase the interval using the
5752 * following pattern: 1x 3x 5x 7x 9x 11x 13x 15x 17x 19x. The result
5753 * of that wait is that it totals up to 100x whatever interval we
5754 * choose. Since our minimum wait is 100us we can just divide the
5755 * total timeout by 100 to get our minimum delay interval.
5757 delay_interval = ixgbe_get_completion_timeout(adapter) / 100;
5759 wait_loop = IXGBE_MAX_RX_DESC_POLL;
5760 wait_delay = delay_interval;
5762 while (wait_loop--) {
5763 usleep_range(wait_delay, wait_delay + 10);
5764 wait_delay += delay_interval * 2;
5767 /* OR together the reading of all the active RXDCTL registers,
5768 * and then test the result. We need the disable to complete
5769 * before we start freeing the memory and invalidating the
5772 for (i = 0; i < adapter->num_rx_queues; i++) {
5773 struct ixgbe_ring *ring = adapter->rx_ring[i];
5774 u8 reg_idx = ring->reg_idx;
5776 rxdctl |= IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
5779 if (!(rxdctl & IXGBE_RXDCTL_ENABLE))
5784 "RXDCTL.ENABLE for one or more queues not cleared within the polling period\n");
5787 void ixgbe_disable_tx(struct ixgbe_adapter *adapter)
5789 unsigned long wait_delay, delay_interval;
5790 struct ixgbe_hw *hw = &adapter->hw;
5794 if (ixgbe_removed(hw->hw_addr))
5797 /* disable all enabled Tx queues */
5798 for (i = 0; i < adapter->num_tx_queues; i++) {
5799 struct ixgbe_ring *ring = adapter->tx_ring[i];
5800 u8 reg_idx = ring->reg_idx;
5802 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), IXGBE_TXDCTL_SWFLSH);
5805 /* disable all enabled XDP Tx queues */
5806 for (i = 0; i < adapter->num_xdp_queues; i++) {
5807 struct ixgbe_ring *ring = adapter->xdp_ring[i];
5808 u8 reg_idx = ring->reg_idx;
5810 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), IXGBE_TXDCTL_SWFLSH);
5813 /* If the link is not up there shouldn't be much in the way of
5814 * pending transactions. Those that are left will be flushed out
5815 * when the reset logic goes through the flush sequence to clean out
5816 * the pending Tx transactions.
5818 if (!(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
5819 goto dma_engine_disable;
5821 /* Determine our minimum delay interval. We will increase this value
5822 * with each subsequent test. This way if the device returns quickly
5823 * we should spend as little time as possible waiting, however as
5824 * the time increases we will wait for larger periods of time.
5826 * The trick here is that we increase the interval using the
5827 * following pattern: 1x 3x 5x 7x 9x 11x 13x 15x 17x 19x. The result
5828 * of that wait is that it totals up to 100x whatever interval we
5829 * choose. Since our minimum wait is 100us we can just divide the
5830 * total timeout by 100 to get our minimum delay interval.
5832 delay_interval = ixgbe_get_completion_timeout(adapter) / 100;
5834 wait_loop = IXGBE_MAX_RX_DESC_POLL;
5835 wait_delay = delay_interval;
5837 while (wait_loop--) {
5838 usleep_range(wait_delay, wait_delay + 10);
5839 wait_delay += delay_interval * 2;
5842 /* OR together the reading of all the active TXDCTL registers,
5843 * and then test the result. We need the disable to complete
5844 * before we start freeing the memory and invalidating the
5847 for (i = 0; i < adapter->num_tx_queues; i++) {
5848 struct ixgbe_ring *ring = adapter->tx_ring[i];
5849 u8 reg_idx = ring->reg_idx;
5851 txdctl |= IXGBE_READ_REG(hw, IXGBE_TXDCTL(reg_idx));
5853 for (i = 0; i < adapter->num_xdp_queues; i++) {
5854 struct ixgbe_ring *ring = adapter->xdp_ring[i];
5855 u8 reg_idx = ring->reg_idx;
5857 txdctl |= IXGBE_READ_REG(hw, IXGBE_TXDCTL(reg_idx));
5860 if (!(txdctl & IXGBE_TXDCTL_ENABLE))
5861 goto dma_engine_disable;
5865 "TXDCTL.ENABLE for one or more queues not cleared within the polling period\n");
5868 /* Disable the Tx DMA engine on 82599 and later MAC */
5869 switch (hw->mac.type) {
5870 case ixgbe_mac_82599EB:
5871 case ixgbe_mac_X540:
5872 case ixgbe_mac_X550:
5873 case ixgbe_mac_X550EM_x:
5874 case ixgbe_mac_x550em_a:
5875 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL,
5876 (IXGBE_READ_REG(hw, IXGBE_DMATXCTL) &
5877 ~IXGBE_DMATXCTL_TE));
5884 void ixgbe_reset(struct ixgbe_adapter *adapter)
5886 struct ixgbe_hw *hw = &adapter->hw;
5887 struct net_device *netdev = adapter->netdev;
5890 if (ixgbe_removed(hw->hw_addr))
5892 /* lock SFP init bit to prevent race conditions with the watchdog */
5893 while (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
5894 usleep_range(1000, 2000);
5896 /* clear all SFP and link config related flags while holding SFP_INIT */
5897 adapter->flags2 &= ~(IXGBE_FLAG2_SEARCH_FOR_SFP |
5898 IXGBE_FLAG2_SFP_NEEDS_RESET);
5899 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_CONFIG;
5901 err = hw->mac.ops.init_hw(hw);
5904 case IXGBE_ERR_SFP_NOT_PRESENT:
5905 case IXGBE_ERR_SFP_NOT_SUPPORTED:
5907 case IXGBE_ERR_MASTER_REQUESTS_PENDING:
5908 e_dev_err("master disable timed out\n");
5910 case IXGBE_ERR_EEPROM_VERSION:
5911 /* We are running on a pre-production device, log a warning */
5912 e_dev_warn("This device is a pre-production adapter/LOM. "
5913 "Please be aware there may be issues associated with "
5914 "your hardware. If you are experiencing problems "
5915 "please contact your Intel or hardware "
5916 "representative who provided you with this "
5920 e_dev_err("Hardware Error: %d\n", err);
5923 clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
5925 /* flush entries out of MAC table */
5926 ixgbe_flush_sw_mac_table(adapter);
5927 __dev_uc_unsync(netdev, NULL);
5929 /* do not flush user set addresses */
5930 ixgbe_mac_set_default_filter(adapter);
5932 /* update SAN MAC vmdq pool selection */
5933 if (hw->mac.san_mac_rar_index)
5934 hw->mac.ops.set_vmdq_san_mac(hw, VMDQ_P(0));
5936 if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state))
5937 ixgbe_ptp_reset(adapter);
5939 if (hw->phy.ops.set_phy_power) {
5940 if (!netif_running(adapter->netdev) && !adapter->wol)
5941 hw->phy.ops.set_phy_power(hw, false);
5943 hw->phy.ops.set_phy_power(hw, true);
5948 * ixgbe_clean_tx_ring - Free Tx Buffers
5949 * @tx_ring: ring to be cleaned
5951 static void ixgbe_clean_tx_ring(struct ixgbe_ring *tx_ring)
5953 u16 i = tx_ring->next_to_clean;
5954 struct ixgbe_tx_buffer *tx_buffer = &tx_ring->tx_buffer_info[i];
5956 if (tx_ring->xsk_umem) {
5957 ixgbe_xsk_clean_tx_ring(tx_ring);
5961 while (i != tx_ring->next_to_use) {
5962 union ixgbe_adv_tx_desc *eop_desc, *tx_desc;
5964 /* Free all the Tx ring sk_buffs */
5965 if (ring_is_xdp(tx_ring))
5966 xdp_return_frame(tx_buffer->xdpf);
5968 dev_kfree_skb_any(tx_buffer->skb);
5970 /* unmap skb header data */
5971 dma_unmap_single(tx_ring->dev,
5972 dma_unmap_addr(tx_buffer, dma),
5973 dma_unmap_len(tx_buffer, len),
5976 /* check for eop_desc to determine the end of the packet */
5977 eop_desc = tx_buffer->next_to_watch;
5978 tx_desc = IXGBE_TX_DESC(tx_ring, i);
5980 /* unmap remaining buffers */
5981 while (tx_desc != eop_desc) {
5985 if (unlikely(i == tx_ring->count)) {
5987 tx_buffer = tx_ring->tx_buffer_info;
5988 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
5991 /* unmap any remaining paged data */
5992 if (dma_unmap_len(tx_buffer, len))
5993 dma_unmap_page(tx_ring->dev,
5994 dma_unmap_addr(tx_buffer, dma),
5995 dma_unmap_len(tx_buffer, len),
5999 /* move us one more past the eop_desc for start of next pkt */
6002 if (unlikely(i == tx_ring->count)) {
6004 tx_buffer = tx_ring->tx_buffer_info;
6008 /* reset BQL for queue */
6009 if (!ring_is_xdp(tx_ring))
6010 netdev_tx_reset_queue(txring_txq(tx_ring));
6013 /* reset next_to_use and next_to_clean */
6014 tx_ring->next_to_use = 0;
6015 tx_ring->next_to_clean = 0;
6019 * ixgbe_clean_all_rx_rings - Free Rx Buffers for all queues
6020 * @adapter: board private structure
6022 static void ixgbe_clean_all_rx_rings(struct ixgbe_adapter *adapter)
6026 for (i = 0; i < adapter->num_rx_queues; i++)
6027 ixgbe_clean_rx_ring(adapter->rx_ring[i]);
6031 * ixgbe_clean_all_tx_rings - Free Tx Buffers for all queues
6032 * @adapter: board private structure
6034 static void ixgbe_clean_all_tx_rings(struct ixgbe_adapter *adapter)
6038 for (i = 0; i < adapter->num_tx_queues; i++)
6039 ixgbe_clean_tx_ring(adapter->tx_ring[i]);
6040 for (i = 0; i < adapter->num_xdp_queues; i++)
6041 ixgbe_clean_tx_ring(adapter->xdp_ring[i]);
6044 static void ixgbe_fdir_filter_exit(struct ixgbe_adapter *adapter)
6046 struct hlist_node *node2;
6047 struct ixgbe_fdir_filter *filter;
6049 spin_lock(&adapter->fdir_perfect_lock);
6051 hlist_for_each_entry_safe(filter, node2,
6052 &adapter->fdir_filter_list, fdir_node) {
6053 hlist_del(&filter->fdir_node);
6056 adapter->fdir_filter_count = 0;
6058 spin_unlock(&adapter->fdir_perfect_lock);
6061 void ixgbe_down(struct ixgbe_adapter *adapter)
6063 struct net_device *netdev = adapter->netdev;
6064 struct ixgbe_hw *hw = &adapter->hw;
6067 /* signal that we are down to the interrupt handler */
6068 if (test_and_set_bit(__IXGBE_DOWN, &adapter->state))
6069 return; /* do nothing if already down */
6071 /* Shut off incoming Tx traffic */
6072 netif_tx_stop_all_queues(netdev);
6074 /* call carrier off first to avoid false dev_watchdog timeouts */
6075 netif_carrier_off(netdev);
6076 netif_tx_disable(netdev);
6079 ixgbe_disable_rx(adapter);
6081 /* synchronize_rcu() needed for pending XDP buffers to drain */
6082 if (adapter->xdp_ring[0])
6085 ixgbe_irq_disable(adapter);
6087 ixgbe_napi_disable_all(adapter);
6089 clear_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
6090 adapter->flags2 &= ~IXGBE_FLAG2_FDIR_REQUIRES_REINIT;
6091 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_UPDATE;
6093 del_timer_sync(&adapter->service_timer);
6095 if (adapter->num_vfs) {
6096 /* Clear EITR Select mapping */
6097 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITRSEL, 0);
6099 /* Mark all the VFs as inactive */
6100 for (i = 0 ; i < adapter->num_vfs; i++)
6101 adapter->vfinfo[i].clear_to_send = false;
6103 /* ping all the active vfs to let them know we are going down */
6104 ixgbe_ping_all_vfs(adapter);
6106 /* Disable all VFTE/VFRE TX/RX */
6107 ixgbe_disable_tx_rx(adapter);
6110 /* disable transmits in the hardware now that interrupts are off */
6111 ixgbe_disable_tx(adapter);
6113 if (!pci_channel_offline(adapter->pdev))
6114 ixgbe_reset(adapter);
6116 /* power down the optics for 82599 SFP+ fiber */
6117 if (hw->mac.ops.disable_tx_laser)
6118 hw->mac.ops.disable_tx_laser(hw);
6120 ixgbe_clean_all_tx_rings(adapter);
6121 ixgbe_clean_all_rx_rings(adapter);
6125 * ixgbe_eee_capable - helper function to determine EEE support on X550
6126 * @adapter: board private structure
6128 static void ixgbe_set_eee_capable(struct ixgbe_adapter *adapter)
6130 struct ixgbe_hw *hw = &adapter->hw;
6132 switch (hw->device_id) {
6133 case IXGBE_DEV_ID_X550EM_A_1G_T:
6134 case IXGBE_DEV_ID_X550EM_A_1G_T_L:
6135 if (!hw->phy.eee_speeds_supported)
6137 adapter->flags2 |= IXGBE_FLAG2_EEE_CAPABLE;
6138 if (!hw->phy.eee_speeds_advertised)
6140 adapter->flags2 |= IXGBE_FLAG2_EEE_ENABLED;
6143 adapter->flags2 &= ~IXGBE_FLAG2_EEE_CAPABLE;
6144 adapter->flags2 &= ~IXGBE_FLAG2_EEE_ENABLED;
6150 * ixgbe_tx_timeout - Respond to a Tx Hang
6151 * @netdev: network interface device structure
6153 static void ixgbe_tx_timeout(struct net_device *netdev)
6155 struct ixgbe_adapter *adapter = netdev_priv(netdev);
6157 /* Do the reset outside of interrupt context */
6158 ixgbe_tx_timeout_reset(adapter);
6161 #ifdef CONFIG_IXGBE_DCB
6162 static void ixgbe_init_dcb(struct ixgbe_adapter *adapter)
6164 struct ixgbe_hw *hw = &adapter->hw;
6165 struct tc_configuration *tc;
6168 switch (hw->mac.type) {
6169 case ixgbe_mac_82598EB:
6170 case ixgbe_mac_82599EB:
6171 adapter->dcb_cfg.num_tcs.pg_tcs = MAX_TRAFFIC_CLASS;
6172 adapter->dcb_cfg.num_tcs.pfc_tcs = MAX_TRAFFIC_CLASS;
6174 case ixgbe_mac_X540:
6175 case ixgbe_mac_X550:
6176 adapter->dcb_cfg.num_tcs.pg_tcs = X540_TRAFFIC_CLASS;
6177 adapter->dcb_cfg.num_tcs.pfc_tcs = X540_TRAFFIC_CLASS;
6179 case ixgbe_mac_X550EM_x:
6180 case ixgbe_mac_x550em_a:
6182 adapter->dcb_cfg.num_tcs.pg_tcs = DEF_TRAFFIC_CLASS;
6183 adapter->dcb_cfg.num_tcs.pfc_tcs = DEF_TRAFFIC_CLASS;
6187 /* Configure DCB traffic classes */
6188 for (j = 0; j < MAX_TRAFFIC_CLASS; j++) {
6189 tc = &adapter->dcb_cfg.tc_config[j];
6190 tc->path[DCB_TX_CONFIG].bwg_id = 0;
6191 tc->path[DCB_TX_CONFIG].bwg_percent = 12 + (j & 1);
6192 tc->path[DCB_RX_CONFIG].bwg_id = 0;
6193 tc->path[DCB_RX_CONFIG].bwg_percent = 12 + (j & 1);
6194 tc->dcb_pfc = pfc_disabled;
6197 /* Initialize default user to priority mapping, UPx->TC0 */
6198 tc = &adapter->dcb_cfg.tc_config[0];
6199 tc->path[DCB_TX_CONFIG].up_to_tc_bitmap = 0xFF;
6200 tc->path[DCB_RX_CONFIG].up_to_tc_bitmap = 0xFF;
6202 adapter->dcb_cfg.bw_percentage[DCB_TX_CONFIG][0] = 100;
6203 adapter->dcb_cfg.bw_percentage[DCB_RX_CONFIG][0] = 100;
6204 adapter->dcb_cfg.pfc_mode_enable = false;
6205 adapter->dcb_set_bitmap = 0x00;
6206 if (adapter->flags & IXGBE_FLAG_DCB_CAPABLE)
6207 adapter->dcbx_cap = DCB_CAP_DCBX_HOST | DCB_CAP_DCBX_VER_CEE;
6208 memcpy(&adapter->temp_dcb_cfg, &adapter->dcb_cfg,
6209 sizeof(adapter->temp_dcb_cfg));
6214 * ixgbe_sw_init - Initialize general software structures (struct ixgbe_adapter)
6215 * @adapter: board private structure to initialize
6216 * @ii: pointer to ixgbe_info for device
6218 * ixgbe_sw_init initializes the Adapter private data structure.
6219 * Fields are initialized based on PCI device information and
6220 * OS network device settings (MTU size).
6222 static int ixgbe_sw_init(struct ixgbe_adapter *adapter,
6223 const struct ixgbe_info *ii)
6225 struct ixgbe_hw *hw = &adapter->hw;
6226 struct pci_dev *pdev = adapter->pdev;
6227 unsigned int rss, fdir;
6231 /* PCI config space info */
6233 hw->vendor_id = pdev->vendor;
6234 hw->device_id = pdev->device;
6235 hw->revision_id = pdev->revision;
6236 hw->subsystem_vendor_id = pdev->subsystem_vendor;
6237 hw->subsystem_device_id = pdev->subsystem_device;
6239 /* get_invariants needs the device IDs */
6240 ii->get_invariants(hw);
6242 /* Set common capability flags and settings */
6243 rss = min_t(int, ixgbe_max_rss_indices(adapter), num_online_cpus());
6244 adapter->ring_feature[RING_F_RSS].limit = rss;
6245 adapter->flags2 |= IXGBE_FLAG2_RSC_CAPABLE;
6246 adapter->max_q_vectors = MAX_Q_VECTORS_82599;
6247 adapter->atr_sample_rate = 20;
6248 fdir = min_t(int, IXGBE_MAX_FDIR_INDICES, num_online_cpus());
6249 adapter->ring_feature[RING_F_FDIR].limit = fdir;
6250 adapter->fdir_pballoc = IXGBE_FDIR_PBALLOC_64K;
6251 adapter->ring_feature[RING_F_VMDQ].limit = 1;
6252 #ifdef CONFIG_IXGBE_DCA
6253 adapter->flags |= IXGBE_FLAG_DCA_CAPABLE;
6255 #ifdef CONFIG_IXGBE_DCB
6256 adapter->flags |= IXGBE_FLAG_DCB_CAPABLE;
6257 adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED;
6260 adapter->flags |= IXGBE_FLAG_FCOE_CAPABLE;
6261 adapter->flags &= ~IXGBE_FLAG_FCOE_ENABLED;
6262 #ifdef CONFIG_IXGBE_DCB
6263 /* Default traffic class to use for FCoE */
6264 adapter->fcoe.up = IXGBE_FCOE_DEFTC;
6265 #endif /* CONFIG_IXGBE_DCB */
6266 #endif /* IXGBE_FCOE */
6268 /* initialize static ixgbe jump table entries */
6269 adapter->jump_tables[0] = kzalloc(sizeof(*adapter->jump_tables[0]),
6271 if (!adapter->jump_tables[0])
6273 adapter->jump_tables[0]->mat = ixgbe_ipv4_fields;
6275 for (i = 1; i < IXGBE_MAX_LINK_HANDLE; i++)
6276 adapter->jump_tables[i] = NULL;
6278 adapter->mac_table = kcalloc(hw->mac.num_rar_entries,
6279 sizeof(struct ixgbe_mac_addr),
6281 if (!adapter->mac_table)
6284 if (ixgbe_init_rss_key(adapter))
6287 /* Set MAC specific capability flags and exceptions */
6288 switch (hw->mac.type) {
6289 case ixgbe_mac_82598EB:
6290 adapter->flags2 &= ~IXGBE_FLAG2_RSC_CAPABLE;
6292 if (hw->device_id == IXGBE_DEV_ID_82598AT)
6293 adapter->flags |= IXGBE_FLAG_FAN_FAIL_CAPABLE;
6295 adapter->max_q_vectors = MAX_Q_VECTORS_82598;
6296 adapter->ring_feature[RING_F_FDIR].limit = 0;
6297 adapter->atr_sample_rate = 0;
6298 adapter->fdir_pballoc = 0;
6300 adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE;
6301 adapter->flags &= ~IXGBE_FLAG_FCOE_ENABLED;
6302 #ifdef CONFIG_IXGBE_DCB
6303 adapter->fcoe.up = 0;
6304 #endif /* IXGBE_DCB */
6305 #endif /* IXGBE_FCOE */
6307 case ixgbe_mac_82599EB:
6308 if (hw->device_id == IXGBE_DEV_ID_82599_T3_LOM)
6309 adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
6311 case ixgbe_mac_X540:
6312 fwsm = IXGBE_READ_REG(hw, IXGBE_FWSM(hw));
6313 if (fwsm & IXGBE_FWSM_TS_ENABLED)
6314 adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
6316 case ixgbe_mac_x550em_a:
6317 adapter->flags |= IXGBE_FLAG_GENEVE_OFFLOAD_CAPABLE;
6318 switch (hw->device_id) {
6319 case IXGBE_DEV_ID_X550EM_A_1G_T:
6320 case IXGBE_DEV_ID_X550EM_A_1G_T_L:
6321 adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
6327 case ixgbe_mac_X550EM_x:
6328 #ifdef CONFIG_IXGBE_DCB
6329 adapter->flags &= ~IXGBE_FLAG_DCB_CAPABLE;
6332 adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE;
6333 #ifdef CONFIG_IXGBE_DCB
6334 adapter->fcoe.up = 0;
6335 #endif /* IXGBE_DCB */
6336 #endif /* IXGBE_FCOE */
6338 case ixgbe_mac_X550:
6339 if (hw->mac.type == ixgbe_mac_X550)
6340 adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
6341 #ifdef CONFIG_IXGBE_DCA
6342 adapter->flags &= ~IXGBE_FLAG_DCA_CAPABLE;
6344 adapter->flags |= IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE;
6351 /* FCoE support exists, always init the FCoE lock */
6352 spin_lock_init(&adapter->fcoe.lock);
6355 /* n-tuple support exists, always init our spinlock */
6356 spin_lock_init(&adapter->fdir_perfect_lock);
6358 #ifdef CONFIG_IXGBE_DCB
6359 ixgbe_init_dcb(adapter);
6361 ixgbe_init_ipsec_offload(adapter);
6363 /* default flow control settings */
6364 hw->fc.requested_mode = ixgbe_fc_full;
6365 hw->fc.current_mode = ixgbe_fc_full; /* init for ethtool output */
6366 ixgbe_pbthresh_setup(adapter);
6367 hw->fc.pause_time = IXGBE_DEFAULT_FCPAUSE;
6368 hw->fc.send_xon = true;
6369 hw->fc.disable_fc_autoneg = ixgbe_device_supports_autoneg_fc(hw);
6371 #ifdef CONFIG_PCI_IOV
6373 e_dev_warn("Enabling SR-IOV VFs using the max_vfs module parameter is deprecated - please use the pci sysfs interface instead.\n");
6375 /* assign number of SR-IOV VFs */
6376 if (hw->mac.type != ixgbe_mac_82598EB) {
6377 if (max_vfs > IXGBE_MAX_VFS_DRV_LIMIT) {
6379 e_dev_warn("max_vfs parameter out of range. Not assigning any SR-IOV VFs\n");
6382 #endif /* CONFIG_PCI_IOV */
6384 /* enable itr by default in dynamic mode */
6385 adapter->rx_itr_setting = 1;
6386 adapter->tx_itr_setting = 1;
6388 /* set default ring sizes */
6389 adapter->tx_ring_count = IXGBE_DEFAULT_TXD;
6390 adapter->rx_ring_count = IXGBE_DEFAULT_RXD;
6392 /* set default work limits */
6393 adapter->tx_work_limit = IXGBE_DEFAULT_TX_WORK;
6395 /* initialize eeprom parameters */
6396 if (ixgbe_init_eeprom_params_generic(hw)) {
6397 e_dev_err("EEPROM initialization failed\n");
6401 /* PF holds first pool slot */
6402 set_bit(0, adapter->fwd_bitmask);
6403 set_bit(__IXGBE_DOWN, &adapter->state);
6409 * ixgbe_setup_tx_resources - allocate Tx resources (Descriptors)
6410 * @tx_ring: tx descriptor ring (for a specific queue) to setup
6412 * Return 0 on success, negative on failure
6414 int ixgbe_setup_tx_resources(struct ixgbe_ring *tx_ring)
6416 struct device *dev = tx_ring->dev;
6417 int orig_node = dev_to_node(dev);
6421 size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count;
6423 if (tx_ring->q_vector)
6424 ring_node = tx_ring->q_vector->numa_node;
6426 tx_ring->tx_buffer_info = vmalloc_node(size, ring_node);
6427 if (!tx_ring->tx_buffer_info)
6428 tx_ring->tx_buffer_info = vmalloc(size);
6429 if (!tx_ring->tx_buffer_info)
6432 /* round up to nearest 4K */
6433 tx_ring->size = tx_ring->count * sizeof(union ixgbe_adv_tx_desc);
6434 tx_ring->size = ALIGN(tx_ring->size, 4096);
6436 set_dev_node(dev, ring_node);
6437 tx_ring->desc = dma_alloc_coherent(dev,
6441 set_dev_node(dev, orig_node);
6443 tx_ring->desc = dma_alloc_coherent(dev, tx_ring->size,
6444 &tx_ring->dma, GFP_KERNEL);
6448 tx_ring->next_to_use = 0;
6449 tx_ring->next_to_clean = 0;
6453 vfree(tx_ring->tx_buffer_info);
6454 tx_ring->tx_buffer_info = NULL;
6455 dev_err(dev, "Unable to allocate memory for the Tx descriptor ring\n");
6460 * ixgbe_setup_all_tx_resources - allocate all queues Tx resources
6461 * @adapter: board private structure
6463 * If this function returns with an error, then it's possible one or
6464 * more of the rings is populated (while the rest are not). It is the
6465 * callers duty to clean those orphaned rings.
6467 * Return 0 on success, negative on failure
6469 static int ixgbe_setup_all_tx_resources(struct ixgbe_adapter *adapter)
6471 int i, j = 0, err = 0;
6473 for (i = 0; i < adapter->num_tx_queues; i++) {
6474 err = ixgbe_setup_tx_resources(adapter->tx_ring[i]);
6478 e_err(probe, "Allocation for Tx Queue %u failed\n", i);
6481 for (j = 0; j < adapter->num_xdp_queues; j++) {
6482 err = ixgbe_setup_tx_resources(adapter->xdp_ring[j]);
6486 e_err(probe, "Allocation for Tx Queue %u failed\n", j);
6492 /* rewind the index freeing the rings as we go */
6494 ixgbe_free_tx_resources(adapter->xdp_ring[j]);
6496 ixgbe_free_tx_resources(adapter->tx_ring[i]);
6501 * ixgbe_setup_rx_resources - allocate Rx resources (Descriptors)
6502 * @adapter: pointer to ixgbe_adapter
6503 * @rx_ring: rx descriptor ring (for a specific queue) to setup
6505 * Returns 0 on success, negative on failure
6507 int ixgbe_setup_rx_resources(struct ixgbe_adapter *adapter,
6508 struct ixgbe_ring *rx_ring)
6510 struct device *dev = rx_ring->dev;
6511 int orig_node = dev_to_node(dev);
6515 size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;
6517 if (rx_ring->q_vector)
6518 ring_node = rx_ring->q_vector->numa_node;
6520 rx_ring->rx_buffer_info = vmalloc_node(size, ring_node);
6521 if (!rx_ring->rx_buffer_info)
6522 rx_ring->rx_buffer_info = vmalloc(size);
6523 if (!rx_ring->rx_buffer_info)
6526 /* Round up to nearest 4K */
6527 rx_ring->size = rx_ring->count * sizeof(union ixgbe_adv_rx_desc);
6528 rx_ring->size = ALIGN(rx_ring->size, 4096);
6530 set_dev_node(dev, ring_node);
6531 rx_ring->desc = dma_alloc_coherent(dev,
6535 set_dev_node(dev, orig_node);
6537 rx_ring->desc = dma_alloc_coherent(dev, rx_ring->size,
6538 &rx_ring->dma, GFP_KERNEL);
6542 rx_ring->next_to_clean = 0;
6543 rx_ring->next_to_use = 0;
6545 /* XDP RX-queue info */
6546 if (xdp_rxq_info_reg(&rx_ring->xdp_rxq, adapter->netdev,
6547 rx_ring->queue_index) < 0)
6550 rx_ring->xdp_prog = adapter->xdp_prog;
6554 vfree(rx_ring->rx_buffer_info);
6555 rx_ring->rx_buffer_info = NULL;
6556 dev_err(dev, "Unable to allocate memory for the Rx descriptor ring\n");
6561 * ixgbe_setup_all_rx_resources - allocate all queues Rx resources
6562 * @adapter: board private structure
6564 * If this function returns with an error, then it's possible one or
6565 * more of the rings is populated (while the rest are not). It is the
6566 * callers duty to clean those orphaned rings.
6568 * Return 0 on success, negative on failure
6570 static int ixgbe_setup_all_rx_resources(struct ixgbe_adapter *adapter)
6574 for (i = 0; i < adapter->num_rx_queues; i++) {
6575 err = ixgbe_setup_rx_resources(adapter, adapter->rx_ring[i]);
6579 e_err(probe, "Allocation for Rx Queue %u failed\n", i);
6584 err = ixgbe_setup_fcoe_ddp_resources(adapter);
6589 /* rewind the index freeing the rings as we go */
6591 ixgbe_free_rx_resources(adapter->rx_ring[i]);
6596 * ixgbe_free_tx_resources - Free Tx Resources per Queue
6597 * @tx_ring: Tx descriptor ring for a specific queue
6599 * Free all transmit software resources
6601 void ixgbe_free_tx_resources(struct ixgbe_ring *tx_ring)
6603 ixgbe_clean_tx_ring(tx_ring);
6605 vfree(tx_ring->tx_buffer_info);
6606 tx_ring->tx_buffer_info = NULL;
6608 /* if not set, then don't free */
6612 dma_free_coherent(tx_ring->dev, tx_ring->size,
6613 tx_ring->desc, tx_ring->dma);
6615 tx_ring->desc = NULL;
6619 * ixgbe_free_all_tx_resources - Free Tx Resources for All Queues
6620 * @adapter: board private structure
6622 * Free all transmit software resources
6624 static void ixgbe_free_all_tx_resources(struct ixgbe_adapter *adapter)
6628 for (i = 0; i < adapter->num_tx_queues; i++)
6629 if (adapter->tx_ring[i]->desc)
6630 ixgbe_free_tx_resources(adapter->tx_ring[i]);
6631 for (i = 0; i < adapter->num_xdp_queues; i++)
6632 if (adapter->xdp_ring[i]->desc)
6633 ixgbe_free_tx_resources(adapter->xdp_ring[i]);
6637 * ixgbe_free_rx_resources - Free Rx Resources
6638 * @rx_ring: ring to clean the resources from
6640 * Free all receive software resources
6642 void ixgbe_free_rx_resources(struct ixgbe_ring *rx_ring)
6644 ixgbe_clean_rx_ring(rx_ring);
6646 rx_ring->xdp_prog = NULL;
6647 xdp_rxq_info_unreg(&rx_ring->xdp_rxq);
6648 vfree(rx_ring->rx_buffer_info);
6649 rx_ring->rx_buffer_info = NULL;
6651 /* if not set, then don't free */
6655 dma_free_coherent(rx_ring->dev, rx_ring->size,
6656 rx_ring->desc, rx_ring->dma);
6658 rx_ring->desc = NULL;
6662 * ixgbe_free_all_rx_resources - Free Rx Resources for All Queues
6663 * @adapter: board private structure
6665 * Free all receive software resources
6667 static void ixgbe_free_all_rx_resources(struct ixgbe_adapter *adapter)
6672 ixgbe_free_fcoe_ddp_resources(adapter);
6675 for (i = 0; i < adapter->num_rx_queues; i++)
6676 if (adapter->rx_ring[i]->desc)
6677 ixgbe_free_rx_resources(adapter->rx_ring[i]);
6681 * ixgbe_change_mtu - Change the Maximum Transfer Unit
6682 * @netdev: network interface device structure
6683 * @new_mtu: new value for maximum frame size
6685 * Returns 0 on success, negative on failure
6687 static int ixgbe_change_mtu(struct net_device *netdev, int new_mtu)
6689 struct ixgbe_adapter *adapter = netdev_priv(netdev);
6691 if (adapter->xdp_prog) {
6692 int new_frame_size = new_mtu + ETH_HLEN + ETH_FCS_LEN +
6696 for (i = 0; i < adapter->num_rx_queues; i++) {
6697 struct ixgbe_ring *ring = adapter->rx_ring[i];
6699 if (new_frame_size > ixgbe_rx_bufsz(ring)) {
6700 e_warn(probe, "Requested MTU size is not supported with XDP\n");
6707 * For 82599EB we cannot allow legacy VFs to enable their receive
6708 * paths when MTU greater than 1500 is configured. So display a
6709 * warning that legacy VFs will be disabled.
6711 if ((adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) &&
6712 (adapter->hw.mac.type == ixgbe_mac_82599EB) &&
6713 (new_mtu > ETH_DATA_LEN))
6714 e_warn(probe, "Setting MTU > 1500 will disable legacy VFs\n");
6716 e_info(probe, "changing MTU from %d to %d\n", netdev->mtu, new_mtu);
6718 /* must set new MTU before calling down or up */
6719 netdev->mtu = new_mtu;
6721 if (netif_running(netdev))
6722 ixgbe_reinit_locked(adapter);
6728 * ixgbe_open - Called when a network interface is made active
6729 * @netdev: network interface device structure
6731 * Returns 0 on success, negative value on failure
6733 * The open entry point is called when a network interface is made
6734 * active by the system (IFF_UP). At this point all resources needed
6735 * for transmit and receive operations are allocated, the interrupt
6736 * handler is registered with the OS, the watchdog timer is started,
6737 * and the stack is notified that the interface is ready.
6739 int ixgbe_open(struct net_device *netdev)
6741 struct ixgbe_adapter *adapter = netdev_priv(netdev);
6742 struct ixgbe_hw *hw = &adapter->hw;
6745 /* disallow open during test */
6746 if (test_bit(__IXGBE_TESTING, &adapter->state))
6749 netif_carrier_off(netdev);
6751 /* allocate transmit descriptors */
6752 err = ixgbe_setup_all_tx_resources(adapter);
6756 /* allocate receive descriptors */
6757 err = ixgbe_setup_all_rx_resources(adapter);
6761 ixgbe_configure(adapter);
6763 err = ixgbe_request_irq(adapter);
6767 /* Notify the stack of the actual queue counts. */
6768 queues = adapter->num_tx_queues;
6769 err = netif_set_real_num_tx_queues(netdev, queues);
6771 goto err_set_queues;
6773 queues = adapter->num_rx_queues;
6774 err = netif_set_real_num_rx_queues(netdev, queues);
6776 goto err_set_queues;
6778 ixgbe_ptp_init(adapter);
6780 ixgbe_up_complete(adapter);
6782 ixgbe_clear_udp_tunnel_port(adapter, IXGBE_VXLANCTRL_ALL_UDPPORT_MASK);
6783 udp_tunnel_get_rx_info(netdev);
6788 ixgbe_free_irq(adapter);
6790 ixgbe_free_all_rx_resources(adapter);
6791 if (hw->phy.ops.set_phy_power && !adapter->wol)
6792 hw->phy.ops.set_phy_power(&adapter->hw, false);
6794 ixgbe_free_all_tx_resources(adapter);
6796 ixgbe_reset(adapter);
6801 static void ixgbe_close_suspend(struct ixgbe_adapter *adapter)
6803 ixgbe_ptp_suspend(adapter);
6805 if (adapter->hw.phy.ops.enter_lplu) {
6806 adapter->hw.phy.reset_disable = true;
6807 ixgbe_down(adapter);
6808 adapter->hw.phy.ops.enter_lplu(&adapter->hw);
6809 adapter->hw.phy.reset_disable = false;
6811 ixgbe_down(adapter);
6814 ixgbe_free_irq(adapter);
6816 ixgbe_free_all_tx_resources(adapter);
6817 ixgbe_free_all_rx_resources(adapter);
6821 * ixgbe_close - Disables a network interface
6822 * @netdev: network interface device structure
6824 * Returns 0, this is not allowed to fail
6826 * The close entry point is called when an interface is de-activated
6827 * by the OS. The hardware is still under the drivers control, but
6828 * needs to be disabled. A global MAC reset is issued to stop the
6829 * hardware, and all transmit and receive resources are freed.
6831 int ixgbe_close(struct net_device *netdev)
6833 struct ixgbe_adapter *adapter = netdev_priv(netdev);
6835 ixgbe_ptp_stop(adapter);
6837 if (netif_device_present(netdev))
6838 ixgbe_close_suspend(adapter);
6840 ixgbe_fdir_filter_exit(adapter);
6842 ixgbe_release_hw_control(adapter);
6848 static int ixgbe_resume(struct pci_dev *pdev)
6850 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
6851 struct net_device *netdev = adapter->netdev;
6854 adapter->hw.hw_addr = adapter->io_addr;
6855 pci_set_power_state(pdev, PCI_D0);
6856 pci_restore_state(pdev);
6858 * pci_restore_state clears dev->state_saved so call
6859 * pci_save_state to restore it.
6861 pci_save_state(pdev);
6863 err = pci_enable_device_mem(pdev);
6865 e_dev_err("Cannot enable PCI device from suspend\n");
6868 smp_mb__before_atomic();
6869 clear_bit(__IXGBE_DISABLED, &adapter->state);
6870 pci_set_master(pdev);
6872 pci_wake_from_d3(pdev, false);
6874 ixgbe_reset(adapter);
6876 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
6879 err = ixgbe_init_interrupt_scheme(adapter);
6880 if (!err && netif_running(netdev))
6881 err = ixgbe_open(netdev);
6885 netif_device_attach(netdev);
6890 #endif /* CONFIG_PM */
6892 static int __ixgbe_shutdown(struct pci_dev *pdev, bool *enable_wake)
6894 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
6895 struct net_device *netdev = adapter->netdev;
6896 struct ixgbe_hw *hw = &adapter->hw;
6898 u32 wufc = adapter->wol;
6904 netif_device_detach(netdev);
6906 if (netif_running(netdev))
6907 ixgbe_close_suspend(adapter);
6909 ixgbe_clear_interrupt_scheme(adapter);
6913 retval = pci_save_state(pdev);
6918 if (hw->mac.ops.stop_link_on_d3)
6919 hw->mac.ops.stop_link_on_d3(hw);
6924 ixgbe_set_rx_mode(netdev);
6926 /* enable the optics for 82599 SFP+ fiber as we can WoL */
6927 if (hw->mac.ops.enable_tx_laser)
6928 hw->mac.ops.enable_tx_laser(hw);
6930 /* enable the reception of multicast packets */
6931 fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
6932 fctrl |= IXGBE_FCTRL_MPE;
6933 IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
6935 ctrl = IXGBE_READ_REG(hw, IXGBE_CTRL);
6936 ctrl |= IXGBE_CTRL_GIO_DIS;
6937 IXGBE_WRITE_REG(hw, IXGBE_CTRL, ctrl);
6939 IXGBE_WRITE_REG(hw, IXGBE_WUFC, wufc);
6941 IXGBE_WRITE_REG(hw, IXGBE_WUC, 0);
6942 IXGBE_WRITE_REG(hw, IXGBE_WUFC, 0);
6945 switch (hw->mac.type) {
6946 case ixgbe_mac_82598EB:
6947 pci_wake_from_d3(pdev, false);
6949 case ixgbe_mac_82599EB:
6950 case ixgbe_mac_X540:
6951 case ixgbe_mac_X550:
6952 case ixgbe_mac_X550EM_x:
6953 case ixgbe_mac_x550em_a:
6954 pci_wake_from_d3(pdev, !!wufc);
6960 *enable_wake = !!wufc;
6961 if (hw->phy.ops.set_phy_power && !*enable_wake)
6962 hw->phy.ops.set_phy_power(hw, false);
6964 ixgbe_release_hw_control(adapter);
6966 if (!test_and_set_bit(__IXGBE_DISABLED, &adapter->state))
6967 pci_disable_device(pdev);
6973 static int ixgbe_suspend(struct pci_dev *pdev, pm_message_t state)
6978 retval = __ixgbe_shutdown(pdev, &wake);
6983 pci_prepare_to_sleep(pdev);
6985 pci_wake_from_d3(pdev, false);
6986 pci_set_power_state(pdev, PCI_D3hot);
6991 #endif /* CONFIG_PM */
6993 static void ixgbe_shutdown(struct pci_dev *pdev)
6997 __ixgbe_shutdown(pdev, &wake);
6999 if (system_state == SYSTEM_POWER_OFF) {
7000 pci_wake_from_d3(pdev, wake);
7001 pci_set_power_state(pdev, PCI_D3hot);
7006 * ixgbe_update_stats - Update the board statistics counters.
7007 * @adapter: board private structure
7009 void ixgbe_update_stats(struct ixgbe_adapter *adapter)
7011 struct net_device *netdev = adapter->netdev;
7012 struct ixgbe_hw *hw = &adapter->hw;
7013 struct ixgbe_hw_stats *hwstats = &adapter->stats;
7015 u32 i, missed_rx = 0, mpc, bprc, lxon, lxoff, xon_off_tot;
7016 u64 non_eop_descs = 0, restart_queue = 0, tx_busy = 0;
7017 u64 alloc_rx_page_failed = 0, alloc_rx_buff_failed = 0;
7018 u64 alloc_rx_page = 0;
7019 u64 bytes = 0, packets = 0, hw_csum_rx_error = 0;
7021 if (test_bit(__IXGBE_DOWN, &adapter->state) ||
7022 test_bit(__IXGBE_RESETTING, &adapter->state))
7025 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) {
7028 for (i = 0; i < adapter->num_rx_queues; i++) {
7029 rsc_count += adapter->rx_ring[i]->rx_stats.rsc_count;
7030 rsc_flush += adapter->rx_ring[i]->rx_stats.rsc_flush;
7032 adapter->rsc_total_count = rsc_count;
7033 adapter->rsc_total_flush = rsc_flush;
7036 for (i = 0; i < adapter->num_rx_queues; i++) {
7037 struct ixgbe_ring *rx_ring = adapter->rx_ring[i];
7038 non_eop_descs += rx_ring->rx_stats.non_eop_descs;
7039 alloc_rx_page += rx_ring->rx_stats.alloc_rx_page;
7040 alloc_rx_page_failed += rx_ring->rx_stats.alloc_rx_page_failed;
7041 alloc_rx_buff_failed += rx_ring->rx_stats.alloc_rx_buff_failed;
7042 hw_csum_rx_error += rx_ring->rx_stats.csum_err;
7043 bytes += rx_ring->stats.bytes;
7044 packets += rx_ring->stats.packets;
7046 adapter->non_eop_descs = non_eop_descs;
7047 adapter->alloc_rx_page = alloc_rx_page;
7048 adapter->alloc_rx_page_failed = alloc_rx_page_failed;
7049 adapter->alloc_rx_buff_failed = alloc_rx_buff_failed;
7050 adapter->hw_csum_rx_error = hw_csum_rx_error;
7051 netdev->stats.rx_bytes = bytes;
7052 netdev->stats.rx_packets = packets;
7056 /* gather some stats to the adapter struct that are per queue */
7057 for (i = 0; i < adapter->num_tx_queues; i++) {
7058 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
7059 restart_queue += tx_ring->tx_stats.restart_queue;
7060 tx_busy += tx_ring->tx_stats.tx_busy;
7061 bytes += tx_ring->stats.bytes;
7062 packets += tx_ring->stats.packets;
7064 for (i = 0; i < adapter->num_xdp_queues; i++) {
7065 struct ixgbe_ring *xdp_ring = adapter->xdp_ring[i];
7067 restart_queue += xdp_ring->tx_stats.restart_queue;
7068 tx_busy += xdp_ring->tx_stats.tx_busy;
7069 bytes += xdp_ring->stats.bytes;
7070 packets += xdp_ring->stats.packets;
7072 adapter->restart_queue = restart_queue;
7073 adapter->tx_busy = tx_busy;
7074 netdev->stats.tx_bytes = bytes;
7075 netdev->stats.tx_packets = packets;
7077 hwstats->crcerrs += IXGBE_READ_REG(hw, IXGBE_CRCERRS);
7079 /* 8 register reads */
7080 for (i = 0; i < 8; i++) {
7081 /* for packet buffers not used, the register should read 0 */
7082 mpc = IXGBE_READ_REG(hw, IXGBE_MPC(i));
7084 hwstats->mpc[i] += mpc;
7085 total_mpc += hwstats->mpc[i];
7086 hwstats->pxontxc[i] += IXGBE_READ_REG(hw, IXGBE_PXONTXC(i));
7087 hwstats->pxofftxc[i] += IXGBE_READ_REG(hw, IXGBE_PXOFFTXC(i));
7088 switch (hw->mac.type) {
7089 case ixgbe_mac_82598EB:
7090 hwstats->rnbc[i] += IXGBE_READ_REG(hw, IXGBE_RNBC(i));
7091 hwstats->qbtc[i] += IXGBE_READ_REG(hw, IXGBE_QBTC(i));
7092 hwstats->qbrc[i] += IXGBE_READ_REG(hw, IXGBE_QBRC(i));
7093 hwstats->pxonrxc[i] +=
7094 IXGBE_READ_REG(hw, IXGBE_PXONRXC(i));
7096 case ixgbe_mac_82599EB:
7097 case ixgbe_mac_X540:
7098 case ixgbe_mac_X550:
7099 case ixgbe_mac_X550EM_x:
7100 case ixgbe_mac_x550em_a:
7101 hwstats->pxonrxc[i] +=
7102 IXGBE_READ_REG(hw, IXGBE_PXONRXCNT(i));
7109 /*16 register reads */
7110 for (i = 0; i < 16; i++) {
7111 hwstats->qptc[i] += IXGBE_READ_REG(hw, IXGBE_QPTC(i));
7112 hwstats->qprc[i] += IXGBE_READ_REG(hw, IXGBE_QPRC(i));
7113 if ((hw->mac.type == ixgbe_mac_82599EB) ||
7114 (hw->mac.type == ixgbe_mac_X540) ||
7115 (hw->mac.type == ixgbe_mac_X550) ||
7116 (hw->mac.type == ixgbe_mac_X550EM_x) ||
7117 (hw->mac.type == ixgbe_mac_x550em_a)) {
7118 hwstats->qbtc[i] += IXGBE_READ_REG(hw, IXGBE_QBTC_L(i));
7119 IXGBE_READ_REG(hw, IXGBE_QBTC_H(i)); /* to clear */
7120 hwstats->qbrc[i] += IXGBE_READ_REG(hw, IXGBE_QBRC_L(i));
7121 IXGBE_READ_REG(hw, IXGBE_QBRC_H(i)); /* to clear */
7125 hwstats->gprc += IXGBE_READ_REG(hw, IXGBE_GPRC);
7126 /* work around hardware counting issue */
7127 hwstats->gprc -= missed_rx;
7129 ixgbe_update_xoff_received(adapter);
7131 /* 82598 hardware only has a 32 bit counter in the high register */
7132 switch (hw->mac.type) {
7133 case ixgbe_mac_82598EB:
7134 hwstats->lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXC);
7135 hwstats->gorc += IXGBE_READ_REG(hw, IXGBE_GORCH);
7136 hwstats->gotc += IXGBE_READ_REG(hw, IXGBE_GOTCH);
7137 hwstats->tor += IXGBE_READ_REG(hw, IXGBE_TORH);
7139 case ixgbe_mac_X540:
7140 case ixgbe_mac_X550:
7141 case ixgbe_mac_X550EM_x:
7142 case ixgbe_mac_x550em_a:
7143 /* OS2BMC stats are X540 and later */
7144 hwstats->o2bgptc += IXGBE_READ_REG(hw, IXGBE_O2BGPTC);
7145 hwstats->o2bspc += IXGBE_READ_REG(hw, IXGBE_O2BSPC);
7146 hwstats->b2ospc += IXGBE_READ_REG(hw, IXGBE_B2OSPC);
7147 hwstats->b2ogprc += IXGBE_READ_REG(hw, IXGBE_B2OGPRC);
7149 case ixgbe_mac_82599EB:
7150 for (i = 0; i < 16; i++)
7151 adapter->hw_rx_no_dma_resources +=
7152 IXGBE_READ_REG(hw, IXGBE_QPRDC(i));
7153 hwstats->gorc += IXGBE_READ_REG(hw, IXGBE_GORCL);
7154 IXGBE_READ_REG(hw, IXGBE_GORCH); /* to clear */
7155 hwstats->gotc += IXGBE_READ_REG(hw, IXGBE_GOTCL);
7156 IXGBE_READ_REG(hw, IXGBE_GOTCH); /* to clear */
7157 hwstats->tor += IXGBE_READ_REG(hw, IXGBE_TORL);
7158 IXGBE_READ_REG(hw, IXGBE_TORH); /* to clear */
7159 hwstats->lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXCNT);
7160 hwstats->fdirmatch += IXGBE_READ_REG(hw, IXGBE_FDIRMATCH);
7161 hwstats->fdirmiss += IXGBE_READ_REG(hw, IXGBE_FDIRMISS);
7163 hwstats->fccrc += IXGBE_READ_REG(hw, IXGBE_FCCRC);
7164 hwstats->fcoerpdc += IXGBE_READ_REG(hw, IXGBE_FCOERPDC);
7165 hwstats->fcoeprc += IXGBE_READ_REG(hw, IXGBE_FCOEPRC);
7166 hwstats->fcoeptc += IXGBE_READ_REG(hw, IXGBE_FCOEPTC);
7167 hwstats->fcoedwrc += IXGBE_READ_REG(hw, IXGBE_FCOEDWRC);
7168 hwstats->fcoedwtc += IXGBE_READ_REG(hw, IXGBE_FCOEDWTC);
7169 /* Add up per cpu counters for total ddp aloc fail */
7170 if (adapter->fcoe.ddp_pool) {
7171 struct ixgbe_fcoe *fcoe = &adapter->fcoe;
7172 struct ixgbe_fcoe_ddp_pool *ddp_pool;
7174 u64 noddp = 0, noddp_ext_buff = 0;
7175 for_each_possible_cpu(cpu) {
7176 ddp_pool = per_cpu_ptr(fcoe->ddp_pool, cpu);
7177 noddp += ddp_pool->noddp;
7178 noddp_ext_buff += ddp_pool->noddp_ext_buff;
7180 hwstats->fcoe_noddp = noddp;
7181 hwstats->fcoe_noddp_ext_buff = noddp_ext_buff;
7183 #endif /* IXGBE_FCOE */
7188 bprc = IXGBE_READ_REG(hw, IXGBE_BPRC);
7189 hwstats->bprc += bprc;
7190 hwstats->mprc += IXGBE_READ_REG(hw, IXGBE_MPRC);
7191 if (hw->mac.type == ixgbe_mac_82598EB)
7192 hwstats->mprc -= bprc;
7193 hwstats->roc += IXGBE_READ_REG(hw, IXGBE_ROC);
7194 hwstats->prc64 += IXGBE_READ_REG(hw, IXGBE_PRC64);
7195 hwstats->prc127 += IXGBE_READ_REG(hw, IXGBE_PRC127);
7196 hwstats->prc255 += IXGBE_READ_REG(hw, IXGBE_PRC255);
7197 hwstats->prc511 += IXGBE_READ_REG(hw, IXGBE_PRC511);
7198 hwstats->prc1023 += IXGBE_READ_REG(hw, IXGBE_PRC1023);
7199 hwstats->prc1522 += IXGBE_READ_REG(hw, IXGBE_PRC1522);
7200 hwstats->rlec += IXGBE_READ_REG(hw, IXGBE_RLEC);
7201 lxon = IXGBE_READ_REG(hw, IXGBE_LXONTXC);
7202 hwstats->lxontxc += lxon;
7203 lxoff = IXGBE_READ_REG(hw, IXGBE_LXOFFTXC);
7204 hwstats->lxofftxc += lxoff;
7205 hwstats->gptc += IXGBE_READ_REG(hw, IXGBE_GPTC);
7206 hwstats->mptc += IXGBE_READ_REG(hw, IXGBE_MPTC);
7208 * 82598 errata - tx of flow control packets is included in tx counters
7210 xon_off_tot = lxon + lxoff;
7211 hwstats->gptc -= xon_off_tot;
7212 hwstats->mptc -= xon_off_tot;
7213 hwstats->gotc -= (xon_off_tot * (ETH_ZLEN + ETH_FCS_LEN));
7214 hwstats->ruc += IXGBE_READ_REG(hw, IXGBE_RUC);
7215 hwstats->rfc += IXGBE_READ_REG(hw, IXGBE_RFC);
7216 hwstats->rjc += IXGBE_READ_REG(hw, IXGBE_RJC);
7217 hwstats->tpr += IXGBE_READ_REG(hw, IXGBE_TPR);
7218 hwstats->ptc64 += IXGBE_READ_REG(hw, IXGBE_PTC64);
7219 hwstats->ptc64 -= xon_off_tot;
7220 hwstats->ptc127 += IXGBE_READ_REG(hw, IXGBE_PTC127);
7221 hwstats->ptc255 += IXGBE_READ_REG(hw, IXGBE_PTC255);
7222 hwstats->ptc511 += IXGBE_READ_REG(hw, IXGBE_PTC511);
7223 hwstats->ptc1023 += IXGBE_READ_REG(hw, IXGBE_PTC1023);
7224 hwstats->ptc1522 += IXGBE_READ_REG(hw, IXGBE_PTC1522);
7225 hwstats->bptc += IXGBE_READ_REG(hw, IXGBE_BPTC);
7227 /* Fill out the OS statistics structure */
7228 netdev->stats.multicast = hwstats->mprc;
7231 netdev->stats.rx_errors = hwstats->crcerrs + hwstats->rlec;
7232 netdev->stats.rx_dropped = 0;
7233 netdev->stats.rx_length_errors = hwstats->rlec;
7234 netdev->stats.rx_crc_errors = hwstats->crcerrs;
7235 netdev->stats.rx_missed_errors = total_mpc;
7239 * ixgbe_fdir_reinit_subtask - worker thread to reinit FDIR filter table
7240 * @adapter: pointer to the device adapter structure
7242 static void ixgbe_fdir_reinit_subtask(struct ixgbe_adapter *adapter)
7244 struct ixgbe_hw *hw = &adapter->hw;
7247 if (!(adapter->flags2 & IXGBE_FLAG2_FDIR_REQUIRES_REINIT))
7250 adapter->flags2 &= ~IXGBE_FLAG2_FDIR_REQUIRES_REINIT;
7252 /* if interface is down do nothing */
7253 if (test_bit(__IXGBE_DOWN, &adapter->state))
7256 /* do nothing if we are not using signature filters */
7257 if (!(adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE))
7260 adapter->fdir_overflow++;
7262 if (ixgbe_reinit_fdir_tables_82599(hw) == 0) {
7263 for (i = 0; i < adapter->num_tx_queues; i++)
7264 set_bit(__IXGBE_TX_FDIR_INIT_DONE,
7265 &(adapter->tx_ring[i]->state));
7266 for (i = 0; i < adapter->num_xdp_queues; i++)
7267 set_bit(__IXGBE_TX_FDIR_INIT_DONE,
7268 &adapter->xdp_ring[i]->state);
7269 /* re-enable flow director interrupts */
7270 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMS_FLOW_DIR);
7272 e_err(probe, "failed to finish FDIR re-initialization, "
7273 "ignored adding FDIR ATR filters\n");
7278 * ixgbe_check_hang_subtask - check for hung queues and dropped interrupts
7279 * @adapter: pointer to the device adapter structure
7281 * This function serves two purposes. First it strobes the interrupt lines
7282 * in order to make certain interrupts are occurring. Secondly it sets the
7283 * bits needed to check for TX hangs. As a result we should immediately
7284 * determine if a hang has occurred.
7286 static void ixgbe_check_hang_subtask(struct ixgbe_adapter *adapter)
7288 struct ixgbe_hw *hw = &adapter->hw;
7292 /* If we're down, removing or resetting, just bail */
7293 if (test_bit(__IXGBE_DOWN, &adapter->state) ||
7294 test_bit(__IXGBE_REMOVING, &adapter->state) ||
7295 test_bit(__IXGBE_RESETTING, &adapter->state))
7298 /* Force detection of hung controller */
7299 if (netif_carrier_ok(adapter->netdev)) {
7300 for (i = 0; i < adapter->num_tx_queues; i++)
7301 set_check_for_tx_hang(adapter->tx_ring[i]);
7302 for (i = 0; i < adapter->num_xdp_queues; i++)
7303 set_check_for_tx_hang(adapter->xdp_ring[i]);
7306 if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
7308 * for legacy and MSI interrupts don't set any bits
7309 * that are enabled for EIAM, because this operation
7310 * would set *both* EIMS and EICS for any bit in EIAM
7312 IXGBE_WRITE_REG(hw, IXGBE_EICS,
7313 (IXGBE_EICS_TCP_TIMER | IXGBE_EICS_OTHER));
7315 /* get one bit for every active tx/rx interrupt vector */
7316 for (i = 0; i < adapter->num_q_vectors; i++) {
7317 struct ixgbe_q_vector *qv = adapter->q_vector[i];
7318 if (qv->rx.ring || qv->tx.ring)
7323 /* Cause software interrupt to ensure rings are cleaned */
7324 ixgbe_irq_rearm_queues(adapter, eics);
7328 * ixgbe_watchdog_update_link - update the link status
7329 * @adapter: pointer to the device adapter structure
7331 static void ixgbe_watchdog_update_link(struct ixgbe_adapter *adapter)
7333 struct ixgbe_hw *hw = &adapter->hw;
7334 u32 link_speed = adapter->link_speed;
7335 bool link_up = adapter->link_up;
7336 bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
7338 if (!(adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE))
7341 if (hw->mac.ops.check_link) {
7342 hw->mac.ops.check_link(hw, &link_speed, &link_up, false);
7344 /* always assume link is up, if no check link function */
7345 link_speed = IXGBE_LINK_SPEED_10GB_FULL;
7349 if (adapter->ixgbe_ieee_pfc)
7350 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
7352 if (link_up && !((adapter->flags & IXGBE_FLAG_DCB_ENABLED) && pfc_en)) {
7353 hw->mac.ops.fc_enable(hw);
7354 ixgbe_set_rx_drop_en(adapter);
7358 time_after(jiffies, (adapter->link_check_timeout +
7359 IXGBE_TRY_LINK_TIMEOUT))) {
7360 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_UPDATE;
7361 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMC_LSC);
7362 IXGBE_WRITE_FLUSH(hw);
7365 adapter->link_up = link_up;
7366 adapter->link_speed = link_speed;
7369 static void ixgbe_update_default_up(struct ixgbe_adapter *adapter)
7371 #ifdef CONFIG_IXGBE_DCB
7372 struct net_device *netdev = adapter->netdev;
7373 struct dcb_app app = {
7374 .selector = IEEE_8021QAZ_APP_SEL_ETHERTYPE,
7379 if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_IEEE)
7380 up = dcb_ieee_getapp_mask(netdev, &app);
7382 adapter->default_up = (up > 1) ? (ffs(up) - 1) : 0;
7387 * ixgbe_watchdog_link_is_up - update netif_carrier status and
7388 * print link up message
7389 * @adapter: pointer to the device adapter structure
7391 static void ixgbe_watchdog_link_is_up(struct ixgbe_adapter *adapter)
7393 struct net_device *netdev = adapter->netdev;
7394 struct ixgbe_hw *hw = &adapter->hw;
7395 u32 link_speed = adapter->link_speed;
7396 const char *speed_str;
7397 bool flow_rx, flow_tx;
7399 /* only continue if link was previously down */
7400 if (netif_carrier_ok(netdev))
7403 adapter->flags2 &= ~IXGBE_FLAG2_SEARCH_FOR_SFP;
7405 switch (hw->mac.type) {
7406 case ixgbe_mac_82598EB: {
7407 u32 frctl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
7408 u32 rmcs = IXGBE_READ_REG(hw, IXGBE_RMCS);
7409 flow_rx = !!(frctl & IXGBE_FCTRL_RFCE);
7410 flow_tx = !!(rmcs & IXGBE_RMCS_TFCE_802_3X);
7413 case ixgbe_mac_X540:
7414 case ixgbe_mac_X550:
7415 case ixgbe_mac_X550EM_x:
7416 case ixgbe_mac_x550em_a:
7417 case ixgbe_mac_82599EB: {
7418 u32 mflcn = IXGBE_READ_REG(hw, IXGBE_MFLCN);
7419 u32 fccfg = IXGBE_READ_REG(hw, IXGBE_FCCFG);
7420 flow_rx = !!(mflcn & IXGBE_MFLCN_RFCE);
7421 flow_tx = !!(fccfg & IXGBE_FCCFG_TFCE_802_3X);
7430 adapter->last_rx_ptp_check = jiffies;
7432 if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state))
7433 ixgbe_ptp_start_cyclecounter(adapter);
7435 switch (link_speed) {
7436 case IXGBE_LINK_SPEED_10GB_FULL:
7437 speed_str = "10 Gbps";
7439 case IXGBE_LINK_SPEED_5GB_FULL:
7440 speed_str = "5 Gbps";
7442 case IXGBE_LINK_SPEED_2_5GB_FULL:
7443 speed_str = "2.5 Gbps";
7445 case IXGBE_LINK_SPEED_1GB_FULL:
7446 speed_str = "1 Gbps";
7448 case IXGBE_LINK_SPEED_100_FULL:
7449 speed_str = "100 Mbps";
7451 case IXGBE_LINK_SPEED_10_FULL:
7452 speed_str = "10 Mbps";
7455 speed_str = "unknown speed";
7458 e_info(drv, "NIC Link is Up %s, Flow Control: %s\n", speed_str,
7459 ((flow_rx && flow_tx) ? "RX/TX" :
7461 (flow_tx ? "TX" : "None"))));
7463 netif_carrier_on(netdev);
7464 ixgbe_check_vf_rate_limit(adapter);
7466 /* enable transmits */
7467 netif_tx_wake_all_queues(adapter->netdev);
7469 /* update the default user priority for VFs */
7470 ixgbe_update_default_up(adapter);
7472 /* ping all the active vfs to let them know link has changed */
7473 ixgbe_ping_all_vfs(adapter);
7477 * ixgbe_watchdog_link_is_down - update netif_carrier status and
7478 * print link down message
7479 * @adapter: pointer to the adapter structure
7481 static void ixgbe_watchdog_link_is_down(struct ixgbe_adapter *adapter)
7483 struct net_device *netdev = adapter->netdev;
7484 struct ixgbe_hw *hw = &adapter->hw;
7486 adapter->link_up = false;
7487 adapter->link_speed = 0;
7489 /* only continue if link was up previously */
7490 if (!netif_carrier_ok(netdev))
7493 /* poll for SFP+ cable when link is down */
7494 if (ixgbe_is_sfp(hw) && hw->mac.type == ixgbe_mac_82598EB)
7495 adapter->flags2 |= IXGBE_FLAG2_SEARCH_FOR_SFP;
7497 if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state))
7498 ixgbe_ptp_start_cyclecounter(adapter);
7500 e_info(drv, "NIC Link is Down\n");
7501 netif_carrier_off(netdev);
7503 /* ping all the active vfs to let them know link has changed */
7504 ixgbe_ping_all_vfs(adapter);
7507 static bool ixgbe_ring_tx_pending(struct ixgbe_adapter *adapter)
7511 for (i = 0; i < adapter->num_tx_queues; i++) {
7512 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
7514 if (tx_ring->next_to_use != tx_ring->next_to_clean)
7518 for (i = 0; i < adapter->num_xdp_queues; i++) {
7519 struct ixgbe_ring *ring = adapter->xdp_ring[i];
7521 if (ring->next_to_use != ring->next_to_clean)
7528 static bool ixgbe_vf_tx_pending(struct ixgbe_adapter *adapter)
7530 struct ixgbe_hw *hw = &adapter->hw;
7531 struct ixgbe_ring_feature *vmdq = &adapter->ring_feature[RING_F_VMDQ];
7532 u32 q_per_pool = __ALIGN_MASK(1, ~vmdq->mask);
7536 if (!adapter->num_vfs)
7539 /* resetting the PF is only needed for MAC before X550 */
7540 if (hw->mac.type >= ixgbe_mac_X550)
7543 for (i = 0; i < adapter->num_vfs; i++) {
7544 for (j = 0; j < q_per_pool; j++) {
7547 h = IXGBE_READ_REG(hw, IXGBE_PVFTDHN(q_per_pool, i, j));
7548 t = IXGBE_READ_REG(hw, IXGBE_PVFTDTN(q_per_pool, i, j));
7559 * ixgbe_watchdog_flush_tx - flush queues on link down
7560 * @adapter: pointer to the device adapter structure
7562 static void ixgbe_watchdog_flush_tx(struct ixgbe_adapter *adapter)
7564 if (!netif_carrier_ok(adapter->netdev)) {
7565 if (ixgbe_ring_tx_pending(adapter) ||
7566 ixgbe_vf_tx_pending(adapter)) {
7567 /* We've lost link, so the controller stops DMA,
7568 * but we've got queued Tx work that's never going
7569 * to get done, so reset controller to flush Tx.
7570 * (Do the reset outside of interrupt context).
7572 e_warn(drv, "initiating reset to clear Tx work after link loss\n");
7573 set_bit(__IXGBE_RESET_REQUESTED, &adapter->state);
7578 #ifdef CONFIG_PCI_IOV
7579 static void ixgbe_check_for_bad_vf(struct ixgbe_adapter *adapter)
7581 struct ixgbe_hw *hw = &adapter->hw;
7582 struct pci_dev *pdev = adapter->pdev;
7586 if (!(netif_carrier_ok(adapter->netdev)))
7589 gpc = IXGBE_READ_REG(hw, IXGBE_TXDGPC);
7590 if (gpc) /* If incrementing then no need for the check below */
7592 /* Check to see if a bad DMA write target from an errant or
7593 * malicious VF has caused a PCIe error. If so then we can
7594 * issue a VFLR to the offending VF(s) and then resume without
7595 * requesting a full slot reset.
7601 /* check status reg for all VFs owned by this PF */
7602 for (vf = 0; vf < adapter->num_vfs; ++vf) {
7603 struct pci_dev *vfdev = adapter->vfinfo[vf].vfdev;
7608 pci_read_config_word(vfdev, PCI_STATUS, &status_reg);
7609 if (status_reg != IXGBE_FAILED_READ_CFG_WORD &&
7610 status_reg & PCI_STATUS_REC_MASTER_ABORT)
7615 static void ixgbe_spoof_check(struct ixgbe_adapter *adapter)
7619 /* Do not perform spoof check for 82598 or if not in IOV mode */
7620 if (adapter->hw.mac.type == ixgbe_mac_82598EB ||
7621 adapter->num_vfs == 0)
7624 ssvpc = IXGBE_READ_REG(&adapter->hw, IXGBE_SSVPC);
7627 * ssvpc register is cleared on read, if zero then no
7628 * spoofed packets in the last interval.
7633 e_warn(drv, "%u Spoofed packets detected\n", ssvpc);
7636 static void ixgbe_spoof_check(struct ixgbe_adapter __always_unused *adapter)
7641 ixgbe_check_for_bad_vf(struct ixgbe_adapter __always_unused *adapter)
7644 #endif /* CONFIG_PCI_IOV */
7648 * ixgbe_watchdog_subtask - check and bring link up
7649 * @adapter: pointer to the device adapter structure
7651 static void ixgbe_watchdog_subtask(struct ixgbe_adapter *adapter)
7653 /* if interface is down, removing or resetting, do nothing */
7654 if (test_bit(__IXGBE_DOWN, &adapter->state) ||
7655 test_bit(__IXGBE_REMOVING, &adapter->state) ||
7656 test_bit(__IXGBE_RESETTING, &adapter->state))
7659 ixgbe_watchdog_update_link(adapter);
7661 if (adapter->link_up)
7662 ixgbe_watchdog_link_is_up(adapter);
7664 ixgbe_watchdog_link_is_down(adapter);
7666 ixgbe_check_for_bad_vf(adapter);
7667 ixgbe_spoof_check(adapter);
7668 ixgbe_update_stats(adapter);
7670 ixgbe_watchdog_flush_tx(adapter);
7674 * ixgbe_sfp_detection_subtask - poll for SFP+ cable
7675 * @adapter: the ixgbe adapter structure
7677 static void ixgbe_sfp_detection_subtask(struct ixgbe_adapter *adapter)
7679 struct ixgbe_hw *hw = &adapter->hw;
7682 /* not searching for SFP so there is nothing to do here */
7683 if (!(adapter->flags2 & IXGBE_FLAG2_SEARCH_FOR_SFP) &&
7684 !(adapter->flags2 & IXGBE_FLAG2_SFP_NEEDS_RESET))
7687 if (adapter->sfp_poll_time &&
7688 time_after(adapter->sfp_poll_time, jiffies))
7689 return; /* If not yet time to poll for SFP */
7691 /* someone else is in init, wait until next service event */
7692 if (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
7695 adapter->sfp_poll_time = jiffies + IXGBE_SFP_POLL_JIFFIES - 1;
7697 err = hw->phy.ops.identify_sfp(hw);
7698 if (err == IXGBE_ERR_SFP_NOT_SUPPORTED)
7701 if (err == IXGBE_ERR_SFP_NOT_PRESENT) {
7702 /* If no cable is present, then we need to reset
7703 * the next time we find a good cable. */
7704 adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
7711 /* exit if reset not needed */
7712 if (!(adapter->flags2 & IXGBE_FLAG2_SFP_NEEDS_RESET))
7715 adapter->flags2 &= ~IXGBE_FLAG2_SFP_NEEDS_RESET;
7718 * A module may be identified correctly, but the EEPROM may not have
7719 * support for that module. setup_sfp() will fail in that case, so
7720 * we should not allow that module to load.
7722 if (hw->mac.type == ixgbe_mac_82598EB)
7723 err = hw->phy.ops.reset(hw);
7725 err = hw->mac.ops.setup_sfp(hw);
7727 if (err == IXGBE_ERR_SFP_NOT_SUPPORTED)
7730 adapter->flags |= IXGBE_FLAG_NEED_LINK_CONFIG;
7731 e_info(probe, "detected SFP+: %d\n", hw->phy.sfp_type);
7734 clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
7736 if ((err == IXGBE_ERR_SFP_NOT_SUPPORTED) &&
7737 (adapter->netdev->reg_state == NETREG_REGISTERED)) {
7738 e_dev_err("failed to initialize because an unsupported "
7739 "SFP+ module type was detected.\n");
7740 e_dev_err("Reload the driver after installing a "
7741 "supported module.\n");
7742 unregister_netdev(adapter->netdev);
7747 * ixgbe_sfp_link_config_subtask - set up link SFP after module install
7748 * @adapter: the ixgbe adapter structure
7750 static void ixgbe_sfp_link_config_subtask(struct ixgbe_adapter *adapter)
7752 struct ixgbe_hw *hw = &adapter->hw;
7755 bool autoneg = false;
7757 if (!(adapter->flags & IXGBE_FLAG_NEED_LINK_CONFIG))
7760 /* someone else is in init, wait until next service event */
7761 if (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
7764 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_CONFIG;
7766 hw->mac.ops.get_link_capabilities(hw, &cap_speed, &autoneg);
7768 /* advertise highest capable link speed */
7769 if (!autoneg && (cap_speed & IXGBE_LINK_SPEED_10GB_FULL))
7770 speed = IXGBE_LINK_SPEED_10GB_FULL;
7772 speed = cap_speed & (IXGBE_LINK_SPEED_10GB_FULL |
7773 IXGBE_LINK_SPEED_1GB_FULL);
7775 if (hw->mac.ops.setup_link)
7776 hw->mac.ops.setup_link(hw, speed, true);
7778 adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
7779 adapter->link_check_timeout = jiffies;
7780 clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
7784 * ixgbe_service_timer - Timer Call-back
7785 * @t: pointer to timer_list structure
7787 static void ixgbe_service_timer(struct timer_list *t)
7789 struct ixgbe_adapter *adapter = from_timer(adapter, t, service_timer);
7790 unsigned long next_event_offset;
7792 /* poll faster when waiting for link */
7793 if (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE)
7794 next_event_offset = HZ / 10;
7796 next_event_offset = HZ * 2;
7798 /* Reset the timer */
7799 mod_timer(&adapter->service_timer, next_event_offset + jiffies);
7801 ixgbe_service_event_schedule(adapter);
7804 static void ixgbe_phy_interrupt_subtask(struct ixgbe_adapter *adapter)
7806 struct ixgbe_hw *hw = &adapter->hw;
7809 if (!(adapter->flags2 & IXGBE_FLAG2_PHY_INTERRUPT))
7812 adapter->flags2 &= ~IXGBE_FLAG2_PHY_INTERRUPT;
7814 if (!hw->phy.ops.handle_lasi)
7817 status = hw->phy.ops.handle_lasi(&adapter->hw);
7818 if (status != IXGBE_ERR_OVERTEMP)
7821 e_crit(drv, "%s\n", ixgbe_overheat_msg);
7824 static void ixgbe_reset_subtask(struct ixgbe_adapter *adapter)
7826 if (!test_and_clear_bit(__IXGBE_RESET_REQUESTED, &adapter->state))
7830 /* If we're already down, removing or resetting, just bail */
7831 if (test_bit(__IXGBE_DOWN, &adapter->state) ||
7832 test_bit(__IXGBE_REMOVING, &adapter->state) ||
7833 test_bit(__IXGBE_RESETTING, &adapter->state)) {
7838 ixgbe_dump(adapter);
7839 netdev_err(adapter->netdev, "Reset adapter\n");
7840 adapter->tx_timeout_count++;
7842 ixgbe_reinit_locked(adapter);
7847 * ixgbe_check_fw_error - Check firmware for errors
7848 * @adapter: the adapter private structure
7850 * Check firmware errors in register FWSM
7852 static bool ixgbe_check_fw_error(struct ixgbe_adapter *adapter)
7854 struct ixgbe_hw *hw = &adapter->hw;
7857 /* read fwsm.ext_err_ind register and log errors */
7858 fwsm = IXGBE_READ_REG(hw, IXGBE_FWSM(hw));
7860 if (fwsm & IXGBE_FWSM_EXT_ERR_IND_MASK ||
7861 !(fwsm & IXGBE_FWSM_FW_VAL_BIT))
7862 e_dev_warn("Warning firmware error detected FWSM: 0x%08X\n",
7865 if (hw->mac.ops.fw_recovery_mode && hw->mac.ops.fw_recovery_mode(hw)) {
7866 e_dev_err("Firmware recovery mode detected. Limiting functionality. Refer to the Intel(R) Ethernet Adapters and Devices User Guide for details on firmware recovery mode.\n");
7874 * ixgbe_service_task - manages and runs subtasks
7875 * @work: pointer to work_struct containing our data
7877 static void ixgbe_service_task(struct work_struct *work)
7879 struct ixgbe_adapter *adapter = container_of(work,
7880 struct ixgbe_adapter,
7882 if (ixgbe_removed(adapter->hw.hw_addr)) {
7883 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
7885 ixgbe_down(adapter);
7888 ixgbe_service_event_complete(adapter);
7891 if (ixgbe_check_fw_error(adapter)) {
7892 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
7894 unregister_netdev(adapter->netdev);
7897 ixgbe_service_event_complete(adapter);
7900 if (adapter->flags2 & IXGBE_FLAG2_UDP_TUN_REREG_NEEDED) {
7902 adapter->flags2 &= ~IXGBE_FLAG2_UDP_TUN_REREG_NEEDED;
7903 udp_tunnel_get_rx_info(adapter->netdev);
7906 ixgbe_reset_subtask(adapter);
7907 ixgbe_phy_interrupt_subtask(adapter);
7908 ixgbe_sfp_detection_subtask(adapter);
7909 ixgbe_sfp_link_config_subtask(adapter);
7910 ixgbe_check_overtemp_subtask(adapter);
7911 ixgbe_watchdog_subtask(adapter);
7912 ixgbe_fdir_reinit_subtask(adapter);
7913 ixgbe_check_hang_subtask(adapter);
7915 if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state)) {
7916 ixgbe_ptp_overflow_check(adapter);
7917 if (adapter->flags & IXGBE_FLAG_RX_HWTSTAMP_IN_REGISTER)
7918 ixgbe_ptp_rx_hang(adapter);
7919 ixgbe_ptp_tx_hang(adapter);
7922 ixgbe_service_event_complete(adapter);
7925 static int ixgbe_tso(struct ixgbe_ring *tx_ring,
7926 struct ixgbe_tx_buffer *first,
7928 struct ixgbe_ipsec_tx_data *itd)
7930 u32 vlan_macip_lens, type_tucmd, mss_l4len_idx;
7931 struct sk_buff *skb = first->skb;
7941 u32 paylen, l4_offset;
7942 u32 fceof_saidx = 0;
7945 if (skb->ip_summed != CHECKSUM_PARTIAL)
7948 if (!skb_is_gso(skb))
7951 err = skb_cow_head(skb, 0);
7955 if (eth_p_mpls(first->protocol))
7956 ip.hdr = skb_inner_network_header(skb);
7958 ip.hdr = skb_network_header(skb);
7959 l4.hdr = skb_checksum_start(skb);
7961 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
7962 type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_TCP;
7964 /* initialize outer IP header fields */
7965 if (ip.v4->version == 4) {
7966 unsigned char *csum_start = skb_checksum_start(skb);
7967 unsigned char *trans_start = ip.hdr + (ip.v4->ihl * 4);
7968 int len = csum_start - trans_start;
7970 /* IP header will have to cancel out any data that
7971 * is not a part of the outer IP header, so set to
7972 * a reverse csum if needed, else init check to 0.
7974 ip.v4->check = (skb_shinfo(skb)->gso_type & SKB_GSO_PARTIAL) ?
7975 csum_fold(csum_partial(trans_start,
7977 type_tucmd |= IXGBE_ADVTXD_TUCMD_IPV4;
7980 first->tx_flags |= IXGBE_TX_FLAGS_TSO |
7981 IXGBE_TX_FLAGS_CSUM |
7982 IXGBE_TX_FLAGS_IPV4;
7984 ip.v6->payload_len = 0;
7985 first->tx_flags |= IXGBE_TX_FLAGS_TSO |
7986 IXGBE_TX_FLAGS_CSUM;
7989 /* determine offset of inner transport header */
7990 l4_offset = l4.hdr - skb->data;
7992 /* compute length of segmentation header */
7993 *hdr_len = (l4.tcp->doff * 4) + l4_offset;
7995 /* remove payload length from inner checksum */
7996 paylen = skb->len - l4_offset;
7997 csum_replace_by_diff(&l4.tcp->check, (__force __wsum)htonl(paylen));
7999 /* update gso size and bytecount with header size */
8000 first->gso_segs = skb_shinfo(skb)->gso_segs;
8001 first->bytecount += (first->gso_segs - 1) * *hdr_len;
8003 /* mss_l4len_id: use 0 as index for TSO */
8004 mss_l4len_idx = (*hdr_len - l4_offset) << IXGBE_ADVTXD_L4LEN_SHIFT;
8005 mss_l4len_idx |= skb_shinfo(skb)->gso_size << IXGBE_ADVTXD_MSS_SHIFT;
8007 fceof_saidx |= itd->sa_idx;
8008 type_tucmd |= itd->flags | itd->trailer_len;
8010 /* vlan_macip_lens: HEADLEN, MACLEN, VLAN tag */
8011 vlan_macip_lens = l4.hdr - ip.hdr;
8012 vlan_macip_lens |= (ip.hdr - skb->data) << IXGBE_ADVTXD_MACLEN_SHIFT;
8013 vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
8015 ixgbe_tx_ctxtdesc(tx_ring, vlan_macip_lens, fceof_saidx, type_tucmd,
8021 static inline bool ixgbe_ipv6_csum_is_sctp(struct sk_buff *skb)
8023 unsigned int offset = 0;
8025 ipv6_find_hdr(skb, &offset, IPPROTO_SCTP, NULL, NULL);
8027 return offset == skb_checksum_start_offset(skb);
8030 static void ixgbe_tx_csum(struct ixgbe_ring *tx_ring,
8031 struct ixgbe_tx_buffer *first,
8032 struct ixgbe_ipsec_tx_data *itd)
8034 struct sk_buff *skb = first->skb;
8035 u32 vlan_macip_lens = 0;
8036 u32 fceof_saidx = 0;
8039 if (skb->ip_summed != CHECKSUM_PARTIAL) {
8041 if (!(first->tx_flags & (IXGBE_TX_FLAGS_HW_VLAN |
8042 IXGBE_TX_FLAGS_CC)))
8047 switch (skb->csum_offset) {
8048 case offsetof(struct tcphdr, check):
8049 type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_TCP;
8051 case offsetof(struct udphdr, check):
8053 case offsetof(struct sctphdr, checksum):
8054 /* validate that this is actually an SCTP request */
8055 if (((first->protocol == htons(ETH_P_IP)) &&
8056 (ip_hdr(skb)->protocol == IPPROTO_SCTP)) ||
8057 ((first->protocol == htons(ETH_P_IPV6)) &&
8058 ixgbe_ipv6_csum_is_sctp(skb))) {
8059 type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_SCTP;
8064 skb_checksum_help(skb);
8068 /* update TX checksum flag */
8069 first->tx_flags |= IXGBE_TX_FLAGS_CSUM;
8070 vlan_macip_lens = skb_checksum_start_offset(skb) -
8071 skb_network_offset(skb);
8073 /* vlan_macip_lens: MACLEN, VLAN tag */
8074 vlan_macip_lens |= skb_network_offset(skb) << IXGBE_ADVTXD_MACLEN_SHIFT;
8075 vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
8077 fceof_saidx |= itd->sa_idx;
8078 type_tucmd |= itd->flags | itd->trailer_len;
8080 ixgbe_tx_ctxtdesc(tx_ring, vlan_macip_lens, fceof_saidx, type_tucmd, 0);
8083 #define IXGBE_SET_FLAG(_input, _flag, _result) \
8084 ((_flag <= _result) ? \
8085 ((u32)(_input & _flag) * (_result / _flag)) : \
8086 ((u32)(_input & _flag) / (_flag / _result)))
8088 static u32 ixgbe_tx_cmd_type(struct sk_buff *skb, u32 tx_flags)
8090 /* set type for advanced descriptor with frame checksum insertion */
8091 u32 cmd_type = IXGBE_ADVTXD_DTYP_DATA |
8092 IXGBE_ADVTXD_DCMD_DEXT |
8093 IXGBE_ADVTXD_DCMD_IFCS;
8095 /* set HW vlan bit if vlan is present */
8096 cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_HW_VLAN,
8097 IXGBE_ADVTXD_DCMD_VLE);
8099 /* set segmentation enable bits for TSO/FSO */
8100 cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_TSO,
8101 IXGBE_ADVTXD_DCMD_TSE);
8103 /* set timestamp bit if present */
8104 cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_TSTAMP,
8105 IXGBE_ADVTXD_MAC_TSTAMP);
8107 /* insert frame checksum */
8108 cmd_type ^= IXGBE_SET_FLAG(skb->no_fcs, 1, IXGBE_ADVTXD_DCMD_IFCS);
8113 static void ixgbe_tx_olinfo_status(union ixgbe_adv_tx_desc *tx_desc,
8114 u32 tx_flags, unsigned int paylen)
8116 u32 olinfo_status = paylen << IXGBE_ADVTXD_PAYLEN_SHIFT;
8118 /* enable L4 checksum for TSO and TX checksum offload */
8119 olinfo_status |= IXGBE_SET_FLAG(tx_flags,
8120 IXGBE_TX_FLAGS_CSUM,
8121 IXGBE_ADVTXD_POPTS_TXSM);
8123 /* enable IPv4 checksum for TSO */
8124 olinfo_status |= IXGBE_SET_FLAG(tx_flags,
8125 IXGBE_TX_FLAGS_IPV4,
8126 IXGBE_ADVTXD_POPTS_IXSM);
8129 olinfo_status |= IXGBE_SET_FLAG(tx_flags,
8130 IXGBE_TX_FLAGS_IPSEC,
8131 IXGBE_ADVTXD_POPTS_IPSEC);
8134 * Check Context must be set if Tx switch is enabled, which it
8135 * always is for case where virtual functions are running
8137 olinfo_status |= IXGBE_SET_FLAG(tx_flags,
8141 tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
8144 static int __ixgbe_maybe_stop_tx(struct ixgbe_ring *tx_ring, u16 size)
8146 netif_stop_subqueue(tx_ring->netdev, tx_ring->queue_index);
8148 /* Herbert's original patch had:
8149 * smp_mb__after_netif_stop_queue();
8150 * but since that doesn't exist yet, just open code it.
8154 /* We need to check again in a case another CPU has just
8155 * made room available.
8157 if (likely(ixgbe_desc_unused(tx_ring) < size))
8160 /* A reprieve! - use start_queue because it doesn't call schedule */
8161 netif_start_subqueue(tx_ring->netdev, tx_ring->queue_index);
8162 ++tx_ring->tx_stats.restart_queue;
8166 static inline int ixgbe_maybe_stop_tx(struct ixgbe_ring *tx_ring, u16 size)
8168 if (likely(ixgbe_desc_unused(tx_ring) >= size))
8171 return __ixgbe_maybe_stop_tx(tx_ring, size);
8174 static int ixgbe_tx_map(struct ixgbe_ring *tx_ring,
8175 struct ixgbe_tx_buffer *first,
8178 struct sk_buff *skb = first->skb;
8179 struct ixgbe_tx_buffer *tx_buffer;
8180 union ixgbe_adv_tx_desc *tx_desc;
8181 struct skb_frag_struct *frag;
8183 unsigned int data_len, size;
8184 u32 tx_flags = first->tx_flags;
8185 u32 cmd_type = ixgbe_tx_cmd_type(skb, tx_flags);
8186 u16 i = tx_ring->next_to_use;
8188 tx_desc = IXGBE_TX_DESC(tx_ring, i);
8190 ixgbe_tx_olinfo_status(tx_desc, tx_flags, skb->len - hdr_len);
8192 size = skb_headlen(skb);
8193 data_len = skb->data_len;
8196 if (tx_flags & IXGBE_TX_FLAGS_FCOE) {
8197 if (data_len < sizeof(struct fcoe_crc_eof)) {
8198 size -= sizeof(struct fcoe_crc_eof) - data_len;
8201 data_len -= sizeof(struct fcoe_crc_eof);
8206 dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE);
8210 for (frag = &skb_shinfo(skb)->frags[0];; frag++) {
8211 if (dma_mapping_error(tx_ring->dev, dma))
8214 /* record length, and DMA address */
8215 dma_unmap_len_set(tx_buffer, len, size);
8216 dma_unmap_addr_set(tx_buffer, dma, dma);
8218 tx_desc->read.buffer_addr = cpu_to_le64(dma);
8220 while (unlikely(size > IXGBE_MAX_DATA_PER_TXD)) {
8221 tx_desc->read.cmd_type_len =
8222 cpu_to_le32(cmd_type ^ IXGBE_MAX_DATA_PER_TXD);
8226 if (i == tx_ring->count) {
8227 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
8230 tx_desc->read.olinfo_status = 0;
8232 dma += IXGBE_MAX_DATA_PER_TXD;
8233 size -= IXGBE_MAX_DATA_PER_TXD;
8235 tx_desc->read.buffer_addr = cpu_to_le64(dma);
8238 if (likely(!data_len))
8241 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type ^ size);
8245 if (i == tx_ring->count) {
8246 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
8249 tx_desc->read.olinfo_status = 0;
8252 size = min_t(unsigned int, data_len, skb_frag_size(frag));
8254 size = skb_frag_size(frag);
8258 dma = skb_frag_dma_map(tx_ring->dev, frag, 0, size,
8261 tx_buffer = &tx_ring->tx_buffer_info[i];
8264 /* write last descriptor with RS and EOP bits */
8265 cmd_type |= size | IXGBE_TXD_CMD;
8266 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type);
8268 netdev_tx_sent_queue(txring_txq(tx_ring), first->bytecount);
8270 /* set the timestamp */
8271 first->time_stamp = jiffies;
8273 skb_tx_timestamp(skb);
8276 * Force memory writes to complete before letting h/w know there
8277 * are new descriptors to fetch. (Only applicable for weak-ordered
8278 * memory model archs, such as IA-64).
8280 * We also need this memory barrier to make certain all of the
8281 * status bits have been updated before next_to_watch is written.
8285 /* set next_to_watch value indicating a packet is present */
8286 first->next_to_watch = tx_desc;
8289 if (i == tx_ring->count)
8292 tx_ring->next_to_use = i;
8294 ixgbe_maybe_stop_tx(tx_ring, DESC_NEEDED);
8296 if (netif_xmit_stopped(txring_txq(tx_ring)) || !skb->xmit_more) {
8297 writel(i, tx_ring->tail);
8299 /* we need this if more than one processor can write to our tail
8300 * at a time, it synchronizes IO on IA64/Altix systems
8307 dev_err(tx_ring->dev, "TX DMA map failed\n");
8309 /* clear dma mappings for failed tx_buffer_info map */
8311 tx_buffer = &tx_ring->tx_buffer_info[i];
8312 if (dma_unmap_len(tx_buffer, len))
8313 dma_unmap_page(tx_ring->dev,
8314 dma_unmap_addr(tx_buffer, dma),
8315 dma_unmap_len(tx_buffer, len),
8317 dma_unmap_len_set(tx_buffer, len, 0);
8318 if (tx_buffer == first)
8321 i += tx_ring->count;
8325 dev_kfree_skb_any(first->skb);
8328 tx_ring->next_to_use = i;
8333 static void ixgbe_atr(struct ixgbe_ring *ring,
8334 struct ixgbe_tx_buffer *first)
8336 struct ixgbe_q_vector *q_vector = ring->q_vector;
8337 union ixgbe_atr_hash_dword input = { .dword = 0 };
8338 union ixgbe_atr_hash_dword common = { .dword = 0 };
8340 unsigned char *network;
8342 struct ipv6hdr *ipv6;
8346 struct sk_buff *skb;
8350 /* if ring doesn't have a interrupt vector, cannot perform ATR */
8354 /* do nothing if sampling is disabled */
8355 if (!ring->atr_sample_rate)
8360 /* currently only IPv4/IPv6 with TCP is supported */
8361 if ((first->protocol != htons(ETH_P_IP)) &&
8362 (first->protocol != htons(ETH_P_IPV6)))
8365 /* snag network header to get L4 type and address */
8367 hdr.network = skb_network_header(skb);
8368 if (unlikely(hdr.network <= skb->data))
8370 if (skb->encapsulation &&
8371 first->protocol == htons(ETH_P_IP) &&
8372 hdr.ipv4->protocol == IPPROTO_UDP) {
8373 struct ixgbe_adapter *adapter = q_vector->adapter;
8375 if (unlikely(skb_tail_pointer(skb) < hdr.network +
8379 /* verify the port is recognized as VXLAN */
8380 if (adapter->vxlan_port &&
8381 udp_hdr(skb)->dest == adapter->vxlan_port)
8382 hdr.network = skb_inner_network_header(skb);
8384 if (adapter->geneve_port &&
8385 udp_hdr(skb)->dest == adapter->geneve_port)
8386 hdr.network = skb_inner_network_header(skb);
8389 /* Make sure we have at least [minimum IPv4 header + TCP]
8390 * or [IPv6 header] bytes
8392 if (unlikely(skb_tail_pointer(skb) < hdr.network + 40))
8395 /* Currently only IPv4/IPv6 with TCP is supported */
8396 switch (hdr.ipv4->version) {
8398 /* access ihl as u8 to avoid unaligned access on ia64 */
8399 hlen = (hdr.network[0] & 0x0F) << 2;
8400 l4_proto = hdr.ipv4->protocol;
8403 hlen = hdr.network - skb->data;
8404 l4_proto = ipv6_find_hdr(skb, &hlen, IPPROTO_TCP, NULL, NULL);
8405 hlen -= hdr.network - skb->data;
8411 if (l4_proto != IPPROTO_TCP)
8414 if (unlikely(skb_tail_pointer(skb) < hdr.network +
8415 hlen + sizeof(struct tcphdr)))
8418 th = (struct tcphdr *)(hdr.network + hlen);
8420 /* skip this packet since the socket is closing */
8424 /* sample on all syn packets or once every atr sample count */
8425 if (!th->syn && (ring->atr_count < ring->atr_sample_rate))
8428 /* reset sample count */
8429 ring->atr_count = 0;
8431 vlan_id = htons(first->tx_flags >> IXGBE_TX_FLAGS_VLAN_SHIFT);
8434 * src and dst are inverted, think how the receiver sees them
8436 * The input is broken into two sections, a non-compressed section
8437 * containing vm_pool, vlan_id, and flow_type. The rest of the data
8438 * is XORed together and stored in the compressed dword.
8440 input.formatted.vlan_id = vlan_id;
8443 * since src port and flex bytes occupy the same word XOR them together
8444 * and write the value to source port portion of compressed dword
8446 if (first->tx_flags & (IXGBE_TX_FLAGS_SW_VLAN | IXGBE_TX_FLAGS_HW_VLAN))
8447 common.port.src ^= th->dest ^ htons(ETH_P_8021Q);
8449 common.port.src ^= th->dest ^ first->protocol;
8450 common.port.dst ^= th->source;
8452 switch (hdr.ipv4->version) {
8454 input.formatted.flow_type = IXGBE_ATR_FLOW_TYPE_TCPV4;
8455 common.ip ^= hdr.ipv4->saddr ^ hdr.ipv4->daddr;
8458 input.formatted.flow_type = IXGBE_ATR_FLOW_TYPE_TCPV6;
8459 common.ip ^= hdr.ipv6->saddr.s6_addr32[0] ^
8460 hdr.ipv6->saddr.s6_addr32[1] ^
8461 hdr.ipv6->saddr.s6_addr32[2] ^
8462 hdr.ipv6->saddr.s6_addr32[3] ^
8463 hdr.ipv6->daddr.s6_addr32[0] ^
8464 hdr.ipv6->daddr.s6_addr32[1] ^
8465 hdr.ipv6->daddr.s6_addr32[2] ^
8466 hdr.ipv6->daddr.s6_addr32[3];
8472 if (hdr.network != skb_network_header(skb))
8473 input.formatted.flow_type |= IXGBE_ATR_L4TYPE_TUNNEL_MASK;
8475 /* This assumes the Rx queue and Tx queue are bound to the same CPU */
8476 ixgbe_fdir_add_signature_filter_82599(&q_vector->adapter->hw,
8477 input, common, ring->queue_index);
8481 static u16 ixgbe_select_queue(struct net_device *dev, struct sk_buff *skb,
8482 struct net_device *sb_dev,
8483 select_queue_fallback_t fallback)
8485 struct ixgbe_adapter *adapter;
8486 struct ixgbe_ring_feature *f;
8490 u8 tc = netdev_get_prio_tc_map(dev, skb->priority);
8491 struct net_device *vdev = sb_dev;
8493 txq = vdev->tc_to_txq[tc].offset;
8494 txq += reciprocal_scale(skb_get_hash(skb),
8495 vdev->tc_to_txq[tc].count);
8501 * only execute the code below if protocol is FCoE
8502 * or FIP and we have FCoE enabled on the adapter
8504 switch (vlan_get_protocol(skb)) {
8505 case htons(ETH_P_FCOE):
8506 case htons(ETH_P_FIP):
8507 adapter = netdev_priv(dev);
8509 if (!sb_dev && (adapter->flags & IXGBE_FLAG_FCOE_ENABLED))
8513 return fallback(dev, skb, sb_dev);
8516 f = &adapter->ring_feature[RING_F_FCOE];
8518 txq = skb_rx_queue_recorded(skb) ? skb_get_rx_queue(skb) :
8521 while (txq >= f->indices)
8524 return txq + f->offset;
8528 int ixgbe_xmit_xdp_ring(struct ixgbe_adapter *adapter,
8529 struct xdp_frame *xdpf)
8531 struct ixgbe_ring *ring = adapter->xdp_ring[smp_processor_id()];
8532 struct ixgbe_tx_buffer *tx_buffer;
8533 union ixgbe_adv_tx_desc *tx_desc;
8540 if (unlikely(!ixgbe_desc_unused(ring)))
8541 return IXGBE_XDP_CONSUMED;
8543 dma = dma_map_single(ring->dev, xdpf->data, len, DMA_TO_DEVICE);
8544 if (dma_mapping_error(ring->dev, dma))
8545 return IXGBE_XDP_CONSUMED;
8547 /* record the location of the first descriptor for this packet */
8548 tx_buffer = &ring->tx_buffer_info[ring->next_to_use];
8549 tx_buffer->bytecount = len;
8550 tx_buffer->gso_segs = 1;
8551 tx_buffer->protocol = 0;
8553 i = ring->next_to_use;
8554 tx_desc = IXGBE_TX_DESC(ring, i);
8556 dma_unmap_len_set(tx_buffer, len, len);
8557 dma_unmap_addr_set(tx_buffer, dma, dma);
8558 tx_buffer->xdpf = xdpf;
8560 tx_desc->read.buffer_addr = cpu_to_le64(dma);
8562 /* put descriptor type bits */
8563 cmd_type = IXGBE_ADVTXD_DTYP_DATA |
8564 IXGBE_ADVTXD_DCMD_DEXT |
8565 IXGBE_ADVTXD_DCMD_IFCS;
8566 cmd_type |= len | IXGBE_TXD_CMD;
8567 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type);
8568 tx_desc->read.olinfo_status =
8569 cpu_to_le32(len << IXGBE_ADVTXD_PAYLEN_SHIFT);
8571 /* Avoid any potential race with xdp_xmit and cleanup */
8574 /* set next_to_watch value indicating a packet is present */
8576 if (i == ring->count)
8579 tx_buffer->next_to_watch = tx_desc;
8580 ring->next_to_use = i;
8582 return IXGBE_XDP_TX;
8585 netdev_tx_t ixgbe_xmit_frame_ring(struct sk_buff *skb,
8586 struct ixgbe_adapter *adapter,
8587 struct ixgbe_ring *tx_ring)
8589 struct ixgbe_tx_buffer *first;
8593 u16 count = TXD_USE_COUNT(skb_headlen(skb));
8594 struct ixgbe_ipsec_tx_data ipsec_tx = { 0 };
8595 __be16 protocol = skb->protocol;
8599 * need: 1 descriptor per page * PAGE_SIZE/IXGBE_MAX_DATA_PER_TXD,
8600 * + 1 desc for skb_headlen/IXGBE_MAX_DATA_PER_TXD,
8601 * + 2 desc gap to keep tail from touching head,
8602 * + 1 desc for context descriptor,
8603 * otherwise try next time
8605 for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
8606 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
8608 if (ixgbe_maybe_stop_tx(tx_ring, count + 3)) {
8609 tx_ring->tx_stats.tx_busy++;
8610 return NETDEV_TX_BUSY;
8613 /* record the location of the first descriptor for this packet */
8614 first = &tx_ring->tx_buffer_info[tx_ring->next_to_use];
8616 first->bytecount = skb->len;
8617 first->gso_segs = 1;
8619 /* if we have a HW VLAN tag being added default to the HW one */
8620 if (skb_vlan_tag_present(skb)) {
8621 tx_flags |= skb_vlan_tag_get(skb) << IXGBE_TX_FLAGS_VLAN_SHIFT;
8622 tx_flags |= IXGBE_TX_FLAGS_HW_VLAN;
8623 /* else if it is a SW VLAN check the next protocol and store the tag */
8624 } else if (protocol == htons(ETH_P_8021Q)) {
8625 struct vlan_hdr *vhdr, _vhdr;
8626 vhdr = skb_header_pointer(skb, ETH_HLEN, sizeof(_vhdr), &_vhdr);
8630 tx_flags |= ntohs(vhdr->h_vlan_TCI) <<
8631 IXGBE_TX_FLAGS_VLAN_SHIFT;
8632 tx_flags |= IXGBE_TX_FLAGS_SW_VLAN;
8634 protocol = vlan_get_protocol(skb);
8636 if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) &&
8637 adapter->ptp_clock) {
8638 if (!test_and_set_bit_lock(__IXGBE_PTP_TX_IN_PROGRESS,
8640 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
8641 tx_flags |= IXGBE_TX_FLAGS_TSTAMP;
8643 /* schedule check for Tx timestamp */
8644 adapter->ptp_tx_skb = skb_get(skb);
8645 adapter->ptp_tx_start = jiffies;
8646 schedule_work(&adapter->ptp_tx_work);
8648 adapter->tx_hwtstamp_skipped++;
8652 #ifdef CONFIG_PCI_IOV
8654 * Use the l2switch_enable flag - would be false if the DMA
8655 * Tx switch had been disabled.
8657 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
8658 tx_flags |= IXGBE_TX_FLAGS_CC;
8661 /* DCB maps skb priorities 0-7 onto 3 bit PCP of VLAN tag. */
8662 if ((adapter->flags & IXGBE_FLAG_DCB_ENABLED) &&
8663 ((tx_flags & (IXGBE_TX_FLAGS_HW_VLAN | IXGBE_TX_FLAGS_SW_VLAN)) ||
8664 (skb->priority != TC_PRIO_CONTROL))) {
8665 tx_flags &= ~IXGBE_TX_FLAGS_VLAN_PRIO_MASK;
8666 tx_flags |= (skb->priority & 0x7) <<
8667 IXGBE_TX_FLAGS_VLAN_PRIO_SHIFT;
8668 if (tx_flags & IXGBE_TX_FLAGS_SW_VLAN) {
8669 struct vlan_ethhdr *vhdr;
8671 if (skb_cow_head(skb, 0))
8673 vhdr = (struct vlan_ethhdr *)skb->data;
8674 vhdr->h_vlan_TCI = htons(tx_flags >>
8675 IXGBE_TX_FLAGS_VLAN_SHIFT);
8677 tx_flags |= IXGBE_TX_FLAGS_HW_VLAN;
8681 /* record initial flags and protocol */
8682 first->tx_flags = tx_flags;
8683 first->protocol = protocol;
8686 /* setup tx offload for FCoE */
8687 if ((protocol == htons(ETH_P_FCOE)) &&
8688 (tx_ring->netdev->features & (NETIF_F_FSO | NETIF_F_FCOE_CRC))) {
8689 tso = ixgbe_fso(tx_ring, first, &hdr_len);
8696 #endif /* IXGBE_FCOE */
8698 #ifdef CONFIG_IXGBE_IPSEC
8699 if (secpath_exists(skb) &&
8700 !ixgbe_ipsec_tx(tx_ring, first, &ipsec_tx))
8703 tso = ixgbe_tso(tx_ring, first, &hdr_len, &ipsec_tx);
8707 ixgbe_tx_csum(tx_ring, first, &ipsec_tx);
8709 /* add the ATR filter if ATR is on */
8710 if (test_bit(__IXGBE_TX_FDIR_INIT_DONE, &tx_ring->state))
8711 ixgbe_atr(tx_ring, first);
8715 #endif /* IXGBE_FCOE */
8716 if (ixgbe_tx_map(tx_ring, first, hdr_len))
8717 goto cleanup_tx_timestamp;
8719 return NETDEV_TX_OK;
8722 dev_kfree_skb_any(first->skb);
8724 cleanup_tx_timestamp:
8725 if (unlikely(tx_flags & IXGBE_TX_FLAGS_TSTAMP)) {
8726 dev_kfree_skb_any(adapter->ptp_tx_skb);
8727 adapter->ptp_tx_skb = NULL;
8728 cancel_work_sync(&adapter->ptp_tx_work);
8729 clear_bit_unlock(__IXGBE_PTP_TX_IN_PROGRESS, &adapter->state);
8732 return NETDEV_TX_OK;
8735 static netdev_tx_t __ixgbe_xmit_frame(struct sk_buff *skb,
8736 struct net_device *netdev,
8737 struct ixgbe_ring *ring)
8739 struct ixgbe_adapter *adapter = netdev_priv(netdev);
8740 struct ixgbe_ring *tx_ring;
8743 * The minimum packet size for olinfo paylen is 17 so pad the skb
8744 * in order to meet this minimum size requirement.
8746 if (skb_put_padto(skb, 17))
8747 return NETDEV_TX_OK;
8749 tx_ring = ring ? ring : adapter->tx_ring[skb->queue_mapping];
8750 if (unlikely(test_bit(__IXGBE_TX_DISABLED, &tx_ring->state)))
8751 return NETDEV_TX_BUSY;
8753 return ixgbe_xmit_frame_ring(skb, adapter, tx_ring);
8756 static netdev_tx_t ixgbe_xmit_frame(struct sk_buff *skb,
8757 struct net_device *netdev)
8759 return __ixgbe_xmit_frame(skb, netdev, NULL);
8763 * ixgbe_set_mac - Change the Ethernet Address of the NIC
8764 * @netdev: network interface device structure
8765 * @p: pointer to an address structure
8767 * Returns 0 on success, negative on failure
8769 static int ixgbe_set_mac(struct net_device *netdev, void *p)
8771 struct ixgbe_adapter *adapter = netdev_priv(netdev);
8772 struct ixgbe_hw *hw = &adapter->hw;
8773 struct sockaddr *addr = p;
8775 if (!is_valid_ether_addr(addr->sa_data))
8776 return -EADDRNOTAVAIL;
8778 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
8779 memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
8781 ixgbe_mac_set_default_filter(adapter);
8787 ixgbe_mdio_read(struct net_device *netdev, int prtad, int devad, u16 addr)
8789 struct ixgbe_adapter *adapter = netdev_priv(netdev);
8790 struct ixgbe_hw *hw = &adapter->hw;
8794 if (adapter->mii_bus) {
8797 if (devad != MDIO_DEVAD_NONE)
8798 regnum |= (devad << 16) | MII_ADDR_C45;
8800 return mdiobus_read(adapter->mii_bus, prtad, regnum);
8803 if (prtad != hw->phy.mdio.prtad)
8805 rc = hw->phy.ops.read_reg(hw, addr, devad, &value);
8811 static int ixgbe_mdio_write(struct net_device *netdev, int prtad, int devad,
8812 u16 addr, u16 value)
8814 struct ixgbe_adapter *adapter = netdev_priv(netdev);
8815 struct ixgbe_hw *hw = &adapter->hw;
8817 if (adapter->mii_bus) {
8820 if (devad != MDIO_DEVAD_NONE)
8821 regnum |= (devad << 16) | MII_ADDR_C45;
8823 return mdiobus_write(adapter->mii_bus, prtad, regnum, value);
8826 if (prtad != hw->phy.mdio.prtad)
8828 return hw->phy.ops.write_reg(hw, addr, devad, value);
8831 static int ixgbe_ioctl(struct net_device *netdev, struct ifreq *req, int cmd)
8833 struct ixgbe_adapter *adapter = netdev_priv(netdev);
8837 return ixgbe_ptp_set_ts_config(adapter, req);
8839 return ixgbe_ptp_get_ts_config(adapter, req);
8841 if (!adapter->hw.phy.ops.read_reg)
8845 return mdio_mii_ioctl(&adapter->hw.phy.mdio, if_mii(req), cmd);
8850 * ixgbe_add_sanmac_netdev - Add the SAN MAC address to the corresponding
8852 * @dev: network interface device structure
8854 * Returns non-zero on failure
8856 static int ixgbe_add_sanmac_netdev(struct net_device *dev)
8859 struct ixgbe_adapter *adapter = netdev_priv(dev);
8860 struct ixgbe_hw *hw = &adapter->hw;
8862 if (is_valid_ether_addr(hw->mac.san_addr)) {
8864 err = dev_addr_add(dev, hw->mac.san_addr, NETDEV_HW_ADDR_T_SAN);
8867 /* update SAN MAC vmdq pool selection */
8868 hw->mac.ops.set_vmdq_san_mac(hw, VMDQ_P(0));
8874 * ixgbe_del_sanmac_netdev - Removes the SAN MAC address to the corresponding
8876 * @dev: network interface device structure
8878 * Returns non-zero on failure
8880 static int ixgbe_del_sanmac_netdev(struct net_device *dev)
8883 struct ixgbe_adapter *adapter = netdev_priv(dev);
8884 struct ixgbe_mac_info *mac = &adapter->hw.mac;
8886 if (is_valid_ether_addr(mac->san_addr)) {
8888 err = dev_addr_del(dev, mac->san_addr, NETDEV_HW_ADDR_T_SAN);
8894 static void ixgbe_get_ring_stats64(struct rtnl_link_stats64 *stats,
8895 struct ixgbe_ring *ring)
8902 start = u64_stats_fetch_begin_irq(&ring->syncp);
8903 packets = ring->stats.packets;
8904 bytes = ring->stats.bytes;
8905 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
8906 stats->tx_packets += packets;
8907 stats->tx_bytes += bytes;
8911 static void ixgbe_get_stats64(struct net_device *netdev,
8912 struct rtnl_link_stats64 *stats)
8914 struct ixgbe_adapter *adapter = netdev_priv(netdev);
8918 for (i = 0; i < adapter->num_rx_queues; i++) {
8919 struct ixgbe_ring *ring = READ_ONCE(adapter->rx_ring[i]);
8925 start = u64_stats_fetch_begin_irq(&ring->syncp);
8926 packets = ring->stats.packets;
8927 bytes = ring->stats.bytes;
8928 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
8929 stats->rx_packets += packets;
8930 stats->rx_bytes += bytes;
8934 for (i = 0; i < adapter->num_tx_queues; i++) {
8935 struct ixgbe_ring *ring = READ_ONCE(adapter->tx_ring[i]);
8937 ixgbe_get_ring_stats64(stats, ring);
8939 for (i = 0; i < adapter->num_xdp_queues; i++) {
8940 struct ixgbe_ring *ring = READ_ONCE(adapter->xdp_ring[i]);
8942 ixgbe_get_ring_stats64(stats, ring);
8946 /* following stats updated by ixgbe_watchdog_task() */
8947 stats->multicast = netdev->stats.multicast;
8948 stats->rx_errors = netdev->stats.rx_errors;
8949 stats->rx_length_errors = netdev->stats.rx_length_errors;
8950 stats->rx_crc_errors = netdev->stats.rx_crc_errors;
8951 stats->rx_missed_errors = netdev->stats.rx_missed_errors;
8954 #ifdef CONFIG_IXGBE_DCB
8956 * ixgbe_validate_rtr - verify 802.1Qp to Rx packet buffer mapping is valid.
8957 * @adapter: pointer to ixgbe_adapter
8958 * @tc: number of traffic classes currently enabled
8960 * Configure a valid 802.1Qp to Rx packet buffer mapping ie confirm
8961 * 802.1Q priority maps to a packet buffer that exists.
8963 static void ixgbe_validate_rtr(struct ixgbe_adapter *adapter, u8 tc)
8965 struct ixgbe_hw *hw = &adapter->hw;
8969 /* 82598 have a static priority to TC mapping that can not
8970 * be changed so no validation is needed.
8972 if (hw->mac.type == ixgbe_mac_82598EB)
8975 reg = IXGBE_READ_REG(hw, IXGBE_RTRUP2TC);
8978 for (i = 0; i < MAX_TRAFFIC_CLASS; i++) {
8979 u8 up2tc = reg >> (i * IXGBE_RTRUP2TC_UP_SHIFT);
8981 /* If up2tc is out of bounds default to zero */
8983 reg &= ~(0x7 << IXGBE_RTRUP2TC_UP_SHIFT);
8987 IXGBE_WRITE_REG(hw, IXGBE_RTRUP2TC, reg);
8993 * ixgbe_set_prio_tc_map - Configure netdev prio tc map
8994 * @adapter: Pointer to adapter struct
8996 * Populate the netdev user priority to tc map
8998 static void ixgbe_set_prio_tc_map(struct ixgbe_adapter *adapter)
9000 struct net_device *dev = adapter->netdev;
9001 struct ixgbe_dcb_config *dcb_cfg = &adapter->dcb_cfg;
9002 struct ieee_ets *ets = adapter->ixgbe_ieee_ets;
9005 for (prio = 0; prio < MAX_USER_PRIORITY; prio++) {
9008 if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_CEE)
9009 tc = ixgbe_dcb_get_tc_from_up(dcb_cfg, 0, prio);
9011 tc = ets->prio_tc[prio];
9013 netdev_set_prio_tc_map(dev, prio, tc);
9017 #endif /* CONFIG_IXGBE_DCB */
9018 static int ixgbe_reassign_macvlan_pool(struct net_device *vdev, void *data)
9020 struct ixgbe_adapter *adapter = data;
9021 struct ixgbe_fwd_adapter *accel;
9024 /* we only care about macvlans... */
9025 if (!netif_is_macvlan(vdev))
9028 /* that have hardware offload enabled... */
9029 accel = macvlan_accel_priv(vdev);
9033 /* If we can relocate to a different bit do so */
9034 pool = find_first_zero_bit(adapter->fwd_bitmask, adapter->num_rx_pools);
9035 if (pool < adapter->num_rx_pools) {
9036 set_bit(pool, adapter->fwd_bitmask);
9041 /* if we cannot find a free pool then disable the offload */
9042 netdev_err(vdev, "L2FW offload disabled due to lack of queue resources\n");
9043 macvlan_release_l2fw_offload(vdev);
9045 /* unbind the queues and drop the subordinate channel config */
9046 netdev_unbind_sb_channel(adapter->netdev, vdev);
9047 netdev_set_sb_channel(vdev, 0);
9054 static void ixgbe_defrag_macvlan_pools(struct net_device *dev)
9056 struct ixgbe_adapter *adapter = netdev_priv(dev);
9058 /* flush any stale bits out of the fwd bitmask */
9059 bitmap_clear(adapter->fwd_bitmask, 1, 63);
9061 /* walk through upper devices reassigning pools */
9062 netdev_walk_all_upper_dev_rcu(dev, ixgbe_reassign_macvlan_pool,
9067 * ixgbe_setup_tc - configure net_device for multiple traffic classes
9069 * @dev: net device to configure
9070 * @tc: number of traffic classes to enable
9072 int ixgbe_setup_tc(struct net_device *dev, u8 tc)
9074 struct ixgbe_adapter *adapter = netdev_priv(dev);
9075 struct ixgbe_hw *hw = &adapter->hw;
9077 /* Hardware supports up to 8 traffic classes */
9078 if (tc > adapter->dcb_cfg.num_tcs.pg_tcs)
9081 if (hw->mac.type == ixgbe_mac_82598EB && tc && tc < MAX_TRAFFIC_CLASS)
9084 /* Hardware has to reinitialize queues and interrupts to
9085 * match packet buffer alignment. Unfortunately, the
9086 * hardware is not flexible enough to do this dynamically.
9088 if (netif_running(dev))
9091 ixgbe_reset(adapter);
9093 ixgbe_clear_interrupt_scheme(adapter);
9095 #ifdef CONFIG_IXGBE_DCB
9097 if (adapter->xdp_prog) {
9098 e_warn(probe, "DCB is not supported with XDP\n");
9100 ixgbe_init_interrupt_scheme(adapter);
9101 if (netif_running(dev))
9106 netdev_set_num_tc(dev, tc);
9107 ixgbe_set_prio_tc_map(adapter);
9109 adapter->hw_tcs = tc;
9110 adapter->flags |= IXGBE_FLAG_DCB_ENABLED;
9112 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
9113 adapter->last_lfc_mode = adapter->hw.fc.requested_mode;
9114 adapter->hw.fc.requested_mode = ixgbe_fc_none;
9117 netdev_reset_tc(dev);
9119 if (adapter->hw.mac.type == ixgbe_mac_82598EB)
9120 adapter->hw.fc.requested_mode = adapter->last_lfc_mode;
9122 adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED;
9123 adapter->hw_tcs = tc;
9125 adapter->temp_dcb_cfg.pfc_mode_enable = false;
9126 adapter->dcb_cfg.pfc_mode_enable = false;
9129 ixgbe_validate_rtr(adapter, tc);
9131 #endif /* CONFIG_IXGBE_DCB */
9132 ixgbe_init_interrupt_scheme(adapter);
9134 ixgbe_defrag_macvlan_pools(dev);
9136 if (netif_running(dev))
9137 return ixgbe_open(dev);
9142 static int ixgbe_delete_clsu32(struct ixgbe_adapter *adapter,
9143 struct tc_cls_u32_offload *cls)
9145 u32 hdl = cls->knode.handle;
9146 u32 uhtid = TC_U32_USERHTID(cls->knode.handle);
9147 u32 loc = cls->knode.handle & 0xfffff;
9149 struct ixgbe_jump_table *jump = NULL;
9151 if (loc > IXGBE_MAX_HW_ENTRIES)
9154 if ((uhtid != 0x800) && (uhtid >= IXGBE_MAX_LINK_HANDLE))
9157 /* Clear this filter in the link data it is associated with */
9158 if (uhtid != 0x800) {
9159 jump = adapter->jump_tables[uhtid];
9162 if (!test_bit(loc - 1, jump->child_loc_map))
9164 clear_bit(loc - 1, jump->child_loc_map);
9167 /* Check if the filter being deleted is a link */
9168 for (i = 1; i < IXGBE_MAX_LINK_HANDLE; i++) {
9169 jump = adapter->jump_tables[i];
9170 if (jump && jump->link_hdl == hdl) {
9171 /* Delete filters in the hardware in the child hash
9172 * table associated with this link
9174 for (j = 0; j < IXGBE_MAX_HW_ENTRIES; j++) {
9175 if (!test_bit(j, jump->child_loc_map))
9177 spin_lock(&adapter->fdir_perfect_lock);
9178 err = ixgbe_update_ethtool_fdir_entry(adapter,
9181 spin_unlock(&adapter->fdir_perfect_lock);
9182 clear_bit(j, jump->child_loc_map);
9184 /* Remove resources for this link */
9188 adapter->jump_tables[i] = NULL;
9193 spin_lock(&adapter->fdir_perfect_lock);
9194 err = ixgbe_update_ethtool_fdir_entry(adapter, NULL, loc);
9195 spin_unlock(&adapter->fdir_perfect_lock);
9199 static int ixgbe_configure_clsu32_add_hnode(struct ixgbe_adapter *adapter,
9200 struct tc_cls_u32_offload *cls)
9202 u32 uhtid = TC_U32_USERHTID(cls->hnode.handle);
9204 if (uhtid >= IXGBE_MAX_LINK_HANDLE)
9207 /* This ixgbe devices do not support hash tables at the moment
9208 * so abort when given hash tables.
9210 if (cls->hnode.divisor > 0)
9213 set_bit(uhtid - 1, &adapter->tables);
9217 static int ixgbe_configure_clsu32_del_hnode(struct ixgbe_adapter *adapter,
9218 struct tc_cls_u32_offload *cls)
9220 u32 uhtid = TC_U32_USERHTID(cls->hnode.handle);
9222 if (uhtid >= IXGBE_MAX_LINK_HANDLE)
9225 clear_bit(uhtid - 1, &adapter->tables);
9229 #ifdef CONFIG_NET_CLS_ACT
9230 struct upper_walk_data {
9231 struct ixgbe_adapter *adapter;
9237 static int get_macvlan_queue(struct net_device *upper, void *_data)
9239 if (netif_is_macvlan(upper)) {
9240 struct ixgbe_fwd_adapter *vadapter = macvlan_accel_priv(upper);
9241 struct upper_walk_data *data = _data;
9242 struct ixgbe_adapter *adapter = data->adapter;
9243 int ifindex = data->ifindex;
9245 if (vadapter && upper->ifindex == ifindex) {
9246 data->queue = adapter->rx_ring[vadapter->rx_base_queue]->reg_idx;
9247 data->action = data->queue;
9255 static int handle_redirect_action(struct ixgbe_adapter *adapter, int ifindex,
9256 u8 *queue, u64 *action)
9258 struct ixgbe_ring_feature *vmdq = &adapter->ring_feature[RING_F_VMDQ];
9259 unsigned int num_vfs = adapter->num_vfs, vf;
9260 struct upper_walk_data data;
9261 struct net_device *upper;
9263 /* redirect to a SRIOV VF */
9264 for (vf = 0; vf < num_vfs; ++vf) {
9265 upper = pci_get_drvdata(adapter->vfinfo[vf].vfdev);
9266 if (upper->ifindex == ifindex) {
9267 *queue = vf * __ALIGN_MASK(1, ~vmdq->mask);
9269 *action <<= ETHTOOL_RX_FLOW_SPEC_RING_VF_OFF;
9274 /* redirect to a offloaded macvlan netdev */
9275 data.adapter = adapter;
9276 data.ifindex = ifindex;
9279 if (netdev_walk_all_upper_dev_rcu(adapter->netdev,
9280 get_macvlan_queue, &data)) {
9281 *action = data.action;
9282 *queue = data.queue;
9290 static int parse_tc_actions(struct ixgbe_adapter *adapter,
9291 struct tcf_exts *exts, u64 *action, u8 *queue)
9293 const struct tc_action *a;
9296 if (!tcf_exts_has_actions(exts))
9299 tcf_exts_for_each_action(i, a, exts) {
9301 if (is_tcf_gact_shot(a)) {
9302 *action = IXGBE_FDIR_DROP_QUEUE;
9303 *queue = IXGBE_FDIR_DROP_QUEUE;
9307 /* Redirect to a VF or a offloaded macvlan */
9308 if (is_tcf_mirred_egress_redirect(a)) {
9309 struct net_device *dev = tcf_mirred_dev(a);
9313 return handle_redirect_action(adapter, dev->ifindex,
9323 static int parse_tc_actions(struct ixgbe_adapter *adapter,
9324 struct tcf_exts *exts, u64 *action, u8 *queue)
9328 #endif /* CONFIG_NET_CLS_ACT */
9330 static int ixgbe_clsu32_build_input(struct ixgbe_fdir_filter *input,
9331 union ixgbe_atr_input *mask,
9332 struct tc_cls_u32_offload *cls,
9333 struct ixgbe_mat_field *field_ptr,
9334 struct ixgbe_nexthdr *nexthdr)
9338 bool found_entry = false, found_jump_field = false;
9340 for (i = 0; i < cls->knode.sel->nkeys; i++) {
9341 off = cls->knode.sel->keys[i].off;
9342 val = cls->knode.sel->keys[i].val;
9343 m = cls->knode.sel->keys[i].mask;
9345 for (j = 0; field_ptr[j].val; j++) {
9346 if (field_ptr[j].off == off) {
9347 field_ptr[j].val(input, mask, (__force u32)val,
9349 input->filter.formatted.flow_type |=
9356 if (nexthdr->off == cls->knode.sel->keys[i].off &&
9358 (__force u32)cls->knode.sel->keys[i].val &&
9360 (__force u32)cls->knode.sel->keys[i].mask)
9361 found_jump_field = true;
9367 if (nexthdr && !found_jump_field)
9373 mask->formatted.flow_type = IXGBE_ATR_L4TYPE_IPV6_MASK |
9374 IXGBE_ATR_L4TYPE_MASK;
9376 if (input->filter.formatted.flow_type == IXGBE_ATR_FLOW_TYPE_IPV4)
9377 mask->formatted.flow_type &= IXGBE_ATR_L4TYPE_IPV6_MASK;
9382 static int ixgbe_configure_clsu32(struct ixgbe_adapter *adapter,
9383 struct tc_cls_u32_offload *cls)
9385 __be16 protocol = cls->common.protocol;
9386 u32 loc = cls->knode.handle & 0xfffff;
9387 struct ixgbe_hw *hw = &adapter->hw;
9388 struct ixgbe_mat_field *field_ptr;
9389 struct ixgbe_fdir_filter *input = NULL;
9390 union ixgbe_atr_input *mask = NULL;
9391 struct ixgbe_jump_table *jump = NULL;
9392 int i, err = -EINVAL;
9394 u32 uhtid, link_uhtid;
9396 uhtid = TC_U32_USERHTID(cls->knode.handle);
9397 link_uhtid = TC_U32_USERHTID(cls->knode.link_handle);
9399 /* At the moment cls_u32 jumps to network layer and skips past
9400 * L2 headers. The canonical method to match L2 frames is to use
9401 * negative values. However this is error prone at best but really
9402 * just broken because there is no way to "know" what sort of hdr
9403 * is in front of the network layer. Fix cls_u32 to support L2
9404 * headers when needed.
9406 if (protocol != htons(ETH_P_IP))
9409 if (loc >= ((1024 << adapter->fdir_pballoc) - 2)) {
9410 e_err(drv, "Location out of range\n");
9414 /* cls u32 is a graph starting at root node 0x800. The driver tracks
9415 * links and also the fields used to advance the parser across each
9416 * link (e.g. nexthdr/eat parameters from 'tc'). This way we can map
9417 * the u32 graph onto the hardware parse graph denoted in ixgbe_model.h
9418 * To add support for new nodes update ixgbe_model.h parse structures
9419 * this function _should_ be generic try not to hardcode values here.
9421 if (uhtid == 0x800) {
9422 field_ptr = (adapter->jump_tables[0])->mat;
9424 if (uhtid >= IXGBE_MAX_LINK_HANDLE)
9426 if (!adapter->jump_tables[uhtid])
9428 field_ptr = (adapter->jump_tables[uhtid])->mat;
9434 /* At this point we know the field_ptr is valid and need to either
9435 * build cls_u32 link or attach filter. Because adding a link to
9436 * a handle that does not exist is invalid and the same for adding
9437 * rules to handles that don't exist.
9441 struct ixgbe_nexthdr *nexthdr = ixgbe_ipv4_jumps;
9443 if (link_uhtid >= IXGBE_MAX_LINK_HANDLE)
9446 if (!test_bit(link_uhtid - 1, &adapter->tables))
9449 /* Multiple filters as links to the same hash table are not
9450 * supported. To add a new filter with the same next header
9451 * but different match/jump conditions, create a new hash table
9454 if (adapter->jump_tables[link_uhtid] &&
9455 (adapter->jump_tables[link_uhtid])->link_hdl) {
9456 e_err(drv, "Link filter exists for link: %x\n",
9461 for (i = 0; nexthdr[i].jump; i++) {
9462 if (nexthdr[i].o != cls->knode.sel->offoff ||
9463 nexthdr[i].s != cls->knode.sel->offshift ||
9465 (__force u32)cls->knode.sel->offmask)
9468 jump = kzalloc(sizeof(*jump), GFP_KERNEL);
9471 input = kzalloc(sizeof(*input), GFP_KERNEL);
9476 mask = kzalloc(sizeof(*mask), GFP_KERNEL);
9481 jump->input = input;
9483 jump->link_hdl = cls->knode.handle;
9485 err = ixgbe_clsu32_build_input(input, mask, cls,
9486 field_ptr, &nexthdr[i]);
9488 jump->mat = nexthdr[i].jump;
9489 adapter->jump_tables[link_uhtid] = jump;
9496 input = kzalloc(sizeof(*input), GFP_KERNEL);
9499 mask = kzalloc(sizeof(*mask), GFP_KERNEL);
9505 if ((uhtid != 0x800) && (adapter->jump_tables[uhtid])) {
9506 if ((adapter->jump_tables[uhtid])->input)
9507 memcpy(input, (adapter->jump_tables[uhtid])->input,
9509 if ((adapter->jump_tables[uhtid])->mask)
9510 memcpy(mask, (adapter->jump_tables[uhtid])->mask,
9513 /* Lookup in all child hash tables if this location is already
9514 * filled with a filter
9516 for (i = 1; i < IXGBE_MAX_LINK_HANDLE; i++) {
9517 struct ixgbe_jump_table *link = adapter->jump_tables[i];
9519 if (link && (test_bit(loc - 1, link->child_loc_map))) {
9520 e_err(drv, "Filter exists in location: %x\n",
9527 err = ixgbe_clsu32_build_input(input, mask, cls, field_ptr, NULL);
9531 err = parse_tc_actions(adapter, cls->knode.exts, &input->action,
9536 input->sw_idx = loc;
9538 spin_lock(&adapter->fdir_perfect_lock);
9540 if (hlist_empty(&adapter->fdir_filter_list)) {
9541 memcpy(&adapter->fdir_mask, mask, sizeof(*mask));
9542 err = ixgbe_fdir_set_input_mask_82599(hw, mask);
9544 goto err_out_w_lock;
9545 } else if (memcmp(&adapter->fdir_mask, mask, sizeof(*mask))) {
9547 goto err_out_w_lock;
9550 ixgbe_atr_compute_perfect_hash_82599(&input->filter, mask);
9551 err = ixgbe_fdir_write_perfect_filter_82599(hw, &input->filter,
9552 input->sw_idx, queue);
9554 ixgbe_update_ethtool_fdir_entry(adapter, input, input->sw_idx);
9555 spin_unlock(&adapter->fdir_perfect_lock);
9557 if ((uhtid != 0x800) && (adapter->jump_tables[uhtid]))
9558 set_bit(loc - 1, (adapter->jump_tables[uhtid])->child_loc_map);
9563 spin_unlock(&adapter->fdir_perfect_lock);
9573 static int ixgbe_setup_tc_cls_u32(struct ixgbe_adapter *adapter,
9574 struct tc_cls_u32_offload *cls_u32)
9576 switch (cls_u32->command) {
9577 case TC_CLSU32_NEW_KNODE:
9578 case TC_CLSU32_REPLACE_KNODE:
9579 return ixgbe_configure_clsu32(adapter, cls_u32);
9580 case TC_CLSU32_DELETE_KNODE:
9581 return ixgbe_delete_clsu32(adapter, cls_u32);
9582 case TC_CLSU32_NEW_HNODE:
9583 case TC_CLSU32_REPLACE_HNODE:
9584 return ixgbe_configure_clsu32_add_hnode(adapter, cls_u32);
9585 case TC_CLSU32_DELETE_HNODE:
9586 return ixgbe_configure_clsu32_del_hnode(adapter, cls_u32);
9592 static int ixgbe_setup_tc_block_cb(enum tc_setup_type type, void *type_data,
9595 struct ixgbe_adapter *adapter = cb_priv;
9597 if (!tc_cls_can_offload_and_chain0(adapter->netdev, type_data))
9601 case TC_SETUP_CLSU32:
9602 return ixgbe_setup_tc_cls_u32(adapter, type_data);
9608 static int ixgbe_setup_tc_block(struct net_device *dev,
9609 struct tc_block_offload *f)
9611 struct ixgbe_adapter *adapter = netdev_priv(dev);
9613 if (f->binder_type != TCF_BLOCK_BINDER_TYPE_CLSACT_INGRESS)
9616 switch (f->command) {
9618 return tcf_block_cb_register(f->block, ixgbe_setup_tc_block_cb,
9619 adapter, adapter, f->extack);
9620 case TC_BLOCK_UNBIND:
9621 tcf_block_cb_unregister(f->block, ixgbe_setup_tc_block_cb,
9629 static int ixgbe_setup_tc_mqprio(struct net_device *dev,
9630 struct tc_mqprio_qopt *mqprio)
9632 mqprio->hw = TC_MQPRIO_HW_OFFLOAD_TCS;
9633 return ixgbe_setup_tc(dev, mqprio->num_tc);
9636 static int __ixgbe_setup_tc(struct net_device *dev, enum tc_setup_type type,
9640 case TC_SETUP_BLOCK:
9641 return ixgbe_setup_tc_block(dev, type_data);
9642 case TC_SETUP_QDISC_MQPRIO:
9643 return ixgbe_setup_tc_mqprio(dev, type_data);
9649 #ifdef CONFIG_PCI_IOV
9650 void ixgbe_sriov_reinit(struct ixgbe_adapter *adapter)
9652 struct net_device *netdev = adapter->netdev;
9655 ixgbe_setup_tc(netdev, adapter->hw_tcs);
9660 void ixgbe_do_reset(struct net_device *netdev)
9662 struct ixgbe_adapter *adapter = netdev_priv(netdev);
9664 if (netif_running(netdev))
9665 ixgbe_reinit_locked(adapter);
9667 ixgbe_reset(adapter);
9670 static netdev_features_t ixgbe_fix_features(struct net_device *netdev,
9671 netdev_features_t features)
9673 struct ixgbe_adapter *adapter = netdev_priv(netdev);
9675 /* If Rx checksum is disabled, then RSC/LRO should also be disabled */
9676 if (!(features & NETIF_F_RXCSUM))
9677 features &= ~NETIF_F_LRO;
9679 /* Turn off LRO if not RSC capable */
9680 if (!(adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE))
9681 features &= ~NETIF_F_LRO;
9683 if (adapter->xdp_prog && (features & NETIF_F_LRO)) {
9684 e_dev_err("LRO is not supported with XDP\n");
9685 features &= ~NETIF_F_LRO;
9691 static void ixgbe_reset_l2fw_offload(struct ixgbe_adapter *adapter)
9693 int rss = min_t(int, ixgbe_max_rss_indices(adapter),
9696 /* go back to full RSS if we're not running SR-IOV */
9697 if (!adapter->ring_feature[RING_F_VMDQ].offset)
9698 adapter->flags &= ~(IXGBE_FLAG_VMDQ_ENABLED |
9699 IXGBE_FLAG_SRIOV_ENABLED);
9701 adapter->ring_feature[RING_F_RSS].limit = rss;
9702 adapter->ring_feature[RING_F_VMDQ].limit = 1;
9704 ixgbe_setup_tc(adapter->netdev, adapter->hw_tcs);
9707 static int ixgbe_set_features(struct net_device *netdev,
9708 netdev_features_t features)
9710 struct ixgbe_adapter *adapter = netdev_priv(netdev);
9711 netdev_features_t changed = netdev->features ^ features;
9712 bool need_reset = false;
9714 /* Make sure RSC matches LRO, reset if change */
9715 if (!(features & NETIF_F_LRO)) {
9716 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
9718 adapter->flags2 &= ~IXGBE_FLAG2_RSC_ENABLED;
9719 } else if ((adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE) &&
9720 !(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)) {
9721 if (adapter->rx_itr_setting == 1 ||
9722 adapter->rx_itr_setting > IXGBE_MIN_RSC_ITR) {
9723 adapter->flags2 |= IXGBE_FLAG2_RSC_ENABLED;
9725 } else if ((changed ^ features) & NETIF_F_LRO) {
9726 e_info(probe, "rx-usecs set too low, "
9732 * Check if Flow Director n-tuple support or hw_tc support was
9733 * enabled or disabled. If the state changed, we need to reset.
9735 if ((features & NETIF_F_NTUPLE) || (features & NETIF_F_HW_TC)) {
9736 /* turn off ATR, enable perfect filters and reset */
9737 if (!(adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE))
9740 adapter->flags &= ~IXGBE_FLAG_FDIR_HASH_CAPABLE;
9741 adapter->flags |= IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
9743 /* turn off perfect filters, enable ATR and reset */
9744 if (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)
9747 adapter->flags &= ~IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
9749 /* We cannot enable ATR if SR-IOV is enabled */
9750 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED ||
9751 /* We cannot enable ATR if we have 2 or more tcs */
9752 (adapter->hw_tcs > 1) ||
9753 /* We cannot enable ATR if RSS is disabled */
9754 (adapter->ring_feature[RING_F_RSS].limit <= 1) ||
9755 /* A sample rate of 0 indicates ATR disabled */
9756 (!adapter->atr_sample_rate))
9757 ; /* do nothing not supported */
9758 else /* otherwise supported and set the flag */
9759 adapter->flags |= IXGBE_FLAG_FDIR_HASH_CAPABLE;
9762 if (changed & NETIF_F_RXALL)
9765 netdev->features = features;
9767 if ((adapter->flags & IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE)) {
9768 if (features & NETIF_F_RXCSUM) {
9769 adapter->flags2 |= IXGBE_FLAG2_UDP_TUN_REREG_NEEDED;
9771 u32 port_mask = IXGBE_VXLANCTRL_VXLAN_UDPPORT_MASK;
9773 ixgbe_clear_udp_tunnel_port(adapter, port_mask);
9777 if ((adapter->flags & IXGBE_FLAG_GENEVE_OFFLOAD_CAPABLE)) {
9778 if (features & NETIF_F_RXCSUM) {
9779 adapter->flags2 |= IXGBE_FLAG2_UDP_TUN_REREG_NEEDED;
9781 u32 port_mask = IXGBE_VXLANCTRL_GENEVE_UDPPORT_MASK;
9783 ixgbe_clear_udp_tunnel_port(adapter, port_mask);
9787 if ((changed & NETIF_F_HW_L2FW_DOFFLOAD) && adapter->num_rx_pools > 1)
9788 ixgbe_reset_l2fw_offload(adapter);
9789 else if (need_reset)
9790 ixgbe_do_reset(netdev);
9791 else if (changed & (NETIF_F_HW_VLAN_CTAG_RX |
9792 NETIF_F_HW_VLAN_CTAG_FILTER))
9793 ixgbe_set_rx_mode(netdev);
9799 * ixgbe_add_udp_tunnel_port - Get notifications about adding UDP tunnel ports
9800 * @dev: The port's netdev
9801 * @ti: Tunnel endpoint information
9803 static void ixgbe_add_udp_tunnel_port(struct net_device *dev,
9804 struct udp_tunnel_info *ti)
9806 struct ixgbe_adapter *adapter = netdev_priv(dev);
9807 struct ixgbe_hw *hw = &adapter->hw;
9808 __be16 port = ti->port;
9812 if (ti->sa_family != AF_INET)
9816 case UDP_TUNNEL_TYPE_VXLAN:
9817 if (!(adapter->flags & IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE))
9820 if (adapter->vxlan_port == port)
9823 if (adapter->vxlan_port) {
9825 "VXLAN port %d set, not adding port %d\n",
9826 ntohs(adapter->vxlan_port),
9831 adapter->vxlan_port = port;
9833 case UDP_TUNNEL_TYPE_GENEVE:
9834 if (!(adapter->flags & IXGBE_FLAG_GENEVE_OFFLOAD_CAPABLE))
9837 if (adapter->geneve_port == port)
9840 if (adapter->geneve_port) {
9842 "GENEVE port %d set, not adding port %d\n",
9843 ntohs(adapter->geneve_port),
9848 port_shift = IXGBE_VXLANCTRL_GENEVE_UDPPORT_SHIFT;
9849 adapter->geneve_port = port;
9855 reg = IXGBE_READ_REG(hw, IXGBE_VXLANCTRL) | ntohs(port) << port_shift;
9856 IXGBE_WRITE_REG(hw, IXGBE_VXLANCTRL, reg);
9860 * ixgbe_del_udp_tunnel_port - Get notifications about removing UDP tunnel ports
9861 * @dev: The port's netdev
9862 * @ti: Tunnel endpoint information
9864 static void ixgbe_del_udp_tunnel_port(struct net_device *dev,
9865 struct udp_tunnel_info *ti)
9867 struct ixgbe_adapter *adapter = netdev_priv(dev);
9870 if (ti->type != UDP_TUNNEL_TYPE_VXLAN &&
9871 ti->type != UDP_TUNNEL_TYPE_GENEVE)
9874 if (ti->sa_family != AF_INET)
9878 case UDP_TUNNEL_TYPE_VXLAN:
9879 if (!(adapter->flags & IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE))
9882 if (adapter->vxlan_port != ti->port) {
9883 netdev_info(dev, "VXLAN port %d not found\n",
9888 port_mask = IXGBE_VXLANCTRL_VXLAN_UDPPORT_MASK;
9890 case UDP_TUNNEL_TYPE_GENEVE:
9891 if (!(adapter->flags & IXGBE_FLAG_GENEVE_OFFLOAD_CAPABLE))
9894 if (adapter->geneve_port != ti->port) {
9895 netdev_info(dev, "GENEVE port %d not found\n",
9900 port_mask = IXGBE_VXLANCTRL_GENEVE_UDPPORT_MASK;
9906 ixgbe_clear_udp_tunnel_port(adapter, port_mask);
9907 adapter->flags2 |= IXGBE_FLAG2_UDP_TUN_REREG_NEEDED;
9910 static int ixgbe_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
9911 struct net_device *dev,
9912 const unsigned char *addr, u16 vid,
9915 /* guarantee we can provide a unique filter for the unicast address */
9916 if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr)) {
9917 struct ixgbe_adapter *adapter = netdev_priv(dev);
9918 u16 pool = VMDQ_P(0);
9920 if (netdev_uc_count(dev) >= ixgbe_available_rars(adapter, pool))
9924 return ndo_dflt_fdb_add(ndm, tb, dev, addr, vid, flags);
9928 * ixgbe_configure_bridge_mode - set various bridge modes
9929 * @adapter: the private structure
9930 * @mode: requested bridge mode
9932 * Configure some settings require for various bridge modes.
9934 static int ixgbe_configure_bridge_mode(struct ixgbe_adapter *adapter,
9937 struct ixgbe_hw *hw = &adapter->hw;
9938 unsigned int p, num_pools;
9942 case BRIDGE_MODE_VEPA:
9943 /* disable Tx loopback, rely on switch hairpin mode */
9944 IXGBE_WRITE_REG(&adapter->hw, IXGBE_PFDTXGSWC, 0);
9946 /* must enable Rx switching replication to allow multicast
9947 * packet reception on all VFs, and to enable source address
9950 vmdctl = IXGBE_READ_REG(hw, IXGBE_VMD_CTL);
9951 vmdctl |= IXGBE_VT_CTL_REPLEN;
9952 IXGBE_WRITE_REG(hw, IXGBE_VMD_CTL, vmdctl);
9954 /* enable Rx source address pruning. Note, this requires
9955 * replication to be enabled or else it does nothing.
9957 num_pools = adapter->num_vfs + adapter->num_rx_pools;
9958 for (p = 0; p < num_pools; p++) {
9959 if (hw->mac.ops.set_source_address_pruning)
9960 hw->mac.ops.set_source_address_pruning(hw,
9965 case BRIDGE_MODE_VEB:
9966 /* enable Tx loopback for internal VF/PF communication */
9967 IXGBE_WRITE_REG(&adapter->hw, IXGBE_PFDTXGSWC,
9968 IXGBE_PFDTXGSWC_VT_LBEN);
9970 /* disable Rx switching replication unless we have SR-IOV
9973 vmdctl = IXGBE_READ_REG(hw, IXGBE_VMD_CTL);
9974 if (!adapter->num_vfs)
9975 vmdctl &= ~IXGBE_VT_CTL_REPLEN;
9976 IXGBE_WRITE_REG(hw, IXGBE_VMD_CTL, vmdctl);
9978 /* disable Rx source address pruning, since we don't expect to
9979 * be receiving external loopback of our transmitted frames.
9981 num_pools = adapter->num_vfs + adapter->num_rx_pools;
9982 for (p = 0; p < num_pools; p++) {
9983 if (hw->mac.ops.set_source_address_pruning)
9984 hw->mac.ops.set_source_address_pruning(hw,
9993 adapter->bridge_mode = mode;
9995 e_info(drv, "enabling bridge mode: %s\n",
9996 mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB");
10001 static int ixgbe_ndo_bridge_setlink(struct net_device *dev,
10002 struct nlmsghdr *nlh, u16 flags,
10003 struct netlink_ext_ack *extack)
10005 struct ixgbe_adapter *adapter = netdev_priv(dev);
10006 struct nlattr *attr, *br_spec;
10009 if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
10010 return -EOPNOTSUPP;
10012 br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC);
10016 nla_for_each_nested(attr, br_spec, rem) {
10020 if (nla_type(attr) != IFLA_BRIDGE_MODE)
10023 if (nla_len(attr) < sizeof(mode))
10026 mode = nla_get_u16(attr);
10027 status = ixgbe_configure_bridge_mode(adapter, mode);
10037 static int ixgbe_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
10038 struct net_device *dev,
10039 u32 filter_mask, int nlflags)
10041 struct ixgbe_adapter *adapter = netdev_priv(dev);
10043 if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
10046 return ndo_dflt_bridge_getlink(skb, pid, seq, dev,
10047 adapter->bridge_mode, 0, 0, nlflags,
10048 filter_mask, NULL);
10051 static void *ixgbe_fwd_add(struct net_device *pdev, struct net_device *vdev)
10053 struct ixgbe_adapter *adapter = netdev_priv(pdev);
10054 struct ixgbe_fwd_adapter *accel;
10055 int tcs = adapter->hw_tcs ? : 1;
10058 if (adapter->xdp_prog) {
10059 e_warn(probe, "L2FW offload is not supported with XDP\n");
10060 return ERR_PTR(-EINVAL);
10063 /* The hardware supported by ixgbe only filters on the destination MAC
10064 * address. In order to avoid issues we only support offloading modes
10065 * where the hardware can actually provide the functionality.
10067 if (!macvlan_supports_dest_filter(vdev))
10068 return ERR_PTR(-EMEDIUMTYPE);
10070 /* We need to lock down the macvlan to be a single queue device so that
10071 * we can reuse the tc_to_txq field in the macvlan netdev to represent
10072 * the queue mapping to our netdev.
10074 if (netif_is_multiqueue(vdev))
10075 return ERR_PTR(-ERANGE);
10077 pool = find_first_zero_bit(adapter->fwd_bitmask, adapter->num_rx_pools);
10078 if (pool == adapter->num_rx_pools) {
10079 u16 used_pools = adapter->num_vfs + adapter->num_rx_pools;
10080 u16 reserved_pools;
10082 if (((adapter->flags & IXGBE_FLAG_DCB_ENABLED) &&
10083 adapter->num_rx_pools >= (MAX_TX_QUEUES / tcs)) ||
10084 adapter->num_rx_pools > IXGBE_MAX_MACVLANS)
10085 return ERR_PTR(-EBUSY);
10087 /* Hardware has a limited number of available pools. Each VF,
10088 * and the PF require a pool. Check to ensure we don't
10089 * attempt to use more then the available number of pools.
10091 if (used_pools >= IXGBE_MAX_VF_FUNCTIONS)
10092 return ERR_PTR(-EBUSY);
10094 /* Enable VMDq flag so device will be set in VM mode */
10095 adapter->flags |= IXGBE_FLAG_VMDQ_ENABLED |
10096 IXGBE_FLAG_SRIOV_ENABLED;
10098 /* Try to reserve as many queues per pool as possible,
10099 * we start with the configurations that support 4 queues
10100 * per pools, followed by 2, and then by just 1 per pool.
10102 if (used_pools < 32 && adapter->num_rx_pools < 16)
10103 reserved_pools = min_t(u16,
10105 16 - adapter->num_rx_pools);
10106 else if (adapter->num_rx_pools < 32)
10107 reserved_pools = min_t(u16,
10109 32 - adapter->num_rx_pools);
10111 reserved_pools = 64 - used_pools;
10114 if (!reserved_pools)
10115 return ERR_PTR(-EBUSY);
10117 adapter->ring_feature[RING_F_VMDQ].limit += reserved_pools;
10119 /* Force reinit of ring allocation with VMDQ enabled */
10120 err = ixgbe_setup_tc(pdev, adapter->hw_tcs);
10122 return ERR_PTR(err);
10124 if (pool >= adapter->num_rx_pools)
10125 return ERR_PTR(-ENOMEM);
10128 accel = kzalloc(sizeof(*accel), GFP_KERNEL);
10130 return ERR_PTR(-ENOMEM);
10132 set_bit(pool, adapter->fwd_bitmask);
10133 netdev_set_sb_channel(vdev, pool);
10134 accel->pool = pool;
10135 accel->netdev = vdev;
10137 if (!netif_running(pdev))
10140 err = ixgbe_fwd_ring_up(adapter, accel);
10142 return ERR_PTR(err);
10147 static void ixgbe_fwd_del(struct net_device *pdev, void *priv)
10149 struct ixgbe_fwd_adapter *accel = priv;
10150 struct ixgbe_adapter *adapter = netdev_priv(pdev);
10151 unsigned int rxbase = accel->rx_base_queue;
10154 /* delete unicast filter associated with offloaded interface */
10155 ixgbe_del_mac_filter(adapter, accel->netdev->dev_addr,
10156 VMDQ_P(accel->pool));
10158 /* Allow remaining Rx packets to get flushed out of the
10159 * Rx FIFO before we drop the netdev for the ring.
10161 usleep_range(10000, 20000);
10163 for (i = 0; i < adapter->num_rx_queues_per_pool; i++) {
10164 struct ixgbe_ring *ring = adapter->rx_ring[rxbase + i];
10165 struct ixgbe_q_vector *qv = ring->q_vector;
10167 /* Make sure we aren't processing any packets and clear
10168 * netdev to shut down the ring.
10170 if (netif_running(adapter->netdev))
10171 napi_synchronize(&qv->napi);
10172 ring->netdev = NULL;
10175 /* unbind the queues and drop the subordinate channel config */
10176 netdev_unbind_sb_channel(pdev, accel->netdev);
10177 netdev_set_sb_channel(accel->netdev, 0);
10179 clear_bit(accel->pool, adapter->fwd_bitmask);
10183 #define IXGBE_MAX_MAC_HDR_LEN 127
10184 #define IXGBE_MAX_NETWORK_HDR_LEN 511
10186 static netdev_features_t
10187 ixgbe_features_check(struct sk_buff *skb, struct net_device *dev,
10188 netdev_features_t features)
10190 unsigned int network_hdr_len, mac_hdr_len;
10192 /* Make certain the headers can be described by a context descriptor */
10193 mac_hdr_len = skb_network_header(skb) - skb->data;
10194 if (unlikely(mac_hdr_len > IXGBE_MAX_MAC_HDR_LEN))
10195 return features & ~(NETIF_F_HW_CSUM |
10197 NETIF_F_HW_VLAN_CTAG_TX |
10201 network_hdr_len = skb_checksum_start(skb) - skb_network_header(skb);
10202 if (unlikely(network_hdr_len > IXGBE_MAX_NETWORK_HDR_LEN))
10203 return features & ~(NETIF_F_HW_CSUM |
10208 /* We can only support IPV4 TSO in tunnels if we can mangle the
10209 * inner IP ID field, so strip TSO if MANGLEID is not supported.
10210 * IPsec offoad sets skb->encapsulation but still can handle
10211 * the TSO, so it's the exception.
10213 if (skb->encapsulation && !(features & NETIF_F_TSO_MANGLEID)) {
10214 #ifdef CONFIG_IXGBE_IPSEC
10215 if (!secpath_exists(skb))
10217 features &= ~NETIF_F_TSO;
10223 static int ixgbe_xdp_setup(struct net_device *dev, struct bpf_prog *prog)
10225 int i, frame_size = dev->mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
10226 struct ixgbe_adapter *adapter = netdev_priv(dev);
10227 struct bpf_prog *old_prog;
10229 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
10232 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED)
10235 /* verify ixgbe ring attributes are sufficient for XDP */
10236 for (i = 0; i < adapter->num_rx_queues; i++) {
10237 struct ixgbe_ring *ring = adapter->rx_ring[i];
10239 if (ring_is_rsc_enabled(ring))
10242 if (frame_size > ixgbe_rx_bufsz(ring))
10246 if (nr_cpu_ids > MAX_XDP_QUEUES)
10249 old_prog = xchg(&adapter->xdp_prog, prog);
10251 /* If transitioning XDP modes reconfigure rings */
10252 if (!!prog != !!old_prog) {
10253 int err = ixgbe_setup_tc(dev, adapter->hw_tcs);
10256 rcu_assign_pointer(adapter->xdp_prog, old_prog);
10260 for (i = 0; i < adapter->num_rx_queues; i++)
10261 (void)xchg(&adapter->rx_ring[i]->xdp_prog,
10262 adapter->xdp_prog);
10266 bpf_prog_put(old_prog);
10271 static int ixgbe_xdp(struct net_device *dev, struct netdev_bpf *xdp)
10273 struct ixgbe_adapter *adapter = netdev_priv(dev);
10275 switch (xdp->command) {
10276 case XDP_SETUP_PROG:
10277 return ixgbe_xdp_setup(dev, xdp->prog);
10278 case XDP_QUERY_PROG:
10279 xdp->prog_id = adapter->xdp_prog ?
10280 adapter->xdp_prog->aux->id : 0;
10282 case XDP_QUERY_XSK_UMEM:
10283 return ixgbe_xsk_umem_query(adapter, &xdp->xsk.umem,
10284 xdp->xsk.queue_id);
10285 case XDP_SETUP_XSK_UMEM:
10286 return ixgbe_xsk_umem_setup(adapter, xdp->xsk.umem,
10287 xdp->xsk.queue_id);
10294 void ixgbe_xdp_ring_update_tail(struct ixgbe_ring *ring)
10296 /* Force memory writes to complete before letting h/w know there
10297 * are new descriptors to fetch.
10300 writel(ring->next_to_use, ring->tail);
10303 static int ixgbe_xdp_xmit(struct net_device *dev, int n,
10304 struct xdp_frame **frames, u32 flags)
10306 struct ixgbe_adapter *adapter = netdev_priv(dev);
10307 struct ixgbe_ring *ring;
10311 if (unlikely(test_bit(__IXGBE_DOWN, &adapter->state)))
10314 if (unlikely(flags & ~XDP_XMIT_FLAGS_MASK))
10317 /* During program transitions its possible adapter->xdp_prog is assigned
10318 * but ring has not been configured yet. In this case simply abort xmit.
10320 ring = adapter->xdp_prog ? adapter->xdp_ring[smp_processor_id()] : NULL;
10321 if (unlikely(!ring))
10324 if (unlikely(test_bit(__IXGBE_TX_DISABLED, &ring->state)))
10327 for (i = 0; i < n; i++) {
10328 struct xdp_frame *xdpf = frames[i];
10331 err = ixgbe_xmit_xdp_ring(adapter, xdpf);
10332 if (err != IXGBE_XDP_TX) {
10333 xdp_return_frame_rx_napi(xdpf);
10338 if (unlikely(flags & XDP_XMIT_FLUSH))
10339 ixgbe_xdp_ring_update_tail(ring);
10344 static const struct net_device_ops ixgbe_netdev_ops = {
10345 .ndo_open = ixgbe_open,
10346 .ndo_stop = ixgbe_close,
10347 .ndo_start_xmit = ixgbe_xmit_frame,
10348 .ndo_set_rx_mode = ixgbe_set_rx_mode,
10349 .ndo_validate_addr = eth_validate_addr,
10350 .ndo_set_mac_address = ixgbe_set_mac,
10351 .ndo_change_mtu = ixgbe_change_mtu,
10352 .ndo_tx_timeout = ixgbe_tx_timeout,
10353 .ndo_set_tx_maxrate = ixgbe_tx_maxrate,
10354 .ndo_vlan_rx_add_vid = ixgbe_vlan_rx_add_vid,
10355 .ndo_vlan_rx_kill_vid = ixgbe_vlan_rx_kill_vid,
10356 .ndo_do_ioctl = ixgbe_ioctl,
10357 .ndo_set_vf_mac = ixgbe_ndo_set_vf_mac,
10358 .ndo_set_vf_vlan = ixgbe_ndo_set_vf_vlan,
10359 .ndo_set_vf_rate = ixgbe_ndo_set_vf_bw,
10360 .ndo_set_vf_spoofchk = ixgbe_ndo_set_vf_spoofchk,
10361 .ndo_set_vf_rss_query_en = ixgbe_ndo_set_vf_rss_query_en,
10362 .ndo_set_vf_trust = ixgbe_ndo_set_vf_trust,
10363 .ndo_get_vf_config = ixgbe_ndo_get_vf_config,
10364 .ndo_get_stats64 = ixgbe_get_stats64,
10365 .ndo_setup_tc = __ixgbe_setup_tc,
10367 .ndo_select_queue = ixgbe_select_queue,
10368 .ndo_fcoe_ddp_setup = ixgbe_fcoe_ddp_get,
10369 .ndo_fcoe_ddp_target = ixgbe_fcoe_ddp_target,
10370 .ndo_fcoe_ddp_done = ixgbe_fcoe_ddp_put,
10371 .ndo_fcoe_enable = ixgbe_fcoe_enable,
10372 .ndo_fcoe_disable = ixgbe_fcoe_disable,
10373 .ndo_fcoe_get_wwn = ixgbe_fcoe_get_wwn,
10374 .ndo_fcoe_get_hbainfo = ixgbe_fcoe_get_hbainfo,
10375 #endif /* IXGBE_FCOE */
10376 .ndo_set_features = ixgbe_set_features,
10377 .ndo_fix_features = ixgbe_fix_features,
10378 .ndo_fdb_add = ixgbe_ndo_fdb_add,
10379 .ndo_bridge_setlink = ixgbe_ndo_bridge_setlink,
10380 .ndo_bridge_getlink = ixgbe_ndo_bridge_getlink,
10381 .ndo_dfwd_add_station = ixgbe_fwd_add,
10382 .ndo_dfwd_del_station = ixgbe_fwd_del,
10383 .ndo_udp_tunnel_add = ixgbe_add_udp_tunnel_port,
10384 .ndo_udp_tunnel_del = ixgbe_del_udp_tunnel_port,
10385 .ndo_features_check = ixgbe_features_check,
10386 .ndo_bpf = ixgbe_xdp,
10387 .ndo_xdp_xmit = ixgbe_xdp_xmit,
10388 .ndo_xsk_async_xmit = ixgbe_xsk_async_xmit,
10391 static void ixgbe_disable_txr_hw(struct ixgbe_adapter *adapter,
10392 struct ixgbe_ring *tx_ring)
10394 unsigned long wait_delay, delay_interval;
10395 struct ixgbe_hw *hw = &adapter->hw;
10396 u8 reg_idx = tx_ring->reg_idx;
10400 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), IXGBE_TXDCTL_SWFLSH);
10402 /* delay mechanism from ixgbe_disable_tx */
10403 delay_interval = ixgbe_get_completion_timeout(adapter) / 100;
10405 wait_loop = IXGBE_MAX_RX_DESC_POLL;
10406 wait_delay = delay_interval;
10408 while (wait_loop--) {
10409 usleep_range(wait_delay, wait_delay + 10);
10410 wait_delay += delay_interval * 2;
10411 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(reg_idx));
10413 if (!(txdctl & IXGBE_TXDCTL_ENABLE))
10417 e_err(drv, "TXDCTL.ENABLE not cleared within the polling period\n");
10420 static void ixgbe_disable_txr(struct ixgbe_adapter *adapter,
10421 struct ixgbe_ring *tx_ring)
10423 set_bit(__IXGBE_TX_DISABLED, &tx_ring->state);
10424 ixgbe_disable_txr_hw(adapter, tx_ring);
10427 static void ixgbe_disable_rxr_hw(struct ixgbe_adapter *adapter,
10428 struct ixgbe_ring *rx_ring)
10430 unsigned long wait_delay, delay_interval;
10431 struct ixgbe_hw *hw = &adapter->hw;
10432 u8 reg_idx = rx_ring->reg_idx;
10436 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
10437 rxdctl &= ~IXGBE_RXDCTL_ENABLE;
10438 rxdctl |= IXGBE_RXDCTL_SWFLSH;
10440 /* write value back with RXDCTL.ENABLE bit cleared */
10441 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl);
10443 /* RXDCTL.EN may not change on 82598 if link is down, so skip it */
10444 if (hw->mac.type == ixgbe_mac_82598EB &&
10445 !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
10448 /* delay mechanism from ixgbe_disable_rx */
10449 delay_interval = ixgbe_get_completion_timeout(adapter) / 100;
10451 wait_loop = IXGBE_MAX_RX_DESC_POLL;
10452 wait_delay = delay_interval;
10454 while (wait_loop--) {
10455 usleep_range(wait_delay, wait_delay + 10);
10456 wait_delay += delay_interval * 2;
10457 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
10459 if (!(rxdctl & IXGBE_RXDCTL_ENABLE))
10463 e_err(drv, "RXDCTL.ENABLE not cleared within the polling period\n");
10466 static void ixgbe_reset_txr_stats(struct ixgbe_ring *tx_ring)
10468 memset(&tx_ring->stats, 0, sizeof(tx_ring->stats));
10469 memset(&tx_ring->tx_stats, 0, sizeof(tx_ring->tx_stats));
10472 static void ixgbe_reset_rxr_stats(struct ixgbe_ring *rx_ring)
10474 memset(&rx_ring->stats, 0, sizeof(rx_ring->stats));
10475 memset(&rx_ring->rx_stats, 0, sizeof(rx_ring->rx_stats));
10479 * ixgbe_txrx_ring_disable - Disable Rx/Tx/XDP Tx rings
10480 * @adapter: adapter structure
10481 * @ring: ring index
10483 * This function disables a certain Rx/Tx/XDP Tx ring. The function
10484 * assumes that the netdev is running.
10486 void ixgbe_txrx_ring_disable(struct ixgbe_adapter *adapter, int ring)
10488 struct ixgbe_ring *rx_ring, *tx_ring, *xdp_ring;
10490 rx_ring = adapter->rx_ring[ring];
10491 tx_ring = adapter->tx_ring[ring];
10492 xdp_ring = adapter->xdp_ring[ring];
10494 ixgbe_disable_txr(adapter, tx_ring);
10496 ixgbe_disable_txr(adapter, xdp_ring);
10497 ixgbe_disable_rxr_hw(adapter, rx_ring);
10502 /* Rx/Tx/XDP Tx share the same napi context. */
10503 napi_disable(&rx_ring->q_vector->napi);
10505 ixgbe_clean_tx_ring(tx_ring);
10507 ixgbe_clean_tx_ring(xdp_ring);
10508 ixgbe_clean_rx_ring(rx_ring);
10510 ixgbe_reset_txr_stats(tx_ring);
10512 ixgbe_reset_txr_stats(xdp_ring);
10513 ixgbe_reset_rxr_stats(rx_ring);
10517 * ixgbe_txrx_ring_enable - Enable Rx/Tx/XDP Tx rings
10518 * @adapter: adapter structure
10519 * @ring: ring index
10521 * This function enables a certain Rx/Tx/XDP Tx ring. The function
10522 * assumes that the netdev is running.
10524 void ixgbe_txrx_ring_enable(struct ixgbe_adapter *adapter, int ring)
10526 struct ixgbe_ring *rx_ring, *tx_ring, *xdp_ring;
10528 rx_ring = adapter->rx_ring[ring];
10529 tx_ring = adapter->tx_ring[ring];
10530 xdp_ring = adapter->xdp_ring[ring];
10532 /* Rx/Tx/XDP Tx share the same napi context. */
10533 napi_enable(&rx_ring->q_vector->napi);
10535 ixgbe_configure_tx_ring(adapter, tx_ring);
10537 ixgbe_configure_tx_ring(adapter, xdp_ring);
10538 ixgbe_configure_rx_ring(adapter, rx_ring);
10540 clear_bit(__IXGBE_TX_DISABLED, &tx_ring->state);
10542 clear_bit(__IXGBE_TX_DISABLED, &xdp_ring->state);
10546 * ixgbe_enumerate_functions - Get the number of ports this device has
10547 * @adapter: adapter structure
10549 * This function enumerates the phsyical functions co-located on a single slot,
10550 * in order to determine how many ports a device has. This is most useful in
10551 * determining the required GT/s of PCIe bandwidth necessary for optimal
10554 static inline int ixgbe_enumerate_functions(struct ixgbe_adapter *adapter)
10556 struct pci_dev *entry, *pdev = adapter->pdev;
10559 /* Some cards can not use the generic count PCIe functions method,
10560 * because they are behind a parent switch, so we hardcode these with
10561 * the correct number of functions.
10563 if (ixgbe_pcie_from_parent(&adapter->hw))
10566 list_for_each_entry(entry, &adapter->pdev->bus->devices, bus_list) {
10567 /* don't count virtual functions */
10568 if (entry->is_virtfn)
10571 /* When the devices on the bus don't all match our device ID,
10572 * we can't reliably determine the correct number of
10573 * functions. This can occur if a function has been direct
10574 * attached to a virtual machine using VT-d, for example. In
10575 * this case, simply return -1 to indicate this.
10577 if ((entry->vendor != pdev->vendor) ||
10578 (entry->device != pdev->device))
10588 * ixgbe_wol_supported - Check whether device supports WoL
10589 * @adapter: the adapter private structure
10590 * @device_id: the device ID
10591 * @subdevice_id: the subsystem device ID
10593 * This function is used by probe and ethtool to determine
10594 * which devices have WoL support
10597 bool ixgbe_wol_supported(struct ixgbe_adapter *adapter, u16 device_id,
10600 struct ixgbe_hw *hw = &adapter->hw;
10601 u16 wol_cap = adapter->eeprom_cap & IXGBE_DEVICE_CAPS_WOL_MASK;
10603 /* WOL not supported on 82598 */
10604 if (hw->mac.type == ixgbe_mac_82598EB)
10607 /* check eeprom to see if WOL is enabled for X540 and newer */
10608 if (hw->mac.type >= ixgbe_mac_X540) {
10609 if ((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0_1) ||
10610 ((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0) &&
10611 (hw->bus.func == 0)))
10615 /* WOL is determined based on device IDs for 82599 MACs */
10616 switch (device_id) {
10617 case IXGBE_DEV_ID_82599_SFP:
10618 /* Only these subdevices could supports WOL */
10619 switch (subdevice_id) {
10620 case IXGBE_SUBDEV_ID_82599_560FLR:
10621 case IXGBE_SUBDEV_ID_82599_LOM_SNAP6:
10622 case IXGBE_SUBDEV_ID_82599_SFP_WOL0:
10623 case IXGBE_SUBDEV_ID_82599_SFP_2OCP:
10624 /* only support first port */
10625 if (hw->bus.func != 0)
10628 case IXGBE_SUBDEV_ID_82599_SP_560FLR:
10629 case IXGBE_SUBDEV_ID_82599_SFP:
10630 case IXGBE_SUBDEV_ID_82599_RNDC:
10631 case IXGBE_SUBDEV_ID_82599_ECNA_DP:
10632 case IXGBE_SUBDEV_ID_82599_SFP_1OCP:
10633 case IXGBE_SUBDEV_ID_82599_SFP_LOM_OEM1:
10634 case IXGBE_SUBDEV_ID_82599_SFP_LOM_OEM2:
10638 case IXGBE_DEV_ID_82599EN_SFP:
10639 /* Only these subdevices support WOL */
10640 switch (subdevice_id) {
10641 case IXGBE_SUBDEV_ID_82599EN_SFP_OCP1:
10645 case IXGBE_DEV_ID_82599_COMBO_BACKPLANE:
10646 /* All except this subdevice support WOL */
10647 if (subdevice_id != IXGBE_SUBDEV_ID_82599_KX4_KR_MEZZ)
10650 case IXGBE_DEV_ID_82599_KX4:
10660 * ixgbe_set_fw_version - Set FW version
10661 * @adapter: the adapter private structure
10663 * This function is used by probe and ethtool to determine the FW version to
10664 * format to display. The FW version is taken from the EEPROM/NVM.
10666 static void ixgbe_set_fw_version(struct ixgbe_adapter *adapter)
10668 struct ixgbe_hw *hw = &adapter->hw;
10669 struct ixgbe_nvm_version nvm_ver;
10671 ixgbe_get_oem_prod_version(hw, &nvm_ver);
10672 if (nvm_ver.oem_valid) {
10673 snprintf(adapter->eeprom_id, sizeof(adapter->eeprom_id),
10674 "%x.%x.%x", nvm_ver.oem_major, nvm_ver.oem_minor,
10675 nvm_ver.oem_release);
10679 ixgbe_get_etk_id(hw, &nvm_ver);
10680 ixgbe_get_orom_version(hw, &nvm_ver);
10682 if (nvm_ver.or_valid) {
10683 snprintf(adapter->eeprom_id, sizeof(adapter->eeprom_id),
10684 "0x%08x, %d.%d.%d", nvm_ver.etk_id, nvm_ver.or_major,
10685 nvm_ver.or_build, nvm_ver.or_patch);
10689 /* Set ETrack ID format */
10690 snprintf(adapter->eeprom_id, sizeof(adapter->eeprom_id),
10691 "0x%08x", nvm_ver.etk_id);
10695 * ixgbe_probe - Device Initialization Routine
10696 * @pdev: PCI device information struct
10697 * @ent: entry in ixgbe_pci_tbl
10699 * Returns 0 on success, negative on failure
10701 * ixgbe_probe initializes an adapter identified by a pci_dev structure.
10702 * The OS initialization, configuring of the adapter private structure,
10703 * and a hardware reset occur.
10705 static int ixgbe_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
10707 struct net_device *netdev;
10708 struct ixgbe_adapter *adapter = NULL;
10709 struct ixgbe_hw *hw;
10710 const struct ixgbe_info *ii = ixgbe_info_tbl[ent->driver_data];
10711 int i, err, pci_using_dac, expected_gts;
10712 unsigned int indices = MAX_TX_QUEUES;
10713 u8 part_str[IXGBE_PBANUM_LENGTH];
10714 bool disable_dev = false;
10720 /* Catch broken hardware that put the wrong VF device ID in
10721 * the PCIe SR-IOV capability.
10723 if (pdev->is_virtfn) {
10724 WARN(1, KERN_ERR "%s (%hx:%hx) should not be a VF!\n",
10725 pci_name(pdev), pdev->vendor, pdev->device);
10729 err = pci_enable_device_mem(pdev);
10733 if (!dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64))) {
10736 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
10738 dev_err(&pdev->dev,
10739 "No usable DMA configuration, aborting\n");
10745 err = pci_request_mem_regions(pdev, ixgbe_driver_name);
10747 dev_err(&pdev->dev,
10748 "pci_request_selected_regions failed 0x%x\n", err);
10752 pci_enable_pcie_error_reporting(pdev);
10754 pci_set_master(pdev);
10755 pci_save_state(pdev);
10757 if (ii->mac == ixgbe_mac_82598EB) {
10758 #ifdef CONFIG_IXGBE_DCB
10759 /* 8 TC w/ 4 queues per TC */
10760 indices = 4 * MAX_TRAFFIC_CLASS;
10762 indices = IXGBE_MAX_RSS_INDICES;
10766 netdev = alloc_etherdev_mq(sizeof(struct ixgbe_adapter), indices);
10769 goto err_alloc_etherdev;
10772 SET_NETDEV_DEV(netdev, &pdev->dev);
10774 adapter = netdev_priv(netdev);
10776 adapter->netdev = netdev;
10777 adapter->pdev = pdev;
10779 hw->back = adapter;
10780 adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
10782 hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
10783 pci_resource_len(pdev, 0));
10784 adapter->io_addr = hw->hw_addr;
10785 if (!hw->hw_addr) {
10790 netdev->netdev_ops = &ixgbe_netdev_ops;
10791 ixgbe_set_ethtool_ops(netdev);
10792 netdev->watchdog_timeo = 5 * HZ;
10793 strlcpy(netdev->name, pci_name(pdev), sizeof(netdev->name));
10796 hw->mac.ops = *ii->mac_ops;
10797 hw->mac.type = ii->mac;
10798 hw->mvals = ii->mvals;
10800 hw->link.ops = *ii->link_ops;
10803 hw->eeprom.ops = *ii->eeprom_ops;
10804 eec = IXGBE_READ_REG(hw, IXGBE_EEC(hw));
10805 if (ixgbe_removed(hw->hw_addr)) {
10809 /* If EEPROM is valid (bit 8 = 1), use default otherwise use bit bang */
10810 if (!(eec & BIT(8)))
10811 hw->eeprom.ops.read = &ixgbe_read_eeprom_bit_bang_generic;
10814 hw->phy.ops = *ii->phy_ops;
10815 hw->phy.sfp_type = ixgbe_sfp_type_unknown;
10816 /* ixgbe_identify_phy_generic will set prtad and mmds properly */
10817 hw->phy.mdio.prtad = MDIO_PRTAD_NONE;
10818 hw->phy.mdio.mmds = 0;
10819 hw->phy.mdio.mode_support = MDIO_SUPPORTS_C45 | MDIO_EMULATE_C22;
10820 hw->phy.mdio.dev = netdev;
10821 hw->phy.mdio.mdio_read = ixgbe_mdio_read;
10822 hw->phy.mdio.mdio_write = ixgbe_mdio_write;
10824 /* setup the private structure */
10825 err = ixgbe_sw_init(adapter, ii);
10829 /* Make sure the SWFW semaphore is in a valid state */
10830 if (hw->mac.ops.init_swfw_sync)
10831 hw->mac.ops.init_swfw_sync(hw);
10833 /* Make it possible the adapter to be woken up via WOL */
10834 switch (adapter->hw.mac.type) {
10835 case ixgbe_mac_82599EB:
10836 case ixgbe_mac_X540:
10837 case ixgbe_mac_X550:
10838 case ixgbe_mac_X550EM_x:
10839 case ixgbe_mac_x550em_a:
10840 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
10847 * If there is a fan on this device and it has failed log the
10850 if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) {
10851 u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);
10852 if (esdp & IXGBE_ESDP_SDP1)
10853 e_crit(probe, "Fan has stopped, replace the adapter\n");
10856 if (allow_unsupported_sfp)
10857 hw->allow_unsupported_sfp = allow_unsupported_sfp;
10859 /* reset_hw fills in the perm_addr as well */
10860 hw->phy.reset_if_overtemp = true;
10861 err = hw->mac.ops.reset_hw(hw);
10862 hw->phy.reset_if_overtemp = false;
10863 ixgbe_set_eee_capable(adapter);
10864 if (err == IXGBE_ERR_SFP_NOT_PRESENT) {
10866 } else if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) {
10867 e_dev_err("failed to load because an unsupported SFP+ or QSFP module type was detected.\n");
10868 e_dev_err("Reload the driver after installing a supported module.\n");
10871 e_dev_err("HW Init failed: %d\n", err);
10875 #ifdef CONFIG_PCI_IOV
10876 /* SR-IOV not supported on the 82598 */
10877 if (adapter->hw.mac.type == ixgbe_mac_82598EB)
10880 ixgbe_init_mbx_params_pf(hw);
10881 hw->mbx.ops = ii->mbx_ops;
10882 pci_sriov_set_totalvfs(pdev, IXGBE_MAX_VFS_DRV_LIMIT);
10883 ixgbe_enable_sriov(adapter, max_vfs);
10887 netdev->features = NETIF_F_SG |
10894 #define IXGBE_GSO_PARTIAL_FEATURES (NETIF_F_GSO_GRE | \
10895 NETIF_F_GSO_GRE_CSUM | \
10896 NETIF_F_GSO_IPXIP4 | \
10897 NETIF_F_GSO_IPXIP6 | \
10898 NETIF_F_GSO_UDP_TUNNEL | \
10899 NETIF_F_GSO_UDP_TUNNEL_CSUM)
10901 netdev->gso_partial_features = IXGBE_GSO_PARTIAL_FEATURES;
10902 netdev->features |= NETIF_F_GSO_PARTIAL |
10903 IXGBE_GSO_PARTIAL_FEATURES;
10905 if (hw->mac.type >= ixgbe_mac_82599EB)
10906 netdev->features |= NETIF_F_SCTP_CRC;
10908 #ifdef CONFIG_IXGBE_IPSEC
10909 #define IXGBE_ESP_FEATURES (NETIF_F_HW_ESP | \
10910 NETIF_F_HW_ESP_TX_CSUM | \
10913 if (adapter->ipsec)
10914 netdev->features |= IXGBE_ESP_FEATURES;
10916 /* copy netdev features into list of user selectable features */
10917 netdev->hw_features |= netdev->features |
10918 NETIF_F_HW_VLAN_CTAG_FILTER |
10919 NETIF_F_HW_VLAN_CTAG_RX |
10920 NETIF_F_HW_VLAN_CTAG_TX |
10922 NETIF_F_HW_L2FW_DOFFLOAD;
10924 if (hw->mac.type >= ixgbe_mac_82599EB)
10925 netdev->hw_features |= NETIF_F_NTUPLE |
10929 netdev->features |= NETIF_F_HIGHDMA;
10931 netdev->vlan_features |= netdev->features | NETIF_F_TSO_MANGLEID;
10932 netdev->hw_enc_features |= netdev->vlan_features;
10933 netdev->mpls_features |= NETIF_F_SG |
10937 netdev->mpls_features |= IXGBE_GSO_PARTIAL_FEATURES;
10939 /* set this bit last since it cannot be part of vlan_features */
10940 netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER |
10941 NETIF_F_HW_VLAN_CTAG_RX |
10942 NETIF_F_HW_VLAN_CTAG_TX;
10944 netdev->priv_flags |= IFF_UNICAST_FLT;
10945 netdev->priv_flags |= IFF_SUPP_NOFCS;
10947 /* MTU range: 68 - 9710 */
10948 netdev->min_mtu = ETH_MIN_MTU;
10949 netdev->max_mtu = IXGBE_MAX_JUMBO_FRAME_SIZE - (ETH_HLEN + ETH_FCS_LEN);
10951 #ifdef CONFIG_IXGBE_DCB
10952 if (adapter->flags & IXGBE_FLAG_DCB_CAPABLE)
10953 netdev->dcbnl_ops = &ixgbe_dcbnl_ops;
10957 if (adapter->flags & IXGBE_FLAG_FCOE_CAPABLE) {
10958 unsigned int fcoe_l;
10960 if (hw->mac.ops.get_device_caps) {
10961 hw->mac.ops.get_device_caps(hw, &device_caps);
10962 if (device_caps & IXGBE_DEVICE_CAPS_FCOE_OFFLOADS)
10963 adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE;
10967 fcoe_l = min_t(int, IXGBE_FCRETA_SIZE, num_online_cpus());
10968 adapter->ring_feature[RING_F_FCOE].limit = fcoe_l;
10970 netdev->features |= NETIF_F_FSO |
10973 netdev->vlan_features |= NETIF_F_FSO |
10977 #endif /* IXGBE_FCOE */
10978 if (adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE)
10979 netdev->hw_features |= NETIF_F_LRO;
10980 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
10981 netdev->features |= NETIF_F_LRO;
10983 if (ixgbe_check_fw_error(adapter)) {
10988 /* make sure the EEPROM is good */
10989 if (hw->eeprom.ops.validate_checksum(hw, NULL) < 0) {
10990 e_dev_err("The EEPROM Checksum Is Not Valid\n");
10995 eth_platform_get_mac_address(&adapter->pdev->dev,
10996 adapter->hw.mac.perm_addr);
10998 memcpy(netdev->dev_addr, hw->mac.perm_addr, netdev->addr_len);
11000 if (!is_valid_ether_addr(netdev->dev_addr)) {
11001 e_dev_err("invalid MAC address\n");
11006 /* Set hw->mac.addr to permanent MAC address */
11007 ether_addr_copy(hw->mac.addr, hw->mac.perm_addr);
11008 ixgbe_mac_set_default_filter(adapter);
11010 timer_setup(&adapter->service_timer, ixgbe_service_timer, 0);
11012 if (ixgbe_removed(hw->hw_addr)) {
11016 INIT_WORK(&adapter->service_task, ixgbe_service_task);
11017 set_bit(__IXGBE_SERVICE_INITED, &adapter->state);
11018 clear_bit(__IXGBE_SERVICE_SCHED, &adapter->state);
11020 err = ixgbe_init_interrupt_scheme(adapter);
11024 for (i = 0; i < adapter->num_rx_queues; i++)
11025 u64_stats_init(&adapter->rx_ring[i]->syncp);
11026 for (i = 0; i < adapter->num_tx_queues; i++)
11027 u64_stats_init(&adapter->tx_ring[i]->syncp);
11028 for (i = 0; i < adapter->num_xdp_queues; i++)
11029 u64_stats_init(&adapter->xdp_ring[i]->syncp);
11031 /* WOL not supported for all devices */
11033 hw->eeprom.ops.read(hw, 0x2c, &adapter->eeprom_cap);
11034 hw->wol_enabled = ixgbe_wol_supported(adapter, pdev->device,
11035 pdev->subsystem_device);
11036 if (hw->wol_enabled)
11037 adapter->wol = IXGBE_WUFC_MAG;
11039 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
11041 /* save off EEPROM version number */
11042 ixgbe_set_fw_version(adapter);
11044 /* pick up the PCI bus settings for reporting later */
11045 if (ixgbe_pcie_from_parent(hw))
11046 ixgbe_get_parent_bus_info(adapter);
11048 hw->mac.ops.get_bus_info(hw);
11050 /* calculate the expected PCIe bandwidth required for optimal
11051 * performance. Note that some older parts will never have enough
11052 * bandwidth due to being older generation PCIe parts. We clamp these
11053 * parts to ensure no warning is displayed if it can't be fixed.
11055 switch (hw->mac.type) {
11056 case ixgbe_mac_82598EB:
11057 expected_gts = min(ixgbe_enumerate_functions(adapter) * 10, 16);
11060 expected_gts = ixgbe_enumerate_functions(adapter) * 10;
11064 /* don't check link if we failed to enumerate functions */
11065 if (expected_gts > 0)
11066 ixgbe_check_minimum_link(adapter, expected_gts);
11068 err = ixgbe_read_pba_string_generic(hw, part_str, sizeof(part_str));
11070 strlcpy(part_str, "Unknown", sizeof(part_str));
11071 if (ixgbe_is_sfp(hw) && hw->phy.sfp_type != ixgbe_sfp_type_not_present)
11072 e_dev_info("MAC: %d, PHY: %d, SFP+: %d, PBA No: %s\n",
11073 hw->mac.type, hw->phy.type, hw->phy.sfp_type,
11076 e_dev_info("MAC: %d, PHY: %d, PBA No: %s\n",
11077 hw->mac.type, hw->phy.type, part_str);
11079 e_dev_info("%pM\n", netdev->dev_addr);
11081 /* reset the hardware with the new settings */
11082 err = hw->mac.ops.start_hw(hw);
11083 if (err == IXGBE_ERR_EEPROM_VERSION) {
11084 /* We are running on a pre-production device, log a warning */
11085 e_dev_warn("This device is a pre-production adapter/LOM. "
11086 "Please be aware there may be issues associated "
11087 "with your hardware. If you are experiencing "
11088 "problems please contact your Intel or hardware "
11089 "representative who provided you with this "
11092 strcpy(netdev->name, "eth%d");
11093 pci_set_drvdata(pdev, adapter);
11094 err = register_netdev(netdev);
11099 /* power down the optics for 82599 SFP+ fiber */
11100 if (hw->mac.ops.disable_tx_laser)
11101 hw->mac.ops.disable_tx_laser(hw);
11103 /* carrier off reporting is important to ethtool even BEFORE open */
11104 netif_carrier_off(netdev);
11106 #ifdef CONFIG_IXGBE_DCA
11107 if (dca_add_requester(&pdev->dev) == 0) {
11108 adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
11109 ixgbe_setup_dca(adapter);
11112 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
11113 e_info(probe, "IOV is enabled with %d VFs\n", adapter->num_vfs);
11114 for (i = 0; i < adapter->num_vfs; i++)
11115 ixgbe_vf_configuration(pdev, (i | 0x10000000));
11118 /* firmware requires driver version to be 0xFFFFFFFF
11119 * since os does not support feature
11121 if (hw->mac.ops.set_fw_drv_ver)
11122 hw->mac.ops.set_fw_drv_ver(hw, 0xFF, 0xFF, 0xFF, 0xFF,
11123 sizeof(ixgbe_driver_version) - 1,
11124 ixgbe_driver_version);
11126 /* add san mac addr to netdev */
11127 ixgbe_add_sanmac_netdev(netdev);
11129 e_dev_info("%s\n", ixgbe_default_device_descr);
11131 #ifdef CONFIG_IXGBE_HWMON
11132 if (ixgbe_sysfs_init(adapter))
11133 e_err(probe, "failed to allocate sysfs resources\n");
11134 #endif /* CONFIG_IXGBE_HWMON */
11136 ixgbe_dbg_adapter_init(adapter);
11138 /* setup link for SFP devices with MNG FW, else wait for IXGBE_UP */
11139 if (ixgbe_mng_enabled(hw) && ixgbe_is_sfp(hw) && hw->mac.ops.setup_link)
11140 hw->mac.ops.setup_link(hw,
11141 IXGBE_LINK_SPEED_10GB_FULL | IXGBE_LINK_SPEED_1GB_FULL,
11144 ixgbe_mii_bus_init(hw);
11149 ixgbe_release_hw_control(adapter);
11150 ixgbe_clear_interrupt_scheme(adapter);
11152 ixgbe_disable_sriov(adapter);
11153 adapter->flags2 &= ~IXGBE_FLAG2_SEARCH_FOR_SFP;
11154 iounmap(adapter->io_addr);
11155 kfree(adapter->jump_tables[0]);
11156 kfree(adapter->mac_table);
11157 kfree(adapter->rss_key);
11159 disable_dev = !test_and_set_bit(__IXGBE_DISABLED, &adapter->state);
11160 free_netdev(netdev);
11161 err_alloc_etherdev:
11162 pci_release_mem_regions(pdev);
11165 if (!adapter || disable_dev)
11166 pci_disable_device(pdev);
11171 * ixgbe_remove - Device Removal Routine
11172 * @pdev: PCI device information struct
11174 * ixgbe_remove is called by the PCI subsystem to alert the driver
11175 * that it should release a PCI device. The could be caused by a
11176 * Hot-Plug event, or because the driver is going to be removed from
11179 static void ixgbe_remove(struct pci_dev *pdev)
11181 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
11182 struct net_device *netdev;
11186 /* if !adapter then we already cleaned up in probe */
11190 netdev = adapter->netdev;
11191 ixgbe_dbg_adapter_exit(adapter);
11193 set_bit(__IXGBE_REMOVING, &adapter->state);
11194 cancel_work_sync(&adapter->service_task);
11196 if (adapter->mii_bus)
11197 mdiobus_unregister(adapter->mii_bus);
11199 #ifdef CONFIG_IXGBE_DCA
11200 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
11201 adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
11202 dca_remove_requester(&pdev->dev);
11203 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL,
11204 IXGBE_DCA_CTRL_DCA_DISABLE);
11208 #ifdef CONFIG_IXGBE_HWMON
11209 ixgbe_sysfs_exit(adapter);
11210 #endif /* CONFIG_IXGBE_HWMON */
11212 /* remove the added san mac */
11213 ixgbe_del_sanmac_netdev(netdev);
11215 #ifdef CONFIG_PCI_IOV
11216 ixgbe_disable_sriov(adapter);
11218 if (netdev->reg_state == NETREG_REGISTERED)
11219 unregister_netdev(netdev);
11221 ixgbe_stop_ipsec_offload(adapter);
11222 ixgbe_clear_interrupt_scheme(adapter);
11224 ixgbe_release_hw_control(adapter);
11227 kfree(adapter->ixgbe_ieee_pfc);
11228 kfree(adapter->ixgbe_ieee_ets);
11231 iounmap(adapter->io_addr);
11232 pci_release_mem_regions(pdev);
11234 e_dev_info("complete\n");
11236 for (i = 0; i < IXGBE_MAX_LINK_HANDLE; i++) {
11237 if (adapter->jump_tables[i]) {
11238 kfree(adapter->jump_tables[i]->input);
11239 kfree(adapter->jump_tables[i]->mask);
11241 kfree(adapter->jump_tables[i]);
11244 kfree(adapter->mac_table);
11245 kfree(adapter->rss_key);
11246 disable_dev = !test_and_set_bit(__IXGBE_DISABLED, &adapter->state);
11247 free_netdev(netdev);
11249 pci_disable_pcie_error_reporting(pdev);
11252 pci_disable_device(pdev);
11256 * ixgbe_io_error_detected - called when PCI error is detected
11257 * @pdev: Pointer to PCI device
11258 * @state: The current pci connection state
11260 * This function is called after a PCI bus error affecting
11261 * this device has been detected.
11263 static pci_ers_result_t ixgbe_io_error_detected(struct pci_dev *pdev,
11264 pci_channel_state_t state)
11266 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
11267 struct net_device *netdev = adapter->netdev;
11269 #ifdef CONFIG_PCI_IOV
11270 struct ixgbe_hw *hw = &adapter->hw;
11271 struct pci_dev *bdev, *vfdev;
11272 u32 dw0, dw1, dw2, dw3;
11274 u16 req_id, pf_func;
11276 if (adapter->hw.mac.type == ixgbe_mac_82598EB ||
11277 adapter->num_vfs == 0)
11278 goto skip_bad_vf_detection;
11280 bdev = pdev->bus->self;
11281 while (bdev && (pci_pcie_type(bdev) != PCI_EXP_TYPE_ROOT_PORT))
11282 bdev = bdev->bus->self;
11285 goto skip_bad_vf_detection;
11287 pos = pci_find_ext_capability(bdev, PCI_EXT_CAP_ID_ERR);
11289 goto skip_bad_vf_detection;
11291 dw0 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG);
11292 dw1 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 4);
11293 dw2 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 8);
11294 dw3 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 12);
11295 if (ixgbe_removed(hw->hw_addr))
11296 goto skip_bad_vf_detection;
11298 req_id = dw1 >> 16;
11299 /* On the 82599 if bit 7 of the requestor ID is set then it's a VF */
11300 if (!(req_id & 0x0080))
11301 goto skip_bad_vf_detection;
11303 pf_func = req_id & 0x01;
11304 if ((pf_func & 1) == (pdev->devfn & 1)) {
11305 unsigned int device_id;
11307 vf = (req_id & 0x7F) >> 1;
11308 e_dev_err("VF %d has caused a PCIe error\n", vf);
11309 e_dev_err("TLP: dw0: %8.8x\tdw1: %8.8x\tdw2: "
11310 "%8.8x\tdw3: %8.8x\n",
11311 dw0, dw1, dw2, dw3);
11312 switch (adapter->hw.mac.type) {
11313 case ixgbe_mac_82599EB:
11314 device_id = IXGBE_82599_VF_DEVICE_ID;
11316 case ixgbe_mac_X540:
11317 device_id = IXGBE_X540_VF_DEVICE_ID;
11319 case ixgbe_mac_X550:
11320 device_id = IXGBE_DEV_ID_X550_VF;
11322 case ixgbe_mac_X550EM_x:
11323 device_id = IXGBE_DEV_ID_X550EM_X_VF;
11325 case ixgbe_mac_x550em_a:
11326 device_id = IXGBE_DEV_ID_X550EM_A_VF;
11333 /* Find the pci device of the offending VF */
11334 vfdev = pci_get_device(PCI_VENDOR_ID_INTEL, device_id, NULL);
11336 if (vfdev->devfn == (req_id & 0xFF))
11338 vfdev = pci_get_device(PCI_VENDOR_ID_INTEL,
11342 * There's a slim chance the VF could have been hot plugged,
11343 * so if it is no longer present we don't need to issue the
11344 * VFLR. Just clean up the AER in that case.
11348 /* Free device reference count */
11349 pci_dev_put(vfdev);
11354 * Even though the error may have occurred on the other port
11355 * we still need to increment the vf error reference count for
11356 * both ports because the I/O resume function will be called
11357 * for both of them.
11359 adapter->vferr_refcount++;
11361 return PCI_ERS_RESULT_RECOVERED;
11363 skip_bad_vf_detection:
11364 #endif /* CONFIG_PCI_IOV */
11365 if (!test_bit(__IXGBE_SERVICE_INITED, &adapter->state))
11366 return PCI_ERS_RESULT_DISCONNECT;
11368 if (!netif_device_present(netdev))
11369 return PCI_ERS_RESULT_DISCONNECT;
11372 netif_device_detach(netdev);
11374 if (netif_running(netdev))
11375 ixgbe_close_suspend(adapter);
11377 if (state == pci_channel_io_perm_failure) {
11379 return PCI_ERS_RESULT_DISCONNECT;
11382 if (!test_and_set_bit(__IXGBE_DISABLED, &adapter->state))
11383 pci_disable_device(pdev);
11386 /* Request a slot reset. */
11387 return PCI_ERS_RESULT_NEED_RESET;
11391 * ixgbe_io_slot_reset - called after the pci bus has been reset.
11392 * @pdev: Pointer to PCI device
11394 * Restart the card from scratch, as if from a cold-boot.
11396 static pci_ers_result_t ixgbe_io_slot_reset(struct pci_dev *pdev)
11398 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
11399 pci_ers_result_t result;
11401 if (pci_enable_device_mem(pdev)) {
11402 e_err(probe, "Cannot re-enable PCI device after reset.\n");
11403 result = PCI_ERS_RESULT_DISCONNECT;
11405 smp_mb__before_atomic();
11406 clear_bit(__IXGBE_DISABLED, &adapter->state);
11407 adapter->hw.hw_addr = adapter->io_addr;
11408 pci_set_master(pdev);
11409 pci_restore_state(pdev);
11410 pci_save_state(pdev);
11412 pci_wake_from_d3(pdev, false);
11414 ixgbe_reset(adapter);
11415 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
11416 result = PCI_ERS_RESULT_RECOVERED;
11423 * ixgbe_io_resume - called when traffic can start flowing again.
11424 * @pdev: Pointer to PCI device
11426 * This callback is called when the error recovery driver tells us that
11427 * its OK to resume normal operation.
11429 static void ixgbe_io_resume(struct pci_dev *pdev)
11431 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
11432 struct net_device *netdev = adapter->netdev;
11434 #ifdef CONFIG_PCI_IOV
11435 if (adapter->vferr_refcount) {
11436 e_info(drv, "Resuming after VF err\n");
11437 adapter->vferr_refcount--;
11443 if (netif_running(netdev))
11444 ixgbe_open(netdev);
11446 netif_device_attach(netdev);
11450 static const struct pci_error_handlers ixgbe_err_handler = {
11451 .error_detected = ixgbe_io_error_detected,
11452 .slot_reset = ixgbe_io_slot_reset,
11453 .resume = ixgbe_io_resume,
11456 static struct pci_driver ixgbe_driver = {
11457 .name = ixgbe_driver_name,
11458 .id_table = ixgbe_pci_tbl,
11459 .probe = ixgbe_probe,
11460 .remove = ixgbe_remove,
11462 .suspend = ixgbe_suspend,
11463 .resume = ixgbe_resume,
11465 .shutdown = ixgbe_shutdown,
11466 .sriov_configure = ixgbe_pci_sriov_configure,
11467 .err_handler = &ixgbe_err_handler
11471 * ixgbe_init_module - Driver Registration Routine
11473 * ixgbe_init_module is the first routine called when the driver is
11474 * loaded. All it does is register with the PCI subsystem.
11476 static int __init ixgbe_init_module(void)
11479 pr_info("%s - version %s\n", ixgbe_driver_string, ixgbe_driver_version);
11480 pr_info("%s\n", ixgbe_copyright);
11482 ixgbe_wq = create_singlethread_workqueue(ixgbe_driver_name);
11484 pr_err("%s: Failed to create workqueue\n", ixgbe_driver_name);
11490 ret = pci_register_driver(&ixgbe_driver);
11492 destroy_workqueue(ixgbe_wq);
11497 #ifdef CONFIG_IXGBE_DCA
11498 dca_register_notify(&dca_notifier);
11504 module_init(ixgbe_init_module);
11507 * ixgbe_exit_module - Driver Exit Cleanup Routine
11509 * ixgbe_exit_module is called just before the driver is removed
11512 static void __exit ixgbe_exit_module(void)
11514 #ifdef CONFIG_IXGBE_DCA
11515 dca_unregister_notify(&dca_notifier);
11517 pci_unregister_driver(&ixgbe_driver);
11521 destroy_workqueue(ixgbe_wq);
11526 #ifdef CONFIG_IXGBE_DCA
11527 static int ixgbe_notify_dca(struct notifier_block *nb, unsigned long event,
11532 ret_val = driver_for_each_device(&ixgbe_driver.driver, NULL, &event,
11533 __ixgbe_notify_dca);
11535 return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
11538 #endif /* CONFIG_IXGBE_DCA */
11540 module_exit(ixgbe_exit_module);