2 * drivers/net/phy/marvell.c
4 * Driver for Marvell PHYs
8 * Copyright (c) 2004 Freescale Semiconductor, Inc.
10 * Copyright (c) 2013 Michael Stapelberg <michael@stapelberg.de>
12 * This program is free software; you can redistribute it and/or modify it
13 * under the terms of the GNU General Public License as published by the
14 * Free Software Foundation; either version 2 of the License, or (at your
15 * option) any later version.
18 #include <linux/kernel.h>
19 #include <linux/string.h>
20 #include <linux/ctype.h>
21 #include <linux/errno.h>
22 #include <linux/unistd.h>
23 #include <linux/hwmon.h>
24 #include <linux/interrupt.h>
25 #include <linux/init.h>
26 #include <linux/delay.h>
27 #include <linux/netdevice.h>
28 #include <linux/etherdevice.h>
29 #include <linux/skbuff.h>
30 #include <linux/spinlock.h>
32 #include <linux/module.h>
33 #include <linux/mii.h>
34 #include <linux/ethtool.h>
35 #include <linux/phy.h>
36 #include <linux/marvell_phy.h>
41 #include <linux/uaccess.h>
43 #define MII_MARVELL_PHY_PAGE 22
44 #define MII_MARVELL_COPPER_PAGE 0x00
45 #define MII_MARVELL_FIBER_PAGE 0x01
46 #define MII_MARVELL_MSCR_PAGE 0x02
47 #define MII_MARVELL_LED_PAGE 0x03
48 #define MII_MARVELL_MISC_TEST_PAGE 0x06
49 #define MII_MARVELL_WOL_PAGE 0x11
51 #define MII_M1011_IEVENT 0x13
52 #define MII_M1011_IEVENT_CLEAR 0x0000
54 #define MII_M1011_IMASK 0x12
55 #define MII_M1011_IMASK_INIT 0x6400
56 #define MII_M1011_IMASK_CLEAR 0x0000
58 #define MII_M1011_PHY_SCR 0x10
59 #define MII_M1011_PHY_SCR_DOWNSHIFT_EN BIT(11)
60 #define MII_M1011_PHY_SCR_DOWNSHIFT_SHIFT 12
61 #define MII_M1011_PHY_SRC_DOWNSHIFT_MASK 0x7800
62 #define MII_M1011_PHY_SCR_MDI (0x0 << 5)
63 #define MII_M1011_PHY_SCR_MDI_X (0x1 << 5)
64 #define MII_M1011_PHY_SCR_AUTO_CROSS (0x3 << 5)
66 #define MII_M1111_PHY_LED_CONTROL 0x18
67 #define MII_M1111_PHY_LED_DIRECT 0x4100
68 #define MII_M1111_PHY_LED_COMBINE 0x411c
69 #define MII_M1111_PHY_EXT_CR 0x14
70 #define MII_M1111_RGMII_RX_DELAY BIT(7)
71 #define MII_M1111_RGMII_TX_DELAY BIT(1)
72 #define MII_M1111_PHY_EXT_SR 0x1b
74 #define MII_M1111_HWCFG_MODE_MASK 0xf
75 #define MII_M1111_HWCFG_MODE_FIBER_RGMII 0x3
76 #define MII_M1111_HWCFG_MODE_SGMII_NO_CLK 0x4
77 #define MII_M1111_HWCFG_MODE_RTBI 0x7
78 #define MII_M1111_HWCFG_MODE_COPPER_RTBI 0x9
79 #define MII_M1111_HWCFG_MODE_COPPER_RGMII 0xb
80 #define MII_M1111_HWCFG_FIBER_COPPER_RES BIT(13)
81 #define MII_M1111_HWCFG_FIBER_COPPER_AUTO BIT(15)
83 #define MII_88E1121_PHY_MSCR_REG 21
84 #define MII_88E1121_PHY_MSCR_RX_DELAY BIT(5)
85 #define MII_88E1121_PHY_MSCR_TX_DELAY BIT(4)
86 #define MII_88E1121_PHY_MSCR_DELAY_MASK (BIT(5) | BIT(4))
88 #define MII_88E1121_MISC_TEST 0x1a
89 #define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK 0x1f00
90 #define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT 8
91 #define MII_88E1510_MISC_TEST_TEMP_IRQ_EN BIT(7)
92 #define MII_88E1510_MISC_TEST_TEMP_IRQ BIT(6)
93 #define MII_88E1121_MISC_TEST_TEMP_SENSOR_EN BIT(5)
94 #define MII_88E1121_MISC_TEST_TEMP_MASK 0x1f
96 #define MII_88E1510_TEMP_SENSOR 0x1b
97 #define MII_88E1510_TEMP_SENSOR_MASK 0xff
99 #define MII_88E6390_MISC_TEST 0x1b
100 #define MII_88E6390_MISC_TEST_SAMPLE_1S 0
101 #define MII_88E6390_MISC_TEST_SAMPLE_10MS BIT(14)
102 #define MII_88E6390_MISC_TEST_SAMPLE_DISABLE BIT(15)
103 #define MII_88E6390_MISC_TEST_SAMPLE_ENABLE 0
104 #define MII_88E6390_MISC_TEST_SAMPLE_MASK (0x3 << 14)
106 #define MII_88E6390_TEMP_SENSOR 0x1c
107 #define MII_88E6390_TEMP_SENSOR_MASK 0xff
108 #define MII_88E6390_TEMP_SENSOR_SAMPLES 10
110 #define MII_88E1318S_PHY_MSCR1_REG 16
111 #define MII_88E1318S_PHY_MSCR1_PAD_ODD BIT(6)
113 /* Copper Specific Interrupt Enable Register */
114 #define MII_88E1318S_PHY_CSIER 0x12
115 /* WOL Event Interrupt Enable */
116 #define MII_88E1318S_PHY_CSIER_WOL_EIE BIT(7)
118 /* LED Timer Control Register */
119 #define MII_88E1318S_PHY_LED_TCR 0x12
120 #define MII_88E1318S_PHY_LED_TCR_FORCE_INT BIT(15)
121 #define MII_88E1318S_PHY_LED_TCR_INTn_ENABLE BIT(7)
122 #define MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW BIT(11)
124 /* Magic Packet MAC address registers */
125 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD2 0x17
126 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD1 0x18
127 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD0 0x19
129 #define MII_88E1318S_PHY_WOL_CTRL 0x10
130 #define MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS BIT(12)
131 #define MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE BIT(14)
133 #define MII_PHY_LED_CTRL 16
134 #define MII_88E1121_PHY_LED_DEF 0x0030
135 #define MII_88E1510_PHY_LED_DEF 0x1177
137 #define MII_M1011_PHY_STATUS 0x11
138 #define MII_M1011_PHY_STATUS_1000 0x8000
139 #define MII_M1011_PHY_STATUS_100 0x4000
140 #define MII_M1011_PHY_STATUS_SPD_MASK 0xc000
141 #define MII_M1011_PHY_STATUS_FULLDUPLEX 0x2000
142 #define MII_M1011_PHY_STATUS_RESOLVED 0x0800
143 #define MII_M1011_PHY_STATUS_LINK 0x0400
145 #define MII_88E3016_PHY_SPEC_CTRL 0x10
146 #define MII_88E3016_DISABLE_SCRAMBLER 0x0200
147 #define MII_88E3016_AUTO_MDIX_CROSSOVER 0x0030
149 #define MII_88E1510_GEN_CTRL_REG_1 0x14
150 #define MII_88E1510_GEN_CTRL_REG_1_MODE_MASK 0x7
151 #define MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII 0x1 /* SGMII to copper */
152 #define MII_88E1510_GEN_CTRL_REG_1_RESET 0x8000 /* Soft reset */
154 #define LPA_FIBER_1000HALF 0x40
155 #define LPA_FIBER_1000FULL 0x20
157 #define LPA_PAUSE_FIBER 0x180
158 #define LPA_PAUSE_ASYM_FIBER 0x100
160 #define ADVERTISE_FIBER_1000HALF 0x40
161 #define ADVERTISE_FIBER_1000FULL 0x20
163 #define ADVERTISE_PAUSE_FIBER 0x180
164 #define ADVERTISE_PAUSE_ASYM_FIBER 0x100
166 #define REGISTER_LINK_STATUS 0x400
167 #define NB_FIBER_STATS 1
169 MODULE_DESCRIPTION("Marvell PHY driver");
170 MODULE_AUTHOR("Andy Fleming");
171 MODULE_LICENSE("GPL");
173 struct marvell_hw_stat {
180 static struct marvell_hw_stat marvell_hw_stats[] = {
181 { "phy_receive_errors_copper", 0, 21, 16},
182 { "phy_idle_errors", 0, 10, 8 },
183 { "phy_receive_errors_fiber", 1, 21, 16},
186 struct marvell_priv {
187 u64 stats[ARRAY_SIZE(marvell_hw_stats)];
189 struct device *hwmon_dev;
192 static int marvell_read_page(struct phy_device *phydev)
194 return __phy_read(phydev, MII_MARVELL_PHY_PAGE);
197 static int marvell_write_page(struct phy_device *phydev, int page)
199 return __phy_write(phydev, MII_MARVELL_PHY_PAGE, page);
202 static int marvell_set_page(struct phy_device *phydev, int page)
204 return phy_write(phydev, MII_MARVELL_PHY_PAGE, page);
207 static int marvell_ack_interrupt(struct phy_device *phydev)
211 /* Clear the interrupts by reading the reg */
212 err = phy_read(phydev, MII_M1011_IEVENT);
220 static int marvell_config_intr(struct phy_device *phydev)
224 if (phydev->interrupts == PHY_INTERRUPT_ENABLED)
225 err = phy_write(phydev, MII_M1011_IMASK,
226 MII_M1011_IMASK_INIT);
228 err = phy_write(phydev, MII_M1011_IMASK,
229 MII_M1011_IMASK_CLEAR);
234 static int marvell_set_polarity(struct phy_device *phydev, int polarity)
240 /* get the current settings */
241 reg = phy_read(phydev, MII_M1011_PHY_SCR);
246 val &= ~MII_M1011_PHY_SCR_AUTO_CROSS;
249 val |= MII_M1011_PHY_SCR_MDI;
252 val |= MII_M1011_PHY_SCR_MDI_X;
254 case ETH_TP_MDI_AUTO:
255 case ETH_TP_MDI_INVALID:
257 val |= MII_M1011_PHY_SCR_AUTO_CROSS;
262 /* Set the new polarity value in the register */
263 err = phy_write(phydev, MII_M1011_PHY_SCR, val);
271 static int marvell_set_downshift(struct phy_device *phydev, bool enable,
276 reg = phy_read(phydev, MII_M1011_PHY_SCR);
280 reg &= MII_M1011_PHY_SRC_DOWNSHIFT_MASK;
281 reg |= ((retries - 1) << MII_M1011_PHY_SCR_DOWNSHIFT_SHIFT);
283 reg |= MII_M1011_PHY_SCR_DOWNSHIFT_EN;
285 return phy_write(phydev, MII_M1011_PHY_SCR, reg);
288 static int marvell_config_aneg(struct phy_device *phydev)
293 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
299 err = phy_write(phydev, MII_M1111_PHY_LED_CONTROL,
300 MII_M1111_PHY_LED_DIRECT);
304 err = genphy_config_aneg(phydev);
308 if (phydev->autoneg != AUTONEG_ENABLE || changed) {
309 /* A write to speed/duplex bits (that is performed by
310 * genphy_config_aneg() call above) must be followed by
311 * a software reset. Otherwise, the write has no effect.
313 err = genphy_soft_reset(phydev);
321 static int m88e1101_config_aneg(struct phy_device *phydev)
325 /* This Marvell PHY has an errata which requires
326 * that certain registers get written in order
327 * to restart autonegotiation
329 err = genphy_soft_reset(phydev);
333 err = phy_write(phydev, 0x1d, 0x1f);
337 err = phy_write(phydev, 0x1e, 0x200c);
341 err = phy_write(phydev, 0x1d, 0x5);
345 err = phy_write(phydev, 0x1e, 0);
349 err = phy_write(phydev, 0x1e, 0x100);
353 return marvell_config_aneg(phydev);
356 #ifdef CONFIG_OF_MDIO
357 /* Set and/or override some configuration registers based on the
358 * marvell,reg-init property stored in the of_node for the phydev.
360 * marvell,reg-init = <reg-page reg mask value>,...;
362 * There may be one or more sets of <reg-page reg mask value>:
364 * reg-page: which register bank to use.
366 * mask: if non-zero, ANDed with existing register value.
367 * value: ORed with the masked value and written to the regiser.
370 static int marvell_of_reg_init(struct phy_device *phydev)
373 int len, i, saved_page, current_page, ret = 0;
375 if (!phydev->mdio.dev.of_node)
378 paddr = of_get_property(phydev->mdio.dev.of_node,
379 "marvell,reg-init", &len);
380 if (!paddr || len < (4 * sizeof(*paddr)))
383 saved_page = phy_save_page(phydev);
386 current_page = saved_page;
388 len /= sizeof(*paddr);
389 for (i = 0; i < len - 3; i += 4) {
390 u16 page = be32_to_cpup(paddr + i);
391 u16 reg = be32_to_cpup(paddr + i + 1);
392 u16 mask = be32_to_cpup(paddr + i + 2);
393 u16 val_bits = be32_to_cpup(paddr + i + 3);
396 if (page != current_page) {
398 ret = marvell_write_page(phydev, page);
405 val = __phy_read(phydev, reg);
414 ret = __phy_write(phydev, reg, val);
419 return phy_restore_page(phydev, saved_page, ret);
422 static int marvell_of_reg_init(struct phy_device *phydev)
426 #endif /* CONFIG_OF_MDIO */
428 static int m88e1121_config_aneg_rgmii_delays(struct phy_device *phydev)
432 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID)
433 mscr = MII_88E1121_PHY_MSCR_RX_DELAY |
434 MII_88E1121_PHY_MSCR_TX_DELAY;
435 else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID)
436 mscr = MII_88E1121_PHY_MSCR_RX_DELAY;
437 else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID)
438 mscr = MII_88E1121_PHY_MSCR_TX_DELAY;
442 return phy_modify_paged(phydev, MII_MARVELL_MSCR_PAGE,
443 MII_88E1121_PHY_MSCR_REG,
444 MII_88E1121_PHY_MSCR_DELAY_MASK, mscr);
447 static int m88e1121_config_aneg(struct phy_device *phydev)
452 if (phy_interface_is_rgmii(phydev)) {
453 err = m88e1121_config_aneg_rgmii_delays(phydev);
458 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
464 err = genphy_config_aneg(phydev);
468 if (phydev->autoneg != AUTONEG_ENABLE || changed) {
469 /* A software reset is used to ensure a "commit" of the
472 err = genphy_soft_reset(phydev);
480 static int m88e1318_config_aneg(struct phy_device *phydev)
484 err = phy_modify_paged(phydev, MII_MARVELL_MSCR_PAGE,
485 MII_88E1318S_PHY_MSCR1_REG,
486 0, MII_88E1318S_PHY_MSCR1_PAD_ODD);
490 return m88e1121_config_aneg(phydev);
494 * linkmode_adv_to_fiber_adv_t
495 * @advertise: the linkmode advertisement settings
497 * A small helper function that translates linkmode advertisement
498 * settings to phy autonegotiation advertisements for the MII_ADV
499 * register for fiber link.
501 static inline u32 linkmode_adv_to_fiber_adv_t(unsigned long *advertise)
505 if (linkmode_test_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, advertise))
506 result |= ADVERTISE_FIBER_1000HALF;
507 if (linkmode_test_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, advertise))
508 result |= ADVERTISE_FIBER_1000FULL;
510 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, advertise) &&
511 linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, advertise))
512 result |= LPA_PAUSE_ASYM_FIBER;
513 else if (linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, advertise))
514 result |= (ADVERTISE_PAUSE_FIBER
515 & (~ADVERTISE_PAUSE_ASYM_FIBER));
521 * marvell_config_aneg_fiber - restart auto-negotiation or write BMCR
522 * @phydev: target phy_device struct
524 * Description: If auto-negotiation is enabled, we configure the
525 * advertising, and then restart auto-negotiation. If it is not
526 * enabled, then we write the BMCR. Adapted for fiber link in
527 * some Marvell's devices.
529 static int marvell_config_aneg_fiber(struct phy_device *phydev)
535 if (phydev->autoneg != AUTONEG_ENABLE)
536 return genphy_setup_forced(phydev);
538 /* Only allow advertising what this PHY supports */
539 linkmode_and(phydev->advertising, phydev->advertising,
542 /* Setup fiber advertisement */
543 adv = phy_read(phydev, MII_ADVERTISE);
548 adv &= ~(ADVERTISE_FIBER_1000HALF | ADVERTISE_FIBER_1000FULL
550 adv |= linkmode_adv_to_fiber_adv_t(phydev->advertising);
553 err = phy_write(phydev, MII_ADVERTISE, adv);
561 /* Advertisement hasn't changed, but maybe aneg was never on to
562 * begin with? Or maybe phy was isolated?
564 int ctl = phy_read(phydev, MII_BMCR);
569 if (!(ctl & BMCR_ANENABLE) || (ctl & BMCR_ISOLATE))
570 changed = 1; /* do restart aneg */
573 /* Only restart aneg if we are advertising something different
574 * than we were before.
577 changed = genphy_restart_aneg(phydev);
582 static int m88e1510_config_aneg(struct phy_device *phydev)
586 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
590 /* Configure the copper link first */
591 err = m88e1318_config_aneg(phydev);
595 /* Do not touch the fiber page if we're in copper->sgmii mode */
596 if (phydev->interface == PHY_INTERFACE_MODE_SGMII)
599 /* Then the fiber link */
600 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
604 err = marvell_config_aneg_fiber(phydev);
608 return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
611 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
615 static void marvell_config_led(struct phy_device *phydev)
620 switch (MARVELL_PHY_FAMILY_ID(phydev->phy_id)) {
621 /* Default PHY LED config: LED[0] .. Link, LED[1] .. Activity */
622 case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1121R):
623 case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1318S):
624 def_config = MII_88E1121_PHY_LED_DEF;
626 /* Default PHY LED config:
627 * LED[0] .. 1000Mbps Link
628 * LED[1] .. 100Mbps Link
629 * LED[2] .. Blink, Activity
631 case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1510):
632 def_config = MII_88E1510_PHY_LED_DEF;
638 err = phy_write_paged(phydev, MII_MARVELL_LED_PAGE, MII_PHY_LED_CTRL,
641 phydev_warn(phydev, "Fail to config marvell phy LED.\n");
644 static int marvell_config_init(struct phy_device *phydev)
646 /* Set defalut LED */
647 marvell_config_led(phydev);
649 /* Set registers from marvell,reg-init DT property */
650 return marvell_of_reg_init(phydev);
653 static int m88e1116r_config_init(struct phy_device *phydev)
657 err = genphy_soft_reset(phydev);
663 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
667 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
671 err = marvell_set_downshift(phydev, true, 8);
675 if (phy_interface_is_rgmii(phydev)) {
676 err = m88e1121_config_aneg_rgmii_delays(phydev);
681 err = genphy_soft_reset(phydev);
685 return marvell_config_init(phydev);
688 static int m88e3016_config_init(struct phy_device *phydev)
692 /* Enable Scrambler and Auto-Crossover */
693 ret = phy_modify(phydev, MII_88E3016_PHY_SPEC_CTRL,
694 MII_88E3016_DISABLE_SCRAMBLER,
695 MII_88E3016_AUTO_MDIX_CROSSOVER);
699 return marvell_config_init(phydev);
702 static int m88e1111_config_init_hwcfg_mode(struct phy_device *phydev,
704 int fibre_copper_auto)
706 if (fibre_copper_auto)
707 mode |= MII_M1111_HWCFG_FIBER_COPPER_AUTO;
709 return phy_modify(phydev, MII_M1111_PHY_EXT_SR,
710 MII_M1111_HWCFG_MODE_MASK |
711 MII_M1111_HWCFG_FIBER_COPPER_AUTO |
712 MII_M1111_HWCFG_FIBER_COPPER_RES,
716 static int m88e1111_config_init_rgmii_delays(struct phy_device *phydev)
720 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) {
721 delay = MII_M1111_RGMII_RX_DELAY | MII_M1111_RGMII_TX_DELAY;
722 } else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) {
723 delay = MII_M1111_RGMII_RX_DELAY;
724 } else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID) {
725 delay = MII_M1111_RGMII_TX_DELAY;
730 return phy_modify(phydev, MII_M1111_PHY_EXT_CR,
731 MII_M1111_RGMII_RX_DELAY | MII_M1111_RGMII_TX_DELAY,
735 static int m88e1111_config_init_rgmii(struct phy_device *phydev)
740 err = m88e1111_config_init_rgmii_delays(phydev);
744 temp = phy_read(phydev, MII_M1111_PHY_EXT_SR);
748 temp &= ~(MII_M1111_HWCFG_MODE_MASK);
750 if (temp & MII_M1111_HWCFG_FIBER_COPPER_RES)
751 temp |= MII_M1111_HWCFG_MODE_FIBER_RGMII;
753 temp |= MII_M1111_HWCFG_MODE_COPPER_RGMII;
755 return phy_write(phydev, MII_M1111_PHY_EXT_SR, temp);
758 static int m88e1111_config_init_sgmii(struct phy_device *phydev)
762 err = m88e1111_config_init_hwcfg_mode(
764 MII_M1111_HWCFG_MODE_SGMII_NO_CLK,
765 MII_M1111_HWCFG_FIBER_COPPER_AUTO);
769 /* make sure copper is selected */
770 return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
773 static int m88e1111_config_init_rtbi(struct phy_device *phydev)
777 err = m88e1111_config_init_rgmii_delays(phydev);
781 err = m88e1111_config_init_hwcfg_mode(
783 MII_M1111_HWCFG_MODE_RTBI,
784 MII_M1111_HWCFG_FIBER_COPPER_AUTO);
789 err = genphy_soft_reset(phydev);
793 return m88e1111_config_init_hwcfg_mode(
795 MII_M1111_HWCFG_MODE_RTBI,
796 MII_M1111_HWCFG_FIBER_COPPER_AUTO);
799 static int m88e1111_config_init(struct phy_device *phydev)
803 if (phy_interface_is_rgmii(phydev)) {
804 err = m88e1111_config_init_rgmii(phydev);
809 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
810 err = m88e1111_config_init_sgmii(phydev);
815 if (phydev->interface == PHY_INTERFACE_MODE_RTBI) {
816 err = m88e1111_config_init_rtbi(phydev);
821 err = marvell_of_reg_init(phydev);
825 return genphy_soft_reset(phydev);
828 static int m88e1318_config_init(struct phy_device *phydev)
830 if (phy_interrupt_is_valid(phydev)) {
831 int err = phy_modify_paged(
832 phydev, MII_MARVELL_LED_PAGE,
833 MII_88E1318S_PHY_LED_TCR,
834 MII_88E1318S_PHY_LED_TCR_FORCE_INT,
835 MII_88E1318S_PHY_LED_TCR_INTn_ENABLE |
836 MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW);
841 return marvell_config_init(phydev);
844 static int m88e1510_config_init(struct phy_device *phydev)
848 /* SGMII-to-Copper mode initialization */
849 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
851 err = marvell_set_page(phydev, 18);
855 /* In reg 20, write MODE[2:0] = 0x1 (SGMII to Copper) */
856 err = phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1,
857 MII_88E1510_GEN_CTRL_REG_1_MODE_MASK,
858 MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII);
862 /* PHY reset is necessary after changing MODE[2:0] */
863 err = phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1, 0,
864 MII_88E1510_GEN_CTRL_REG_1_RESET);
868 /* Reset page selection */
869 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
874 return m88e1318_config_init(phydev);
877 static int m88e1118_config_aneg(struct phy_device *phydev)
881 err = genphy_soft_reset(phydev);
885 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
889 err = genphy_config_aneg(phydev);
893 static int m88e1118_config_init(struct phy_device *phydev)
898 err = marvell_set_page(phydev, MII_MARVELL_MSCR_PAGE);
902 /* Enable 1000 Mbit */
903 err = phy_write(phydev, 0x15, 0x1070);
908 err = marvell_set_page(phydev, MII_MARVELL_LED_PAGE);
912 /* Adjust LED Control */
913 if (phydev->dev_flags & MARVELL_PHY_M1118_DNS323_LEDS)
914 err = phy_write(phydev, 0x10, 0x1100);
916 err = phy_write(phydev, 0x10, 0x021e);
920 err = marvell_of_reg_init(phydev);
925 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
929 return genphy_soft_reset(phydev);
932 static int m88e1149_config_init(struct phy_device *phydev)
937 err = marvell_set_page(phydev, MII_MARVELL_MSCR_PAGE);
941 /* Enable 1000 Mbit */
942 err = phy_write(phydev, 0x15, 0x1048);
946 err = marvell_of_reg_init(phydev);
951 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
955 return genphy_soft_reset(phydev);
958 static int m88e1145_config_init_rgmii(struct phy_device *phydev)
962 err = m88e1111_config_init_rgmii_delays(phydev);
966 if (phydev->dev_flags & MARVELL_PHY_M1145_FLAGS_RESISTANCE) {
967 err = phy_write(phydev, 0x1d, 0x0012);
971 err = phy_modify(phydev, 0x1e, 0x0fc0,
972 2 << 9 | /* 36 ohm */
973 2 << 6); /* 39 ohm */
977 err = phy_write(phydev, 0x1d, 0x3);
981 err = phy_write(phydev, 0x1e, 0x8000);
986 static int m88e1145_config_init_sgmii(struct phy_device *phydev)
988 return m88e1111_config_init_hwcfg_mode(
989 phydev, MII_M1111_HWCFG_MODE_SGMII_NO_CLK,
990 MII_M1111_HWCFG_FIBER_COPPER_AUTO);
993 static int m88e1145_config_init(struct phy_device *phydev)
997 /* Take care of errata E0 & E1 */
998 err = phy_write(phydev, 0x1d, 0x001b);
1002 err = phy_write(phydev, 0x1e, 0x418f);
1006 err = phy_write(phydev, 0x1d, 0x0016);
1010 err = phy_write(phydev, 0x1e, 0xa2da);
1014 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) {
1015 err = m88e1145_config_init_rgmii(phydev);
1020 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
1021 err = m88e1145_config_init_sgmii(phydev);
1026 err = marvell_of_reg_init(phydev);
1033 /* The VOD can be out of specification on link up. Poke an
1034 * undocumented register, in an undocumented page, with a magic value
1037 static int m88e6390_errata(struct phy_device *phydev)
1041 err = phy_write(phydev, MII_BMCR,
1042 BMCR_ANENABLE | BMCR_SPEED1000 | BMCR_FULLDPLX);
1046 usleep_range(300, 400);
1048 err = phy_write_paged(phydev, 0xf8, 0x08, 0x36);
1052 return genphy_soft_reset(phydev);
1055 static int m88e6390_config_aneg(struct phy_device *phydev)
1059 err = m88e6390_errata(phydev);
1063 return m88e1510_config_aneg(phydev);
1067 * fiber_lpa_mod_linkmode_lpa_t
1068 * @advertising: the linkmode advertisement settings
1069 * @lpa: value of the MII_LPA register for fiber link
1071 * A small helper function that translates MII_LPA bits to linkmode LP
1072 * advertisement settings. Other bits in advertising are left
1075 static void fiber_lpa_mod_linkmode_lpa_t(unsigned long *advertising, u32 lpa)
1077 linkmode_mod_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT,
1078 advertising, lpa & LPA_FIBER_1000HALF);
1080 linkmode_mod_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT,
1081 advertising, lpa & LPA_FIBER_1000FULL);
1085 * marvell_update_link - update link status in real time in @phydev
1086 * @phydev: target phy_device struct
1088 * Description: Update the value in phydev->link to reflect the
1089 * current link value.
1091 static int marvell_update_link(struct phy_device *phydev, int fiber)
1095 /* Use the generic register for copper link, or specific
1096 * register for fiber case
1099 status = phy_read(phydev, MII_M1011_PHY_STATUS);
1103 if ((status & REGISTER_LINK_STATUS) == 0)
1108 return genphy_update_link(phydev);
1114 static int marvell_read_status_page_an(struct phy_device *phydev,
1121 status = phy_read(phydev, MII_M1011_PHY_STATUS);
1125 lpa = phy_read(phydev, MII_LPA);
1129 lpagb = phy_read(phydev, MII_STAT1000);
1133 if (status & MII_M1011_PHY_STATUS_FULLDUPLEX)
1134 phydev->duplex = DUPLEX_FULL;
1136 phydev->duplex = DUPLEX_HALF;
1138 status = status & MII_M1011_PHY_STATUS_SPD_MASK;
1140 phydev->asym_pause = 0;
1143 case MII_M1011_PHY_STATUS_1000:
1144 phydev->speed = SPEED_1000;
1147 case MII_M1011_PHY_STATUS_100:
1148 phydev->speed = SPEED_100;
1152 phydev->speed = SPEED_10;
1157 mii_lpa_to_linkmode_lpa_t(phydev->lp_advertising, lpa);
1158 mii_stat1000_mod_linkmode_lpa_t(phydev->lp_advertising, lpagb);
1160 if (phydev->duplex == DUPLEX_FULL) {
1161 phydev->pause = lpa & LPA_PAUSE_CAP ? 1 : 0;
1162 phydev->asym_pause = lpa & LPA_PAUSE_ASYM ? 1 : 0;
1165 /* The fiber link is only 1000M capable */
1166 fiber_lpa_mod_linkmode_lpa_t(phydev->lp_advertising, lpa);
1168 if (phydev->duplex == DUPLEX_FULL) {
1169 if (!(lpa & LPA_PAUSE_FIBER)) {
1171 phydev->asym_pause = 0;
1172 } else if ((lpa & LPA_PAUSE_ASYM_FIBER)) {
1174 phydev->asym_pause = 1;
1177 phydev->asym_pause = 0;
1184 static int marvell_read_status_page_fixed(struct phy_device *phydev)
1186 int bmcr = phy_read(phydev, MII_BMCR);
1191 if (bmcr & BMCR_FULLDPLX)
1192 phydev->duplex = DUPLEX_FULL;
1194 phydev->duplex = DUPLEX_HALF;
1196 if (bmcr & BMCR_SPEED1000)
1197 phydev->speed = SPEED_1000;
1198 else if (bmcr & BMCR_SPEED100)
1199 phydev->speed = SPEED_100;
1201 phydev->speed = SPEED_10;
1204 phydev->asym_pause = 0;
1205 linkmode_zero(phydev->lp_advertising);
1210 /* marvell_read_status_page
1213 * Check the link, then figure out the current state
1214 * by comparing what we advertise with what the link partner
1215 * advertises. Start by checking the gigabit possibilities,
1216 * then move on to 10/100.
1218 static int marvell_read_status_page(struct phy_device *phydev, int page)
1223 /* Detect and update the link, but return if there
1226 if (page == MII_MARVELL_FIBER_PAGE)
1231 err = marvell_update_link(phydev, fiber);
1235 if (phydev->autoneg == AUTONEG_ENABLE)
1236 err = marvell_read_status_page_an(phydev, fiber);
1238 err = marvell_read_status_page_fixed(phydev);
1243 /* marvell_read_status
1245 * Some Marvell's phys have two modes: fiber and copper.
1246 * Both need status checked.
1248 * First, check the fiber link and status.
1249 * If the fiber link is down, check the copper link and status which
1250 * will be the default value if both link are down.
1252 static int marvell_read_status(struct phy_device *phydev)
1256 /* Check the fiber mode first */
1257 if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT,
1258 phydev->supported) &&
1259 phydev->interface != PHY_INTERFACE_MODE_SGMII) {
1260 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
1264 err = marvell_read_status_page(phydev, MII_MARVELL_FIBER_PAGE);
1268 /* If the fiber link is up, it is the selected and
1269 * used link. In this case, we need to stay in the
1270 * fiber page. Please to be careful about that, avoid
1271 * to restore Copper page in other functions which
1272 * could break the behaviour for some fiber phy like
1278 /* If fiber link is down, check and save copper mode state */
1279 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1284 return marvell_read_status_page(phydev, MII_MARVELL_COPPER_PAGE);
1287 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1293 * Some Marvell's phys have two modes: fiber and copper.
1294 * Both need to be suspended
1296 static int marvell_suspend(struct phy_device *phydev)
1300 /* Suspend the fiber mode first */
1301 if (!linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT,
1302 phydev->supported)) {
1303 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
1307 /* With the page set, use the generic suspend */
1308 err = genphy_suspend(phydev);
1312 /* Then, the copper link */
1313 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1318 /* With the page set, use the generic suspend */
1319 return genphy_suspend(phydev);
1322 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1328 * Some Marvell's phys have two modes: fiber and copper.
1329 * Both need to be resumed
1331 static int marvell_resume(struct phy_device *phydev)
1335 /* Resume the fiber mode first */
1336 if (!linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT,
1337 phydev->supported)) {
1338 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
1342 /* With the page set, use the generic resume */
1343 err = genphy_resume(phydev);
1347 /* Then, the copper link */
1348 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1353 /* With the page set, use the generic resume */
1354 return genphy_resume(phydev);
1357 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1361 static int marvell_aneg_done(struct phy_device *phydev)
1363 int retval = phy_read(phydev, MII_M1011_PHY_STATUS);
1365 return (retval < 0) ? retval : (retval & MII_M1011_PHY_STATUS_RESOLVED);
1368 static int m88e1121_did_interrupt(struct phy_device *phydev)
1372 imask = phy_read(phydev, MII_M1011_IEVENT);
1374 if (imask & MII_M1011_IMASK_INIT)
1380 static void m88e1318_get_wol(struct phy_device *phydev,
1381 struct ethtool_wolinfo *wol)
1383 int oldpage, ret = 0;
1385 wol->supported = WAKE_MAGIC;
1388 oldpage = phy_select_page(phydev, MII_MARVELL_WOL_PAGE);
1392 ret = __phy_read(phydev, MII_88E1318S_PHY_WOL_CTRL);
1393 if (ret & MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE)
1394 wol->wolopts |= WAKE_MAGIC;
1397 phy_restore_page(phydev, oldpage, ret);
1400 static int m88e1318_set_wol(struct phy_device *phydev,
1401 struct ethtool_wolinfo *wol)
1403 int err = 0, oldpage;
1405 oldpage = phy_save_page(phydev);
1409 if (wol->wolopts & WAKE_MAGIC) {
1410 /* Explicitly switch to page 0x00, just to be sure */
1411 err = marvell_write_page(phydev, MII_MARVELL_COPPER_PAGE);
1415 /* If WOL event happened once, the LED[2] interrupt pin
1416 * will not be cleared unless we reading the interrupt status
1417 * register. If interrupts are in use, the normal interrupt
1418 * handling will clear the WOL event. Clear the WOL event
1419 * before enabling it if !phy_interrupt_is_valid()
1421 if (!phy_interrupt_is_valid(phydev))
1422 __phy_read(phydev, MII_M1011_IEVENT);
1424 /* Enable the WOL interrupt */
1425 err = __phy_modify(phydev, MII_88E1318S_PHY_CSIER, 0,
1426 MII_88E1318S_PHY_CSIER_WOL_EIE);
1430 err = marvell_write_page(phydev, MII_MARVELL_LED_PAGE);
1434 /* Setup LED[2] as interrupt pin (active low) */
1435 err = __phy_modify(phydev, MII_88E1318S_PHY_LED_TCR,
1436 MII_88E1318S_PHY_LED_TCR_FORCE_INT,
1437 MII_88E1318S_PHY_LED_TCR_INTn_ENABLE |
1438 MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW);
1442 err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE);
1446 /* Store the device address for the magic packet */
1447 err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD2,
1448 ((phydev->attached_dev->dev_addr[5] << 8) |
1449 phydev->attached_dev->dev_addr[4]));
1452 err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD1,
1453 ((phydev->attached_dev->dev_addr[3] << 8) |
1454 phydev->attached_dev->dev_addr[2]));
1457 err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD0,
1458 ((phydev->attached_dev->dev_addr[1] << 8) |
1459 phydev->attached_dev->dev_addr[0]));
1463 /* Clear WOL status and enable magic packet matching */
1464 err = __phy_modify(phydev, MII_88E1318S_PHY_WOL_CTRL, 0,
1465 MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS |
1466 MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE);
1470 err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE);
1474 /* Clear WOL status and disable magic packet matching */
1475 err = __phy_modify(phydev, MII_88E1318S_PHY_WOL_CTRL,
1476 MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE,
1477 MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS);
1483 return phy_restore_page(phydev, oldpage, err);
1486 static int marvell_get_sset_count(struct phy_device *phydev)
1488 if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT,
1490 return ARRAY_SIZE(marvell_hw_stats);
1492 return ARRAY_SIZE(marvell_hw_stats) - NB_FIBER_STATS;
1495 static void marvell_get_strings(struct phy_device *phydev, u8 *data)
1499 for (i = 0; i < ARRAY_SIZE(marvell_hw_stats); i++) {
1500 strlcpy(data + i * ETH_GSTRING_LEN,
1501 marvell_hw_stats[i].string, ETH_GSTRING_LEN);
1505 static u64 marvell_get_stat(struct phy_device *phydev, int i)
1507 struct marvell_hw_stat stat = marvell_hw_stats[i];
1508 struct marvell_priv *priv = phydev->priv;
1512 val = phy_read_paged(phydev, stat.page, stat.reg);
1516 val = val & ((1 << stat.bits) - 1);
1517 priv->stats[i] += val;
1518 ret = priv->stats[i];
1524 static void marvell_get_stats(struct phy_device *phydev,
1525 struct ethtool_stats *stats, u64 *data)
1529 for (i = 0; i < ARRAY_SIZE(marvell_hw_stats); i++)
1530 data[i] = marvell_get_stat(phydev, i);
1534 static int m88e1121_get_temp(struct phy_device *phydev, long *temp)
1542 oldpage = phy_select_page(phydev, MII_MARVELL_MISC_TEST_PAGE);
1546 /* Enable temperature sensor */
1547 ret = __phy_read(phydev, MII_88E1121_MISC_TEST);
1551 ret = __phy_write(phydev, MII_88E1121_MISC_TEST,
1552 ret | MII_88E1121_MISC_TEST_TEMP_SENSOR_EN);
1556 /* Wait for temperature to stabilize */
1557 usleep_range(10000, 12000);
1559 val = __phy_read(phydev, MII_88E1121_MISC_TEST);
1565 /* Disable temperature sensor */
1566 ret = __phy_write(phydev, MII_88E1121_MISC_TEST,
1567 ret & ~MII_88E1121_MISC_TEST_TEMP_SENSOR_EN);
1571 *temp = ((val & MII_88E1121_MISC_TEST_TEMP_MASK) - 5) * 5000;
1574 return phy_restore_page(phydev, oldpage, ret);
1577 static int m88e1121_hwmon_read(struct device *dev,
1578 enum hwmon_sensor_types type,
1579 u32 attr, int channel, long *temp)
1581 struct phy_device *phydev = dev_get_drvdata(dev);
1585 case hwmon_temp_input:
1586 err = m88e1121_get_temp(phydev, temp);
1595 static umode_t m88e1121_hwmon_is_visible(const void *data,
1596 enum hwmon_sensor_types type,
1597 u32 attr, int channel)
1599 if (type != hwmon_temp)
1603 case hwmon_temp_input:
1610 static u32 m88e1121_hwmon_chip_config[] = {
1611 HWMON_C_REGISTER_TZ,
1615 static const struct hwmon_channel_info m88e1121_hwmon_chip = {
1617 .config = m88e1121_hwmon_chip_config,
1620 static u32 m88e1121_hwmon_temp_config[] = {
1625 static const struct hwmon_channel_info m88e1121_hwmon_temp = {
1627 .config = m88e1121_hwmon_temp_config,
1630 static const struct hwmon_channel_info *m88e1121_hwmon_info[] = {
1631 &m88e1121_hwmon_chip,
1632 &m88e1121_hwmon_temp,
1636 static const struct hwmon_ops m88e1121_hwmon_hwmon_ops = {
1637 .is_visible = m88e1121_hwmon_is_visible,
1638 .read = m88e1121_hwmon_read,
1641 static const struct hwmon_chip_info m88e1121_hwmon_chip_info = {
1642 .ops = &m88e1121_hwmon_hwmon_ops,
1643 .info = m88e1121_hwmon_info,
1646 static int m88e1510_get_temp(struct phy_device *phydev, long *temp)
1652 ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
1653 MII_88E1510_TEMP_SENSOR);
1657 *temp = ((ret & MII_88E1510_TEMP_SENSOR_MASK) - 25) * 1000;
1662 static int m88e1510_get_temp_critical(struct phy_device *phydev, long *temp)
1668 ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
1669 MII_88E1121_MISC_TEST);
1673 *temp = (((ret & MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK) >>
1674 MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT) * 5) - 25;
1681 static int m88e1510_set_temp_critical(struct phy_device *phydev, long temp)
1684 temp = clamp_val(DIV_ROUND_CLOSEST(temp, 5) + 5, 0, 0x1f);
1686 return phy_modify_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
1687 MII_88E1121_MISC_TEST,
1688 MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK,
1689 temp << MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT);
1692 static int m88e1510_get_temp_alarm(struct phy_device *phydev, long *alarm)
1698 ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
1699 MII_88E1121_MISC_TEST);
1703 *alarm = !!(ret & MII_88E1510_MISC_TEST_TEMP_IRQ);
1708 static int m88e1510_hwmon_read(struct device *dev,
1709 enum hwmon_sensor_types type,
1710 u32 attr, int channel, long *temp)
1712 struct phy_device *phydev = dev_get_drvdata(dev);
1716 case hwmon_temp_input:
1717 err = m88e1510_get_temp(phydev, temp);
1719 case hwmon_temp_crit:
1720 err = m88e1510_get_temp_critical(phydev, temp);
1722 case hwmon_temp_max_alarm:
1723 err = m88e1510_get_temp_alarm(phydev, temp);
1732 static int m88e1510_hwmon_write(struct device *dev,
1733 enum hwmon_sensor_types type,
1734 u32 attr, int channel, long temp)
1736 struct phy_device *phydev = dev_get_drvdata(dev);
1740 case hwmon_temp_crit:
1741 err = m88e1510_set_temp_critical(phydev, temp);
1749 static umode_t m88e1510_hwmon_is_visible(const void *data,
1750 enum hwmon_sensor_types type,
1751 u32 attr, int channel)
1753 if (type != hwmon_temp)
1757 case hwmon_temp_input:
1758 case hwmon_temp_max_alarm:
1760 case hwmon_temp_crit:
1767 static u32 m88e1510_hwmon_temp_config[] = {
1768 HWMON_T_INPUT | HWMON_T_CRIT | HWMON_T_MAX_ALARM,
1772 static const struct hwmon_channel_info m88e1510_hwmon_temp = {
1774 .config = m88e1510_hwmon_temp_config,
1777 static const struct hwmon_channel_info *m88e1510_hwmon_info[] = {
1778 &m88e1121_hwmon_chip,
1779 &m88e1510_hwmon_temp,
1783 static const struct hwmon_ops m88e1510_hwmon_hwmon_ops = {
1784 .is_visible = m88e1510_hwmon_is_visible,
1785 .read = m88e1510_hwmon_read,
1786 .write = m88e1510_hwmon_write,
1789 static const struct hwmon_chip_info m88e1510_hwmon_chip_info = {
1790 .ops = &m88e1510_hwmon_hwmon_ops,
1791 .info = m88e1510_hwmon_info,
1794 static int m88e6390_get_temp(struct phy_device *phydev, long *temp)
1803 oldpage = phy_select_page(phydev, MII_MARVELL_MISC_TEST_PAGE);
1807 /* Enable temperature sensor */
1808 ret = __phy_read(phydev, MII_88E6390_MISC_TEST);
1812 ret = ret & ~MII_88E6390_MISC_TEST_SAMPLE_MASK;
1813 ret |= MII_88E6390_MISC_TEST_SAMPLE_ENABLE |
1814 MII_88E6390_MISC_TEST_SAMPLE_1S;
1816 ret = __phy_write(phydev, MII_88E6390_MISC_TEST, ret);
1820 /* Wait for temperature to stabilize */
1821 usleep_range(10000, 12000);
1823 /* Reading the temperature sense has an errata. You need to read
1824 * a number of times and take an average.
1826 for (i = 0; i < MII_88E6390_TEMP_SENSOR_SAMPLES; i++) {
1827 ret = __phy_read(phydev, MII_88E6390_TEMP_SENSOR);
1830 sum += ret & MII_88E6390_TEMP_SENSOR_MASK;
1833 sum /= MII_88E6390_TEMP_SENSOR_SAMPLES;
1834 *temp = (sum - 75) * 1000;
1836 /* Disable temperature sensor */
1837 ret = __phy_read(phydev, MII_88E6390_MISC_TEST);
1841 ret = ret & ~MII_88E6390_MISC_TEST_SAMPLE_MASK;
1842 ret |= MII_88E6390_MISC_TEST_SAMPLE_DISABLE;
1844 ret = __phy_write(phydev, MII_88E6390_MISC_TEST, ret);
1847 phy_restore_page(phydev, oldpage, ret);
1852 static int m88e6390_hwmon_read(struct device *dev,
1853 enum hwmon_sensor_types type,
1854 u32 attr, int channel, long *temp)
1856 struct phy_device *phydev = dev_get_drvdata(dev);
1860 case hwmon_temp_input:
1861 err = m88e6390_get_temp(phydev, temp);
1870 static umode_t m88e6390_hwmon_is_visible(const void *data,
1871 enum hwmon_sensor_types type,
1872 u32 attr, int channel)
1874 if (type != hwmon_temp)
1878 case hwmon_temp_input:
1885 static u32 m88e6390_hwmon_temp_config[] = {
1890 static const struct hwmon_channel_info m88e6390_hwmon_temp = {
1892 .config = m88e6390_hwmon_temp_config,
1895 static const struct hwmon_channel_info *m88e6390_hwmon_info[] = {
1896 &m88e1121_hwmon_chip,
1897 &m88e6390_hwmon_temp,
1901 static const struct hwmon_ops m88e6390_hwmon_hwmon_ops = {
1902 .is_visible = m88e6390_hwmon_is_visible,
1903 .read = m88e6390_hwmon_read,
1906 static const struct hwmon_chip_info m88e6390_hwmon_chip_info = {
1907 .ops = &m88e6390_hwmon_hwmon_ops,
1908 .info = m88e6390_hwmon_info,
1911 static int marvell_hwmon_name(struct phy_device *phydev)
1913 struct marvell_priv *priv = phydev->priv;
1914 struct device *dev = &phydev->mdio.dev;
1915 const char *devname = dev_name(dev);
1916 size_t len = strlen(devname);
1919 priv->hwmon_name = devm_kzalloc(dev, len, GFP_KERNEL);
1920 if (!priv->hwmon_name)
1923 for (i = j = 0; i < len && devname[i]; i++) {
1924 if (isalnum(devname[i]))
1925 priv->hwmon_name[j++] = devname[i];
1931 static int marvell_hwmon_probe(struct phy_device *phydev,
1932 const struct hwmon_chip_info *chip)
1934 struct marvell_priv *priv = phydev->priv;
1935 struct device *dev = &phydev->mdio.dev;
1938 err = marvell_hwmon_name(phydev);
1942 priv->hwmon_dev = devm_hwmon_device_register_with_info(
1943 dev, priv->hwmon_name, phydev, chip, NULL);
1945 return PTR_ERR_OR_ZERO(priv->hwmon_dev);
1948 static int m88e1121_hwmon_probe(struct phy_device *phydev)
1950 return marvell_hwmon_probe(phydev, &m88e1121_hwmon_chip_info);
1953 static int m88e1510_hwmon_probe(struct phy_device *phydev)
1955 return marvell_hwmon_probe(phydev, &m88e1510_hwmon_chip_info);
1958 static int m88e6390_hwmon_probe(struct phy_device *phydev)
1960 return marvell_hwmon_probe(phydev, &m88e6390_hwmon_chip_info);
1963 static int m88e1121_hwmon_probe(struct phy_device *phydev)
1968 static int m88e1510_hwmon_probe(struct phy_device *phydev)
1973 static int m88e6390_hwmon_probe(struct phy_device *phydev)
1979 static int marvell_probe(struct phy_device *phydev)
1981 struct marvell_priv *priv;
1983 priv = devm_kzalloc(&phydev->mdio.dev, sizeof(*priv), GFP_KERNEL);
1987 phydev->priv = priv;
1992 static int m88e1121_probe(struct phy_device *phydev)
1996 err = marvell_probe(phydev);
2000 return m88e1121_hwmon_probe(phydev);
2003 static int m88e1510_probe(struct phy_device *phydev)
2007 err = marvell_probe(phydev);
2011 return m88e1510_hwmon_probe(phydev);
2014 static int m88e6390_probe(struct phy_device *phydev)
2018 err = marvell_probe(phydev);
2022 return m88e6390_hwmon_probe(phydev);
2025 static struct phy_driver marvell_drivers[] = {
2027 .phy_id = MARVELL_PHY_ID_88E1101,
2028 .phy_id_mask = MARVELL_PHY_ID_MASK,
2029 .name = "Marvell 88E1101",
2030 .features = PHY_GBIT_FEATURES,
2031 .probe = marvell_probe,
2032 .config_init = &marvell_config_init,
2033 .config_aneg = &m88e1101_config_aneg,
2034 .ack_interrupt = &marvell_ack_interrupt,
2035 .config_intr = &marvell_config_intr,
2036 .resume = &genphy_resume,
2037 .suspend = &genphy_suspend,
2038 .read_page = marvell_read_page,
2039 .write_page = marvell_write_page,
2040 .get_sset_count = marvell_get_sset_count,
2041 .get_strings = marvell_get_strings,
2042 .get_stats = marvell_get_stats,
2045 .phy_id = MARVELL_PHY_ID_88E1112,
2046 .phy_id_mask = MARVELL_PHY_ID_MASK,
2047 .name = "Marvell 88E1112",
2048 .features = PHY_GBIT_FEATURES,
2049 .probe = marvell_probe,
2050 .config_init = &m88e1111_config_init,
2051 .config_aneg = &marvell_config_aneg,
2052 .ack_interrupt = &marvell_ack_interrupt,
2053 .config_intr = &marvell_config_intr,
2054 .resume = &genphy_resume,
2055 .suspend = &genphy_suspend,
2056 .read_page = marvell_read_page,
2057 .write_page = marvell_write_page,
2058 .get_sset_count = marvell_get_sset_count,
2059 .get_strings = marvell_get_strings,
2060 .get_stats = marvell_get_stats,
2063 .phy_id = MARVELL_PHY_ID_88E1111,
2064 .phy_id_mask = MARVELL_PHY_ID_MASK,
2065 .name = "Marvell 88E1111",
2066 .features = PHY_GBIT_FEATURES,
2067 .probe = marvell_probe,
2068 .config_init = &m88e1111_config_init,
2069 .config_aneg = &marvell_config_aneg,
2070 .read_status = &marvell_read_status,
2071 .ack_interrupt = &marvell_ack_interrupt,
2072 .config_intr = &marvell_config_intr,
2073 .resume = &genphy_resume,
2074 .suspend = &genphy_suspend,
2075 .read_page = marvell_read_page,
2076 .write_page = marvell_write_page,
2077 .get_sset_count = marvell_get_sset_count,
2078 .get_strings = marvell_get_strings,
2079 .get_stats = marvell_get_stats,
2082 .phy_id = MARVELL_PHY_ID_88E1118,
2083 .phy_id_mask = MARVELL_PHY_ID_MASK,
2084 .name = "Marvell 88E1118",
2085 .features = PHY_GBIT_FEATURES,
2086 .probe = marvell_probe,
2087 .config_init = &m88e1118_config_init,
2088 .config_aneg = &m88e1118_config_aneg,
2089 .ack_interrupt = &marvell_ack_interrupt,
2090 .config_intr = &marvell_config_intr,
2091 .resume = &genphy_resume,
2092 .suspend = &genphy_suspend,
2093 .read_page = marvell_read_page,
2094 .write_page = marvell_write_page,
2095 .get_sset_count = marvell_get_sset_count,
2096 .get_strings = marvell_get_strings,
2097 .get_stats = marvell_get_stats,
2100 .phy_id = MARVELL_PHY_ID_88E1121R,
2101 .phy_id_mask = MARVELL_PHY_ID_MASK,
2102 .name = "Marvell 88E1121R",
2103 .features = PHY_GBIT_FEATURES,
2104 .probe = &m88e1121_probe,
2105 .config_init = &marvell_config_init,
2106 .config_aneg = &m88e1121_config_aneg,
2107 .read_status = &marvell_read_status,
2108 .ack_interrupt = &marvell_ack_interrupt,
2109 .config_intr = &marvell_config_intr,
2110 .did_interrupt = &m88e1121_did_interrupt,
2111 .resume = &genphy_resume,
2112 .suspend = &genphy_suspend,
2113 .read_page = marvell_read_page,
2114 .write_page = marvell_write_page,
2115 .get_sset_count = marvell_get_sset_count,
2116 .get_strings = marvell_get_strings,
2117 .get_stats = marvell_get_stats,
2120 .phy_id = MARVELL_PHY_ID_88E1318S,
2121 .phy_id_mask = MARVELL_PHY_ID_MASK,
2122 .name = "Marvell 88E1318S",
2123 .features = PHY_GBIT_FEATURES,
2124 .probe = marvell_probe,
2125 .config_init = &m88e1318_config_init,
2126 .config_aneg = &m88e1318_config_aneg,
2127 .read_status = &marvell_read_status,
2128 .ack_interrupt = &marvell_ack_interrupt,
2129 .config_intr = &marvell_config_intr,
2130 .did_interrupt = &m88e1121_did_interrupt,
2131 .get_wol = &m88e1318_get_wol,
2132 .set_wol = &m88e1318_set_wol,
2133 .resume = &genphy_resume,
2134 .suspend = &genphy_suspend,
2135 .read_page = marvell_read_page,
2136 .write_page = marvell_write_page,
2137 .get_sset_count = marvell_get_sset_count,
2138 .get_strings = marvell_get_strings,
2139 .get_stats = marvell_get_stats,
2142 .phy_id = MARVELL_PHY_ID_88E1145,
2143 .phy_id_mask = MARVELL_PHY_ID_MASK,
2144 .name = "Marvell 88E1145",
2145 .features = PHY_GBIT_FEATURES,
2146 .probe = marvell_probe,
2147 .config_init = &m88e1145_config_init,
2148 .config_aneg = &m88e1101_config_aneg,
2149 .read_status = &genphy_read_status,
2150 .ack_interrupt = &marvell_ack_interrupt,
2151 .config_intr = &marvell_config_intr,
2152 .resume = &genphy_resume,
2153 .suspend = &genphy_suspend,
2154 .read_page = marvell_read_page,
2155 .write_page = marvell_write_page,
2156 .get_sset_count = marvell_get_sset_count,
2157 .get_strings = marvell_get_strings,
2158 .get_stats = marvell_get_stats,
2161 .phy_id = MARVELL_PHY_ID_88E1149R,
2162 .phy_id_mask = MARVELL_PHY_ID_MASK,
2163 .name = "Marvell 88E1149R",
2164 .features = PHY_GBIT_FEATURES,
2165 .probe = marvell_probe,
2166 .config_init = &m88e1149_config_init,
2167 .config_aneg = &m88e1118_config_aneg,
2168 .ack_interrupt = &marvell_ack_interrupt,
2169 .config_intr = &marvell_config_intr,
2170 .resume = &genphy_resume,
2171 .suspend = &genphy_suspend,
2172 .read_page = marvell_read_page,
2173 .write_page = marvell_write_page,
2174 .get_sset_count = marvell_get_sset_count,
2175 .get_strings = marvell_get_strings,
2176 .get_stats = marvell_get_stats,
2179 .phy_id = MARVELL_PHY_ID_88E1240,
2180 .phy_id_mask = MARVELL_PHY_ID_MASK,
2181 .name = "Marvell 88E1240",
2182 .features = PHY_GBIT_FEATURES,
2183 .probe = marvell_probe,
2184 .config_init = &m88e1111_config_init,
2185 .config_aneg = &marvell_config_aneg,
2186 .ack_interrupt = &marvell_ack_interrupt,
2187 .config_intr = &marvell_config_intr,
2188 .resume = &genphy_resume,
2189 .suspend = &genphy_suspend,
2190 .read_page = marvell_read_page,
2191 .write_page = marvell_write_page,
2192 .get_sset_count = marvell_get_sset_count,
2193 .get_strings = marvell_get_strings,
2194 .get_stats = marvell_get_stats,
2197 .phy_id = MARVELL_PHY_ID_88E1116R,
2198 .phy_id_mask = MARVELL_PHY_ID_MASK,
2199 .name = "Marvell 88E1116R",
2200 .features = PHY_GBIT_FEATURES,
2201 .probe = marvell_probe,
2202 .config_init = &m88e1116r_config_init,
2203 .ack_interrupt = &marvell_ack_interrupt,
2204 .config_intr = &marvell_config_intr,
2205 .resume = &genphy_resume,
2206 .suspend = &genphy_suspend,
2207 .read_page = marvell_read_page,
2208 .write_page = marvell_write_page,
2209 .get_sset_count = marvell_get_sset_count,
2210 .get_strings = marvell_get_strings,
2211 .get_stats = marvell_get_stats,
2214 .phy_id = MARVELL_PHY_ID_88E1510,
2215 .phy_id_mask = MARVELL_PHY_ID_MASK,
2216 .name = "Marvell 88E1510",
2217 .features = PHY_GBIT_FIBRE_FEATURES,
2218 .probe = &m88e1510_probe,
2219 .config_init = &m88e1510_config_init,
2220 .config_aneg = &m88e1510_config_aneg,
2221 .read_status = &marvell_read_status,
2222 .ack_interrupt = &marvell_ack_interrupt,
2223 .config_intr = &marvell_config_intr,
2224 .did_interrupt = &m88e1121_did_interrupt,
2225 .get_wol = &m88e1318_get_wol,
2226 .set_wol = &m88e1318_set_wol,
2227 .resume = &marvell_resume,
2228 .suspend = &marvell_suspend,
2229 .read_page = marvell_read_page,
2230 .write_page = marvell_write_page,
2231 .get_sset_count = marvell_get_sset_count,
2232 .get_strings = marvell_get_strings,
2233 .get_stats = marvell_get_stats,
2234 .set_loopback = genphy_loopback,
2237 .phy_id = MARVELL_PHY_ID_88E1540,
2238 .phy_id_mask = MARVELL_PHY_ID_MASK,
2239 .name = "Marvell 88E1540",
2240 .features = PHY_GBIT_FEATURES,
2241 .probe = m88e1510_probe,
2242 .config_init = &marvell_config_init,
2243 .config_aneg = &m88e1510_config_aneg,
2244 .read_status = &marvell_read_status,
2245 .ack_interrupt = &marvell_ack_interrupt,
2246 .config_intr = &marvell_config_intr,
2247 .did_interrupt = &m88e1121_did_interrupt,
2248 .resume = &genphy_resume,
2249 .suspend = &genphy_suspend,
2250 .read_page = marvell_read_page,
2251 .write_page = marvell_write_page,
2252 .get_sset_count = marvell_get_sset_count,
2253 .get_strings = marvell_get_strings,
2254 .get_stats = marvell_get_stats,
2257 .phy_id = MARVELL_PHY_ID_88E1545,
2258 .phy_id_mask = MARVELL_PHY_ID_MASK,
2259 .name = "Marvell 88E1545",
2260 .probe = m88e1510_probe,
2261 .features = PHY_GBIT_FEATURES,
2262 .config_init = &marvell_config_init,
2263 .config_aneg = &m88e1510_config_aneg,
2264 .read_status = &marvell_read_status,
2265 .ack_interrupt = &marvell_ack_interrupt,
2266 .config_intr = &marvell_config_intr,
2267 .did_interrupt = &m88e1121_did_interrupt,
2268 .resume = &genphy_resume,
2269 .suspend = &genphy_suspend,
2270 .read_page = marvell_read_page,
2271 .write_page = marvell_write_page,
2272 .get_sset_count = marvell_get_sset_count,
2273 .get_strings = marvell_get_strings,
2274 .get_stats = marvell_get_stats,
2277 .phy_id = MARVELL_PHY_ID_88E3016,
2278 .phy_id_mask = MARVELL_PHY_ID_MASK,
2279 .name = "Marvell 88E3016",
2280 .features = PHY_BASIC_FEATURES,
2281 .probe = marvell_probe,
2282 .config_init = &m88e3016_config_init,
2283 .aneg_done = &marvell_aneg_done,
2284 .read_status = &marvell_read_status,
2285 .ack_interrupt = &marvell_ack_interrupt,
2286 .config_intr = &marvell_config_intr,
2287 .did_interrupt = &m88e1121_did_interrupt,
2288 .resume = &genphy_resume,
2289 .suspend = &genphy_suspend,
2290 .read_page = marvell_read_page,
2291 .write_page = marvell_write_page,
2292 .get_sset_count = marvell_get_sset_count,
2293 .get_strings = marvell_get_strings,
2294 .get_stats = marvell_get_stats,
2297 .phy_id = MARVELL_PHY_ID_88E6390,
2298 .phy_id_mask = MARVELL_PHY_ID_MASK,
2299 .name = "Marvell 88E6390",
2300 .features = PHY_GBIT_FEATURES,
2301 .probe = m88e6390_probe,
2302 .config_init = &marvell_config_init,
2303 .config_aneg = &m88e6390_config_aneg,
2304 .read_status = &marvell_read_status,
2305 .ack_interrupt = &marvell_ack_interrupt,
2306 .config_intr = &marvell_config_intr,
2307 .did_interrupt = &m88e1121_did_interrupt,
2308 .resume = &genphy_resume,
2309 .suspend = &genphy_suspend,
2310 .read_page = marvell_read_page,
2311 .write_page = marvell_write_page,
2312 .get_sset_count = marvell_get_sset_count,
2313 .get_strings = marvell_get_strings,
2314 .get_stats = marvell_get_stats,
2318 module_phy_driver(marvell_drivers);
2320 static struct mdio_device_id __maybe_unused marvell_tbl[] = {
2321 { MARVELL_PHY_ID_88E1101, MARVELL_PHY_ID_MASK },
2322 { MARVELL_PHY_ID_88E1112, MARVELL_PHY_ID_MASK },
2323 { MARVELL_PHY_ID_88E1111, MARVELL_PHY_ID_MASK },
2324 { MARVELL_PHY_ID_88E1118, MARVELL_PHY_ID_MASK },
2325 { MARVELL_PHY_ID_88E1121R, MARVELL_PHY_ID_MASK },
2326 { MARVELL_PHY_ID_88E1145, MARVELL_PHY_ID_MASK },
2327 { MARVELL_PHY_ID_88E1149R, MARVELL_PHY_ID_MASK },
2328 { MARVELL_PHY_ID_88E1240, MARVELL_PHY_ID_MASK },
2329 { MARVELL_PHY_ID_88E1318S, MARVELL_PHY_ID_MASK },
2330 { MARVELL_PHY_ID_88E1116R, MARVELL_PHY_ID_MASK },
2331 { MARVELL_PHY_ID_88E1510, MARVELL_PHY_ID_MASK },
2332 { MARVELL_PHY_ID_88E1540, MARVELL_PHY_ID_MASK },
2333 { MARVELL_PHY_ID_88E1545, MARVELL_PHY_ID_MASK },
2334 { MARVELL_PHY_ID_88E3016, MARVELL_PHY_ID_MASK },
2335 { MARVELL_PHY_ID_88E6390, MARVELL_PHY_ID_MASK },
2339 MODULE_DEVICE_TABLE(mdio, marvell_tbl);