drivers/net/phy/phylink.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * phylink models the MAC to optional PHY connection, supporting
   4  * technologies such as SFP cages where the PHY is hot-pluggable.
   5  *
   6  * Copyright (C) 2015 Russell King
   7  */
   8 #include <linux/acpi.h>
   9 #include <linux/ethtool.h>
  10 #include <linux/export.h>
  11 #include <linux/gpio/consumer.h>
  12 #include <linux/netdevice.h>
  13 #include <linux/of.h>
  14 #include <linux/of_mdio.h>
  15 #include <linux/phy.h>
  16 #include <linux/phy_fixed.h>
  17 #include <linux/phylink.h>
  18 #include <linux/rtnetlink.h>
  19 #include <linux/spinlock.h>
  20 #include <linux/timer.h>
  21 #include <linux/workqueue.h>
  22
  23 #include "sfp.h"
  24 #include "swphy.h"
  25
  26 #define SUPPORTED_INTERFACES \
  27         (SUPPORTED_TP | SUPPORTED_MII | SUPPORTED_FIBRE | \
  28          SUPPORTED_BNC | SUPPORTED_AUI | SUPPORTED_Backplane)
  29 #define ADVERTISED_INTERFACES \
  30         (ADVERTISED_TP | ADVERTISED_MII | ADVERTISED_FIBRE | \
  31          ADVERTISED_BNC | ADVERTISED_AUI | ADVERTISED_Backplane)
  32
  33 enum {
  34         PHYLINK_DISABLE_STOPPED,
  35         PHYLINK_DISABLE_LINK,
  36         PHYLINK_DISABLE_MAC_WOL,
  37 };
  38
  39 /**
  40  * struct phylink - internal data type for phylink
  41  */
  42 struct phylink {
  43         /* private: */
  44         struct net_device *netdev;
  45         const struct phylink_mac_ops *mac_ops;
  46         struct phylink_config *config;
  47         struct phylink_pcs *pcs;
  48         struct device *dev;
  49         unsigned int old_link_state:1;
  50
  51         unsigned long phylink_disable_state; /* bitmask of disables */
  52         struct phy_device *phydev;
  53         phy_interface_t link_interface; /* PHY_INTERFACE_xxx */
  54         u8 cfg_link_an_mode;            /* MLO_AN_xxx */
  55         u8 cur_link_an_mode;
  56         u8 link_port;                   /* The current non-phy ethtool port */
  57         __ETHTOOL_DECLARE_LINK_MODE_MASK(supported);
  58
  59         /* The link configuration settings */
  60         struct phylink_link_state link_config;
  61
  62         /* The current settings */
  63         phy_interface_t cur_interface;
  64
  65         struct gpio_desc *link_gpio;
  66         unsigned int link_irq;
  67         struct timer_list link_poll;
  68         void (*get_fixed_state)(struct net_device *dev,
  69                                 struct phylink_link_state *s);
  70
  71         struct mutex state_mutex;
  72         struct phylink_link_state phy_state;
  73         struct work_struct resolve;
  74
  75         bool mac_link_dropped;
  76         bool using_mac_select_pcs;
  77
  78         struct sfp_bus *sfp_bus;
  79         bool sfp_may_have_phy;
  80         DECLARE_PHY_INTERFACE_MASK(sfp_interfaces);
  81         __ETHTOOL_DECLARE_LINK_MODE_MASK(sfp_support);
  82         u8 sfp_port;
  83 };
  84
  85 #define phylink_printk(level, pl, fmt, ...) \
  86         do { \
  87                 if ((pl)->config->type == PHYLINK_NETDEV) \
  88                         netdev_printk(level, (pl)->netdev, fmt, ##__VA_ARGS__); \
  89                 else if ((pl)->config->type == PHYLINK_DEV) \
  90                         dev_printk(level, (pl)->dev, fmt, ##__VA_ARGS__); \
  91         } while (0)
  92
  93 #define phylink_err(pl, fmt, ...) \
  94         phylink_printk(KERN_ERR, pl, fmt, ##__VA_ARGS__)
  95 #define phylink_warn(pl, fmt, ...) \
  96         phylink_printk(KERN_WARNING, pl, fmt, ##__VA_ARGS__)
  97 #define phylink_info(pl, fmt, ...) \
  98         phylink_printk(KERN_INFO, pl, fmt, ##__VA_ARGS__)
  99 #if defined(CONFIG_DYNAMIC_DEBUG)
 100 #define phylink_dbg(pl, fmt, ...) \
 101 do {                                                                    \
 102         if ((pl)->config->type == PHYLINK_NETDEV)                       \
 103                 netdev_dbg((pl)->netdev, fmt, ##__VA_ARGS__);           \
 104         else if ((pl)->config->type == PHYLINK_DEV)                     \
 105                 dev_dbg((pl)->dev, fmt, ##__VA_ARGS__);                 \
 106 } while (0)
 107 #elif defined(DEBUG)
 108 #define phylink_dbg(pl, fmt, ...)                                       \
 109         phylink_printk(KERN_DEBUG, pl, fmt, ##__VA_ARGS__)
 110 #else
 111 #define phylink_dbg(pl, fmt, ...)                                       \
 112 ({                                                                      \
 113         if (0)                                                          \
 114                 phylink_printk(KERN_DEBUG, pl, fmt, ##__VA_ARGS__);     \
 115 })
 116 #endif
 117
 118 /**
 119  * phylink_set_port_modes() - set the port type modes in the ethtool mask
 120  * @mask: ethtool link mode mask
 121  *
 122  * Sets all the port type modes in the ethtool mask.  MAC drivers should
 123  * use this in their 'validate' callback.
 124  */
 125 void phylink_set_port_modes(unsigned long *mask)
 126 {
 127         phylink_set(mask, TP);
 128         phylink_set(mask, AUI);
 129         phylink_set(mask, MII);
 130         phylink_set(mask, FIBRE);
 131         phylink_set(mask, BNC);
 132         phylink_set(mask, Backplane);
 133 }
 134 EXPORT_SYMBOL_GPL(phylink_set_port_modes);
 135
 136 static int phylink_is_empty_linkmode(const unsigned long *linkmode)
 137 {
 138         __ETHTOOL_DECLARE_LINK_MODE_MASK(tmp) = { 0, };
 139
 140         phylink_set_port_modes(tmp);
 141         phylink_set(tmp, Autoneg);
 142         phylink_set(tmp, Pause);
 143         phylink_set(tmp, Asym_Pause);
 144
 145         return linkmode_subset(linkmode, tmp);
 146 }
 147
 148 static const char *phylink_an_mode_str(unsigned int mode)
 149 {
 150         static const char *modestr[] = {
 151                 [MLO_AN_PHY] = "phy",
 152                 [MLO_AN_FIXED] = "fixed",
 153                 [MLO_AN_INBAND] = "inband",
 154         };
 155
 156         return mode < ARRAY_SIZE(modestr) ? modestr[mode] : "unknown";
 157 }
 158
 159 /**
 160  * phylink_interface_max_speed() - get the maximum speed of a phy interface
 161  * @interface: phy interface mode defined by &typedef phy_interface_t
 162  *
 163  * Determine the maximum speed of a phy interface. This is intended to help
 164  * determine the correct speed to pass to the MAC when the phy is performing
 165  * rate matching.
 166  *
 167  * Return: The maximum speed of @interface
 168  */
 169 static int phylink_interface_max_speed(phy_interface_t interface)
 170 {
 171         switch (interface) {
 172         case PHY_INTERFACE_MODE_100BASEX:
 173         case PHY_INTERFACE_MODE_REVRMII:
 174         case PHY_INTERFACE_MODE_RMII:
 175         case PHY_INTERFACE_MODE_SMII:
 176         case PHY_INTERFACE_MODE_REVMII:
 177         case PHY_INTERFACE_MODE_MII:
 178                 return SPEED_100;
 179
 180         case PHY_INTERFACE_MODE_TBI:
 181         case PHY_INTERFACE_MODE_MOCA:
 182         case PHY_INTERFACE_MODE_RTBI:
 183         case PHY_INTERFACE_MODE_1000BASEX:
 184         case PHY_INTERFACE_MODE_1000BASEKX:
 185         case PHY_INTERFACE_MODE_TRGMII:
 186         case PHY_INTERFACE_MODE_RGMII_TXID:
 187         case PHY_INTERFACE_MODE_RGMII_RXID:
 188         case PHY_INTERFACE_MODE_RGMII_ID:
 189         case PHY_INTERFACE_MODE_RGMII:
 190         case PHY_INTERFACE_MODE_QSGMII:
 191         case PHY_INTERFACE_MODE_SGMII:
 192         case PHY_INTERFACE_MODE_GMII:
 193                 return SPEED_1000;
 194
 195         case PHY_INTERFACE_MODE_2500BASEX:
 196                 return SPEED_2500;
 197
 198         case PHY_INTERFACE_MODE_5GBASER:
 199                 return SPEED_5000;
 200
 201         case PHY_INTERFACE_MODE_XGMII:
 202         case PHY_INTERFACE_MODE_RXAUI:
 203         case PHY_INTERFACE_MODE_XAUI:
 204         case PHY_INTERFACE_MODE_10GBASER:
 205         case PHY_INTERFACE_MODE_10GKR:
 206         case PHY_INTERFACE_MODE_USXGMII:
 207         case PHY_INTERFACE_MODE_QUSGMII:
 208                 return SPEED_10000;
 209
 210         case PHY_INTERFACE_MODE_25GBASER:
 211                 return SPEED_25000;
 212
 213         case PHY_INTERFACE_MODE_XLGMII:
 214                 return SPEED_40000;
 215
 216         case PHY_INTERFACE_MODE_INTERNAL:
 217         case PHY_INTERFACE_MODE_NA:
 218         case PHY_INTERFACE_MODE_MAX:
 219                 /* No idea! Garbage in, unknown out */
 220                 return SPEED_UNKNOWN;
 221         }
 222
 223         /* If we get here, someone forgot to add an interface mode above */
 224         WARN_ON_ONCE(1);
 225         return SPEED_UNKNOWN;
 226 }
 227
 228 /**
 229  * phylink_caps_to_linkmodes() - Convert capabilities to ethtool link modes
 230  * @linkmodes: ethtool linkmode mask (must be already initialised)
 231  * @caps: bitmask of MAC capabilities
 232  *
 233  * Set all possible pause, speed and duplex linkmodes in @linkmodes that are
 234  * supported by the @caps. @linkmodes must have been initialised previously.
 235  */
 236 void phylink_caps_to_linkmodes(unsigned long *linkmodes, unsigned long caps)
 237 {
 238         if (caps & MAC_SYM_PAUSE)
 239                 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT, linkmodes);
 240
 241         if (caps & MAC_ASYM_PAUSE)
 242                 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, linkmodes);
 243
 244         if (caps & MAC_10HD) {
 245                 __set_bit(ETHTOOL_LINK_MODE_10baseT_Half_BIT, linkmodes);
 246                 __set_bit(ETHTOOL_LINK_MODE_10baseT1S_Half_BIT, linkmodes);
 247                 __set_bit(ETHTOOL_LINK_MODE_10baseT1S_P2MP_Half_BIT, linkmodes);
 248         }
 249
 250         if (caps & MAC_10FD) {
 251                 __set_bit(ETHTOOL_LINK_MODE_10baseT_Full_BIT, linkmodes);
 252                 __set_bit(ETHTOOL_LINK_MODE_10baseT1L_Full_BIT, linkmodes);
 253                 __set_bit(ETHTOOL_LINK_MODE_10baseT1S_Full_BIT, linkmodes);
 254         }
 255
 256         if (caps & MAC_100HD) {
 257                 __set_bit(ETHTOOL_LINK_MODE_100baseT_Half_BIT, linkmodes);
 258                 __set_bit(ETHTOOL_LINK_MODE_100baseFX_Half_BIT, linkmodes);
 259         }
 260
 261         if (caps & MAC_100FD) {
 262                 __set_bit(ETHTOOL_LINK_MODE_100baseT_Full_BIT, linkmodes);
 263                 __set_bit(ETHTOOL_LINK_MODE_100baseT1_Full_BIT, linkmodes);
 264                 __set_bit(ETHTOOL_LINK_MODE_100baseFX_Full_BIT, linkmodes);
 265         }
 266
 267         if (caps & MAC_1000HD)
 268                 __set_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, linkmodes);
 269
 270         if (caps & MAC_1000FD) {
 271                 __set_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, linkmodes);
 272                 __set_bit(ETHTOOL_LINK_MODE_1000baseKX_Full_BIT, linkmodes);
 273                 __set_bit(ETHTOOL_LINK_MODE_1000baseX_Full_BIT, linkmodes);
 274                 __set_bit(ETHTOOL_LINK_MODE_1000baseT1_Full_BIT, linkmodes);
 275         }
 276
 277         if (caps & MAC_2500FD) {
 278                 __set_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT, linkmodes);
 279                 __set_bit(ETHTOOL_LINK_MODE_2500baseX_Full_BIT, linkmodes);
 280         }
 281
 282         if (caps & MAC_5000FD)
 283                 __set_bit(ETHTOOL_LINK_MODE_5000baseT_Full_BIT, linkmodes);
 284
 285         if (caps & MAC_10000FD) {
 286                 __set_bit(ETHTOOL_LINK_MODE_10000baseT_Full_BIT, linkmodes);
 287                 __set_bit(ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT, linkmodes);
 288                 __set_bit(ETHTOOL_LINK_MODE_10000baseKR_Full_BIT, linkmodes);
 289                 __set_bit(ETHTOOL_LINK_MODE_10000baseR_FEC_BIT, linkmodes);
 290                 __set_bit(ETHTOOL_LINK_MODE_10000baseCR_Full_BIT, linkmodes);
 291                 __set_bit(ETHTOOL_LINK_MODE_10000baseSR_Full_BIT, linkmodes);
 292                 __set_bit(ETHTOOL_LINK_MODE_10000baseLR_Full_BIT, linkmodes);
 293                 __set_bit(ETHTOOL_LINK_MODE_10000baseLRM_Full_BIT, linkmodes);
 294                 __set_bit(ETHTOOL_LINK_MODE_10000baseER_Full_BIT, linkmodes);
 295         }
 296
 297         if (caps & MAC_25000FD) {
 298                 __set_bit(ETHTOOL_LINK_MODE_25000baseCR_Full_BIT, linkmodes);
 299                 __set_bit(ETHTOOL_LINK_MODE_25000baseKR_Full_BIT, linkmodes);
 300                 __set_bit(ETHTOOL_LINK_MODE_25000baseSR_Full_BIT, linkmodes);
 301         }
 302
 303         if (caps & MAC_40000FD) {
 304                 __set_bit(ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT, linkmodes);
 305                 __set_bit(ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT, linkmodes);
 306                 __set_bit(ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT, linkmodes);
 307                 __set_bit(ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT, linkmodes);
 308         }
 309
 310         if (caps & MAC_50000FD) {
 311                 __set_bit(ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT, linkmodes);
 312                 __set_bit(ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT, linkmodes);
 313                 __set_bit(ETHTOOL_LINK_MODE_50000baseSR2_Full_BIT, linkmodes);
 314                 __set_bit(ETHTOOL_LINK_MODE_50000baseKR_Full_BIT, linkmodes);
 315                 __set_bit(ETHTOOL_LINK_MODE_50000baseSR_Full_BIT, linkmodes);
 316                 __set_bit(ETHTOOL_LINK_MODE_50000baseCR_Full_BIT, linkmodes);
 317                 __set_bit(ETHTOOL_LINK_MODE_50000baseLR_ER_FR_Full_BIT,
 318                           linkmodes);
 319                 __set_bit(ETHTOOL_LINK_MODE_50000baseDR_Full_BIT, linkmodes);
 320         }
 321
 322         if (caps & MAC_56000FD) {
 323                 __set_bit(ETHTOOL_LINK_MODE_56000baseKR4_Full_BIT, linkmodes);
 324                 __set_bit(ETHTOOL_LINK_MODE_56000baseCR4_Full_BIT, linkmodes);
 325                 __set_bit(ETHTOOL_LINK_MODE_56000baseSR4_Full_BIT, linkmodes);
 326                 __set_bit(ETHTOOL_LINK_MODE_56000baseLR4_Full_BIT, linkmodes);
 327         }
 328
 329         if (caps & MAC_100000FD) {
 330                 __set_bit(ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT, linkmodes);
 331                 __set_bit(ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT, linkmodes);
 332                 __set_bit(ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT, linkmodes);
 333                 __set_bit(ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT,
 334                           linkmodes);
 335                 __set_bit(ETHTOOL_LINK_MODE_100000baseKR2_Full_BIT, linkmodes);
 336                 __set_bit(ETHTOOL_LINK_MODE_100000baseSR2_Full_BIT, linkmodes);
 337                 __set_bit(ETHTOOL_LINK_MODE_100000baseCR2_Full_BIT, linkmodes);
 338                 __set_bit(ETHTOOL_LINK_MODE_100000baseLR2_ER2_FR2_Full_BIT,
 339                           linkmodes);
 340                 __set_bit(ETHTOOL_LINK_MODE_100000baseDR2_Full_BIT, linkmodes);
 341                 __set_bit(ETHTOOL_LINK_MODE_100000baseKR_Full_BIT, linkmodes);
 342                 __set_bit(ETHTOOL_LINK_MODE_100000baseSR_Full_BIT, linkmodes);
 343                 __set_bit(ETHTOOL_LINK_MODE_100000baseLR_ER_FR_Full_BIT,
 344                           linkmodes);
 345                 __set_bit(ETHTOOL_LINK_MODE_100000baseCR_Full_BIT, linkmodes);
 346                 __set_bit(ETHTOOL_LINK_MODE_100000baseDR_Full_BIT, linkmodes);
 347         }
 348
 349         if (caps & MAC_200000FD) {
 350                 __set_bit(ETHTOOL_LINK_MODE_200000baseKR4_Full_BIT, linkmodes);
 351                 __set_bit(ETHTOOL_LINK_MODE_200000baseSR4_Full_BIT, linkmodes);
 352                 __set_bit(ETHTOOL_LINK_MODE_200000baseLR4_ER4_FR4_Full_BIT,
 353                           linkmodes);
 354                 __set_bit(ETHTOOL_LINK_MODE_200000baseDR4_Full_BIT, linkmodes);
 355                 __set_bit(ETHTOOL_LINK_MODE_200000baseCR4_Full_BIT, linkmodes);
 356                 __set_bit(ETHTOOL_LINK_MODE_200000baseKR2_Full_BIT, linkmodes);
 357                 __set_bit(ETHTOOL_LINK_MODE_200000baseSR2_Full_BIT, linkmodes);
 358                 __set_bit(ETHTOOL_LINK_MODE_200000baseLR2_ER2_FR2_Full_BIT,
 359                           linkmodes);
 360                 __set_bit(ETHTOOL_LINK_MODE_200000baseDR2_Full_BIT, linkmodes);
 361                 __set_bit(ETHTOOL_LINK_MODE_200000baseCR2_Full_BIT, linkmodes);
 362         }
 363
 364         if (caps & MAC_400000FD) {
 365                 __set_bit(ETHTOOL_LINK_MODE_400000baseKR8_Full_BIT, linkmodes);
 366                 __set_bit(ETHTOOL_LINK_MODE_400000baseSR8_Full_BIT, linkmodes);
 367                 __set_bit(ETHTOOL_LINK_MODE_400000baseLR8_ER8_FR8_Full_BIT,
 368                           linkmodes);
 369                 __set_bit(ETHTOOL_LINK_MODE_400000baseDR8_Full_BIT, linkmodes);
 370                 __set_bit(ETHTOOL_LINK_MODE_400000baseCR8_Full_BIT, linkmodes);
 371                 __set_bit(ETHTOOL_LINK_MODE_400000baseKR4_Full_BIT, linkmodes);
 372                 __set_bit(ETHTOOL_LINK_MODE_400000baseSR4_Full_BIT, linkmodes);
 373                 __set_bit(ETHTOOL_LINK_MODE_400000baseLR4_ER4_FR4_Full_BIT,
 374                           linkmodes);
 375                 __set_bit(ETHTOOL_LINK_MODE_400000baseDR4_Full_BIT, linkmodes);
 376                 __set_bit(ETHTOOL_LINK_MODE_400000baseCR4_Full_BIT, linkmodes);
 377         }
 378 }
 379 EXPORT_SYMBOL_GPL(phylink_caps_to_linkmodes);
 380
 381 static struct {
 382         unsigned long mask;
 383         int speed;
 384         unsigned int duplex;
 385 } phylink_caps_params[] = {
 386         { MAC_400000FD, SPEED_400000, DUPLEX_FULL },
 387         { MAC_200000FD, SPEED_200000, DUPLEX_FULL },
 388         { MAC_100000FD, SPEED_100000, DUPLEX_FULL },
 389         { MAC_56000FD,  SPEED_56000,  DUPLEX_FULL },
 390         { MAC_50000FD,  SPEED_50000,  DUPLEX_FULL },
 391         { MAC_40000FD,  SPEED_40000,  DUPLEX_FULL },
 392         { MAC_25000FD,  SPEED_25000,  DUPLEX_FULL },
 393         { MAC_20000FD,  SPEED_20000,  DUPLEX_FULL },
 394         { MAC_10000FD,  SPEED_10000,  DUPLEX_FULL },
 395         { MAC_5000FD,   SPEED_5000,   DUPLEX_FULL },
 396         { MAC_2500FD,   SPEED_2500,   DUPLEX_FULL },
 397         { MAC_1000FD,   SPEED_1000,   DUPLEX_FULL },
 398         { MAC_1000HD,   SPEED_1000,   DUPLEX_HALF },
 399         { MAC_100FD,    SPEED_100,    DUPLEX_FULL },
 400         { MAC_100HD,    SPEED_100,    DUPLEX_HALF },
 401         { MAC_10FD,     SPEED_10,     DUPLEX_FULL },
 402         { MAC_10HD,     SPEED_10,     DUPLEX_HALF },
 403 };
 404
 405 /**
 406  * phylink_cap_from_speed_duplex - Get mac capability from speed/duplex
 407  * @speed: the speed to search for
 408  * @duplex: the duplex to search for
 409  *
 410  * Find the mac capability for a given speed and duplex.
 411  *
 412  * Return: A mask with the mac capability patching @speed and @duplex, or 0 if
 413  *         there were no matches.
 414  */
 415 static unsigned long phylink_cap_from_speed_duplex(int speed,
 416                                                    unsigned int duplex)
 417 {
 418         int i;
 419
 420         for (i = 0; i < ARRAY_SIZE(phylink_caps_params); i++) {
 421                 if (speed == phylink_caps_params[i].speed &&
 422                     duplex == phylink_caps_params[i].duplex)
 423                         return phylink_caps_params[i].mask;
 424         }
 425
 426         return 0;
 427 }
 428
 429 /**
 430  * phylink_get_capabilities() - get capabilities for a given MAC
 431  * @interface: phy interface mode defined by &typedef phy_interface_t
 432  * @mac_capabilities: bitmask of MAC capabilities
 433  * @rate_matching: type of rate matching being performed
 434  *
 435  * Get the MAC capabilities that are supported by the @interface mode and
 436  * @mac_capabilities.
 437  */
 438 unsigned long phylink_get_capabilities(phy_interface_t interface,
 439                                        unsigned long mac_capabilities,
 440                                        int rate_matching)
 441 {
 442         int max_speed = phylink_interface_max_speed(interface);
 443         unsigned long caps = MAC_SYM_PAUSE | MAC_ASYM_PAUSE;
 444         unsigned long matched_caps = 0;
 445
 446         switch (interface) {
 447         case PHY_INTERFACE_MODE_USXGMII:
 448                 caps |= MAC_10000FD | MAC_5000FD | MAC_2500FD;
 449                 fallthrough;
 450
 451         case PHY_INTERFACE_MODE_RGMII_TXID:
 452         case PHY_INTERFACE_MODE_RGMII_RXID:
 453         case PHY_INTERFACE_MODE_RGMII_ID:
 454         case PHY_INTERFACE_MODE_RGMII:
 455         case PHY_INTERFACE_MODE_QSGMII:
 456         case PHY_INTERFACE_MODE_QUSGMII:
 457         case PHY_INTERFACE_MODE_SGMII:
 458         case PHY_INTERFACE_MODE_GMII:
 459                 caps |= MAC_1000HD | MAC_1000FD;
 460                 fallthrough;
 461
 462         case PHY_INTERFACE_MODE_REVRMII:
 463         case PHY_INTERFACE_MODE_RMII:
 464         case PHY_INTERFACE_MODE_SMII:
 465         case PHY_INTERFACE_MODE_REVMII:
 466         case PHY_INTERFACE_MODE_MII:
 467                 caps |= MAC_10HD | MAC_10FD;
 468                 fallthrough;
 469
 470         case PHY_INTERFACE_MODE_100BASEX:
 471                 caps |= MAC_100HD | MAC_100FD;
 472                 break;
 473
 474         case PHY_INTERFACE_MODE_TBI:
 475         case PHY_INTERFACE_MODE_MOCA:
 476         case PHY_INTERFACE_MODE_RTBI:
 477         case PHY_INTERFACE_MODE_1000BASEX:
 478                 caps |= MAC_1000HD;
 479                 fallthrough;
 480         case PHY_INTERFACE_MODE_1000BASEKX:
 481         case PHY_INTERFACE_MODE_TRGMII:
 482                 caps |= MAC_1000FD;
 483                 break;
 484
 485         case PHY_INTERFACE_MODE_2500BASEX:
 486                 caps |= MAC_2500FD;
 487                 break;
 488
 489         case PHY_INTERFACE_MODE_5GBASER:
 490                 caps |= MAC_5000FD;
 491                 break;
 492
 493         case PHY_INTERFACE_MODE_XGMII:
 494         case PHY_INTERFACE_MODE_RXAUI:
 495         case PHY_INTERFACE_MODE_XAUI:
 496         case PHY_INTERFACE_MODE_10GBASER:
 497         case PHY_INTERFACE_MODE_10GKR:
 498                 caps |= MAC_10000FD;
 499                 break;
 500
 501         case PHY_INTERFACE_MODE_25GBASER:
 502                 caps |= MAC_25000FD;
 503                 break;
 504
 505         case PHY_INTERFACE_MODE_XLGMII:
 506                 caps |= MAC_40000FD;
 507                 break;
 508
 509         case PHY_INTERFACE_MODE_INTERNAL:
 510                 caps |= ~0;
 511                 break;
 512
 513         case PHY_INTERFACE_MODE_NA:
 514         case PHY_INTERFACE_MODE_MAX:
 515                 break;
 516         }
 517
 518         switch (rate_matching) {
 519         case RATE_MATCH_OPEN_LOOP:
 520                 /* TODO */
 521                 fallthrough;
 522         case RATE_MATCH_NONE:
 523                 matched_caps = 0;
 524                 break;
 525         case RATE_MATCH_PAUSE: {
 526                 /* The MAC must support asymmetric pause towards the local
 527                  * device for this. We could allow just symmetric pause, but
 528                  * then we might have to renegotiate if the link partner
 529                  * doesn't support pause. This is because there's no way to
 530                  * accept pause frames without transmitting them if we only
 531                  * support symmetric pause.
 532                  */
 533                 if (!(mac_capabilities & MAC_SYM_PAUSE) ||
 534                     !(mac_capabilities & MAC_ASYM_PAUSE))
 535                         break;
 536
 537                 /* We can't adapt if the MAC doesn't support the interface's
 538                  * max speed at full duplex.
 539                  */
 540                 if (mac_capabilities &
 541                     phylink_cap_from_speed_duplex(max_speed, DUPLEX_FULL)) {
 542                         /* Although a duplex-matching phy might exist, we
 543                          * conservatively remove these modes because the MAC
 544                          * will not be aware of the half-duplex nature of the
 545                          * link.
 546                          */
 547                         matched_caps = GENMASK(__fls(caps), __fls(MAC_10HD));
 548                         matched_caps &= ~(MAC_1000HD | MAC_100HD | MAC_10HD);
 549                 }
 550                 break;
 551         }
 552         case RATE_MATCH_CRS:
 553                 /* The MAC must support half duplex at the interface's max
 554                  * speed.
 555                  */
 556                 if (mac_capabilities &
 557                     phylink_cap_from_speed_duplex(max_speed, DUPLEX_HALF)) {
 558                         matched_caps = GENMASK(__fls(caps), __fls(MAC_10HD));
 559                         matched_caps &= mac_capabilities;
 560                 }
 561                 break;
 562         }
 563
 564         return (caps & mac_capabilities) | matched_caps;
 565 }
 566 EXPORT_SYMBOL_GPL(phylink_get_capabilities);
 567
 568 /**
 569  * phylink_validate_mask_caps() - Restrict link modes based on caps
 570  * @supported: ethtool bitmask for supported link modes.
 571  * @state: pointer to a &struct phylink_link_state.
 572  * @mac_capabilities: bitmask of MAC capabilities
 573  *
 574  * Calculate the supported link modes based on @mac_capabilities, and restrict
 575  * @supported and @state based on that. Use this function if your capabiliies
 576  * aren't constant, such as if they vary depending on the interface.
 577  */
 578 void phylink_validate_mask_caps(unsigned long *supported,
 579                                 struct phylink_link_state *state,
 580                                 unsigned long mac_capabilities)
 581 {
 582         __ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, };
 583         unsigned long caps;
 584
 585         phylink_set_port_modes(mask);
 586         phylink_set(mask, Autoneg);
 587         caps = phylink_get_capabilities(state->interface, mac_capabilities,
 588                                         state->rate_matching);
 589         phylink_caps_to_linkmodes(mask, caps);
 590
 591         linkmode_and(supported, supported, mask);
 592         linkmode_and(state->advertising, state->advertising, mask);
 593 }
 594 EXPORT_SYMBOL_GPL(phylink_validate_mask_caps);
 595
 596 /**
 597  * phylink_generic_validate() - generic validate() callback implementation
 598  * @config: a pointer to a &struct phylink_config.
 599  * @supported: ethtool bitmask for supported link modes.
 600  * @state: a pointer to a &struct phylink_link_state.
 601  *
 602  * Generic implementation of the validate() callback that MAC drivers can
 603  * use when they pass the range of supported interfaces and MAC capabilities.
 604  */
 605 void phylink_generic_validate(struct phylink_config *config,
 606                               unsigned long *supported,
 607                               struct phylink_link_state *state)
 608 {
 609         phylink_validate_mask_caps(supported, state, config->mac_capabilities);
 610 }
 611 EXPORT_SYMBOL_GPL(phylink_generic_validate);
 612
 613 static int phylink_validate_mac_and_pcs(struct phylink *pl,
 614                                         unsigned long *supported,
 615                                         struct phylink_link_state *state)
 616 {
 617         struct phylink_pcs *pcs;
 618         int ret;
 619
 620         /* Get the PCS for this interface mode */
 621         if (pl->using_mac_select_pcs) {
 622                 pcs = pl->mac_ops->mac_select_pcs(pl->config, state->interface);
 623                 if (IS_ERR(pcs))
 624                         return PTR_ERR(pcs);
 625         } else {
 626                 pcs = pl->pcs;
 627         }
 628
 629         if (pcs) {
 630                 /* The PCS, if present, must be setup before phylink_create()
 631                  * has been called. If the ops is not initialised, print an
 632                  * error and backtrace rather than oopsing the kernel.
 633                  */
 634                 if (!pcs->ops) {
 635                         phylink_err(pl, "interface %s: uninitialised PCS\n",
 636                                     phy_modes(state->interface));
 637                         dump_stack();
 638                         return -EINVAL;
 639                 }
 640
 641                 /* Validate the link parameters with the PCS */
 642                 if (pcs->ops->pcs_validate) {
 643                         ret = pcs->ops->pcs_validate(pcs, supported, state);
 644                         if (ret < 0 || phylink_is_empty_linkmode(supported))
 645                                 return -EINVAL;
 646
 647                         /* Ensure the advertising mask is a subset of the
 648                          * supported mask.
 649                          */
 650                         linkmode_and(state->advertising, state->advertising,
 651                                      supported);
 652                 }
 653         }
 654
 655         /* Then validate the link parameters with the MAC */
 656         if (pl->mac_ops->validate)
 657                 pl->mac_ops->validate(pl->config, supported, state);
 658         else
 659                 phylink_generic_validate(pl->config, supported, state);
 660
 661         return phylink_is_empty_linkmode(supported) ? -EINVAL : 0;
 662 }
 663
 664 static int phylink_validate_mask(struct phylink *pl, unsigned long *supported,
 665                                  struct phylink_link_state *state,
 666                                  const unsigned long *interfaces)
 667 {
 668         __ETHTOOL_DECLARE_LINK_MODE_MASK(all_adv) = { 0, };
 669         __ETHTOOL_DECLARE_LINK_MODE_MASK(all_s) = { 0, };
 670         __ETHTOOL_DECLARE_LINK_MODE_MASK(s);
 671         struct phylink_link_state t;
 672         int intf;
 673
 674         for (intf = 0; intf < PHY_INTERFACE_MODE_MAX; intf++) {
 675                 if (test_bit(intf, interfaces)) {
 676                         linkmode_copy(s, supported);
 677
 678                         t = *state;
 679                         t.interface = intf;
 680                         if (!phylink_validate_mac_and_pcs(pl, s, &t)) {
 681                                 linkmode_or(all_s, all_s, s);
 682                                 linkmode_or(all_adv, all_adv, t.advertising);
 683                         }
 684                 }
 685         }
 686
 687         linkmode_copy(supported, all_s);
 688         linkmode_copy(state->advertising, all_adv);
 689
 690         return phylink_is_empty_linkmode(supported) ? -EINVAL : 0;
 691 }
 692
 693 static int phylink_validate(struct phylink *pl, unsigned long *supported,
 694                             struct phylink_link_state *state)
 695 {
 696         const unsigned long *interfaces = pl->config->supported_interfaces;
 697
 698         if (!phy_interface_empty(interfaces)) {
 699                 if (state->interface == PHY_INTERFACE_MODE_NA)
 700                         return phylink_validate_mask(pl, supported, state,
 701                                                      interfaces);
 702
 703                 if (!test_bit(state->interface, interfaces))
 704                         return -EINVAL;
 705         }
 706
 707         return phylink_validate_mac_and_pcs(pl, supported, state);
 708 }
 709
 710 static int phylink_parse_fixedlink(struct phylink *pl,
 711                                    struct fwnode_handle *fwnode)
 712 {
 713         struct fwnode_handle *fixed_node;
 714         bool pause, asym_pause, autoneg;
 715         const struct phy_setting *s;
 716         struct gpio_desc *desc;
 717         u32 speed;
 718         int ret;
 719
 720         fixed_node = fwnode_get_named_child_node(fwnode, "fixed-link");
 721         if (fixed_node) {
 722                 ret = fwnode_property_read_u32(fixed_node, "speed", &speed);
 723
 724                 pl->link_config.speed = speed;
 725                 pl->link_config.duplex = DUPLEX_HALF;
 726
 727                 if (fwnode_property_read_bool(fixed_node, "full-duplex"))
 728                         pl->link_config.duplex = DUPLEX_FULL;
 729
 730                 /* We treat the "pause" and "asym-pause" terminology as
 731                  * defining the link partner's ability.
 732                  */
 733                 if (fwnode_property_read_bool(fixed_node, "pause"))
 734                         __set_bit(ETHTOOL_LINK_MODE_Pause_BIT,
 735                                   pl->link_config.lp_advertising);
 736                 if (fwnode_property_read_bool(fixed_node, "asym-pause"))
 737                         __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT,
 738                                   pl->link_config.lp_advertising);
 739
 740                 if (ret == 0) {
 741                         desc = fwnode_gpiod_get_index(fixed_node, "link", 0,
 742                                                       GPIOD_IN, "?");
 743
 744                         if (!IS_ERR(desc))
 745                                 pl->link_gpio = desc;
 746                         else if (desc == ERR_PTR(-EPROBE_DEFER))
 747                                 ret = -EPROBE_DEFER;
 748                 }
 749                 fwnode_handle_put(fixed_node);
 750
 751                 if (ret)
 752                         return ret;
 753         } else {
 754                 u32 prop[5];
 755
 756                 ret = fwnode_property_read_u32_array(fwnode, "fixed-link",
 757                                                      NULL, 0);
 758                 if (ret != ARRAY_SIZE(prop)) {
 759                         phylink_err(pl, "broken fixed-link?\n");
 760                         return -EINVAL;
 761                 }
 762
 763                 ret = fwnode_property_read_u32_array(fwnode, "fixed-link",
 764                                                      prop, ARRAY_SIZE(prop));
 765                 if (!ret) {
 766                         pl->link_config.duplex = prop[1] ?
 767                                                 DUPLEX_FULL : DUPLEX_HALF;
 768                         pl->link_config.speed = prop[2];
 769                         if (prop[3])
 770                                 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT,
 771                                           pl->link_config.lp_advertising);
 772                         if (prop[4])
 773                                 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT,
 774                                           pl->link_config.lp_advertising);
 775                 }
 776         }
 777
 778         if (pl->link_config.speed > SPEED_1000 &&
 779             pl->link_config.duplex != DUPLEX_FULL)
 780                 phylink_warn(pl, "fixed link specifies half duplex for %dMbps link?\n",
 781                              pl->link_config.speed);
 782
 783         bitmap_fill(pl->supported, __ETHTOOL_LINK_MODE_MASK_NBITS);
 784         linkmode_copy(pl->link_config.advertising, pl->supported);
 785         phylink_validate(pl, pl->supported, &pl->link_config);
 786
 787         pause = phylink_test(pl->supported, Pause);
 788         asym_pause = phylink_test(pl->supported, Asym_Pause);
 789         autoneg = phylink_test(pl->supported, Autoneg);
 790         s = phy_lookup_setting(pl->link_config.speed, pl->link_config.duplex,
 791                                pl->supported, true);
 792         linkmode_zero(pl->supported);
 793         phylink_set(pl->supported, MII);
 794
 795         if (pause)
 796                 phylink_set(pl->supported, Pause);
 797
 798         if (asym_pause)
 799                 phylink_set(pl->supported, Asym_Pause);
 800
 801         if (autoneg)
 802                 phylink_set(pl->supported, Autoneg);
 803
 804         if (s) {
 805                 __set_bit(s->bit, pl->supported);
 806                 __set_bit(s->bit, pl->link_config.lp_advertising);
 807         } else {
 808                 phylink_warn(pl, "fixed link %s duplex %dMbps not recognised\n",
 809                              pl->link_config.duplex == DUPLEX_FULL ? "full" : "half",
 810                              pl->link_config.speed);
 811         }
 812
 813         linkmode_and(pl->link_config.advertising, pl->link_config.advertising,
 814                      pl->supported);
 815
 816         pl->link_config.link = 1;
 817         pl->link_config.an_complete = 1;
 818
 819         return 0;
 820 }
 821
 822 static int phylink_parse_mode(struct phylink *pl, struct fwnode_handle *fwnode)
 823 {
 824         struct fwnode_handle *dn;
 825         const char *managed;
 826
 827         dn = fwnode_get_named_child_node(fwnode, "fixed-link");
 828         if (dn || fwnode_property_present(fwnode, "fixed-link"))
 829                 pl->cfg_link_an_mode = MLO_AN_FIXED;
 830         fwnode_handle_put(dn);
 831
 832         if ((fwnode_property_read_string(fwnode, "managed", &managed) == 0 &&
 833              strcmp(managed, "in-band-status") == 0) ||
 834             pl->config->ovr_an_inband) {
 835                 if (pl->cfg_link_an_mode == MLO_AN_FIXED) {
 836                         phylink_err(pl,
 837                                     "can't use both fixed-link and in-band-status\n");
 838                         return -EINVAL;
 839                 }
 840
 841                 linkmode_zero(pl->supported);
 842                 phylink_set(pl->supported, MII);
 843                 phylink_set(pl->supported, Autoneg);
 844                 phylink_set(pl->supported, Asym_Pause);
 845                 phylink_set(pl->supported, Pause);
 846                 pl->link_config.an_enabled = true;
 847                 pl->cfg_link_an_mode = MLO_AN_INBAND;
 848
 849                 switch (pl->link_config.interface) {
 850                 case PHY_INTERFACE_MODE_SGMII:
 851                 case PHY_INTERFACE_MODE_QSGMII:
 852                 case PHY_INTERFACE_MODE_QUSGMII:
 853                 case PHY_INTERFACE_MODE_RGMII:
 854                 case PHY_INTERFACE_MODE_RGMII_ID:
 855                 case PHY_INTERFACE_MODE_RGMII_RXID:
 856                 case PHY_INTERFACE_MODE_RGMII_TXID:
 857                 case PHY_INTERFACE_MODE_RTBI:
 858                         phylink_set(pl->supported, 10baseT_Half);
 859                         phylink_set(pl->supported, 10baseT_Full);
 860                         phylink_set(pl->supported, 100baseT_Half);
 861                         phylink_set(pl->supported, 100baseT_Full);
 862                         phylink_set(pl->supported, 1000baseT_Half);
 863                         phylink_set(pl->supported, 1000baseT_Full);
 864                         break;
 865
 866                 case PHY_INTERFACE_MODE_1000BASEX:
 867                         phylink_set(pl->supported, 1000baseX_Full);
 868                         break;
 869
 870                 case PHY_INTERFACE_MODE_2500BASEX:
 871                         phylink_set(pl->supported, 2500baseX_Full);
 872                         break;
 873
 874                 case PHY_INTERFACE_MODE_5GBASER:
 875                         phylink_set(pl->supported, 5000baseT_Full);
 876                         break;
 877
 878                 case PHY_INTERFACE_MODE_25GBASER:
 879                         phylink_set(pl->supported, 25000baseCR_Full);
 880                         phylink_set(pl->supported, 25000baseKR_Full);
 881                         phylink_set(pl->supported, 25000baseSR_Full);
 882                         fallthrough;
 883                 case PHY_INTERFACE_MODE_USXGMII:
 884                 case PHY_INTERFACE_MODE_10GKR:
 885                 case PHY_INTERFACE_MODE_10GBASER:
 886                         phylink_set(pl->supported, 10baseT_Half);
 887                         phylink_set(pl->supported, 10baseT_Full);
 888                         phylink_set(pl->supported, 100baseT_Half);
 889                         phylink_set(pl->supported, 100baseT_Full);
 890                         phylink_set(pl->supported, 1000baseT_Half);
 891                         phylink_set(pl->supported, 1000baseT_Full);
 892                         phylink_set(pl->supported, 1000baseX_Full);
 893                         phylink_set(pl->supported, 1000baseKX_Full);
 894                         phylink_set(pl->supported, 2500baseT_Full);
 895                         phylink_set(pl->supported, 2500baseX_Full);
 896                         phylink_set(pl->supported, 5000baseT_Full);
 897                         phylink_set(pl->supported, 10000baseT_Full);
 898                         phylink_set(pl->supported, 10000baseKR_Full);
 899                         phylink_set(pl->supported, 10000baseKX4_Full);
 900                         phylink_set(pl->supported, 10000baseCR_Full);
 901                         phylink_set(pl->supported, 10000baseSR_Full);
 902                         phylink_set(pl->supported, 10000baseLR_Full);
 903                         phylink_set(pl->supported, 10000baseLRM_Full);
 904                         phylink_set(pl->supported, 10000baseER_Full);
 905                         break;
 906
 907                 case PHY_INTERFACE_MODE_XLGMII:
 908                         phylink_set(pl->supported, 25000baseCR_Full);
 909                         phylink_set(pl->supported, 25000baseKR_Full);
 910                         phylink_set(pl->supported, 25000baseSR_Full);
 911                         phylink_set(pl->supported, 40000baseKR4_Full);
 912                         phylink_set(pl->supported, 40000baseCR4_Full);
 913                         phylink_set(pl->supported, 40000baseSR4_Full);
 914                         phylink_set(pl->supported, 40000baseLR4_Full);
 915                         phylink_set(pl->supported, 50000baseCR2_Full);
 916                         phylink_set(pl->supported, 50000baseKR2_Full);
 917                         phylink_set(pl->supported, 50000baseSR2_Full);
 918                         phylink_set(pl->supported, 50000baseKR_Full);
 919                         phylink_set(pl->supported, 50000baseSR_Full);
 920                         phylink_set(pl->supported, 50000baseCR_Full);
 921                         phylink_set(pl->supported, 50000baseLR_ER_FR_Full);
 922                         phylink_set(pl->supported, 50000baseDR_Full);
 923                         phylink_set(pl->supported, 100000baseKR4_Full);
 924                         phylink_set(pl->supported, 100000baseSR4_Full);
 925                         phylink_set(pl->supported, 100000baseCR4_Full);
 926                         phylink_set(pl->supported, 100000baseLR4_ER4_Full);
 927                         phylink_set(pl->supported, 100000baseKR2_Full);
 928                         phylink_set(pl->supported, 100000baseSR2_Full);
 929                         phylink_set(pl->supported, 100000baseCR2_Full);
 930                         phylink_set(pl->supported, 100000baseLR2_ER2_FR2_Full);
 931                         phylink_set(pl->supported, 100000baseDR2_Full);
 932                         break;
 933
 934                 default:
 935                         phylink_err(pl,
 936                                     "incorrect link mode %s for in-band status\n",
 937                                     phy_modes(pl->link_config.interface));
 938                         return -EINVAL;
 939                 }
 940
 941                 linkmode_copy(pl->link_config.advertising, pl->supported);
 942
 943                 if (phylink_validate(pl, pl->supported, &pl->link_config)) {
 944                         phylink_err(pl,
 945                                     "failed to validate link configuration for in-band status\n");
 946                         return -EINVAL;
 947                 }
 948
 949                 /* Check if MAC/PCS also supports Autoneg. */
 950                 pl->link_config.an_enabled = phylink_test(pl->supported, Autoneg);
 951         }
 952
 953         return 0;
 954 }
 955
 956 static void phylink_apply_manual_flow(struct phylink *pl,
 957                                       struct phylink_link_state *state)
 958 {
 959         /* If autoneg is disabled, pause AN is also disabled */
 960         if (!state->an_enabled)
 961                 state->pause &= ~MLO_PAUSE_AN;
 962
 963         /* Manual configuration of pause modes */
 964         if (!(pl->link_config.pause & MLO_PAUSE_AN))
 965                 state->pause = pl->link_config.pause;
 966 }
 967
 968 static void phylink_resolve_flow(struct phylink_link_state *state)
 969 {
 970         bool tx_pause, rx_pause;
 971
 972         state->pause = MLO_PAUSE_NONE;
 973         if (state->duplex == DUPLEX_FULL) {
 974                 linkmode_resolve_pause(state->advertising,
 975                                        state->lp_advertising,
 976                                        &tx_pause, &rx_pause);
 977                 if (tx_pause)
 978                         state->pause |= MLO_PAUSE_TX;
 979                 if (rx_pause)
 980                         state->pause |= MLO_PAUSE_RX;
 981         }
 982 }
 983
 984 static void phylink_pcs_poll_stop(struct phylink *pl)
 985 {
 986         if (pl->cfg_link_an_mode == MLO_AN_INBAND)
 987                 del_timer(&pl->link_poll);
 988 }
 989
 990 static void phylink_pcs_poll_start(struct phylink *pl)
 991 {
 992         if (pl->pcs && pl->pcs->poll && pl->cfg_link_an_mode == MLO_AN_INBAND)
 993                 mod_timer(&pl->link_poll, jiffies + HZ);
 994 }
 995
 996 static void phylink_mac_config(struct phylink *pl,
 997                                const struct phylink_link_state *state)
 998 {
 999         phylink_dbg(pl,
1000                     "%s: mode=%s/%s/%s/%s/%s adv=%*pb pause=%02x link=%u an=%u\n",
1001                     __func__, phylink_an_mode_str(pl->cur_link_an_mode),
1002                     phy_modes(state->interface),
1003                     phy_speed_to_str(state->speed),
1004                     phy_duplex_to_str(state->duplex),
1005                     phy_rate_matching_to_str(state->rate_matching),
1006                     __ETHTOOL_LINK_MODE_MASK_NBITS, state->advertising,
1007                     state->pause, state->link, state->an_enabled);
1008
1009         pl->mac_ops->mac_config(pl->config, pl->cur_link_an_mode, state);
1010 }
1011
1012 static void phylink_mac_pcs_an_restart(struct phylink *pl)
1013 {
1014         if (pl->link_config.an_enabled &&
1015             phy_interface_mode_is_8023z(pl->link_config.interface) &&
1016             phylink_autoneg_inband(pl->cur_link_an_mode)) {
1017                 if (pl->pcs)
1018                         pl->pcs->ops->pcs_an_restart(pl->pcs);
1019                 else if (pl->config->legacy_pre_march2020)
1020                         pl->mac_ops->mac_an_restart(pl->config);
1021         }
1022 }
1023
1024 static void phylink_major_config(struct phylink *pl, bool restart,
1025                                   const struct phylink_link_state *state)
1026 {
1027         struct phylink_pcs *pcs = NULL;
1028         bool pcs_changed = false;
1029         int err;
1030
1031         phylink_dbg(pl, "major config %s\n", phy_modes(state->interface));
1032
1033         if (pl->using_mac_select_pcs) {
1034                 pcs = pl->mac_ops->mac_select_pcs(pl->config, state->interface);
1035                 if (IS_ERR(pcs)) {
1036                         phylink_err(pl,
1037                                     "mac_select_pcs unexpectedly failed: %pe\n",
1038                                     pcs);
1039                         return;
1040                 }
1041
1042                 pcs_changed = pcs && pl->pcs != pcs;
1043         }
1044
1045         phylink_pcs_poll_stop(pl);
1046
1047         if (pl->mac_ops->mac_prepare) {
1048                 err = pl->mac_ops->mac_prepare(pl->config, pl->cur_link_an_mode,
1049                                                state->interface);
1050                 if (err < 0) {
1051                         phylink_err(pl, "mac_prepare failed: %pe\n",
1052                                     ERR_PTR(err));
1053                         return;
1054                 }
1055         }
1056
1057         /* If we have a new PCS, switch to the new PCS after preparing the MAC
1058          * for the change.
1059          */
1060         if (pcs_changed)
1061                 pl->pcs = pcs;
1062
1063         phylink_mac_config(pl, state);
1064
1065         if (pl->pcs) {
1066                 err = pl->pcs->ops->pcs_config(pl->pcs, pl->cur_link_an_mode,
1067                                                state->interface,
1068                                                state->advertising,
1069                                                !!(pl->link_config.pause &
1070                                                   MLO_PAUSE_AN));
1071                 if (err < 0)
1072                         phylink_err(pl, "pcs_config failed: %pe\n",
1073                                     ERR_PTR(err));
1074                 if (err > 0)
1075                         restart = true;
1076         }
1077         if (restart)
1078                 phylink_mac_pcs_an_restart(pl);
1079
1080         if (pl->mac_ops->mac_finish) {
1081                 err = pl->mac_ops->mac_finish(pl->config, pl->cur_link_an_mode,
1082                                               state->interface);
1083                 if (err < 0)
1084                         phylink_err(pl, "mac_finish failed: %pe\n",
1085                                     ERR_PTR(err));
1086         }
1087
1088         phylink_pcs_poll_start(pl);
1089 }
1090
1091 /*
1092  * Reconfigure for a change of inband advertisement.
1093  * If we have a separate PCS, we only need to call its pcs_config() method,
1094  * and then restart AN if it indicates something changed. Otherwise, we do
1095  * the full MAC reconfiguration.
1096  */
1097 static int phylink_change_inband_advert(struct phylink *pl)
1098 {
1099         int ret;
1100
1101         if (test_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state))
1102                 return 0;
1103
1104         if (!pl->pcs && pl->config->legacy_pre_march2020) {
1105                 /* Legacy method */
1106                 phylink_mac_config(pl, &pl->link_config);
1107                 phylink_mac_pcs_an_restart(pl);
1108                 return 0;
1109         }
1110
1111         phylink_dbg(pl, "%s: mode=%s/%s adv=%*pb pause=%02x\n", __func__,
1112                     phylink_an_mode_str(pl->cur_link_an_mode),
1113                     phy_modes(pl->link_config.interface),
1114                     __ETHTOOL_LINK_MODE_MASK_NBITS, pl->link_config.advertising,
1115                     pl->link_config.pause);
1116
1117         /* Modern PCS-based method; update the advert at the PCS, and
1118          * restart negotiation if the pcs_config() helper indicates that
1119          * the programmed advertisement has changed.
1120          */
1121         ret = pl->pcs->ops->pcs_config(pl->pcs, pl->cur_link_an_mode,
1122                                        pl->link_config.interface,
1123                                        pl->link_config.advertising,
1124                                        !!(pl->link_config.pause &
1125                                           MLO_PAUSE_AN));
1126         if (ret < 0)
1127                 return ret;
1128
1129         if (ret > 0)
1130                 phylink_mac_pcs_an_restart(pl);
1131
1132         return 0;
1133 }
1134
1135 static void phylink_mac_pcs_get_state(struct phylink *pl,
1136                                       struct phylink_link_state *state)
1137 {
1138         linkmode_copy(state->advertising, pl->link_config.advertising);
1139         linkmode_zero(state->lp_advertising);
1140         state->interface = pl->link_config.interface;
1141         state->an_enabled = pl->link_config.an_enabled;
1142         state->rate_matching = pl->link_config.rate_matching;
1143         if (state->an_enabled) {
1144                 state->speed = SPEED_UNKNOWN;
1145                 state->duplex = DUPLEX_UNKNOWN;
1146                 state->pause = MLO_PAUSE_NONE;
1147         } else {
1148                 state->speed =  pl->link_config.speed;
1149                 state->duplex = pl->link_config.duplex;
1150                 state->pause = pl->link_config.pause;
1151         }
1152         state->an_complete = 0;
1153         state->link = 1;
1154
1155         if (pl->pcs)
1156                 pl->pcs->ops->pcs_get_state(pl->pcs, state);
1157         else if (pl->mac_ops->mac_pcs_get_state &&
1158                  pl->config->legacy_pre_march2020)
1159                 pl->mac_ops->mac_pcs_get_state(pl->config, state);
1160         else
1161                 state->link = 0;
1162 }
1163
1164 /* The fixed state is... fixed except for the link state,
1165  * which may be determined by a GPIO or a callback.
1166  */
1167 static void phylink_get_fixed_state(struct phylink *pl,
1168                                     struct phylink_link_state *state)
1169 {
1170         *state = pl->link_config;
1171         if (pl->config->get_fixed_state)
1172                 pl->config->get_fixed_state(pl->config, state);
1173         else if (pl->link_gpio)
1174                 state->link = !!gpiod_get_value_cansleep(pl->link_gpio);
1175
1176         phylink_resolve_flow(state);
1177 }
1178
1179 static void phylink_mac_initial_config(struct phylink *pl, bool force_restart)
1180 {
1181         struct phylink_link_state link_state;
1182
1183         switch (pl->cur_link_an_mode) {
1184         case MLO_AN_PHY:
1185                 link_state = pl->phy_state;
1186                 break;
1187
1188         case MLO_AN_FIXED:
1189                 phylink_get_fixed_state(pl, &link_state);
1190                 break;
1191
1192         case MLO_AN_INBAND:
1193                 link_state = pl->link_config;
1194                 if (link_state.interface == PHY_INTERFACE_MODE_SGMII)
1195                         link_state.pause = MLO_PAUSE_NONE;
1196                 break;
1197
1198         default: /* can't happen */
1199                 return;
1200         }
1201
1202         link_state.link = false;
1203
1204         phylink_apply_manual_flow(pl, &link_state);
1205         phylink_major_config(pl, force_restart, &link_state);
1206 }
1207
1208 static const char *phylink_pause_to_str(int pause)
1209 {
1210         switch (pause & MLO_PAUSE_TXRX_MASK) {
1211         case MLO_PAUSE_TX | MLO_PAUSE_RX:
1212                 return "rx/tx";
1213         case MLO_PAUSE_TX:
1214                 return "tx";
1215         case MLO_PAUSE_RX:
1216                 return "rx";
1217         default:
1218                 return "off";
1219         }
1220 }
1221
1222 static void phylink_link_up(struct phylink *pl,
1223                             struct phylink_link_state link_state)
1224 {
1225         struct net_device *ndev = pl->netdev;
1226         int speed, duplex;
1227         bool rx_pause;
1228
1229         speed = link_state.speed;
1230         duplex = link_state.duplex;
1231         rx_pause = !!(link_state.pause & MLO_PAUSE_RX);
1232
1233         switch (link_state.rate_matching) {
1234         case RATE_MATCH_PAUSE:
1235                 /* The PHY is doing rate matchion from the media rate (in
1236                  * the link_state) to the interface speed, and will send
1237                  * pause frames to the MAC to limit its transmission speed.
1238                  */
1239                 speed = phylink_interface_max_speed(link_state.interface);
1240                 duplex = DUPLEX_FULL;
1241                 rx_pause = true;
1242                 break;
1243
1244         case RATE_MATCH_CRS:
1245                 /* The PHY is doing rate matchion from the media rate (in
1246                  * the link_state) to the interface speed, and will cause
1247                  * collisions to the MAC to limit its transmission speed.
1248                  */
1249                 speed = phylink_interface_max_speed(link_state.interface);
1250                 duplex = DUPLEX_HALF;
1251                 break;
1252         }
1253
1254         pl->cur_interface = link_state.interface;
1255
1256         if (pl->pcs && pl->pcs->ops->pcs_link_up)
1257                 pl->pcs->ops->pcs_link_up(pl->pcs, pl->cur_link_an_mode,
1258                                           pl->cur_interface, speed, duplex);
1259
1260         pl->mac_ops->mac_link_up(pl->config, pl->phydev, pl->cur_link_an_mode,
1261                                  pl->cur_interface, speed, duplex,
1262                                  !!(link_state.pause & MLO_PAUSE_TX), rx_pause);
1263
1264         if (ndev)
1265                 netif_carrier_on(ndev);
1266
1267         phylink_info(pl,
1268                      "Link is Up - %s/%s - flow control %s\n",
1269                      phy_speed_to_str(link_state.speed),
1270                      phy_duplex_to_str(link_state.duplex),
1271                      phylink_pause_to_str(link_state.pause));
1272 }
1273
1274 static void phylink_link_down(struct phylink *pl)
1275 {
1276         struct net_device *ndev = pl->netdev;
1277
1278         if (ndev)
1279                 netif_carrier_off(ndev);
1280         pl->mac_ops->mac_link_down(pl->config, pl->cur_link_an_mode,
1281                                    pl->cur_interface);
1282         phylink_info(pl, "Link is Down\n");
1283 }
1284
1285 static void phylink_resolve(struct work_struct *w)
1286 {
1287         struct phylink *pl = container_of(w, struct phylink, resolve);
1288         struct phylink_link_state link_state;
1289         struct net_device *ndev = pl->netdev;
1290         bool mac_config = false;
1291         bool retrigger = false;
1292         bool cur_link_state;
1293
1294         mutex_lock(&pl->state_mutex);
1295         if (pl->netdev)
1296                 cur_link_state = netif_carrier_ok(ndev);
1297         else
1298                 cur_link_state = pl->old_link_state;
1299
1300         if (pl->phylink_disable_state) {
1301                 pl->mac_link_dropped = false;
1302                 link_state.link = false;
1303         } else if (pl->mac_link_dropped) {
1304                 link_state.link = false;
1305                 retrigger = true;
1306         } else {
1307                 switch (pl->cur_link_an_mode) {
1308                 case MLO_AN_PHY:
1309                         link_state = pl->phy_state;
1310                         phylink_apply_manual_flow(pl, &link_state);
1311                         mac_config = link_state.link;
1312                         break;
1313
1314                 case MLO_AN_FIXED:
1315                         phylink_get_fixed_state(pl, &link_state);
1316                         mac_config = link_state.link;
1317                         break;
1318
1319                 case MLO_AN_INBAND:
1320                         phylink_mac_pcs_get_state(pl, &link_state);
1321
1322                         /* The PCS may have a latching link-fail indicator.
1323                          * If the link was up, bring the link down and
1324                          * re-trigger the resolve. Otherwise, re-read the
1325                          * PCS state to get the current status of the link.
1326                          */
1327                         if (!link_state.link) {
1328                                 if (cur_link_state)
1329                                         retrigger = true;
1330                                 else
1331                                         phylink_mac_pcs_get_state(pl,
1332                                                                   &link_state);
1333                         }
1334
1335                         /* If we have a phy, the "up" state is the union of
1336                          * both the PHY and the MAC
1337                          */
1338                         if (pl->phydev)
1339                                 link_state.link &= pl->phy_state.link;
1340
1341                         /* Only update if the PHY link is up */
1342                         if (pl->phydev && pl->phy_state.link) {
1343                                 /* If the interface has changed, force a
1344                                  * link down event if the link isn't already
1345                                  * down, and re-resolve.
1346                                  */
1347                                 if (link_state.interface !=
1348                                     pl->phy_state.interface) {
1349                                         retrigger = true;
1350                                         link_state.link = false;
1351                                 }
1352                                 link_state.interface = pl->phy_state.interface;
1353
1354                                 /* If we are doing rate matching, then the
1355                                  * link speed/duplex comes from the PHY
1356                                  */
1357                                 if (pl->phy_state.rate_matching) {
1358                                         link_state.rate_matching =
1359                                                 pl->phy_state.rate_matching;
1360                                         link_state.speed = pl->phy_state.speed;
1361                                         link_state.duplex =
1362                                                 pl->phy_state.duplex;
1363                                 }
1364
1365                                 /* If we have a PHY, we need to update with
1366                                  * the PHY flow control bits.
1367                                  */
1368                                 link_state.pause = pl->phy_state.pause;
1369                                 mac_config = true;
1370                         }
1371                         phylink_apply_manual_flow(pl, &link_state);
1372                         break;
1373                 }
1374         }
1375
1376         if (mac_config) {
1377                 if (link_state.interface != pl->link_config.interface) {
1378                         /* The interface has changed, force the link down and
1379                          * then reconfigure.
1380                          */
1381                         if (cur_link_state) {
1382                                 phylink_link_down(pl);
1383                                 cur_link_state = false;
1384                         }
1385                         phylink_major_config(pl, false, &link_state);
1386                         pl->link_config.interface = link_state.interface;
1387                 } else if (!pl->pcs && pl->config->legacy_pre_march2020) {
1388                         /* The interface remains unchanged, only the speed,
1389                          * duplex or pause settings have changed. Call the
1390                          * old mac_config() method to configure the MAC/PCS
1391                          * only if we do not have a legacy MAC driver.
1392                          */
1393                         phylink_mac_config(pl, &link_state);
1394                 }
1395         }
1396
1397         if (link_state.link != cur_link_state) {
1398                 pl->old_link_state = link_state.link;
1399                 if (!link_state.link)
1400                         phylink_link_down(pl);
1401                 else
1402                         phylink_link_up(pl, link_state);
1403         }
1404         if (!link_state.link && retrigger) {
1405                 pl->mac_link_dropped = false;
1406                 queue_work(system_power_efficient_wq, &pl->resolve);
1407         }
1408         mutex_unlock(&pl->state_mutex);
1409 }
1410
1411 static void phylink_run_resolve(struct phylink *pl)
1412 {
1413         if (!pl->phylink_disable_state)
1414                 queue_work(system_power_efficient_wq, &pl->resolve);
1415 }
1416
1417 static void phylink_run_resolve_and_disable(struct phylink *pl, int bit)
1418 {
1419         unsigned long state = pl->phylink_disable_state;
1420
1421         set_bit(bit, &pl->phylink_disable_state);
1422         if (state == 0) {
1423                 queue_work(system_power_efficient_wq, &pl->resolve);
1424                 flush_work(&pl->resolve);
1425         }
1426 }
1427
1428 static void phylink_enable_and_run_resolve(struct phylink *pl, int bit)
1429 {
1430         clear_bit(bit, &pl->phylink_disable_state);
1431         phylink_run_resolve(pl);
1432 }
1433
1434 static void phylink_fixed_poll(struct timer_list *t)
1435 {
1436         struct phylink *pl = container_of(t, struct phylink, link_poll);
1437
1438         mod_timer(t, jiffies + HZ);
1439
1440         phylink_run_resolve(pl);
1441 }
1442
1443 static const struct sfp_upstream_ops sfp_phylink_ops;
1444
1445 static int phylink_register_sfp(struct phylink *pl,
1446                                 struct fwnode_handle *fwnode)
1447 {
1448         struct sfp_bus *bus;
1449         int ret;
1450
1451         if (!fwnode)
1452                 return 0;
1453
1454         bus = sfp_bus_find_fwnode(fwnode);
1455         if (IS_ERR(bus)) {
1456                 phylink_err(pl, "unable to attach SFP bus: %pe\n", bus);
1457                 return PTR_ERR(bus);
1458         }
1459
1460         pl->sfp_bus = bus;
1461
1462         ret = sfp_bus_add_upstream(bus, pl, &sfp_phylink_ops);
1463         sfp_bus_put(bus);
1464
1465         return ret;
1466 }
1467
1468 /**
1469  * phylink_create() - create a phylink instance
1470  * @config: a pointer to the target &struct phylink_config
1471  * @fwnode: a pointer to a &struct fwnode_handle describing the network
1472  *      interface
1473  * @iface: the desired link mode defined by &typedef phy_interface_t
1474  * @mac_ops: a pointer to a &struct phylink_mac_ops for the MAC.
1475  *
1476  * Create a new phylink instance, and parse the link parameters found in @np.
1477  * This will parse in-band modes, fixed-link or SFP configuration.
1478  *
1479  * Note: the rtnl lock must not be held when calling this function.
1480  *
1481  * Returns a pointer to a &struct phylink, or an error-pointer value. Users
1482  * must use IS_ERR() to check for errors from this function.
1483  */
1484 struct phylink *phylink_create(struct phylink_config *config,
1485                                struct fwnode_handle *fwnode,
1486                                phy_interface_t iface,
1487                                const struct phylink_mac_ops *mac_ops)
1488 {
1489         bool using_mac_select_pcs = false;
1490         struct phylink *pl;
1491         int ret;
1492
1493         if (mac_ops->mac_select_pcs &&
1494             mac_ops->mac_select_pcs(config, PHY_INTERFACE_MODE_NA) !=
1495               ERR_PTR(-EOPNOTSUPP))
1496                 using_mac_select_pcs = true;
1497
1498         /* Validate the supplied configuration */
1499         if (using_mac_select_pcs &&
1500             phy_interface_empty(config->supported_interfaces)) {
1501                 dev_err(config->dev,
1502                         "phylink: error: empty supported_interfaces but mac_select_pcs() method present\n");
1503                 return ERR_PTR(-EINVAL);
1504         }
1505
1506         pl = kzalloc(sizeof(*pl), GFP_KERNEL);
1507         if (!pl)
1508                 return ERR_PTR(-ENOMEM);
1509
1510         mutex_init(&pl->state_mutex);
1511         INIT_WORK(&pl->resolve, phylink_resolve);
1512
1513         pl->config = config;
1514         if (config->type == PHYLINK_NETDEV) {
1515                 pl->netdev = to_net_dev(config->dev);
1516         } else if (config->type == PHYLINK_DEV) {
1517                 pl->dev = config->dev;
1518         } else {
1519                 kfree(pl);
1520                 return ERR_PTR(-EINVAL);
1521         }
1522
1523         pl->using_mac_select_pcs = using_mac_select_pcs;
1524         pl->phy_state.interface = iface;
1525         pl->link_interface = iface;
1526         if (iface == PHY_INTERFACE_MODE_MOCA)
1527                 pl->link_port = PORT_BNC;
1528         else
1529                 pl->link_port = PORT_MII;
1530         pl->link_config.interface = iface;
1531         pl->link_config.pause = MLO_PAUSE_AN;
1532         pl->link_config.speed = SPEED_UNKNOWN;
1533         pl->link_config.duplex = DUPLEX_UNKNOWN;
1534         pl->link_config.an_enabled = true;
1535         pl->mac_ops = mac_ops;
1536         __set_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state);
1537         timer_setup(&pl->link_poll, phylink_fixed_poll, 0);
1538
1539         bitmap_fill(pl->supported, __ETHTOOL_LINK_MODE_MASK_NBITS);
1540         linkmode_copy(pl->link_config.advertising, pl->supported);
1541         phylink_validate(pl, pl->supported, &pl->link_config);
1542
1543         ret = phylink_parse_mode(pl, fwnode);
1544         if (ret < 0) {
1545                 kfree(pl);
1546                 return ERR_PTR(ret);
1547         }
1548
1549         if (pl->cfg_link_an_mode == MLO_AN_FIXED) {
1550                 ret = phylink_parse_fixedlink(pl, fwnode);
1551                 if (ret < 0) {
1552                         kfree(pl);
1553                         return ERR_PTR(ret);
1554                 }
1555         }
1556
1557         pl->cur_link_an_mode = pl->cfg_link_an_mode;
1558
1559         ret = phylink_register_sfp(pl, fwnode);
1560         if (ret < 0) {
1561                 kfree(pl);
1562                 return ERR_PTR(ret);
1563         }
1564
1565         return pl;
1566 }
1567 EXPORT_SYMBOL_GPL(phylink_create);
1568
1569 /**
1570  * phylink_destroy() - cleanup and destroy the phylink instance
1571  * @pl: a pointer to a &struct phylink returned from phylink_create()
1572  *
1573  * Destroy a phylink instance. Any PHY that has been attached must have been
1574  * cleaned up via phylink_disconnect_phy() prior to calling this function.
1575  *
1576  * Note: the rtnl lock must not be held when calling this function.
1577  */
1578 void phylink_destroy(struct phylink *pl)
1579 {
1580         sfp_bus_del_upstream(pl->sfp_bus);
1581         if (pl->link_gpio)
1582                 gpiod_put(pl->link_gpio);
1583
1584         cancel_work_sync(&pl->resolve);
1585         kfree(pl);
1586 }
1587 EXPORT_SYMBOL_GPL(phylink_destroy);
1588
1589 /**
1590  * phylink_expects_phy() - Determine if phylink expects a phy to be attached
1591  * @pl: a pointer to a &struct phylink returned from phylink_create()
1592  *
1593  * When using fixed-link mode, or in-band mode with 1000base-X or 2500base-X,
1594  * no PHY is needed.
1595  *
1596  * Returns true if phylink will be expecting a PHY.
1597  */
1598 bool phylink_expects_phy(struct phylink *pl)
1599 {
1600         if (pl->cfg_link_an_mode == MLO_AN_FIXED ||
1601             (pl->cfg_link_an_mode == MLO_AN_INBAND &&
1602              phy_interface_mode_is_8023z(pl->link_config.interface)))
1603                 return false;
1604         return true;
1605 }
1606 EXPORT_SYMBOL_GPL(phylink_expects_phy);
1607
1608 static void phylink_phy_change(struct phy_device *phydev, bool up)
1609 {
1610         struct phylink *pl = phydev->phylink;
1611         bool tx_pause, rx_pause;
1612
1613         phy_get_pause(phydev, &tx_pause, &rx_pause);
1614
1615         mutex_lock(&pl->state_mutex);
1616         pl->phy_state.speed = phydev->speed;
1617         pl->phy_state.duplex = phydev->duplex;
1618         pl->phy_state.rate_matching = phydev->rate_matching;
1619         pl->phy_state.pause = MLO_PAUSE_NONE;
1620         if (tx_pause)
1621                 pl->phy_state.pause |= MLO_PAUSE_TX;
1622         if (rx_pause)
1623                 pl->phy_state.pause |= MLO_PAUSE_RX;
1624         pl->phy_state.interface = phydev->interface;
1625         pl->phy_state.link = up;
1626         mutex_unlock(&pl->state_mutex);
1627
1628         phylink_run_resolve(pl);
1629
1630         phylink_dbg(pl, "phy link %s %s/%s/%s/%s/%s\n", up ? "up" : "down",
1631                     phy_modes(phydev->interface),
1632                     phy_speed_to_str(phydev->speed),
1633                     phy_duplex_to_str(phydev->duplex),
1634                     phy_rate_matching_to_str(phydev->rate_matching),
1635                     phylink_pause_to_str(pl->phy_state.pause));
1636 }
1637
1638 static int phylink_bringup_phy(struct phylink *pl, struct phy_device *phy,
1639                                phy_interface_t interface)
1640 {
1641         struct phylink_link_state config;
1642         __ETHTOOL_DECLARE_LINK_MODE_MASK(supported);
1643         char *irq_str;
1644         int ret;
1645
1646         /*
1647          * This is the new way of dealing with flow control for PHYs,
1648          * as described by Timur Tabi in commit 529ed1275263 ("net: phy:
1649          * phy drivers should not set SUPPORTED_[Asym_]Pause") except
1650          * using our validate call to the MAC, we rely upon the MAC
1651          * clearing the bits from both supported and advertising fields.
1652          */
1653         phy_support_asym_pause(phy);
1654
1655         memset(&config, 0, sizeof(config));
1656         linkmode_copy(supported, phy->supported);
1657         linkmode_copy(config.advertising, phy->advertising);
1658
1659         /* Check whether we would use rate matching for the proposed interface
1660          * mode.
1661          */
1662         config.rate_matching = phy_get_rate_matching(phy, interface);
1663
1664         /* Clause 45 PHYs may switch their Serdes lane between, e.g. 10GBASE-R,
1665          * 5GBASE-R, 2500BASE-X and SGMII if they are not using rate matching.
1666          * For some interface modes (e.g. RXAUI, XAUI and USXGMII) switching
1667          * their Serdes is either unnecessary or not reasonable.
1668          *
1669          * For these which switch interface modes, we really need to know which
1670          * interface modes the PHY supports to properly work out which ethtool
1671          * linkmodes can be supported. For now, as a work-around, we validate
1672          * against all interface modes, which may lead to more ethtool link
1673          * modes being advertised than are actually supported.
1674          */
1675         if (phy->is_c45 && config.rate_matching == RATE_MATCH_NONE &&
1676             interface != PHY_INTERFACE_MODE_RXAUI &&
1677             interface != PHY_INTERFACE_MODE_XAUI &&
1678             interface != PHY_INTERFACE_MODE_USXGMII)
1679                 config.interface = PHY_INTERFACE_MODE_NA;
1680         else
1681                 config.interface = interface;
1682
1683         ret = phylink_validate(pl, supported, &config);
1684         if (ret) {
1685                 phylink_warn(pl, "validation of %s with support %*pb and advertisement %*pb failed: %pe\n",
1686                              phy_modes(config.interface),
1687                              __ETHTOOL_LINK_MODE_MASK_NBITS, phy->supported,
1688                              __ETHTOOL_LINK_MODE_MASK_NBITS, config.advertising,
1689                              ERR_PTR(ret));
1690                 return ret;
1691         }
1692
1693         phy->phylink = pl;
1694         phy->phy_link_change = phylink_phy_change;
1695
1696         irq_str = phy_attached_info_irq(phy);
1697         phylink_info(pl,
1698                      "PHY [%s] driver [%s] (irq=%s)\n",
1699                      dev_name(&phy->mdio.dev), phy->drv->name, irq_str);
1700         kfree(irq_str);
1701
1702         mutex_lock(&phy->lock);
1703         mutex_lock(&pl->state_mutex);
1704         pl->phydev = phy;
1705         pl->phy_state.interface = interface;
1706         pl->phy_state.pause = MLO_PAUSE_NONE;
1707         pl->phy_state.speed = SPEED_UNKNOWN;
1708         pl->phy_state.duplex = DUPLEX_UNKNOWN;
1709         pl->phy_state.rate_matching = RATE_MATCH_NONE;
1710         linkmode_copy(pl->supported, supported);
1711         linkmode_copy(pl->link_config.advertising, config.advertising);
1712
1713         /* Restrict the phy advertisement according to the MAC support. */
1714         linkmode_copy(phy->advertising, config.advertising);
1715         mutex_unlock(&pl->state_mutex);
1716         mutex_unlock(&phy->lock);
1717
1718         phylink_dbg(pl,
1719                     "phy: %s setting supported %*pb advertising %*pb\n",
1720                     phy_modes(interface),
1721                     __ETHTOOL_LINK_MODE_MASK_NBITS, pl->supported,
1722                     __ETHTOOL_LINK_MODE_MASK_NBITS, phy->advertising);
1723
1724         if (phy_interrupt_is_valid(phy))
1725                 phy_request_interrupt(phy);
1726
1727         if (pl->config->mac_managed_pm)
1728                 phy->mac_managed_pm = true;
1729
1730         return 0;
1731 }
1732
1733 static int phylink_attach_phy(struct phylink *pl, struct phy_device *phy,
1734                               phy_interface_t interface)
1735 {
1736         if (WARN_ON(pl->cfg_link_an_mode == MLO_AN_FIXED ||
1737                     (pl->cfg_link_an_mode == MLO_AN_INBAND &&
1738                      phy_interface_mode_is_8023z(interface) && !pl->sfp_bus)))
1739                 return -EINVAL;
1740
1741         if (pl->phydev)
1742                 return -EBUSY;
1743
1744         return phy_attach_direct(pl->netdev, phy, 0, interface);
1745 }
1746
1747 /**
1748  * phylink_connect_phy() - connect a PHY to the phylink instance
1749  * @pl: a pointer to a &struct phylink returned from phylink_create()
1750  * @phy: a pointer to a &struct phy_device.
1751  *
1752  * Connect @phy to the phylink instance specified by @pl by calling
1753  * phy_attach_direct(). Configure the @phy according to the MAC driver's
1754  * capabilities, start the PHYLIB state machine and enable any interrupts
1755  * that the PHY supports.
1756  *
1757  * This updates the phylink's ethtool supported and advertising link mode
1758  * masks.
1759  *
1760  * Returns 0 on success or a negative errno.
1761  */
1762 int phylink_connect_phy(struct phylink *pl, struct phy_device *phy)
1763 {
1764         int ret;
1765
1766         /* Use PHY device/driver interface */
1767         if (pl->link_interface == PHY_INTERFACE_MODE_NA) {
1768                 pl->link_interface = phy->interface;
1769                 pl->link_config.interface = pl->link_interface;
1770         }
1771
1772         ret = phylink_attach_phy(pl, phy, pl->link_interface);
1773         if (ret < 0)
1774                 return ret;
1775
1776         ret = phylink_bringup_phy(pl, phy, pl->link_config.interface);
1777         if (ret)
1778                 phy_detach(phy);
1779
1780         return ret;
1781 }
1782 EXPORT_SYMBOL_GPL(phylink_connect_phy);
1783
1784 /**
1785  * phylink_of_phy_connect() - connect the PHY specified in the DT mode.
1786  * @pl: a pointer to a &struct phylink returned from phylink_create()
1787  * @dn: a pointer to a &struct device_node.
1788  * @flags: PHY-specific flags to communicate to the PHY device driver
1789  *
1790  * Connect the phy specified in the device node @dn to the phylink instance
1791  * specified by @pl. Actions specified in phylink_connect_phy() will be
1792  * performed.
1793  *
1794  * Returns 0 on success or a negative errno.
1795  */
1796 int phylink_of_phy_connect(struct phylink *pl, struct device_node *dn,
1797                            u32 flags)
1798 {
1799         return phylink_fwnode_phy_connect(pl, of_fwnode_handle(dn), flags);
1800 }
1801 EXPORT_SYMBOL_GPL(phylink_of_phy_connect);
1802
1803 /**
1804  * phylink_fwnode_phy_connect() - connect the PHY specified in the fwnode.
1805  * @pl: a pointer to a &struct phylink returned from phylink_create()
1806  * @fwnode: a pointer to a &struct fwnode_handle.
1807  * @flags: PHY-specific flags to communicate to the PHY device driver
1808  *
1809  * Connect the phy specified @fwnode to the phylink instance specified
1810  * by @pl.
1811  *
1812  * Returns 0 on success or a negative errno.
1813  */
1814 int phylink_fwnode_phy_connect(struct phylink *pl,
1815                                struct fwnode_handle *fwnode,
1816                                u32 flags)
1817 {
1818         struct fwnode_handle *phy_fwnode;
1819         struct phy_device *phy_dev;
1820         int ret;
1821
1822         /* Fixed links and 802.3z are handled without needing a PHY */
1823         if (pl->cfg_link_an_mode == MLO_AN_FIXED ||
1824             (pl->cfg_link_an_mode == MLO_AN_INBAND &&
1825              phy_interface_mode_is_8023z(pl->link_interface)))
1826                 return 0;
1827
1828         phy_fwnode = fwnode_get_phy_node(fwnode);
1829         if (IS_ERR(phy_fwnode)) {
1830                 if (pl->cfg_link_an_mode == MLO_AN_PHY)
1831                         return -ENODEV;
1832                 return 0;
1833         }
1834
1835         phy_dev = fwnode_phy_find_device(phy_fwnode);
1836         /* We're done with the phy_node handle */
1837         fwnode_handle_put(phy_fwnode);
1838         if (!phy_dev)
1839                 return -ENODEV;
1840
1841         /* Use PHY device/driver interface */
1842         if (pl->link_interface == PHY_INTERFACE_MODE_NA) {
1843                 pl->link_interface = phy_dev->interface;
1844                 pl->link_config.interface = pl->link_interface;
1845         }
1846
1847         ret = phy_attach_direct(pl->netdev, phy_dev, flags,
1848                                 pl->link_interface);
1849         phy_device_free(phy_dev);
1850         if (ret)
1851                 return ret;
1852
1853         ret = phylink_bringup_phy(pl, phy_dev, pl->link_config.interface);
1854         if (ret)
1855                 phy_detach(phy_dev);
1856
1857         return ret;
1858 }
1859 EXPORT_SYMBOL_GPL(phylink_fwnode_phy_connect);
1860
1861 /**
1862  * phylink_disconnect_phy() - disconnect any PHY attached to the phylink
1863  *   instance.
1864  * @pl: a pointer to a &struct phylink returned from phylink_create()
1865  *
1866  * Disconnect any current PHY from the phylink instance described by @pl.
1867  */
1868 void phylink_disconnect_phy(struct phylink *pl)
1869 {
1870         struct phy_device *phy;
1871
1872         ASSERT_RTNL();
1873
1874         phy = pl->phydev;
1875         if (phy) {
1876                 mutex_lock(&phy->lock);
1877                 mutex_lock(&pl->state_mutex);
1878                 pl->phydev = NULL;
1879                 mutex_unlock(&pl->state_mutex);
1880                 mutex_unlock(&phy->lock);
1881                 flush_work(&pl->resolve);
1882
1883                 phy_disconnect(phy);
1884         }
1885 }
1886 EXPORT_SYMBOL_GPL(phylink_disconnect_phy);
1887
1888 /**
1889  * phylink_mac_change() - notify phylink of a change in MAC state
1890  * @pl: a pointer to a &struct phylink returned from phylink_create()
1891  * @up: indicates whether the link is currently up.
1892  *
1893  * The MAC driver should call this driver when the state of its link
1894  * changes (eg, link failure, new negotiation results, etc.)
1895  */
1896 void phylink_mac_change(struct phylink *pl, bool up)
1897 {
1898         if (!up)
1899                 pl->mac_link_dropped = true;
1900         phylink_run_resolve(pl);
1901         phylink_dbg(pl, "mac link %s\n", up ? "up" : "down");
1902 }
1903 EXPORT_SYMBOL_GPL(phylink_mac_change);
1904
1905 static irqreturn_t phylink_link_handler(int irq, void *data)
1906 {
1907         struct phylink *pl = data;
1908
1909         phylink_run_resolve(pl);
1910
1911         return IRQ_HANDLED;
1912 }
1913
1914 /**
1915  * phylink_start() - start a phylink instance
1916  * @pl: a pointer to a &struct phylink returned from phylink_create()
1917  *
1918  * Start the phylink instance specified by @pl, configuring the MAC for the
1919  * desired link mode(s) and negotiation style. This should be called from the
1920  * network device driver's &struct net_device_ops ndo_open() method.
1921  */
1922 void phylink_start(struct phylink *pl)
1923 {
1924         bool poll = false;
1925
1926         ASSERT_RTNL();
1927
1928         phylink_info(pl, "configuring for %s/%s link mode\n",
1929                      phylink_an_mode_str(pl->cur_link_an_mode),
1930                      phy_modes(pl->link_config.interface));
1931
1932         /* Always set the carrier off */
1933         if (pl->netdev)
1934                 netif_carrier_off(pl->netdev);
1935
1936         /* Apply the link configuration to the MAC when starting. This allows
1937          * a fixed-link to start with the correct parameters, and also
1938          * ensures that we set the appropriate advertisement for Serdes links.
1939          *
1940          * Restart autonegotiation if using 802.3z to ensure that the link
1941          * parameters are properly negotiated.  This is necessary for DSA
1942          * switches using 802.3z negotiation to ensure they see our modes.
1943          */
1944         phylink_mac_initial_config(pl, true);
1945
1946         phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_STOPPED);
1947
1948         if (pl->cfg_link_an_mode == MLO_AN_FIXED && pl->link_gpio) {
1949                 int irq = gpiod_to_irq(pl->link_gpio);
1950
1951                 if (irq > 0) {
1952                         if (!request_irq(irq, phylink_link_handler,
1953                                          IRQF_TRIGGER_RISING |
1954                                          IRQF_TRIGGER_FALLING,
1955                                          "netdev link", pl))
1956                                 pl->link_irq = irq;
1957                         else
1958                                 irq = 0;
1959                 }
1960                 if (irq <= 0)
1961                         poll = true;
1962         }
1963
1964         switch (pl->cfg_link_an_mode) {
1965         case MLO_AN_FIXED:
1966                 poll |= pl->config->poll_fixed_state;
1967                 break;
1968         case MLO_AN_INBAND:
1969                 if (pl->pcs)
1970                         poll |= pl->pcs->poll;
1971                 break;
1972         }
1973         if (poll)
1974                 mod_timer(&pl->link_poll, jiffies + HZ);
1975         if (pl->phydev)
1976                 phy_start(pl->phydev);
1977         if (pl->sfp_bus)
1978                 sfp_upstream_start(pl->sfp_bus);
1979 }
1980 EXPORT_SYMBOL_GPL(phylink_start);
1981
1982 /**
1983  * phylink_stop() - stop a phylink instance
1984  * @pl: a pointer to a &struct phylink returned from phylink_create()
1985  *
1986  * Stop the phylink instance specified by @pl. This should be called from the
1987  * network device driver's &struct net_device_ops ndo_stop() method.  The
1988  * network device's carrier state should not be changed prior to calling this
1989  * function.
1990  *
1991  * This will synchronously bring down the link if the link is not already
1992  * down (in other words, it will trigger a mac_link_down() method call.)
1993  */
1994 void phylink_stop(struct phylink *pl)
1995 {
1996         ASSERT_RTNL();
1997
1998         if (pl->sfp_bus)
1999                 sfp_upstream_stop(pl->sfp_bus);
2000         if (pl->phydev)
2001                 phy_stop(pl->phydev);
2002         del_timer_sync(&pl->link_poll);
2003         if (pl->link_irq) {
2004                 free_irq(pl->link_irq, pl);
2005                 pl->link_irq = 0;
2006         }
2007
2008         phylink_run_resolve_and_disable(pl, PHYLINK_DISABLE_STOPPED);
2009 }
2010 EXPORT_SYMBOL_GPL(phylink_stop);
2011
2012 /**
2013  * phylink_suspend() - handle a network device suspend event
2014  * @pl: a pointer to a &struct phylink returned from phylink_create()
2015  * @mac_wol: true if the MAC needs to receive packets for Wake-on-Lan
2016  *
2017  * Handle a network device suspend event. There are several cases:
2018  *
2019  * - If Wake-on-Lan is not active, we can bring down the link between
2020  *   the MAC and PHY by calling phylink_stop().
2021  * - If Wake-on-Lan is active, and being handled only by the PHY, we
2022  *   can also bring down the link between the MAC and PHY.
2023  * - If Wake-on-Lan is active, but being handled by the MAC, the MAC
2024  *   still needs to receive packets, so we can not bring the link down.
2025  */
2026 void phylink_suspend(struct phylink *pl, bool mac_wol)
2027 {
2028         ASSERT_RTNL();
2029
2030         if (mac_wol && (!pl->netdev || pl->netdev->wol_enabled)) {
2031                 /* Wake-on-Lan enabled, MAC handling */
2032                 mutex_lock(&pl->state_mutex);
2033
2034                 /* Stop the resolver bringing the link up */
2035                 __set_bit(PHYLINK_DISABLE_MAC_WOL, &pl->phylink_disable_state);
2036
2037                 /* Disable the carrier, to prevent transmit timeouts,
2038                  * but one would hope all packets have been sent. This
2039                  * also means phylink_resolve() will do nothing.
2040                  */
2041                 if (pl->netdev)
2042                         netif_carrier_off(pl->netdev);
2043                 else
2044                         pl->old_link_state = false;
2045
2046                 /* We do not call mac_link_down() here as we want the
2047                  * link to remain up to receive the WoL packets.
2048                  */
2049                 mutex_unlock(&pl->state_mutex);
2050         } else {
2051                 phylink_stop(pl);
2052         }
2053 }
2054 EXPORT_SYMBOL_GPL(phylink_suspend);
2055
2056 /**
2057  * phylink_resume() - handle a network device resume event
2058  * @pl: a pointer to a &struct phylink returned from phylink_create()
2059  *
2060  * Undo the effects of phylink_suspend(), returning the link to an
2061  * operational state.
2062  */
2063 void phylink_resume(struct phylink *pl)
2064 {
2065         ASSERT_RTNL();
2066
2067         if (test_bit(PHYLINK_DISABLE_MAC_WOL, &pl->phylink_disable_state)) {
2068                 /* Wake-on-Lan enabled, MAC handling */
2069
2070                 /* Call mac_link_down() so we keep the overall state balanced.
2071                  * Do this under the state_mutex lock for consistency. This
2072                  * will cause a "Link Down" message to be printed during
2073                  * resume, which is harmless - the true link state will be
2074                  * printed when we run a resolve.
2075                  */
2076                 mutex_lock(&pl->state_mutex);
2077                 phylink_link_down(pl);
2078                 mutex_unlock(&pl->state_mutex);
2079
2080                 /* Re-apply the link parameters so that all the settings get
2081                  * restored to the MAC.
2082                  */
2083                 phylink_mac_initial_config(pl, true);
2084
2085                 /* Re-enable and re-resolve the link parameters */
2086                 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_MAC_WOL);
2087         } else {
2088                 phylink_start(pl);
2089         }
2090 }
2091 EXPORT_SYMBOL_GPL(phylink_resume);
2092
2093 /**
2094  * phylink_ethtool_get_wol() - get the wake on lan parameters for the PHY
2095  * @pl: a pointer to a &struct phylink returned from phylink_create()
2096  * @wol: a pointer to &struct ethtool_wolinfo to hold the read parameters
2097  *
2098  * Read the wake on lan parameters from the PHY attached to the phylink
2099  * instance specified by @pl. If no PHY is currently attached, report no
2100  * support for wake on lan.
2101  */
2102 void phylink_ethtool_get_wol(struct phylink *pl, struct ethtool_wolinfo *wol)
2103 {
2104         ASSERT_RTNL();
2105
2106         wol->supported = 0;
2107         wol->wolopts = 0;
2108
2109         if (pl->phydev)
2110                 phy_ethtool_get_wol(pl->phydev, wol);
2111 }
2112 EXPORT_SYMBOL_GPL(phylink_ethtool_get_wol);
2113
2114 /**
2115  * phylink_ethtool_set_wol() - set wake on lan parameters
2116  * @pl: a pointer to a &struct phylink returned from phylink_create()
2117  * @wol: a pointer to &struct ethtool_wolinfo for the desired parameters
2118  *
2119  * Set the wake on lan parameters for the PHY attached to the phylink
2120  * instance specified by @pl. If no PHY is attached, returns %EOPNOTSUPP
2121  * error.
2122  *
2123  * Returns zero on success or negative errno code.
2124  */
2125 int phylink_ethtool_set_wol(struct phylink *pl, struct ethtool_wolinfo *wol)
2126 {
2127         int ret = -EOPNOTSUPP;
2128
2129         ASSERT_RTNL();
2130
2131         if (pl->phydev)
2132                 ret = phy_ethtool_set_wol(pl->phydev, wol);
2133
2134         return ret;
2135 }
2136 EXPORT_SYMBOL_GPL(phylink_ethtool_set_wol);
2137
2138 static void phylink_merge_link_mode(unsigned long *dst, const unsigned long *b)
2139 {
2140         __ETHTOOL_DECLARE_LINK_MODE_MASK(mask);
2141
2142         linkmode_zero(mask);
2143         phylink_set_port_modes(mask);
2144
2145         linkmode_and(dst, dst, mask);
2146         linkmode_or(dst, dst, b);
2147 }
2148
2149 static void phylink_get_ksettings(const struct phylink_link_state *state,
2150                                   struct ethtool_link_ksettings *kset)
2151 {
2152         phylink_merge_link_mode(kset->link_modes.advertising, state->advertising);
2153         linkmode_copy(kset->link_modes.lp_advertising, state->lp_advertising);
2154         if (kset->base.rate_matching == RATE_MATCH_NONE) {
2155                 kset->base.speed = state->speed;
2156                 kset->base.duplex = state->duplex;
2157         }
2158         kset->base.autoneg = state->an_enabled ? AUTONEG_ENABLE :
2159                                 AUTONEG_DISABLE;
2160 }
2161
2162 /**
2163  * phylink_ethtool_ksettings_get() - get the current link settings
2164  * @pl: a pointer to a &struct phylink returned from phylink_create()
2165  * @kset: a pointer to a &struct ethtool_link_ksettings to hold link settings
2166  *
2167  * Read the current link settings for the phylink instance specified by @pl.
2168  * This will be the link settings read from the MAC, PHY or fixed link
2169  * settings depending on the current negotiation mode.
2170  */
2171 int phylink_ethtool_ksettings_get(struct phylink *pl,
2172                                   struct ethtool_link_ksettings *kset)
2173 {
2174         struct phylink_link_state link_state;
2175
2176         ASSERT_RTNL();
2177
2178         if (pl->phydev)
2179                 phy_ethtool_ksettings_get(pl->phydev, kset);
2180         else
2181                 kset->base.port = pl->link_port;
2182
2183         linkmode_copy(kset->link_modes.supported, pl->supported);
2184
2185         switch (pl->cur_link_an_mode) {
2186         case MLO_AN_FIXED:
2187                 /* We are using fixed settings. Report these as the
2188                  * current link settings - and note that these also
2189                  * represent the supported speeds/duplex/pause modes.
2190                  */
2191                 phylink_get_fixed_state(pl, &link_state);
2192                 phylink_get_ksettings(&link_state, kset);
2193                 break;
2194
2195         case MLO_AN_INBAND:
2196                 /* If there is a phy attached, then use the reported
2197                  * settings from the phy with no modification.
2198                  */
2199                 if (pl->phydev)
2200                         break;
2201
2202                 phylink_mac_pcs_get_state(pl, &link_state);
2203
2204                 /* The MAC is reporting the link results from its own PCS
2205                  * layer via in-band status. Report these as the current
2206                  * link settings.
2207                  */
2208                 phylink_get_ksettings(&link_state, kset);
2209                 break;
2210         }
2211
2212         return 0;
2213 }
2214 EXPORT_SYMBOL_GPL(phylink_ethtool_ksettings_get);
2215
2216 /**
2217  * phylink_ethtool_ksettings_set() - set the link settings
2218  * @pl: a pointer to a &struct phylink returned from phylink_create()
2219  * @kset: a pointer to a &struct ethtool_link_ksettings for the desired modes
2220  */
2221 int phylink_ethtool_ksettings_set(struct phylink *pl,
2222                                   const struct ethtool_link_ksettings *kset)
2223 {
2224         __ETHTOOL_DECLARE_LINK_MODE_MASK(support);
2225         struct phylink_link_state config;
2226         const struct phy_setting *s;
2227
2228         ASSERT_RTNL();
2229
2230         if (pl->phydev) {
2231                 /* We can rely on phylib for this update; we also do not need
2232                  * to update the pl->link_config settings:
2233                  * - the configuration returned via ksettings_get() will come
2234                  *   from phylib whenever a PHY is present.
2235                  * - link_config.interface will be updated by the PHY calling
2236                  *   back via phylink_phy_change() and a subsequent resolve.
2237                  * - initial link configuration for PHY mode comes from the
2238                  *   last phy state updated via phylink_phy_change().
2239                  * - other configuration changes (e.g. pause modes) are
2240                  *   performed directly via phylib.
2241                  * - if in in-band mode with a PHY, the link configuration
2242                  *   is passed on the link from the PHY, and all of
2243                  *   link_config.{speed,duplex,an_enabled,pause} are not used.
2244                  * - the only possible use would be link_config.advertising
2245                  *   pause modes when in 1000base-X mode with a PHY, but in
2246                  *   the presence of a PHY, this should not be changed as that
2247                  *   should be determined from the media side advertisement.
2248                  */
2249                 return phy_ethtool_ksettings_set(pl->phydev, kset);
2250         }
2251
2252         config = pl->link_config;
2253
2254         /* Mask out unsupported advertisements */
2255         linkmode_and(config.advertising, kset->link_modes.advertising,
2256                      pl->supported);
2257
2258         /* FIXME: should we reject autoneg if phy/mac does not support it? */
2259         switch (kset->base.autoneg) {
2260         case AUTONEG_DISABLE:
2261                 /* Autonegotiation disabled, select a suitable speed and
2262                  * duplex.
2263                  */
2264                 s = phy_lookup_setting(kset->base.speed, kset->base.duplex,
2265                                        pl->supported, false);
2266                 if (!s)
2267                         return -EINVAL;
2268
2269                 /* If we have a fixed link, refuse to change link parameters.
2270                  * If the link parameters match, accept them but do nothing.
2271                  */
2272                 if (pl->cur_link_an_mode == MLO_AN_FIXED) {
2273                         if (s->speed != pl->link_config.speed ||
2274                             s->duplex != pl->link_config.duplex)
2275                                 return -EINVAL;
2276                         return 0;
2277                 }
2278
2279                 config.speed = s->speed;
2280                 config.duplex = s->duplex;
2281                 break;
2282
2283         case AUTONEG_ENABLE:
2284                 /* If we have a fixed link, allow autonegotiation (since that
2285                  * is our default case) but do not allow the advertisement to
2286                  * be changed. If the advertisement matches, simply return.
2287                  */
2288                 if (pl->cur_link_an_mode == MLO_AN_FIXED) {
2289                         if (!linkmode_equal(config.advertising,
2290                                             pl->link_config.advertising))
2291                                 return -EINVAL;
2292                         return 0;
2293                 }
2294
2295                 config.speed = SPEED_UNKNOWN;
2296                 config.duplex = DUPLEX_UNKNOWN;
2297                 break;
2298
2299         default:
2300                 return -EINVAL;
2301         }
2302
2303         /* We have ruled out the case with a PHY attached, and the
2304          * fixed-link cases.  All that is left are in-band links.
2305          */
2306         config.an_enabled = kset->base.autoneg == AUTONEG_ENABLE;
2307         linkmode_mod_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, config.advertising,
2308                          config.an_enabled);
2309
2310         /* If this link is with an SFP, ensure that changes to advertised modes
2311          * also cause the associated interface to be selected such that the
2312          * link can be configured correctly.
2313          */
2314         if (pl->sfp_bus) {
2315                 config.interface = sfp_select_interface(pl->sfp_bus,
2316                                                         config.advertising);
2317                 if (config.interface == PHY_INTERFACE_MODE_NA) {
2318                         phylink_err(pl,
2319                                     "selection of interface failed, advertisement %*pb\n",
2320                                     __ETHTOOL_LINK_MODE_MASK_NBITS,
2321                                     config.advertising);
2322                         return -EINVAL;
2323                 }
2324
2325                 /* Revalidate with the selected interface */
2326                 linkmode_copy(support, pl->supported);
2327                 if (phylink_validate(pl, support, &config)) {
2328                         phylink_err(pl, "validation of %s/%s with support %*pb failed\n",
2329                                     phylink_an_mode_str(pl->cur_link_an_mode),
2330                                     phy_modes(config.interface),
2331                                     __ETHTOOL_LINK_MODE_MASK_NBITS, support);
2332                         return -EINVAL;
2333                 }
2334         } else {
2335                 /* Validate without changing the current supported mask. */
2336                 linkmode_copy(support, pl->supported);
2337                 if (phylink_validate(pl, support, &config))
2338                         return -EINVAL;
2339         }
2340
2341         /* If autonegotiation is enabled, we must have an advertisement */
2342         if (config.an_enabled && phylink_is_empty_linkmode(config.advertising))
2343                 return -EINVAL;
2344
2345         mutex_lock(&pl->state_mutex);
2346         pl->link_config.speed = config.speed;
2347         pl->link_config.duplex = config.duplex;
2348         pl->link_config.an_enabled = config.an_enabled;
2349
2350         if (pl->link_config.interface != config.interface) {
2351                 /* The interface changed, e.g. 1000base-X <-> 2500base-X */
2352                 /* We need to force the link down, then change the interface */
2353                 if (pl->old_link_state) {
2354                         phylink_link_down(pl);
2355                         pl->old_link_state = false;
2356                 }
2357                 if (!test_bit(PHYLINK_DISABLE_STOPPED,
2358                               &pl->phylink_disable_state))
2359                         phylink_major_config(pl, false, &config);
2360                 pl->link_config.interface = config.interface;
2361                 linkmode_copy(pl->link_config.advertising, config.advertising);
2362         } else if (!linkmode_equal(pl->link_config.advertising,
2363                                    config.advertising)) {
2364                 linkmode_copy(pl->link_config.advertising, config.advertising);
2365                 phylink_change_inband_advert(pl);
2366         }
2367         mutex_unlock(&pl->state_mutex);
2368
2369         return 0;
2370 }
2371 EXPORT_SYMBOL_GPL(phylink_ethtool_ksettings_set);
2372
2373 /**
2374  * phylink_ethtool_nway_reset() - restart negotiation
2375  * @pl: a pointer to a &struct phylink returned from phylink_create()
2376  *
2377  * Restart negotiation for the phylink instance specified by @pl. This will
2378  * cause any attached phy to restart negotiation with the link partner, and
2379  * if the MAC is in a BaseX mode, the MAC will also be requested to restart
2380  * negotiation.
2381  *
2382  * Returns zero on success, or negative error code.
2383  */
2384 int phylink_ethtool_nway_reset(struct phylink *pl)
2385 {
2386         int ret = 0;
2387
2388         ASSERT_RTNL();
2389
2390         if (pl->phydev)
2391                 ret = phy_restart_aneg(pl->phydev);
2392         phylink_mac_pcs_an_restart(pl);
2393
2394         return ret;
2395 }
2396 EXPORT_SYMBOL_GPL(phylink_ethtool_nway_reset);
2397
2398 /**
2399  * phylink_ethtool_get_pauseparam() - get the current pause parameters
2400  * @pl: a pointer to a &struct phylink returned from phylink_create()
2401  * @pause: a pointer to a &struct ethtool_pauseparam
2402  */
2403 void phylink_ethtool_get_pauseparam(struct phylink *pl,
2404                                     struct ethtool_pauseparam *pause)
2405 {
2406         ASSERT_RTNL();
2407
2408         pause->autoneg = !!(pl->link_config.pause & MLO_PAUSE_AN);
2409         pause->rx_pause = !!(pl->link_config.pause & MLO_PAUSE_RX);
2410         pause->tx_pause = !!(pl->link_config.pause & MLO_PAUSE_TX);
2411 }
2412 EXPORT_SYMBOL_GPL(phylink_ethtool_get_pauseparam);
2413
2414 /**
2415  * phylink_ethtool_set_pauseparam() - set the current pause parameters
2416  * @pl: a pointer to a &struct phylink returned from phylink_create()
2417  * @pause: a pointer to a &struct ethtool_pauseparam
2418  */
2419 int phylink_ethtool_set_pauseparam(struct phylink *pl,
2420                                    struct ethtool_pauseparam *pause)
2421 {
2422         struct phylink_link_state *config = &pl->link_config;
2423         bool manual_changed;
2424         int pause_state;
2425
2426         ASSERT_RTNL();
2427
2428         if (pl->cur_link_an_mode == MLO_AN_FIXED)
2429                 return -EOPNOTSUPP;
2430
2431         if (!phylink_test(pl->supported, Pause) &&
2432             !phylink_test(pl->supported, Asym_Pause))
2433                 return -EOPNOTSUPP;
2434
2435         if (!phylink_test(pl->supported, Asym_Pause) &&
2436             pause->rx_pause != pause->tx_pause)
2437                 return -EINVAL;
2438
2439         pause_state = 0;
2440         if (pause->autoneg)
2441                 pause_state |= MLO_PAUSE_AN;
2442         if (pause->rx_pause)
2443                 pause_state |= MLO_PAUSE_RX;
2444         if (pause->tx_pause)
2445                 pause_state |= MLO_PAUSE_TX;
2446
2447         mutex_lock(&pl->state_mutex);
2448         /*
2449          * See the comments for linkmode_set_pause(), wrt the deficiencies
2450          * with the current implementation.  A solution to this issue would
2451          * be:
2452          * ethtool  Local device
2453          *  rx  tx  Pause AsymDir
2454          *  0   0   0     0
2455          *  1   0   1     1
2456          *  0   1   0     1
2457          *  1   1   1     1
2458          * and then use the ethtool rx/tx enablement status to mask the
2459          * rx/tx pause resolution.
2460          */
2461         linkmode_set_pause(config->advertising, pause->tx_pause,
2462                            pause->rx_pause);
2463
2464         manual_changed = (config->pause ^ pause_state) & MLO_PAUSE_AN ||
2465                          (!(pause_state & MLO_PAUSE_AN) &&
2466                            (config->pause ^ pause_state) & MLO_PAUSE_TXRX_MASK);
2467
2468         config->pause = pause_state;
2469
2470         /* Update our in-band advertisement, triggering a renegotiation if
2471          * the advertisement changed.
2472          */
2473         if (!pl->phydev)
2474                 phylink_change_inband_advert(pl);
2475
2476         mutex_unlock(&pl->state_mutex);
2477
2478         /* If we have a PHY, a change of the pause frame advertisement will
2479          * cause phylib to renegotiate (if AN is enabled) which will in turn
2480          * call our phylink_phy_change() and trigger a resolve.  Note that
2481          * we can't hold our state mutex while calling phy_set_asym_pause().
2482          */
2483         if (pl->phydev)
2484                 phy_set_asym_pause(pl->phydev, pause->rx_pause,
2485                                    pause->tx_pause);
2486
2487         /* If the manual pause settings changed, make sure we trigger a
2488          * resolve to update their state; we can not guarantee that the
2489          * link will cycle.
2490          */
2491         if (manual_changed) {
2492                 pl->mac_link_dropped = true;
2493                 phylink_run_resolve(pl);
2494         }
2495
2496         return 0;
2497 }
2498 EXPORT_SYMBOL_GPL(phylink_ethtool_set_pauseparam);
2499
2500 /**
2501  * phylink_get_eee_err() - read the energy efficient ethernet error
2502  *   counter
2503  * @pl: a pointer to a &struct phylink returned from phylink_create().
2504  *
2505  * Read the Energy Efficient Ethernet error counter from the PHY associated
2506  * with the phylink instance specified by @pl.
2507  *
2508  * Returns positive error counter value, or negative error code.
2509  */
2510 int phylink_get_eee_err(struct phylink *pl)
2511 {
2512         int ret = 0;
2513
2514         ASSERT_RTNL();
2515
2516         if (pl->phydev)
2517                 ret = phy_get_eee_err(pl->phydev);
2518
2519         return ret;
2520 }
2521 EXPORT_SYMBOL_GPL(phylink_get_eee_err);
2522
2523 /**
2524  * phylink_init_eee() - init and check the EEE features
2525  * @pl: a pointer to a &struct phylink returned from phylink_create()
2526  * @clk_stop_enable: allow PHY to stop receive clock
2527  *
2528  * Must be called either with RTNL held or within mac_link_up()
2529  */
2530 int phylink_init_eee(struct phylink *pl, bool clk_stop_enable)
2531 {
2532         int ret = -EOPNOTSUPP;
2533
2534         if (pl->phydev)
2535                 ret = phy_init_eee(pl->phydev, clk_stop_enable);
2536
2537         return ret;
2538 }
2539 EXPORT_SYMBOL_GPL(phylink_init_eee);
2540
2541 /**
2542  * phylink_ethtool_get_eee() - read the energy efficient ethernet parameters
2543  * @pl: a pointer to a &struct phylink returned from phylink_create()
2544  * @eee: a pointer to a &struct ethtool_eee for the read parameters
2545  */
2546 int phylink_ethtool_get_eee(struct phylink *pl, struct ethtool_eee *eee)
2547 {
2548         int ret = -EOPNOTSUPP;
2549
2550         ASSERT_RTNL();
2551
2552         if (pl->phydev)
2553                 ret = phy_ethtool_get_eee(pl->phydev, eee);
2554
2555         return ret;
2556 }
2557 EXPORT_SYMBOL_GPL(phylink_ethtool_get_eee);
2558
2559 /**
2560  * phylink_ethtool_set_eee() - set the energy efficient ethernet parameters
2561  * @pl: a pointer to a &struct phylink returned from phylink_create()
2562  * @eee: a pointer to a &struct ethtool_eee for the desired parameters
2563  */
2564 int phylink_ethtool_set_eee(struct phylink *pl, struct ethtool_eee *eee)
2565 {
2566         int ret = -EOPNOTSUPP;
2567
2568         ASSERT_RTNL();
2569
2570         if (pl->phydev)
2571                 ret = phy_ethtool_set_eee(pl->phydev, eee);
2572
2573         return ret;
2574 }
2575 EXPORT_SYMBOL_GPL(phylink_ethtool_set_eee);
2576
2577 /* This emulates MII registers for a fixed-mode phy operating as per the
2578  * passed in state. "aneg" defines if we report negotiation is possible.
2579  *
2580  * FIXME: should deal with negotiation state too.
2581  */
2582 static int phylink_mii_emul_read(unsigned int reg,
2583                                  struct phylink_link_state *state)
2584 {
2585         struct fixed_phy_status fs;
2586         unsigned long *lpa = state->lp_advertising;
2587         int val;
2588
2589         fs.link = state->link;
2590         fs.speed = state->speed;
2591         fs.duplex = state->duplex;
2592         fs.pause = test_bit(ETHTOOL_LINK_MODE_Pause_BIT, lpa);
2593         fs.asym_pause = test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, lpa);
2594
2595         val = swphy_read_reg(reg, &fs);
2596         if (reg == MII_BMSR) {
2597                 if (!state->an_complete)
2598                         val &= ~BMSR_ANEGCOMPLETE;
2599         }
2600         return val;
2601 }
2602
2603 static int phylink_phy_read(struct phylink *pl, unsigned int phy_id,
2604                             unsigned int reg)
2605 {
2606         struct phy_device *phydev = pl->phydev;
2607         int prtad, devad;
2608
2609         if (mdio_phy_id_is_c45(phy_id)) {
2610                 prtad = mdio_phy_id_prtad(phy_id);
2611                 devad = mdio_phy_id_devad(phy_id);
2612                 return mdiobus_c45_read(pl->phydev->mdio.bus, prtad, devad,
2613                                         reg);
2614         }
2615
2616         if (phydev->is_c45) {
2617                 switch (reg) {
2618                 case MII_BMCR:
2619                 case MII_BMSR:
2620                 case MII_PHYSID1:
2621                 case MII_PHYSID2:
2622                         devad = __ffs(phydev->c45_ids.mmds_present);
2623                         break;
2624                 case MII_ADVERTISE:
2625                 case MII_LPA:
2626                         if (!(phydev->c45_ids.mmds_present & MDIO_DEVS_AN))
2627                                 return -EINVAL;
2628                         devad = MDIO_MMD_AN;
2629                         if (reg == MII_ADVERTISE)
2630                                 reg = MDIO_AN_ADVERTISE;
2631                         else
2632                                 reg = MDIO_AN_LPA;
2633                         break;
2634                 default:
2635                         return -EINVAL;
2636                 }
2637                 prtad = phy_id;
2638                 return mdiobus_c45_read(pl->phydev->mdio.bus, prtad, devad,
2639                                         reg);
2640         }
2641
2642         return mdiobus_read(pl->phydev->mdio.bus, phy_id, reg);
2643 }
2644
2645 static int phylink_phy_write(struct phylink *pl, unsigned int phy_id,
2646                              unsigned int reg, unsigned int val)
2647 {
2648         struct phy_device *phydev = pl->phydev;
2649         int prtad, devad;
2650
2651         if (mdio_phy_id_is_c45(phy_id)) {
2652                 prtad = mdio_phy_id_prtad(phy_id);
2653                 devad = mdio_phy_id_devad(phy_id);
2654                 return mdiobus_c45_write(pl->phydev->mdio.bus, prtad, devad,
2655                                          reg, val);
2656         }
2657
2658         if (phydev->is_c45) {
2659                 switch (reg) {
2660                 case MII_BMCR:
2661                 case MII_BMSR:
2662                 case MII_PHYSID1:
2663                 case MII_PHYSID2:
2664                         devad = __ffs(phydev->c45_ids.mmds_present);
2665                         break;
2666                 case MII_ADVERTISE:
2667                 case MII_LPA:
2668                         if (!(phydev->c45_ids.mmds_present & MDIO_DEVS_AN))
2669                                 return -EINVAL;
2670                         devad = MDIO_MMD_AN;
2671                         if (reg == MII_ADVERTISE)
2672                                 reg = MDIO_AN_ADVERTISE;
2673                         else
2674                                 reg = MDIO_AN_LPA;
2675                         break;
2676                 default:
2677                         return -EINVAL;
2678                 }
2679                 return mdiobus_c45_write(pl->phydev->mdio.bus, phy_id, devad,
2680                                          reg, val);
2681         }
2682
2683         return mdiobus_write(phydev->mdio.bus, phy_id, reg, val);
2684 }
2685
2686 static int phylink_mii_read(struct phylink *pl, unsigned int phy_id,
2687                             unsigned int reg)
2688 {
2689         struct phylink_link_state state;
2690         int val = 0xffff;
2691
2692         switch (pl->cur_link_an_mode) {
2693         case MLO_AN_FIXED:
2694                 if (phy_id == 0) {
2695                         phylink_get_fixed_state(pl, &state);
2696                         val = phylink_mii_emul_read(reg, &state);
2697                 }
2698                 break;
2699
2700         case MLO_AN_PHY:
2701                 return -EOPNOTSUPP;
2702
2703         case MLO_AN_INBAND:
2704                 if (phy_id == 0) {
2705                         phylink_mac_pcs_get_state(pl, &state);
2706                         val = phylink_mii_emul_read(reg, &state);
2707                 }
2708                 break;
2709         }
2710
2711         return val & 0xffff;
2712 }
2713
2714 static int phylink_mii_write(struct phylink *pl, unsigned int phy_id,
2715                              unsigned int reg, unsigned int val)
2716 {
2717         switch (pl->cur_link_an_mode) {
2718         case MLO_AN_FIXED:
2719                 break;
2720
2721         case MLO_AN_PHY:
2722                 return -EOPNOTSUPP;
2723
2724         case MLO_AN_INBAND:
2725                 break;
2726         }
2727
2728         return 0;
2729 }
2730
2731 /**
2732  * phylink_mii_ioctl() - generic mii ioctl interface
2733  * @pl: a pointer to a &struct phylink returned from phylink_create()
2734  * @ifr: a pointer to a &struct ifreq for socket ioctls
2735  * @cmd: ioctl cmd to execute
2736  *
2737  * Perform the specified MII ioctl on the PHY attached to the phylink instance
2738  * specified by @pl. If no PHY is attached, emulate the presence of the PHY.
2739  *
2740  * Returns: zero on success or negative error code.
2741  *
2742  * %SIOCGMIIPHY:
2743  *  read register from the current PHY.
2744  * %SIOCGMIIREG:
2745  *  read register from the specified PHY.
2746  * %SIOCSMIIREG:
2747  *  set a register on the specified PHY.
2748  */
2749 int phylink_mii_ioctl(struct phylink *pl, struct ifreq *ifr, int cmd)
2750 {
2751         struct mii_ioctl_data *mii = if_mii(ifr);
2752         int  ret;
2753
2754         ASSERT_RTNL();
2755
2756         if (pl->phydev) {
2757                 /* PHYs only exist for MLO_AN_PHY and SGMII */
2758                 switch (cmd) {
2759                 case SIOCGMIIPHY:
2760                         mii->phy_id = pl->phydev->mdio.addr;
2761                         fallthrough;
2762
2763                 case SIOCGMIIREG:
2764                         ret = phylink_phy_read(pl, mii->phy_id, mii->reg_num);
2765                         if (ret >= 0) {
2766                                 mii->val_out = ret;
2767                                 ret = 0;
2768                         }
2769                         break;
2770
2771                 case SIOCSMIIREG:
2772                         ret = phylink_phy_write(pl, mii->phy_id, mii->reg_num,
2773                                                 mii->val_in);
2774                         break;
2775
2776                 default:
2777                         ret = phy_mii_ioctl(pl->phydev, ifr, cmd);
2778                         break;
2779                 }
2780         } else {
2781                 switch (cmd) {
2782                 case SIOCGMIIPHY:
2783                         mii->phy_id = 0;
2784                         fallthrough;
2785
2786                 case SIOCGMIIREG:
2787                         ret = phylink_mii_read(pl, mii->phy_id, mii->reg_num);
2788                         if (ret >= 0) {
2789                                 mii->val_out = ret;
2790                                 ret = 0;
2791                         }
2792                         break;
2793
2794                 case SIOCSMIIREG:
2795                         ret = phylink_mii_write(pl, mii->phy_id, mii->reg_num,
2796                                                 mii->val_in);
2797                         break;
2798
2799                 default:
2800                         ret = -EOPNOTSUPP;
2801                         break;
2802                 }
2803         }
2804
2805         return ret;
2806 }
2807 EXPORT_SYMBOL_GPL(phylink_mii_ioctl);
2808
2809 /**
2810  * phylink_speed_down() - set the non-SFP PHY to lowest speed supported by both
2811  *   link partners
2812  * @pl: a pointer to a &struct phylink returned from phylink_create()
2813  * @sync: perform action synchronously
2814  *
2815  * If we have a PHY that is not part of a SFP module, then set the speed
2816  * as described in the phy_speed_down() function. Please see this function
2817  * for a description of the @sync parameter.
2818  *
2819  * Returns zero if there is no PHY, otherwise as per phy_speed_down().
2820  */
2821 int phylink_speed_down(struct phylink *pl, bool sync)
2822 {
2823         int ret = 0;
2824
2825         ASSERT_RTNL();
2826
2827         if (!pl->sfp_bus && pl->phydev)
2828                 ret = phy_speed_down(pl->phydev, sync);
2829
2830         return ret;
2831 }
2832 EXPORT_SYMBOL_GPL(phylink_speed_down);
2833
2834 /**
2835  * phylink_speed_up() - restore the advertised speeds prior to the call to
2836  *   phylink_speed_down()
2837  * @pl: a pointer to a &struct phylink returned from phylink_create()
2838  *
2839  * If we have a PHY that is not part of a SFP module, then restore the
2840  * PHY speeds as per phy_speed_up().
2841  *
2842  * Returns zero if there is no PHY, otherwise as per phy_speed_up().
2843  */
2844 int phylink_speed_up(struct phylink *pl)
2845 {
2846         int ret = 0;
2847
2848         ASSERT_RTNL();
2849
2850         if (!pl->sfp_bus && pl->phydev)
2851                 ret = phy_speed_up(pl->phydev);
2852
2853         return ret;
2854 }
2855 EXPORT_SYMBOL_GPL(phylink_speed_up);
2856
2857 static void phylink_sfp_attach(void *upstream, struct sfp_bus *bus)
2858 {
2859         struct phylink *pl = upstream;
2860
2861         pl->netdev->sfp_bus = bus;
2862 }
2863
2864 static void phylink_sfp_detach(void *upstream, struct sfp_bus *bus)
2865 {
2866         struct phylink *pl = upstream;
2867
2868         pl->netdev->sfp_bus = NULL;
2869 }
2870
2871 static const phy_interface_t phylink_sfp_interface_preference[] = {
2872         PHY_INTERFACE_MODE_25GBASER,
2873         PHY_INTERFACE_MODE_USXGMII,
2874         PHY_INTERFACE_MODE_10GBASER,
2875         PHY_INTERFACE_MODE_5GBASER,
2876         PHY_INTERFACE_MODE_2500BASEX,
2877         PHY_INTERFACE_MODE_SGMII,
2878         PHY_INTERFACE_MODE_1000BASEX,
2879         PHY_INTERFACE_MODE_100BASEX,
2880 };
2881
2882 static DECLARE_PHY_INTERFACE_MASK(phylink_sfp_interfaces);
2883
2884 static phy_interface_t phylink_choose_sfp_interface(struct phylink *pl,
2885                                                     const unsigned long *intf)
2886 {
2887         phy_interface_t interface;
2888         size_t i;
2889
2890         interface = PHY_INTERFACE_MODE_NA;
2891         for (i = 0; i < ARRAY_SIZE(phylink_sfp_interface_preference); i++)
2892                 if (test_bit(phylink_sfp_interface_preference[i], intf)) {
2893                         interface = phylink_sfp_interface_preference[i];
2894                         break;
2895                 }
2896
2897         return interface;
2898 }
2899
2900 static void phylink_sfp_set_config(struct phylink *pl, u8 mode,
2901                                    unsigned long *supported,
2902                                    struct phylink_link_state *state)
2903 {
2904         bool changed = false;
2905
2906         phylink_dbg(pl, "requesting link mode %s/%s with support %*pb\n",
2907                     phylink_an_mode_str(mode), phy_modes(state->interface),
2908                     __ETHTOOL_LINK_MODE_MASK_NBITS, supported);
2909
2910         if (!linkmode_equal(pl->supported, supported)) {
2911                 linkmode_copy(pl->supported, supported);
2912                 changed = true;
2913         }
2914
2915         if (!linkmode_equal(pl->link_config.advertising, state->advertising)) {
2916                 linkmode_copy(pl->link_config.advertising, state->advertising);
2917                 changed = true;
2918         }
2919
2920         if (pl->cur_link_an_mode != mode ||
2921             pl->link_config.interface != state->interface) {
2922                 pl->cur_link_an_mode = mode;
2923                 pl->link_config.interface = state->interface;
2924
2925                 changed = true;
2926
2927                 phylink_info(pl, "switched to %s/%s link mode\n",
2928                              phylink_an_mode_str(mode),
2929                              phy_modes(state->interface));
2930         }
2931
2932         if (changed && !test_bit(PHYLINK_DISABLE_STOPPED,
2933                                  &pl->phylink_disable_state))
2934                 phylink_mac_initial_config(pl, false);
2935 }
2936
2937 static int phylink_sfp_config_phy(struct phylink *pl, u8 mode,
2938                                   struct phy_device *phy)
2939 {
2940         __ETHTOOL_DECLARE_LINK_MODE_MASK(support1);
2941         __ETHTOOL_DECLARE_LINK_MODE_MASK(support);
2942         struct phylink_link_state config;
2943         phy_interface_t iface;
2944         int ret;
2945
2946         linkmode_copy(support, phy->supported);
2947
2948         memset(&config, 0, sizeof(config));
2949         linkmode_copy(config.advertising, phy->advertising);
2950         config.interface = PHY_INTERFACE_MODE_NA;
2951         config.speed = SPEED_UNKNOWN;
2952         config.duplex = DUPLEX_UNKNOWN;
2953         config.pause = MLO_PAUSE_AN;
2954         config.an_enabled = pl->link_config.an_enabled;
2955
2956         /* Ignore errors if we're expecting a PHY to attach later */
2957         ret = phylink_validate(pl, support, &config);
2958         if (ret) {
2959                 phylink_err(pl, "validation with support %*pb failed: %pe\n",
2960                             __ETHTOOL_LINK_MODE_MASK_NBITS, support,
2961                             ERR_PTR(ret));
2962                 return ret;
2963         }
2964
2965         iface = sfp_select_interface(pl->sfp_bus, config.advertising);
2966         if (iface == PHY_INTERFACE_MODE_NA) {
2967                 phylink_err(pl,
2968                             "selection of interface failed, advertisement %*pb\n",
2969                             __ETHTOOL_LINK_MODE_MASK_NBITS, config.advertising);
2970                 return -EINVAL;
2971         }
2972
2973         config.interface = iface;
2974         linkmode_copy(support1, support);
2975         ret = phylink_validate(pl, support1, &config);
2976         if (ret) {
2977                 phylink_err(pl,
2978                             "validation of %s/%s with support %*pb failed: %pe\n",
2979                             phylink_an_mode_str(mode),
2980                             phy_modes(config.interface),
2981                             __ETHTOOL_LINK_MODE_MASK_NBITS, support,
2982                             ERR_PTR(ret));
2983                 return ret;
2984         }
2985
2986         pl->link_port = pl->sfp_port;
2987
2988         phylink_sfp_set_config(pl, mode, support, &config);
2989
2990         return 0;
2991 }
2992
2993 static int phylink_sfp_config_optical(struct phylink *pl)
2994 {
2995         __ETHTOOL_DECLARE_LINK_MODE_MASK(support);
2996         DECLARE_PHY_INTERFACE_MASK(interfaces);
2997         struct phylink_link_state config;
2998         phy_interface_t interface;
2999         int ret;
3000
3001         phylink_dbg(pl, "optical SFP: interfaces=[mac=%*pbl, sfp=%*pbl]\n",
3002                     (int)PHY_INTERFACE_MODE_MAX,
3003                     pl->config->supported_interfaces,
3004                     (int)PHY_INTERFACE_MODE_MAX,
3005                     pl->sfp_interfaces);
3006
3007         /* Find the union of the supported interfaces by the PCS/MAC and
3008          * the SFP module.
3009          */
3010         phy_interface_and(interfaces, pl->config->supported_interfaces,
3011                           pl->sfp_interfaces);
3012         if (phy_interface_empty(interfaces)) {
3013                 phylink_err(pl, "unsupported SFP module: no common interface modes\n");
3014                 return -EINVAL;
3015         }
3016
3017         memset(&config, 0, sizeof(config));
3018         linkmode_copy(support, pl->sfp_support);
3019         linkmode_copy(config.advertising, pl->sfp_support);
3020         config.speed = SPEED_UNKNOWN;
3021         config.duplex = DUPLEX_UNKNOWN;
3022         config.pause = MLO_PAUSE_AN;
3023         config.an_enabled = true;
3024
3025         /* For all the interfaces that are supported, reduce the sfp_support
3026          * mask to only those link modes that can be supported.
3027          */
3028         ret = phylink_validate_mask(pl, pl->sfp_support, &config, interfaces);
3029         if (ret) {
3030                 phylink_err(pl, "unsupported SFP module: validation with support %*pb failed\n",
3031                             __ETHTOOL_LINK_MODE_MASK_NBITS, support);
3032                 return ret;
3033         }
3034
3035         interface = phylink_choose_sfp_interface(pl, interfaces);
3036         if (interface == PHY_INTERFACE_MODE_NA) {
3037                 phylink_err(pl, "failed to select SFP interface\n");
3038                 return -EINVAL;
3039         }
3040
3041         phylink_dbg(pl, "optical SFP: chosen %s interface\n",
3042                     phy_modes(interface));
3043
3044         config.interface = interface;
3045
3046         /* Ignore errors if we're expecting a PHY to attach later */
3047         ret = phylink_validate(pl, support, &config);
3048         if (ret) {
3049                 phylink_err(pl, "validation with support %*pb failed: %pe\n",
3050                             __ETHTOOL_LINK_MODE_MASK_NBITS, support,
3051                             ERR_PTR(ret));
3052                 return ret;
3053         }
3054
3055         pl->link_port = pl->sfp_port;
3056
3057         phylink_sfp_set_config(pl, MLO_AN_INBAND, pl->sfp_support, &config);
3058
3059         return 0;
3060 }
3061
3062 static int phylink_sfp_module_insert(void *upstream,
3063                                      const struct sfp_eeprom_id *id)
3064 {
3065         struct phylink *pl = upstream;
3066
3067         ASSERT_RTNL();
3068
3069         linkmode_zero(pl->sfp_support);
3070         phy_interface_zero(pl->sfp_interfaces);
3071         sfp_parse_support(pl->sfp_bus, id, pl->sfp_support, pl->sfp_interfaces);
3072         pl->sfp_port = sfp_parse_port(pl->sfp_bus, id, pl->sfp_support);
3073
3074         /* If this module may have a PHY connecting later, defer until later */
3075         pl->sfp_may_have_phy = sfp_may_have_phy(pl->sfp_bus, id);
3076         if (pl->sfp_may_have_phy)
3077                 return 0;
3078
3079         return phylink_sfp_config_optical(pl);
3080 }
3081
3082 static int phylink_sfp_module_start(void *upstream)
3083 {
3084         struct phylink *pl = upstream;
3085
3086         /* If this SFP module has a PHY, start the PHY now. */
3087         if (pl->phydev) {
3088                 phy_start(pl->phydev);
3089                 return 0;
3090         }
3091
3092         /* If the module may have a PHY but we didn't detect one we
3093          * need to configure the MAC here.
3094          */
3095         if (!pl->sfp_may_have_phy)
3096                 return 0;
3097
3098         return phylink_sfp_config_optical(pl);
3099 }
3100
3101 static void phylink_sfp_module_stop(void *upstream)
3102 {
3103         struct phylink *pl = upstream;
3104
3105         /* If this SFP module has a PHY, stop it. */
3106         if (pl->phydev)
3107                 phy_stop(pl->phydev);
3108 }
3109
3110 static void phylink_sfp_link_down(void *upstream)
3111 {
3112         struct phylink *pl = upstream;
3113
3114         ASSERT_RTNL();
3115
3116         phylink_run_resolve_and_disable(pl, PHYLINK_DISABLE_LINK);
3117 }
3118
3119 static void phylink_sfp_link_up(void *upstream)
3120 {
3121         struct phylink *pl = upstream;
3122
3123         ASSERT_RTNL();
3124
3125         phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_LINK);
3126 }
3127
3128 /* The Broadcom BCM84881 in the Methode DM7052 is unable to provide a SGMII
3129  * or 802.3z control word, so inband will not work.
3130  */
3131 static bool phylink_phy_no_inband(struct phy_device *phy)
3132 {
3133         return phy->is_c45 &&
3134                 (phy->c45_ids.device_ids[1] & 0xfffffff0) == 0xae025150;
3135 }
3136
3137 static int phylink_sfp_connect_phy(void *upstream, struct phy_device *phy)
3138 {
3139         struct phylink *pl = upstream;
3140         phy_interface_t interface;
3141         u8 mode;
3142         int ret;
3143
3144         /*
3145          * This is the new way of dealing with flow control for PHYs,
3146          * as described by Timur Tabi in commit 529ed1275263 ("net: phy:
3147          * phy drivers should not set SUPPORTED_[Asym_]Pause") except
3148          * using our validate call to the MAC, we rely upon the MAC
3149          * clearing the bits from both supported and advertising fields.
3150          */
3151         phy_support_asym_pause(phy);
3152
3153         if (phylink_phy_no_inband(phy))
3154                 mode = MLO_AN_PHY;
3155         else
3156                 mode = MLO_AN_INBAND;
3157
3158         /* Set the PHY's host supported interfaces */
3159         phy_interface_and(phy->host_interfaces, phylink_sfp_interfaces,
3160                           pl->config->supported_interfaces);
3161
3162         /* Do the initial configuration */
3163         ret = phylink_sfp_config_phy(pl, mode, phy);
3164         if (ret < 0)
3165                 return ret;
3166
3167         interface = pl->link_config.interface;
3168         ret = phylink_attach_phy(pl, phy, interface);
3169         if (ret < 0)
3170                 return ret;
3171
3172         ret = phylink_bringup_phy(pl, phy, interface);
3173         if (ret)
3174                 phy_detach(phy);
3175
3176         return ret;
3177 }
3178
3179 static void phylink_sfp_disconnect_phy(void *upstream)
3180 {
3181         phylink_disconnect_phy(upstream);
3182 }
3183
3184 static const struct sfp_upstream_ops sfp_phylink_ops = {
3185         .attach = phylink_sfp_attach,
3186         .detach = phylink_sfp_detach,
3187         .module_insert = phylink_sfp_module_insert,
3188         .module_start = phylink_sfp_module_start,
3189         .module_stop = phylink_sfp_module_stop,
3190         .link_up = phylink_sfp_link_up,
3191         .link_down = phylink_sfp_link_down,
3192         .connect_phy = phylink_sfp_connect_phy,
3193         .disconnect_phy = phylink_sfp_disconnect_phy,
3194 };
3195
3196 /* Helpers for MAC drivers */
3197
3198 static void phylink_decode_c37_word(struct phylink_link_state *state,
3199                                     uint16_t config_reg, int speed)
3200 {
3201         bool tx_pause, rx_pause;
3202         int fd_bit;
3203
3204         if (speed == SPEED_2500)
3205                 fd_bit = ETHTOOL_LINK_MODE_2500baseX_Full_BIT;
3206         else
3207                 fd_bit = ETHTOOL_LINK_MODE_1000baseX_Full_BIT;
3208
3209         mii_lpa_mod_linkmode_x(state->lp_advertising, config_reg, fd_bit);
3210
3211         if (linkmode_test_bit(fd_bit, state->advertising) &&
3212             linkmode_test_bit(fd_bit, state->lp_advertising)) {
3213                 state->speed = speed;
3214                 state->duplex = DUPLEX_FULL;
3215         } else {
3216                 /* negotiation failure */
3217                 state->link = false;
3218         }
3219
3220         linkmode_resolve_pause(state->advertising, state->lp_advertising,
3221                                &tx_pause, &rx_pause);
3222
3223         if (tx_pause)
3224                 state->pause |= MLO_PAUSE_TX;
3225         if (rx_pause)
3226                 state->pause |= MLO_PAUSE_RX;
3227 }
3228
3229 static void phylink_decode_sgmii_word(struct phylink_link_state *state,
3230                                       uint16_t config_reg)
3231 {
3232         if (!(config_reg & LPA_SGMII_LINK)) {
3233                 state->link = false;
3234                 return;
3235         }
3236
3237         switch (config_reg & LPA_SGMII_SPD_MASK) {
3238         case LPA_SGMII_10:
3239                 state->speed = SPEED_10;
3240                 break;
3241         case LPA_SGMII_100:
3242                 state->speed = SPEED_100;
3243                 break;
3244         case LPA_SGMII_1000:
3245                 state->speed = SPEED_1000;
3246                 break;
3247         default:
3248                 state->link = false;
3249                 return;
3250         }
3251         if (config_reg & LPA_SGMII_FULL_DUPLEX)
3252                 state->duplex = DUPLEX_FULL;
3253         else
3254                 state->duplex = DUPLEX_HALF;
3255 }
3256
3257 /**
3258  * phylink_decode_usxgmii_word() - decode the USXGMII word from a MAC PCS
3259  * @state: a pointer to a struct phylink_link_state.
3260  * @lpa: a 16 bit value which stores the USXGMII auto-negotiation word
3261  *
3262  * Helper for MAC PCS supporting the USXGMII protocol and the auto-negotiation
3263  * code word.  Decode the USXGMII code word and populate the corresponding fields
3264  * (speed, duplex) into the phylink_link_state structure.
3265  */
3266 void phylink_decode_usxgmii_word(struct phylink_link_state *state,
3267                                  uint16_t lpa)
3268 {
3269         switch (lpa & MDIO_USXGMII_SPD_MASK) {
3270         case MDIO_USXGMII_10:
3271                 state->speed = SPEED_10;
3272                 break;
3273         case MDIO_USXGMII_100:
3274                 state->speed = SPEED_100;
3275                 break;
3276         case MDIO_USXGMII_1000:
3277                 state->speed = SPEED_1000;
3278                 break;
3279         case MDIO_USXGMII_2500:
3280                 state->speed = SPEED_2500;
3281                 break;
3282         case MDIO_USXGMII_5000:
3283                 state->speed = SPEED_5000;
3284                 break;
3285         case MDIO_USXGMII_10G:
3286                 state->speed = SPEED_10000;
3287                 break;
3288         default:
3289                 state->link = false;
3290                 return;
3291         }
3292
3293         if (lpa & MDIO_USXGMII_FULL_DUPLEX)
3294                 state->duplex = DUPLEX_FULL;
3295         else
3296                 state->duplex = DUPLEX_HALF;
3297 }
3298 EXPORT_SYMBOL_GPL(phylink_decode_usxgmii_word);
3299
3300 /**
3301  * phylink_mii_c22_pcs_decode_state() - Decode MAC PCS state from MII registers
3302  * @state: a pointer to a &struct phylink_link_state.
3303  * @bmsr: The value of the %MII_BMSR register
3304  * @lpa: The value of the %MII_LPA register
3305  *
3306  * Helper for MAC PCS supporting the 802.3 clause 22 register set for
3307  * clause 37 negotiation and/or SGMII control.
3308  *
3309  * Parse the Clause 37 or Cisco SGMII link partner negotiation word into
3310  * the phylink @state structure. This is suitable to be used for implementing
3311  * the mac_pcs_get_state() member of the struct phylink_mac_ops structure if
3312  * accessing @bmsr and @lpa cannot be done with MDIO directly.
3313  */
3314 void phylink_mii_c22_pcs_decode_state(struct phylink_link_state *state,
3315                                       u16 bmsr, u16 lpa)
3316 {
3317         state->link = !!(bmsr & BMSR_LSTATUS);
3318         state->an_complete = !!(bmsr & BMSR_ANEGCOMPLETE);
3319         /* If there is no link or autonegotiation is disabled, the LP advertisement
3320          * data is not meaningful, so don't go any further.
3321          */
3322         if (!state->link || !state->an_enabled)
3323                 return;
3324
3325         switch (state->interface) {
3326         case PHY_INTERFACE_MODE_1000BASEX:
3327                 phylink_decode_c37_word(state, lpa, SPEED_1000);
3328                 break;
3329
3330         case PHY_INTERFACE_MODE_2500BASEX:
3331                 phylink_decode_c37_word(state, lpa, SPEED_2500);
3332                 break;
3333
3334         case PHY_INTERFACE_MODE_SGMII:
3335         case PHY_INTERFACE_MODE_QSGMII:
3336         case PHY_INTERFACE_MODE_QUSGMII:
3337                 phylink_decode_sgmii_word(state, lpa);
3338                 break;
3339
3340         default:
3341                 state->link = false;
3342                 break;
3343         }
3344 }
3345 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_decode_state);
3346
3347 /**
3348  * phylink_mii_c22_pcs_get_state() - read the MAC PCS state
3349  * @pcs: a pointer to a &struct mdio_device.
3350  * @state: a pointer to a &struct phylink_link_state.
3351  *
3352  * Helper for MAC PCS supporting the 802.3 clause 22 register set for
3353  * clause 37 negotiation and/or SGMII control.
3354  *
3355  * Read the MAC PCS state from the MII device configured in @config and
3356  * parse the Clause 37 or Cisco SGMII link partner negotiation word into
3357  * the phylink @state structure. This is suitable to be directly plugged
3358  * into the mac_pcs_get_state() member of the struct phylink_mac_ops
3359  * structure.
3360  */
3361 void phylink_mii_c22_pcs_get_state(struct mdio_device *pcs,
3362                                    struct phylink_link_state *state)
3363 {
3364         int bmsr, lpa;
3365
3366         bmsr = mdiodev_read(pcs, MII_BMSR);
3367         lpa = mdiodev_read(pcs, MII_LPA);
3368         if (bmsr < 0 || lpa < 0) {
3369                 state->link = false;
3370                 return;
3371         }
3372
3373         phylink_mii_c22_pcs_decode_state(state, bmsr, lpa);
3374 }
3375 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_get_state);
3376
3377 /**
3378  * phylink_mii_c22_pcs_encode_advertisement() - configure the clause 37 PCS
3379  *      advertisement
3380  * @interface: the PHY interface mode being configured
3381  * @advertising: the ethtool advertisement mask
3382  *
3383  * Helper for MAC PCS supporting the 802.3 clause 22 register set for
3384  * clause 37 negotiation and/or SGMII control.
3385  *
3386  * Encode the clause 37 PCS advertisement as specified by @interface and
3387  * @advertising.
3388  *
3389  * Return: The new value for @adv, or ``-EINVAL`` if it should not be changed.
3390  */
3391 int phylink_mii_c22_pcs_encode_advertisement(phy_interface_t interface,
3392                                              const unsigned long *advertising)
3393 {
3394         u16 adv;
3395
3396         switch (interface) {
3397         case PHY_INTERFACE_MODE_1000BASEX:
3398         case PHY_INTERFACE_MODE_2500BASEX:
3399                 adv = ADVERTISE_1000XFULL;
3400                 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT,
3401                                       advertising))
3402                         adv |= ADVERTISE_1000XPAUSE;
3403                 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT,
3404                                       advertising))
3405                         adv |= ADVERTISE_1000XPSE_ASYM;
3406                 return adv;
3407         case PHY_INTERFACE_MODE_SGMII:
3408         case PHY_INTERFACE_MODE_QSGMII:
3409                 return 0x0001;
3410         default:
3411                 /* Nothing to do for other modes */
3412                 return -EINVAL;
3413         }
3414 }
3415 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_encode_advertisement);
3416
3417 /**
3418  * phylink_mii_c22_pcs_config() - configure clause 22 PCS
3419  * @pcs: a pointer to a &struct mdio_device.
3420  * @mode: link autonegotiation mode
3421  * @interface: the PHY interface mode being configured
3422  * @advertising: the ethtool advertisement mask
3423  *
3424  * Configure a Clause 22 PCS PHY with the appropriate negotiation
3425  * parameters for the @mode, @interface and @advertising parameters.
3426  * Returns negative error number on failure, zero if the advertisement
3427  * has not changed, or positive if there is a change.
3428  */
3429 int phylink_mii_c22_pcs_config(struct mdio_device *pcs, unsigned int mode,
3430                                phy_interface_t interface,
3431                                const unsigned long *advertising)
3432 {
3433         bool changed = 0;
3434         u16 bmcr;
3435         int ret, adv;
3436
3437         adv = phylink_mii_c22_pcs_encode_advertisement(interface, advertising);
3438         if (adv >= 0) {
3439                 ret = mdiobus_modify_changed(pcs->bus, pcs->addr,
3440                                              MII_ADVERTISE, 0xffff, adv);
3441                 if (ret < 0)
3442                         return ret;
3443                 changed = ret;
3444         }
3445
3446         /* Ensure ISOLATE bit is disabled */
3447         if (mode == MLO_AN_INBAND &&
3448             (interface == PHY_INTERFACE_MODE_SGMII ||
3449              interface == PHY_INTERFACE_MODE_QSGMII ||
3450              linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, advertising)))
3451                 bmcr = BMCR_ANENABLE;
3452         else
3453                 bmcr = 0;
3454
3455         ret = mdiodev_modify(pcs, MII_BMCR, BMCR_ANENABLE | BMCR_ISOLATE, bmcr);
3456         if (ret < 0)
3457                 return ret;
3458
3459         return changed;
3460 }
3461 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_config);
3462
3463 /**
3464  * phylink_mii_c22_pcs_an_restart() - restart 802.3z autonegotiation
3465  * @pcs: a pointer to a &struct mdio_device.
3466  *
3467  * Helper for MAC PCS supporting the 802.3 clause 22 register set for
3468  * clause 37 negotiation.
3469  *
3470  * Restart the clause 37 negotiation with the link partner. This is
3471  * suitable to be directly plugged into the mac_pcs_get_state() member
3472  * of the struct phylink_mac_ops structure.
3473  */
3474 void phylink_mii_c22_pcs_an_restart(struct mdio_device *pcs)
3475 {
3476         int val = mdiodev_read(pcs, MII_BMCR);
3477
3478         if (val >= 0) {
3479                 val |= BMCR_ANRESTART;
3480
3481                 mdiodev_write(pcs, MII_BMCR, val);
3482         }
3483 }
3484 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_an_restart);
3485
3486 void phylink_mii_c45_pcs_get_state(struct mdio_device *pcs,
3487                                    struct phylink_link_state *state)
3488 {
3489         struct mii_bus *bus = pcs->bus;
3490         int addr = pcs->addr;
3491         int stat;
3492
3493         stat = mdiobus_c45_read(bus, addr, MDIO_MMD_PCS, MDIO_STAT1);
3494         if (stat < 0) {
3495                 state->link = false;
3496                 return;
3497         }
3498
3499         state->link = !!(stat & MDIO_STAT1_LSTATUS);
3500         if (!state->link)
3501                 return;
3502
3503         switch (state->interface) {
3504         case PHY_INTERFACE_MODE_10GBASER:
3505                 state->speed = SPEED_10000;
3506                 state->duplex = DUPLEX_FULL;
3507                 break;
3508
3509         default:
3510                 break;
3511         }
3512 }
3513 EXPORT_SYMBOL_GPL(phylink_mii_c45_pcs_get_state);
3514
3515 static int __init phylink_init(void)
3516 {
3517         for (int i = 0; i < ARRAY_SIZE(phylink_sfp_interface_preference); ++i)
3518                 __set_bit(phylink_sfp_interface_preference[i],
3519                           phylink_sfp_interfaces);
3520
3521         return 0;
3522 }
3523
3524 module_init(phylink_init);
3525
3526 MODULE_LICENSE("GPL v2");