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[sagit-ice-cold/kernel_xiaomi_msm8998.git] / drivers / net / usb / r8152.c
1 /*
2  *  Copyright (c) 2014 Realtek Semiconductor Corp. All rights reserved.
3  *
4  * This program is free software; you can redistribute it and/or
5  * modify it under the terms of the GNU General Public License
6  * version 2 as published by the Free Software Foundation.
7  *
8  */
9
10 #include <linux/signal.h>
11 #include <linux/slab.h>
12 #include <linux/module.h>
13 #include <linux/netdevice.h>
14 #include <linux/etherdevice.h>
15 #include <linux/mii.h>
16 #include <linux/ethtool.h>
17 #include <linux/usb.h>
18 #include <linux/crc32.h>
19 #include <linux/if_vlan.h>
20 #include <linux/uaccess.h>
21 #include <linux/list.h>
22 #include <linux/ip.h>
23 #include <linux/ipv6.h>
24 #include <net/ip6_checksum.h>
25 #include <uapi/linux/mdio.h>
26 #include <linux/mdio.h>
27 #include <linux/usb/cdc.h>
28 #include <linux/suspend.h>
29
30 /* Information for net-next */
31 #define NETNEXT_VERSION         "08"
32
33 /* Information for net */
34 #define NET_VERSION             "3"
35
36 #define DRIVER_VERSION          "v1." NETNEXT_VERSION "." NET_VERSION
37 #define DRIVER_AUTHOR "Realtek linux nic maintainers <nic_swsd@realtek.com>"
38 #define DRIVER_DESC "Realtek RTL8152/RTL8153 Based USB Ethernet Adapters"
39 #define MODULENAME "r8152"
40
41 #define R8152_PHY_ID            32
42
43 #define PLA_IDR                 0xc000
44 #define PLA_RCR                 0xc010
45 #define PLA_RMS                 0xc016
46 #define PLA_RXFIFO_CTRL0        0xc0a0
47 #define PLA_RXFIFO_CTRL1        0xc0a4
48 #define PLA_RXFIFO_CTRL2        0xc0a8
49 #define PLA_DMY_REG0            0xc0b0
50 #define PLA_FMC                 0xc0b4
51 #define PLA_CFG_WOL             0xc0b6
52 #define PLA_TEREDO_CFG          0xc0bc
53 #define PLA_MAR                 0xcd00
54 #define PLA_BACKUP              0xd000
55 #define PAL_BDC_CR              0xd1a0
56 #define PLA_TEREDO_TIMER        0xd2cc
57 #define PLA_REALWOW_TIMER       0xd2e8
58 #define PLA_LEDSEL              0xdd90
59 #define PLA_LED_FEATURE         0xdd92
60 #define PLA_PHYAR               0xde00
61 #define PLA_BOOT_CTRL           0xe004
62 #define PLA_GPHY_INTR_IMR       0xe022
63 #define PLA_EEE_CR              0xe040
64 #define PLA_EEEP_CR             0xe080
65 #define PLA_MAC_PWR_CTRL        0xe0c0
66 #define PLA_MAC_PWR_CTRL2       0xe0ca
67 #define PLA_MAC_PWR_CTRL3       0xe0cc
68 #define PLA_MAC_PWR_CTRL4       0xe0ce
69 #define PLA_WDT6_CTRL           0xe428
70 #define PLA_TCR0                0xe610
71 #define PLA_TCR1                0xe612
72 #define PLA_MTPS                0xe615
73 #define PLA_TXFIFO_CTRL         0xe618
74 #define PLA_RSTTALLY            0xe800
75 #define PLA_CR                  0xe813
76 #define PLA_CRWECR              0xe81c
77 #define PLA_CONFIG12            0xe81e  /* CONFIG1, CONFIG2 */
78 #define PLA_CONFIG34            0xe820  /* CONFIG3, CONFIG4 */
79 #define PLA_CONFIG5             0xe822
80 #define PLA_PHY_PWR             0xe84c
81 #define PLA_OOB_CTRL            0xe84f
82 #define PLA_CPCR                0xe854
83 #define PLA_MISC_0              0xe858
84 #define PLA_MISC_1              0xe85a
85 #define PLA_OCP_GPHY_BASE       0xe86c
86 #define PLA_TALLYCNT            0xe890
87 #define PLA_SFF_STS_7           0xe8de
88 #define PLA_PHYSTATUS           0xe908
89 #define PLA_BP_BA               0xfc26
90 #define PLA_BP_0                0xfc28
91 #define PLA_BP_1                0xfc2a
92 #define PLA_BP_2                0xfc2c
93 #define PLA_BP_3                0xfc2e
94 #define PLA_BP_4                0xfc30
95 #define PLA_BP_5                0xfc32
96 #define PLA_BP_6                0xfc34
97 #define PLA_BP_7                0xfc36
98 #define PLA_BP_EN               0xfc38
99
100 #define USB_USB2PHY             0xb41e
101 #define USB_SSPHYLINK2          0xb428
102 #define USB_U2P3_CTRL           0xb460
103 #define USB_CSR_DUMMY1          0xb464
104 #define USB_CSR_DUMMY2          0xb466
105 #define USB_DEV_STAT            0xb808
106 #define USB_CONNECT_TIMER       0xcbf8
107 #define USB_BURST_SIZE          0xcfc0
108 #define USB_USB_CTRL            0xd406
109 #define USB_PHY_CTRL            0xd408
110 #define USB_TX_AGG              0xd40a
111 #define USB_RX_BUF_TH           0xd40c
112 #define USB_USB_TIMER           0xd428
113 #define USB_RX_EARLY_TIMEOUT    0xd42c
114 #define USB_RX_EARLY_SIZE       0xd42e
115 #define USB_PM_CTRL_STATUS      0xd432
116 #define USB_TX_DMA              0xd434
117 #define USB_TOLERANCE           0xd490
118 #define USB_LPM_CTRL            0xd41a
119 #define USB_UPS_CTRL            0xd800
120 #define USB_MISC_0              0xd81a
121 #define USB_POWER_CUT           0xd80a
122 #define USB_AFE_CTRL2           0xd824
123 #define USB_WDT11_CTRL          0xe43c
124 #define USB_BP_BA               0xfc26
125 #define USB_BP_0                0xfc28
126 #define USB_BP_1                0xfc2a
127 #define USB_BP_2                0xfc2c
128 #define USB_BP_3                0xfc2e
129 #define USB_BP_4                0xfc30
130 #define USB_BP_5                0xfc32
131 #define USB_BP_6                0xfc34
132 #define USB_BP_7                0xfc36
133 #define USB_BP_EN               0xfc38
134
135 /* OCP Registers */
136 #define OCP_ALDPS_CONFIG        0x2010
137 #define OCP_EEE_CONFIG1         0x2080
138 #define OCP_EEE_CONFIG2         0x2092
139 #define OCP_EEE_CONFIG3         0x2094
140 #define OCP_BASE_MII            0xa400
141 #define OCP_EEE_AR              0xa41a
142 #define OCP_EEE_DATA            0xa41c
143 #define OCP_PHY_STATUS          0xa420
144 #define OCP_POWER_CFG           0xa430
145 #define OCP_EEE_CFG             0xa432
146 #define OCP_SRAM_ADDR           0xa436
147 #define OCP_SRAM_DATA           0xa438
148 #define OCP_DOWN_SPEED          0xa442
149 #define OCP_EEE_ABLE            0xa5c4
150 #define OCP_EEE_ADV             0xa5d0
151 #define OCP_EEE_LPABLE          0xa5d2
152 #define OCP_PHY_STATE           0xa708          /* nway state for 8153 */
153 #define OCP_ADC_CFG             0xbc06
154
155 /* SRAM Register */
156 #define SRAM_LPF_CFG            0x8012
157 #define SRAM_10M_AMP1           0x8080
158 #define SRAM_10M_AMP2           0x8082
159 #define SRAM_IMPEDANCE          0x8084
160
161 /* PLA_RCR */
162 #define RCR_AAP                 0x00000001
163 #define RCR_APM                 0x00000002
164 #define RCR_AM                  0x00000004
165 #define RCR_AB                  0x00000008
166 #define RCR_ACPT_ALL            (RCR_AAP | RCR_APM | RCR_AM | RCR_AB)
167
168 /* PLA_RXFIFO_CTRL0 */
169 #define RXFIFO_THR1_NORMAL      0x00080002
170 #define RXFIFO_THR1_OOB         0x01800003
171
172 /* PLA_RXFIFO_CTRL1 */
173 #define RXFIFO_THR2_FULL        0x00000060
174 #define RXFIFO_THR2_HIGH        0x00000038
175 #define RXFIFO_THR2_OOB         0x0000004a
176 #define RXFIFO_THR2_NORMAL      0x00a0
177
178 /* PLA_RXFIFO_CTRL2 */
179 #define RXFIFO_THR3_FULL        0x00000078
180 #define RXFIFO_THR3_HIGH        0x00000048
181 #define RXFIFO_THR3_OOB         0x0000005a
182 #define RXFIFO_THR3_NORMAL      0x0110
183
184 /* PLA_TXFIFO_CTRL */
185 #define TXFIFO_THR_NORMAL       0x00400008
186 #define TXFIFO_THR_NORMAL2      0x01000008
187
188 /* PLA_DMY_REG0 */
189 #define ECM_ALDPS               0x0002
190
191 /* PLA_FMC */
192 #define FMC_FCR_MCU_EN          0x0001
193
194 /* PLA_EEEP_CR */
195 #define EEEP_CR_EEEP_TX         0x0002
196
197 /* PLA_WDT6_CTRL */
198 #define WDT6_SET_MODE           0x0010
199
200 /* PLA_TCR0 */
201 #define TCR0_TX_EMPTY           0x0800
202 #define TCR0_AUTO_FIFO          0x0080
203
204 /* PLA_TCR1 */
205 #define VERSION_MASK            0x7cf0
206
207 /* PLA_MTPS */
208 #define MTPS_JUMBO              (12 * 1024 / 64)
209 #define MTPS_DEFAULT            (6 * 1024 / 64)
210
211 /* PLA_RSTTALLY */
212 #define TALLY_RESET             0x0001
213
214 /* PLA_CR */
215 #define CR_RST                  0x10
216 #define CR_RE                   0x08
217 #define CR_TE                   0x04
218
219 /* PLA_CRWECR */
220 #define CRWECR_NORAML           0x00
221 #define CRWECR_CONFIG           0xc0
222
223 /* PLA_OOB_CTRL */
224 #define NOW_IS_OOB              0x80
225 #define TXFIFO_EMPTY            0x20
226 #define RXFIFO_EMPTY            0x10
227 #define LINK_LIST_READY         0x02
228 #define DIS_MCU_CLROOB          0x01
229 #define FIFO_EMPTY              (TXFIFO_EMPTY | RXFIFO_EMPTY)
230
231 /* PLA_MISC_1 */
232 #define RXDY_GATED_EN           0x0008
233
234 /* PLA_SFF_STS_7 */
235 #define RE_INIT_LL              0x8000
236 #define MCU_BORW_EN             0x4000
237
238 /* PLA_CPCR */
239 #define CPCR_RX_VLAN            0x0040
240
241 /* PLA_CFG_WOL */
242 #define MAGIC_EN                0x0001
243
244 /* PLA_TEREDO_CFG */
245 #define TEREDO_SEL              0x8000
246 #define TEREDO_WAKE_MASK        0x7f00
247 #define TEREDO_RS_EVENT_MASK    0x00fe
248 #define OOB_TEREDO_EN           0x0001
249
250 /* PAL_BDC_CR */
251 #define ALDPS_PROXY_MODE        0x0001
252
253 /* PLA_CONFIG34 */
254 #define LINK_ON_WAKE_EN         0x0010
255 #define LINK_OFF_WAKE_EN        0x0008
256
257 /* PLA_CONFIG5 */
258 #define BWF_EN                  0x0040
259 #define MWF_EN                  0x0020
260 #define UWF_EN                  0x0010
261 #define LAN_WAKE_EN             0x0002
262
263 /* PLA_LED_FEATURE */
264 #define LED_MODE_MASK           0x0700
265
266 /* PLA_PHY_PWR */
267 #define TX_10M_IDLE_EN          0x0080
268 #define PFM_PWM_SWITCH          0x0040
269
270 /* PLA_MAC_PWR_CTRL */
271 #define D3_CLK_GATED_EN         0x00004000
272 #define MCU_CLK_RATIO           0x07010f07
273 #define MCU_CLK_RATIO_MASK      0x0f0f0f0f
274 #define ALDPS_SPDWN_RATIO       0x0f87
275
276 /* PLA_MAC_PWR_CTRL2 */
277 #define EEE_SPDWN_RATIO         0x8007
278
279 /* PLA_MAC_PWR_CTRL3 */
280 #define PKT_AVAIL_SPDWN_EN      0x0100
281 #define SUSPEND_SPDWN_EN        0x0004
282 #define U1U2_SPDWN_EN           0x0002
283 #define L1_SPDWN_EN             0x0001
284
285 /* PLA_MAC_PWR_CTRL4 */
286 #define PWRSAVE_SPDWN_EN        0x1000
287 #define RXDV_SPDWN_EN           0x0800
288 #define TX10MIDLE_EN            0x0100
289 #define TP100_SPDWN_EN          0x0020
290 #define TP500_SPDWN_EN          0x0010
291 #define TP1000_SPDWN_EN         0x0008
292 #define EEE_SPDWN_EN            0x0001
293
294 /* PLA_GPHY_INTR_IMR */
295 #define GPHY_STS_MSK            0x0001
296 #define SPEED_DOWN_MSK          0x0002
297 #define SPDWN_RXDV_MSK          0x0004
298 #define SPDWN_LINKCHG_MSK       0x0008
299
300 /* PLA_PHYAR */
301 #define PHYAR_FLAG              0x80000000
302
303 /* PLA_EEE_CR */
304 #define EEE_RX_EN               0x0001
305 #define EEE_TX_EN               0x0002
306
307 /* PLA_BOOT_CTRL */
308 #define AUTOLOAD_DONE           0x0002
309
310 /* USB_USB2PHY */
311 #define USB2PHY_SUSPEND         0x0001
312 #define USB2PHY_L1              0x0002
313
314 /* USB_SSPHYLINK2 */
315 #define pwd_dn_scale_mask       0x3ffe
316 #define pwd_dn_scale(x)         ((x) << 1)
317
318 /* USB_CSR_DUMMY1 */
319 #define DYNAMIC_BURST           0x0001
320
321 /* USB_CSR_DUMMY2 */
322 #define EP4_FULL_FC             0x0001
323
324 /* USB_DEV_STAT */
325 #define STAT_SPEED_MASK         0x0006
326 #define STAT_SPEED_HIGH         0x0000
327 #define STAT_SPEED_FULL         0x0002
328
329 /* USB_TX_AGG */
330 #define TX_AGG_MAX_THRESHOLD    0x03
331
332 /* USB_RX_BUF_TH */
333 #define RX_THR_SUPPER           0x0c350180
334 #define RX_THR_HIGH             0x7a120180
335 #define RX_THR_SLOW             0xffff0180
336
337 /* USB_TX_DMA */
338 #define TEST_MODE_DISABLE       0x00000001
339 #define TX_SIZE_ADJUST1         0x00000100
340
341 /* USB_UPS_CTRL */
342 #define POWER_CUT               0x0100
343
344 /* USB_PM_CTRL_STATUS */
345 #define RESUME_INDICATE         0x0001
346
347 /* USB_USB_CTRL */
348 #define RX_AGG_DISABLE          0x0010
349 #define RX_ZERO_EN              0x0080
350
351 /* USB_U2P3_CTRL */
352 #define U2P3_ENABLE             0x0001
353
354 /* USB_POWER_CUT */
355 #define PWR_EN                  0x0001
356 #define PHASE2_EN               0x0008
357
358 /* USB_MISC_0 */
359 #define PCUT_STATUS             0x0001
360
361 /* USB_RX_EARLY_TIMEOUT */
362 #define COALESCE_SUPER           85000U
363 #define COALESCE_HIGH           250000U
364 #define COALESCE_SLOW           524280U
365
366 /* USB_WDT11_CTRL */
367 #define TIMER11_EN              0x0001
368
369 /* USB_LPM_CTRL */
370 /* bit 4 ~ 5: fifo empty boundary */
371 #define FIFO_EMPTY_1FB          0x30    /* 0x1fb * 64 = 32448 bytes */
372 /* bit 2 ~ 3: LMP timer */
373 #define LPM_TIMER_MASK          0x0c
374 #define LPM_TIMER_500MS         0x04    /* 500 ms */
375 #define LPM_TIMER_500US         0x0c    /* 500 us */
376 #define ROK_EXIT_LPM            0x02
377
378 /* USB_AFE_CTRL2 */
379 #define SEN_VAL_MASK            0xf800
380 #define SEN_VAL_NORMAL          0xa000
381 #define SEL_RXIDLE              0x0100
382
383 /* OCP_ALDPS_CONFIG */
384 #define ENPWRSAVE               0x8000
385 #define ENPDNPS                 0x0200
386 #define LINKENA                 0x0100
387 #define DIS_SDSAVE              0x0010
388
389 /* OCP_PHY_STATUS */
390 #define PHY_STAT_MASK           0x0007
391 #define PHY_STAT_LAN_ON         3
392 #define PHY_STAT_PWRDN          5
393
394 /* OCP_POWER_CFG */
395 #define EEE_CLKDIV_EN           0x8000
396 #define EN_ALDPS                0x0004
397 #define EN_10M_PLLOFF           0x0001
398
399 /* OCP_EEE_CONFIG1 */
400 #define RG_TXLPI_MSK_HFDUP      0x8000
401 #define RG_MATCLR_EN            0x4000
402 #define EEE_10_CAP              0x2000
403 #define EEE_NWAY_EN             0x1000
404 #define TX_QUIET_EN             0x0200
405 #define RX_QUIET_EN             0x0100
406 #define sd_rise_time_mask       0x0070
407 #define sd_rise_time(x)         (min(x, 7) << 4)        /* bit 4 ~ 6 */
408 #define RG_RXLPI_MSK_HFDUP      0x0008
409 #define SDFALLTIME              0x0007  /* bit 0 ~ 2 */
410
411 /* OCP_EEE_CONFIG2 */
412 #define RG_LPIHYS_NUM           0x7000  /* bit 12 ~ 15 */
413 #define RG_DACQUIET_EN          0x0400
414 #define RG_LDVQUIET_EN          0x0200
415 #define RG_CKRSEL               0x0020
416 #define RG_EEEPRG_EN            0x0010
417
418 /* OCP_EEE_CONFIG3 */
419 #define fast_snr_mask           0xff80
420 #define fast_snr(x)             (min(x, 0x1ff) << 7)    /* bit 7 ~ 15 */
421 #define RG_LFS_SEL              0x0060  /* bit 6 ~ 5 */
422 #define MSK_PH                  0x0006  /* bit 0 ~ 3 */
423
424 /* OCP_EEE_AR */
425 /* bit[15:14] function */
426 #define FUN_ADDR                0x0000
427 #define FUN_DATA                0x4000
428 /* bit[4:0] device addr */
429
430 /* OCP_EEE_CFG */
431 #define CTAP_SHORT_EN           0x0040
432 #define EEE10_EN                0x0010
433
434 /* OCP_DOWN_SPEED */
435 #define EN_10M_BGOFF            0x0080
436
437 /* OCP_PHY_STATE */
438 #define TXDIS_STATE             0x01
439 #define ABD_STATE               0x02
440
441 /* OCP_ADC_CFG */
442 #define CKADSEL_L               0x0100
443 #define ADC_EN                  0x0080
444 #define EN_EMI_L                0x0040
445
446 /* SRAM_LPF_CFG */
447 #define LPF_AUTO_TUNE           0x8000
448
449 /* SRAM_10M_AMP1 */
450 #define GDAC_IB_UPALL           0x0008
451
452 /* SRAM_10M_AMP2 */
453 #define AMP_DN                  0x0200
454
455 /* SRAM_IMPEDANCE */
456 #define RX_DRIVING_MASK         0x6000
457
458 enum rtl_register_content {
459         _1000bps        = 0x10,
460         _100bps         = 0x08,
461         _10bps          = 0x04,
462         LINK_STATUS     = 0x02,
463         FULL_DUP        = 0x01,
464 };
465
466 #define RTL8152_MAX_TX          4
467 #define RTL8152_MAX_RX          10
468 #define INTBUFSIZE              2
469 #define CRC_SIZE                4
470 #define TX_ALIGN                4
471 #define RX_ALIGN                8
472
473 #define INTR_LINK               0x0004
474
475 #define RTL8152_REQT_READ       0xc0
476 #define RTL8152_REQT_WRITE      0x40
477 #define RTL8152_REQ_GET_REGS    0x05
478 #define RTL8152_REQ_SET_REGS    0x05
479
480 #define BYTE_EN_DWORD           0xff
481 #define BYTE_EN_WORD            0x33
482 #define BYTE_EN_BYTE            0x11
483 #define BYTE_EN_SIX_BYTES       0x3f
484 #define BYTE_EN_START_MASK      0x0f
485 #define BYTE_EN_END_MASK        0xf0
486
487 #define RTL8153_MAX_PACKET      9216 /* 9K */
488 #define RTL8153_MAX_MTU         (RTL8153_MAX_PACKET - VLAN_ETH_HLEN - VLAN_HLEN)
489 #define RTL8152_RMS             (VLAN_ETH_FRAME_LEN + VLAN_HLEN)
490 #define RTL8153_RMS             RTL8153_MAX_PACKET
491 #define RTL8152_TX_TIMEOUT      (5 * HZ)
492 #define RTL8152_NAPI_WEIGHT     64
493
494 /* rtl8152 flags */
495 enum rtl8152_flags {
496         RTL8152_UNPLUG = 0,
497         RTL8152_SET_RX_MODE,
498         WORK_ENABLE,
499         RTL8152_LINK_CHG,
500         SELECTIVE_SUSPEND,
501         PHY_RESET,
502         SCHEDULE_NAPI,
503 };
504
505 /* Define these values to match your device */
506 #define VENDOR_ID_REALTEK               0x0bda
507 #define VENDOR_ID_SAMSUNG               0x04e8
508 #define VENDOR_ID_LENOVO                0x17ef
509 #define VENDOR_ID_LINKSYS               0x13b1
510 #define VENDOR_ID_NVIDIA                0x0955
511
512 #define MCU_TYPE_PLA                    0x0100
513 #define MCU_TYPE_USB                    0x0000
514
515 struct tally_counter {
516         __le64  tx_packets;
517         __le64  rx_packets;
518         __le64  tx_errors;
519         __le32  rx_errors;
520         __le16  rx_missed;
521         __le16  align_errors;
522         __le32  tx_one_collision;
523         __le32  tx_multi_collision;
524         __le64  rx_unicast;
525         __le64  rx_broadcast;
526         __le32  rx_multicast;
527         __le16  tx_aborted;
528         __le16  tx_underrun;
529 };
530
531 struct rx_desc {
532         __le32 opts1;
533 #define RX_LEN_MASK                     0x7fff
534
535         __le32 opts2;
536 #define RD_UDP_CS                       BIT(23)
537 #define RD_TCP_CS                       BIT(22)
538 #define RD_IPV6_CS                      BIT(20)
539 #define RD_IPV4_CS                      BIT(19)
540
541         __le32 opts3;
542 #define IPF                             BIT(23) /* IP checksum fail */
543 #define UDPF                            BIT(22) /* UDP checksum fail */
544 #define TCPF                            BIT(21) /* TCP checksum fail */
545 #define RX_VLAN_TAG                     BIT(16)
546
547         __le32 opts4;
548         __le32 opts5;
549         __le32 opts6;
550 };
551
552 struct tx_desc {
553         __le32 opts1;
554 #define TX_FS                   BIT(31) /* First segment of a packet */
555 #define TX_LS                   BIT(30) /* Final segment of a packet */
556 #define GTSENDV4                BIT(28)
557 #define GTSENDV6                BIT(27)
558 #define GTTCPHO_SHIFT           18
559 #define GTTCPHO_MAX             0x7fU
560 #define TX_LEN_MAX              0x3ffffU
561
562         __le32 opts2;
563 #define UDP_CS                  BIT(31) /* Calculate UDP/IP checksum */
564 #define TCP_CS                  BIT(30) /* Calculate TCP/IP checksum */
565 #define IPV4_CS                 BIT(29) /* Calculate IPv4 checksum */
566 #define IPV6_CS                 BIT(28) /* Calculate IPv6 checksum */
567 #define MSS_SHIFT               17
568 #define MSS_MAX                 0x7ffU
569 #define TCPHO_SHIFT             17
570 #define TCPHO_MAX               0x7ffU
571 #define TX_VLAN_TAG             BIT(16)
572 };
573
574 struct r8152;
575
576 struct rx_agg {
577         struct list_head list;
578         struct urb *urb;
579         struct r8152 *context;
580         void *buffer;
581         void *head;
582 };
583
584 struct tx_agg {
585         struct list_head list;
586         struct urb *urb;
587         struct r8152 *context;
588         void *buffer;
589         void *head;
590         u32 skb_num;
591         u32 skb_len;
592 };
593
594 struct r8152 {
595         unsigned long flags;
596         struct usb_device *udev;
597         struct napi_struct napi;
598         struct usb_interface *intf;
599         struct net_device *netdev;
600         struct urb *intr_urb;
601         struct tx_agg tx_info[RTL8152_MAX_TX];
602         struct rx_agg rx_info[RTL8152_MAX_RX];
603         struct list_head rx_done, tx_free;
604         struct sk_buff_head tx_queue, rx_queue;
605         spinlock_t rx_lock, tx_lock;
606         struct delayed_work schedule;
607         struct mii_if_info mii;
608         struct mutex control;   /* use for hw setting */
609 #ifdef CONFIG_PM_SLEEP
610         struct notifier_block pm_notifier;
611 #endif
612
613         struct rtl_ops {
614                 void (*init)(struct r8152 *);
615                 int (*enable)(struct r8152 *);
616                 void (*disable)(struct r8152 *);
617                 void (*up)(struct r8152 *);
618                 void (*down)(struct r8152 *);
619                 void (*unload)(struct r8152 *);
620                 int (*eee_get)(struct r8152 *, struct ethtool_eee *);
621                 int (*eee_set)(struct r8152 *, struct ethtool_eee *);
622                 bool (*in_nway)(struct r8152 *);
623         } rtl_ops;
624
625         int intr_interval;
626         u32 saved_wolopts;
627         u32 msg_enable;
628         u32 tx_qlen;
629         u32 coalesce;
630         u16 ocp_base;
631         u8 *intr_buff;
632         u8 version;
633 };
634
635 enum rtl_version {
636         RTL_VER_UNKNOWN = 0,
637         RTL_VER_01,
638         RTL_VER_02,
639         RTL_VER_03,
640         RTL_VER_04,
641         RTL_VER_05,
642         RTL_VER_06,
643         RTL_VER_MAX
644 };
645
646 enum tx_csum_stat {
647         TX_CSUM_SUCCESS = 0,
648         TX_CSUM_TSO,
649         TX_CSUM_NONE
650 };
651
652 /* Maximum number of multicast addresses to filter (vs. Rx-all-multicast).
653  * The RTL chips use a 64 element hash table based on the Ethernet CRC.
654  */
655 static const int multicast_filter_limit = 32;
656 static unsigned int agg_buf_sz = 16384;
657
658 #define RTL_LIMITED_TSO_SIZE    (agg_buf_sz - sizeof(struct tx_desc) - \
659                                  VLAN_ETH_HLEN - VLAN_HLEN)
660
661 static
662 int get_registers(struct r8152 *tp, u16 value, u16 index, u16 size, void *data)
663 {
664         int ret;
665         void *tmp;
666
667         tmp = kmalloc(size, GFP_KERNEL);
668         if (!tmp)
669                 return -ENOMEM;
670
671         ret = usb_control_msg(tp->udev, usb_rcvctrlpipe(tp->udev, 0),
672                               RTL8152_REQ_GET_REGS, RTL8152_REQT_READ,
673                               value, index, tmp, size, 500);
674
675         memcpy(data, tmp, size);
676         kfree(tmp);
677
678         return ret;
679 }
680
681 static
682 int set_registers(struct r8152 *tp, u16 value, u16 index, u16 size, void *data)
683 {
684         int ret;
685         void *tmp;
686
687         tmp = kmemdup(data, size, GFP_KERNEL);
688         if (!tmp)
689                 return -ENOMEM;
690
691         ret = usb_control_msg(tp->udev, usb_sndctrlpipe(tp->udev, 0),
692                               RTL8152_REQ_SET_REGS, RTL8152_REQT_WRITE,
693                               value, index, tmp, size, 500);
694
695         kfree(tmp);
696
697         return ret;
698 }
699
700 static int generic_ocp_read(struct r8152 *tp, u16 index, u16 size,
701                             void *data, u16 type)
702 {
703         u16 limit = 64;
704         int ret = 0;
705
706         if (test_bit(RTL8152_UNPLUG, &tp->flags))
707                 return -ENODEV;
708
709         /* both size and indix must be 4 bytes align */
710         if ((size & 3) || !size || (index & 3) || !data)
711                 return -EPERM;
712
713         if ((u32)index + (u32)size > 0xffff)
714                 return -EPERM;
715
716         while (size) {
717                 if (size > limit) {
718                         ret = get_registers(tp, index, type, limit, data);
719                         if (ret < 0)
720                                 break;
721
722                         index += limit;
723                         data += limit;
724                         size -= limit;
725                 } else {
726                         ret = get_registers(tp, index, type, size, data);
727                         if (ret < 0)
728                                 break;
729
730                         index += size;
731                         data += size;
732                         size = 0;
733                         break;
734                 }
735         }
736
737         if (ret == -ENODEV)
738                 set_bit(RTL8152_UNPLUG, &tp->flags);
739
740         return ret;
741 }
742
743 static int generic_ocp_write(struct r8152 *tp, u16 index, u16 byteen,
744                              u16 size, void *data, u16 type)
745 {
746         int ret;
747         u16 byteen_start, byteen_end, byen;
748         u16 limit = 512;
749
750         if (test_bit(RTL8152_UNPLUG, &tp->flags))
751                 return -ENODEV;
752
753         /* both size and indix must be 4 bytes align */
754         if ((size & 3) || !size || (index & 3) || !data)
755                 return -EPERM;
756
757         if ((u32)index + (u32)size > 0xffff)
758                 return -EPERM;
759
760         byteen_start = byteen & BYTE_EN_START_MASK;
761         byteen_end = byteen & BYTE_EN_END_MASK;
762
763         byen = byteen_start | (byteen_start << 4);
764         ret = set_registers(tp, index, type | byen, 4, data);
765         if (ret < 0)
766                 goto error1;
767
768         index += 4;
769         data += 4;
770         size -= 4;
771
772         if (size) {
773                 size -= 4;
774
775                 while (size) {
776                         if (size > limit) {
777                                 ret = set_registers(tp, index,
778                                                     type | BYTE_EN_DWORD,
779                                                     limit, data);
780                                 if (ret < 0)
781                                         goto error1;
782
783                                 index += limit;
784                                 data += limit;
785                                 size -= limit;
786                         } else {
787                                 ret = set_registers(tp, index,
788                                                     type | BYTE_EN_DWORD,
789                                                     size, data);
790                                 if (ret < 0)
791                                         goto error1;
792
793                                 index += size;
794                                 data += size;
795                                 size = 0;
796                                 break;
797                         }
798                 }
799
800                 byen = byteen_end | (byteen_end >> 4);
801                 ret = set_registers(tp, index, type | byen, 4, data);
802                 if (ret < 0)
803                         goto error1;
804         }
805
806 error1:
807         if (ret == -ENODEV)
808                 set_bit(RTL8152_UNPLUG, &tp->flags);
809
810         return ret;
811 }
812
813 static inline
814 int pla_ocp_read(struct r8152 *tp, u16 index, u16 size, void *data)
815 {
816         return generic_ocp_read(tp, index, size, data, MCU_TYPE_PLA);
817 }
818
819 static inline
820 int pla_ocp_write(struct r8152 *tp, u16 index, u16 byteen, u16 size, void *data)
821 {
822         return generic_ocp_write(tp, index, byteen, size, data, MCU_TYPE_PLA);
823 }
824
825 static inline
826 int usb_ocp_read(struct r8152 *tp, u16 index, u16 size, void *data)
827 {
828         return generic_ocp_read(tp, index, size, data, MCU_TYPE_USB);
829 }
830
831 static inline
832 int usb_ocp_write(struct r8152 *tp, u16 index, u16 byteen, u16 size, void *data)
833 {
834         return generic_ocp_write(tp, index, byteen, size, data, MCU_TYPE_USB);
835 }
836
837 static u32 ocp_read_dword(struct r8152 *tp, u16 type, u16 index)
838 {
839         __le32 data;
840
841         generic_ocp_read(tp, index, sizeof(data), &data, type);
842
843         return __le32_to_cpu(data);
844 }
845
846 static void ocp_write_dword(struct r8152 *tp, u16 type, u16 index, u32 data)
847 {
848         __le32 tmp = __cpu_to_le32(data);
849
850         generic_ocp_write(tp, index, BYTE_EN_DWORD, sizeof(tmp), &tmp, type);
851 }
852
853 static u16 ocp_read_word(struct r8152 *tp, u16 type, u16 index)
854 {
855         u32 data;
856         __le32 tmp;
857         u8 shift = index & 2;
858
859         index &= ~3;
860
861         generic_ocp_read(tp, index, sizeof(tmp), &tmp, type);
862
863         data = __le32_to_cpu(tmp);
864         data >>= (shift * 8);
865         data &= 0xffff;
866
867         return (u16)data;
868 }
869
870 static void ocp_write_word(struct r8152 *tp, u16 type, u16 index, u32 data)
871 {
872         u32 mask = 0xffff;
873         __le32 tmp;
874         u16 byen = BYTE_EN_WORD;
875         u8 shift = index & 2;
876
877         data &= mask;
878
879         if (index & 2) {
880                 byen <<= shift;
881                 mask <<= (shift * 8);
882                 data <<= (shift * 8);
883                 index &= ~3;
884         }
885
886         tmp = __cpu_to_le32(data);
887
888         generic_ocp_write(tp, index, byen, sizeof(tmp), &tmp, type);
889 }
890
891 static u8 ocp_read_byte(struct r8152 *tp, u16 type, u16 index)
892 {
893         u32 data;
894         __le32 tmp;
895         u8 shift = index & 3;
896
897         index &= ~3;
898
899         generic_ocp_read(tp, index, sizeof(tmp), &tmp, type);
900
901         data = __le32_to_cpu(tmp);
902         data >>= (shift * 8);
903         data &= 0xff;
904
905         return (u8)data;
906 }
907
908 static void ocp_write_byte(struct r8152 *tp, u16 type, u16 index, u32 data)
909 {
910         u32 mask = 0xff;
911         __le32 tmp;
912         u16 byen = BYTE_EN_BYTE;
913         u8 shift = index & 3;
914
915         data &= mask;
916
917         if (index & 3) {
918                 byen <<= shift;
919                 mask <<= (shift * 8);
920                 data <<= (shift * 8);
921                 index &= ~3;
922         }
923
924         tmp = __cpu_to_le32(data);
925
926         generic_ocp_write(tp, index, byen, sizeof(tmp), &tmp, type);
927 }
928
929 static u16 ocp_reg_read(struct r8152 *tp, u16 addr)
930 {
931         u16 ocp_base, ocp_index;
932
933         ocp_base = addr & 0xf000;
934         if (ocp_base != tp->ocp_base) {
935                 ocp_write_word(tp, MCU_TYPE_PLA, PLA_OCP_GPHY_BASE, ocp_base);
936                 tp->ocp_base = ocp_base;
937         }
938
939         ocp_index = (addr & 0x0fff) | 0xb000;
940         return ocp_read_word(tp, MCU_TYPE_PLA, ocp_index);
941 }
942
943 static void ocp_reg_write(struct r8152 *tp, u16 addr, u16 data)
944 {
945         u16 ocp_base, ocp_index;
946
947         ocp_base = addr & 0xf000;
948         if (ocp_base != tp->ocp_base) {
949                 ocp_write_word(tp, MCU_TYPE_PLA, PLA_OCP_GPHY_BASE, ocp_base);
950                 tp->ocp_base = ocp_base;
951         }
952
953         ocp_index = (addr & 0x0fff) | 0xb000;
954         ocp_write_word(tp, MCU_TYPE_PLA, ocp_index, data);
955 }
956
957 static inline void r8152_mdio_write(struct r8152 *tp, u32 reg_addr, u32 value)
958 {
959         ocp_reg_write(tp, OCP_BASE_MII + reg_addr * 2, value);
960 }
961
962 static inline int r8152_mdio_read(struct r8152 *tp, u32 reg_addr)
963 {
964         return ocp_reg_read(tp, OCP_BASE_MII + reg_addr * 2);
965 }
966
967 static void sram_write(struct r8152 *tp, u16 addr, u16 data)
968 {
969         ocp_reg_write(tp, OCP_SRAM_ADDR, addr);
970         ocp_reg_write(tp, OCP_SRAM_DATA, data);
971 }
972
973 static int read_mii_word(struct net_device *netdev, int phy_id, int reg)
974 {
975         struct r8152 *tp = netdev_priv(netdev);
976         int ret;
977
978         if (test_bit(RTL8152_UNPLUG, &tp->flags))
979                 return -ENODEV;
980
981         if (phy_id != R8152_PHY_ID)
982                 return -EINVAL;
983
984         ret = r8152_mdio_read(tp, reg);
985
986         return ret;
987 }
988
989 static
990 void write_mii_word(struct net_device *netdev, int phy_id, int reg, int val)
991 {
992         struct r8152 *tp = netdev_priv(netdev);
993
994         if (test_bit(RTL8152_UNPLUG, &tp->flags))
995                 return;
996
997         if (phy_id != R8152_PHY_ID)
998                 return;
999
1000         r8152_mdio_write(tp, reg, val);
1001 }
1002
1003 static int
1004 r8152_submit_rx(struct r8152 *tp, struct rx_agg *agg, gfp_t mem_flags);
1005
1006 static int rtl8152_set_mac_address(struct net_device *netdev, void *p)
1007 {
1008         struct r8152 *tp = netdev_priv(netdev);
1009         struct sockaddr *addr = p;
1010         int ret = -EADDRNOTAVAIL;
1011
1012         if (!is_valid_ether_addr(addr->sa_data))
1013                 goto out1;
1014
1015         ret = usb_autopm_get_interface(tp->intf);
1016         if (ret < 0)
1017                 goto out1;
1018
1019         mutex_lock(&tp->control);
1020
1021         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
1022
1023         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
1024         pla_ocp_write(tp, PLA_IDR, BYTE_EN_SIX_BYTES, 8, addr->sa_data);
1025         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
1026
1027         mutex_unlock(&tp->control);
1028
1029         usb_autopm_put_interface(tp->intf);
1030 out1:
1031         return ret;
1032 }
1033
1034 static int set_ethernet_addr(struct r8152 *tp)
1035 {
1036         struct net_device *dev = tp->netdev;
1037         struct sockaddr sa;
1038         int ret;
1039
1040         if (tp->version == RTL_VER_01)
1041                 ret = pla_ocp_read(tp, PLA_IDR, 8, sa.sa_data);
1042         else
1043                 ret = pla_ocp_read(tp, PLA_BACKUP, 8, sa.sa_data);
1044
1045         if (ret < 0) {
1046                 netif_err(tp, probe, dev, "Get ether addr fail\n");
1047         } else if (!is_valid_ether_addr(sa.sa_data)) {
1048                 netif_err(tp, probe, dev, "Invalid ether addr %pM\n",
1049                           sa.sa_data);
1050                 eth_hw_addr_random(dev);
1051                 ether_addr_copy(sa.sa_data, dev->dev_addr);
1052                 ret = rtl8152_set_mac_address(dev, &sa);
1053                 netif_info(tp, probe, dev, "Random ether addr %pM\n",
1054                            sa.sa_data);
1055         } else {
1056                 if (tp->version == RTL_VER_01)
1057                         ether_addr_copy(dev->dev_addr, sa.sa_data);
1058                 else
1059                         ret = rtl8152_set_mac_address(dev, &sa);
1060         }
1061
1062         return ret;
1063 }
1064
1065 static void read_bulk_callback(struct urb *urb)
1066 {
1067         struct net_device *netdev;
1068         int status = urb->status;
1069         struct rx_agg *agg;
1070         struct r8152 *tp;
1071
1072         agg = urb->context;
1073         if (!agg)
1074                 return;
1075
1076         tp = agg->context;
1077         if (!tp)
1078                 return;
1079
1080         if (test_bit(RTL8152_UNPLUG, &tp->flags))
1081                 return;
1082
1083         if (!test_bit(WORK_ENABLE, &tp->flags))
1084                 return;
1085
1086         netdev = tp->netdev;
1087
1088         /* When link down, the driver would cancel all bulks. */
1089         /* This avoid the re-submitting bulk */
1090         if (!netif_carrier_ok(netdev))
1091                 return;
1092
1093         usb_mark_last_busy(tp->udev);
1094
1095         switch (status) {
1096         case 0:
1097                 if (urb->actual_length < ETH_ZLEN)
1098                         break;
1099
1100                 spin_lock(&tp->rx_lock);
1101                 list_add_tail(&agg->list, &tp->rx_done);
1102                 spin_unlock(&tp->rx_lock);
1103                 napi_schedule(&tp->napi);
1104                 return;
1105         case -ESHUTDOWN:
1106                 set_bit(RTL8152_UNPLUG, &tp->flags);
1107                 netif_device_detach(tp->netdev);
1108                 return;
1109         case -ENOENT:
1110                 return; /* the urb is in unlink state */
1111         case -ETIME:
1112                 if (net_ratelimit())
1113                         netdev_warn(netdev, "maybe reset is needed?\n");
1114                 break;
1115         default:
1116                 if (net_ratelimit())
1117                         netdev_warn(netdev, "Rx status %d\n", status);
1118                 break;
1119         }
1120
1121         r8152_submit_rx(tp, agg, GFP_ATOMIC);
1122 }
1123
1124 static void write_bulk_callback(struct urb *urb)
1125 {
1126         struct net_device_stats *stats;
1127         struct net_device *netdev;
1128         struct tx_agg *agg;
1129         struct r8152 *tp;
1130         int status = urb->status;
1131
1132         agg = urb->context;
1133         if (!agg)
1134                 return;
1135
1136         tp = agg->context;
1137         if (!tp)
1138                 return;
1139
1140         netdev = tp->netdev;
1141         stats = &netdev->stats;
1142         if (status) {
1143                 if (net_ratelimit())
1144                         netdev_warn(netdev, "Tx status %d\n", status);
1145                 stats->tx_errors += agg->skb_num;
1146         } else {
1147                 stats->tx_packets += agg->skb_num;
1148                 stats->tx_bytes += agg->skb_len;
1149         }
1150
1151         spin_lock(&tp->tx_lock);
1152         list_add_tail(&agg->list, &tp->tx_free);
1153         spin_unlock(&tp->tx_lock);
1154
1155         usb_autopm_put_interface_async(tp->intf);
1156
1157         if (!netif_carrier_ok(netdev))
1158                 return;
1159
1160         if (!test_bit(WORK_ENABLE, &tp->flags))
1161                 return;
1162
1163         if (test_bit(RTL8152_UNPLUG, &tp->flags))
1164                 return;
1165
1166         if (!skb_queue_empty(&tp->tx_queue))
1167                 napi_schedule(&tp->napi);
1168 }
1169
1170 static void intr_callback(struct urb *urb)
1171 {
1172         struct r8152 *tp;
1173         __le16 *d;
1174         int status = urb->status;
1175         int res;
1176
1177         tp = urb->context;
1178         if (!tp)
1179                 return;
1180
1181         if (!test_bit(WORK_ENABLE, &tp->flags))
1182                 return;
1183
1184         if (test_bit(RTL8152_UNPLUG, &tp->flags))
1185                 return;
1186
1187         switch (status) {
1188         case 0:                 /* success */
1189                 break;
1190         case -ECONNRESET:       /* unlink */
1191         case -ESHUTDOWN:
1192                 netif_device_detach(tp->netdev);
1193         case -ENOENT:
1194         case -EPROTO:
1195                 netif_info(tp, intr, tp->netdev,
1196                            "Stop submitting intr, status %d\n", status);
1197                 return;
1198         case -EOVERFLOW:
1199                 netif_info(tp, intr, tp->netdev, "intr status -EOVERFLOW\n");
1200                 goto resubmit;
1201         /* -EPIPE:  should clear the halt */
1202         default:
1203                 netif_info(tp, intr, tp->netdev, "intr status %d\n", status);
1204                 goto resubmit;
1205         }
1206
1207         d = urb->transfer_buffer;
1208         if (INTR_LINK & __le16_to_cpu(d[0])) {
1209                 if (!netif_carrier_ok(tp->netdev)) {
1210                         set_bit(RTL8152_LINK_CHG, &tp->flags);
1211                         schedule_delayed_work(&tp->schedule, 0);
1212                 }
1213         } else {
1214                 if (netif_carrier_ok(tp->netdev)) {
1215                         netif_stop_queue(tp->netdev);
1216                         set_bit(RTL8152_LINK_CHG, &tp->flags);
1217                         schedule_delayed_work(&tp->schedule, 0);
1218                 }
1219         }
1220
1221 resubmit:
1222         res = usb_submit_urb(urb, GFP_ATOMIC);
1223         if (res == -ENODEV) {
1224                 set_bit(RTL8152_UNPLUG, &tp->flags);
1225                 netif_device_detach(tp->netdev);
1226         } else if (res) {
1227                 netif_err(tp, intr, tp->netdev,
1228                           "can't resubmit intr, status %d\n", res);
1229         }
1230 }
1231
1232 static inline void *rx_agg_align(void *data)
1233 {
1234         return (void *)ALIGN((uintptr_t)data, RX_ALIGN);
1235 }
1236
1237 static inline void *tx_agg_align(void *data)
1238 {
1239         return (void *)ALIGN((uintptr_t)data, TX_ALIGN);
1240 }
1241
1242 static void free_all_mem(struct r8152 *tp)
1243 {
1244         int i;
1245
1246         for (i = 0; i < RTL8152_MAX_RX; i++) {
1247                 usb_free_urb(tp->rx_info[i].urb);
1248                 tp->rx_info[i].urb = NULL;
1249
1250                 kfree(tp->rx_info[i].buffer);
1251                 tp->rx_info[i].buffer = NULL;
1252                 tp->rx_info[i].head = NULL;
1253         }
1254
1255         for (i = 0; i < RTL8152_MAX_TX; i++) {
1256                 usb_free_urb(tp->tx_info[i].urb);
1257                 tp->tx_info[i].urb = NULL;
1258
1259                 kfree(tp->tx_info[i].buffer);
1260                 tp->tx_info[i].buffer = NULL;
1261                 tp->tx_info[i].head = NULL;
1262         }
1263
1264         usb_free_urb(tp->intr_urb);
1265         tp->intr_urb = NULL;
1266
1267         kfree(tp->intr_buff);
1268         tp->intr_buff = NULL;
1269 }
1270
1271 static int alloc_all_mem(struct r8152 *tp)
1272 {
1273         struct net_device *netdev = tp->netdev;
1274         struct usb_interface *intf = tp->intf;
1275         struct usb_host_interface *alt = intf->cur_altsetting;
1276         struct usb_host_endpoint *ep_intr = alt->endpoint + 2;
1277         struct urb *urb;
1278         int node, i;
1279         u8 *buf;
1280
1281         node = netdev->dev.parent ? dev_to_node(netdev->dev.parent) : -1;
1282
1283         spin_lock_init(&tp->rx_lock);
1284         spin_lock_init(&tp->tx_lock);
1285         INIT_LIST_HEAD(&tp->tx_free);
1286         INIT_LIST_HEAD(&tp->rx_done);
1287         skb_queue_head_init(&tp->tx_queue);
1288         skb_queue_head_init(&tp->rx_queue);
1289
1290         for (i = 0; i < RTL8152_MAX_RX; i++) {
1291                 buf = kmalloc_node(agg_buf_sz, GFP_KERNEL, node);
1292                 if (!buf)
1293                         goto err1;
1294
1295                 if (buf != rx_agg_align(buf)) {
1296                         kfree(buf);
1297                         buf = kmalloc_node(agg_buf_sz + RX_ALIGN, GFP_KERNEL,
1298                                            node);
1299                         if (!buf)
1300                                 goto err1;
1301                 }
1302
1303                 urb = usb_alloc_urb(0, GFP_KERNEL);
1304                 if (!urb) {
1305                         kfree(buf);
1306                         goto err1;
1307                 }
1308
1309                 INIT_LIST_HEAD(&tp->rx_info[i].list);
1310                 tp->rx_info[i].context = tp;
1311                 tp->rx_info[i].urb = urb;
1312                 tp->rx_info[i].buffer = buf;
1313                 tp->rx_info[i].head = rx_agg_align(buf);
1314         }
1315
1316         for (i = 0; i < RTL8152_MAX_TX; i++) {
1317                 buf = kmalloc_node(agg_buf_sz, GFP_KERNEL, node);
1318                 if (!buf)
1319                         goto err1;
1320
1321                 if (buf != tx_agg_align(buf)) {
1322                         kfree(buf);
1323                         buf = kmalloc_node(agg_buf_sz + TX_ALIGN, GFP_KERNEL,
1324                                            node);
1325                         if (!buf)
1326                                 goto err1;
1327                 }
1328
1329                 urb = usb_alloc_urb(0, GFP_KERNEL);
1330                 if (!urb) {
1331                         kfree(buf);
1332                         goto err1;
1333                 }
1334
1335                 INIT_LIST_HEAD(&tp->tx_info[i].list);
1336                 tp->tx_info[i].context = tp;
1337                 tp->tx_info[i].urb = urb;
1338                 tp->tx_info[i].buffer = buf;
1339                 tp->tx_info[i].head = tx_agg_align(buf);
1340
1341                 list_add_tail(&tp->tx_info[i].list, &tp->tx_free);
1342         }
1343
1344         tp->intr_urb = usb_alloc_urb(0, GFP_KERNEL);
1345         if (!tp->intr_urb)
1346                 goto err1;
1347
1348         tp->intr_buff = kmalloc(INTBUFSIZE, GFP_KERNEL);
1349         if (!tp->intr_buff)
1350                 goto err1;
1351
1352         tp->intr_interval = (int)ep_intr->desc.bInterval;
1353         usb_fill_int_urb(tp->intr_urb, tp->udev, usb_rcvintpipe(tp->udev, 3),
1354                          tp->intr_buff, INTBUFSIZE, intr_callback,
1355                          tp, tp->intr_interval);
1356
1357         return 0;
1358
1359 err1:
1360         free_all_mem(tp);
1361         return -ENOMEM;
1362 }
1363
1364 static struct tx_agg *r8152_get_tx_agg(struct r8152 *tp)
1365 {
1366         struct tx_agg *agg = NULL;
1367         unsigned long flags;
1368
1369         if (list_empty(&tp->tx_free))
1370                 return NULL;
1371
1372         spin_lock_irqsave(&tp->tx_lock, flags);
1373         if (!list_empty(&tp->tx_free)) {
1374                 struct list_head *cursor;
1375
1376                 cursor = tp->tx_free.next;
1377                 list_del_init(cursor);
1378                 agg = list_entry(cursor, struct tx_agg, list);
1379         }
1380         spin_unlock_irqrestore(&tp->tx_lock, flags);
1381
1382         return agg;
1383 }
1384
1385 /* r8152_csum_workaround()
1386  * The hw limites the value the transport offset. When the offset is out of the
1387  * range, calculate the checksum by sw.
1388  */
1389 static void r8152_csum_workaround(struct r8152 *tp, struct sk_buff *skb,
1390                                   struct sk_buff_head *list)
1391 {
1392         if (skb_shinfo(skb)->gso_size) {
1393                 netdev_features_t features = tp->netdev->features;
1394                 struct sk_buff_head seg_list;
1395                 struct sk_buff *segs, *nskb;
1396
1397                 features &= ~(NETIF_F_SG | NETIF_F_IPV6_CSUM | NETIF_F_TSO6);
1398                 segs = skb_gso_segment(skb, features);
1399                 if (IS_ERR(segs) || !segs)
1400                         goto drop;
1401
1402                 __skb_queue_head_init(&seg_list);
1403
1404                 do {
1405                         nskb = segs;
1406                         segs = segs->next;
1407                         nskb->next = NULL;
1408                         __skb_queue_tail(&seg_list, nskb);
1409                 } while (segs);
1410
1411                 skb_queue_splice(&seg_list, list);
1412                 dev_kfree_skb(skb);
1413         } else if (skb->ip_summed == CHECKSUM_PARTIAL) {
1414                 if (skb_checksum_help(skb) < 0)
1415                         goto drop;
1416
1417                 __skb_queue_head(list, skb);
1418         } else {
1419                 struct net_device_stats *stats;
1420
1421 drop:
1422                 stats = &tp->netdev->stats;
1423                 stats->tx_dropped++;
1424                 dev_kfree_skb(skb);
1425         }
1426 }
1427
1428 /* msdn_giant_send_check()
1429  * According to the document of microsoft, the TCP Pseudo Header excludes the
1430  * packet length for IPv6 TCP large packets.
1431  */
1432 static int msdn_giant_send_check(struct sk_buff *skb)
1433 {
1434         const struct ipv6hdr *ipv6h;
1435         struct tcphdr *th;
1436         int ret;
1437
1438         ret = skb_cow_head(skb, 0);
1439         if (ret)
1440                 return ret;
1441
1442         ipv6h = ipv6_hdr(skb);
1443         th = tcp_hdr(skb);
1444
1445         th->check = 0;
1446         th->check = ~tcp_v6_check(0, &ipv6h->saddr, &ipv6h->daddr, 0);
1447
1448         return ret;
1449 }
1450
1451 static inline void rtl_tx_vlan_tag(struct tx_desc *desc, struct sk_buff *skb)
1452 {
1453         if (skb_vlan_tag_present(skb)) {
1454                 u32 opts2;
1455
1456                 opts2 = TX_VLAN_TAG | swab16(skb_vlan_tag_get(skb));
1457                 desc->opts2 |= cpu_to_le32(opts2);
1458         }
1459 }
1460
1461 static inline void rtl_rx_vlan_tag(struct rx_desc *desc, struct sk_buff *skb)
1462 {
1463         u32 opts2 = le32_to_cpu(desc->opts2);
1464
1465         if (opts2 & RX_VLAN_TAG)
1466                 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q),
1467                                        swab16(opts2 & 0xffff));
1468 }
1469
1470 static int r8152_tx_csum(struct r8152 *tp, struct tx_desc *desc,
1471                          struct sk_buff *skb, u32 len, u32 transport_offset)
1472 {
1473         u32 mss = skb_shinfo(skb)->gso_size;
1474         u32 opts1, opts2 = 0;
1475         int ret = TX_CSUM_SUCCESS;
1476
1477         WARN_ON_ONCE(len > TX_LEN_MAX);
1478
1479         opts1 = len | TX_FS | TX_LS;
1480
1481         if (mss) {
1482                 if (transport_offset > GTTCPHO_MAX) {
1483                         netif_warn(tp, tx_err, tp->netdev,
1484                                    "Invalid transport offset 0x%x for TSO\n",
1485                                    transport_offset);
1486                         ret = TX_CSUM_TSO;
1487                         goto unavailable;
1488                 }
1489
1490                 switch (vlan_get_protocol(skb)) {
1491                 case htons(ETH_P_IP):
1492                         opts1 |= GTSENDV4;
1493                         break;
1494
1495                 case htons(ETH_P_IPV6):
1496                         if (msdn_giant_send_check(skb)) {
1497                                 ret = TX_CSUM_TSO;
1498                                 goto unavailable;
1499                         }
1500                         opts1 |= GTSENDV6;
1501                         break;
1502
1503                 default:
1504                         WARN_ON_ONCE(1);
1505                         break;
1506                 }
1507
1508                 opts1 |= transport_offset << GTTCPHO_SHIFT;
1509                 opts2 |= min(mss, MSS_MAX) << MSS_SHIFT;
1510         } else if (skb->ip_summed == CHECKSUM_PARTIAL) {
1511                 u8 ip_protocol;
1512
1513                 if (transport_offset > TCPHO_MAX) {
1514                         netif_warn(tp, tx_err, tp->netdev,
1515                                    "Invalid transport offset 0x%x\n",
1516                                    transport_offset);
1517                         ret = TX_CSUM_NONE;
1518                         goto unavailable;
1519                 }
1520
1521                 switch (vlan_get_protocol(skb)) {
1522                 case htons(ETH_P_IP):
1523                         opts2 |= IPV4_CS;
1524                         ip_protocol = ip_hdr(skb)->protocol;
1525                         break;
1526
1527                 case htons(ETH_P_IPV6):
1528                         opts2 |= IPV6_CS;
1529                         ip_protocol = ipv6_hdr(skb)->nexthdr;
1530                         break;
1531
1532                 default:
1533                         ip_protocol = IPPROTO_RAW;
1534                         break;
1535                 }
1536
1537                 if (ip_protocol == IPPROTO_TCP)
1538                         opts2 |= TCP_CS;
1539                 else if (ip_protocol == IPPROTO_UDP)
1540                         opts2 |= UDP_CS;
1541                 else
1542                         WARN_ON_ONCE(1);
1543
1544                 opts2 |= transport_offset << TCPHO_SHIFT;
1545         }
1546
1547         desc->opts2 = cpu_to_le32(opts2);
1548         desc->opts1 = cpu_to_le32(opts1);
1549
1550 unavailable:
1551         return ret;
1552 }
1553
1554 static int r8152_tx_agg_fill(struct r8152 *tp, struct tx_agg *agg)
1555 {
1556         struct sk_buff_head skb_head, *tx_queue = &tp->tx_queue;
1557         int remain, ret;
1558         u8 *tx_data;
1559
1560         __skb_queue_head_init(&skb_head);
1561         spin_lock(&tx_queue->lock);
1562         skb_queue_splice_init(tx_queue, &skb_head);
1563         spin_unlock(&tx_queue->lock);
1564
1565         tx_data = agg->head;
1566         agg->skb_num = 0;
1567         agg->skb_len = 0;
1568         remain = agg_buf_sz;
1569
1570         while (remain >= ETH_ZLEN + sizeof(struct tx_desc)) {
1571                 struct tx_desc *tx_desc;
1572                 struct sk_buff *skb;
1573                 unsigned int len;
1574                 u32 offset;
1575
1576                 skb = __skb_dequeue(&skb_head);
1577                 if (!skb)
1578                         break;
1579
1580                 len = skb->len + sizeof(*tx_desc);
1581
1582                 if (len > remain) {
1583                         __skb_queue_head(&skb_head, skb);
1584                         break;
1585                 }
1586
1587                 tx_data = tx_agg_align(tx_data);
1588                 tx_desc = (struct tx_desc *)tx_data;
1589
1590                 offset = (u32)skb_transport_offset(skb);
1591
1592                 if (r8152_tx_csum(tp, tx_desc, skb, skb->len, offset)) {
1593                         r8152_csum_workaround(tp, skb, &skb_head);
1594                         continue;
1595                 }
1596
1597                 rtl_tx_vlan_tag(tx_desc, skb);
1598
1599                 tx_data += sizeof(*tx_desc);
1600
1601                 len = skb->len;
1602                 if (skb_copy_bits(skb, 0, tx_data, len) < 0) {
1603                         struct net_device_stats *stats = &tp->netdev->stats;
1604
1605                         stats->tx_dropped++;
1606                         dev_kfree_skb_any(skb);
1607                         tx_data -= sizeof(*tx_desc);
1608                         continue;
1609                 }
1610
1611                 tx_data += len;
1612                 agg->skb_len += len;
1613                 agg->skb_num += skb_shinfo(skb)->gso_segs ?: 1;
1614
1615                 dev_kfree_skb_any(skb);
1616
1617                 remain = agg_buf_sz - (int)(tx_agg_align(tx_data) - agg->head);
1618         }
1619
1620         if (!skb_queue_empty(&skb_head)) {
1621                 spin_lock(&tx_queue->lock);
1622                 skb_queue_splice(&skb_head, tx_queue);
1623                 spin_unlock(&tx_queue->lock);
1624         }
1625
1626         netif_tx_lock(tp->netdev);
1627
1628         if (netif_queue_stopped(tp->netdev) &&
1629             skb_queue_len(&tp->tx_queue) < tp->tx_qlen)
1630                 netif_wake_queue(tp->netdev);
1631
1632         netif_tx_unlock(tp->netdev);
1633
1634         ret = usb_autopm_get_interface_async(tp->intf);
1635         if (ret < 0)
1636                 goto out_tx_fill;
1637
1638         usb_fill_bulk_urb(agg->urb, tp->udev, usb_sndbulkpipe(tp->udev, 2),
1639                           agg->head, (int)(tx_data - (u8 *)agg->head),
1640                           (usb_complete_t)write_bulk_callback, agg);
1641
1642         ret = usb_submit_urb(agg->urb, GFP_ATOMIC);
1643         if (ret < 0)
1644                 usb_autopm_put_interface_async(tp->intf);
1645
1646 out_tx_fill:
1647         return ret;
1648 }
1649
1650 static u8 r8152_rx_csum(struct r8152 *tp, struct rx_desc *rx_desc)
1651 {
1652         u8 checksum = CHECKSUM_NONE;
1653         u32 opts2, opts3;
1654
1655         if (!(tp->netdev->features & NETIF_F_RXCSUM))
1656                 goto return_result;
1657
1658         opts2 = le32_to_cpu(rx_desc->opts2);
1659         opts3 = le32_to_cpu(rx_desc->opts3);
1660
1661         if (opts2 & RD_IPV4_CS) {
1662                 if (opts3 & IPF)
1663                         checksum = CHECKSUM_NONE;
1664                 else if ((opts2 & RD_UDP_CS) && (opts3 & UDPF))
1665                         checksum = CHECKSUM_NONE;
1666                 else if ((opts2 & RD_TCP_CS) && (opts3 & TCPF))
1667                         checksum = CHECKSUM_NONE;
1668                 else
1669                         checksum = CHECKSUM_UNNECESSARY;
1670         } else if (RD_IPV6_CS) {
1671                 if ((opts2 & RD_UDP_CS) && !(opts3 & UDPF))
1672                         checksum = CHECKSUM_UNNECESSARY;
1673                 else if ((opts2 & RD_TCP_CS) && !(opts3 & TCPF))
1674                         checksum = CHECKSUM_UNNECESSARY;
1675         }
1676
1677 return_result:
1678         return checksum;
1679 }
1680
1681 static int rx_bottom(struct r8152 *tp, int budget)
1682 {
1683         unsigned long flags;
1684         struct list_head *cursor, *next, rx_queue;
1685         int ret = 0, work_done = 0;
1686
1687         if (!skb_queue_empty(&tp->rx_queue)) {
1688                 while (work_done < budget) {
1689                         struct sk_buff *skb = __skb_dequeue(&tp->rx_queue);
1690                         struct net_device *netdev = tp->netdev;
1691                         struct net_device_stats *stats = &netdev->stats;
1692                         unsigned int pkt_len;
1693
1694                         if (!skb)
1695                                 break;
1696
1697                         pkt_len = skb->len;
1698                         napi_gro_receive(&tp->napi, skb);
1699                         work_done++;
1700                         stats->rx_packets++;
1701                         stats->rx_bytes += pkt_len;
1702                 }
1703         }
1704
1705         if (list_empty(&tp->rx_done))
1706                 goto out1;
1707
1708         INIT_LIST_HEAD(&rx_queue);
1709         spin_lock_irqsave(&tp->rx_lock, flags);
1710         list_splice_init(&tp->rx_done, &rx_queue);
1711         spin_unlock_irqrestore(&tp->rx_lock, flags);
1712
1713         list_for_each_safe(cursor, next, &rx_queue) {
1714                 struct rx_desc *rx_desc;
1715                 struct rx_agg *agg;
1716                 int len_used = 0;
1717                 struct urb *urb;
1718                 u8 *rx_data;
1719
1720                 list_del_init(cursor);
1721
1722                 agg = list_entry(cursor, struct rx_agg, list);
1723                 urb = agg->urb;
1724                 if (urb->actual_length < ETH_ZLEN)
1725                         goto submit;
1726
1727                 rx_desc = agg->head;
1728                 rx_data = agg->head;
1729                 len_used += sizeof(struct rx_desc);
1730
1731                 while (urb->actual_length > len_used) {
1732                         struct net_device *netdev = tp->netdev;
1733                         struct net_device_stats *stats = &netdev->stats;
1734                         unsigned int pkt_len;
1735                         struct sk_buff *skb;
1736
1737                         pkt_len = le32_to_cpu(rx_desc->opts1) & RX_LEN_MASK;
1738                         if (pkt_len < ETH_ZLEN)
1739                                 break;
1740
1741                         len_used += pkt_len;
1742                         if (urb->actual_length < len_used)
1743                                 break;
1744
1745                         pkt_len -= CRC_SIZE;
1746                         rx_data += sizeof(struct rx_desc);
1747
1748                         skb = netdev_alloc_skb_ip_align(netdev, pkt_len);
1749                         if (!skb) {
1750                                 stats->rx_dropped++;
1751                                 goto find_next_rx;
1752                         }
1753
1754                         skb->ip_summed = r8152_rx_csum(tp, rx_desc);
1755                         memcpy(skb->data, rx_data, pkt_len);
1756                         skb_put(skb, pkt_len);
1757                         skb->protocol = eth_type_trans(skb, netdev);
1758                         rtl_rx_vlan_tag(rx_desc, skb);
1759                         if (work_done < budget) {
1760                                 napi_gro_receive(&tp->napi, skb);
1761                                 work_done++;
1762                                 stats->rx_packets++;
1763                                 stats->rx_bytes += pkt_len;
1764                         } else {
1765                                 __skb_queue_tail(&tp->rx_queue, skb);
1766                         }
1767
1768 find_next_rx:
1769                         rx_data = rx_agg_align(rx_data + pkt_len + CRC_SIZE);
1770                         rx_desc = (struct rx_desc *)rx_data;
1771                         len_used = (int)(rx_data - (u8 *)agg->head);
1772                         len_used += sizeof(struct rx_desc);
1773                 }
1774
1775 submit:
1776                 if (!ret) {
1777                         ret = r8152_submit_rx(tp, agg, GFP_ATOMIC);
1778                 } else {
1779                         urb->actual_length = 0;
1780                         list_add_tail(&agg->list, next);
1781                 }
1782         }
1783
1784         if (!list_empty(&rx_queue)) {
1785                 spin_lock_irqsave(&tp->rx_lock, flags);
1786                 list_splice_tail(&rx_queue, &tp->rx_done);
1787                 spin_unlock_irqrestore(&tp->rx_lock, flags);
1788         }
1789
1790 out1:
1791         return work_done;
1792 }
1793
1794 static void tx_bottom(struct r8152 *tp)
1795 {
1796         int res;
1797
1798         do {
1799                 struct tx_agg *agg;
1800
1801                 if (skb_queue_empty(&tp->tx_queue))
1802                         break;
1803
1804                 agg = r8152_get_tx_agg(tp);
1805                 if (!agg)
1806                         break;
1807
1808                 res = r8152_tx_agg_fill(tp, agg);
1809                 if (res) {
1810                         struct net_device *netdev = tp->netdev;
1811
1812                         if (res == -ENODEV) {
1813                                 set_bit(RTL8152_UNPLUG, &tp->flags);
1814                                 netif_device_detach(netdev);
1815                         } else {
1816                                 struct net_device_stats *stats = &netdev->stats;
1817                                 unsigned long flags;
1818
1819                                 netif_warn(tp, tx_err, netdev,
1820                                            "failed tx_urb %d\n", res);
1821                                 stats->tx_dropped += agg->skb_num;
1822
1823                                 spin_lock_irqsave(&tp->tx_lock, flags);
1824                                 list_add_tail(&agg->list, &tp->tx_free);
1825                                 spin_unlock_irqrestore(&tp->tx_lock, flags);
1826                         }
1827                 }
1828         } while (res == 0);
1829 }
1830
1831 static void bottom_half(struct r8152 *tp)
1832 {
1833         if (test_bit(RTL8152_UNPLUG, &tp->flags))
1834                 return;
1835
1836         if (!test_bit(WORK_ENABLE, &tp->flags))
1837                 return;
1838
1839         /* When link down, the driver would cancel all bulks. */
1840         /* This avoid the re-submitting bulk */
1841         if (!netif_carrier_ok(tp->netdev))
1842                 return;
1843
1844         clear_bit(SCHEDULE_NAPI, &tp->flags);
1845
1846         tx_bottom(tp);
1847 }
1848
1849 static int r8152_poll(struct napi_struct *napi, int budget)
1850 {
1851         struct r8152 *tp = container_of(napi, struct r8152, napi);
1852         int work_done;
1853
1854         work_done = rx_bottom(tp, budget);
1855         bottom_half(tp);
1856
1857         if (work_done < budget) {
1858                 napi_complete(napi);
1859                 if (!list_empty(&tp->rx_done))
1860                         napi_schedule(napi);
1861                 else if (!skb_queue_empty(&tp->tx_queue) &&
1862                          !list_empty(&tp->tx_free))
1863                         napi_schedule(napi);
1864         }
1865
1866         return work_done;
1867 }
1868
1869 static
1870 int r8152_submit_rx(struct r8152 *tp, struct rx_agg *agg, gfp_t mem_flags)
1871 {
1872         int ret;
1873
1874         /* The rx would be stopped, so skip submitting */
1875         if (test_bit(RTL8152_UNPLUG, &tp->flags) ||
1876             !test_bit(WORK_ENABLE, &tp->flags) || !netif_carrier_ok(tp->netdev))
1877                 return 0;
1878
1879         usb_fill_bulk_urb(agg->urb, tp->udev, usb_rcvbulkpipe(tp->udev, 1),
1880                           agg->head, agg_buf_sz,
1881                           (usb_complete_t)read_bulk_callback, agg);
1882
1883         ret = usb_submit_urb(agg->urb, mem_flags);
1884         if (ret == -ENODEV) {
1885                 set_bit(RTL8152_UNPLUG, &tp->flags);
1886                 netif_device_detach(tp->netdev);
1887         } else if (ret) {
1888                 struct urb *urb = agg->urb;
1889                 unsigned long flags;
1890
1891                 urb->actual_length = 0;
1892                 spin_lock_irqsave(&tp->rx_lock, flags);
1893                 list_add_tail(&agg->list, &tp->rx_done);
1894                 spin_unlock_irqrestore(&tp->rx_lock, flags);
1895
1896                 netif_err(tp, rx_err, tp->netdev,
1897                           "Couldn't submit rx[%p], ret = %d\n", agg, ret);
1898
1899                 napi_schedule(&tp->napi);
1900         }
1901
1902         return ret;
1903 }
1904
1905 static void rtl_drop_queued_tx(struct r8152 *tp)
1906 {
1907         struct net_device_stats *stats = &tp->netdev->stats;
1908         struct sk_buff_head skb_head, *tx_queue = &tp->tx_queue;
1909         struct sk_buff *skb;
1910
1911         if (skb_queue_empty(tx_queue))
1912                 return;
1913
1914         __skb_queue_head_init(&skb_head);
1915         spin_lock_bh(&tx_queue->lock);
1916         skb_queue_splice_init(tx_queue, &skb_head);
1917         spin_unlock_bh(&tx_queue->lock);
1918
1919         while ((skb = __skb_dequeue(&skb_head))) {
1920                 dev_kfree_skb(skb);
1921                 stats->tx_dropped++;
1922         }
1923 }
1924
1925 static void rtl8152_tx_timeout(struct net_device *netdev)
1926 {
1927         struct r8152 *tp = netdev_priv(netdev);
1928
1929         netif_warn(tp, tx_err, netdev, "Tx timeout\n");
1930
1931         usb_queue_reset_device(tp->intf);
1932 }
1933
1934 static void rtl8152_set_rx_mode(struct net_device *netdev)
1935 {
1936         struct r8152 *tp = netdev_priv(netdev);
1937
1938         if (netif_carrier_ok(netdev)) {
1939                 set_bit(RTL8152_SET_RX_MODE, &tp->flags);
1940                 schedule_delayed_work(&tp->schedule, 0);
1941         }
1942 }
1943
1944 static void _rtl8152_set_rx_mode(struct net_device *netdev)
1945 {
1946         struct r8152 *tp = netdev_priv(netdev);
1947         u32 mc_filter[2];       /* Multicast hash filter */
1948         __le32 tmp[2];
1949         u32 ocp_data;
1950
1951         netif_stop_queue(netdev);
1952         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
1953         ocp_data &= ~RCR_ACPT_ALL;
1954         ocp_data |= RCR_AB | RCR_APM;
1955
1956         if (netdev->flags & IFF_PROMISC) {
1957                 /* Unconditionally log net taps. */
1958                 netif_notice(tp, link, netdev, "Promiscuous mode enabled\n");
1959                 ocp_data |= RCR_AM | RCR_AAP;
1960                 mc_filter[1] = 0xffffffff;
1961                 mc_filter[0] = 0xffffffff;
1962         } else if ((netdev_mc_count(netdev) > multicast_filter_limit) ||
1963                    (netdev->flags & IFF_ALLMULTI)) {
1964                 /* Too many to filter perfectly -- accept all multicasts. */
1965                 ocp_data |= RCR_AM;
1966                 mc_filter[1] = 0xffffffff;
1967                 mc_filter[0] = 0xffffffff;
1968         } else {
1969                 struct netdev_hw_addr *ha;
1970
1971                 mc_filter[1] = 0;
1972                 mc_filter[0] = 0;
1973                 netdev_for_each_mc_addr(ha, netdev) {
1974                         int bit_nr = ether_crc(ETH_ALEN, ha->addr) >> 26;
1975
1976                         mc_filter[bit_nr >> 5] |= 1 << (bit_nr & 31);
1977                         ocp_data |= RCR_AM;
1978                 }
1979         }
1980
1981         tmp[0] = __cpu_to_le32(swab32(mc_filter[1]));
1982         tmp[1] = __cpu_to_le32(swab32(mc_filter[0]));
1983
1984         pla_ocp_write(tp, PLA_MAR, BYTE_EN_DWORD, sizeof(tmp), tmp);
1985         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
1986         netif_wake_queue(netdev);
1987 }
1988
1989 static netdev_features_t
1990 rtl8152_features_check(struct sk_buff *skb, struct net_device *dev,
1991                        netdev_features_t features)
1992 {
1993         u32 mss = skb_shinfo(skb)->gso_size;
1994         int max_offset = mss ? GTTCPHO_MAX : TCPHO_MAX;
1995         int offset = skb_transport_offset(skb);
1996
1997         if ((mss || skb->ip_summed == CHECKSUM_PARTIAL) && offset > max_offset)
1998                 features &= ~(NETIF_F_ALL_CSUM | NETIF_F_GSO_MASK);
1999         else if ((skb->len + sizeof(struct tx_desc)) > agg_buf_sz)
2000                 features &= ~NETIF_F_GSO_MASK;
2001
2002         return features;
2003 }
2004
2005 static netdev_tx_t rtl8152_start_xmit(struct sk_buff *skb,
2006                                       struct net_device *netdev)
2007 {
2008         struct r8152 *tp = netdev_priv(netdev);
2009
2010         skb_tx_timestamp(skb);
2011
2012         skb_queue_tail(&tp->tx_queue, skb);
2013
2014         if (!list_empty(&tp->tx_free)) {
2015                 if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
2016                         set_bit(SCHEDULE_NAPI, &tp->flags);
2017                         schedule_delayed_work(&tp->schedule, 0);
2018                 } else {
2019                         usb_mark_last_busy(tp->udev);
2020                         napi_schedule(&tp->napi);
2021                 }
2022         } else if (skb_queue_len(&tp->tx_queue) > tp->tx_qlen) {
2023                 netif_stop_queue(netdev);
2024         }
2025
2026         return NETDEV_TX_OK;
2027 }
2028
2029 static void r8152b_reset_packet_filter(struct r8152 *tp)
2030 {
2031         u32     ocp_data;
2032
2033         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_FMC);
2034         ocp_data &= ~FMC_FCR_MCU_EN;
2035         ocp_write_word(tp, MCU_TYPE_PLA, PLA_FMC, ocp_data);
2036         ocp_data |= FMC_FCR_MCU_EN;
2037         ocp_write_word(tp, MCU_TYPE_PLA, PLA_FMC, ocp_data);
2038 }
2039
2040 static void rtl8152_nic_reset(struct r8152 *tp)
2041 {
2042         int     i;
2043
2044         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, CR_RST);
2045
2046         for (i = 0; i < 1000; i++) {
2047                 if (!(ocp_read_byte(tp, MCU_TYPE_PLA, PLA_CR) & CR_RST))
2048                         break;
2049                 usleep_range(100, 400);
2050         }
2051 }
2052
2053 static void set_tx_qlen(struct r8152 *tp)
2054 {
2055         struct net_device *netdev = tp->netdev;
2056
2057         tp->tx_qlen = agg_buf_sz / (netdev->mtu + VLAN_ETH_HLEN + VLAN_HLEN +
2058                                     sizeof(struct tx_desc));
2059 }
2060
2061 static inline u8 rtl8152_get_speed(struct r8152 *tp)
2062 {
2063         return ocp_read_byte(tp, MCU_TYPE_PLA, PLA_PHYSTATUS);
2064 }
2065
2066 static void rtl_set_eee_plus(struct r8152 *tp)
2067 {
2068         u32 ocp_data;
2069         u8 speed;
2070
2071         speed = rtl8152_get_speed(tp);
2072         if (speed & _10bps) {
2073                 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR);
2074                 ocp_data |= EEEP_CR_EEEP_TX;
2075                 ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR, ocp_data);
2076         } else {
2077                 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR);
2078                 ocp_data &= ~EEEP_CR_EEEP_TX;
2079                 ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR, ocp_data);
2080         }
2081 }
2082
2083 static void rxdy_gated_en(struct r8152 *tp, bool enable)
2084 {
2085         u32 ocp_data;
2086
2087         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_MISC_1);
2088         if (enable)
2089                 ocp_data |= RXDY_GATED_EN;
2090         else
2091                 ocp_data &= ~RXDY_GATED_EN;
2092         ocp_write_word(tp, MCU_TYPE_PLA, PLA_MISC_1, ocp_data);
2093 }
2094
2095 static int rtl_start_rx(struct r8152 *tp)
2096 {
2097         int i, ret = 0;
2098
2099         INIT_LIST_HEAD(&tp->rx_done);
2100         for (i = 0; i < RTL8152_MAX_RX; i++) {
2101                 INIT_LIST_HEAD(&tp->rx_info[i].list);
2102                 ret = r8152_submit_rx(tp, &tp->rx_info[i], GFP_KERNEL);
2103                 if (ret)
2104                         break;
2105         }
2106
2107         if (ret && ++i < RTL8152_MAX_RX) {
2108                 struct list_head rx_queue;
2109                 unsigned long flags;
2110
2111                 INIT_LIST_HEAD(&rx_queue);
2112
2113                 do {
2114                         struct rx_agg *agg = &tp->rx_info[i++];
2115                         struct urb *urb = agg->urb;
2116
2117                         urb->actual_length = 0;
2118                         list_add_tail(&agg->list, &rx_queue);
2119                 } while (i < RTL8152_MAX_RX);
2120
2121                 spin_lock_irqsave(&tp->rx_lock, flags);
2122                 list_splice_tail(&rx_queue, &tp->rx_done);
2123                 spin_unlock_irqrestore(&tp->rx_lock, flags);
2124         }
2125
2126         return ret;
2127 }
2128
2129 static int rtl_stop_rx(struct r8152 *tp)
2130 {
2131         int i;
2132
2133         for (i = 0; i < RTL8152_MAX_RX; i++)
2134                 usb_kill_urb(tp->rx_info[i].urb);
2135
2136         while (!skb_queue_empty(&tp->rx_queue))
2137                 dev_kfree_skb(__skb_dequeue(&tp->rx_queue));
2138
2139         return 0;
2140 }
2141
2142 static int rtl_enable(struct r8152 *tp)
2143 {
2144         u32 ocp_data;
2145
2146         r8152b_reset_packet_filter(tp);
2147
2148         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_CR);
2149         ocp_data |= CR_RE | CR_TE;
2150         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, ocp_data);
2151
2152         rxdy_gated_en(tp, false);
2153
2154         return 0;
2155 }
2156
2157 static int rtl8152_enable(struct r8152 *tp)
2158 {
2159         if (test_bit(RTL8152_UNPLUG, &tp->flags))
2160                 return -ENODEV;
2161
2162         set_tx_qlen(tp);
2163         rtl_set_eee_plus(tp);
2164
2165         return rtl_enable(tp);
2166 }
2167
2168 static void r8153_set_rx_early_timeout(struct r8152 *tp)
2169 {
2170         u32 ocp_data = tp->coalesce / 8;
2171
2172         ocp_write_word(tp, MCU_TYPE_USB, USB_RX_EARLY_TIMEOUT, ocp_data);
2173 }
2174
2175 static void r8153_set_rx_early_size(struct r8152 *tp)
2176 {
2177         u32 mtu = tp->netdev->mtu;
2178         u32 ocp_data = (agg_buf_sz - mtu - VLAN_ETH_HLEN - VLAN_HLEN) / 4;
2179
2180         ocp_write_word(tp, MCU_TYPE_USB, USB_RX_EARLY_SIZE, ocp_data);
2181 }
2182
2183 static int rtl8153_enable(struct r8152 *tp)
2184 {
2185         if (test_bit(RTL8152_UNPLUG, &tp->flags))
2186                 return -ENODEV;
2187
2188         usb_disable_lpm(tp->udev);
2189         set_tx_qlen(tp);
2190         rtl_set_eee_plus(tp);
2191         r8153_set_rx_early_timeout(tp);
2192         r8153_set_rx_early_size(tp);
2193
2194         return rtl_enable(tp);
2195 }
2196
2197 static void rtl_disable(struct r8152 *tp)
2198 {
2199         u32 ocp_data;
2200         int i;
2201
2202         if (test_bit(RTL8152_UNPLUG, &tp->flags)) {
2203                 rtl_drop_queued_tx(tp);
2204                 return;
2205         }
2206
2207         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2208         ocp_data &= ~RCR_ACPT_ALL;
2209         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2210
2211         rtl_drop_queued_tx(tp);
2212
2213         for (i = 0; i < RTL8152_MAX_TX; i++)
2214                 usb_kill_urb(tp->tx_info[i].urb);
2215
2216         rxdy_gated_en(tp, true);
2217
2218         for (i = 0; i < 1000; i++) {
2219                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2220                 if ((ocp_data & FIFO_EMPTY) == FIFO_EMPTY)
2221                         break;
2222                 usleep_range(1000, 2000);
2223         }
2224
2225         for (i = 0; i < 1000; i++) {
2226                 if (ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0) & TCR0_TX_EMPTY)
2227                         break;
2228                 usleep_range(1000, 2000);
2229         }
2230
2231         rtl_stop_rx(tp);
2232
2233         rtl8152_nic_reset(tp);
2234 }
2235
2236 static void r8152_power_cut_en(struct r8152 *tp, bool enable)
2237 {
2238         u32 ocp_data;
2239
2240         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_UPS_CTRL);
2241         if (enable)
2242                 ocp_data |= POWER_CUT;
2243         else
2244                 ocp_data &= ~POWER_CUT;
2245         ocp_write_word(tp, MCU_TYPE_USB, USB_UPS_CTRL, ocp_data);
2246
2247         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_PM_CTRL_STATUS);
2248         ocp_data &= ~RESUME_INDICATE;
2249         ocp_write_word(tp, MCU_TYPE_USB, USB_PM_CTRL_STATUS, ocp_data);
2250 }
2251
2252 static void rtl_rx_vlan_en(struct r8152 *tp, bool enable)
2253 {
2254         u32 ocp_data;
2255
2256         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CPCR);
2257         if (enable)
2258                 ocp_data |= CPCR_RX_VLAN;
2259         else
2260                 ocp_data &= ~CPCR_RX_VLAN;
2261         ocp_write_word(tp, MCU_TYPE_PLA, PLA_CPCR, ocp_data);
2262 }
2263
2264 static int rtl8152_set_features(struct net_device *dev,
2265                                 netdev_features_t features)
2266 {
2267         netdev_features_t changed = features ^ dev->features;
2268         struct r8152 *tp = netdev_priv(dev);
2269         int ret;
2270
2271         ret = usb_autopm_get_interface(tp->intf);
2272         if (ret < 0)
2273                 goto out;
2274
2275         mutex_lock(&tp->control);
2276
2277         if (changed & NETIF_F_HW_VLAN_CTAG_RX) {
2278                 if (features & NETIF_F_HW_VLAN_CTAG_RX)
2279                         rtl_rx_vlan_en(tp, true);
2280                 else
2281                         rtl_rx_vlan_en(tp, false);
2282         }
2283
2284         mutex_unlock(&tp->control);
2285
2286         usb_autopm_put_interface(tp->intf);
2287
2288 out:
2289         return ret;
2290 }
2291
2292 #define WAKE_ANY (WAKE_PHY | WAKE_MAGIC | WAKE_UCAST | WAKE_BCAST | WAKE_MCAST)
2293
2294 static u32 __rtl_get_wol(struct r8152 *tp)
2295 {
2296         u32 ocp_data;
2297         u32 wolopts = 0;
2298
2299         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_CONFIG5);
2300         if (!(ocp_data & LAN_WAKE_EN))
2301                 return 0;
2302
2303         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
2304         if (ocp_data & LINK_ON_WAKE_EN)
2305                 wolopts |= WAKE_PHY;
2306
2307         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG5);
2308         if (ocp_data & UWF_EN)
2309                 wolopts |= WAKE_UCAST;
2310         if (ocp_data & BWF_EN)
2311                 wolopts |= WAKE_BCAST;
2312         if (ocp_data & MWF_EN)
2313                 wolopts |= WAKE_MCAST;
2314
2315         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CFG_WOL);
2316         if (ocp_data & MAGIC_EN)
2317                 wolopts |= WAKE_MAGIC;
2318
2319         return wolopts;
2320 }
2321
2322 static void __rtl_set_wol(struct r8152 *tp, u32 wolopts)
2323 {
2324         u32 ocp_data;
2325
2326         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
2327
2328         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
2329         ocp_data &= ~LINK_ON_WAKE_EN;
2330         if (wolopts & WAKE_PHY)
2331                 ocp_data |= LINK_ON_WAKE_EN;
2332         ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG34, ocp_data);
2333
2334         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG5);
2335         ocp_data &= ~(UWF_EN | BWF_EN | MWF_EN | LAN_WAKE_EN);
2336         if (wolopts & WAKE_UCAST)
2337                 ocp_data |= UWF_EN;
2338         if (wolopts & WAKE_BCAST)
2339                 ocp_data |= BWF_EN;
2340         if (wolopts & WAKE_MCAST)
2341                 ocp_data |= MWF_EN;
2342         if (wolopts & WAKE_ANY)
2343                 ocp_data |= LAN_WAKE_EN;
2344         ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG5, ocp_data);
2345
2346         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
2347
2348         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CFG_WOL);
2349         ocp_data &= ~MAGIC_EN;
2350         if (wolopts & WAKE_MAGIC)
2351                 ocp_data |= MAGIC_EN;
2352         ocp_write_word(tp, MCU_TYPE_PLA, PLA_CFG_WOL, ocp_data);
2353
2354         if (wolopts & WAKE_ANY)
2355                 device_set_wakeup_enable(&tp->udev->dev, true);
2356         else
2357                 device_set_wakeup_enable(&tp->udev->dev, false);
2358 }
2359
2360 static void r8153_u1u2en(struct r8152 *tp, bool enable)
2361 {
2362         u8 u1u2[8];
2363
2364         if (enable)
2365                 memset(u1u2, 0xff, sizeof(u1u2));
2366         else
2367                 memset(u1u2, 0x00, sizeof(u1u2));
2368
2369         usb_ocp_write(tp, USB_TOLERANCE, BYTE_EN_SIX_BYTES, sizeof(u1u2), u1u2);
2370 }
2371
2372 static void r8153_u2p3en(struct r8152 *tp, bool enable)
2373 {
2374         u32 ocp_data;
2375
2376         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_U2P3_CTRL);
2377         if (enable && tp->version != RTL_VER_03 && tp->version != RTL_VER_04)
2378                 ocp_data |= U2P3_ENABLE;
2379         else
2380                 ocp_data &= ~U2P3_ENABLE;
2381         ocp_write_word(tp, MCU_TYPE_USB, USB_U2P3_CTRL, ocp_data);
2382 }
2383
2384 static void r8153_power_cut_en(struct r8152 *tp, bool enable)
2385 {
2386         u32 ocp_data;
2387
2388         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_POWER_CUT);
2389         if (enable)
2390                 ocp_data |= PWR_EN | PHASE2_EN;
2391         else
2392                 ocp_data &= ~(PWR_EN | PHASE2_EN);
2393         ocp_write_word(tp, MCU_TYPE_USB, USB_POWER_CUT, ocp_data);
2394
2395         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_MISC_0);
2396         ocp_data &= ~PCUT_STATUS;
2397         ocp_write_word(tp, MCU_TYPE_USB, USB_MISC_0, ocp_data);
2398 }
2399
2400 static bool rtl_can_wakeup(struct r8152 *tp)
2401 {
2402         struct usb_device *udev = tp->udev;
2403
2404         return (udev->actconfig->desc.bmAttributes & USB_CONFIG_ATT_WAKEUP);
2405 }
2406
2407 static void rtl_runtime_suspend_enable(struct r8152 *tp, bool enable)
2408 {
2409         if (enable) {
2410                 u32 ocp_data;
2411
2412                 r8153_u1u2en(tp, false);
2413                 r8153_u2p3en(tp, false);
2414
2415                 __rtl_set_wol(tp, WAKE_ANY);
2416
2417                 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
2418
2419                 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
2420                 ocp_data |= LINK_OFF_WAKE_EN;
2421                 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG34, ocp_data);
2422
2423                 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
2424         } else {
2425                 __rtl_set_wol(tp, tp->saved_wolopts);
2426                 r8153_u2p3en(tp, true);
2427                 r8153_u1u2en(tp, true);
2428         }
2429 }
2430
2431 static void rtl_phy_reset(struct r8152 *tp)
2432 {
2433         u16 data;
2434         int i;
2435
2436         data = r8152_mdio_read(tp, MII_BMCR);
2437
2438         /* don't reset again before the previous one complete */
2439         if (data & BMCR_RESET)
2440                 return;
2441
2442         data |= BMCR_RESET;
2443         r8152_mdio_write(tp, MII_BMCR, data);
2444
2445         for (i = 0; i < 50; i++) {
2446                 msleep(20);
2447                 if ((r8152_mdio_read(tp, MII_BMCR) & BMCR_RESET) == 0)
2448                         break;
2449         }
2450 }
2451
2452 static void r8153_teredo_off(struct r8152 *tp)
2453 {
2454         u32 ocp_data;
2455
2456         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG);
2457         ocp_data &= ~(TEREDO_SEL | TEREDO_RS_EVENT_MASK | OOB_TEREDO_EN);
2458         ocp_write_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG, ocp_data);
2459
2460         ocp_write_word(tp, MCU_TYPE_PLA, PLA_WDT6_CTRL, WDT6_SET_MODE);
2461         ocp_write_word(tp, MCU_TYPE_PLA, PLA_REALWOW_TIMER, 0);
2462         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TEREDO_TIMER, 0);
2463 }
2464
2465 static void r8152_aldps_en(struct r8152 *tp, bool enable)
2466 {
2467         if (enable) {
2468                 ocp_reg_write(tp, OCP_ALDPS_CONFIG, ENPWRSAVE | ENPDNPS |
2469                                                     LINKENA | DIS_SDSAVE);
2470         } else {
2471                 ocp_reg_write(tp, OCP_ALDPS_CONFIG, ENPDNPS | LINKENA |
2472                                                     DIS_SDSAVE);
2473                 msleep(20);
2474         }
2475 }
2476
2477 static void rtl8152_disable(struct r8152 *tp)
2478 {
2479         r8152_aldps_en(tp, false);
2480         rtl_disable(tp);
2481         r8152_aldps_en(tp, true);
2482 }
2483
2484 static void r8152b_hw_phy_cfg(struct r8152 *tp)
2485 {
2486         u16 data;
2487
2488         data = r8152_mdio_read(tp, MII_BMCR);
2489         if (data & BMCR_PDOWN) {
2490                 data &= ~BMCR_PDOWN;
2491                 r8152_mdio_write(tp, MII_BMCR, data);
2492         }
2493
2494         set_bit(PHY_RESET, &tp->flags);
2495 }
2496
2497 static void r8152b_exit_oob(struct r8152 *tp)
2498 {
2499         u32 ocp_data;
2500         int i;
2501
2502         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2503         ocp_data &= ~RCR_ACPT_ALL;
2504         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2505
2506         rxdy_gated_en(tp, true);
2507         r8153_teredo_off(tp);
2508         r8152b_hw_phy_cfg(tp);
2509
2510         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
2511         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, 0x00);
2512
2513         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2514         ocp_data &= ~NOW_IS_OOB;
2515         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2516
2517         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2518         ocp_data &= ~MCU_BORW_EN;
2519         ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2520
2521         for (i = 0; i < 1000; i++) {
2522                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2523                 if (ocp_data & LINK_LIST_READY)
2524                         break;
2525                 usleep_range(1000, 2000);
2526         }
2527
2528         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2529         ocp_data |= RE_INIT_LL;
2530         ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2531
2532         for (i = 0; i < 1000; i++) {
2533                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2534                 if (ocp_data & LINK_LIST_READY)
2535                         break;
2536                 usleep_range(1000, 2000);
2537         }
2538
2539         rtl8152_nic_reset(tp);
2540
2541         /* rx share fifo credit full threshold */
2542         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_NORMAL);
2543
2544         if (tp->udev->speed == USB_SPEED_FULL ||
2545             tp->udev->speed == USB_SPEED_LOW) {
2546                 /* rx share fifo credit near full threshold */
2547                 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1,
2548                                 RXFIFO_THR2_FULL);
2549                 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2,
2550                                 RXFIFO_THR3_FULL);
2551         } else {
2552                 /* rx share fifo credit near full threshold */
2553                 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1,
2554                                 RXFIFO_THR2_HIGH);
2555                 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2,
2556                                 RXFIFO_THR3_HIGH);
2557         }
2558
2559         /* TX share fifo free credit full threshold */
2560         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TXFIFO_CTRL, TXFIFO_THR_NORMAL);
2561
2562         ocp_write_byte(tp, MCU_TYPE_USB, USB_TX_AGG, TX_AGG_MAX_THRESHOLD);
2563         ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_BUF_TH, RX_THR_HIGH);
2564         ocp_write_dword(tp, MCU_TYPE_USB, USB_TX_DMA,
2565                         TEST_MODE_DISABLE | TX_SIZE_ADJUST1);
2566
2567         rtl_rx_vlan_en(tp, tp->netdev->features & NETIF_F_HW_VLAN_CTAG_RX);
2568
2569         ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8152_RMS);
2570
2571         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0);
2572         ocp_data |= TCR0_AUTO_FIFO;
2573         ocp_write_word(tp, MCU_TYPE_PLA, PLA_TCR0, ocp_data);
2574 }
2575
2576 static void r8152b_enter_oob(struct r8152 *tp)
2577 {
2578         u32 ocp_data;
2579         int i;
2580
2581         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2582         ocp_data &= ~NOW_IS_OOB;
2583         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2584
2585         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_OOB);
2586         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1, RXFIFO_THR2_OOB);
2587         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2, RXFIFO_THR3_OOB);
2588
2589         rtl_disable(tp);
2590
2591         for (i = 0; i < 1000; i++) {
2592                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2593                 if (ocp_data & LINK_LIST_READY)
2594                         break;
2595                 usleep_range(1000, 2000);
2596         }
2597
2598         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2599         ocp_data |= RE_INIT_LL;
2600         ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2601
2602         for (i = 0; i < 1000; i++) {
2603                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2604                 if (ocp_data & LINK_LIST_READY)
2605                         break;
2606                 usleep_range(1000, 2000);
2607         }
2608
2609         ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8152_RMS);
2610
2611         rtl_rx_vlan_en(tp, true);
2612
2613         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PAL_BDC_CR);
2614         ocp_data |= ALDPS_PROXY_MODE;
2615         ocp_write_word(tp, MCU_TYPE_PLA, PAL_BDC_CR, ocp_data);
2616
2617         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2618         ocp_data |= NOW_IS_OOB | DIS_MCU_CLROOB;
2619         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2620
2621         rxdy_gated_en(tp, false);
2622
2623         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2624         ocp_data |= RCR_APM | RCR_AM | RCR_AB;
2625         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2626 }
2627
2628 static void r8153_hw_phy_cfg(struct r8152 *tp)
2629 {
2630         u32 ocp_data;
2631         u16 data;
2632
2633         if (tp->version == RTL_VER_03 || tp->version == RTL_VER_04 ||
2634             tp->version == RTL_VER_05)
2635                 ocp_reg_write(tp, OCP_ADC_CFG, CKADSEL_L | ADC_EN | EN_EMI_L);
2636
2637         data = r8152_mdio_read(tp, MII_BMCR);
2638         if (data & BMCR_PDOWN) {
2639                 data &= ~BMCR_PDOWN;
2640                 r8152_mdio_write(tp, MII_BMCR, data);
2641         }
2642
2643         if (tp->version == RTL_VER_03) {
2644                 data = ocp_reg_read(tp, OCP_EEE_CFG);
2645                 data &= ~CTAP_SHORT_EN;
2646                 ocp_reg_write(tp, OCP_EEE_CFG, data);
2647         }
2648
2649         data = ocp_reg_read(tp, OCP_POWER_CFG);
2650         data |= EEE_CLKDIV_EN;
2651         ocp_reg_write(tp, OCP_POWER_CFG, data);
2652
2653         data = ocp_reg_read(tp, OCP_DOWN_SPEED);
2654         data |= EN_10M_BGOFF;
2655         ocp_reg_write(tp, OCP_DOWN_SPEED, data);
2656         data = ocp_reg_read(tp, OCP_POWER_CFG);
2657         data |= EN_10M_PLLOFF;
2658         ocp_reg_write(tp, OCP_POWER_CFG, data);
2659         sram_write(tp, SRAM_IMPEDANCE, 0x0b13);
2660
2661         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR);
2662         ocp_data |= PFM_PWM_SWITCH;
2663         ocp_write_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR, ocp_data);
2664
2665         /* Enable LPF corner auto tune */
2666         sram_write(tp, SRAM_LPF_CFG, 0xf70f);
2667
2668         /* Adjust 10M Amplitude */
2669         sram_write(tp, SRAM_10M_AMP1, 0x00af);
2670         sram_write(tp, SRAM_10M_AMP2, 0x0208);
2671
2672         set_bit(PHY_RESET, &tp->flags);
2673 }
2674
2675 static void r8153_first_init(struct r8152 *tp)
2676 {
2677         u32 ocp_data;
2678         int i;
2679
2680         rxdy_gated_en(tp, true);
2681         r8153_teredo_off(tp);
2682
2683         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2684         ocp_data &= ~RCR_ACPT_ALL;
2685         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2686
2687         r8153_hw_phy_cfg(tp);
2688
2689         rtl8152_nic_reset(tp);
2690
2691         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2692         ocp_data &= ~NOW_IS_OOB;
2693         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2694
2695         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2696         ocp_data &= ~MCU_BORW_EN;
2697         ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2698
2699         for (i = 0; i < 1000; i++) {
2700                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2701                 if (ocp_data & LINK_LIST_READY)
2702                         break;
2703                 usleep_range(1000, 2000);
2704         }
2705
2706         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2707         ocp_data |= RE_INIT_LL;
2708         ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2709
2710         for (i = 0; i < 1000; i++) {
2711                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2712                 if (ocp_data & LINK_LIST_READY)
2713                         break;
2714                 usleep_range(1000, 2000);
2715         }
2716
2717         rtl_rx_vlan_en(tp, tp->netdev->features & NETIF_F_HW_VLAN_CTAG_RX);
2718
2719         ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8153_RMS);
2720         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_MTPS, MTPS_JUMBO);
2721
2722         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0);
2723         ocp_data |= TCR0_AUTO_FIFO;
2724         ocp_write_word(tp, MCU_TYPE_PLA, PLA_TCR0, ocp_data);
2725
2726         rtl8152_nic_reset(tp);
2727
2728         /* rx share fifo credit full threshold */
2729         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_NORMAL);
2730         ocp_write_word(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1, RXFIFO_THR2_NORMAL);
2731         ocp_write_word(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2, RXFIFO_THR3_NORMAL);
2732         /* TX share fifo free credit full threshold */
2733         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TXFIFO_CTRL, TXFIFO_THR_NORMAL2);
2734
2735         /* rx aggregation */
2736         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_USB_CTRL);
2737         ocp_data &= ~(RX_AGG_DISABLE | RX_ZERO_EN);
2738         ocp_write_word(tp, MCU_TYPE_USB, USB_USB_CTRL, ocp_data);
2739 }
2740
2741 static void r8153_enter_oob(struct r8152 *tp)
2742 {
2743         u32 ocp_data;
2744         int i;
2745
2746         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2747         ocp_data &= ~NOW_IS_OOB;
2748         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2749
2750         rtl_disable(tp);
2751
2752         for (i = 0; i < 1000; i++) {
2753                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2754                 if (ocp_data & LINK_LIST_READY)
2755                         break;
2756                 usleep_range(1000, 2000);
2757         }
2758
2759         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2760         ocp_data |= RE_INIT_LL;
2761         ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2762
2763         for (i = 0; i < 1000; i++) {
2764                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2765                 if (ocp_data & LINK_LIST_READY)
2766                         break;
2767                 usleep_range(1000, 2000);
2768         }
2769
2770         ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8153_RMS);
2771
2772         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG);
2773         ocp_data &= ~TEREDO_WAKE_MASK;
2774         ocp_write_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG, ocp_data);
2775
2776         rtl_rx_vlan_en(tp, true);
2777
2778         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PAL_BDC_CR);
2779         ocp_data |= ALDPS_PROXY_MODE;
2780         ocp_write_word(tp, MCU_TYPE_PLA, PAL_BDC_CR, ocp_data);
2781
2782         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2783         ocp_data |= NOW_IS_OOB | DIS_MCU_CLROOB;
2784         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2785
2786         rxdy_gated_en(tp, false);
2787
2788         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2789         ocp_data |= RCR_APM | RCR_AM | RCR_AB;
2790         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2791 }
2792
2793 static void r8153_aldps_en(struct r8152 *tp, bool enable)
2794 {
2795         u16 data;
2796
2797         data = ocp_reg_read(tp, OCP_POWER_CFG);
2798         if (enable) {
2799                 data |= EN_ALDPS;
2800                 ocp_reg_write(tp, OCP_POWER_CFG, data);
2801         } else {
2802                 data &= ~EN_ALDPS;
2803                 ocp_reg_write(tp, OCP_POWER_CFG, data);
2804                 msleep(20);
2805         }
2806 }
2807
2808 static void rtl8153_disable(struct r8152 *tp)
2809 {
2810         r8153_aldps_en(tp, false);
2811         rtl_disable(tp);
2812         r8153_aldps_en(tp, true);
2813         usb_enable_lpm(tp->udev);
2814 }
2815
2816 static int rtl8152_set_speed(struct r8152 *tp, u8 autoneg, u16 speed, u8 duplex)
2817 {
2818         u16 bmcr, anar, gbcr;
2819         int ret = 0;
2820
2821         cancel_delayed_work_sync(&tp->schedule);
2822         anar = r8152_mdio_read(tp, MII_ADVERTISE);
2823         anar &= ~(ADVERTISE_10HALF | ADVERTISE_10FULL |
2824                   ADVERTISE_100HALF | ADVERTISE_100FULL);
2825         if (tp->mii.supports_gmii) {
2826                 gbcr = r8152_mdio_read(tp, MII_CTRL1000);
2827                 gbcr &= ~(ADVERTISE_1000FULL | ADVERTISE_1000HALF);
2828         } else {
2829                 gbcr = 0;
2830         }
2831
2832         if (autoneg == AUTONEG_DISABLE) {
2833                 if (speed == SPEED_10) {
2834                         bmcr = 0;
2835                         anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
2836                 } else if (speed == SPEED_100) {
2837                         bmcr = BMCR_SPEED100;
2838                         anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
2839                 } else if (speed == SPEED_1000 && tp->mii.supports_gmii) {
2840                         bmcr = BMCR_SPEED1000;
2841                         gbcr |= ADVERTISE_1000FULL | ADVERTISE_1000HALF;
2842                 } else {
2843                         ret = -EINVAL;
2844                         goto out;
2845                 }
2846
2847                 if (duplex == DUPLEX_FULL)
2848                         bmcr |= BMCR_FULLDPLX;
2849         } else {
2850                 if (speed == SPEED_10) {
2851                         if (duplex == DUPLEX_FULL)
2852                                 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
2853                         else
2854                                 anar |= ADVERTISE_10HALF;
2855                 } else if (speed == SPEED_100) {
2856                         if (duplex == DUPLEX_FULL) {
2857                                 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
2858                                 anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
2859                         } else {
2860                                 anar |= ADVERTISE_10HALF;
2861                                 anar |= ADVERTISE_100HALF;
2862                         }
2863                 } else if (speed == SPEED_1000 && tp->mii.supports_gmii) {
2864                         if (duplex == DUPLEX_FULL) {
2865                                 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
2866                                 anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
2867                                 gbcr |= ADVERTISE_1000FULL | ADVERTISE_1000HALF;
2868                         } else {
2869                                 anar |= ADVERTISE_10HALF;
2870                                 anar |= ADVERTISE_100HALF;
2871                                 gbcr |= ADVERTISE_1000HALF;
2872                         }
2873                 } else {
2874                         ret = -EINVAL;
2875                         goto out;
2876                 }
2877
2878                 bmcr = BMCR_ANENABLE | BMCR_ANRESTART;
2879         }
2880
2881         if (test_bit(PHY_RESET, &tp->flags))
2882                 bmcr |= BMCR_RESET;
2883
2884         if (tp->mii.supports_gmii)
2885                 r8152_mdio_write(tp, MII_CTRL1000, gbcr);
2886
2887         r8152_mdio_write(tp, MII_ADVERTISE, anar);
2888         r8152_mdio_write(tp, MII_BMCR, bmcr);
2889
2890         if (test_and_clear_bit(PHY_RESET, &tp->flags)) {
2891                 int i;
2892
2893                 for (i = 0; i < 50; i++) {
2894                         msleep(20);
2895                         if ((r8152_mdio_read(tp, MII_BMCR) & BMCR_RESET) == 0)
2896                                 break;
2897                 }
2898         }
2899
2900 out:
2901         return ret;
2902 }
2903
2904 static void rtl8152_up(struct r8152 *tp)
2905 {
2906         if (test_bit(RTL8152_UNPLUG, &tp->flags))
2907                 return;
2908
2909         r8152_aldps_en(tp, false);
2910         r8152b_exit_oob(tp);
2911         r8152_aldps_en(tp, true);
2912 }
2913
2914 static void rtl8152_down(struct r8152 *tp)
2915 {
2916         if (test_bit(RTL8152_UNPLUG, &tp->flags)) {
2917                 rtl_drop_queued_tx(tp);
2918                 return;
2919         }
2920
2921         r8152_power_cut_en(tp, false);
2922         r8152_aldps_en(tp, false);
2923         r8152b_enter_oob(tp);
2924         r8152_aldps_en(tp, true);
2925 }
2926
2927 static void rtl8153_up(struct r8152 *tp)
2928 {
2929         if (test_bit(RTL8152_UNPLUG, &tp->flags))
2930                 return;
2931
2932         r8153_u1u2en(tp, false);
2933         r8153_aldps_en(tp, false);
2934         r8153_first_init(tp);
2935         r8153_aldps_en(tp, true);
2936         r8153_u2p3en(tp, true);
2937         r8153_u1u2en(tp, true);
2938         usb_enable_lpm(tp->udev);
2939 }
2940
2941 static void rtl8153_down(struct r8152 *tp)
2942 {
2943         if (test_bit(RTL8152_UNPLUG, &tp->flags)) {
2944                 rtl_drop_queued_tx(tp);
2945                 return;
2946         }
2947
2948         r8153_u1u2en(tp, false);
2949         r8153_u2p3en(tp, false);
2950         r8153_power_cut_en(tp, false);
2951         r8153_aldps_en(tp, false);
2952         r8153_enter_oob(tp);
2953         r8153_aldps_en(tp, true);
2954 }
2955
2956 static bool rtl8152_in_nway(struct r8152 *tp)
2957 {
2958         u16 nway_state;
2959
2960         ocp_write_word(tp, MCU_TYPE_PLA, PLA_OCP_GPHY_BASE, 0x2000);
2961         tp->ocp_base = 0x2000;
2962         ocp_write_byte(tp, MCU_TYPE_PLA, 0xb014, 0x4c);         /* phy state */
2963         nway_state = ocp_read_word(tp, MCU_TYPE_PLA, 0xb01a);
2964
2965         /* bit 15: TXDIS_STATE, bit 14: ABD_STATE */
2966         if (nway_state & 0xc000)
2967                 return false;
2968         else
2969                 return true;
2970 }
2971
2972 static bool rtl8153_in_nway(struct r8152 *tp)
2973 {
2974         u16 phy_state = ocp_reg_read(tp, OCP_PHY_STATE) & 0xff;
2975
2976         if (phy_state == TXDIS_STATE || phy_state == ABD_STATE)
2977                 return false;
2978         else
2979                 return true;
2980 }
2981
2982 static void set_carrier(struct r8152 *tp)
2983 {
2984         struct net_device *netdev = tp->netdev;
2985         u8 speed;
2986
2987         speed = rtl8152_get_speed(tp);
2988
2989         if (speed & LINK_STATUS) {
2990                 if (!netif_carrier_ok(netdev)) {
2991                         tp->rtl_ops.enable(tp);
2992                         set_bit(RTL8152_SET_RX_MODE, &tp->flags);
2993                         netif_stop_queue(netdev);
2994                         napi_disable(&tp->napi);
2995                         netif_carrier_on(netdev);
2996                         rtl_start_rx(tp);
2997                         napi_enable(&tp->napi);
2998                         netif_wake_queue(netdev);
2999                         netif_info(tp, link, netdev, "carrier on\n");
3000                 } else if (netif_queue_stopped(netdev) &&
3001                            skb_queue_len(&tp->tx_queue) < tp->tx_qlen) {
3002                         netif_wake_queue(netdev);
3003                 }
3004         } else {
3005                 if (netif_carrier_ok(netdev)) {
3006                         netif_carrier_off(netdev);
3007                         napi_disable(&tp->napi);
3008                         tp->rtl_ops.disable(tp);
3009                         napi_enable(&tp->napi);
3010                         netif_info(tp, link, netdev, "carrier off\n");
3011                 }
3012         }
3013 }
3014
3015 static void rtl_work_func_t(struct work_struct *work)
3016 {
3017         struct r8152 *tp = container_of(work, struct r8152, schedule.work);
3018
3019         /* If the device is unplugged or !netif_running(), the workqueue
3020          * doesn't need to wake the device, and could return directly.
3021          */
3022         if (test_bit(RTL8152_UNPLUG, &tp->flags) || !netif_running(tp->netdev))
3023                 return;
3024
3025         if (usb_autopm_get_interface(tp->intf) < 0)
3026                 return;
3027
3028         if (!test_bit(WORK_ENABLE, &tp->flags))
3029                 goto out1;
3030
3031         if (!mutex_trylock(&tp->control)) {
3032                 schedule_delayed_work(&tp->schedule, 0);
3033                 goto out1;
3034         }
3035
3036         if (test_and_clear_bit(RTL8152_LINK_CHG, &tp->flags))
3037                 set_carrier(tp);
3038
3039         if (test_and_clear_bit(RTL8152_SET_RX_MODE, &tp->flags))
3040                 _rtl8152_set_rx_mode(tp->netdev);
3041
3042         /* don't schedule napi before linking */
3043         if (test_and_clear_bit(SCHEDULE_NAPI, &tp->flags) &&
3044             netif_carrier_ok(tp->netdev))
3045                 napi_schedule(&tp->napi);
3046
3047         if (test_and_clear_bit(PHY_RESET, &tp->flags))
3048                 rtl_phy_reset(tp);
3049
3050         mutex_unlock(&tp->control);
3051
3052 out1:
3053         usb_autopm_put_interface(tp->intf);
3054 }
3055
3056 #ifdef CONFIG_PM_SLEEP
3057 static int rtl_notifier(struct notifier_block *nb, unsigned long action,
3058                         void *data)
3059 {
3060         struct r8152 *tp = container_of(nb, struct r8152, pm_notifier);
3061
3062         switch (action) {
3063         case PM_HIBERNATION_PREPARE:
3064         case PM_SUSPEND_PREPARE:
3065                 usb_autopm_get_interface(tp->intf);
3066                 break;
3067
3068         case PM_POST_HIBERNATION:
3069         case PM_POST_SUSPEND:
3070                 usb_autopm_put_interface(tp->intf);
3071                 break;
3072
3073         case PM_POST_RESTORE:
3074         case PM_RESTORE_PREPARE:
3075         default:
3076                 break;
3077         }
3078
3079         return NOTIFY_DONE;
3080 }
3081 #endif
3082
3083 static int rtl8152_open(struct net_device *netdev)
3084 {
3085         struct r8152 *tp = netdev_priv(netdev);
3086         int res = 0;
3087
3088         res = alloc_all_mem(tp);
3089         if (res)
3090                 goto out;
3091
3092         netif_carrier_off(netdev);
3093
3094         res = usb_autopm_get_interface(tp->intf);
3095         if (res < 0) {
3096                 free_all_mem(tp);
3097                 goto out;
3098         }
3099
3100         mutex_lock(&tp->control);
3101
3102         tp->rtl_ops.up(tp);
3103
3104         rtl8152_set_speed(tp, AUTONEG_ENABLE,
3105                           tp->mii.supports_gmii ? SPEED_1000 : SPEED_100,
3106                           DUPLEX_FULL);
3107         netif_carrier_off(netdev);
3108         netif_start_queue(netdev);
3109         set_bit(WORK_ENABLE, &tp->flags);
3110
3111         res = usb_submit_urb(tp->intr_urb, GFP_KERNEL);
3112         if (res) {
3113                 if (res == -ENODEV)
3114                         netif_device_detach(tp->netdev);
3115                 netif_warn(tp, ifup, netdev, "intr_urb submit failed: %d\n",
3116                            res);
3117                 free_all_mem(tp);
3118         } else {
3119                 napi_enable(&tp->napi);
3120         }
3121
3122         mutex_unlock(&tp->control);
3123
3124         usb_autopm_put_interface(tp->intf);
3125 #ifdef CONFIG_PM_SLEEP
3126         tp->pm_notifier.notifier_call = rtl_notifier;
3127         register_pm_notifier(&tp->pm_notifier);
3128 #endif
3129
3130 out:
3131         return res;
3132 }
3133
3134 static int rtl8152_close(struct net_device *netdev)
3135 {
3136         struct r8152 *tp = netdev_priv(netdev);
3137         int res = 0;
3138
3139 #ifdef CONFIG_PM_SLEEP
3140         unregister_pm_notifier(&tp->pm_notifier);
3141 #endif
3142         napi_disable(&tp->napi);
3143         clear_bit(WORK_ENABLE, &tp->flags);
3144         usb_kill_urb(tp->intr_urb);
3145         cancel_delayed_work_sync(&tp->schedule);
3146         netif_stop_queue(netdev);
3147
3148         res = usb_autopm_get_interface(tp->intf);
3149         if (res < 0 || test_bit(RTL8152_UNPLUG, &tp->flags)) {
3150                 rtl_drop_queued_tx(tp);
3151                 rtl_stop_rx(tp);
3152         } else {
3153                 mutex_lock(&tp->control);
3154
3155                 tp->rtl_ops.down(tp);
3156
3157                 mutex_unlock(&tp->control);
3158
3159                 usb_autopm_put_interface(tp->intf);
3160         }
3161
3162         free_all_mem(tp);
3163
3164         return res;
3165 }
3166
3167 static inline void r8152_mmd_indirect(struct r8152 *tp, u16 dev, u16 reg)
3168 {
3169         ocp_reg_write(tp, OCP_EEE_AR, FUN_ADDR | dev);
3170         ocp_reg_write(tp, OCP_EEE_DATA, reg);
3171         ocp_reg_write(tp, OCP_EEE_AR, FUN_DATA | dev);
3172 }
3173
3174 static u16 r8152_mmd_read(struct r8152 *tp, u16 dev, u16 reg)
3175 {
3176         u16 data;
3177
3178         r8152_mmd_indirect(tp, dev, reg);
3179         data = ocp_reg_read(tp, OCP_EEE_DATA);
3180         ocp_reg_write(tp, OCP_EEE_AR, 0x0000);
3181
3182         return data;
3183 }
3184
3185 static void r8152_mmd_write(struct r8152 *tp, u16 dev, u16 reg, u16 data)
3186 {
3187         r8152_mmd_indirect(tp, dev, reg);
3188         ocp_reg_write(tp, OCP_EEE_DATA, data);
3189         ocp_reg_write(tp, OCP_EEE_AR, 0x0000);
3190 }
3191
3192 static void r8152_eee_en(struct r8152 *tp, bool enable)
3193 {
3194         u16 config1, config2, config3;
3195         u32 ocp_data;
3196
3197         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
3198         config1 = ocp_reg_read(tp, OCP_EEE_CONFIG1) & ~sd_rise_time_mask;
3199         config2 = ocp_reg_read(tp, OCP_EEE_CONFIG2);
3200         config3 = ocp_reg_read(tp, OCP_EEE_CONFIG3) & ~fast_snr_mask;
3201
3202         if (enable) {
3203                 ocp_data |= EEE_RX_EN | EEE_TX_EN;
3204                 config1 |= EEE_10_CAP | EEE_NWAY_EN | TX_QUIET_EN | RX_QUIET_EN;
3205                 config1 |= sd_rise_time(1);
3206                 config2 |= RG_DACQUIET_EN | RG_LDVQUIET_EN;
3207                 config3 |= fast_snr(42);
3208         } else {
3209                 ocp_data &= ~(EEE_RX_EN | EEE_TX_EN);
3210                 config1 &= ~(EEE_10_CAP | EEE_NWAY_EN | TX_QUIET_EN |
3211                              RX_QUIET_EN);
3212                 config1 |= sd_rise_time(7);
3213                 config2 &= ~(RG_DACQUIET_EN | RG_LDVQUIET_EN);
3214                 config3 |= fast_snr(511);
3215         }
3216
3217         ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEE_CR, ocp_data);
3218         ocp_reg_write(tp, OCP_EEE_CONFIG1, config1);
3219         ocp_reg_write(tp, OCP_EEE_CONFIG2, config2);
3220         ocp_reg_write(tp, OCP_EEE_CONFIG3, config3);
3221 }
3222
3223 static void r8152b_enable_eee(struct r8152 *tp)
3224 {
3225         r8152_eee_en(tp, true);
3226         r8152_mmd_write(tp, MDIO_MMD_AN, MDIO_AN_EEE_ADV, MDIO_EEE_100TX);
3227 }
3228
3229 static void r8153_eee_en(struct r8152 *tp, bool enable)
3230 {
3231         u32 ocp_data;
3232         u16 config;
3233
3234         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
3235         config = ocp_reg_read(tp, OCP_EEE_CFG);
3236
3237         if (enable) {
3238                 ocp_data |= EEE_RX_EN | EEE_TX_EN;
3239                 config |= EEE10_EN;
3240         } else {
3241                 ocp_data &= ~(EEE_RX_EN | EEE_TX_EN);
3242                 config &= ~EEE10_EN;
3243         }
3244
3245         ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEE_CR, ocp_data);
3246         ocp_reg_write(tp, OCP_EEE_CFG, config);
3247 }
3248
3249 static void r8153_enable_eee(struct r8152 *tp)
3250 {
3251         r8153_eee_en(tp, true);
3252         ocp_reg_write(tp, OCP_EEE_ADV, MDIO_EEE_1000T | MDIO_EEE_100TX);
3253 }
3254
3255 static void r8152b_enable_fc(struct r8152 *tp)
3256 {
3257         u16 anar;
3258
3259         anar = r8152_mdio_read(tp, MII_ADVERTISE);
3260         anar |= ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM;
3261         r8152_mdio_write(tp, MII_ADVERTISE, anar);
3262 }
3263
3264 static void rtl_tally_reset(struct r8152 *tp)
3265 {
3266         u32 ocp_data;
3267
3268         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_RSTTALLY);
3269         ocp_data |= TALLY_RESET;
3270         ocp_write_word(tp, MCU_TYPE_PLA, PLA_RSTTALLY, ocp_data);
3271 }
3272
3273 static void r8152b_init(struct r8152 *tp)
3274 {
3275         u32 ocp_data;
3276
3277         if (test_bit(RTL8152_UNPLUG, &tp->flags))
3278                 return;
3279
3280         r8152_aldps_en(tp, false);
3281
3282         if (tp->version == RTL_VER_01) {
3283                 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE);
3284                 ocp_data &= ~LED_MODE_MASK;
3285                 ocp_write_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE, ocp_data);
3286         }
3287
3288         r8152_power_cut_en(tp, false);
3289
3290         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR);
3291         ocp_data |= TX_10M_IDLE_EN | PFM_PWM_SWITCH;
3292         ocp_write_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR, ocp_data);
3293         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL);
3294         ocp_data &= ~MCU_CLK_RATIO_MASK;
3295         ocp_data |= MCU_CLK_RATIO | D3_CLK_GATED_EN;
3296         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL, ocp_data);
3297         ocp_data = GPHY_STS_MSK | SPEED_DOWN_MSK |
3298                    SPDWN_RXDV_MSK | SPDWN_LINKCHG_MSK;
3299         ocp_write_word(tp, MCU_TYPE_PLA, PLA_GPHY_INTR_IMR, ocp_data);
3300
3301         r8152b_enable_eee(tp);
3302         r8152_aldps_en(tp, true);
3303         r8152b_enable_fc(tp);
3304         rtl_tally_reset(tp);
3305
3306         /* enable rx aggregation */
3307         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_USB_CTRL);
3308         ocp_data &= ~(RX_AGG_DISABLE | RX_ZERO_EN);
3309         ocp_write_word(tp, MCU_TYPE_USB, USB_USB_CTRL, ocp_data);
3310 }
3311
3312 static void r8153_init(struct r8152 *tp)
3313 {
3314         u32 ocp_data;
3315         int i;
3316
3317         if (test_bit(RTL8152_UNPLUG, &tp->flags))
3318                 return;
3319
3320         r8153_aldps_en(tp, false);
3321         r8153_u1u2en(tp, false);
3322
3323         for (i = 0; i < 500; i++) {
3324                 if (ocp_read_word(tp, MCU_TYPE_PLA, PLA_BOOT_CTRL) &
3325                     AUTOLOAD_DONE)
3326                         break;
3327                 msleep(20);
3328         }
3329
3330         for (i = 0; i < 500; i++) {
3331                 ocp_data = ocp_reg_read(tp, OCP_PHY_STATUS) & PHY_STAT_MASK;
3332                 if (ocp_data == PHY_STAT_LAN_ON || ocp_data == PHY_STAT_PWRDN)
3333                         break;
3334                 msleep(20);
3335         }
3336
3337         usb_disable_lpm(tp->udev);
3338         r8153_u2p3en(tp, false);
3339
3340         if (tp->version == RTL_VER_04) {
3341                 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_SSPHYLINK2);
3342                 ocp_data &= ~pwd_dn_scale_mask;
3343                 ocp_data |= pwd_dn_scale(96);
3344                 ocp_write_word(tp, MCU_TYPE_USB, USB_SSPHYLINK2, ocp_data);
3345
3346                 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_USB2PHY);
3347                 ocp_data |= USB2PHY_L1 | USB2PHY_SUSPEND;
3348                 ocp_write_byte(tp, MCU_TYPE_USB, USB_USB2PHY, ocp_data);
3349         } else if (tp->version == RTL_VER_05) {
3350                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_DMY_REG0);
3351                 ocp_data &= ~ECM_ALDPS;
3352                 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_DMY_REG0, ocp_data);
3353
3354                 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY1);
3355                 if (ocp_read_word(tp, MCU_TYPE_USB, USB_BURST_SIZE) == 0)
3356                         ocp_data &= ~DYNAMIC_BURST;
3357                 else
3358                         ocp_data |= DYNAMIC_BURST;
3359                 ocp_write_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY1, ocp_data);
3360         } else if (tp->version == RTL_VER_06) {
3361                 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY1);
3362                 if (ocp_read_word(tp, MCU_TYPE_USB, USB_BURST_SIZE) == 0)
3363                         ocp_data &= ~DYNAMIC_BURST;
3364                 else
3365                         ocp_data |= DYNAMIC_BURST;
3366                 ocp_write_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY1, ocp_data);
3367         }
3368
3369         ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY2);
3370         ocp_data |= EP4_FULL_FC;
3371         ocp_write_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY2, ocp_data);
3372
3373         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_WDT11_CTRL);
3374         ocp_data &= ~TIMER11_EN;
3375         ocp_write_word(tp, MCU_TYPE_USB, USB_WDT11_CTRL, ocp_data);
3376
3377         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE);
3378         ocp_data &= ~LED_MODE_MASK;
3379         ocp_write_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE, ocp_data);
3380
3381         ocp_data = FIFO_EMPTY_1FB | ROK_EXIT_LPM;
3382         if (tp->version == RTL_VER_04 && tp->udev->speed != USB_SPEED_SUPER)
3383                 ocp_data |= LPM_TIMER_500MS;
3384         else
3385                 ocp_data |= LPM_TIMER_500US;
3386         ocp_write_byte(tp, MCU_TYPE_USB, USB_LPM_CTRL, ocp_data);
3387
3388         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_AFE_CTRL2);
3389         ocp_data &= ~SEN_VAL_MASK;
3390         ocp_data |= SEN_VAL_NORMAL | SEL_RXIDLE;
3391         ocp_write_word(tp, MCU_TYPE_USB, USB_AFE_CTRL2, ocp_data);
3392
3393         ocp_write_word(tp, MCU_TYPE_USB, USB_CONNECT_TIMER, 0x0001);
3394
3395         r8153_power_cut_en(tp, false);
3396         r8153_u1u2en(tp, true);
3397
3398         ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL, ALDPS_SPDWN_RATIO);
3399         ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL2, EEE_SPDWN_RATIO);
3400         ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL3,
3401                        PKT_AVAIL_SPDWN_EN | SUSPEND_SPDWN_EN |
3402                        U1U2_SPDWN_EN | L1_SPDWN_EN);
3403         ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL4,
3404                        PWRSAVE_SPDWN_EN | RXDV_SPDWN_EN | TX10MIDLE_EN |
3405                        TP100_SPDWN_EN | TP500_SPDWN_EN | TP1000_SPDWN_EN |
3406                        EEE_SPDWN_EN);
3407
3408         r8153_enable_eee(tp);
3409         r8153_aldps_en(tp, true);
3410         r8152b_enable_fc(tp);
3411         rtl_tally_reset(tp);
3412         r8153_u2p3en(tp, true);
3413 }
3414
3415 static int rtl8152_pre_reset(struct usb_interface *intf)
3416 {
3417         struct r8152 *tp = usb_get_intfdata(intf);
3418         struct net_device *netdev;
3419
3420         if (!tp)
3421                 return 0;
3422
3423         netdev = tp->netdev;
3424         if (!netif_running(netdev))
3425                 return 0;
3426
3427         netif_stop_queue(netdev);
3428         napi_disable(&tp->napi);
3429         clear_bit(WORK_ENABLE, &tp->flags);
3430         usb_kill_urb(tp->intr_urb);
3431         cancel_delayed_work_sync(&tp->schedule);
3432         if (netif_carrier_ok(netdev)) {
3433                 mutex_lock(&tp->control);
3434                 tp->rtl_ops.disable(tp);
3435                 mutex_unlock(&tp->control);
3436         }
3437
3438         return 0;
3439 }
3440
3441 static int rtl8152_post_reset(struct usb_interface *intf)
3442 {
3443         struct r8152 *tp = usb_get_intfdata(intf);
3444         struct net_device *netdev;
3445
3446         if (!tp)
3447                 return 0;
3448
3449         netdev = tp->netdev;
3450         if (!netif_running(netdev))
3451                 return 0;
3452
3453         set_bit(WORK_ENABLE, &tp->flags);
3454         if (netif_carrier_ok(netdev)) {
3455                 mutex_lock(&tp->control);
3456                 tp->rtl_ops.enable(tp);
3457                 rtl_start_rx(tp);
3458                 rtl8152_set_rx_mode(netdev);
3459                 mutex_unlock(&tp->control);
3460         }
3461
3462         napi_enable(&tp->napi);
3463         netif_wake_queue(netdev);
3464         usb_submit_urb(tp->intr_urb, GFP_KERNEL);
3465
3466         return 0;
3467 }
3468
3469 static bool delay_autosuspend(struct r8152 *tp)
3470 {
3471         bool sw_linking = !!netif_carrier_ok(tp->netdev);
3472         bool hw_linking = !!(rtl8152_get_speed(tp) & LINK_STATUS);
3473
3474         /* This means a linking change occurs and the driver doesn't detect it,
3475          * yet. If the driver has disabled tx/rx and hw is linking on, the
3476          * device wouldn't wake up by receiving any packet.
3477          */
3478         if (work_busy(&tp->schedule.work) || sw_linking != hw_linking)
3479                 return true;
3480
3481         /* If the linking down is occurred by nway, the device may miss the
3482          * linking change event. And it wouldn't wake when linking on.
3483          */
3484         if (!sw_linking && tp->rtl_ops.in_nway(tp))
3485                 return true;
3486         else if (!skb_queue_empty(&tp->tx_queue))
3487                 return true;
3488         else
3489                 return false;
3490 }
3491
3492 static int rtl8152_rumtime_suspend(struct r8152 *tp)
3493 {
3494         struct net_device *netdev = tp->netdev;
3495         int ret = 0;
3496
3497         if (netif_running(netdev) && test_bit(WORK_ENABLE, &tp->flags)) {
3498                 u32 rcr = 0;
3499
3500                 if (delay_autosuspend(tp)) {
3501                         ret = -EBUSY;
3502                         goto out1;
3503                 }
3504
3505                 if (netif_carrier_ok(netdev)) {
3506                         u32 ocp_data;
3507
3508                         rcr = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
3509                         ocp_data = rcr & ~RCR_ACPT_ALL;
3510                         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
3511                         rxdy_gated_en(tp, true);
3512                         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA,
3513                                                  PLA_OOB_CTRL);
3514                         if (!(ocp_data & RXFIFO_EMPTY)) {
3515                                 rxdy_gated_en(tp, false);
3516                                 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, rcr);
3517                                 ret = -EBUSY;
3518                                 goto out1;
3519                         }
3520                 }
3521
3522                 clear_bit(WORK_ENABLE, &tp->flags);
3523                 usb_kill_urb(tp->intr_urb);
3524
3525                 rtl_runtime_suspend_enable(tp, true);
3526
3527                 if (netif_carrier_ok(netdev)) {
3528                         napi_disable(&tp->napi);
3529                         rtl_stop_rx(tp);
3530                         rxdy_gated_en(tp, false);
3531                         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, rcr);
3532                         napi_enable(&tp->napi);
3533                 }
3534         }
3535
3536         set_bit(SELECTIVE_SUSPEND, &tp->flags);
3537
3538 out1:
3539         return ret;
3540 }
3541
3542 static int rtl8152_system_suspend(struct r8152 *tp)
3543 {
3544         struct net_device *netdev = tp->netdev;
3545         int ret = 0;
3546
3547         netif_device_detach(netdev);
3548
3549         if (netif_running(netdev) && test_bit(WORK_ENABLE, &tp->flags)) {
3550                 clear_bit(WORK_ENABLE, &tp->flags);
3551                 usb_kill_urb(tp->intr_urb);
3552                 napi_disable(&tp->napi);
3553                 cancel_delayed_work_sync(&tp->schedule);
3554                 tp->rtl_ops.down(tp);
3555                 napi_enable(&tp->napi);
3556         }
3557
3558         return ret;
3559 }
3560
3561 static int rtl8152_suspend(struct usb_interface *intf, pm_message_t message)
3562 {
3563         struct r8152 *tp = usb_get_intfdata(intf);
3564         int ret;
3565
3566         mutex_lock(&tp->control);
3567
3568         if (PMSG_IS_AUTO(message))
3569                 ret = rtl8152_rumtime_suspend(tp);
3570         else
3571                 ret = rtl8152_system_suspend(tp);
3572
3573         mutex_unlock(&tp->control);
3574
3575         return ret;
3576 }
3577
3578 static int rtl8152_resume(struct usb_interface *intf)
3579 {
3580         struct r8152 *tp = usb_get_intfdata(intf);
3581
3582         mutex_lock(&tp->control);
3583
3584         if (!test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
3585                 tp->rtl_ops.init(tp);
3586                 netif_device_attach(tp->netdev);
3587         }
3588
3589         if (netif_running(tp->netdev) && tp->netdev->flags & IFF_UP) {
3590                 if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
3591                         rtl_runtime_suspend_enable(tp, false);
3592                         clear_bit(SELECTIVE_SUSPEND, &tp->flags);
3593                         napi_disable(&tp->napi);
3594                         set_bit(WORK_ENABLE, &tp->flags);
3595
3596                         if (netif_carrier_ok(tp->netdev)) {
3597                                 if (rtl8152_get_speed(tp) & LINK_STATUS) {
3598                                         rtl_start_rx(tp);
3599                                 } else {
3600                                         netif_carrier_off(tp->netdev);
3601                                         tp->rtl_ops.disable(tp);
3602                                         netif_info(tp, link, tp->netdev,
3603                                                    "linking down\n");
3604                                 }
3605                         }
3606
3607                         napi_enable(&tp->napi);
3608                 } else {
3609                         tp->rtl_ops.up(tp);
3610                         rtl8152_set_speed(tp, AUTONEG_ENABLE,
3611                                           tp->mii.supports_gmii ?
3612                                           SPEED_1000 : SPEED_100,
3613                                           DUPLEX_FULL);
3614                         netif_carrier_off(tp->netdev);
3615                         set_bit(WORK_ENABLE, &tp->flags);
3616                 }
3617                 usb_submit_urb(tp->intr_urb, GFP_KERNEL);
3618         } else if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
3619                 if (tp->netdev->flags & IFF_UP)
3620                         rtl_runtime_suspend_enable(tp, false);
3621                 clear_bit(SELECTIVE_SUSPEND, &tp->flags);
3622         }
3623
3624         mutex_unlock(&tp->control);
3625
3626         return 0;
3627 }
3628
3629 static int rtl8152_reset_resume(struct usb_interface *intf)
3630 {
3631         struct r8152 *tp = usb_get_intfdata(intf);
3632
3633         clear_bit(SELECTIVE_SUSPEND, &tp->flags);
3634         return rtl8152_resume(intf);
3635 }
3636
3637 static void rtl8152_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
3638 {
3639         struct r8152 *tp = netdev_priv(dev);
3640
3641         if (usb_autopm_get_interface(tp->intf) < 0)
3642                 return;
3643
3644         if (!rtl_can_wakeup(tp)) {
3645                 wol->supported = 0;
3646                 wol->wolopts = 0;
3647         } else {
3648                 mutex_lock(&tp->control);
3649                 wol->supported = WAKE_ANY;
3650                 wol->wolopts = __rtl_get_wol(tp);
3651                 mutex_unlock(&tp->control);
3652         }
3653
3654         usb_autopm_put_interface(tp->intf);
3655 }
3656
3657 static int rtl8152_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
3658 {
3659         struct r8152 *tp = netdev_priv(dev);
3660         int ret;
3661
3662         if (!rtl_can_wakeup(tp))
3663                 return -EOPNOTSUPP;
3664
3665         ret = usb_autopm_get_interface(tp->intf);
3666         if (ret < 0)
3667                 goto out_set_wol;
3668
3669         mutex_lock(&tp->control);
3670
3671         __rtl_set_wol(tp, wol->wolopts);
3672         tp->saved_wolopts = wol->wolopts & WAKE_ANY;
3673
3674         mutex_unlock(&tp->control);
3675
3676         usb_autopm_put_interface(tp->intf);
3677
3678 out_set_wol:
3679         return ret;
3680 }
3681
3682 static u32 rtl8152_get_msglevel(struct net_device *dev)
3683 {
3684         struct r8152 *tp = netdev_priv(dev);
3685
3686         return tp->msg_enable;
3687 }
3688
3689 static void rtl8152_set_msglevel(struct net_device *dev, u32 value)
3690 {
3691         struct r8152 *tp = netdev_priv(dev);
3692
3693         tp->msg_enable = value;
3694 }
3695
3696 static void rtl8152_get_drvinfo(struct net_device *netdev,
3697                                 struct ethtool_drvinfo *info)
3698 {
3699         struct r8152 *tp = netdev_priv(netdev);
3700
3701         strlcpy(info->driver, MODULENAME, sizeof(info->driver));
3702         strlcpy(info->version, DRIVER_VERSION, sizeof(info->version));
3703         usb_make_path(tp->udev, info->bus_info, sizeof(info->bus_info));
3704 }
3705
3706 static
3707 int rtl8152_get_settings(struct net_device *netdev, struct ethtool_cmd *cmd)
3708 {
3709         struct r8152 *tp = netdev_priv(netdev);
3710         int ret;
3711
3712         if (!tp->mii.mdio_read)
3713                 return -EOPNOTSUPP;
3714
3715         ret = usb_autopm_get_interface(tp->intf);
3716         if (ret < 0)
3717                 goto out;
3718
3719         mutex_lock(&tp->control);
3720
3721         ret = mii_ethtool_gset(&tp->mii, cmd);
3722
3723         mutex_unlock(&tp->control);
3724
3725         usb_autopm_put_interface(tp->intf);
3726
3727 out:
3728         return ret;
3729 }
3730
3731 static int rtl8152_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
3732 {
3733         struct r8152 *tp = netdev_priv(dev);
3734         int ret;
3735
3736         ret = usb_autopm_get_interface(tp->intf);
3737         if (ret < 0)
3738                 goto out;
3739
3740         mutex_lock(&tp->control);
3741
3742         ret = rtl8152_set_speed(tp, cmd->autoneg, cmd->speed, cmd->duplex);
3743
3744         mutex_unlock(&tp->control);
3745
3746         usb_autopm_put_interface(tp->intf);
3747
3748 out:
3749         return ret;
3750 }
3751
3752 static const char rtl8152_gstrings[][ETH_GSTRING_LEN] = {
3753         "tx_packets",
3754         "rx_packets",
3755         "tx_errors",
3756         "rx_errors",
3757         "rx_missed",
3758         "align_errors",
3759         "tx_single_collisions",
3760         "tx_multi_collisions",
3761         "rx_unicast",
3762         "rx_broadcast",
3763         "rx_multicast",
3764         "tx_aborted",
3765         "tx_underrun",
3766 };
3767
3768 static int rtl8152_get_sset_count(struct net_device *dev, int sset)
3769 {
3770         switch (sset) {
3771         case ETH_SS_STATS:
3772                 return ARRAY_SIZE(rtl8152_gstrings);
3773         default:
3774                 return -EOPNOTSUPP;
3775         }
3776 }
3777
3778 static void rtl8152_get_ethtool_stats(struct net_device *dev,
3779                                       struct ethtool_stats *stats, u64 *data)
3780 {
3781         struct r8152 *tp = netdev_priv(dev);
3782         struct tally_counter tally;
3783
3784         if (usb_autopm_get_interface(tp->intf) < 0)
3785                 return;
3786
3787         generic_ocp_read(tp, PLA_TALLYCNT, sizeof(tally), &tally, MCU_TYPE_PLA);
3788
3789         usb_autopm_put_interface(tp->intf);
3790
3791         data[0] = le64_to_cpu(tally.tx_packets);
3792         data[1] = le64_to_cpu(tally.rx_packets);
3793         data[2] = le64_to_cpu(tally.tx_errors);
3794         data[3] = le32_to_cpu(tally.rx_errors);
3795         data[4] = le16_to_cpu(tally.rx_missed);
3796         data[5] = le16_to_cpu(tally.align_errors);
3797         data[6] = le32_to_cpu(tally.tx_one_collision);
3798         data[7] = le32_to_cpu(tally.tx_multi_collision);
3799         data[8] = le64_to_cpu(tally.rx_unicast);
3800         data[9] = le64_to_cpu(tally.rx_broadcast);
3801         data[10] = le32_to_cpu(tally.rx_multicast);
3802         data[11] = le16_to_cpu(tally.tx_aborted);
3803         data[12] = le16_to_cpu(tally.tx_underrun);
3804 }
3805
3806 static void rtl8152_get_strings(struct net_device *dev, u32 stringset, u8 *data)
3807 {
3808         switch (stringset) {
3809         case ETH_SS_STATS:
3810                 memcpy(data, *rtl8152_gstrings, sizeof(rtl8152_gstrings));
3811                 break;
3812         }
3813 }
3814
3815 static int r8152_get_eee(struct r8152 *tp, struct ethtool_eee *eee)
3816 {
3817         u32 ocp_data, lp, adv, supported = 0;
3818         u16 val;
3819
3820         val = r8152_mmd_read(tp, MDIO_MMD_PCS, MDIO_PCS_EEE_ABLE);
3821         supported = mmd_eee_cap_to_ethtool_sup_t(val);
3822
3823         val = r8152_mmd_read(tp, MDIO_MMD_AN, MDIO_AN_EEE_ADV);
3824         adv = mmd_eee_adv_to_ethtool_adv_t(val);
3825
3826         val = r8152_mmd_read(tp, MDIO_MMD_AN, MDIO_AN_EEE_LPABLE);
3827         lp = mmd_eee_adv_to_ethtool_adv_t(val);
3828
3829         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
3830         ocp_data &= EEE_RX_EN | EEE_TX_EN;
3831
3832         eee->eee_enabled = !!ocp_data;
3833         eee->eee_active = !!(supported & adv & lp);
3834         eee->supported = supported;
3835         eee->advertised = adv;
3836         eee->lp_advertised = lp;
3837
3838         return 0;
3839 }
3840
3841 static int r8152_set_eee(struct r8152 *tp, struct ethtool_eee *eee)
3842 {
3843         u16 val = ethtool_adv_to_mmd_eee_adv_t(eee->advertised);
3844
3845         r8152_eee_en(tp, eee->eee_enabled);
3846
3847         if (!eee->eee_enabled)
3848                 val = 0;
3849
3850         r8152_mmd_write(tp, MDIO_MMD_AN, MDIO_AN_EEE_ADV, val);
3851
3852         return 0;
3853 }
3854
3855 static int r8153_get_eee(struct r8152 *tp, struct ethtool_eee *eee)
3856 {
3857         u32 ocp_data, lp, adv, supported = 0;
3858         u16 val;
3859
3860         val = ocp_reg_read(tp, OCP_EEE_ABLE);
3861         supported = mmd_eee_cap_to_ethtool_sup_t(val);
3862
3863         val = ocp_reg_read(tp, OCP_EEE_ADV);
3864         adv = mmd_eee_adv_to_ethtool_adv_t(val);
3865
3866         val = ocp_reg_read(tp, OCP_EEE_LPABLE);
3867         lp = mmd_eee_adv_to_ethtool_adv_t(val);
3868
3869         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
3870         ocp_data &= EEE_RX_EN | EEE_TX_EN;
3871
3872         eee->eee_enabled = !!ocp_data;
3873         eee->eee_active = !!(supported & adv & lp);
3874         eee->supported = supported;
3875         eee->advertised = adv;
3876         eee->lp_advertised = lp;
3877
3878         return 0;
3879 }
3880
3881 static int r8153_set_eee(struct r8152 *tp, struct ethtool_eee *eee)
3882 {
3883         u16 val = ethtool_adv_to_mmd_eee_adv_t(eee->advertised);
3884
3885         r8153_eee_en(tp, eee->eee_enabled);
3886
3887         if (!eee->eee_enabled)
3888                 val = 0;
3889
3890         ocp_reg_write(tp, OCP_EEE_ADV, val);
3891
3892         return 0;
3893 }
3894
3895 static int
3896 rtl_ethtool_get_eee(struct net_device *net, struct ethtool_eee *edata)
3897 {
3898         struct r8152 *tp = netdev_priv(net);
3899         int ret;
3900
3901         ret = usb_autopm_get_interface(tp->intf);
3902         if (ret < 0)
3903                 goto out;
3904
3905         mutex_lock(&tp->control);
3906
3907         ret = tp->rtl_ops.eee_get(tp, edata);
3908
3909         mutex_unlock(&tp->control);
3910
3911         usb_autopm_put_interface(tp->intf);
3912
3913 out:
3914         return ret;
3915 }
3916
3917 static int
3918 rtl_ethtool_set_eee(struct net_device *net, struct ethtool_eee *edata)
3919 {
3920         struct r8152 *tp = netdev_priv(net);
3921         int ret;
3922
3923         ret = usb_autopm_get_interface(tp->intf);
3924         if (ret < 0)
3925                 goto out;
3926
3927         mutex_lock(&tp->control);
3928
3929         ret = tp->rtl_ops.eee_set(tp, edata);
3930         if (!ret)
3931                 ret = mii_nway_restart(&tp->mii);
3932
3933         mutex_unlock(&tp->control);
3934
3935         usb_autopm_put_interface(tp->intf);
3936
3937 out:
3938         return ret;
3939 }
3940
3941 static int rtl8152_nway_reset(struct net_device *dev)
3942 {
3943         struct r8152 *tp = netdev_priv(dev);
3944         int ret;
3945
3946         ret = usb_autopm_get_interface(tp->intf);
3947         if (ret < 0)
3948                 goto out;
3949
3950         mutex_lock(&tp->control);
3951
3952         ret = mii_nway_restart(&tp->mii);
3953
3954         mutex_unlock(&tp->control);
3955
3956         usb_autopm_put_interface(tp->intf);
3957
3958 out:
3959         return ret;
3960 }
3961
3962 static int rtl8152_get_coalesce(struct net_device *netdev,
3963                                 struct ethtool_coalesce *coalesce)
3964 {
3965         struct r8152 *tp = netdev_priv(netdev);
3966
3967         switch (tp->version) {
3968         case RTL_VER_01:
3969         case RTL_VER_02:
3970                 return -EOPNOTSUPP;
3971         default:
3972                 break;
3973         }
3974
3975         coalesce->rx_coalesce_usecs = tp->coalesce;
3976
3977         return 0;
3978 }
3979
3980 static int rtl8152_set_coalesce(struct net_device *netdev,
3981                                 struct ethtool_coalesce *coalesce)
3982 {
3983         struct r8152 *tp = netdev_priv(netdev);
3984         int ret;
3985
3986         switch (tp->version) {
3987         case RTL_VER_01:
3988         case RTL_VER_02:
3989                 return -EOPNOTSUPP;
3990         default:
3991                 break;
3992         }
3993
3994         if (coalesce->rx_coalesce_usecs > COALESCE_SLOW)
3995                 return -EINVAL;
3996
3997         ret = usb_autopm_get_interface(tp->intf);
3998         if (ret < 0)
3999                 return ret;
4000
4001         mutex_lock(&tp->control);
4002
4003         if (tp->coalesce != coalesce->rx_coalesce_usecs) {
4004                 tp->coalesce = coalesce->rx_coalesce_usecs;
4005
4006                 if (netif_running(tp->netdev) && netif_carrier_ok(netdev))
4007                         r8153_set_rx_early_timeout(tp);
4008         }
4009
4010         mutex_unlock(&tp->control);
4011
4012         usb_autopm_put_interface(tp->intf);
4013
4014         return ret;
4015 }
4016
4017 static struct ethtool_ops ops = {
4018         .get_drvinfo = rtl8152_get_drvinfo,
4019         .get_settings = rtl8152_get_settings,
4020         .set_settings = rtl8152_set_settings,
4021         .get_link = ethtool_op_get_link,
4022         .nway_reset = rtl8152_nway_reset,
4023         .get_msglevel = rtl8152_get_msglevel,
4024         .set_msglevel = rtl8152_set_msglevel,
4025         .get_wol = rtl8152_get_wol,
4026         .set_wol = rtl8152_set_wol,
4027         .get_strings = rtl8152_get_strings,
4028         .get_sset_count = rtl8152_get_sset_count,
4029         .get_ethtool_stats = rtl8152_get_ethtool_stats,
4030         .get_coalesce = rtl8152_get_coalesce,
4031         .set_coalesce = rtl8152_set_coalesce,
4032         .get_eee = rtl_ethtool_get_eee,
4033         .set_eee = rtl_ethtool_set_eee,
4034 };
4035
4036 static int rtl8152_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd)
4037 {
4038         struct r8152 *tp = netdev_priv(netdev);
4039         struct mii_ioctl_data *data = if_mii(rq);
4040         int res;
4041
4042         if (test_bit(RTL8152_UNPLUG, &tp->flags))
4043                 return -ENODEV;
4044
4045         res = usb_autopm_get_interface(tp->intf);
4046         if (res < 0)
4047                 goto out;
4048
4049         switch (cmd) {
4050         case SIOCGMIIPHY:
4051                 data->phy_id = R8152_PHY_ID; /* Internal PHY */
4052                 break;
4053
4054         case SIOCGMIIREG:
4055                 mutex_lock(&tp->control);
4056                 data->val_out = r8152_mdio_read(tp, data->reg_num);
4057                 mutex_unlock(&tp->control);
4058                 break;
4059
4060         case SIOCSMIIREG:
4061                 if (!capable(CAP_NET_ADMIN)) {
4062                         res = -EPERM;
4063                         break;
4064                 }
4065                 mutex_lock(&tp->control);
4066                 r8152_mdio_write(tp, data->reg_num, data->val_in);
4067                 mutex_unlock(&tp->control);
4068                 break;
4069
4070         default:
4071                 res = -EOPNOTSUPP;
4072         }
4073
4074         usb_autopm_put_interface(tp->intf);
4075
4076 out:
4077         return res;
4078 }
4079
4080 static int rtl8152_change_mtu(struct net_device *dev, int new_mtu)
4081 {
4082         struct r8152 *tp = netdev_priv(dev);
4083         int ret;
4084
4085         switch (tp->version) {
4086         case RTL_VER_01:
4087         case RTL_VER_02:
4088                 return eth_change_mtu(dev, new_mtu);
4089         default:
4090                 break;
4091         }
4092
4093         if (new_mtu < 68 || new_mtu > RTL8153_MAX_MTU)
4094                 return -EINVAL;
4095
4096         ret = usb_autopm_get_interface(tp->intf);
4097         if (ret < 0)
4098                 return ret;
4099
4100         mutex_lock(&tp->control);
4101
4102         dev->mtu = new_mtu;
4103
4104         if (netif_running(dev) && netif_carrier_ok(dev))
4105                 r8153_set_rx_early_size(tp);
4106
4107         mutex_unlock(&tp->control);
4108
4109         usb_autopm_put_interface(tp->intf);
4110
4111         return ret;
4112 }
4113
4114 static const struct net_device_ops rtl8152_netdev_ops = {
4115         .ndo_open               = rtl8152_open,
4116         .ndo_stop               = rtl8152_close,
4117         .ndo_do_ioctl           = rtl8152_ioctl,
4118         .ndo_start_xmit         = rtl8152_start_xmit,
4119         .ndo_tx_timeout         = rtl8152_tx_timeout,
4120         .ndo_set_features       = rtl8152_set_features,
4121         .ndo_set_rx_mode        = rtl8152_set_rx_mode,
4122         .ndo_set_mac_address    = rtl8152_set_mac_address,
4123         .ndo_change_mtu         = rtl8152_change_mtu,
4124         .ndo_validate_addr      = eth_validate_addr,
4125         .ndo_features_check     = rtl8152_features_check,
4126 };
4127
4128 static void r8152b_get_version(struct r8152 *tp)
4129 {
4130         u32     ocp_data;
4131         u16     version;
4132
4133         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR1);
4134         version = (u16)(ocp_data & VERSION_MASK);
4135
4136         switch (version) {
4137         case 0x4c00:
4138                 tp->version = RTL_VER_01;
4139                 break;
4140         case 0x4c10:
4141                 tp->version = RTL_VER_02;
4142                 break;
4143         case 0x5c00:
4144                 tp->version = RTL_VER_03;
4145                 tp->mii.supports_gmii = 1;
4146                 break;
4147         case 0x5c10:
4148                 tp->version = RTL_VER_04;
4149                 tp->mii.supports_gmii = 1;
4150                 break;
4151         case 0x5c20:
4152                 tp->version = RTL_VER_05;
4153                 tp->mii.supports_gmii = 1;
4154                 break;
4155         case 0x5c30:
4156                 tp->version = RTL_VER_06;
4157                 tp->mii.supports_gmii = 1;
4158                 break;
4159         default:
4160                 netif_info(tp, probe, tp->netdev,
4161                            "Unknown version 0x%04x\n", version);
4162                 break;
4163         }
4164 }
4165
4166 static void rtl8152_unload(struct r8152 *tp)
4167 {
4168         if (test_bit(RTL8152_UNPLUG, &tp->flags))
4169                 return;
4170
4171         if (tp->version != RTL_VER_01)
4172                 r8152_power_cut_en(tp, true);
4173 }
4174
4175 static void rtl8153_unload(struct r8152 *tp)
4176 {
4177         if (test_bit(RTL8152_UNPLUG, &tp->flags))
4178                 return;
4179
4180         r8153_power_cut_en(tp, false);
4181 }
4182
4183 static int rtl_ops_init(struct r8152 *tp)
4184 {
4185         struct rtl_ops *ops = &tp->rtl_ops;
4186         int ret = 0;
4187
4188         switch (tp->version) {
4189         case RTL_VER_01:
4190         case RTL_VER_02:
4191                 ops->init               = r8152b_init;
4192                 ops->enable             = rtl8152_enable;
4193                 ops->disable            = rtl8152_disable;
4194                 ops->up                 = rtl8152_up;
4195                 ops->down               = rtl8152_down;
4196                 ops->unload             = rtl8152_unload;
4197                 ops->eee_get            = r8152_get_eee;
4198                 ops->eee_set            = r8152_set_eee;
4199                 ops->in_nway            = rtl8152_in_nway;
4200                 break;
4201
4202         case RTL_VER_03:
4203         case RTL_VER_04:
4204         case RTL_VER_05:
4205         case RTL_VER_06:
4206                 ops->init               = r8153_init;
4207                 ops->enable             = rtl8153_enable;
4208                 ops->disable            = rtl8153_disable;
4209                 ops->up                 = rtl8153_up;
4210                 ops->down               = rtl8153_down;
4211                 ops->unload             = rtl8153_unload;
4212                 ops->eee_get            = r8153_get_eee;
4213                 ops->eee_set            = r8153_set_eee;
4214                 ops->in_nway            = rtl8153_in_nway;
4215                 break;
4216
4217         default:
4218                 ret = -ENODEV;
4219                 netif_err(tp, probe, tp->netdev, "Unknown Device\n");
4220                 break;
4221         }
4222
4223         return ret;
4224 }
4225
4226 static int rtl8152_probe(struct usb_interface *intf,
4227                          const struct usb_device_id *id)
4228 {
4229         struct usb_device *udev = interface_to_usbdev(intf);
4230         struct r8152 *tp;
4231         struct net_device *netdev;
4232         int ret;
4233
4234         if (udev->actconfig->desc.bConfigurationValue != 1) {
4235                 usb_driver_set_configuration(udev, 1);
4236                 return -ENODEV;
4237         }
4238
4239         usb_reset_device(udev);
4240         netdev = alloc_etherdev(sizeof(struct r8152));
4241         if (!netdev) {
4242                 dev_err(&intf->dev, "Out of memory\n");
4243                 return -ENOMEM;
4244         }
4245
4246         SET_NETDEV_DEV(netdev, &intf->dev);
4247         tp = netdev_priv(netdev);
4248         tp->msg_enable = 0x7FFF;
4249
4250         tp->udev = udev;
4251         tp->netdev = netdev;
4252         tp->intf = intf;
4253
4254         r8152b_get_version(tp);
4255         ret = rtl_ops_init(tp);
4256         if (ret)
4257                 goto out;
4258
4259         mutex_init(&tp->control);
4260         INIT_DELAYED_WORK(&tp->schedule, rtl_work_func_t);
4261
4262         netdev->netdev_ops = &rtl8152_netdev_ops;
4263         netdev->watchdog_timeo = RTL8152_TX_TIMEOUT;
4264
4265         netdev->features |= NETIF_F_RXCSUM | NETIF_F_IP_CSUM | NETIF_F_SG |
4266                             NETIF_F_TSO | NETIF_F_FRAGLIST | NETIF_F_IPV6_CSUM |
4267                             NETIF_F_TSO6 | NETIF_F_HW_VLAN_CTAG_RX |
4268                             NETIF_F_HW_VLAN_CTAG_TX;
4269         netdev->hw_features = NETIF_F_RXCSUM | NETIF_F_IP_CSUM | NETIF_F_SG |
4270                               NETIF_F_TSO | NETIF_F_FRAGLIST |
4271                               NETIF_F_IPV6_CSUM | NETIF_F_TSO6 |
4272                               NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HW_VLAN_CTAG_TX;
4273         netdev->vlan_features = NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_TSO |
4274                                 NETIF_F_HIGHDMA | NETIF_F_FRAGLIST |
4275                                 NETIF_F_IPV6_CSUM | NETIF_F_TSO6;
4276
4277         if (tp->version == RTL_VER_01) {
4278                 netdev->features &= ~NETIF_F_RXCSUM;
4279                 netdev->hw_features &= ~NETIF_F_RXCSUM;
4280         }
4281
4282         netdev->ethtool_ops = &ops;
4283         netif_set_gso_max_size(netdev, RTL_LIMITED_TSO_SIZE);
4284
4285         tp->mii.dev = netdev;
4286         tp->mii.mdio_read = read_mii_word;
4287         tp->mii.mdio_write = write_mii_word;
4288         tp->mii.phy_id_mask = 0x3f;
4289         tp->mii.reg_num_mask = 0x1f;
4290         tp->mii.phy_id = R8152_PHY_ID;
4291
4292         switch (udev->speed) {
4293         case USB_SPEED_SUPER:
4294                 tp->coalesce = COALESCE_SUPER;
4295                 break;
4296         case USB_SPEED_HIGH:
4297                 tp->coalesce = COALESCE_HIGH;
4298                 break;
4299         default:
4300                 tp->coalesce = COALESCE_SLOW;
4301                 break;
4302         }
4303
4304         intf->needs_remote_wakeup = 1;
4305
4306         tp->rtl_ops.init(tp);
4307         set_ethernet_addr(tp);
4308
4309         usb_set_intfdata(intf, tp);
4310         netif_napi_add(netdev, &tp->napi, r8152_poll, RTL8152_NAPI_WEIGHT);
4311
4312         ret = register_netdev(netdev);
4313         if (ret != 0) {
4314                 netif_err(tp, probe, netdev, "couldn't register the device\n");
4315                 goto out1;
4316         }
4317
4318         if (!rtl_can_wakeup(tp))
4319                 __rtl_set_wol(tp, 0);
4320
4321         tp->saved_wolopts = __rtl_get_wol(tp);
4322         if (tp->saved_wolopts)
4323                 device_set_wakeup_enable(&udev->dev, true);
4324         else
4325                 device_set_wakeup_enable(&udev->dev, false);
4326
4327         netif_info(tp, probe, netdev, "%s\n", DRIVER_VERSION);
4328
4329         return 0;
4330
4331 out1:
4332         netif_napi_del(&tp->napi);
4333         usb_set_intfdata(intf, NULL);
4334 out:
4335         free_netdev(netdev);
4336         return ret;
4337 }
4338
4339 static void rtl8152_disconnect(struct usb_interface *intf)
4340 {
4341         struct r8152 *tp = usb_get_intfdata(intf);
4342
4343         usb_set_intfdata(intf, NULL);
4344         if (tp) {
4345                 struct usb_device *udev = tp->udev;
4346
4347                 if (udev->state == USB_STATE_NOTATTACHED)
4348                         set_bit(RTL8152_UNPLUG, &tp->flags);
4349
4350                 netif_napi_del(&tp->napi);
4351                 unregister_netdev(tp->netdev);
4352                 tp->rtl_ops.unload(tp);
4353                 free_netdev(tp->netdev);
4354         }
4355 }
4356
4357 #define REALTEK_USB_DEVICE(vend, prod)  \
4358         .match_flags = USB_DEVICE_ID_MATCH_DEVICE | \
4359                        USB_DEVICE_ID_MATCH_INT_CLASS, \
4360         .idVendor = (vend), \
4361         .idProduct = (prod), \
4362         .bInterfaceClass = USB_CLASS_VENDOR_SPEC \
4363 }, \
4364 { \
4365         .match_flags = USB_DEVICE_ID_MATCH_INT_INFO | \
4366                        USB_DEVICE_ID_MATCH_DEVICE, \
4367         .idVendor = (vend), \
4368         .idProduct = (prod), \
4369         .bInterfaceClass = USB_CLASS_COMM, \
4370         .bInterfaceSubClass = USB_CDC_SUBCLASS_ETHERNET, \
4371         .bInterfaceProtocol = USB_CDC_PROTO_NONE
4372
4373 /* table of devices that work with this driver */
4374 static struct usb_device_id rtl8152_table[] = {
4375         {REALTEK_USB_DEVICE(VENDOR_ID_REALTEK, 0x8152)},
4376         {REALTEK_USB_DEVICE(VENDOR_ID_REALTEK, 0x8153)},
4377         {REALTEK_USB_DEVICE(VENDOR_ID_SAMSUNG, 0xa101)},
4378         {REALTEK_USB_DEVICE(VENDOR_ID_LENOVO,  0x7205)},
4379         {REALTEK_USB_DEVICE(VENDOR_ID_LENOVO,  0x304f)},
4380         {REALTEK_USB_DEVICE(VENDOR_ID_LINKSYS, 0x0041)},
4381         {REALTEK_USB_DEVICE(VENDOR_ID_NVIDIA,  0x09ff)},
4382         {}
4383 };
4384
4385 MODULE_DEVICE_TABLE(usb, rtl8152_table);
4386
4387 static struct usb_driver rtl8152_driver = {
4388         .name =         MODULENAME,
4389         .id_table =     rtl8152_table,
4390         .probe =        rtl8152_probe,
4391         .disconnect =   rtl8152_disconnect,
4392         .suspend =      rtl8152_suspend,
4393         .resume =       rtl8152_resume,
4394         .reset_resume = rtl8152_reset_resume,
4395         .pre_reset =    rtl8152_pre_reset,
4396         .post_reset =   rtl8152_post_reset,
4397         .supports_autosuspend = 1,
4398         .disable_hub_initiated_lpm = 1,
4399 };
4400
4401 module_usb_driver(rtl8152_driver);
4402
4403 MODULE_AUTHOR(DRIVER_AUTHOR);
4404 MODULE_DESCRIPTION(DRIVER_DESC);
4405 MODULE_LICENSE("GPL");