drivers/net/wireless/ath/ath10k/core.c

   1 /*
   2  * Copyright (c) 2005-2011 Atheros Communications Inc.
   3  * Copyright (c) 2011-2013, 2017 Qualcomm Atheros, Inc.
   4  *
   5  * Permission to use, copy, modify, and/or distribute this software for any
   6  * purpose with or without fee is hereby granted, provided that the above
   7  * copyright notice and this permission notice appear in all copies.
   8  *
   9  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  10  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  11  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  12  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  13  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  14  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  15  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  16  */
  17
  18 #include <linux/module.h>
  19 #include <linux/firmware.h>
  20 #include <linux/of.h>
  21 #include <asm/byteorder.h>
  22
  23 #include "core.h"
  24 #include "mac.h"
  25 #include "htc.h"
  26 #include "hif.h"
  27 #include "wmi.h"
  28 #include "bmi.h"
  29 #include "debug.h"
  30 #include "htt.h"
  31 #include "testmode.h"
  32 #include "wmi-ops.h"
  33
  34 unsigned int ath10k_debug_mask;
  35 static unsigned int ath10k_cryptmode_param;
  36 static bool uart_print;
  37 static bool skip_otp;
  38 static bool rawmode;
  39
  40 module_param_named(debug_mask, ath10k_debug_mask, uint, 0644);
  41 module_param_named(cryptmode, ath10k_cryptmode_param, uint, 0644);
  42 module_param(uart_print, bool, 0644);
  43 module_param(skip_otp, bool, 0644);
  44 module_param(rawmode, bool, 0644);
  45
  46 MODULE_PARM_DESC(debug_mask, "Debugging mask");
  47 MODULE_PARM_DESC(uart_print, "Uart target debugging");
  48 MODULE_PARM_DESC(skip_otp, "Skip otp failure for calibration in testmode");
  49 MODULE_PARM_DESC(cryptmode, "Crypto mode: 0-hardware, 1-software");
  50 MODULE_PARM_DESC(rawmode, "Use raw 802.11 frame datapath");
  51
  52 static const struct ath10k_hw_params ath10k_hw_params_list[] = {
  53         {
  54                 .id = QCA988X_HW_2_0_VERSION,
  55                 .dev_id = QCA988X_2_0_DEVICE_ID,
  56                 .name = "qca988x hw2.0",
  57                 .patch_load_addr = QCA988X_HW_2_0_PATCH_LOAD_ADDR,
  58                 .uart_pin = 7,
  59                 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_ALL,
  60                 .otp_exe_param = 0,
  61                 .channel_counters_freq_hz = 88000,
  62                 .max_probe_resp_desc_thres = 0,
  63                 .cal_data_len = 2116,
  64                 .fw = {
  65                         .dir = QCA988X_HW_2_0_FW_DIR,
  66                         .board = QCA988X_HW_2_0_BOARD_DATA_FILE,
  67                         .board_size = QCA988X_BOARD_DATA_SZ,
  68                         .board_ext_size = QCA988X_BOARD_EXT_DATA_SZ,
  69                 },
  70                 .hw_ops = &qca988x_ops,
  71                 .decap_align_bytes = 4,
  72         },
  73         {
  74                 .id = QCA9887_HW_1_0_VERSION,
  75                 .dev_id = QCA9887_1_0_DEVICE_ID,
  76                 .name = "qca9887 hw1.0",
  77                 .patch_load_addr = QCA9887_HW_1_0_PATCH_LOAD_ADDR,
  78                 .uart_pin = 7,
  79                 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_ALL,
  80                 .otp_exe_param = 0,
  81                 .channel_counters_freq_hz = 88000,
  82                 .max_probe_resp_desc_thres = 0,
  83                 .cal_data_len = 2116,
  84                 .fw = {
  85                         .dir = QCA9887_HW_1_0_FW_DIR,
  86                         .board = QCA9887_HW_1_0_BOARD_DATA_FILE,
  87                         .board_size = QCA9887_BOARD_DATA_SZ,
  88                         .board_ext_size = QCA9887_BOARD_EXT_DATA_SZ,
  89                 },
  90                 .hw_ops = &qca988x_ops,
  91                 .decap_align_bytes = 4,
  92         },
  93         {
  94                 .id = QCA6174_HW_2_1_VERSION,
  95                 .dev_id = QCA6164_2_1_DEVICE_ID,
  96                 .name = "qca6164 hw2.1",
  97                 .patch_load_addr = QCA6174_HW_2_1_PATCH_LOAD_ADDR,
  98                 .uart_pin = 6,
  99                 .otp_exe_param = 0,
 100                 .channel_counters_freq_hz = 88000,
 101                 .max_probe_resp_desc_thres = 0,
 102                 .cal_data_len = 8124,
 103                 .fw = {
 104                         .dir = QCA6174_HW_2_1_FW_DIR,
 105                         .board = QCA6174_HW_2_1_BOARD_DATA_FILE,
 106                         .board_size = QCA6174_BOARD_DATA_SZ,
 107                         .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
 108                 },
 109                 .hw_ops = &qca988x_ops,
 110                 .decap_align_bytes = 4,
 111         },
 112         {
 113                 .id = QCA6174_HW_2_1_VERSION,
 114                 .dev_id = QCA6174_2_1_DEVICE_ID,
 115                 .name = "qca6174 hw2.1",
 116                 .patch_load_addr = QCA6174_HW_2_1_PATCH_LOAD_ADDR,
 117                 .uart_pin = 6,
 118                 .otp_exe_param = 0,
 119                 .channel_counters_freq_hz = 88000,
 120                 .max_probe_resp_desc_thres = 0,
 121                 .cal_data_len = 8124,
 122                 .fw = {
 123                         .dir = QCA6174_HW_2_1_FW_DIR,
 124                         .board = QCA6174_HW_2_1_BOARD_DATA_FILE,
 125                         .board_size = QCA6174_BOARD_DATA_SZ,
 126                         .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
 127                 },
 128                 .hw_ops = &qca988x_ops,
 129                 .decap_align_bytes = 4,
 130         },
 131         {
 132                 .id = QCA6174_HW_3_0_VERSION,
 133                 .dev_id = QCA6174_2_1_DEVICE_ID,
 134                 .name = "qca6174 hw3.0",
 135                 .patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR,
 136                 .uart_pin = 6,
 137                 .otp_exe_param = 0,
 138                 .channel_counters_freq_hz = 88000,
 139                 .max_probe_resp_desc_thres = 0,
 140                 .cal_data_len = 8124,
 141                 .fw = {
 142                         .dir = QCA6174_HW_3_0_FW_DIR,
 143                         .board = QCA6174_HW_3_0_BOARD_DATA_FILE,
 144                         .board_size = QCA6174_BOARD_DATA_SZ,
 145                         .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
 146                 },
 147                 .hw_ops = &qca988x_ops,
 148                 .decap_align_bytes = 4,
 149         },
 150         {
 151                 .id = QCA6174_HW_3_2_VERSION,
 152                 .dev_id = QCA6174_2_1_DEVICE_ID,
 153                 .name = "qca6174 hw3.2",
 154                 .patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR,
 155                 .uart_pin = 6,
 156                 .otp_exe_param = 0,
 157                 .channel_counters_freq_hz = 88000,
 158                 .max_probe_resp_desc_thres = 0,
 159                 .cal_data_len = 8124,
 160                 .fw = {
 161                         /* uses same binaries as hw3.0 */
 162                         .dir = QCA6174_HW_3_0_FW_DIR,
 163                         .board = QCA6174_HW_3_0_BOARD_DATA_FILE,
 164                         .board_size = QCA6174_BOARD_DATA_SZ,
 165                         .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
 166                 },
 167                 .hw_ops = &qca988x_ops,
 168                 .decap_align_bytes = 4,
 169         },
 170         {
 171                 .id = QCA99X0_HW_2_0_DEV_VERSION,
 172                 .dev_id = QCA99X0_2_0_DEVICE_ID,
 173                 .name = "qca99x0 hw2.0",
 174                 .patch_load_addr = QCA99X0_HW_2_0_PATCH_LOAD_ADDR,
 175                 .uart_pin = 7,
 176                 .otp_exe_param = 0x00000700,
 177                 .continuous_frag_desc = true,
 178                 .cck_rate_map_rev2 = true,
 179                 .channel_counters_freq_hz = 150000,
 180                 .max_probe_resp_desc_thres = 24,
 181                 .tx_chain_mask = 0xf,
 182                 .rx_chain_mask = 0xf,
 183                 .max_spatial_stream = 4,
 184                 .cal_data_len = 12064,
 185                 .fw = {
 186                         .dir = QCA99X0_HW_2_0_FW_DIR,
 187                         .board = QCA99X0_HW_2_0_BOARD_DATA_FILE,
 188                         .board_size = QCA99X0_BOARD_DATA_SZ,
 189                         .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ,
 190                 },
 191                 .sw_decrypt_mcast_mgmt = true,
 192                 .hw_ops = &qca99x0_ops,
 193                 .decap_align_bytes = 1,
 194         },
 195         {
 196                 .id = QCA9984_HW_1_0_DEV_VERSION,
 197                 .dev_id = QCA9984_1_0_DEVICE_ID,
 198                 .name = "qca9984/qca9994 hw1.0",
 199                 .patch_load_addr = QCA9984_HW_1_0_PATCH_LOAD_ADDR,
 200                 .uart_pin = 7,
 201                 .otp_exe_param = 0x00000700,
 202                 .continuous_frag_desc = true,
 203                 .cck_rate_map_rev2 = true,
 204                 .channel_counters_freq_hz = 150000,
 205                 .max_probe_resp_desc_thres = 24,
 206                 .tx_chain_mask = 0xf,
 207                 .rx_chain_mask = 0xf,
 208                 .max_spatial_stream = 4,
 209                 .cal_data_len = 12064,
 210                 .fw = {
 211                         .dir = QCA9984_HW_1_0_FW_DIR,
 212                         .board = QCA9984_HW_1_0_BOARD_DATA_FILE,
 213                         .board_size = QCA99X0_BOARD_DATA_SZ,
 214                         .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ,
 215                 },
 216                 .sw_decrypt_mcast_mgmt = true,
 217                 .hw_ops = &qca99x0_ops,
 218                 .decap_align_bytes = 1,
 219         },
 220         {
 221                 .id = QCA9888_HW_2_0_DEV_VERSION,
 222                 .dev_id = QCA9888_2_0_DEVICE_ID,
 223                 .name = "qca9888 hw2.0",
 224                 .patch_load_addr = QCA9888_HW_2_0_PATCH_LOAD_ADDR,
 225                 .uart_pin = 7,
 226                 .otp_exe_param = 0x00000700,
 227                 .continuous_frag_desc = true,
 228                 .channel_counters_freq_hz = 150000,
 229                 .max_probe_resp_desc_thres = 24,
 230                 .tx_chain_mask = 3,
 231                 .rx_chain_mask = 3,
 232                 .max_spatial_stream = 2,
 233                 .cal_data_len = 12064,
 234                 .fw = {
 235                         .dir = QCA9888_HW_2_0_FW_DIR,
 236                         .board = QCA9888_HW_2_0_BOARD_DATA_FILE,
 237                         .board_size = QCA99X0_BOARD_DATA_SZ,
 238                         .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ,
 239                 },
 240                 .sw_decrypt_mcast_mgmt = true,
 241                 .hw_ops = &qca99x0_ops,
 242                 .decap_align_bytes = 1,
 243         },
 244         {
 245                 .id = QCA9377_HW_1_0_DEV_VERSION,
 246                 .dev_id = QCA9377_1_0_DEVICE_ID,
 247                 .name = "qca9377 hw1.0",
 248                 .patch_load_addr = QCA9377_HW_1_0_PATCH_LOAD_ADDR,
 249                 .uart_pin = 6,
 250                 .otp_exe_param = 0,
 251                 .channel_counters_freq_hz = 88000,
 252                 .max_probe_resp_desc_thres = 0,
 253                 .cal_data_len = 8124,
 254                 .fw = {
 255                         .dir = QCA9377_HW_1_0_FW_DIR,
 256                         .board = QCA9377_HW_1_0_BOARD_DATA_FILE,
 257                         .board_size = QCA9377_BOARD_DATA_SZ,
 258                         .board_ext_size = QCA9377_BOARD_EXT_DATA_SZ,
 259                 },
 260                 .hw_ops = &qca988x_ops,
 261                 .decap_align_bytes = 4,
 262         },
 263         {
 264                 .id = QCA9377_HW_1_1_DEV_VERSION,
 265                 .dev_id = QCA9377_1_0_DEVICE_ID,
 266                 .name = "qca9377 hw1.1",
 267                 .patch_load_addr = QCA9377_HW_1_0_PATCH_LOAD_ADDR,
 268                 .uart_pin = 6,
 269                 .otp_exe_param = 0,
 270                 .channel_counters_freq_hz = 88000,
 271                 .max_probe_resp_desc_thres = 0,
 272                 .cal_data_len = 8124,
 273                 .fw = {
 274                         .dir = QCA9377_HW_1_0_FW_DIR,
 275                         .board = QCA9377_HW_1_0_BOARD_DATA_FILE,
 276                         .board_size = QCA9377_BOARD_DATA_SZ,
 277                         .board_ext_size = QCA9377_BOARD_EXT_DATA_SZ,
 278                 },
 279                 .hw_ops = &qca988x_ops,
 280                 .decap_align_bytes = 4,
 281         },
 282         {
 283                 .id = QCA4019_HW_1_0_DEV_VERSION,
 284                 .dev_id = 0,
 285                 .name = "qca4019 hw1.0",
 286                 .patch_load_addr = QCA4019_HW_1_0_PATCH_LOAD_ADDR,
 287                 .uart_pin = 7,
 288                 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH,
 289                 .otp_exe_param = 0x0010000,
 290                 .continuous_frag_desc = true,
 291                 .cck_rate_map_rev2 = true,
 292                 .channel_counters_freq_hz = 125000,
 293                 .max_probe_resp_desc_thres = 24,
 294                 .tx_chain_mask = 0x3,
 295                 .rx_chain_mask = 0x3,
 296                 .max_spatial_stream = 2,
 297                 .cal_data_len = 12064,
 298                 .fw = {
 299                         .dir = QCA4019_HW_1_0_FW_DIR,
 300                         .board = QCA4019_HW_1_0_BOARD_DATA_FILE,
 301                         .board_size = QCA4019_BOARD_DATA_SZ,
 302                         .board_ext_size = QCA4019_BOARD_EXT_DATA_SZ,
 303                 },
 304                 .sw_decrypt_mcast_mgmt = true,
 305                 .hw_ops = &qca99x0_ops,
 306                 .decap_align_bytes = 1,
 307         },
 308         {
 309                 .id = ATH10K_HW_WCN3990,
 310                 .dev_id = 0,
 311                 .name = "wcn3990 hw1.0",
 312                 .continuous_frag_desc = true,
 313                 .tx_chain_mask = 0x7,
 314                 .rx_chain_mask = 0x7,
 315                 .max_spatial_stream = 4,
 316                 .fw = {
 317                         .dir = WCN3990_HW_1_0_FW_DIR,
 318                 },
 319                 .sw_decrypt_mcast_mgmt = true,
 320                 .hw_ops = &wcn3990_ops,
 321                 .decap_align_bytes = 1,
 322         },
 323 };
 324
 325 static const char *const ath10k_core_fw_feature_str[] = {
 326         [ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX] = "wmi-mgmt-rx",
 327         [ATH10K_FW_FEATURE_WMI_10X] = "wmi-10.x",
 328         [ATH10K_FW_FEATURE_HAS_WMI_MGMT_TX] = "has-wmi-mgmt-tx",
 329         [ATH10K_FW_FEATURE_NO_P2P] = "no-p2p",
 330         [ATH10K_FW_FEATURE_WMI_10_2] = "wmi-10.2",
 331         [ATH10K_FW_FEATURE_MULTI_VIF_PS_SUPPORT] = "multi-vif-ps",
 332         [ATH10K_FW_FEATURE_WOWLAN_SUPPORT] = "wowlan",
 333         [ATH10K_FW_FEATURE_IGNORE_OTP_RESULT] = "ignore-otp",
 334         [ATH10K_FW_FEATURE_NO_NWIFI_DECAP_4ADDR_PADDING] = "no-4addr-pad",
 335         [ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT] = "skip-clock-init",
 336         [ATH10K_FW_FEATURE_RAW_MODE_SUPPORT] = "raw-mode",
 337         [ATH10K_FW_FEATURE_SUPPORTS_ADAPTIVE_CCA] = "adaptive-cca",
 338         [ATH10K_FW_FEATURE_MFP_SUPPORT] = "mfp",
 339         [ATH10K_FW_FEATURE_PEER_FLOW_CONTROL] = "peer-flow-ctrl",
 340         [ATH10K_FW_FEATURE_BTCOEX_PARAM] = "btcoex-param",
 341         [ATH10K_FW_FEATURE_SKIP_NULL_FUNC_WAR] = "skip-null-func-war",
 342 };
 343
 344 static unsigned int ath10k_core_get_fw_feature_str(char *buf,
 345                                                    size_t buf_len,
 346                                                    enum ath10k_fw_features feat)
 347 {
 348         /* make sure that ath10k_core_fw_feature_str[] gets updated */
 349         BUILD_BUG_ON(ARRAY_SIZE(ath10k_core_fw_feature_str) !=
 350                      ATH10K_FW_FEATURE_COUNT);
 351
 352         if (feat >= ARRAY_SIZE(ath10k_core_fw_feature_str) ||
 353             WARN_ON(!ath10k_core_fw_feature_str[feat])) {
 354                 return scnprintf(buf, buf_len, "bit%d", feat);
 355         }
 356
 357         return scnprintf(buf, buf_len, "%s", ath10k_core_fw_feature_str[feat]);
 358 }
 359
 360 void ath10k_core_get_fw_features_str(struct ath10k *ar,
 361                                      char *buf,
 362                                      size_t buf_len)
 363 {
 364         unsigned int len = 0;
 365         int i;
 366
 367         for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) {
 368                 if (test_bit(i, ar->normal_mode_fw.fw_file.fw_features)) {
 369                         if (len > 0)
 370                                 len += scnprintf(buf + len, buf_len - len, ",");
 371
 372                         len += ath10k_core_get_fw_feature_str(buf + len,
 373                                                               buf_len - len,
 374                                                               i);
 375                 }
 376         }
 377 }
 378
 379 static void ath10k_send_suspend_complete(struct ath10k *ar)
 380 {
 381         ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot suspend complete\n");
 382
 383         complete(&ar->target_suspend);
 384 }
 385
 386 static int ath10k_init_configure_target(struct ath10k *ar)
 387 {
 388         u32 param_host;
 389         int ret;
 390
 391         /* tell target which HTC version it is used*/
 392         ret = ath10k_bmi_write32(ar, hi_app_host_interest,
 393                                  HTC_PROTOCOL_VERSION);
 394         if (ret) {
 395                 ath10k_err(ar, "settings HTC version failed\n");
 396                 return ret;
 397         }
 398
 399         /* set the firmware mode to STA/IBSS/AP */
 400         ret = ath10k_bmi_read32(ar, hi_option_flag, &param_host);
 401         if (ret) {
 402                 ath10k_err(ar, "setting firmware mode (1/2) failed\n");
 403                 return ret;
 404         }
 405
 406         /* TODO following parameters need to be re-visited. */
 407         /* num_device */
 408         param_host |= (1 << HI_OPTION_NUM_DEV_SHIFT);
 409         /* Firmware mode */
 410         /* FIXME: Why FW_MODE_AP ??.*/
 411         param_host |= (HI_OPTION_FW_MODE_AP << HI_OPTION_FW_MODE_SHIFT);
 412         /* mac_addr_method */
 413         param_host |= (1 << HI_OPTION_MAC_ADDR_METHOD_SHIFT);
 414         /* firmware_bridge */
 415         param_host |= (0 << HI_OPTION_FW_BRIDGE_SHIFT);
 416         /* fwsubmode */
 417         param_host |= (0 << HI_OPTION_FW_SUBMODE_SHIFT);
 418
 419         ret = ath10k_bmi_write32(ar, hi_option_flag, param_host);
 420         if (ret) {
 421                 ath10k_err(ar, "setting firmware mode (2/2) failed\n");
 422                 return ret;
 423         }
 424
 425         /* We do all byte-swapping on the host */
 426         ret = ath10k_bmi_write32(ar, hi_be, 0);
 427         if (ret) {
 428                 ath10k_err(ar, "setting host CPU BE mode failed\n");
 429                 return ret;
 430         }
 431
 432         /* FW descriptor/Data swap flags */
 433         ret = ath10k_bmi_write32(ar, hi_fw_swap, 0);
 434
 435         if (ret) {
 436                 ath10k_err(ar, "setting FW data/desc swap flags failed\n");
 437                 return ret;
 438         }
 439
 440         /* Some devices have a special sanity check that verifies the PCI
 441          * Device ID is written to this host interest var. It is known to be
 442          * required to boot QCA6164.
 443          */
 444         ret = ath10k_bmi_write32(ar, hi_hci_uart_pwr_mgmt_params_ext,
 445                                  ar->dev_id);
 446         if (ret) {
 447                 ath10k_err(ar, "failed to set pwr_mgmt_params: %d\n", ret);
 448                 return ret;
 449         }
 450
 451         return 0;
 452 }
 453
 454 static const struct firmware *ath10k_fetch_fw_file(struct ath10k *ar,
 455                                                    const char *dir,
 456                                                    const char *file)
 457 {
 458         char filename[100];
 459         const struct firmware *fw;
 460         int ret;
 461
 462         if (file == NULL)
 463                 return ERR_PTR(-ENOENT);
 464
 465         if (dir == NULL)
 466                 dir = ".";
 467
 468         snprintf(filename, sizeof(filename), "%s/%s", dir, file);
 469         ret = request_firmware(&fw, filename, ar->dev);
 470         if (ret)
 471                 return ERR_PTR(ret);
 472
 473         return fw;
 474 }
 475
 476 static int ath10k_push_board_ext_data(struct ath10k *ar, const void *data,
 477                                       size_t data_len)
 478 {
 479         u32 board_data_size = ar->hw_params.fw.board_size;
 480         u32 board_ext_data_size = ar->hw_params.fw.board_ext_size;
 481         u32 board_ext_data_addr;
 482         int ret;
 483
 484         ret = ath10k_bmi_read32(ar, hi_board_ext_data, &board_ext_data_addr);
 485         if (ret) {
 486                 ath10k_err(ar, "could not read board ext data addr (%d)\n",
 487                            ret);
 488                 return ret;
 489         }
 490
 491         ath10k_dbg(ar, ATH10K_DBG_BOOT,
 492                    "boot push board extended data addr 0x%x\n",
 493                    board_ext_data_addr);
 494
 495         if (board_ext_data_addr == 0)
 496                 return 0;
 497
 498         if (data_len != (board_data_size + board_ext_data_size)) {
 499                 ath10k_err(ar, "invalid board (ext) data sizes %zu != %d+%d\n",
 500                            data_len, board_data_size, board_ext_data_size);
 501                 return -EINVAL;
 502         }
 503
 504         ret = ath10k_bmi_write_memory(ar, board_ext_data_addr,
 505                                       data + board_data_size,
 506                                       board_ext_data_size);
 507         if (ret) {
 508                 ath10k_err(ar, "could not write board ext data (%d)\n", ret);
 509                 return ret;
 510         }
 511
 512         ret = ath10k_bmi_write32(ar, hi_board_ext_data_config,
 513                                  (board_ext_data_size << 16) | 1);
 514         if (ret) {
 515                 ath10k_err(ar, "could not write board ext data bit (%d)\n",
 516                            ret);
 517                 return ret;
 518         }
 519
 520         return 0;
 521 }
 522
 523 static int ath10k_download_board_data(struct ath10k *ar, const void *data,
 524                                       size_t data_len)
 525 {
 526         u32 board_data_size = ar->hw_params.fw.board_size;
 527         u32 address;
 528         int ret;
 529
 530         ret = ath10k_push_board_ext_data(ar, data, data_len);
 531         if (ret) {
 532                 ath10k_err(ar, "could not push board ext data (%d)\n", ret);
 533                 goto exit;
 534         }
 535
 536         ret = ath10k_bmi_read32(ar, hi_board_data, &address);
 537         if (ret) {
 538                 ath10k_err(ar, "could not read board data addr (%d)\n", ret);
 539                 goto exit;
 540         }
 541
 542         ret = ath10k_bmi_write_memory(ar, address, data,
 543                                       min_t(u32, board_data_size,
 544                                             data_len));
 545         if (ret) {
 546                 ath10k_err(ar, "could not write board data (%d)\n", ret);
 547                 goto exit;
 548         }
 549
 550         ret = ath10k_bmi_write32(ar, hi_board_data_initialized, 1);
 551         if (ret) {
 552                 ath10k_err(ar, "could not write board data bit (%d)\n", ret);
 553                 goto exit;
 554         }
 555
 556 exit:
 557         return ret;
 558 }
 559
 560 static int ath10k_download_cal_file(struct ath10k *ar,
 561                                     const struct firmware *file)
 562 {
 563         int ret;
 564
 565         if (!file)
 566                 return -ENOENT;
 567
 568         if (IS_ERR(file))
 569                 return PTR_ERR(file);
 570
 571         ret = ath10k_download_board_data(ar, file->data, file->size);
 572         if (ret) {
 573                 ath10k_err(ar, "failed to download cal_file data: %d\n", ret);
 574                 return ret;
 575         }
 576
 577         ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot cal file downloaded\n");
 578
 579         return 0;
 580 }
 581
 582 static int ath10k_download_cal_dt(struct ath10k *ar, const char *dt_name)
 583 {
 584         struct device_node *node;
 585         int data_len;
 586         void *data;
 587         int ret;
 588
 589         node = ar->dev->of_node;
 590         if (!node)
 591                 /* Device Tree is optional, don't print any warnings if
 592                  * there's no node for ath10k.
 593                  */
 594                 return -ENOENT;
 595
 596         if (!of_get_property(node, dt_name, &data_len)) {
 597                 /* The calibration data node is optional */
 598                 return -ENOENT;
 599         }
 600
 601         if (data_len != ar->hw_params.cal_data_len) {
 602                 ath10k_warn(ar, "invalid calibration data length in DT: %d\n",
 603                             data_len);
 604                 ret = -EMSGSIZE;
 605                 goto out;
 606         }
 607
 608         data = kmalloc(data_len, GFP_KERNEL);
 609         if (!data) {
 610                 ret = -ENOMEM;
 611                 goto out;
 612         }
 613
 614         ret = of_property_read_u8_array(node, dt_name, data, data_len);
 615         if (ret) {
 616                 ath10k_warn(ar, "failed to read calibration data from DT: %d\n",
 617                             ret);
 618                 goto out_free;
 619         }
 620
 621         ret = ath10k_download_board_data(ar, data, data_len);
 622         if (ret) {
 623                 ath10k_warn(ar, "failed to download calibration data from Device Tree: %d\n",
 624                             ret);
 625                 goto out_free;
 626         }
 627
 628         ret = 0;
 629
 630 out_free:
 631         kfree(data);
 632
 633 out:
 634         return ret;
 635 }
 636
 637 static int ath10k_download_cal_eeprom(struct ath10k *ar)
 638 {
 639         size_t data_len;
 640         void *data = NULL;
 641         int ret;
 642
 643         ret = ath10k_hif_fetch_cal_eeprom(ar, &data, &data_len);
 644         if (ret) {
 645                 if (ret != -EOPNOTSUPP)
 646                         ath10k_warn(ar, "failed to read calibration data from EEPROM: %d\n",
 647                                     ret);
 648                 goto out_free;
 649         }
 650
 651         ret = ath10k_download_board_data(ar, data, data_len);
 652         if (ret) {
 653                 ath10k_warn(ar, "failed to download calibration data from EEPROM: %d\n",
 654                             ret);
 655                 goto out_free;
 656         }
 657
 658         ret = 0;
 659
 660 out_free:
 661         kfree(data);
 662
 663         return ret;
 664 }
 665
 666 static int ath10k_core_get_board_id_from_otp(struct ath10k *ar)
 667 {
 668         u32 result, address;
 669         u8 board_id, chip_id;
 670         int ret;
 671
 672         address = ar->hw_params.patch_load_addr;
 673
 674         if (!ar->normal_mode_fw.fw_file.otp_data ||
 675             !ar->normal_mode_fw.fw_file.otp_len) {
 676                 ath10k_warn(ar,
 677                             "failed to retrieve board id because of invalid otp\n");
 678                 return -ENODATA;
 679         }
 680
 681         ath10k_dbg(ar, ATH10K_DBG_BOOT,
 682                    "boot upload otp to 0x%x len %zd for board id\n",
 683                    address, ar->normal_mode_fw.fw_file.otp_len);
 684
 685         ret = ath10k_bmi_fast_download(ar, address,
 686                                        ar->normal_mode_fw.fw_file.otp_data,
 687                                        ar->normal_mode_fw.fw_file.otp_len);
 688         if (ret) {
 689                 ath10k_err(ar, "could not write otp for board id check: %d\n",
 690                            ret);
 691                 return ret;
 692         }
 693
 694         ret = ath10k_bmi_execute(ar, address, BMI_PARAM_GET_EEPROM_BOARD_ID,
 695                                  &result);
 696         if (ret) {
 697                 ath10k_err(ar, "could not execute otp for board id check: %d\n",
 698                            ret);
 699                 return ret;
 700         }
 701
 702         board_id = MS(result, ATH10K_BMI_BOARD_ID_FROM_OTP);
 703         chip_id = MS(result, ATH10K_BMI_CHIP_ID_FROM_OTP);
 704
 705         ath10k_dbg(ar, ATH10K_DBG_BOOT,
 706                    "boot get otp board id result 0x%08x board_id %d chip_id %d\n",
 707                    result, board_id, chip_id);
 708
 709         if ((result & ATH10K_BMI_BOARD_ID_STATUS_MASK) != 0 ||
 710             (board_id == 0)) {
 711                 ath10k_warn(ar, "board id is not exist in otp, ignore it\n");
 712                 return -EOPNOTSUPP;
 713         }
 714
 715         ar->id.bmi_ids_valid = true;
 716         ar->id.bmi_board_id = board_id;
 717         ar->id.bmi_chip_id = chip_id;
 718
 719         return 0;
 720 }
 721
 722 static int ath10k_download_and_run_otp(struct ath10k *ar)
 723 {
 724         u32 result, address = ar->hw_params.patch_load_addr;
 725         u32 bmi_otp_exe_param = ar->hw_params.otp_exe_param;
 726         int ret;
 727
 728         ret = ath10k_download_board_data(ar,
 729                                          ar->running_fw->board_data,
 730                                          ar->running_fw->board_len);
 731         if (ret) {
 732                 ath10k_err(ar, "failed to download board data: %d\n", ret);
 733                 return ret;
 734         }
 735
 736         /* OTP is optional */
 737
 738         if (!ar->running_fw->fw_file.otp_data ||
 739             !ar->running_fw->fw_file.otp_len) {
 740                 ath10k_warn(ar, "Not running otp, calibration will be incorrect (otp-data %pK otp_len %zd)!\n",
 741                             ar->running_fw->fw_file.otp_data,
 742                             ar->running_fw->fw_file.otp_len);
 743                 return 0;
 744         }
 745
 746         ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot upload otp to 0x%x len %zd\n",
 747                    address, ar->running_fw->fw_file.otp_len);
 748
 749         ret = ath10k_bmi_fast_download(ar, address,
 750                                        ar->running_fw->fw_file.otp_data,
 751                                        ar->running_fw->fw_file.otp_len);
 752         if (ret) {
 753                 ath10k_err(ar, "could not write otp (%d)\n", ret);
 754                 return ret;
 755         }
 756
 757         ret = ath10k_bmi_execute(ar, address, bmi_otp_exe_param, &result);
 758         if (ret) {
 759                 ath10k_err(ar, "could not execute otp (%d)\n", ret);
 760                 return ret;
 761         }
 762
 763         ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot otp execute result %d\n", result);
 764
 765         if (!(skip_otp || test_bit(ATH10K_FW_FEATURE_IGNORE_OTP_RESULT,
 766                                    ar->running_fw->fw_file.fw_features)) &&
 767             result != 0) {
 768                 ath10k_err(ar, "otp calibration failed: %d", result);
 769                 return -EINVAL;
 770         }
 771
 772         return 0;
 773 }
 774
 775 static int ath10k_download_fw(struct ath10k *ar)
 776 {
 777         u32 address, data_len;
 778         const void *data;
 779         int ret;
 780
 781         address = ar->hw_params.patch_load_addr;
 782
 783         data = ar->running_fw->fw_file.firmware_data;
 784         data_len = ar->running_fw->fw_file.firmware_len;
 785
 786         ret = ath10k_swap_code_seg_configure(ar, &ar->running_fw->fw_file);
 787         if (ret) {
 788                 ath10k_err(ar, "failed to configure fw code swap: %d\n",
 789                            ret);
 790                 return ret;
 791         }
 792
 793         ath10k_dbg(ar, ATH10K_DBG_BOOT,
 794                    "boot uploading firmware image %pK len %d\n",
 795                    data, data_len);
 796
 797         ret = ath10k_bmi_fast_download(ar, address, data, data_len);
 798         if (ret) {
 799                 ath10k_err(ar, "failed to download firmware: %d\n",
 800                            ret);
 801                 return ret;
 802         }
 803
 804         return ret;
 805 }
 806
 807 static void ath10k_core_free_board_files(struct ath10k *ar)
 808 {
 809         if (!IS_ERR(ar->normal_mode_fw.board))
 810                 release_firmware(ar->normal_mode_fw.board);
 811
 812         ar->normal_mode_fw.board = NULL;
 813         ar->normal_mode_fw.board_data = NULL;
 814         ar->normal_mode_fw.board_len = 0;
 815 }
 816
 817 static void ath10k_core_free_firmware_files(struct ath10k *ar)
 818 {
 819         if (!IS_ERR(ar->normal_mode_fw.fw_file.firmware))
 820                 release_firmware(ar->normal_mode_fw.fw_file.firmware);
 821
 822         if (!IS_ERR(ar->cal_file))
 823                 release_firmware(ar->cal_file);
 824
 825         if (!IS_ERR(ar->pre_cal_file))
 826                 release_firmware(ar->pre_cal_file);
 827
 828         ath10k_swap_code_seg_release(ar, &ar->normal_mode_fw.fw_file);
 829
 830         ar->normal_mode_fw.fw_file.otp_data = NULL;
 831         ar->normal_mode_fw.fw_file.otp_len = 0;
 832
 833         ar->normal_mode_fw.fw_file.firmware = NULL;
 834         ar->normal_mode_fw.fw_file.firmware_data = NULL;
 835         ar->normal_mode_fw.fw_file.firmware_len = 0;
 836
 837         ar->cal_file = NULL;
 838         ar->pre_cal_file = NULL;
 839 }
 840
 841 static int ath10k_fetch_cal_file(struct ath10k *ar)
 842 {
 843         char filename[100];
 844
 845         /* pre-cal-<bus>-<id>.bin */
 846         scnprintf(filename, sizeof(filename), "pre-cal-%s-%s.bin",
 847                   ath10k_bus_str(ar->hif.bus), dev_name(ar->dev));
 848
 849         ar->pre_cal_file = ath10k_fetch_fw_file(ar, ATH10K_FW_DIR, filename);
 850         if (!IS_ERR(ar->pre_cal_file))
 851                 goto success;
 852
 853         /* cal-<bus>-<id>.bin */
 854         scnprintf(filename, sizeof(filename), "cal-%s-%s.bin",
 855                   ath10k_bus_str(ar->hif.bus), dev_name(ar->dev));
 856
 857         ar->cal_file = ath10k_fetch_fw_file(ar, ATH10K_FW_DIR, filename);
 858         if (IS_ERR(ar->cal_file))
 859                 /* calibration file is optional, don't print any warnings */
 860                 return PTR_ERR(ar->cal_file);
 861 success:
 862         ath10k_dbg(ar, ATH10K_DBG_BOOT, "found calibration file %s/%s\n",
 863                    ATH10K_FW_DIR, filename);
 864
 865         return 0;
 866 }
 867
 868 static int ath10k_core_fetch_board_data_api_1(struct ath10k *ar)
 869 {
 870         if (!ar->hw_params.fw.board) {
 871                 ath10k_err(ar, "failed to find board file fw entry\n");
 872                 return -EINVAL;
 873         }
 874
 875         ar->normal_mode_fw.board = ath10k_fetch_fw_file(ar,
 876                                                         ar->hw_params.fw.dir,
 877                                                         ar->hw_params.fw.board);
 878         if (IS_ERR(ar->normal_mode_fw.board))
 879                 return PTR_ERR(ar->normal_mode_fw.board);
 880
 881         ar->normal_mode_fw.board_data = ar->normal_mode_fw.board->data;
 882         ar->normal_mode_fw.board_len = ar->normal_mode_fw.board->size;
 883
 884         return 0;
 885 }
 886
 887 static int ath10k_core_parse_bd_ie_board(struct ath10k *ar,
 888                                          const void *buf, size_t buf_len,
 889                                          const char *boardname)
 890 {
 891         const struct ath10k_fw_ie *hdr;
 892         bool name_match_found;
 893         int ret, board_ie_id;
 894         size_t board_ie_len;
 895         const void *board_ie_data;
 896
 897         name_match_found = false;
 898
 899         /* go through ATH10K_BD_IE_BOARD_ elements */
 900         while (buf_len > sizeof(struct ath10k_fw_ie)) {
 901                 hdr = buf;
 902                 board_ie_id = le32_to_cpu(hdr->id);
 903                 board_ie_len = le32_to_cpu(hdr->len);
 904                 board_ie_data = hdr->data;
 905
 906                 buf_len -= sizeof(*hdr);
 907                 buf += sizeof(*hdr);
 908
 909                 if (buf_len < ALIGN(board_ie_len, 4)) {
 910                         ath10k_err(ar, "invalid ATH10K_BD_IE_BOARD length: %zu < %zu\n",
 911                                    buf_len, ALIGN(board_ie_len, 4));
 912                         ret = -EINVAL;
 913                         goto out;
 914                 }
 915
 916                 switch (board_ie_id) {
 917                 case ATH10K_BD_IE_BOARD_NAME:
 918                         ath10k_dbg_dump(ar, ATH10K_DBG_BOOT, "board name", "",
 919                                         board_ie_data, board_ie_len);
 920
 921                         if (board_ie_len != strlen(boardname))
 922                                 break;
 923
 924                         ret = memcmp(board_ie_data, boardname, strlen(boardname));
 925                         if (ret)
 926                                 break;
 927
 928                         name_match_found = true;
 929                         ath10k_dbg(ar, ATH10K_DBG_BOOT,
 930                                    "boot found match for name '%s'",
 931                                    boardname);
 932                         break;
 933                 case ATH10K_BD_IE_BOARD_DATA:
 934                         if (!name_match_found)
 935                                 /* no match found */
 936                                 break;
 937
 938                         ath10k_dbg(ar, ATH10K_DBG_BOOT,
 939                                    "boot found board data for '%s'",
 940                                    boardname);
 941
 942                         ar->normal_mode_fw.board_data = board_ie_data;
 943                         ar->normal_mode_fw.board_len = board_ie_len;
 944
 945                         ret = 0;
 946                         goto out;
 947                 default:
 948                         ath10k_warn(ar, "unknown ATH10K_BD_IE_BOARD found: %d\n",
 949                                     board_ie_id);
 950                         break;
 951                 }
 952
 953                 /* jump over the padding */
 954                 board_ie_len = ALIGN(board_ie_len, 4);
 955
 956                 buf_len -= board_ie_len;
 957                 buf += board_ie_len;
 958         }
 959
 960         /* no match found */
 961         ret = -ENOENT;
 962
 963 out:
 964         return ret;
 965 }
 966
 967 static int ath10k_core_fetch_board_data_api_n(struct ath10k *ar,
 968                                               const char *boardname,
 969                                               const char *filename)
 970 {
 971         size_t len, magic_len, ie_len;
 972         struct ath10k_fw_ie *hdr;
 973         const u8 *data;
 974         int ret, ie_id;
 975
 976         ar->normal_mode_fw.board = ath10k_fetch_fw_file(ar,
 977                                                         ar->hw_params.fw.dir,
 978                                                         filename);
 979         if (IS_ERR(ar->normal_mode_fw.board))
 980                 return PTR_ERR(ar->normal_mode_fw.board);
 981
 982         data = ar->normal_mode_fw.board->data;
 983         len = ar->normal_mode_fw.board->size;
 984
 985         /* magic has extra null byte padded */
 986         magic_len = strlen(ATH10K_BOARD_MAGIC) + 1;
 987         if (len < magic_len) {
 988                 ath10k_err(ar, "failed to find magic value in %s/%s, file too short: %zu\n",
 989                            ar->hw_params.fw.dir, filename, len);
 990                 ret = -EINVAL;
 991                 goto err;
 992         }
 993
 994         if (memcmp(data, ATH10K_BOARD_MAGIC, magic_len)) {
 995                 ath10k_err(ar, "found invalid board magic\n");
 996                 ret = -EINVAL;
 997                 goto err;
 998         }
 999
1000         /* magic is padded to 4 bytes */
1001         magic_len = ALIGN(magic_len, 4);
1002         if (len < magic_len) {
1003                 ath10k_err(ar, "failed: %s/%s too small to contain board data, len: %zu\n",
1004                            ar->hw_params.fw.dir, filename, len);
1005                 ret = -EINVAL;
1006                 goto err;
1007         }
1008
1009         data += magic_len;
1010         len -= magic_len;
1011
1012         while (len > sizeof(struct ath10k_fw_ie)) {
1013                 hdr = (struct ath10k_fw_ie *)data;
1014                 ie_id = le32_to_cpu(hdr->id);
1015                 ie_len = le32_to_cpu(hdr->len);
1016
1017                 len -= sizeof(*hdr);
1018                 data = hdr->data;
1019
1020                 if (len < ALIGN(ie_len, 4)) {
1021                         ath10k_err(ar, "invalid length for board ie_id %d ie_len %zu len %zu\n",
1022                                    ie_id, ie_len, len);
1023                         ret = -EINVAL;
1024                         goto err;
1025                 }
1026
1027                 switch (ie_id) {
1028                 case ATH10K_BD_IE_BOARD:
1029                         ret = ath10k_core_parse_bd_ie_board(ar, data, ie_len,
1030                                                             boardname);
1031                         if (ret == -ENOENT)
1032                                 /* no match found, continue */
1033                                 break;
1034                         else if (ret)
1035                                 /* there was an error, bail out */
1036                                 goto err;
1037
1038                         /* board data found */
1039                         goto out;
1040                 }
1041
1042                 /* jump over the padding */
1043                 ie_len = ALIGN(ie_len, 4);
1044
1045                 len -= ie_len;
1046                 data += ie_len;
1047         }
1048
1049 out:
1050         if (!ar->normal_mode_fw.board_data || !ar->normal_mode_fw.board_len) {
1051                 ath10k_err(ar,
1052                            "failed to fetch board data for %s from %s/%s\n",
1053                            boardname, ar->hw_params.fw.dir, filename);
1054                 ret = -ENODATA;
1055                 goto err;
1056         }
1057
1058         return 0;
1059
1060 err:
1061         ath10k_core_free_board_files(ar);
1062         return ret;
1063 }
1064
1065 static int ath10k_core_create_board_name(struct ath10k *ar, char *name,
1066                                          size_t name_len)
1067 {
1068         if (ar->id.bmi_ids_valid) {
1069                 scnprintf(name, name_len,
1070                           "bus=%s,bmi-chip-id=%d,bmi-board-id=%d",
1071                           ath10k_bus_str(ar->hif.bus),
1072                           ar->id.bmi_chip_id,
1073                           ar->id.bmi_board_id);
1074                 goto out;
1075         }
1076
1077         scnprintf(name, name_len,
1078                   "bus=%s,vendor=%04x,device=%04x,subsystem-vendor=%04x,subsystem-device=%04x",
1079                   ath10k_bus_str(ar->hif.bus),
1080                   ar->id.vendor, ar->id.device,
1081                   ar->id.subsystem_vendor, ar->id.subsystem_device);
1082
1083 out:
1084         ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using board name '%s'\n", name);
1085
1086         return 0;
1087 }
1088
1089 static int ath10k_core_fetch_board_file(struct ath10k *ar)
1090 {
1091         char boardname[100];
1092         int ret;
1093
1094         ret = ath10k_core_create_board_name(ar, boardname, sizeof(boardname));
1095         if (ret) {
1096                 ath10k_err(ar, "failed to create board name: %d", ret);
1097                 return ret;
1098         }
1099
1100         ar->bd_api = 2;
1101         ret = ath10k_core_fetch_board_data_api_n(ar, boardname,
1102                                                  ATH10K_BOARD_API2_FILE);
1103         if (!ret)
1104                 goto success;
1105
1106         ar->bd_api = 1;
1107         ret = ath10k_core_fetch_board_data_api_1(ar);
1108         if (ret) {
1109                 ath10k_err(ar, "failed to fetch board data\n");
1110                 return ret;
1111         }
1112
1113 success:
1114         ath10k_dbg(ar, ATH10K_DBG_BOOT, "using board api %d\n", ar->bd_api);
1115         return 0;
1116 }
1117
1118 int ath10k_core_fetch_firmware_api_n(struct ath10k *ar, const char *name,
1119                                      struct ath10k_fw_file *fw_file)
1120 {
1121         size_t magic_len, len, ie_len;
1122         int ie_id, i, index, bit, ret;
1123         struct ath10k_fw_ie *hdr;
1124         const u8 *data;
1125         __le32 *timestamp, *version;
1126
1127         /* first fetch the firmware file (firmware-*.bin) */
1128         fw_file->firmware = ath10k_fetch_fw_file(ar, ar->hw_params.fw.dir,
1129                                                  name);
1130         if (IS_ERR(fw_file->firmware)) {
1131                 ath10k_err(ar, "could not fetch firmware file '%s/%s': %ld\n",
1132                            ar->hw_params.fw.dir, name,
1133                            PTR_ERR(fw_file->firmware));
1134                 return PTR_ERR(fw_file->firmware);
1135         }
1136
1137         data = fw_file->firmware->data;
1138         len = fw_file->firmware->size;
1139
1140         /* magic also includes the null byte, check that as well */
1141         magic_len = strlen(ATH10K_FIRMWARE_MAGIC) + 1;
1142
1143         if (len < magic_len) {
1144                 ath10k_err(ar, "firmware file '%s/%s' too small to contain magic: %zu\n",
1145                            ar->hw_params.fw.dir, name, len);
1146                 ret = -EINVAL;
1147                 goto err;
1148         }
1149
1150         if (memcmp(data, ATH10K_FIRMWARE_MAGIC, magic_len) != 0) {
1151                 ath10k_err(ar, "invalid firmware magic\n");
1152                 ret = -EINVAL;
1153                 goto err;
1154         }
1155
1156         /* jump over the padding */
1157         magic_len = ALIGN(magic_len, 4);
1158
1159         len -= magic_len;
1160         data += magic_len;
1161
1162         /* loop elements */
1163         while (len > sizeof(struct ath10k_fw_ie)) {
1164                 hdr = (struct ath10k_fw_ie *)data;
1165
1166                 ie_id = le32_to_cpu(hdr->id);
1167                 ie_len = le32_to_cpu(hdr->len);
1168
1169                 len -= sizeof(*hdr);
1170                 data += sizeof(*hdr);
1171
1172                 if (len < ie_len) {
1173                         ath10k_err(ar, "invalid length for FW IE %d (%zu < %zu)\n",
1174                                    ie_id, len, ie_len);
1175                         ret = -EINVAL;
1176                         goto err;
1177                 }
1178
1179                 switch (ie_id) {
1180                 case ATH10K_FW_IE_FW_VERSION:
1181                         if (ie_len > sizeof(fw_file->fw_version) - 1)
1182                                 break;
1183
1184                         memcpy(fw_file->fw_version, data, ie_len);
1185                         fw_file->fw_version[ie_len] = '\0';
1186
1187                         ath10k_dbg(ar, ATH10K_DBG_BOOT,
1188                                    "found fw version %s\n",
1189                                     fw_file->fw_version);
1190                         break;
1191                 case ATH10K_FW_IE_TIMESTAMP:
1192                         if (ie_len != sizeof(u32))
1193                                 break;
1194
1195                         timestamp = (__le32 *)data;
1196
1197                         ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw timestamp %d\n",
1198                                    le32_to_cpup(timestamp));
1199                         break;
1200                 case ATH10K_FW_IE_FEATURES:
1201                         ath10k_dbg(ar, ATH10K_DBG_BOOT,
1202                                    "found firmware features ie (%zd B)\n",
1203                                    ie_len);
1204
1205                         for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) {
1206                                 index = i / 8;
1207                                 bit = i % 8;
1208
1209                                 if (index == ie_len)
1210                                         break;
1211
1212                                 if (data[index] & (1 << bit)) {
1213                                         ath10k_dbg(ar, ATH10K_DBG_BOOT,
1214                                                    "Enabling feature bit: %i\n",
1215                                                    i);
1216                                         __set_bit(i, fw_file->fw_features);
1217                                 }
1218                         }
1219
1220                         ath10k_dbg_dump(ar, ATH10K_DBG_BOOT, "features", "",
1221                                         fw_file->fw_features,
1222                                         sizeof(fw_file->fw_features));
1223                         break;
1224                 case ATH10K_FW_IE_FW_IMAGE:
1225                         ath10k_dbg(ar, ATH10K_DBG_BOOT,
1226                                    "found fw image ie (%zd B)\n",
1227                                    ie_len);
1228
1229                         fw_file->firmware_data = data;
1230                         fw_file->firmware_len = ie_len;
1231
1232                         break;
1233                 case ATH10K_FW_IE_OTP_IMAGE:
1234                         ath10k_dbg(ar, ATH10K_DBG_BOOT,
1235                                    "found otp image ie (%zd B)\n",
1236                                    ie_len);
1237
1238                         fw_file->otp_data = data;
1239                         fw_file->otp_len = ie_len;
1240
1241                         break;
1242                 case ATH10K_FW_IE_WMI_OP_VERSION:
1243                         if (ie_len != sizeof(u32))
1244                                 break;
1245
1246                         version = (__le32 *)data;
1247
1248                         fw_file->wmi_op_version = le32_to_cpup(version);
1249
1250                         ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw ie wmi op version %d\n",
1251                                    fw_file->wmi_op_version);
1252                         break;
1253                 case ATH10K_FW_IE_HTT_OP_VERSION:
1254                         if (ie_len != sizeof(u32))
1255                                 break;
1256
1257                         version = (__le32 *)data;
1258
1259                         fw_file->htt_op_version = le32_to_cpup(version);
1260
1261                         ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw ie htt op version %d\n",
1262                                    fw_file->htt_op_version);
1263                         break;
1264                 case ATH10K_FW_IE_FW_CODE_SWAP_IMAGE:
1265                         ath10k_dbg(ar, ATH10K_DBG_BOOT,
1266                                    "found fw code swap image ie (%zd B)\n",
1267                                    ie_len);
1268                         fw_file->codeswap_data = data;
1269                         fw_file->codeswap_len = ie_len;
1270                         break;
1271                 default:
1272                         ath10k_warn(ar, "Unknown FW IE: %u\n",
1273                                     le32_to_cpu(hdr->id));
1274                         break;
1275                 }
1276
1277                 /* jump over the padding */
1278                 ie_len = ALIGN(ie_len, 4);
1279
1280                 len -= ie_len;
1281                 data += ie_len;
1282         }
1283
1284         if (ar->is_bmi) {
1285                 if (!fw_file->firmware_data ||
1286                     !fw_file->firmware_len) {
1287                         ath10k_warn(ar, "No ATH10K_FW_IE_FW_IMAGE found from '%s/%s', skipping\n",
1288                                     ar->hw_params.fw.dir, name);
1289                         ret = -ENOMEDIUM;
1290                         goto err;
1291                 }
1292         }
1293
1294         return 0;
1295
1296 err:
1297         ath10k_core_free_firmware_files(ar);
1298         return ret;
1299 }
1300
1301 static int ath10k_core_fetch_firmware_files(struct ath10k *ar)
1302 {
1303         int ret;
1304         struct ath10k_fw_file *fw_file;
1305
1306         if (!ar->is_bmi && QCA_REV_WCN3990(ar)) {
1307                 fw_file = &ar->normal_mode_fw.fw_file;
1308                 fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_TLV;
1309                 fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_TLV;
1310                 __set_bit(ATH10K_FW_FEATURE_WOWLAN_SUPPORT,
1311                           fw_file->fw_features);
1312                 __set_bit(WMI_SERVICE_WOW, ar->wmi.svc_map);
1313                 __set_bit(ATH10K_FW_FEATURE_NO_NWIFI_DECAP_4ADDR_PADDING,
1314                           fw_file->fw_features);
1315                 return 0;
1316         }
1317
1318         if (ar->is_bmi) {
1319                 /* calibration file is optional, don't check for any errors */
1320                 ath10k_fetch_cal_file(ar);
1321         }
1322
1323         ar->fw_api = 5;
1324         ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api);
1325
1326         ret = ath10k_core_fetch_firmware_api_n(ar, ATH10K_FW_API5_FILE,
1327                                                &ar->normal_mode_fw.fw_file);
1328         if (ret == 0)
1329                 goto success;
1330
1331         ar->fw_api = 4;
1332         ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api);
1333
1334         ret = ath10k_core_fetch_firmware_api_n(ar, ATH10K_FW_API4_FILE,
1335                                                &ar->normal_mode_fw.fw_file);
1336         if (ret == 0)
1337                 goto success;
1338
1339         ar->fw_api = 3;
1340         ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api);
1341
1342         ret = ath10k_core_fetch_firmware_api_n(ar, ATH10K_FW_API3_FILE,
1343                                                &ar->normal_mode_fw.fw_file);
1344         if (ret == 0)
1345                 goto success;
1346
1347         ar->fw_api = 2;
1348         ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api);
1349
1350         ret = ath10k_core_fetch_firmware_api_n(ar, ATH10K_FW_API2_FILE,
1351                                                &ar->normal_mode_fw.fw_file);
1352         if (ret)
1353                 return ret;
1354
1355 success:
1356         ath10k_dbg(ar, ATH10K_DBG_BOOT, "using fw api %d\n", ar->fw_api);
1357
1358         return 0;
1359 }
1360
1361 static int ath10k_core_pre_cal_download(struct ath10k *ar)
1362 {
1363         int ret;
1364
1365         ret = ath10k_download_cal_file(ar, ar->pre_cal_file);
1366         if (ret == 0) {
1367                 ar->cal_mode = ATH10K_PRE_CAL_MODE_FILE;
1368                 goto success;
1369         }
1370
1371         ath10k_dbg(ar, ATH10K_DBG_BOOT,
1372                    "boot did not find a pre calibration file, try DT next: %d\n",
1373                    ret);
1374
1375         ret = ath10k_download_cal_dt(ar, "qcom,ath10k-pre-calibration-data");
1376         if (ret) {
1377                 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1378                            "unable to load pre cal data from DT: %d\n", ret);
1379                 return ret;
1380         }
1381         ar->cal_mode = ATH10K_PRE_CAL_MODE_DT;
1382
1383 success:
1384         ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using calibration mode %s\n",
1385                    ath10k_cal_mode_str(ar->cal_mode));
1386
1387         return 0;
1388 }
1389
1390 static int ath10k_core_pre_cal_config(struct ath10k *ar)
1391 {
1392         int ret;
1393
1394         ret = ath10k_core_pre_cal_download(ar);
1395         if (ret) {
1396                 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1397                            "failed to load pre cal data: %d\n", ret);
1398                 return ret;
1399         }
1400
1401         ret = ath10k_core_get_board_id_from_otp(ar);
1402         if (ret) {
1403                 ath10k_err(ar, "failed to get board id: %d\n", ret);
1404                 return ret;
1405         }
1406
1407         ret = ath10k_download_and_run_otp(ar);
1408         if (ret) {
1409                 ath10k_err(ar, "failed to run otp: %d\n", ret);
1410                 return ret;
1411         }
1412
1413         ath10k_dbg(ar, ATH10K_DBG_BOOT,
1414                    "pre cal configuration done successfully\n");
1415
1416         return 0;
1417 }
1418
1419 static int ath10k_download_cal_data(struct ath10k *ar)
1420 {
1421         int ret;
1422
1423         ret = ath10k_core_pre_cal_config(ar);
1424         if (ret == 0)
1425                 return 0;
1426
1427         ath10k_dbg(ar, ATH10K_DBG_BOOT,
1428                    "pre cal download procedure failed, try cal file: %d\n",
1429                    ret);
1430
1431         ret = ath10k_download_cal_file(ar, ar->cal_file);
1432         if (ret == 0) {
1433                 ar->cal_mode = ATH10K_CAL_MODE_FILE;
1434                 goto done;
1435         }
1436
1437         ath10k_dbg(ar, ATH10K_DBG_BOOT,
1438                    "boot did not find a calibration file, try DT next: %d\n",
1439                    ret);
1440
1441         ret = ath10k_download_cal_dt(ar, "qcom,ath10k-calibration-data");
1442         if (ret == 0) {
1443                 ar->cal_mode = ATH10K_CAL_MODE_DT;
1444                 goto done;
1445         }
1446
1447         ath10k_dbg(ar, ATH10K_DBG_BOOT,
1448                    "boot did not find DT entry, try target EEPROM next: %d\n",
1449                    ret);
1450
1451         ret = ath10k_download_cal_eeprom(ar);
1452         if (ret == 0) {
1453                 ar->cal_mode = ATH10K_CAL_MODE_EEPROM;
1454                 goto done;
1455         }
1456
1457         ath10k_dbg(ar, ATH10K_DBG_BOOT,
1458                    "boot did not find target EEPROM entry, try OTP next: %d\n",
1459                    ret);
1460
1461         ret = ath10k_download_and_run_otp(ar);
1462         if (ret) {
1463                 ath10k_err(ar, "failed to run otp: %d\n", ret);
1464                 return ret;
1465         }
1466
1467         ar->cal_mode = ATH10K_CAL_MODE_OTP;
1468
1469 done:
1470         ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using calibration mode %s\n",
1471                    ath10k_cal_mode_str(ar->cal_mode));
1472         return 0;
1473 }
1474
1475 static int ath10k_init_uart(struct ath10k *ar)
1476 {
1477         int ret;
1478
1479         /*
1480          * Explicitly setting UART prints to zero as target turns it on
1481          * based on scratch registers.
1482          */
1483         ret = ath10k_bmi_write32(ar, hi_serial_enable, 0);
1484         if (ret) {
1485                 ath10k_warn(ar, "could not disable UART prints (%d)\n", ret);
1486                 return ret;
1487         }
1488
1489         if (!uart_print)
1490                 return 0;
1491
1492         ret = ath10k_bmi_write32(ar, hi_dbg_uart_txpin, ar->hw_params.uart_pin);
1493         if (ret) {
1494                 ath10k_warn(ar, "could not enable UART prints (%d)\n", ret);
1495                 return ret;
1496         }
1497
1498         ret = ath10k_bmi_write32(ar, hi_serial_enable, 1);
1499         if (ret) {
1500                 ath10k_warn(ar, "could not enable UART prints (%d)\n", ret);
1501                 return ret;
1502         }
1503
1504         /* Set the UART baud rate to 19200. */
1505         ret = ath10k_bmi_write32(ar, hi_desired_baud_rate, 19200);
1506         if (ret) {
1507                 ath10k_warn(ar, "could not set the baud rate (%d)\n", ret);
1508                 return ret;
1509         }
1510
1511         ath10k_info(ar, "UART prints enabled\n");
1512         return 0;
1513 }
1514
1515 static int ath10k_init_hw_params(struct ath10k *ar)
1516 {
1517         const struct ath10k_hw_params *uninitialized_var(hw_params);
1518         int i;
1519
1520         for (i = 0; i < ARRAY_SIZE(ath10k_hw_params_list); i++) {
1521                 hw_params = &ath10k_hw_params_list[i];
1522
1523                 if (hw_params->id == ar->target_version &&
1524                     hw_params->dev_id == ar->dev_id)
1525                         break;
1526         }
1527
1528         if (i == ARRAY_SIZE(ath10k_hw_params_list)) {
1529                 ath10k_err(ar, "Unsupported hardware version: 0x%x\n",
1530                            ar->target_version);
1531                 return -EINVAL;
1532         }
1533
1534         ar->hw_params = *hw_params;
1535
1536         ath10k_dbg(ar, ATH10K_DBG_BOOT, "Hardware name %s version 0x%x\n",
1537                    ar->hw_params.name, ar->target_version);
1538
1539         return 0;
1540 }
1541
1542 static void ath10k_core_restart(struct work_struct *work)
1543 {
1544         struct ath10k *ar = container_of(work, struct ath10k, restart_work);
1545
1546         set_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags);
1547
1548         /* Place a barrier to make sure the compiler doesn't reorder
1549          * CRASH_FLUSH and calling other functions.
1550          */
1551         barrier();
1552
1553         ieee80211_stop_queues(ar->hw);
1554         ath10k_drain_tx(ar);
1555         complete(&ar->scan.started);
1556         complete(&ar->scan.completed);
1557         complete(&ar->scan.on_channel);
1558         complete(&ar->offchan_tx_completed);
1559         complete(&ar->install_key_done);
1560         complete(&ar->vdev_setup_done);
1561         complete(&ar->vdev_delete_done);
1562         complete(&ar->thermal.wmi_sync);
1563         complete(&ar->bss_survey_done);
1564         wake_up(&ar->htt.empty_tx_wq);
1565         wake_up(&ar->wmi.tx_credits_wq);
1566         wake_up(&ar->peer_mapping_wq);
1567
1568         mutex_lock(&ar->conf_mutex);
1569
1570         switch (ar->state) {
1571         case ATH10K_STATE_ON:
1572                 ar->state = ATH10K_STATE_RESTARTING;
1573                 ath10k_hif_stop(ar);
1574                 ath10k_scan_finish(ar);
1575                 ieee80211_restart_hw(ar->hw);
1576                 break;
1577         case ATH10K_STATE_OFF:
1578                 /* this can happen if driver is being unloaded
1579                  * or if the crash happens during FW probing */
1580                 ath10k_warn(ar, "cannot restart a device that hasn't been started\n");
1581                 break;
1582         case ATH10K_STATE_RESTARTING:
1583                 /* hw restart might be requested from multiple places */
1584                 break;
1585         case ATH10K_STATE_RESTARTED:
1586                 ar->state = ATH10K_STATE_WEDGED;
1587                 /* fall through */
1588         case ATH10K_STATE_WEDGED:
1589                 ath10k_warn(ar, "device is wedged, will not restart\n");
1590                 break;
1591         case ATH10K_STATE_UTF:
1592                 ath10k_warn(ar, "firmware restart in UTF mode not supported\n");
1593                 break;
1594         }
1595
1596         mutex_unlock(&ar->conf_mutex);
1597 }
1598
1599 static int ath10k_core_init_firmware_features(struct ath10k *ar)
1600 {
1601         struct ath10k_fw_file *fw_file = &ar->normal_mode_fw.fw_file;
1602
1603         if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, fw_file->fw_features) &&
1604             !test_bit(ATH10K_FW_FEATURE_WMI_10X, fw_file->fw_features)) {
1605                 ath10k_err(ar, "feature bits corrupted: 10.2 feature requires 10.x feature to be set as well");
1606                 return -EINVAL;
1607         }
1608
1609         if (fw_file->wmi_op_version >= ATH10K_FW_WMI_OP_VERSION_MAX) {
1610                 ath10k_err(ar, "unsupported WMI OP version (max %d): %d\n",
1611                            ATH10K_FW_WMI_OP_VERSION_MAX, fw_file->wmi_op_version);
1612                 return -EINVAL;
1613         }
1614
1615         ar->wmi.rx_decap_mode = ATH10K_HW_TXRX_NATIVE_WIFI;
1616         switch (ath10k_cryptmode_param) {
1617         case ATH10K_CRYPT_MODE_HW:
1618                 clear_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags);
1619                 clear_bit(ATH10K_FLAG_HW_CRYPTO_DISABLED, &ar->dev_flags);
1620                 break;
1621         case ATH10K_CRYPT_MODE_SW:
1622                 if (!test_bit(ATH10K_FW_FEATURE_RAW_MODE_SUPPORT,
1623                               fw_file->fw_features)) {
1624                         ath10k_err(ar, "cryptmode > 0 requires raw mode support from firmware");
1625                         return -EINVAL;
1626                 }
1627
1628                 set_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags);
1629                 set_bit(ATH10K_FLAG_HW_CRYPTO_DISABLED, &ar->dev_flags);
1630                 break;
1631         default:
1632                 ath10k_info(ar, "invalid cryptmode: %d\n",
1633                             ath10k_cryptmode_param);
1634                 return -EINVAL;
1635         }
1636
1637         ar->htt.max_num_amsdu = ATH10K_HTT_MAX_NUM_AMSDU_DEFAULT;
1638         ar->htt.max_num_ampdu = ATH10K_HTT_MAX_NUM_AMPDU_DEFAULT;
1639
1640         if (rawmode) {
1641                 if (!test_bit(ATH10K_FW_FEATURE_RAW_MODE_SUPPORT,
1642                               fw_file->fw_features)) {
1643                         ath10k_err(ar, "rawmode = 1 requires support from firmware");
1644                         return -EINVAL;
1645                 }
1646                 set_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags);
1647         }
1648
1649         if (test_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags)) {
1650                 ar->wmi.rx_decap_mode = ATH10K_HW_TXRX_RAW;
1651
1652                 /* Workaround:
1653                  *
1654                  * Firmware A-MSDU aggregation breaks with RAW Tx encap mode
1655                  * and causes enormous performance issues (malformed frames,
1656                  * etc).
1657                  *
1658                  * Disabling A-MSDU makes RAW mode stable with heavy traffic
1659                  * albeit a bit slower compared to regular operation.
1660                  */
1661                 ar->htt.max_num_amsdu = 1;
1662         }
1663
1664         /* Backwards compatibility for firmwares without
1665          * ATH10K_FW_IE_WMI_OP_VERSION.
1666          */
1667         if (fw_file->wmi_op_version == ATH10K_FW_WMI_OP_VERSION_UNSET) {
1668                 if (test_bit(ATH10K_FW_FEATURE_WMI_10X, fw_file->fw_features)) {
1669                         if (test_bit(ATH10K_FW_FEATURE_WMI_10_2,
1670                                      fw_file->fw_features))
1671                                 fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_10_2;
1672                         else
1673                                 fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_10_1;
1674                 } else {
1675                         fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_MAIN;
1676                 }
1677         }
1678
1679         switch (fw_file->wmi_op_version) {
1680         case ATH10K_FW_WMI_OP_VERSION_MAIN:
1681                 ar->max_num_peers = TARGET_NUM_PEERS;
1682                 ar->max_num_stations = TARGET_NUM_STATIONS;
1683                 ar->max_num_vdevs = TARGET_NUM_VDEVS;
1684                 ar->htt.max_num_pending_tx = TARGET_NUM_MSDU_DESC;
1685                 ar->fw_stats_req_mask = WMI_STAT_PDEV | WMI_STAT_VDEV |
1686                         WMI_STAT_PEER;
1687                 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM;
1688                 break;
1689         case ATH10K_FW_WMI_OP_VERSION_10_1:
1690         case ATH10K_FW_WMI_OP_VERSION_10_2:
1691         case ATH10K_FW_WMI_OP_VERSION_10_2_4:
1692                 if (ath10k_peer_stats_enabled(ar)) {
1693                         ar->max_num_peers = TARGET_10X_TX_STATS_NUM_PEERS;
1694                         ar->max_num_stations = TARGET_10X_TX_STATS_NUM_STATIONS;
1695                 } else {
1696                         ar->max_num_peers = TARGET_10X_NUM_PEERS;
1697                         ar->max_num_stations = TARGET_10X_NUM_STATIONS;
1698                 }
1699                 ar->max_num_vdevs = TARGET_10X_NUM_VDEVS;
1700                 ar->htt.max_num_pending_tx = TARGET_10X_NUM_MSDU_DESC;
1701                 ar->fw_stats_req_mask = WMI_STAT_PEER;
1702                 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM;
1703                 break;
1704         case ATH10K_FW_WMI_OP_VERSION_TLV:
1705                 ar->max_num_peers = TARGET_TLV_NUM_PEERS;
1706                 ar->max_num_stations = TARGET_TLV_NUM_STATIONS;
1707                 ar->max_num_vdevs = TARGET_TLV_NUM_VDEVS;
1708                 ar->max_num_tdls_vdevs = TARGET_TLV_NUM_TDLS_VDEVS;
1709                 if (QCA_REV_WCN3990(ar))
1710                         ar->htt.max_num_pending_tx =
1711                                                 TARGET_HL_1_0_NUM_MSDU_DESC;
1712                 else
1713                         ar->htt.max_num_pending_tx = TARGET_TLV_NUM_MSDU_DESC;
1714                 ar->wow.max_num_patterns = TARGET_TLV_NUM_WOW_PATTERNS;
1715                 ar->fw_stats_req_mask = WMI_STAT_PDEV | WMI_STAT_VDEV |
1716                         WMI_STAT_PEER;
1717                 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM;
1718                 ar->wmi.mgmt_max_num_pending_tx = TARGET_TLV_MGMT_NUM_MSDU_DESC;
1719                 break;
1720         case ATH10K_FW_WMI_OP_VERSION_10_4:
1721                 ar->max_num_peers = TARGET_10_4_NUM_PEERS;
1722                 ar->max_num_stations = TARGET_10_4_NUM_STATIONS;
1723                 ar->num_active_peers = TARGET_10_4_ACTIVE_PEERS;
1724                 ar->max_num_vdevs = TARGET_10_4_NUM_VDEVS;
1725                 ar->num_tids = TARGET_10_4_TGT_NUM_TIDS;
1726                 ar->fw_stats_req_mask = WMI_10_4_STAT_PEER |
1727                                         WMI_10_4_STAT_PEER_EXTD;
1728                 ar->max_spatial_stream = ar->hw_params.max_spatial_stream;
1729
1730                 if (test_bit(ATH10K_FW_FEATURE_PEER_FLOW_CONTROL,
1731                              fw_file->fw_features))
1732                         ar->htt.max_num_pending_tx = TARGET_10_4_NUM_MSDU_DESC_PFC;
1733                 else
1734                         ar->htt.max_num_pending_tx = TARGET_10_4_NUM_MSDU_DESC;
1735                 break;
1736         case ATH10K_FW_WMI_OP_VERSION_UNSET:
1737         case ATH10K_FW_WMI_OP_VERSION_MAX:
1738                 WARN_ON(1);
1739                 return -EINVAL;
1740         }
1741
1742         /* Backwards compatibility for firmwares without
1743          * ATH10K_FW_IE_HTT_OP_VERSION.
1744          */
1745         if (fw_file->htt_op_version == ATH10K_FW_HTT_OP_VERSION_UNSET) {
1746                 switch (fw_file->wmi_op_version) {
1747                 case ATH10K_FW_WMI_OP_VERSION_MAIN:
1748                         fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_MAIN;
1749                         break;
1750                 case ATH10K_FW_WMI_OP_VERSION_10_1:
1751                 case ATH10K_FW_WMI_OP_VERSION_10_2:
1752                 case ATH10K_FW_WMI_OP_VERSION_10_2_4:
1753                         fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_10_1;
1754                         break;
1755                 case ATH10K_FW_WMI_OP_VERSION_TLV:
1756                         fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_TLV;
1757                         break;
1758                 case ATH10K_FW_WMI_OP_VERSION_10_4:
1759                 case ATH10K_FW_WMI_OP_VERSION_UNSET:
1760                 case ATH10K_FW_WMI_OP_VERSION_MAX:
1761                         ath10k_err(ar, "htt op version not found from fw meta data");
1762                         return -EINVAL;
1763                 }
1764         }
1765
1766         return 0;
1767 }
1768
1769 static int ath10k_core_reset_rx_filter(struct ath10k *ar)
1770 {
1771         int ret;
1772         int vdev_id;
1773         int vdev_type;
1774         int vdev_subtype;
1775         const u8 *vdev_addr;
1776
1777         vdev_id = 0;
1778         vdev_type = WMI_VDEV_TYPE_STA;
1779         vdev_subtype = ath10k_wmi_get_vdev_subtype(ar, WMI_VDEV_SUBTYPE_NONE);
1780         vdev_addr = ar->mac_addr;
1781
1782         ret = ath10k_wmi_vdev_create(ar, vdev_id, vdev_type, vdev_subtype,
1783                                      vdev_addr);
1784         if (ret) {
1785                 ath10k_err(ar, "failed to create dummy vdev: %d\n", ret);
1786                 return ret;
1787         }
1788
1789         ret = ath10k_wmi_vdev_delete(ar, vdev_id);
1790         if (ret) {
1791                 ath10k_err(ar, "failed to delete dummy vdev: %d\n", ret);
1792                 return ret;
1793         }
1794
1795         /* WMI and HTT may use separate HIF pipes and are not guaranteed to be
1796          * serialized properly implicitly.
1797          *
1798          * Moreover (most) WMI commands have no explicit acknowledges. It is
1799          * possible to infer it implicitly by poking firmware with echo
1800          * command - getting a reply means all preceding comments have been
1801          * (mostly) processed.
1802          *
1803          * In case of vdev create/delete this is sufficient.
1804          *
1805          * Without this it's possible to end up with a race when HTT Rx ring is
1806          * started before vdev create/delete hack is complete allowing a short
1807          * window of opportunity to receive (and Tx ACK) a bunch of frames.
1808          */
1809         ret = ath10k_wmi_barrier(ar);
1810         if (ret) {
1811                 ath10k_err(ar, "failed to ping firmware: %d\n", ret);
1812                 return ret;
1813         }
1814
1815         return 0;
1816 }
1817
1818 int ath10k_core_start(struct ath10k *ar, enum ath10k_firmware_mode mode,
1819                       const struct ath10k_fw_components *fw)
1820 {
1821         int status;
1822         u32 val;
1823
1824         lockdep_assert_held(&ar->conf_mutex);
1825
1826         clear_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags);
1827
1828         ar->running_fw = fw;
1829
1830         if (ar->is_bmi) {
1831
1832                 ath10k_bmi_start(ar);
1833
1834                 if (ath10k_init_configure_target(ar)) {
1835                         status = -EINVAL;
1836                         goto err;
1837                 }
1838
1839                 status = ath10k_download_cal_data(ar);
1840                 if (status)
1841                         goto err;
1842
1843                 /* Some of of qca988x solutions are having global reset issue
1844                  * during target initialization. Bypassing PLL setting before
1845                  * downloading firmware and letting the SoC run on REF_CLK is
1846                  * fixing the problem. Corresponding firmware change is also
1847                  * needed to set the clock source once the target is
1848                  * initialized.
1849                  */
1850                 if (test_bit(ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT,
1851                              ar->running_fw->fw_file.fw_features)) {
1852                         status = ath10k_bmi_write32(ar, hi_skip_clock_init, 1);
1853                         if (status) {
1854                                 ath10k_err(ar, "skip_clock_init failed: %d\n",
1855                                            status);
1856                                 goto err;
1857                         }
1858                 }
1859
1860                 status = ath10k_download_fw(ar);
1861                 if (status)
1862                         goto err;
1863
1864                 status = ath10k_init_uart(ar);
1865                 if (status)
1866                         goto err;
1867         }
1868
1869         ar->htc.htc_ops.target_send_suspend_complete =
1870                 ath10k_send_suspend_complete;
1871
1872         status = ath10k_htc_init(ar);
1873         if (status) {
1874                 ath10k_err(ar, "could not init HTC (%d)\n", status);
1875                 goto err;
1876         }
1877
1878         if (ar->is_bmi) {
1879                 status = ath10k_bmi_done(ar);
1880                 if (status)
1881                         goto err;
1882         }
1883
1884         status = ath10k_wmi_attach(ar);
1885         if (status) {
1886                 ath10k_err(ar, "WMI attach failed: %d\n", status);
1887                 goto err;
1888         }
1889
1890         status = ath10k_htt_init(ar);
1891         if (status) {
1892                 ath10k_err(ar, "failed to init htt: %d\n", status);
1893                 goto err_wmi_detach;
1894         }
1895
1896         status = ath10k_htt_tx_alloc(&ar->htt);
1897         if (status) {
1898                 ath10k_err(ar, "failed to alloc htt tx: %d\n", status);
1899                 goto err_wmi_detach;
1900         }
1901
1902         /* If firmware indicates Full Rx Reorder support it must be used in a
1903          * slightly different manner. Let HTT code know.
1904          */
1905         ar->htt.rx_ring.in_ord_rx = !!(test_bit(WMI_SERVICE_RX_FULL_REORDER,
1906                                                 ar->wmi.svc_map));
1907
1908         status = ath10k_htt_rx_alloc(&ar->htt);
1909         if (status) {
1910                 ath10k_err(ar, "failed to alloc htt rx: %d\n", status);
1911                 goto err_htt_tx_detach;
1912         }
1913
1914         status = ath10k_hif_start(ar);
1915         if (status) {
1916                 ath10k_err(ar, "could not start HIF: %d\n", status);
1917                 goto err_htt_rx_detach;
1918         }
1919
1920         status = ath10k_htc_wait_target(&ar->htc);
1921         if (status) {
1922                 ath10k_err(ar, "failed to connect to HTC: %d\n", status);
1923                 goto err_hif_stop;
1924         }
1925
1926         if (mode == ATH10K_FIRMWARE_MODE_NORMAL) {
1927                 status = ath10k_htt_connect(&ar->htt);
1928                 if (status) {
1929                         ath10k_err(ar, "failed to connect htt (%d)\n", status);
1930                         goto err_hif_stop;
1931                 }
1932         }
1933
1934         status = ath10k_wmi_connect(ar);
1935         if (status) {
1936                 ath10k_err(ar, "could not connect wmi: %d\n", status);
1937                 goto err_hif_stop;
1938         }
1939
1940         status = ath10k_pktlog_connect(ar);
1941         if (status) {
1942                 ath10k_err(ar, "could not connect pktlog: %d\n", status);
1943                 goto err_hif_stop;
1944         }
1945
1946         status = ath10k_htc_start(&ar->htc);
1947         if (status) {
1948                 ath10k_err(ar, "failed to start htc: %d\n", status);
1949                 goto err_hif_stop;
1950         }
1951
1952         if (mode == ATH10K_FIRMWARE_MODE_NORMAL) {
1953                 status = ath10k_wmi_wait_for_service_ready(ar);
1954                 if (status) {
1955                         ath10k_warn(ar, "wmi service ready event not received");
1956                         goto err_hif_stop;
1957                 }
1958         }
1959
1960         ath10k_dbg(ar, ATH10K_DBG_BOOT, "firmware %s booted\n",
1961                    ar->hw->wiphy->fw_version);
1962
1963         if (test_bit(WMI_SERVICE_EXT_RES_CFG_SUPPORT, ar->wmi.svc_map)) {
1964                 val = 0;
1965                 if (ath10k_peer_stats_enabled(ar))
1966                         val = WMI_10_4_PEER_STATS;
1967
1968                 if (test_bit(WMI_SERVICE_BSS_CHANNEL_INFO_64, ar->wmi.svc_map))
1969                         val |= WMI_10_4_BSS_CHANNEL_INFO_64;
1970
1971                 /* 10.4 firmware supports BT-Coex without reloading firmware
1972                  * via pdev param. To support Bluetooth coexistence pdev param,
1973                  * WMI_COEX_GPIO_SUPPORT of extended resource config should be
1974                  * enabled always.
1975                  */
1976                 if (test_bit(WMI_SERVICE_COEX_GPIO, ar->wmi.svc_map) &&
1977                     test_bit(ATH10K_FW_FEATURE_BTCOEX_PARAM,
1978                              ar->running_fw->fw_file.fw_features))
1979                         val |= WMI_10_4_COEX_GPIO_SUPPORT;
1980
1981                 status = ath10k_mac_ext_resource_config(ar, val);
1982                 if (status) {
1983                         ath10k_err(ar,
1984                                    "failed to send ext resource cfg command : %d\n",
1985                                    status);
1986                         goto err_hif_stop;
1987                 }
1988         }
1989
1990         status = ath10k_wmi_cmd_init(ar);
1991         if (status) {
1992                 ath10k_err(ar, "could not send WMI init command (%d)\n",
1993                            status);
1994                 goto err_hif_stop;
1995         }
1996
1997         status = ath10k_wmi_wait_for_unified_ready(ar);
1998         if (status) {
1999                 ath10k_err(ar, "wmi unified ready event not received\n");
2000                 goto err_hif_stop;
2001         }
2002
2003         /* Some firmware revisions do not properly set up hardware rx filter
2004          * registers.
2005          *
2006          * A known example from QCA9880 and 10.2.4 is that MAC_PCU_ADDR1_MASK
2007          * is filled with 0s instead of 1s allowing HW to respond with ACKs to
2008          * any frames that matches MAC_PCU_RX_FILTER which is also
2009          * misconfigured to accept anything.
2010          *
2011          * The ADDR1 is programmed using internal firmware structure field and
2012          * can't be (easily/sanely) reached from the driver explicitly. It is
2013          * possible to implicitly make it correct by creating a dummy vdev and
2014          * then deleting it.
2015          */
2016         if (!QCA_REV_WCN3990(ar)) {
2017                 status = ath10k_core_reset_rx_filter(ar);
2018                 if (status) {
2019                         ath10k_err(ar, "failed to reset rx filter: %d\n",
2020                                    status);
2021                         goto err_hif_stop;
2022                 }
2023         }
2024
2025         status = ath10k_htt_rx_ring_refill(ar);
2026         if (status) {
2027                 ath10k_err(ar, "failed to refill htt rx ring: %d\n", status);
2028                 goto err_hif_stop;
2029         }
2030
2031         if (ar->max_num_vdevs >= 64)
2032                 ar->free_vdev_map = 0xFFFFFFFFFFFFFFFFLL;
2033         else
2034                 ar->free_vdev_map = (1LL << ar->max_num_vdevs) - 1;
2035
2036         INIT_LIST_HEAD(&ar->arvifs);
2037
2038         /* we don't care about HTT in UTF mode */
2039         if (mode == ATH10K_FIRMWARE_MODE_NORMAL) {
2040                 status = ath10k_htt_setup(&ar->htt);
2041                 if (status) {
2042                         ath10k_err(ar, "failed to setup htt: %d\n", status);
2043                         goto err_hif_stop;
2044                 }
2045         }
2046
2047         status = ath10k_debug_start(ar);
2048         if (status)
2049                 goto err_hif_stop;
2050
2051         return 0;
2052
2053 err_hif_stop:
2054         ath10k_hif_stop(ar);
2055 err_htt_rx_detach:
2056         ath10k_htt_rx_free(&ar->htt);
2057 err_htt_tx_detach:
2058         ath10k_htt_tx_free(&ar->htt);
2059 err_wmi_detach:
2060         ath10k_wmi_detach(ar);
2061 err:
2062         return status;
2063 }
2064 EXPORT_SYMBOL(ath10k_core_start);
2065
2066 int ath10k_wait_for_suspend(struct ath10k *ar, u32 suspend_opt)
2067 {
2068         int ret;
2069         unsigned long time_left;
2070
2071         reinit_completion(&ar->target_suspend);
2072
2073         ret = ath10k_wmi_pdev_suspend_target(ar, suspend_opt);
2074         if (ret) {
2075                 ath10k_warn(ar, "could not suspend target (%d)\n", ret);
2076                 return ret;
2077         }
2078
2079         time_left = wait_for_completion_timeout(&ar->target_suspend, 1 * HZ);
2080
2081         if (!time_left) {
2082                 ath10k_warn(ar, "suspend timed out - target pause event never came\n");
2083                 return -ETIMEDOUT;
2084         }
2085
2086         return 0;
2087 }
2088
2089 void ath10k_core_stop(struct ath10k *ar)
2090 {
2091         lockdep_assert_held(&ar->conf_mutex);
2092         ath10k_debug_stop(ar);
2093
2094         /* try to suspend target */
2095         if (ar->state != ATH10K_STATE_RESTARTING &&
2096             ar->state != ATH10K_STATE_UTF)
2097                 ath10k_wait_for_suspend(ar, ar->hw_values->pdev_suspend_option);
2098
2099         ath10k_hif_stop(ar);
2100         ath10k_htt_tx_free(&ar->htt);
2101         ath10k_htt_rx_free(&ar->htt);
2102         ath10k_wmi_detach(ar);
2103 }
2104 EXPORT_SYMBOL(ath10k_core_stop);
2105
2106 /* mac80211 manages fw/hw initialization through start/stop hooks. However in
2107  * order to know what hw capabilities should be advertised to mac80211 it is
2108  * necessary to load the firmware (and tear it down immediately since start
2109  * hook will try to init it again) before registering */
2110 static int ath10k_core_probe_fw(struct ath10k *ar)
2111 {
2112         struct bmi_target_info target_info;
2113         int ret = 0;
2114
2115         ret = ath10k_hif_power_up(ar);
2116         if (ret) {
2117                 ath10k_err(ar, "could not start pci hif (%d)\n", ret);
2118                 return ret;
2119         }
2120
2121         if (ar->is_bmi) {
2122                 memset(&target_info, 0, sizeof(target_info));
2123                 ret = ath10k_bmi_get_target_info(ar, &target_info);
2124                 if (ret) {
2125                         ath10k_err(ar, "could not get target info (%d)\n", ret);
2126                         goto err_power_down;
2127                 }
2128                 ar->target_version = target_info.version;
2129                 ar->hw->wiphy->hw_version = target_info.version;
2130         }
2131
2132         ret = ath10k_init_hw_params(ar);
2133         if (ret) {
2134                 ath10k_err(ar, "could not get hw params (%d)\n", ret);
2135                 goto err_power_down;
2136         }
2137
2138         ret = ath10k_core_fetch_firmware_files(ar);
2139         if (ret) {
2140                 ath10k_err(ar, "could not fetch firmware files (%d)\n", ret);
2141                 goto err_power_down;
2142         }
2143
2144         BUILD_BUG_ON(sizeof(ar->hw->wiphy->fw_version) !=
2145                         sizeof(ar->normal_mode_fw.fw_file.fw_version));
2146         memcpy(ar->hw->wiphy->fw_version,
2147                ar->normal_mode_fw.fw_file.fw_version,
2148                sizeof(ar->hw->wiphy->fw_version));
2149         ath10k_debug_print_hwfw_info(ar);
2150
2151         if (ar->is_bmi) {
2152                 ret = ath10k_core_pre_cal_download(ar);
2153                 if (ret) {
2154                         /* pre calibration data download is not necessary
2155                          * for all the chipsets. Ignore failures and continue.
2156                          */
2157                         ath10k_dbg(ar, ATH10K_DBG_BOOT,
2158                                    "could not load pre cal data: %d\n", ret);
2159                 }
2160
2161                 ret = ath10k_core_get_board_id_from_otp(ar);
2162                 if (ret && ret != -EOPNOTSUPP) {
2163                         ath10k_err(ar, "failed to get board id from otp: %d\n",
2164                                    ret);
2165                         goto err_free_firmware_files;
2166                 }
2167
2168                 ret = ath10k_core_fetch_board_file(ar);
2169                 if (ret) {
2170                         ath10k_err(ar, "failed to fetch board file: %d\n", ret);
2171                         goto err_free_firmware_files;
2172                 }
2173
2174                 ath10k_debug_print_board_info(ar);
2175         }
2176
2177         ret = ath10k_core_init_firmware_features(ar);
2178         if (ret) {
2179                 ath10k_err(ar, "fatal problem with firmware features: %d\n",
2180                            ret);
2181                 goto err_free_firmware_files;
2182         }
2183
2184         if (ar->is_bmi) {
2185                 ret = ath10k_swap_code_seg_init(ar,
2186                                                 &ar->normal_mode_fw.fw_file);
2187                 if (ret) {
2188                         ath10k_err(ar, "failed to init code swap segment: %d\n",
2189                                    ret);
2190                         goto err_free_firmware_files;
2191                 }
2192         }
2193
2194         mutex_lock(&ar->conf_mutex);
2195
2196         ret = ath10k_core_start(ar, ATH10K_FIRMWARE_MODE_NORMAL,
2197                                 &ar->normal_mode_fw);
2198         if (ret) {
2199                 ath10k_err(ar, "could not init core (%d)\n", ret);
2200                 goto err_unlock;
2201         }
2202
2203         ath10k_debug_print_boot_info(ar);
2204         ath10k_core_stop(ar);
2205
2206         mutex_unlock(&ar->conf_mutex);
2207
2208         ath10k_hif_power_down(ar);
2209         return 0;
2210
2211 err_unlock:
2212         mutex_unlock(&ar->conf_mutex);
2213
2214 err_free_firmware_files:
2215         ath10k_core_free_firmware_files(ar);
2216
2217 err_power_down:
2218         ath10k_hif_power_down(ar);
2219
2220         return ret;
2221 }
2222
2223 static void ath10k_core_register_work(struct work_struct *work)
2224 {
2225         struct ath10k *ar = container_of(work, struct ath10k, register_work);
2226         int status;
2227
2228         /* peer stats are enabled by default */
2229         set_bit(ATH10K_FLAG_PEER_STATS, &ar->dev_flags);
2230
2231         status = ath10k_core_probe_fw(ar);
2232         if (status) {
2233                 ath10k_err(ar, "could not probe fw (%d)\n", status);
2234                 goto err;
2235         }
2236
2237         status = ath10k_mac_register(ar);
2238         if (status) {
2239                 ath10k_err(ar, "could not register to mac80211 (%d)\n", status);
2240                 goto err_release_fw;
2241         }
2242
2243         status = ath10k_debug_register(ar);
2244         if (status) {
2245                 ath10k_err(ar, "unable to initialize debugfs\n");
2246                 goto err_unregister_mac;
2247         }
2248
2249         status = ath10k_spectral_create(ar);
2250         if (status) {
2251                 ath10k_err(ar, "failed to initialize spectral\n");
2252                 goto err_debug_destroy;
2253         }
2254
2255         status = ath10k_thermal_register(ar);
2256         if (status) {
2257                 ath10k_err(ar, "could not register thermal device: %d\n",
2258                            status);
2259                 goto err_spectral_destroy;
2260         }
2261
2262         set_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags);
2263         return;
2264
2265 err_spectral_destroy:
2266         ath10k_spectral_destroy(ar);
2267 err_debug_destroy:
2268         ath10k_debug_destroy(ar);
2269 err_unregister_mac:
2270         ath10k_mac_unregister(ar);
2271 err_release_fw:
2272         ath10k_core_free_firmware_files(ar);
2273 err:
2274         /* TODO: It's probably a good idea to release device from the driver
2275          * but calling device_release_driver() here will cause a deadlock.
2276          */
2277         return;
2278 }
2279
2280 int ath10k_core_register(struct ath10k *ar, u32 chip_id)
2281 {
2282         ar->chip_id = chip_id;
2283         queue_work(ar->workqueue, &ar->register_work);
2284
2285         return 0;
2286 }
2287 EXPORT_SYMBOL(ath10k_core_register);
2288
2289 void ath10k_core_unregister(struct ath10k *ar)
2290 {
2291         cancel_work_sync(&ar->register_work);
2292
2293         if (!test_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags))
2294                 return;
2295
2296         ath10k_thermal_unregister(ar);
2297         /* Stop spectral before unregistering from mac80211 to remove the
2298          * relayfs debugfs file cleanly. Otherwise the parent debugfs tree
2299          * would be already be free'd recursively, leading to a double free.
2300          */
2301         ath10k_spectral_destroy(ar);
2302
2303         /* We must unregister from mac80211 before we stop HTC and HIF.
2304          * Otherwise we will fail to submit commands to FW and mac80211 will be
2305          * unhappy about callback failures. */
2306         ath10k_mac_unregister(ar);
2307
2308         ath10k_testmode_destroy(ar);
2309
2310         ath10k_core_free_firmware_files(ar);
2311         ath10k_core_free_board_files(ar);
2312
2313         ath10k_debug_unregister(ar);
2314 }
2315 EXPORT_SYMBOL(ath10k_core_unregister);
2316
2317 struct ath10k *ath10k_core_create(size_t priv_size, struct device *dev,
2318                                   enum ath10k_bus bus,
2319                                   enum ath10k_hw_rev hw_rev,
2320                                   const struct ath10k_hif_ops *hif_ops)
2321 {
2322         struct ath10k *ar;
2323         int ret;
2324
2325         ar = ath10k_mac_create(priv_size);
2326         if (!ar)
2327                 return NULL;
2328
2329         ar->ath_common.priv = ar;
2330         ar->ath_common.hw = ar->hw;
2331         ar->dev = dev;
2332         ar->hw_rev = hw_rev;
2333         ar->hif.ops = hif_ops;
2334         ar->hif.bus = bus;
2335
2336         /* By default, assume bmi is set, as most of the existing
2337          * chip sets are based on this, set to false explicitly
2338          * when current chip set does not support.
2339          */
2340         ar->is_bmi = true;
2341
2342         switch (hw_rev) {
2343         case ATH10K_HW_QCA988X:
2344         case ATH10K_HW_QCA9887:
2345                 ar->regs = &qca988x_regs;
2346                 ar->hw_ce_regs = &qcax_ce_regs;
2347                 ar->hw_values = &qca988x_values;
2348                 break;
2349         case ATH10K_HW_QCA6174:
2350         case ATH10K_HW_QCA9377:
2351                 ar->regs = &qca6174_regs;
2352                 ar->hw_ce_regs = &qcax_ce_regs;
2353                 ar->hw_values = &qca6174_values;
2354                 break;
2355         case ATH10K_HW_QCA99X0:
2356         case ATH10K_HW_QCA9984:
2357                 ar->regs = &qca99x0_regs;
2358                 ar->hw_ce_regs = &qcax_ce_regs;
2359                 ar->hw_values = &qca99x0_values;
2360                 break;
2361         case ATH10K_HW_QCA9888:
2362                 ar->regs = &qca99x0_regs;
2363                 ar->hw_ce_regs = &qcax_ce_regs;
2364                 ar->hw_values = &qca9888_values;
2365                 break;
2366         case ATH10K_HW_QCA4019:
2367                 ar->regs = &qca4019_regs;
2368                 ar->hw_ce_regs = &qcax_ce_regs;
2369                 ar->hw_values = &qca4019_values;
2370                 break;
2371         case ATH10K_HW_WCN3990:
2372                 ar->regs = &wcn3990_regs;
2373                 ar->hw_ce_regs = &wcn3990_ce_regs;
2374                 ar->hw_values = &wcn3990_values;
2375                 /* WCN3990 chip set is non bmi based */
2376                 ar->is_bmi = false;
2377                 ar->fw_flags = &wcn3990_fw_flags;
2378                 ar->shadow_reg_value = &wcn3990_shadow_reg_value;
2379                 ar->shadow_reg_address = &wcn3990_shadow_reg_address;
2380                 ar->rri_on_ddr = true;
2381                 break;
2382         default:
2383                 ath10k_err(ar, "unsupported core hardware revision %d\n",
2384                            hw_rev);
2385                 ret = -ENOTSUPP;
2386                 goto err_free_mac;
2387         }
2388
2389         init_completion(&ar->scan.started);
2390         init_completion(&ar->scan.completed);
2391         init_completion(&ar->scan.on_channel);
2392         init_completion(&ar->target_suspend);
2393         init_completion(&ar->wow.wakeup_completed);
2394
2395         init_completion(&ar->install_key_done);
2396         init_completion(&ar->vdev_setup_done);
2397         init_completion(&ar->vdev_delete_done);
2398         init_completion(&ar->thermal.wmi_sync);
2399         init_completion(&ar->bss_survey_done);
2400         init_completion(&ar->peer_delete_done);
2401
2402         INIT_DELAYED_WORK(&ar->scan.timeout, ath10k_scan_timeout_work);
2403
2404         ar->workqueue = create_singlethread_workqueue("ath10k_wq");
2405         if (!ar->workqueue)
2406                 goto err_free_mac;
2407
2408         ar->workqueue_aux = create_singlethread_workqueue("ath10k_aux_wq");
2409         if (!ar->workqueue_aux)
2410                 goto err_free_wq;
2411
2412         mutex_init(&ar->conf_mutex);
2413         spin_lock_init(&ar->data_lock);
2414         spin_lock_init(&ar->txqs_lock);
2415         spin_lock_init(&ar->datapath_rx_stat_lock);
2416
2417         INIT_LIST_HEAD(&ar->txqs);
2418         INIT_LIST_HEAD(&ar->peers);
2419         init_waitqueue_head(&ar->peer_mapping_wq);
2420         init_waitqueue_head(&ar->htt.empty_tx_wq);
2421         init_waitqueue_head(&ar->wmi.tx_credits_wq);
2422
2423         init_completion(&ar->offchan_tx_completed);
2424         INIT_WORK(&ar->offchan_tx_work, ath10k_offchan_tx_work);
2425         skb_queue_head_init(&ar->offchan_tx_queue);
2426
2427         INIT_WORK(&ar->wmi_mgmt_tx_work, ath10k_mgmt_over_wmi_tx_work);
2428         skb_queue_head_init(&ar->wmi_mgmt_tx_queue);
2429
2430         INIT_WORK(&ar->register_work, ath10k_core_register_work);
2431         INIT_WORK(&ar->restart_work, ath10k_core_restart);
2432
2433         init_dummy_netdev(&ar->napi_dev);
2434
2435         ret = ath10k_debug_create(ar);
2436         if (ret)
2437                 goto err_free_aux_wq;
2438
2439         return ar;
2440
2441 err_free_aux_wq:
2442         destroy_workqueue(ar->workqueue_aux);
2443 err_free_wq:
2444         destroy_workqueue(ar->workqueue);
2445
2446 err_free_mac:
2447         ath10k_mac_destroy(ar);
2448
2449         return NULL;
2450 }
2451 EXPORT_SYMBOL(ath10k_core_create);
2452
2453 void ath10k_core_destroy(struct ath10k *ar)
2454 {
2455         flush_workqueue(ar->workqueue);
2456         destroy_workqueue(ar->workqueue);
2457
2458         flush_workqueue(ar->workqueue_aux);
2459         destroy_workqueue(ar->workqueue_aux);
2460
2461         ath10k_debug_destroy(ar);
2462         ath10k_wmi_free_host_mem(ar);
2463         ath10k_mac_destroy(ar);
2464 }
2465 EXPORT_SYMBOL(ath10k_core_destroy);
2466
2467 MODULE_AUTHOR("Qualcomm Atheros");
2468 MODULE_DESCRIPTION("Core module for Qualcomm Atheros 802.11ac wireless LAN cards.");
2469 MODULE_LICENSE("Dual BSD/GPL");