drivers/net/wireless/ath/ath9k/main.c

   1 /*
   2  * Copyright (c) 2008-2009 Atheros Communications Inc.
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  */
  16
  17 #include <linux/nl80211.h>
  18 #include <linux/delay.h>
  19 #include "ath9k.h"
  20 #include "btcoex.h"
  21
  22 static u8 parse_mpdudensity(u8 mpdudensity)
  23 {
  24         /*
  25          * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
  26          *   0 for no restriction
  27          *   1 for 1/4 us
  28          *   2 for 1/2 us
  29          *   3 for 1 us
  30          *   4 for 2 us
  31          *   5 for 4 us
  32          *   6 for 8 us
  33          *   7 for 16 us
  34          */
  35         switch (mpdudensity) {
  36         case 0:
  37                 return 0;
  38         case 1:
  39         case 2:
  40         case 3:
  41                 /* Our lower layer calculations limit our precision to
  42                    1 microsecond */
  43                 return 1;
  44         case 4:
  45                 return 2;
  46         case 5:
  47                 return 4;
  48         case 6:
  49                 return 8;
  50         case 7:
  51                 return 16;
  52         default:
  53                 return 0;
  54         }
  55 }
  56
  57 static bool ath9k_has_pending_frames(struct ath_softc *sc, struct ath_txq *txq)
  58 {
  59         bool pending = false;
  60
  61         spin_lock_bh(&txq->axq_lock);
  62
  63         if (txq->axq_depth || !list_empty(&txq->axq_acq))
  64                 pending = true;
  65         else if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
  66                 pending = !list_empty(&txq->txq_fifo_pending);
  67
  68         spin_unlock_bh(&txq->axq_lock);
  69         return pending;
  70 }
  71
  72 bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
  73 {
  74         unsigned long flags;
  75         bool ret;
  76
  77         spin_lock_irqsave(&sc->sc_pm_lock, flags);
  78         ret = ath9k_hw_setpower(sc->sc_ah, mode);
  79         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  80
  81         return ret;
  82 }
  83
  84 void ath9k_ps_wakeup(struct ath_softc *sc)
  85 {
  86         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  87         unsigned long flags;
  88         enum ath9k_power_mode power_mode;
  89
  90         spin_lock_irqsave(&sc->sc_pm_lock, flags);
  91         if (++sc->ps_usecount != 1)
  92                 goto unlock;
  93
  94         power_mode = sc->sc_ah->power_mode;
  95         ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
  96
  97         /*
  98          * While the hardware is asleep, the cycle counters contain no
  99          * useful data. Better clear them now so that they don't mess up
 100          * survey data results.
 101          */
 102         if (power_mode != ATH9K_PM_AWAKE) {
 103                 spin_lock(&common->cc_lock);
 104                 ath_hw_cycle_counters_update(common);
 105                 memset(&common->cc_survey, 0, sizeof(common->cc_survey));
 106                 spin_unlock(&common->cc_lock);
 107         }
 108
 109  unlock:
 110         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 111 }
 112
 113 void ath9k_ps_restore(struct ath_softc *sc)
 114 {
 115         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 116         unsigned long flags;
 117
 118         spin_lock_irqsave(&sc->sc_pm_lock, flags);
 119         if (--sc->ps_usecount != 0)
 120                 goto unlock;
 121
 122         spin_lock(&common->cc_lock);
 123         ath_hw_cycle_counters_update(common);
 124         spin_unlock(&common->cc_lock);
 125
 126         if (sc->ps_idle)
 127                 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
 128         else if (sc->ps_enabled &&
 129                  !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
 130                               PS_WAIT_FOR_CAB |
 131                               PS_WAIT_FOR_PSPOLL_DATA |
 132                               PS_WAIT_FOR_TX_ACK)))
 133                 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_NETWORK_SLEEP);
 134
 135  unlock:
 136         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 137 }
 138
 139 static void ath_start_ani(struct ath_common *common)
 140 {
 141         struct ath_hw *ah = common->ah;
 142         unsigned long timestamp = jiffies_to_msecs(jiffies);
 143         struct ath_softc *sc = (struct ath_softc *) common->priv;
 144
 145         if (!(sc->sc_flags & SC_OP_ANI_RUN))
 146                 return;
 147
 148         if (sc->sc_flags & SC_OP_OFFCHANNEL)
 149                 return;
 150
 151         common->ani.longcal_timer = timestamp;
 152         common->ani.shortcal_timer = timestamp;
 153         common->ani.checkani_timer = timestamp;
 154
 155         mod_timer(&common->ani.timer,
 156                   jiffies +
 157                         msecs_to_jiffies((u32)ah->config.ani_poll_interval));
 158 }
 159
 160 static void ath_update_survey_nf(struct ath_softc *sc, int channel)
 161 {
 162         struct ath_hw *ah = sc->sc_ah;
 163         struct ath9k_channel *chan = &ah->channels[channel];
 164         struct survey_info *survey = &sc->survey[channel];
 165
 166         if (chan->noisefloor) {
 167                 survey->filled |= SURVEY_INFO_NOISE_DBM;
 168                 survey->noise = chan->noisefloor;
 169         }
 170 }
 171
 172 /*
 173  * Updates the survey statistics and returns the busy time since last
 174  * update in %, if the measurement duration was long enough for the
 175  * result to be useful, -1 otherwise.
 176  */
 177 static int ath_update_survey_stats(struct ath_softc *sc)
 178 {
 179         struct ath_hw *ah = sc->sc_ah;
 180         struct ath_common *common = ath9k_hw_common(ah);
 181         int pos = ah->curchan - &ah->channels[0];
 182         struct survey_info *survey = &sc->survey[pos];
 183         struct ath_cycle_counters *cc = &common->cc_survey;
 184         unsigned int div = common->clockrate * 1000;
 185         int ret = 0;
 186
 187         if (!ah->curchan)
 188                 return -1;
 189
 190         if (ah->power_mode == ATH9K_PM_AWAKE)
 191                 ath_hw_cycle_counters_update(common);
 192
 193         if (cc->cycles > 0) {
 194                 survey->filled |= SURVEY_INFO_CHANNEL_TIME |
 195                         SURVEY_INFO_CHANNEL_TIME_BUSY |
 196                         SURVEY_INFO_CHANNEL_TIME_RX |
 197                         SURVEY_INFO_CHANNEL_TIME_TX;
 198                 survey->channel_time += cc->cycles / div;
 199                 survey->channel_time_busy += cc->rx_busy / div;
 200                 survey->channel_time_rx += cc->rx_frame / div;
 201                 survey->channel_time_tx += cc->tx_frame / div;
 202         }
 203
 204         if (cc->cycles < div)
 205                 return -1;
 206
 207         if (cc->cycles > 0)
 208                 ret = cc->rx_busy * 100 / cc->cycles;
 209
 210         memset(cc, 0, sizeof(*cc));
 211
 212         ath_update_survey_nf(sc, pos);
 213
 214         return ret;
 215 }
 216
 217 /*
 218  * Set/change channels.  If the channel is really being changed, it's done
 219  * by reseting the chip.  To accomplish this we must first cleanup any pending
 220  * DMA, then restart stuff.
 221 */
 222 int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
 223                     struct ath9k_channel *hchan)
 224 {
 225         struct ath_hw *ah = sc->sc_ah;
 226         struct ath_common *common = ath9k_hw_common(ah);
 227         struct ieee80211_conf *conf = &common->hw->conf;
 228         bool fastcc = true, stopped;
 229         struct ieee80211_channel *channel = hw->conf.channel;
 230         struct ath9k_hw_cal_data *caldata = NULL;
 231         int r;
 232
 233         if (sc->sc_flags & SC_OP_INVALID)
 234                 return -EIO;
 235
 236         sc->hw_busy_count = 0;
 237
 238         del_timer_sync(&common->ani.timer);
 239         cancel_work_sync(&sc->paprd_work);
 240         cancel_work_sync(&sc->hw_check_work);
 241         cancel_delayed_work_sync(&sc->tx_complete_work);
 242         cancel_delayed_work_sync(&sc->hw_pll_work);
 243
 244         ath9k_ps_wakeup(sc);
 245
 246         spin_lock_bh(&sc->sc_pcu_lock);
 247
 248         /*
 249          * This is only performed if the channel settings have
 250          * actually changed.
 251          *
 252          * To switch channels clear any pending DMA operations;
 253          * wait long enough for the RX fifo to drain, reset the
 254          * hardware at the new frequency, and then re-enable
 255          * the relevant bits of the h/w.
 256          */
 257         ath9k_hw_disable_interrupts(ah);
 258         stopped = ath_drain_all_txq(sc, false);
 259
 260         if (!ath_stoprecv(sc))
 261                 stopped = false;
 262
 263         if (!ath9k_hw_check_alive(ah))
 264                 stopped = false;
 265
 266         /* XXX: do not flush receive queue here. We don't want
 267          * to flush data frames already in queue because of
 268          * changing channel. */
 269
 270         if (!stopped || !(sc->sc_flags & SC_OP_OFFCHANNEL))
 271                 fastcc = false;
 272
 273         if (!(sc->sc_flags & SC_OP_OFFCHANNEL))
 274                 caldata = &sc->caldata;
 275
 276         ath_dbg(common, ATH_DBG_CONFIG,
 277                 "(%u MHz) -> (%u MHz), conf_is_ht40: %d fastcc: %d\n",
 278                 sc->sc_ah->curchan->channel,
 279                 channel->center_freq, conf_is_ht40(conf),
 280                 fastcc);
 281
 282         r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
 283         if (r) {
 284                 ath_err(common,
 285                         "Unable to reset channel (%u MHz), reset status %d\n",
 286                         channel->center_freq, r);
 287                 goto ps_restore;
 288         }
 289
 290         if (ath_startrecv(sc) != 0) {
 291                 ath_err(common, "Unable to restart recv logic\n");
 292                 r = -EIO;
 293                 goto ps_restore;
 294         }
 295
 296         ath9k_cmn_update_txpow(ah, sc->curtxpow,
 297                                sc->config.txpowlimit, &sc->curtxpow);
 298         ath9k_hw_set_interrupts(ah, ah->imask);
 299
 300         if (!(sc->sc_flags & (SC_OP_OFFCHANNEL))) {
 301                 if (sc->sc_flags & SC_OP_BEACONS)
 302                         ath_set_beacon(sc);
 303                 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
 304                 ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work, HZ/2);
 305                 ath_start_ani(common);
 306         }
 307
 308  ps_restore:
 309         ieee80211_wake_queues(hw);
 310
 311         spin_unlock_bh(&sc->sc_pcu_lock);
 312
 313         ath9k_ps_restore(sc);
 314         return r;
 315 }
 316
 317 static void ath_paprd_activate(struct ath_softc *sc)
 318 {
 319         struct ath_hw *ah = sc->sc_ah;
 320         struct ath9k_hw_cal_data *caldata = ah->caldata;
 321         struct ath_common *common = ath9k_hw_common(ah);
 322         int chain;
 323
 324         if (!caldata || !caldata->paprd_done)
 325                 return;
 326
 327         ath9k_ps_wakeup(sc);
 328         ar9003_paprd_enable(ah, false);
 329         for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
 330                 if (!(common->tx_chainmask & BIT(chain)))
 331                         continue;
 332
 333                 ar9003_paprd_populate_single_table(ah, caldata, chain);
 334         }
 335
 336         ar9003_paprd_enable(ah, true);
 337         ath9k_ps_restore(sc);
 338 }
 339
 340 static bool ath_paprd_send_frame(struct ath_softc *sc, struct sk_buff *skb, int chain)
 341 {
 342         struct ieee80211_hw *hw = sc->hw;
 343         struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
 344         struct ath_hw *ah = sc->sc_ah;
 345         struct ath_common *common = ath9k_hw_common(ah);
 346         struct ath_tx_control txctl;
 347         int time_left;
 348
 349         memset(&txctl, 0, sizeof(txctl));
 350         txctl.txq = sc->tx.txq_map[WME_AC_BE];
 351
 352         memset(tx_info, 0, sizeof(*tx_info));
 353         tx_info->band = hw->conf.channel->band;
 354         tx_info->flags |= IEEE80211_TX_CTL_NO_ACK;
 355         tx_info->control.rates[0].idx = 0;
 356         tx_info->control.rates[0].count = 1;
 357         tx_info->control.rates[0].flags = IEEE80211_TX_RC_MCS;
 358         tx_info->control.rates[1].idx = -1;
 359
 360         init_completion(&sc->paprd_complete);
 361         txctl.paprd = BIT(chain);
 362
 363         if (ath_tx_start(hw, skb, &txctl) != 0) {
 364                 ath_dbg(common, ATH_DBG_XMIT, "PAPRD TX failed\n");
 365                 dev_kfree_skb_any(skb);
 366                 return false;
 367         }
 368
 369         time_left = wait_for_completion_timeout(&sc->paprd_complete,
 370                         msecs_to_jiffies(ATH_PAPRD_TIMEOUT));
 371
 372         if (!time_left)
 373                 ath_dbg(ath9k_hw_common(sc->sc_ah), ATH_DBG_CALIBRATE,
 374                         "Timeout waiting for paprd training on TX chain %d\n",
 375                         chain);
 376
 377         return !!time_left;
 378 }
 379
 380 void ath_paprd_calibrate(struct work_struct *work)
 381 {
 382         struct ath_softc *sc = container_of(work, struct ath_softc, paprd_work);
 383         struct ieee80211_hw *hw = sc->hw;
 384         struct ath_hw *ah = sc->sc_ah;
 385         struct ieee80211_hdr *hdr;
 386         struct sk_buff *skb = NULL;
 387         struct ath9k_hw_cal_data *caldata = ah->caldata;
 388         struct ath_common *common = ath9k_hw_common(ah);
 389         int ftype;
 390         int chain_ok = 0;
 391         int chain;
 392         int len = 1800;
 393
 394         if (!caldata)
 395                 return;
 396
 397         if (ar9003_paprd_init_table(ah) < 0)
 398                 return;
 399
 400         skb = alloc_skb(len, GFP_KERNEL);
 401         if (!skb)
 402                 return;
 403
 404         skb_put(skb, len);
 405         memset(skb->data, 0, len);
 406         hdr = (struct ieee80211_hdr *)skb->data;
 407         ftype = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_NULLFUNC;
 408         hdr->frame_control = cpu_to_le16(ftype);
 409         hdr->duration_id = cpu_to_le16(10);
 410         memcpy(hdr->addr1, hw->wiphy->perm_addr, ETH_ALEN);
 411         memcpy(hdr->addr2, hw->wiphy->perm_addr, ETH_ALEN);
 412         memcpy(hdr->addr3, hw->wiphy->perm_addr, ETH_ALEN);
 413
 414         ath9k_ps_wakeup(sc);
 415         for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
 416                 if (!(common->tx_chainmask & BIT(chain)))
 417                         continue;
 418
 419                 chain_ok = 0;
 420
 421                 ath_dbg(common, ATH_DBG_CALIBRATE,
 422                         "Sending PAPRD frame for thermal measurement "
 423                         "on chain %d\n", chain);
 424                 if (!ath_paprd_send_frame(sc, skb, chain))
 425                         goto fail_paprd;
 426
 427                 ar9003_paprd_setup_gain_table(ah, chain);
 428
 429                 ath_dbg(common, ATH_DBG_CALIBRATE,
 430                         "Sending PAPRD training frame on chain %d\n", chain);
 431                 if (!ath_paprd_send_frame(sc, skb, chain))
 432                         goto fail_paprd;
 433
 434                 if (!ar9003_paprd_is_done(ah))
 435                         break;
 436
 437                 if (ar9003_paprd_create_curve(ah, caldata, chain) != 0)
 438                         break;
 439
 440                 chain_ok = 1;
 441         }
 442         kfree_skb(skb);
 443
 444         if (chain_ok) {
 445                 caldata->paprd_done = true;
 446                 ath_paprd_activate(sc);
 447         }
 448
 449 fail_paprd:
 450         ath9k_ps_restore(sc);
 451 }
 452
 453 /*
 454  *  This routine performs the periodic noise floor calibration function
 455  *  that is used to adjust and optimize the chip performance.  This
 456  *  takes environmental changes (location, temperature) into account.
 457  *  When the task is complete, it reschedules itself depending on the
 458  *  appropriate interval that was calculated.
 459  */
 460 void ath_ani_calibrate(unsigned long data)
 461 {
 462         struct ath_softc *sc = (struct ath_softc *)data;
 463         struct ath_hw *ah = sc->sc_ah;
 464         struct ath_common *common = ath9k_hw_common(ah);
 465         bool longcal = false;
 466         bool shortcal = false;
 467         bool aniflag = false;
 468         unsigned int timestamp = jiffies_to_msecs(jiffies);
 469         u32 cal_interval, short_cal_interval, long_cal_interval;
 470         unsigned long flags;
 471
 472         if (ah->caldata && ah->caldata->nfcal_interference)
 473                 long_cal_interval = ATH_LONG_CALINTERVAL_INT;
 474         else
 475                 long_cal_interval = ATH_LONG_CALINTERVAL;
 476
 477         short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ?
 478                 ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL;
 479
 480         /* Only calibrate if awake */
 481         if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE)
 482                 goto set_timer;
 483
 484         ath9k_ps_wakeup(sc);
 485
 486         /* Long calibration runs independently of short calibration. */
 487         if ((timestamp - common->ani.longcal_timer) >= long_cal_interval) {
 488                 longcal = true;
 489                 ath_dbg(common, ATH_DBG_ANI, "longcal @%lu\n", jiffies);
 490                 common->ani.longcal_timer = timestamp;
 491         }
 492
 493         /* Short calibration applies only while caldone is false */
 494         if (!common->ani.caldone) {
 495                 if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) {
 496                         shortcal = true;
 497                         ath_dbg(common, ATH_DBG_ANI,
 498                                 "shortcal @%lu\n", jiffies);
 499                         common->ani.shortcal_timer = timestamp;
 500                         common->ani.resetcal_timer = timestamp;
 501                 }
 502         } else {
 503                 if ((timestamp - common->ani.resetcal_timer) >=
 504                     ATH_RESTART_CALINTERVAL) {
 505                         common->ani.caldone = ath9k_hw_reset_calvalid(ah);
 506                         if (common->ani.caldone)
 507                                 common->ani.resetcal_timer = timestamp;
 508                 }
 509         }
 510
 511         /* Verify whether we must check ANI */
 512         if ((timestamp - common->ani.checkani_timer) >=
 513              ah->config.ani_poll_interval) {
 514                 aniflag = true;
 515                 common->ani.checkani_timer = timestamp;
 516         }
 517
 518         /* Skip all processing if there's nothing to do. */
 519         if (longcal || shortcal || aniflag) {
 520                 /* Call ANI routine if necessary */
 521                 if (aniflag) {
 522                         spin_lock_irqsave(&common->cc_lock, flags);
 523                         ath9k_hw_ani_monitor(ah, ah->curchan);
 524                         ath_update_survey_stats(sc);
 525                         spin_unlock_irqrestore(&common->cc_lock, flags);
 526                 }
 527
 528                 /* Perform calibration if necessary */
 529                 if (longcal || shortcal) {
 530                         common->ani.caldone =
 531                                 ath9k_hw_calibrate(ah,
 532                                                    ah->curchan,
 533                                                    common->rx_chainmask,
 534                                                    longcal);
 535                 }
 536         }
 537
 538         ath9k_ps_restore(sc);
 539
 540 set_timer:
 541         /*
 542         * Set timer interval based on previous results.
 543         * The interval must be the shortest necessary to satisfy ANI,
 544         * short calibration and long calibration.
 545         */
 546         cal_interval = ATH_LONG_CALINTERVAL;
 547         if (sc->sc_ah->config.enable_ani)
 548                 cal_interval = min(cal_interval,
 549                                    (u32)ah->config.ani_poll_interval);
 550         if (!common->ani.caldone)
 551                 cal_interval = min(cal_interval, (u32)short_cal_interval);
 552
 553         mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
 554         if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_PAPRD) && ah->caldata) {
 555                 if (!ah->caldata->paprd_done)
 556                         ieee80211_queue_work(sc->hw, &sc->paprd_work);
 557                 else if (!ah->paprd_table_write_done)
 558                         ath_paprd_activate(sc);
 559         }
 560 }
 561
 562 static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta)
 563 {
 564         struct ath_node *an;
 565         struct ath_hw *ah = sc->sc_ah;
 566         an = (struct ath_node *)sta->drv_priv;
 567
 568 #ifdef CONFIG_ATH9K_DEBUGFS
 569         spin_lock(&sc->nodes_lock);
 570         list_add(&an->list, &sc->nodes);
 571         spin_unlock(&sc->nodes_lock);
 572         an->sta = sta;
 573 #endif
 574         if ((ah->caps.hw_caps) & ATH9K_HW_CAP_APM)
 575                 sc->sc_flags |= SC_OP_ENABLE_APM;
 576
 577         if (sc->sc_flags & SC_OP_TXAGGR) {
 578                 ath_tx_node_init(sc, an);
 579                 an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR +
 580                                      sta->ht_cap.ampdu_factor);
 581                 an->mpdudensity = parse_mpdudensity(sta->ht_cap.ampdu_density);
 582         }
 583 }
 584
 585 static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
 586 {
 587         struct ath_node *an = (struct ath_node *)sta->drv_priv;
 588
 589 #ifdef CONFIG_ATH9K_DEBUGFS
 590         spin_lock(&sc->nodes_lock);
 591         list_del(&an->list);
 592         spin_unlock(&sc->nodes_lock);
 593         an->sta = NULL;
 594 #endif
 595
 596         if (sc->sc_flags & SC_OP_TXAGGR)
 597                 ath_tx_node_cleanup(sc, an);
 598 }
 599
 600 void ath_hw_check(struct work_struct *work)
 601 {
 602         struct ath_softc *sc = container_of(work, struct ath_softc, hw_check_work);
 603         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 604         unsigned long flags;
 605         int busy;
 606
 607         ath9k_ps_wakeup(sc);
 608         if (ath9k_hw_check_alive(sc->sc_ah))
 609                 goto out;
 610
 611         spin_lock_irqsave(&common->cc_lock, flags);
 612         busy = ath_update_survey_stats(sc);
 613         spin_unlock_irqrestore(&common->cc_lock, flags);
 614
 615         ath_dbg(common, ATH_DBG_RESET, "Possible baseband hang, "
 616                 "busy=%d (try %d)\n", busy, sc->hw_busy_count + 1);
 617         if (busy >= 99) {
 618                 if (++sc->hw_busy_count >= 3)
 619                         ath_reset(sc, true);
 620         } else if (busy >= 0)
 621                 sc->hw_busy_count = 0;
 622
 623 out:
 624         ath9k_ps_restore(sc);
 625 }
 626
 627 void ath9k_tasklet(unsigned long data)
 628 {
 629         struct ath_softc *sc = (struct ath_softc *)data;
 630         struct ath_hw *ah = sc->sc_ah;
 631         struct ath_common *common = ath9k_hw_common(ah);
 632
 633         u32 status = sc->intrstatus;
 634         u32 rxmask;
 635
 636         if (status & ATH9K_INT_FATAL) {
 637                 ath_reset(sc, true);
 638                 return;
 639         }
 640
 641         ath9k_ps_wakeup(sc);
 642         spin_lock(&sc->sc_pcu_lock);
 643
 644         /*
 645          * Only run the baseband hang check if beacons stop working in AP or
 646          * IBSS mode, because it has a high false positive rate. For station
 647          * mode it should not be necessary, since the upper layers will detect
 648          * this through a beacon miss automatically and the following channel
 649          * change will trigger a hardware reset anyway
 650          */
 651         if (ath9k_hw_numtxpending(ah, sc->beacon.beaconq) != 0 &&
 652             !ath9k_hw_check_alive(ah))
 653                 ieee80211_queue_work(sc->hw, &sc->hw_check_work);
 654
 655         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
 656                 rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
 657                           ATH9K_INT_RXORN);
 658         else
 659                 rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
 660
 661         if (status & rxmask) {
 662                 /* Check for high priority Rx first */
 663                 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
 664                     (status & ATH9K_INT_RXHP))
 665                         ath_rx_tasklet(sc, 0, true);
 666
 667                 ath_rx_tasklet(sc, 0, false);
 668         }
 669
 670         if (status & ATH9K_INT_TX) {
 671                 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
 672                         ath_tx_edma_tasklet(sc);
 673                 else
 674                         ath_tx_tasklet(sc);
 675         }
 676
 677         if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
 678                 /*
 679                  * TSF sync does not look correct; remain awake to sync with
 680                  * the next Beacon.
 681                  */
 682                 ath_dbg(common, ATH_DBG_PS,
 683                         "TSFOOR - Sync with next Beacon\n");
 684                 sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
 685         }
 686
 687         if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
 688                 if (status & ATH9K_INT_GENTIMER)
 689                         ath_gen_timer_isr(sc->sc_ah);
 690
 691         /* re-enable hardware interrupt */
 692         ath9k_hw_enable_interrupts(ah);
 693
 694         spin_unlock(&sc->sc_pcu_lock);
 695         ath9k_ps_restore(sc);
 696 }
 697
 698 irqreturn_t ath_isr(int irq, void *dev)
 699 {
 700 #define SCHED_INTR (                            \
 701                 ATH9K_INT_FATAL |               \
 702                 ATH9K_INT_RXORN |               \
 703                 ATH9K_INT_RXEOL |               \
 704                 ATH9K_INT_RX |                  \
 705                 ATH9K_INT_RXLP |                \
 706                 ATH9K_INT_RXHP |                \
 707                 ATH9K_INT_TX |                  \
 708                 ATH9K_INT_BMISS |               \
 709                 ATH9K_INT_CST |                 \
 710                 ATH9K_INT_TSFOOR |              \
 711                 ATH9K_INT_GENTIMER)
 712
 713         struct ath_softc *sc = dev;
 714         struct ath_hw *ah = sc->sc_ah;
 715         struct ath_common *common = ath9k_hw_common(ah);
 716         enum ath9k_int status;
 717         bool sched = false;
 718
 719         /*
 720          * The hardware is not ready/present, don't
 721          * touch anything. Note this can happen early
 722          * on if the IRQ is shared.
 723          */
 724         if (sc->sc_flags & SC_OP_INVALID)
 725                 return IRQ_NONE;
 726
 727
 728         /* shared irq, not for us */
 729
 730         if (!ath9k_hw_intrpend(ah))
 731                 return IRQ_NONE;
 732
 733         /*
 734          * Figure out the reason(s) for the interrupt.  Note
 735          * that the hal returns a pseudo-ISR that may include
 736          * bits we haven't explicitly enabled so we mask the
 737          * value to insure we only process bits we requested.
 738          */
 739         ath9k_hw_getisr(ah, &status);   /* NB: clears ISR too */
 740         status &= ah->imask;    /* discard unasked-for bits */
 741
 742         /*
 743          * If there are no status bits set, then this interrupt was not
 744          * for me (should have been caught above).
 745          */
 746         if (!status)
 747                 return IRQ_NONE;
 748
 749         /* Cache the status */
 750         sc->intrstatus = status;
 751
 752         if (status & SCHED_INTR)
 753                 sched = true;
 754
 755         /*
 756          * If a FATAL or RXORN interrupt is received, we have to reset the
 757          * chip immediately.
 758          */
 759         if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) &&
 760             !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)))
 761                 goto chip_reset;
 762
 763         if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
 764             (status & ATH9K_INT_BB_WATCHDOG)) {
 765
 766                 spin_lock(&common->cc_lock);
 767                 ath_hw_cycle_counters_update(common);
 768                 ar9003_hw_bb_watchdog_dbg_info(ah);
 769                 spin_unlock(&common->cc_lock);
 770
 771                 goto chip_reset;
 772         }
 773
 774         if (status & ATH9K_INT_SWBA)
 775                 tasklet_schedule(&sc->bcon_tasklet);
 776
 777         if (status & ATH9K_INT_TXURN)
 778                 ath9k_hw_updatetxtriglevel(ah, true);
 779
 780         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
 781                 if (status & ATH9K_INT_RXEOL) {
 782                         ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
 783                         ath9k_hw_set_interrupts(ah, ah->imask);
 784                 }
 785         }
 786
 787         if (status & ATH9K_INT_MIB) {
 788                 /*
 789                  * Disable interrupts until we service the MIB
 790                  * interrupt; otherwise it will continue to
 791                  * fire.
 792                  */
 793                 ath9k_hw_disable_interrupts(ah);
 794                 /*
 795                  * Let the hal handle the event. We assume
 796                  * it will clear whatever condition caused
 797                  * the interrupt.
 798                  */
 799                 spin_lock(&common->cc_lock);
 800                 ath9k_hw_proc_mib_event(ah);
 801                 spin_unlock(&common->cc_lock);
 802                 ath9k_hw_enable_interrupts(ah);
 803         }
 804
 805         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
 806                 if (status & ATH9K_INT_TIM_TIMER) {
 807                         if (ATH_DBG_WARN_ON_ONCE(sc->ps_idle))
 808                                 goto chip_reset;
 809                         /* Clear RxAbort bit so that we can
 810                          * receive frames */
 811                         ath9k_setpower(sc, ATH9K_PM_AWAKE);
 812                         ath9k_hw_setrxabort(sc->sc_ah, 0);
 813                         sc->ps_flags |= PS_WAIT_FOR_BEACON;
 814                 }
 815
 816 chip_reset:
 817
 818         ath_debug_stat_interrupt(sc, status);
 819
 820         if (sched) {
 821                 /* turn off every interrupt */
 822                 ath9k_hw_disable_interrupts(ah);
 823                 tasklet_schedule(&sc->intr_tq);
 824         }
 825
 826         return IRQ_HANDLED;
 827
 828 #undef SCHED_INTR
 829 }
 830
 831 void ath_radio_enable(struct ath_softc *sc, struct ieee80211_hw *hw)
 832 {
 833         struct ath_hw *ah = sc->sc_ah;
 834         struct ath_common *common = ath9k_hw_common(ah);
 835         struct ieee80211_channel *channel = hw->conf.channel;
 836         int r;
 837
 838         ath9k_ps_wakeup(sc);
 839         spin_lock_bh(&sc->sc_pcu_lock);
 840
 841         ath9k_hw_configpcipowersave(ah, 0, 0);
 842
 843         if (!ah->curchan)
 844                 ah->curchan = ath9k_cmn_get_curchannel(sc->hw, ah);
 845
 846         r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
 847         if (r) {
 848                 ath_err(common,
 849                         "Unable to reset channel (%u MHz), reset status %d\n",
 850                         channel->center_freq, r);
 851         }
 852
 853         ath9k_cmn_update_txpow(ah, sc->curtxpow,
 854                                sc->config.txpowlimit, &sc->curtxpow);
 855         if (ath_startrecv(sc) != 0) {
 856                 ath_err(common, "Unable to restart recv logic\n");
 857                 goto out;
 858         }
 859         if (sc->sc_flags & SC_OP_BEACONS)
 860                 ath_set_beacon(sc);     /* restart beacons */
 861
 862         /* Re-Enable  interrupts */
 863         ath9k_hw_set_interrupts(ah, ah->imask);
 864
 865         /* Enable LED */
 866         ath9k_hw_cfg_output(ah, ah->led_pin,
 867                             AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
 868         ath9k_hw_set_gpio(ah, ah->led_pin, 0);
 869
 870         ieee80211_wake_queues(hw);
 871         ieee80211_queue_delayed_work(hw, &sc->hw_pll_work, HZ/2);
 872
 873 out:
 874         spin_unlock_bh(&sc->sc_pcu_lock);
 875
 876         ath9k_ps_restore(sc);
 877 }
 878
 879 void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw)
 880 {
 881         struct ath_hw *ah = sc->sc_ah;
 882         struct ieee80211_channel *channel = hw->conf.channel;
 883         int r;
 884
 885         ath9k_ps_wakeup(sc);
 886         cancel_delayed_work_sync(&sc->hw_pll_work);
 887
 888         spin_lock_bh(&sc->sc_pcu_lock);
 889
 890         ieee80211_stop_queues(hw);
 891
 892         /*
 893          * Keep the LED on when the radio is disabled
 894          * during idle unassociated state.
 895          */
 896         if (!sc->ps_idle) {
 897                 ath9k_hw_set_gpio(ah, ah->led_pin, 1);
 898                 ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
 899         }
 900
 901         /* Disable interrupts */
 902         ath9k_hw_disable_interrupts(ah);
 903
 904         ath_drain_all_txq(sc, false);   /* clear pending tx frames */
 905
 906         ath_stoprecv(sc);               /* turn off frame recv */
 907         ath_flushrecv(sc);              /* flush recv queue */
 908
 909         if (!ah->curchan)
 910                 ah->curchan = ath9k_cmn_get_curchannel(hw, ah);
 911
 912         r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
 913         if (r) {
 914                 ath_err(ath9k_hw_common(sc->sc_ah),
 915                         "Unable to reset channel (%u MHz), reset status %d\n",
 916                         channel->center_freq, r);
 917         }
 918
 919         ath9k_hw_phy_disable(ah);
 920
 921         ath9k_hw_configpcipowersave(ah, 1, 1);
 922
 923         spin_unlock_bh(&sc->sc_pcu_lock);
 924         ath9k_ps_restore(sc);
 925 }
 926
 927 int ath_reset(struct ath_softc *sc, bool retry_tx)
 928 {
 929         struct ath_hw *ah = sc->sc_ah;
 930         struct ath_common *common = ath9k_hw_common(ah);
 931         struct ieee80211_hw *hw = sc->hw;
 932         int r;
 933
 934         sc->hw_busy_count = 0;
 935
 936         /* Stop ANI */
 937         del_timer_sync(&common->ani.timer);
 938
 939         ath9k_ps_wakeup(sc);
 940         spin_lock_bh(&sc->sc_pcu_lock);
 941
 942         ieee80211_stop_queues(hw);
 943
 944         ath9k_hw_disable_interrupts(ah);
 945         ath_drain_all_txq(sc, retry_tx);
 946
 947         ath_stoprecv(sc);
 948         ath_flushrecv(sc);
 949
 950         r = ath9k_hw_reset(ah, sc->sc_ah->curchan, ah->caldata, false);
 951         if (r)
 952                 ath_err(common,
 953                         "Unable to reset hardware; reset status %d\n", r);
 954
 955         if (ath_startrecv(sc) != 0)
 956                 ath_err(common, "Unable to start recv logic\n");
 957
 958         /*
 959          * We may be doing a reset in response to a request
 960          * that changes the channel so update any state that
 961          * might change as a result.
 962          */
 963         ath9k_cmn_update_txpow(ah, sc->curtxpow,
 964                                sc->config.txpowlimit, &sc->curtxpow);
 965
 966         if ((sc->sc_flags & SC_OP_BEACONS) || !(sc->sc_flags & (SC_OP_OFFCHANNEL)))
 967                 ath_set_beacon(sc);     /* restart beacons */
 968
 969         ath9k_hw_set_interrupts(ah, ah->imask);
 970
 971         if (retry_tx) {
 972                 int i;
 973                 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
 974                         if (ATH_TXQ_SETUP(sc, i)) {
 975                                 spin_lock_bh(&sc->tx.txq[i].axq_lock);
 976                                 ath_txq_schedule(sc, &sc->tx.txq[i]);
 977                                 spin_unlock_bh(&sc->tx.txq[i].axq_lock);
 978                         }
 979                 }
 980         }
 981
 982         ieee80211_wake_queues(hw);
 983         spin_unlock_bh(&sc->sc_pcu_lock);
 984
 985         /* Start ANI */
 986         ath_start_ani(common);
 987         ath9k_ps_restore(sc);
 988
 989         return r;
 990 }
 991
 992 /**********************/
 993 /* mac80211 callbacks */
 994 /**********************/
 995
 996 static int ath9k_start(struct ieee80211_hw *hw)
 997 {
 998         struct ath_softc *sc = hw->priv;
 999         struct ath_hw *ah = sc->sc_ah;
1000         struct ath_common *common = ath9k_hw_common(ah);
1001         struct ieee80211_channel *curchan = hw->conf.channel;
1002         struct ath9k_channel *init_channel;
1003         int r;
1004
1005         ath_dbg(common, ATH_DBG_CONFIG,
1006                 "Starting driver with initial channel: %d MHz\n",
1007                 curchan->center_freq);
1008
1009         ath9k_ps_wakeup(sc);
1010
1011         mutex_lock(&sc->mutex);
1012
1013         /* setup initial channel */
1014         sc->chan_idx = curchan->hw_value;
1015
1016         init_channel = ath9k_cmn_get_curchannel(hw, ah);
1017
1018         /* Reset SERDES registers */
1019         ath9k_hw_configpcipowersave(ah, 0, 0);
1020
1021         /*
1022          * The basic interface to setting the hardware in a good
1023          * state is ``reset''.  On return the hardware is known to
1024          * be powered up and with interrupts disabled.  This must
1025          * be followed by initialization of the appropriate bits
1026          * and then setup of the interrupt mask.
1027          */
1028         spin_lock_bh(&sc->sc_pcu_lock);
1029         r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
1030         if (r) {
1031                 ath_err(common,
1032                         "Unable to reset hardware; reset status %d (freq %u MHz)\n",
1033                         r, curchan->center_freq);
1034                 spin_unlock_bh(&sc->sc_pcu_lock);
1035                 goto mutex_unlock;
1036         }
1037
1038         /*
1039          * This is needed only to setup initial state
1040          * but it's best done after a reset.
1041          */
1042         ath9k_cmn_update_txpow(ah, sc->curtxpow,
1043                         sc->config.txpowlimit, &sc->curtxpow);
1044
1045         /*
1046          * Setup the hardware after reset:
1047          * The receive engine is set going.
1048          * Frame transmit is handled entirely
1049          * in the frame output path; there's nothing to do
1050          * here except setup the interrupt mask.
1051          */
1052         if (ath_startrecv(sc) != 0) {
1053                 ath_err(common, "Unable to start recv logic\n");
1054                 r = -EIO;
1055                 spin_unlock_bh(&sc->sc_pcu_lock);
1056                 goto mutex_unlock;
1057         }
1058         spin_unlock_bh(&sc->sc_pcu_lock);
1059
1060         /* Setup our intr mask. */
1061         ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
1062                     ATH9K_INT_RXORN | ATH9K_INT_FATAL |
1063                     ATH9K_INT_GLOBAL;
1064
1065         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
1066                 ah->imask |= ATH9K_INT_RXHP |
1067                              ATH9K_INT_RXLP |
1068                              ATH9K_INT_BB_WATCHDOG;
1069         else
1070                 ah->imask |= ATH9K_INT_RX;
1071
1072         ah->imask |= ATH9K_INT_GTT;
1073
1074         if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
1075                 ah->imask |= ATH9K_INT_CST;
1076
1077         sc->sc_flags &= ~SC_OP_INVALID;
1078         sc->sc_ah->is_monitoring = false;
1079
1080         /* Disable BMISS interrupt when we're not associated */
1081         ah->imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
1082         ath9k_hw_set_interrupts(ah, ah->imask);
1083
1084         ieee80211_wake_queues(hw);
1085
1086         ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
1087
1088         if ((ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE) &&
1089             !ah->btcoex_hw.enabled) {
1090                 ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
1091                                            AR_STOMP_LOW_WLAN_WGHT);
1092                 ath9k_hw_btcoex_enable(ah);
1093
1094                 if (common->bus_ops->bt_coex_prep)
1095                         common->bus_ops->bt_coex_prep(common);
1096                 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1097                         ath9k_btcoex_timer_resume(sc);
1098         }
1099
1100         if (ah->caps.pcie_lcr_extsync_en && common->bus_ops->extn_synch_en)
1101                 common->bus_ops->extn_synch_en(common);
1102
1103 mutex_unlock:
1104         mutex_unlock(&sc->mutex);
1105
1106         ath9k_ps_restore(sc);
1107
1108         return r;
1109 }
1110
1111 static void ath9k_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
1112 {
1113         struct ath_softc *sc = hw->priv;
1114         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1115         struct ath_tx_control txctl;
1116         struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
1117
1118         if (sc->ps_enabled) {
1119                 /*
1120                  * mac80211 does not set PM field for normal data frames, so we
1121                  * need to update that based on the current PS mode.
1122                  */
1123                 if (ieee80211_is_data(hdr->frame_control) &&
1124                     !ieee80211_is_nullfunc(hdr->frame_control) &&
1125                     !ieee80211_has_pm(hdr->frame_control)) {
1126                         ath_dbg(common, ATH_DBG_PS,
1127                                 "Add PM=1 for a TX frame while in PS mode\n");
1128                         hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
1129                 }
1130         }
1131
1132         if (unlikely(sc->sc_ah->power_mode != ATH9K_PM_AWAKE)) {
1133                 /*
1134                  * We are using PS-Poll and mac80211 can request TX while in
1135                  * power save mode. Need to wake up hardware for the TX to be
1136                  * completed and if needed, also for RX of buffered frames.
1137                  */
1138                 ath9k_ps_wakeup(sc);
1139                 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
1140                         ath9k_hw_setrxabort(sc->sc_ah, 0);
1141                 if (ieee80211_is_pspoll(hdr->frame_control)) {
1142                         ath_dbg(common, ATH_DBG_PS,
1143                                 "Sending PS-Poll to pick a buffered frame\n");
1144                         sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
1145                 } else {
1146                         ath_dbg(common, ATH_DBG_PS,
1147                                 "Wake up to complete TX\n");
1148                         sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
1149                 }
1150                 /*
1151                  * The actual restore operation will happen only after
1152                  * the sc_flags bit is cleared. We are just dropping
1153                  * the ps_usecount here.
1154                  */
1155                 ath9k_ps_restore(sc);
1156         }
1157
1158         memset(&txctl, 0, sizeof(struct ath_tx_control));
1159         txctl.txq = sc->tx.txq_map[skb_get_queue_mapping(skb)];
1160
1161         ath_dbg(common, ATH_DBG_XMIT, "transmitting packet, skb: %p\n", skb);
1162
1163         if (ath_tx_start(hw, skb, &txctl) != 0) {
1164                 ath_dbg(common, ATH_DBG_XMIT, "TX failed\n");
1165                 goto exit;
1166         }
1167
1168         return;
1169 exit:
1170         dev_kfree_skb_any(skb);
1171 }
1172
1173 static void ath9k_stop(struct ieee80211_hw *hw)
1174 {
1175         struct ath_softc *sc = hw->priv;
1176         struct ath_hw *ah = sc->sc_ah;
1177         struct ath_common *common = ath9k_hw_common(ah);
1178
1179         mutex_lock(&sc->mutex);
1180
1181         cancel_delayed_work_sync(&sc->tx_complete_work);
1182         cancel_delayed_work_sync(&sc->hw_pll_work);
1183         cancel_work_sync(&sc->paprd_work);
1184         cancel_work_sync(&sc->hw_check_work);
1185
1186         if (sc->sc_flags & SC_OP_INVALID) {
1187                 ath_dbg(common, ATH_DBG_ANY, "Device not present\n");
1188                 mutex_unlock(&sc->mutex);
1189                 return;
1190         }
1191
1192         /* Ensure HW is awake when we try to shut it down. */
1193         ath9k_ps_wakeup(sc);
1194
1195         if (ah->btcoex_hw.enabled) {
1196                 ath9k_hw_btcoex_disable(ah);
1197                 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1198                         ath9k_btcoex_timer_pause(sc);
1199         }
1200
1201         spin_lock_bh(&sc->sc_pcu_lock);
1202
1203         /* prevent tasklets to enable interrupts once we disable them */
1204         ah->imask &= ~ATH9K_INT_GLOBAL;
1205
1206         /* make sure h/w will not generate any interrupt
1207          * before setting the invalid flag. */
1208         ath9k_hw_disable_interrupts(ah);
1209
1210         if (!(sc->sc_flags & SC_OP_INVALID)) {
1211                 ath_drain_all_txq(sc, false);
1212                 ath_stoprecv(sc);
1213                 ath9k_hw_phy_disable(ah);
1214         } else
1215                 sc->rx.rxlink = NULL;
1216
1217         if (sc->rx.frag) {
1218                 dev_kfree_skb_any(sc->rx.frag);
1219                 sc->rx.frag = NULL;
1220         }
1221
1222         /* disable HAL and put h/w to sleep */
1223         ath9k_hw_disable(ah);
1224         ath9k_hw_configpcipowersave(ah, 1, 1);
1225
1226         spin_unlock_bh(&sc->sc_pcu_lock);
1227
1228         /* we can now sync irq and kill any running tasklets, since we already
1229          * disabled interrupts and not holding a spin lock */
1230         synchronize_irq(sc->irq);
1231         tasklet_kill(&sc->intr_tq);
1232         tasklet_kill(&sc->bcon_tasklet);
1233
1234         ath9k_ps_restore(sc);
1235
1236         sc->ps_idle = true;
1237         ath_radio_disable(sc, hw);
1238
1239         sc->sc_flags |= SC_OP_INVALID;
1240
1241         mutex_unlock(&sc->mutex);
1242
1243         ath_dbg(common, ATH_DBG_CONFIG, "Driver halt\n");
1244 }
1245
1246 bool ath9k_uses_beacons(int type)
1247 {
1248         switch (type) {
1249         case NL80211_IFTYPE_AP:
1250         case NL80211_IFTYPE_ADHOC:
1251         case NL80211_IFTYPE_MESH_POINT:
1252                 return true;
1253         default:
1254                 return false;
1255         }
1256 }
1257
1258 static void ath9k_reclaim_beacon(struct ath_softc *sc,
1259                                  struct ieee80211_vif *vif)
1260 {
1261         struct ath_vif *avp = (void *)vif->drv_priv;
1262
1263         ath9k_set_beaconing_status(sc, false);
1264         ath_beacon_return(sc, avp);
1265         ath9k_set_beaconing_status(sc, true);
1266         sc->sc_flags &= ~SC_OP_BEACONS;
1267 }
1268
1269 static void ath9k_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
1270 {
1271         struct ath9k_vif_iter_data *iter_data = data;
1272         int i;
1273
1274         if (iter_data->hw_macaddr)
1275                 for (i = 0; i < ETH_ALEN; i++)
1276                         iter_data->mask[i] &=
1277                                 ~(iter_data->hw_macaddr[i] ^ mac[i]);
1278
1279         switch (vif->type) {
1280         case NL80211_IFTYPE_AP:
1281                 iter_data->naps++;
1282                 break;
1283         case NL80211_IFTYPE_STATION:
1284                 iter_data->nstations++;
1285                 break;
1286         case NL80211_IFTYPE_ADHOC:
1287                 iter_data->nadhocs++;
1288                 break;
1289         case NL80211_IFTYPE_MESH_POINT:
1290                 iter_data->nmeshes++;
1291                 break;
1292         case NL80211_IFTYPE_WDS:
1293                 iter_data->nwds++;
1294                 break;
1295         default:
1296                 iter_data->nothers++;
1297                 break;
1298         }
1299 }
1300
1301 /* Called with sc->mutex held. */
1302 void ath9k_calculate_iter_data(struct ieee80211_hw *hw,
1303                                struct ieee80211_vif *vif,
1304                                struct ath9k_vif_iter_data *iter_data)
1305 {
1306         struct ath_softc *sc = hw->priv;
1307         struct ath_hw *ah = sc->sc_ah;
1308         struct ath_common *common = ath9k_hw_common(ah);
1309
1310         /*
1311          * Use the hardware MAC address as reference, the hardware uses it
1312          * together with the BSSID mask when matching addresses.
1313          */
1314         memset(iter_data, 0, sizeof(*iter_data));
1315         iter_data->hw_macaddr = common->macaddr;
1316         memset(&iter_data->mask, 0xff, ETH_ALEN);
1317
1318         if (vif)
1319                 ath9k_vif_iter(iter_data, vif->addr, vif);
1320
1321         /* Get list of all active MAC addresses */
1322         ieee80211_iterate_active_interfaces_atomic(sc->hw, ath9k_vif_iter,
1323                                                    iter_data);
1324 }
1325
1326 /* Called with sc->mutex held. */
1327 static void ath9k_calculate_summary_state(struct ieee80211_hw *hw,
1328                                           struct ieee80211_vif *vif)
1329 {
1330         struct ath_softc *sc = hw->priv;
1331         struct ath_hw *ah = sc->sc_ah;
1332         struct ath_common *common = ath9k_hw_common(ah);
1333         struct ath9k_vif_iter_data iter_data;
1334
1335         ath9k_calculate_iter_data(hw, vif, &iter_data);
1336
1337         ath9k_ps_wakeup(sc);
1338         /* Set BSSID mask. */
1339         memcpy(common->bssidmask, iter_data.mask, ETH_ALEN);
1340         ath_hw_setbssidmask(common);
1341
1342         /* Set op-mode & TSF */
1343         if (iter_data.naps > 0) {
1344                 ath9k_hw_set_tsfadjust(ah, 1);
1345                 sc->sc_flags |= SC_OP_TSF_RESET;
1346                 ah->opmode = NL80211_IFTYPE_AP;
1347         } else {
1348                 ath9k_hw_set_tsfadjust(ah, 0);
1349                 sc->sc_flags &= ~SC_OP_TSF_RESET;
1350
1351                 if (iter_data.nwds + iter_data.nmeshes)
1352                         ah->opmode = NL80211_IFTYPE_AP;
1353                 else if (iter_data.nadhocs)
1354                         ah->opmode = NL80211_IFTYPE_ADHOC;
1355                 else
1356                         ah->opmode = NL80211_IFTYPE_STATION;
1357         }
1358
1359         /*
1360          * Enable MIB interrupts when there are hardware phy counters.
1361          */
1362         if ((iter_data.nstations + iter_data.nadhocs + iter_data.nmeshes) > 0) {
1363                 if (ah->config.enable_ani)
1364                         ah->imask |= ATH9K_INT_MIB;
1365                 ah->imask |= ATH9K_INT_TSFOOR;
1366         } else {
1367                 ah->imask &= ~ATH9K_INT_MIB;
1368                 ah->imask &= ~ATH9K_INT_TSFOOR;
1369         }
1370
1371         ath9k_hw_set_interrupts(ah, ah->imask);
1372         ath9k_ps_restore(sc);
1373
1374         /* Set up ANI */
1375         if ((iter_data.naps + iter_data.nadhocs) > 0) {
1376                 sc->sc_flags |= SC_OP_ANI_RUN;
1377                 ath_start_ani(common);
1378         } else {
1379                 sc->sc_flags &= ~SC_OP_ANI_RUN;
1380                 del_timer_sync(&common->ani.timer);
1381         }
1382 }
1383
1384 /* Called with sc->mutex held, vif counts set up properly. */
1385 static void ath9k_do_vif_add_setup(struct ieee80211_hw *hw,
1386                                    struct ieee80211_vif *vif)
1387 {
1388         struct ath_softc *sc = hw->priv;
1389
1390         ath9k_calculate_summary_state(hw, vif);
1391
1392         if (ath9k_uses_beacons(vif->type)) {
1393                 int error;
1394                 /* This may fail because upper levels do not have beacons
1395                  * properly configured yet.  That's OK, we assume it
1396                  * will be properly configured and then we will be notified
1397                  * in the info_changed method and set up beacons properly
1398                  * there.
1399                  */
1400                 ath9k_set_beaconing_status(sc, false);
1401                 error = ath_beacon_alloc(sc, vif);
1402                 if (!error)
1403                         ath_beacon_config(sc, vif);
1404                 ath9k_set_beaconing_status(sc, true);
1405         }
1406 }
1407
1408
1409 static int ath9k_add_interface(struct ieee80211_hw *hw,
1410                                struct ieee80211_vif *vif)
1411 {
1412         struct ath_softc *sc = hw->priv;
1413         struct ath_hw *ah = sc->sc_ah;
1414         struct ath_common *common = ath9k_hw_common(ah);
1415         int ret = 0;
1416
1417         mutex_lock(&sc->mutex);
1418
1419         switch (vif->type) {
1420         case NL80211_IFTYPE_STATION:
1421         case NL80211_IFTYPE_WDS:
1422         case NL80211_IFTYPE_ADHOC:
1423         case NL80211_IFTYPE_AP:
1424         case NL80211_IFTYPE_MESH_POINT:
1425                 break;
1426         default:
1427                 ath_err(common, "Interface type %d not yet supported\n",
1428                         vif->type);
1429                 ret = -EOPNOTSUPP;
1430                 goto out;
1431         }
1432
1433         if (ath9k_uses_beacons(vif->type)) {
1434                 if (sc->nbcnvifs >= ATH_BCBUF) {
1435                         ath_err(common, "Not enough beacon buffers when adding"
1436                                 " new interface of type: %i\n",
1437                                 vif->type);
1438                         ret = -ENOBUFS;
1439                         goto out;
1440                 }
1441         }
1442
1443         if ((ah->opmode == NL80211_IFTYPE_ADHOC) ||
1444             ((vif->type == NL80211_IFTYPE_ADHOC) &&
1445              sc->nvifs > 0)) {
1446                 ath_err(common, "Cannot create ADHOC interface when other"
1447                         " interfaces already exist.\n");
1448                 ret = -EINVAL;
1449                 goto out;
1450         }
1451
1452         ath_dbg(common, ATH_DBG_CONFIG,
1453                 "Attach a VIF of type: %d\n", vif->type);
1454
1455         sc->nvifs++;
1456
1457         ath9k_do_vif_add_setup(hw, vif);
1458 out:
1459         mutex_unlock(&sc->mutex);
1460         return ret;
1461 }
1462
1463 static int ath9k_change_interface(struct ieee80211_hw *hw,
1464                                   struct ieee80211_vif *vif,
1465                                   enum nl80211_iftype new_type,
1466                                   bool p2p)
1467 {
1468         struct ath_softc *sc = hw->priv;
1469         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1470         int ret = 0;
1471
1472         ath_dbg(common, ATH_DBG_CONFIG, "Change Interface\n");
1473         mutex_lock(&sc->mutex);
1474
1475         /* See if new interface type is valid. */
1476         if ((new_type == NL80211_IFTYPE_ADHOC) &&
1477             (sc->nvifs > 1)) {
1478                 ath_err(common, "When using ADHOC, it must be the only"
1479                         " interface.\n");
1480                 ret = -EINVAL;
1481                 goto out;
1482         }
1483
1484         if (ath9k_uses_beacons(new_type) &&
1485             !ath9k_uses_beacons(vif->type)) {
1486                 if (sc->nbcnvifs >= ATH_BCBUF) {
1487                         ath_err(common, "No beacon slot available\n");
1488                         ret = -ENOBUFS;
1489                         goto out;
1490                 }
1491         }
1492
1493         /* Clean up old vif stuff */
1494         if (ath9k_uses_beacons(vif->type))
1495                 ath9k_reclaim_beacon(sc, vif);
1496
1497         /* Add new settings */
1498         vif->type = new_type;
1499         vif->p2p = p2p;
1500
1501         ath9k_do_vif_add_setup(hw, vif);
1502 out:
1503         mutex_unlock(&sc->mutex);
1504         return ret;
1505 }
1506
1507 static void ath9k_remove_interface(struct ieee80211_hw *hw,
1508                                    struct ieee80211_vif *vif)
1509 {
1510         struct ath_softc *sc = hw->priv;
1511         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1512
1513         ath_dbg(common, ATH_DBG_CONFIG, "Detach Interface\n");
1514
1515         mutex_lock(&sc->mutex);
1516
1517         sc->nvifs--;
1518
1519         /* Reclaim beacon resources */
1520         if (ath9k_uses_beacons(vif->type))
1521                 ath9k_reclaim_beacon(sc, vif);
1522
1523         ath9k_calculate_summary_state(hw, NULL);
1524
1525         mutex_unlock(&sc->mutex);
1526 }
1527
1528 static void ath9k_enable_ps(struct ath_softc *sc)
1529 {
1530         struct ath_hw *ah = sc->sc_ah;
1531
1532         sc->ps_enabled = true;
1533         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1534                 if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
1535                         ah->imask |= ATH9K_INT_TIM_TIMER;
1536                         ath9k_hw_set_interrupts(ah, ah->imask);
1537                 }
1538                 ath9k_hw_setrxabort(ah, 1);
1539         }
1540 }
1541
1542 static void ath9k_disable_ps(struct ath_softc *sc)
1543 {
1544         struct ath_hw *ah = sc->sc_ah;
1545
1546         sc->ps_enabled = false;
1547         ath9k_hw_setpower(ah, ATH9K_PM_AWAKE);
1548         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1549                 ath9k_hw_setrxabort(ah, 0);
1550                 sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
1551                                   PS_WAIT_FOR_CAB |
1552                                   PS_WAIT_FOR_PSPOLL_DATA |
1553                                   PS_WAIT_FOR_TX_ACK);
1554                 if (ah->imask & ATH9K_INT_TIM_TIMER) {
1555                         ah->imask &= ~ATH9K_INT_TIM_TIMER;
1556                         ath9k_hw_set_interrupts(ah, ah->imask);
1557                 }
1558         }
1559
1560 }
1561
1562 static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1563 {
1564         struct ath_softc *sc = hw->priv;
1565         struct ath_hw *ah = sc->sc_ah;
1566         struct ath_common *common = ath9k_hw_common(ah);
1567         struct ieee80211_conf *conf = &hw->conf;
1568         bool disable_radio = false;
1569
1570         mutex_lock(&sc->mutex);
1571
1572         /*
1573          * Leave this as the first check because we need to turn on the
1574          * radio if it was disabled before prior to processing the rest
1575          * of the changes. Likewise we must only disable the radio towards
1576          * the end.
1577          */
1578         if (changed & IEEE80211_CONF_CHANGE_IDLE) {
1579                 sc->ps_idle = !!(conf->flags & IEEE80211_CONF_IDLE);
1580                 if (!sc->ps_idle) {
1581                         ath_radio_enable(sc, hw);
1582                         ath_dbg(common, ATH_DBG_CONFIG,
1583                                 "not-idle: enabling radio\n");
1584                 } else {
1585                         disable_radio = true;
1586                 }
1587         }
1588
1589         /*
1590          * We just prepare to enable PS. We have to wait until our AP has
1591          * ACK'd our null data frame to disable RX otherwise we'll ignore
1592          * those ACKs and end up retransmitting the same null data frames.
1593          * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
1594          */
1595         if (changed & IEEE80211_CONF_CHANGE_PS) {
1596                 unsigned long flags;
1597                 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1598                 if (conf->flags & IEEE80211_CONF_PS)
1599                         ath9k_enable_ps(sc);
1600                 else
1601                         ath9k_disable_ps(sc);
1602                 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1603         }
1604
1605         if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
1606                 if (conf->flags & IEEE80211_CONF_MONITOR) {
1607                         ath_dbg(common, ATH_DBG_CONFIG,
1608                                 "Monitor mode is enabled\n");
1609                         sc->sc_ah->is_monitoring = true;
1610                 } else {
1611                         ath_dbg(common, ATH_DBG_CONFIG,
1612                                 "Monitor mode is disabled\n");
1613                         sc->sc_ah->is_monitoring = false;
1614                 }
1615         }
1616
1617         if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
1618                 struct ieee80211_channel *curchan = hw->conf.channel;
1619                 int pos = curchan->hw_value;
1620                 int old_pos = -1;
1621                 unsigned long flags;
1622
1623                 if (ah->curchan)
1624                         old_pos = ah->curchan - &ah->channels[0];
1625
1626                 if (hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)
1627                         sc->sc_flags |= SC_OP_OFFCHANNEL;
1628                 else
1629                         sc->sc_flags &= ~SC_OP_OFFCHANNEL;
1630
1631                 ath_dbg(common, ATH_DBG_CONFIG,
1632                         "Set channel: %d MHz type: %d\n",
1633                         curchan->center_freq, conf->channel_type);
1634
1635                 ath9k_cmn_update_ichannel(&sc->sc_ah->channels[pos],
1636                                           curchan, conf->channel_type);
1637
1638                 /* update survey stats for the old channel before switching */
1639                 spin_lock_irqsave(&common->cc_lock, flags);
1640                 ath_update_survey_stats(sc);
1641                 spin_unlock_irqrestore(&common->cc_lock, flags);
1642
1643                 /*
1644                  * If the operating channel changes, change the survey in-use flags
1645                  * along with it.
1646                  * Reset the survey data for the new channel, unless we're switching
1647                  * back to the operating channel from an off-channel operation.
1648                  */
1649                 if (!(hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) &&
1650                     sc->cur_survey != &sc->survey[pos]) {
1651
1652                         if (sc->cur_survey)
1653                                 sc->cur_survey->filled &= ~SURVEY_INFO_IN_USE;
1654
1655                         sc->cur_survey = &sc->survey[pos];
1656
1657                         memset(sc->cur_survey, 0, sizeof(struct survey_info));
1658                         sc->cur_survey->filled |= SURVEY_INFO_IN_USE;
1659                 } else if (!(sc->survey[pos].filled & SURVEY_INFO_IN_USE)) {
1660                         memset(&sc->survey[pos], 0, sizeof(struct survey_info));
1661                 }
1662
1663                 if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) {
1664                         ath_err(common, "Unable to set channel\n");
1665                         mutex_unlock(&sc->mutex);
1666                         return -EINVAL;
1667                 }
1668
1669                 /*
1670                  * The most recent snapshot of channel->noisefloor for the old
1671                  * channel is only available after the hardware reset. Copy it to
1672                  * the survey stats now.
1673                  */
1674                 if (old_pos >= 0)
1675                         ath_update_survey_nf(sc, old_pos);
1676         }
1677
1678         if (changed & IEEE80211_CONF_CHANGE_POWER) {
1679                 ath_dbg(common, ATH_DBG_CONFIG,
1680                         "Set power: %d\n", conf->power_level);
1681                 sc->config.txpowlimit = 2 * conf->power_level;
1682                 ath9k_ps_wakeup(sc);
1683                 ath9k_cmn_update_txpow(ah, sc->curtxpow,
1684                                        sc->config.txpowlimit, &sc->curtxpow);
1685                 ath9k_ps_restore(sc);
1686         }
1687
1688         if (disable_radio) {
1689                 ath_dbg(common, ATH_DBG_CONFIG, "idle: disabling radio\n");
1690                 ath_radio_disable(sc, hw);
1691         }
1692
1693         mutex_unlock(&sc->mutex);
1694
1695         return 0;
1696 }
1697
1698 #define SUPPORTED_FILTERS                       \
1699         (FIF_PROMISC_IN_BSS |                   \
1700         FIF_ALLMULTI |                          \
1701         FIF_CONTROL |                           \
1702         FIF_PSPOLL |                            \
1703         FIF_OTHER_BSS |                         \
1704         FIF_BCN_PRBRESP_PROMISC |               \
1705         FIF_PROBE_REQ |                         \
1706         FIF_FCSFAIL)
1707
1708 /* FIXME: sc->sc_full_reset ? */
1709 static void ath9k_configure_filter(struct ieee80211_hw *hw,
1710                                    unsigned int changed_flags,
1711                                    unsigned int *total_flags,
1712                                    u64 multicast)
1713 {
1714         struct ath_softc *sc = hw->priv;
1715         u32 rfilt;
1716
1717         changed_flags &= SUPPORTED_FILTERS;
1718         *total_flags &= SUPPORTED_FILTERS;
1719
1720         sc->rx.rxfilter = *total_flags;
1721         ath9k_ps_wakeup(sc);
1722         rfilt = ath_calcrxfilter(sc);
1723         ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1724         ath9k_ps_restore(sc);
1725
1726         ath_dbg(ath9k_hw_common(sc->sc_ah), ATH_DBG_CONFIG,
1727                 "Set HW RX filter: 0x%x\n", rfilt);
1728 }
1729
1730 static int ath9k_sta_add(struct ieee80211_hw *hw,
1731                          struct ieee80211_vif *vif,
1732                          struct ieee80211_sta *sta)
1733 {
1734         struct ath_softc *sc = hw->priv;
1735
1736         ath_node_attach(sc, sta);
1737
1738         return 0;
1739 }
1740
1741 static int ath9k_sta_remove(struct ieee80211_hw *hw,
1742                             struct ieee80211_vif *vif,
1743                             struct ieee80211_sta *sta)
1744 {
1745         struct ath_softc *sc = hw->priv;
1746
1747         ath_node_detach(sc, sta);
1748
1749         return 0;
1750 }
1751
1752 static void ath9k_sta_notify(struct ieee80211_hw *hw,
1753                          struct ieee80211_vif *vif,
1754                          enum sta_notify_cmd cmd,
1755                          struct ieee80211_sta *sta)
1756 {
1757         struct ath_softc *sc = hw->priv;
1758         struct ath_node *an = (struct ath_node *) sta->drv_priv;
1759
1760         switch (cmd) {
1761         case STA_NOTIFY_SLEEP:
1762                 an->sleeping = true;
1763                 if (ath_tx_aggr_sleep(sc, an))
1764                         ieee80211_sta_set_tim(sta);
1765                 break;
1766         case STA_NOTIFY_AWAKE:
1767                 an->sleeping = false;
1768                 ath_tx_aggr_wakeup(sc, an);
1769                 break;
1770         }
1771 }
1772
1773 static int ath9k_conf_tx(struct ieee80211_hw *hw, u16 queue,
1774                          const struct ieee80211_tx_queue_params *params)
1775 {
1776         struct ath_softc *sc = hw->priv;
1777         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1778         struct ath_txq *txq;
1779         struct ath9k_tx_queue_info qi;
1780         int ret = 0;
1781
1782         if (queue >= WME_NUM_AC)
1783                 return 0;
1784
1785         txq = sc->tx.txq_map[queue];
1786
1787         mutex_lock(&sc->mutex);
1788
1789         memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
1790
1791         qi.tqi_aifs = params->aifs;
1792         qi.tqi_cwmin = params->cw_min;
1793         qi.tqi_cwmax = params->cw_max;
1794         qi.tqi_burstTime = params->txop;
1795
1796         ath_dbg(common, ATH_DBG_CONFIG,
1797                 "Configure tx [queue/halq] [%d/%d], aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1798                 queue, txq->axq_qnum, params->aifs, params->cw_min,
1799                 params->cw_max, params->txop);
1800
1801         ret = ath_txq_update(sc, txq->axq_qnum, &qi);
1802         if (ret)
1803                 ath_err(common, "TXQ Update failed\n");
1804
1805         if (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC)
1806                 if (queue == WME_AC_BE && !ret)
1807                         ath_beaconq_config(sc);
1808
1809         mutex_unlock(&sc->mutex);
1810
1811         return ret;
1812 }
1813
1814 static int ath9k_set_key(struct ieee80211_hw *hw,
1815                          enum set_key_cmd cmd,
1816                          struct ieee80211_vif *vif,
1817                          struct ieee80211_sta *sta,
1818                          struct ieee80211_key_conf *key)
1819 {
1820         struct ath_softc *sc = hw->priv;
1821         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1822         int ret = 0;
1823
1824         if (ath9k_modparam_nohwcrypt)
1825                 return -ENOSPC;
1826
1827         if (vif->type == NL80211_IFTYPE_ADHOC &&
1828             (key->cipher == WLAN_CIPHER_SUITE_TKIP ||
1829              key->cipher == WLAN_CIPHER_SUITE_CCMP) &&
1830             !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE)) {
1831                 /*
1832                  * For now, disable hw crypto for the RSN IBSS group keys. This
1833                  * could be optimized in the future to use a modified key cache
1834                  * design to support per-STA RX GTK, but until that gets
1835                  * implemented, use of software crypto for group addressed
1836                  * frames is a acceptable to allow RSN IBSS to be used.
1837                  */
1838                 return -EOPNOTSUPP;
1839         }
1840
1841         mutex_lock(&sc->mutex);
1842         ath9k_ps_wakeup(sc);
1843         ath_dbg(common, ATH_DBG_CONFIG, "Set HW Key\n");
1844
1845         switch (cmd) {
1846         case SET_KEY:
1847                 ret = ath_key_config(common, vif, sta, key);
1848                 if (ret >= 0) {
1849                         key->hw_key_idx = ret;
1850                         /* push IV and Michael MIC generation to stack */
1851                         key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1852                         if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
1853                                 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1854                         if (sc->sc_ah->sw_mgmt_crypto &&
1855                             key->cipher == WLAN_CIPHER_SUITE_CCMP)
1856                                 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT;
1857                         ret = 0;
1858                 }
1859                 break;
1860         case DISABLE_KEY:
1861                 ath_key_delete(common, key);
1862                 break;
1863         default:
1864                 ret = -EINVAL;
1865         }
1866
1867         ath9k_ps_restore(sc);
1868         mutex_unlock(&sc->mutex);
1869
1870         return ret;
1871 }
1872 static void ath9k_bss_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
1873 {
1874         struct ath_softc *sc = data;
1875         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1876         struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
1877         struct ath_vif *avp = (void *)vif->drv_priv;
1878
1879         switch (sc->sc_ah->opmode) {
1880         case NL80211_IFTYPE_ADHOC:
1881                 /* There can be only one vif available */
1882                 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1883                 common->curaid = bss_conf->aid;
1884                 ath9k_hw_write_associd(sc->sc_ah);
1885                 /* configure beacon */
1886                 if (bss_conf->enable_beacon)
1887                         ath_beacon_config(sc, vif);
1888                 break;
1889         case NL80211_IFTYPE_STATION:
1890                 /*
1891                  * Skip iteration if primary station vif's bss info
1892                  * was not changed
1893                  */
1894                 if (sc->sc_flags & SC_OP_PRIM_STA_VIF)
1895                         break;
1896
1897                 if (bss_conf->assoc) {
1898                         sc->sc_flags |= SC_OP_PRIM_STA_VIF;
1899                         avp->primary_sta_vif = true;
1900                         memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1901                         common->curaid = bss_conf->aid;
1902                         ath9k_hw_write_associd(sc->sc_ah);
1903                         ath_dbg(common, ATH_DBG_CONFIG,
1904                                 "Bss Info ASSOC %d, bssid: %pM\n",
1905                                 bss_conf->aid, common->curbssid);
1906                         ath_beacon_config(sc, vif);
1907                         /* Reset rssi stats */
1908                         sc->last_rssi = ATH_RSSI_DUMMY_MARKER;
1909                         sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
1910
1911                         sc->sc_flags |= SC_OP_ANI_RUN;
1912                         ath_start_ani(common);
1913                 }
1914                 break;
1915         default:
1916                 break;
1917         }
1918 }
1919
1920 static void ath9k_config_bss(struct ath_softc *sc, struct ieee80211_vif *vif)
1921 {
1922         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1923         struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
1924         struct ath_vif *avp = (void *)vif->drv_priv;
1925
1926         /* Reconfigure bss info */
1927         if (avp->primary_sta_vif && !bss_conf->assoc) {
1928                 ath_dbg(common, ATH_DBG_CONFIG,
1929                         "Bss Info DISASSOC %d, bssid %pM\n",
1930                         common->curaid, common->curbssid);
1931                 sc->sc_flags &= ~(SC_OP_PRIM_STA_VIF | SC_OP_BEACONS);
1932                 avp->primary_sta_vif = false;
1933                 memset(common->curbssid, 0, ETH_ALEN);
1934                 common->curaid = 0;
1935         }
1936
1937         ieee80211_iterate_active_interfaces_atomic(
1938                         sc->hw, ath9k_bss_iter, sc);
1939
1940         /*
1941          * None of station vifs are associated.
1942          * Clear bssid & aid
1943          */
1944         if ((sc->sc_ah->opmode == NL80211_IFTYPE_STATION) &&
1945             !(sc->sc_flags & SC_OP_PRIM_STA_VIF)) {
1946                 ath9k_hw_write_associd(sc->sc_ah);
1947                 /* Stop ANI */
1948                 sc->sc_flags &= ~SC_OP_ANI_RUN;
1949                 del_timer_sync(&common->ani.timer);
1950         }
1951 }
1952
1953 static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
1954                                    struct ieee80211_vif *vif,
1955                                    struct ieee80211_bss_conf *bss_conf,
1956                                    u32 changed)
1957 {
1958         struct ath_softc *sc = hw->priv;
1959         struct ath_hw *ah = sc->sc_ah;
1960         struct ath_common *common = ath9k_hw_common(ah);
1961         struct ath_vif *avp = (void *)vif->drv_priv;
1962         int slottime;
1963         int error;
1964
1965         mutex_lock(&sc->mutex);
1966
1967         if (changed & BSS_CHANGED_BSSID) {
1968                 ath9k_config_bss(sc, vif);
1969
1970                 /* Set aggregation protection mode parameters */
1971                 sc->config.ath_aggr_prot = 0;
1972
1973                 ath_dbg(common, ATH_DBG_CONFIG, "BSSID: %pM aid: 0x%x\n",
1974                         common->curbssid, common->curaid);
1975         }
1976
1977         /* Enable transmission of beacons (AP, IBSS, MESH) */
1978         if ((changed & BSS_CHANGED_BEACON) ||
1979             ((changed & BSS_CHANGED_BEACON_ENABLED) && bss_conf->enable_beacon)) {
1980                 ath9k_set_beaconing_status(sc, false);
1981                 error = ath_beacon_alloc(sc, vif);
1982                 if (!error)
1983                         ath_beacon_config(sc, vif);
1984                 ath9k_set_beaconing_status(sc, true);
1985         }
1986
1987         if (changed & BSS_CHANGED_ERP_SLOT) {
1988                 if (bss_conf->use_short_slot)
1989                         slottime = 9;
1990                 else
1991                         slottime = 20;
1992                 if (vif->type == NL80211_IFTYPE_AP) {
1993                         /*
1994                          * Defer update, so that connected stations can adjust
1995                          * their settings at the same time.
1996                          * See beacon.c for more details
1997                          */
1998                         sc->beacon.slottime = slottime;
1999                         sc->beacon.updateslot = UPDATE;
2000                 } else {
2001                         ah->slottime = slottime;
2002                         ath9k_hw_init_global_settings(ah);
2003                 }
2004         }
2005
2006         /* Disable transmission of beacons */
2007         if ((changed & BSS_CHANGED_BEACON_ENABLED) &&
2008             !bss_conf->enable_beacon) {
2009                 ath9k_set_beaconing_status(sc, false);
2010                 avp->is_bslot_active = false;
2011                 ath9k_set_beaconing_status(sc, true);
2012         }
2013
2014         if (changed & BSS_CHANGED_BEACON_INT) {
2015                 /*
2016                  * In case of AP mode, the HW TSF has to be reset
2017                  * when the beacon interval changes.
2018                  */
2019                 if (vif->type == NL80211_IFTYPE_AP) {
2020                         sc->sc_flags |= SC_OP_TSF_RESET;
2021                         ath9k_set_beaconing_status(sc, false);
2022                         error = ath_beacon_alloc(sc, vif);
2023                         if (!error)
2024                                 ath_beacon_config(sc, vif);
2025                         ath9k_set_beaconing_status(sc, true);
2026                 } else
2027                         ath_beacon_config(sc, vif);
2028         }
2029
2030         if (changed & BSS_CHANGED_ERP_PREAMBLE) {
2031                 ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed PREAMBLE %d\n",
2032                         bss_conf->use_short_preamble);
2033                 if (bss_conf->use_short_preamble)
2034                         sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
2035                 else
2036                         sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
2037         }
2038
2039         if (changed & BSS_CHANGED_ERP_CTS_PROT) {
2040                 ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed CTS PROT %d\n",
2041                         bss_conf->use_cts_prot);
2042                 if (bss_conf->use_cts_prot &&
2043                     hw->conf.channel->band != IEEE80211_BAND_5GHZ)
2044                         sc->sc_flags |= SC_OP_PROTECT_ENABLE;
2045                 else
2046                         sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
2047         }
2048
2049         mutex_unlock(&sc->mutex);
2050 }
2051
2052 static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
2053 {
2054         struct ath_softc *sc = hw->priv;
2055         u64 tsf;
2056
2057         mutex_lock(&sc->mutex);
2058         ath9k_ps_wakeup(sc);
2059         tsf = ath9k_hw_gettsf64(sc->sc_ah);
2060         ath9k_ps_restore(sc);
2061         mutex_unlock(&sc->mutex);
2062
2063         return tsf;
2064 }
2065
2066 static void ath9k_set_tsf(struct ieee80211_hw *hw, u64 tsf)
2067 {
2068         struct ath_softc *sc = hw->priv;
2069
2070         mutex_lock(&sc->mutex);
2071         ath9k_ps_wakeup(sc);
2072         ath9k_hw_settsf64(sc->sc_ah, tsf);
2073         ath9k_ps_restore(sc);
2074         mutex_unlock(&sc->mutex);
2075 }
2076
2077 static void ath9k_reset_tsf(struct ieee80211_hw *hw)
2078 {
2079         struct ath_softc *sc = hw->priv;
2080
2081         mutex_lock(&sc->mutex);
2082
2083         ath9k_ps_wakeup(sc);
2084         ath9k_hw_reset_tsf(sc->sc_ah);
2085         ath9k_ps_restore(sc);
2086
2087         mutex_unlock(&sc->mutex);
2088 }
2089
2090 static int ath9k_ampdu_action(struct ieee80211_hw *hw,
2091                               struct ieee80211_vif *vif,
2092                               enum ieee80211_ampdu_mlme_action action,
2093                               struct ieee80211_sta *sta,
2094                               u16 tid, u16 *ssn, u8 buf_size)
2095 {
2096         struct ath_softc *sc = hw->priv;
2097         int ret = 0;
2098
2099         local_bh_disable();
2100
2101         switch (action) {
2102         case IEEE80211_AMPDU_RX_START:
2103                 if (!(sc->sc_flags & SC_OP_RXAGGR))
2104                         ret = -ENOTSUPP;
2105                 break;
2106         case IEEE80211_AMPDU_RX_STOP:
2107                 break;
2108         case IEEE80211_AMPDU_TX_START:
2109                 if (!(sc->sc_flags & SC_OP_TXAGGR))
2110                         return -EOPNOTSUPP;
2111
2112                 ath9k_ps_wakeup(sc);
2113                 ret = ath_tx_aggr_start(sc, sta, tid, ssn);
2114                 if (!ret)
2115                         ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2116                 ath9k_ps_restore(sc);
2117                 break;
2118         case IEEE80211_AMPDU_TX_STOP:
2119                 ath9k_ps_wakeup(sc);
2120                 ath_tx_aggr_stop(sc, sta, tid);
2121                 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2122                 ath9k_ps_restore(sc);
2123                 break;
2124         case IEEE80211_AMPDU_TX_OPERATIONAL:
2125                 ath9k_ps_wakeup(sc);
2126                 ath_tx_aggr_resume(sc, sta, tid);
2127                 ath9k_ps_restore(sc);
2128                 break;
2129         default:
2130                 ath_err(ath9k_hw_common(sc->sc_ah), "Unknown AMPDU action\n");
2131         }
2132
2133         local_bh_enable();
2134
2135         return ret;
2136 }
2137
2138 static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
2139                              struct survey_info *survey)
2140 {
2141         struct ath_softc *sc = hw->priv;
2142         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2143         struct ieee80211_supported_band *sband;
2144         struct ieee80211_channel *chan;
2145         unsigned long flags;
2146         int pos;
2147
2148         spin_lock_irqsave(&common->cc_lock, flags);
2149         if (idx == 0)
2150                 ath_update_survey_stats(sc);
2151
2152         sband = hw->wiphy->bands[IEEE80211_BAND_2GHZ];
2153         if (sband && idx >= sband->n_channels) {
2154                 idx -= sband->n_channels;
2155                 sband = NULL;
2156         }
2157
2158         if (!sband)
2159                 sband = hw->wiphy->bands[IEEE80211_BAND_5GHZ];
2160
2161         if (!sband || idx >= sband->n_channels) {
2162                 spin_unlock_irqrestore(&common->cc_lock, flags);
2163                 return -ENOENT;
2164         }
2165
2166         chan = &sband->channels[idx];
2167         pos = chan->hw_value;
2168         memcpy(survey, &sc->survey[pos], sizeof(*survey));
2169         survey->channel = chan;
2170         spin_unlock_irqrestore(&common->cc_lock, flags);
2171
2172         return 0;
2173 }
2174
2175 static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
2176 {
2177         struct ath_softc *sc = hw->priv;
2178         struct ath_hw *ah = sc->sc_ah;
2179
2180         mutex_lock(&sc->mutex);
2181         ah->coverage_class = coverage_class;
2182         ath9k_hw_init_global_settings(ah);
2183         mutex_unlock(&sc->mutex);
2184 }
2185
2186 static void ath9k_flush(struct ieee80211_hw *hw, bool drop)
2187 {
2188         struct ath_softc *sc = hw->priv;
2189         int timeout = 200; /* ms */
2190         int i, j;
2191
2192         ath9k_ps_wakeup(sc);
2193         mutex_lock(&sc->mutex);
2194
2195         cancel_delayed_work_sync(&sc->tx_complete_work);
2196
2197         if (drop)
2198                 timeout = 1;
2199
2200         for (j = 0; j < timeout; j++) {
2201                 int npend = 0;
2202
2203                 if (j)
2204                         usleep_range(1000, 2000);
2205
2206                 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
2207                         if (!ATH_TXQ_SETUP(sc, i))
2208                                 continue;
2209
2210                         npend += ath9k_has_pending_frames(sc, &sc->tx.txq[i]);
2211                 }
2212
2213                 if (!npend)
2214                     goto out;
2215         }
2216
2217         if (!ath_drain_all_txq(sc, false))
2218                 ath_reset(sc, false);
2219
2220         ieee80211_wake_queues(hw);
2221
2222 out:
2223         ieee80211_queue_delayed_work(hw, &sc->tx_complete_work, 0);
2224         mutex_unlock(&sc->mutex);
2225         ath9k_ps_restore(sc);
2226 }
2227
2228 static bool ath9k_tx_frames_pending(struct ieee80211_hw *hw)
2229 {
2230         struct ath_softc *sc = hw->priv;
2231         int i;
2232
2233         for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
2234                 if (!ATH_TXQ_SETUP(sc, i))
2235                         continue;
2236
2237                 if (ath9k_has_pending_frames(sc, &sc->tx.txq[i]))
2238                         return true;
2239         }
2240         return false;
2241 }
2242
2243 struct ieee80211_ops ath9k_ops = {
2244         .tx                 = ath9k_tx,
2245         .start              = ath9k_start,
2246         .stop               = ath9k_stop,
2247         .add_interface      = ath9k_add_interface,
2248         .change_interface   = ath9k_change_interface,
2249         .remove_interface   = ath9k_remove_interface,
2250         .config             = ath9k_config,
2251         .configure_filter   = ath9k_configure_filter,
2252         .sta_add            = ath9k_sta_add,
2253         .sta_remove         = ath9k_sta_remove,
2254         .sta_notify         = ath9k_sta_notify,
2255         .conf_tx            = ath9k_conf_tx,
2256         .bss_info_changed   = ath9k_bss_info_changed,
2257         .set_key            = ath9k_set_key,
2258         .get_tsf            = ath9k_get_tsf,
2259         .set_tsf            = ath9k_set_tsf,
2260         .reset_tsf          = ath9k_reset_tsf,
2261         .ampdu_action       = ath9k_ampdu_action,
2262         .get_survey         = ath9k_get_survey,
2263         .rfkill_poll        = ath9k_rfkill_poll_state,
2264         .set_coverage_class = ath9k_set_coverage_class,
2265         .flush              = ath9k_flush,
2266         .tx_frames_pending  = ath9k_tx_frames_pending,
2267 };