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[uclinux-h8/linux.git] / drivers / net / wireless / iwlwifi / iwl-rx.c
1 /******************************************************************************
2  *
3  * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved.
4  *
5  * Portions of this file are derived from the ipw3945 project, as well
6  * as portions of the ieee80211 subsystem header files.
7  *
8  * This program is free software; you can redistribute it and/or modify it
9  * under the terms of version 2 of the GNU General Public License as
10  * published by the Free Software Foundation.
11  *
12  * This program is distributed in the hope that it will be useful, but WITHOUT
13  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
15  * more details.
16  *
17  * You should have received a copy of the GNU General Public License along with
18  * this program; if not, write to the Free Software Foundation, Inc.,
19  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
20  *
21  * The full GNU General Public License is included in this distribution in the
22  * file called LICENSE.
23  *
24  * Contact Information:
25  *  Intel Linux Wireless <ilw@linux.intel.com>
26  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27  *
28  *****************************************************************************/
29
30 #include <linux/etherdevice.h>
31 #include <net/mac80211.h>
32 #include <asm/unaligned.h>
33 #include "iwl-eeprom.h"
34 #include "iwl-dev.h"
35 #include "iwl-core.h"
36 #include "iwl-sta.h"
37 #include "iwl-io.h"
38 #include "iwl-calib.h"
39 #include "iwl-helpers.h"
40 /************************** RX-FUNCTIONS ****************************/
41 /*
42  * Rx theory of operation
43  *
44  * Driver allocates a circular buffer of Receive Buffer Descriptors (RBDs),
45  * each of which point to Receive Buffers to be filled by the NIC.  These get
46  * used not only for Rx frames, but for any command response or notification
47  * from the NIC.  The driver and NIC manage the Rx buffers by means
48  * of indexes into the circular buffer.
49  *
50  * Rx Queue Indexes
51  * The host/firmware share two index registers for managing the Rx buffers.
52  *
53  * The READ index maps to the first position that the firmware may be writing
54  * to -- the driver can read up to (but not including) this position and get
55  * good data.
56  * The READ index is managed by the firmware once the card is enabled.
57  *
58  * The WRITE index maps to the last position the driver has read from -- the
59  * position preceding WRITE is the last slot the firmware can place a packet.
60  *
61  * The queue is empty (no good data) if WRITE = READ - 1, and is full if
62  * WRITE = READ.
63  *
64  * During initialization, the host sets up the READ queue position to the first
65  * INDEX position, and WRITE to the last (READ - 1 wrapped)
66  *
67  * When the firmware places a packet in a buffer, it will advance the READ index
68  * and fire the RX interrupt.  The driver can then query the READ index and
69  * process as many packets as possible, moving the WRITE index forward as it
70  * resets the Rx queue buffers with new memory.
71  *
72  * The management in the driver is as follows:
73  * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free.  When
74  *   iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
75  *   to replenish the iwl->rxq->rx_free.
76  * + In iwl_rx_replenish (scheduled) if 'processed' != 'read' then the
77  *   iwl->rxq is replenished and the READ INDEX is updated (updating the
78  *   'processed' and 'read' driver indexes as well)
79  * + A received packet is processed and handed to the kernel network stack,
80  *   detached from the iwl->rxq.  The driver 'processed' index is updated.
81  * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
82  *   list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
83  *   INDEX is not incremented and iwl->status(RX_STALLED) is set.  If there
84  *   were enough free buffers and RX_STALLED is set it is cleared.
85  *
86  *
87  * Driver sequence:
88  *
89  * iwl_rx_queue_alloc()   Allocates rx_free
90  * iwl_rx_replenish()     Replenishes rx_free list from rx_used, and calls
91  *                            iwl_rx_queue_restock
92  * iwl_rx_queue_restock() Moves available buffers from rx_free into Rx
93  *                            queue, updates firmware pointers, and updates
94  *                            the WRITE index.  If insufficient rx_free buffers
95  *                            are available, schedules iwl_rx_replenish
96  *
97  * -- enable interrupts --
98  * ISR - iwl_rx()         Detach iwl_rx_mem_buffers from pool up to the
99  *                            READ INDEX, detaching the SKB from the pool.
100  *                            Moves the packet buffer from queue to rx_used.
101  *                            Calls iwl_rx_queue_restock to refill any empty
102  *                            slots.
103  * ...
104  *
105  */
106
107 /**
108  * iwl_rx_queue_space - Return number of free slots available in queue.
109  */
110 int iwl_rx_queue_space(const struct iwl_rx_queue *q)
111 {
112         int s = q->read - q->write;
113         if (s <= 0)
114                 s += RX_QUEUE_SIZE;
115         /* keep some buffer to not confuse full and empty queue */
116         s -= 2;
117         if (s < 0)
118                 s = 0;
119         return s;
120 }
121 EXPORT_SYMBOL(iwl_rx_queue_space);
122
123 /**
124  * iwl_rx_queue_update_write_ptr - Update the write pointer for the RX queue
125  */
126 int iwl_rx_queue_update_write_ptr(struct iwl_priv *priv, struct iwl_rx_queue *q)
127 {
128         unsigned long flags;
129         u32 rx_wrt_ptr_reg = priv->hw_params.rx_wrt_ptr_reg;
130         u32 reg;
131         int ret = 0;
132
133         spin_lock_irqsave(&q->lock, flags);
134
135         if (q->need_update == 0)
136                 goto exit_unlock;
137
138         /* If power-saving is in use, make sure device is awake */
139         if (test_bit(STATUS_POWER_PMI, &priv->status)) {
140                 reg = iwl_read32(priv, CSR_UCODE_DRV_GP1);
141
142                 if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
143                         IWL_DEBUG_INFO(priv, "Rx queue requesting wakeup, GP1 = 0x%x\n",
144                                       reg);
145                         iwl_set_bit(priv, CSR_GP_CNTRL,
146                                     CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
147                         goto exit_unlock;
148                 }
149
150                 q->write_actual = (q->write & ~0x7);
151                 iwl_write_direct32(priv, rx_wrt_ptr_reg, q->write_actual);
152
153         /* Else device is assumed to be awake */
154         } else {
155                 /* Device expects a multiple of 8 */
156                 q->write_actual = (q->write & ~0x7);
157                 iwl_write_direct32(priv, rx_wrt_ptr_reg, q->write_actual);
158         }
159
160         q->need_update = 0;
161
162  exit_unlock:
163         spin_unlock_irqrestore(&q->lock, flags);
164         return ret;
165 }
166 EXPORT_SYMBOL(iwl_rx_queue_update_write_ptr);
167 /**
168  * iwl_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
169  */
170 static inline __le32 iwl_dma_addr2rbd_ptr(struct iwl_priv *priv,
171                                           dma_addr_t dma_addr)
172 {
173         return cpu_to_le32((u32)(dma_addr >> 8));
174 }
175
176 /**
177  * iwl_rx_queue_restock - refill RX queue from pre-allocated pool
178  *
179  * If there are slots in the RX queue that need to be restocked,
180  * and we have free pre-allocated buffers, fill the ranks as much
181  * as we can, pulling from rx_free.
182  *
183  * This moves the 'write' index forward to catch up with 'processed', and
184  * also updates the memory address in the firmware to reference the new
185  * target buffer.
186  */
187 int iwl_rx_queue_restock(struct iwl_priv *priv)
188 {
189         struct iwl_rx_queue *rxq = &priv->rxq;
190         struct list_head *element;
191         struct iwl_rx_mem_buffer *rxb;
192         unsigned long flags;
193         int write;
194         int ret = 0;
195
196         spin_lock_irqsave(&rxq->lock, flags);
197         write = rxq->write & ~0x7;
198         while ((iwl_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
199                 /* Get next free Rx buffer, remove from free list */
200                 element = rxq->rx_free.next;
201                 rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
202                 list_del(element);
203
204                 /* Point to Rx buffer via next RBD in circular buffer */
205                 rxq->bd[rxq->write] = iwl_dma_addr2rbd_ptr(priv, rxb->page_dma);
206                 rxq->queue[rxq->write] = rxb;
207                 rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
208                 rxq->free_count--;
209         }
210         spin_unlock_irqrestore(&rxq->lock, flags);
211         /* If the pre-allocated buffer pool is dropping low, schedule to
212          * refill it */
213         if (rxq->free_count <= RX_LOW_WATERMARK)
214                 queue_work(priv->workqueue, &priv->rx_replenish);
215
216
217         /* If we've added more space for the firmware to place data, tell it.
218          * Increment device's write pointer in multiples of 8. */
219         if (rxq->write_actual != (rxq->write & ~0x7)) {
220                 spin_lock_irqsave(&rxq->lock, flags);
221                 rxq->need_update = 1;
222                 spin_unlock_irqrestore(&rxq->lock, flags);
223                 ret = iwl_rx_queue_update_write_ptr(priv, rxq);
224         }
225
226         return ret;
227 }
228 EXPORT_SYMBOL(iwl_rx_queue_restock);
229
230
231 /**
232  * iwl_rx_replenish - Move all used packet from rx_used to rx_free
233  *
234  * When moving to rx_free an SKB is allocated for the slot.
235  *
236  * Also restock the Rx queue via iwl_rx_queue_restock.
237  * This is called as a scheduled work item (except for during initialization)
238  */
239 void iwl_rx_allocate(struct iwl_priv *priv, gfp_t priority)
240 {
241         struct iwl_rx_queue *rxq = &priv->rxq;
242         struct list_head *element;
243         struct iwl_rx_mem_buffer *rxb;
244         struct page *page;
245         unsigned long flags;
246         gfp_t gfp_mask = priority;
247
248         while (1) {
249                 spin_lock_irqsave(&rxq->lock, flags);
250                 if (list_empty(&rxq->rx_used)) {
251                         spin_unlock_irqrestore(&rxq->lock, flags);
252                         return;
253                 }
254                 spin_unlock_irqrestore(&rxq->lock, flags);
255
256                 if (rxq->free_count > RX_LOW_WATERMARK)
257                         gfp_mask |= __GFP_NOWARN;
258
259                 if (priv->hw_params.rx_page_order > 0)
260                         gfp_mask |= __GFP_COMP;
261
262                 /* Alloc a new receive buffer */
263                 page = alloc_pages(gfp_mask, priv->hw_params.rx_page_order);
264                 if (!page) {
265                         if (net_ratelimit())
266                                 IWL_DEBUG_INFO(priv, "alloc_pages failed, "
267                                                "order: %d\n",
268                                                priv->hw_params.rx_page_order);
269
270                         if ((rxq->free_count <= RX_LOW_WATERMARK) &&
271                             net_ratelimit())
272                                 IWL_CRIT(priv, "Failed to alloc_pages with %s. Only %u free buffers remaining.\n",
273                                          priority == GFP_ATOMIC ?  "GFP_ATOMIC" : "GFP_KERNEL",
274                                          rxq->free_count);
275                         /* We don't reschedule replenish work here -- we will
276                          * call the restock method and if it still needs
277                          * more buffers it will schedule replenish */
278                         return;
279                 }
280
281                 spin_lock_irqsave(&rxq->lock, flags);
282
283                 if (list_empty(&rxq->rx_used)) {
284                         spin_unlock_irqrestore(&rxq->lock, flags);
285                         __free_pages(page, priv->hw_params.rx_page_order);
286                         return;
287                 }
288                 element = rxq->rx_used.next;
289                 rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
290                 list_del(element);
291
292                 spin_unlock_irqrestore(&rxq->lock, flags);
293
294                 rxb->page = page;
295                 /* Get physical address of the RB */
296                 rxb->page_dma = pci_map_page(priv->pci_dev, page, 0,
297                                 PAGE_SIZE << priv->hw_params.rx_page_order,
298                                 PCI_DMA_FROMDEVICE);
299                 /* dma address must be no more than 36 bits */
300                 BUG_ON(rxb->page_dma & ~DMA_BIT_MASK(36));
301                 /* and also 256 byte aligned! */
302                 BUG_ON(rxb->page_dma & DMA_BIT_MASK(8));
303
304                 spin_lock_irqsave(&rxq->lock, flags);
305
306                 list_add_tail(&rxb->list, &rxq->rx_free);
307                 rxq->free_count++;
308                 priv->alloc_rxb_page++;
309
310                 spin_unlock_irqrestore(&rxq->lock, flags);
311         }
312 }
313
314 void iwl_rx_replenish(struct iwl_priv *priv)
315 {
316         unsigned long flags;
317
318         iwl_rx_allocate(priv, GFP_KERNEL);
319
320         spin_lock_irqsave(&priv->lock, flags);
321         iwl_rx_queue_restock(priv);
322         spin_unlock_irqrestore(&priv->lock, flags);
323 }
324 EXPORT_SYMBOL(iwl_rx_replenish);
325
326 void iwl_rx_replenish_now(struct iwl_priv *priv)
327 {
328         iwl_rx_allocate(priv, GFP_ATOMIC);
329
330         iwl_rx_queue_restock(priv);
331 }
332 EXPORT_SYMBOL(iwl_rx_replenish_now);
333
334
335 /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
336  * If an SKB has been detached, the POOL needs to have its SKB set to NULL
337  * This free routine walks the list of POOL entries and if SKB is set to
338  * non NULL it is unmapped and freed
339  */
340 void iwl_rx_queue_free(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
341 {
342         int i;
343         for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
344                 if (rxq->pool[i].page != NULL) {
345                         pci_unmap_page(priv->pci_dev, rxq->pool[i].page_dma,
346                                 PAGE_SIZE << priv->hw_params.rx_page_order,
347                                 PCI_DMA_FROMDEVICE);
348                         __free_pages(rxq->pool[i].page,
349                                      priv->hw_params.rx_page_order);
350                         rxq->pool[i].page = NULL;
351                         priv->alloc_rxb_page--;
352                 }
353         }
354
355         pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
356                             rxq->dma_addr);
357         pci_free_consistent(priv->pci_dev, sizeof(struct iwl_rb_status),
358                             rxq->rb_stts, rxq->rb_stts_dma);
359         rxq->bd = NULL;
360         rxq->rb_stts  = NULL;
361 }
362 EXPORT_SYMBOL(iwl_rx_queue_free);
363
364 int iwl_rx_queue_alloc(struct iwl_priv *priv)
365 {
366         struct iwl_rx_queue *rxq = &priv->rxq;
367         struct pci_dev *dev = priv->pci_dev;
368         int i;
369
370         spin_lock_init(&rxq->lock);
371         INIT_LIST_HEAD(&rxq->rx_free);
372         INIT_LIST_HEAD(&rxq->rx_used);
373
374         /* Alloc the circular buffer of Read Buffer Descriptors (RBDs) */
375         rxq->bd = pci_alloc_consistent(dev, 4 * RX_QUEUE_SIZE, &rxq->dma_addr);
376         if (!rxq->bd)
377                 goto err_bd;
378
379         rxq->rb_stts = pci_alloc_consistent(dev, sizeof(struct iwl_rb_status),
380                                         &rxq->rb_stts_dma);
381         if (!rxq->rb_stts)
382                 goto err_rb;
383
384         /* Fill the rx_used queue with _all_ of the Rx buffers */
385         for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++)
386                 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
387
388         /* Set us so that we have processed and used all buffers, but have
389          * not restocked the Rx queue with fresh buffers */
390         rxq->read = rxq->write = 0;
391         rxq->write_actual = 0;
392         rxq->free_count = 0;
393         rxq->need_update = 0;
394         return 0;
395
396 err_rb:
397         pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
398                             rxq->dma_addr);
399 err_bd:
400         return -ENOMEM;
401 }
402 EXPORT_SYMBOL(iwl_rx_queue_alloc);
403
404 void iwl_rx_queue_reset(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
405 {
406         unsigned long flags;
407         int i;
408         spin_lock_irqsave(&rxq->lock, flags);
409         INIT_LIST_HEAD(&rxq->rx_free);
410         INIT_LIST_HEAD(&rxq->rx_used);
411         /* Fill the rx_used queue with _all_ of the Rx buffers */
412         for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
413                 /* In the reset function, these buffers may have been allocated
414                  * to an SKB, so we need to unmap and free potential storage */
415                 if (rxq->pool[i].page != NULL) {
416                         pci_unmap_page(priv->pci_dev, rxq->pool[i].page_dma,
417                                 PAGE_SIZE << priv->hw_params.rx_page_order,
418                                 PCI_DMA_FROMDEVICE);
419                         priv->alloc_rxb_page--;
420                         __free_pages(rxq->pool[i].page,
421                                      priv->hw_params.rx_page_order);
422                         rxq->pool[i].page = NULL;
423                 }
424                 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
425         }
426
427         /* Set us so that we have processed and used all buffers, but have
428          * not restocked the Rx queue with fresh buffers */
429         rxq->read = rxq->write = 0;
430         rxq->write_actual = 0;
431         rxq->free_count = 0;
432         spin_unlock_irqrestore(&rxq->lock, flags);
433 }
434
435 int iwl_rx_init(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
436 {
437         u32 rb_size;
438         const u32 rfdnlog = RX_QUEUE_SIZE_LOG; /* 256 RBDs */
439         u32 rb_timeout = 0; /* FIXME: RX_RB_TIMEOUT for all devices? */
440
441         if (!priv->cfg->use_isr_legacy)
442                 rb_timeout = RX_RB_TIMEOUT;
443
444         if (priv->cfg->mod_params->amsdu_size_8K)
445                 rb_size = FH_RCSR_RX_CONFIG_REG_VAL_RB_SIZE_8K;
446         else
447                 rb_size = FH_RCSR_RX_CONFIG_REG_VAL_RB_SIZE_4K;
448
449         /* Stop Rx DMA */
450         iwl_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG, 0);
451
452         /* Reset driver's Rx queue write index */
453         iwl_write_direct32(priv, FH_RSCSR_CHNL0_RBDCB_WPTR_REG, 0);
454
455         /* Tell device where to find RBD circular buffer in DRAM */
456         iwl_write_direct32(priv, FH_RSCSR_CHNL0_RBDCB_BASE_REG,
457                            (u32)(rxq->dma_addr >> 8));
458
459         /* Tell device where in DRAM to update its Rx status */
460         iwl_write_direct32(priv, FH_RSCSR_CHNL0_STTS_WPTR_REG,
461                            rxq->rb_stts_dma >> 4);
462
463         /* Enable Rx DMA
464          * FH_RCSR_CHNL0_RX_IGNORE_RXF_EMPTY is set because of HW bug in
465          *      the credit mechanism in 5000 HW RX FIFO
466          * Direct rx interrupts to hosts
467          * Rx buffer size 4 or 8k
468          * RB timeout 0x10
469          * 256 RBDs
470          */
471         iwl_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG,
472                            FH_RCSR_RX_CONFIG_CHNL_EN_ENABLE_VAL |
473                            FH_RCSR_CHNL0_RX_IGNORE_RXF_EMPTY |
474                            FH_RCSR_CHNL0_RX_CONFIG_IRQ_DEST_INT_HOST_VAL |
475                            FH_RCSR_CHNL0_RX_CONFIG_SINGLE_FRAME_MSK |
476                            rb_size|
477                            (rb_timeout << FH_RCSR_RX_CONFIG_REG_IRQ_RBTH_POS)|
478                            (rfdnlog << FH_RCSR_RX_CONFIG_RBDCB_SIZE_POS));
479
480         iwl_write32(priv, CSR_INT_COALESCING, 0x40);
481
482         return 0;
483 }
484
485 int iwl_rxq_stop(struct iwl_priv *priv)
486 {
487
488         /* stop Rx DMA */
489         iwl_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG, 0);
490         iwl_poll_direct_bit(priv, FH_MEM_RSSR_RX_STATUS_REG,
491                             FH_RSSR_CHNL0_RX_STATUS_CHNL_IDLE, 1000);
492
493         return 0;
494 }
495 EXPORT_SYMBOL(iwl_rxq_stop);
496
497 void iwl_rx_missed_beacon_notif(struct iwl_priv *priv,
498                                 struct iwl_rx_mem_buffer *rxb)
499
500 {
501         struct iwl_rx_packet *pkt = rxb_addr(rxb);
502         struct iwl_missed_beacon_notif *missed_beacon;
503
504         missed_beacon = &pkt->u.missed_beacon;
505         if (le32_to_cpu(missed_beacon->consequtive_missed_beacons) > 5) {
506                 IWL_DEBUG_CALIB(priv, "missed bcn cnsq %d totl %d rcd %d expctd %d\n",
507                     le32_to_cpu(missed_beacon->consequtive_missed_beacons),
508                     le32_to_cpu(missed_beacon->total_missed_becons),
509                     le32_to_cpu(missed_beacon->num_recvd_beacons),
510                     le32_to_cpu(missed_beacon->num_expected_beacons));
511                 if (!test_bit(STATUS_SCANNING, &priv->status))
512                         iwl_init_sensitivity(priv);
513         }
514 }
515 EXPORT_SYMBOL(iwl_rx_missed_beacon_notif);
516
517
518 /* Calculate noise level, based on measurements during network silence just
519  *   before arriving beacon.  This measurement can be done only if we know
520  *   exactly when to expect beacons, therefore only when we're associated. */
521 static void iwl_rx_calc_noise(struct iwl_priv *priv)
522 {
523         struct statistics_rx_non_phy *rx_info
524                                 = &(priv->statistics.rx.general);
525         int num_active_rx = 0;
526         int total_silence = 0;
527         int bcn_silence_a =
528                 le32_to_cpu(rx_info->beacon_silence_rssi_a) & IN_BAND_FILTER;
529         int bcn_silence_b =
530                 le32_to_cpu(rx_info->beacon_silence_rssi_b) & IN_BAND_FILTER;
531         int bcn_silence_c =
532                 le32_to_cpu(rx_info->beacon_silence_rssi_c) & IN_BAND_FILTER;
533
534         if (bcn_silence_a) {
535                 total_silence += bcn_silence_a;
536                 num_active_rx++;
537         }
538         if (bcn_silence_b) {
539                 total_silence += bcn_silence_b;
540                 num_active_rx++;
541         }
542         if (bcn_silence_c) {
543                 total_silence += bcn_silence_c;
544                 num_active_rx++;
545         }
546
547         /* Average among active antennas */
548         if (num_active_rx)
549                 priv->last_rx_noise = (total_silence / num_active_rx) - 107;
550         else
551                 priv->last_rx_noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
552
553         IWL_DEBUG_CALIB(priv, "inband silence a %u, b %u, c %u, dBm %d\n",
554                         bcn_silence_a, bcn_silence_b, bcn_silence_c,
555                         priv->last_rx_noise);
556 }
557
558 #ifdef CONFIG_IWLWIFI_DEBUG
559 /*
560  *  based on the assumption of all statistics counter are in DWORD
561  *  FIXME: This function is for debugging, do not deal with
562  *  the case of counters roll-over.
563  */
564 static void iwl_accumulative_statistics(struct iwl_priv *priv,
565                                         __le32 *stats)
566 {
567         int i;
568         __le32 *prev_stats;
569         u32 *accum_stats;
570
571         prev_stats = (__le32 *)&priv->statistics;
572         accum_stats = (u32 *)&priv->accum_statistics;
573
574         for (i = sizeof(__le32); i < sizeof(struct iwl_notif_statistics);
575              i += sizeof(__le32), stats++, prev_stats++, accum_stats++)
576                 if (le32_to_cpu(*stats) > le32_to_cpu(*prev_stats))
577                         *accum_stats += (le32_to_cpu(*stats) -
578                                 le32_to_cpu(*prev_stats));
579
580         /* reset accumulative statistics for "no-counter" type statistics */
581         priv->accum_statistics.general.temperature =
582                 priv->statistics.general.temperature;
583         priv->accum_statistics.general.temperature_m =
584                 priv->statistics.general.temperature_m;
585         priv->accum_statistics.general.ttl_timestamp =
586                 priv->statistics.general.ttl_timestamp;
587         priv->accum_statistics.tx.tx_power.ant_a =
588                 priv->statistics.tx.tx_power.ant_a;
589         priv->accum_statistics.tx.tx_power.ant_b =
590                 priv->statistics.tx.tx_power.ant_b;
591         priv->accum_statistics.tx.tx_power.ant_c =
592                 priv->statistics.tx.tx_power.ant_c;
593 }
594 #endif
595
596 #define REG_RECALIB_PERIOD (60)
597
598 void iwl_rx_statistics(struct iwl_priv *priv,
599                               struct iwl_rx_mem_buffer *rxb)
600 {
601         int change;
602         struct iwl_rx_packet *pkt = rxb_addr(rxb);
603
604         IWL_DEBUG_RX(priv, "Statistics notification received (%d vs %d).\n",
605                      (int)sizeof(priv->statistics),
606                      le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK);
607
608         change = ((priv->statistics.general.temperature !=
609                    pkt->u.stats.general.temperature) ||
610                   ((priv->statistics.flag &
611                     STATISTICS_REPLY_FLG_HT40_MODE_MSK) !=
612                    (pkt->u.stats.flag & STATISTICS_REPLY_FLG_HT40_MODE_MSK)));
613
614 #ifdef CONFIG_IWLWIFI_DEBUG
615         iwl_accumulative_statistics(priv, (__le32 *)&pkt->u.stats);
616 #endif
617         memcpy(&priv->statistics, &pkt->u.stats, sizeof(priv->statistics));
618
619         set_bit(STATUS_STATISTICS, &priv->status);
620
621         /* Reschedule the statistics timer to occur in
622          * REG_RECALIB_PERIOD seconds to ensure we get a
623          * thermal update even if the uCode doesn't give
624          * us one */
625         mod_timer(&priv->statistics_periodic, jiffies +
626                   msecs_to_jiffies(REG_RECALIB_PERIOD * 1000));
627
628         if (unlikely(!test_bit(STATUS_SCANNING, &priv->status)) &&
629             (pkt->hdr.cmd == STATISTICS_NOTIFICATION)) {
630                 iwl_rx_calc_noise(priv);
631                 queue_work(priv->workqueue, &priv->run_time_calib_work);
632         }
633         if (priv->cfg->ops->lib->temp_ops.temperature && change)
634                 priv->cfg->ops->lib->temp_ops.temperature(priv);
635 }
636 EXPORT_SYMBOL(iwl_rx_statistics);
637
638 void iwl_reply_statistics(struct iwl_priv *priv,
639                               struct iwl_rx_mem_buffer *rxb)
640 {
641         struct iwl_rx_packet *pkt = rxb_addr(rxb);
642
643         if (le32_to_cpu(pkt->u.stats.flag) & UCODE_STATISTICS_CLEAR_MSK) {
644                 memset(&priv->statistics, 0,
645                         sizeof(struct iwl_notif_statistics));
646 #ifdef CONFIG_IWLWIFI_DEBUG
647                 memset(&priv->accum_statistics, 0,
648                         sizeof(struct iwl_notif_statistics));
649 #endif
650                 IWL_DEBUG_RX(priv, "Statistics have been cleared\n");
651         }
652         iwl_rx_statistics(priv, rxb);
653 }
654 EXPORT_SYMBOL(iwl_reply_statistics);
655
656 #define PERFECT_RSSI (-20) /* dBm */
657 #define WORST_RSSI (-95)   /* dBm */
658 #define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
659
660 /* Calculate an indication of rx signal quality (a percentage, not dBm!).
661  * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
662  *   about formulas used below. */
663 static int iwl_calc_sig_qual(int rssi_dbm, int noise_dbm)
664 {
665         int sig_qual;
666         int degradation = PERFECT_RSSI - rssi_dbm;
667
668         /* If we get a noise measurement, use signal-to-noise ratio (SNR)
669          * as indicator; formula is (signal dbm - noise dbm).
670          * SNR at or above 40 is a great signal (100%).
671          * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
672          * Weakest usable signal is usually 10 - 15 dB SNR. */
673         if (noise_dbm) {
674                 if (rssi_dbm - noise_dbm >= 40)
675                         return 100;
676                 else if (rssi_dbm < noise_dbm)
677                         return 0;
678                 sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
679
680         /* Else use just the signal level.
681          * This formula is a least squares fit of data points collected and
682          *   compared with a reference system that had a percentage (%) display
683          *   for signal quality. */
684         } else
685                 sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
686                             (15 * RSSI_RANGE + 62 * degradation)) /
687                            (RSSI_RANGE * RSSI_RANGE);
688
689         if (sig_qual > 100)
690                 sig_qual = 100;
691         else if (sig_qual < 1)
692                 sig_qual = 0;
693
694         return sig_qual;
695 }
696
697 /* Calc max signal level (dBm) among 3 possible receivers */
698 static inline int iwl_calc_rssi(struct iwl_priv *priv,
699                                 struct iwl_rx_phy_res *rx_resp)
700 {
701         return priv->cfg->ops->utils->calc_rssi(priv, rx_resp);
702 }
703
704 #ifdef CONFIG_IWLWIFI_DEBUG
705 /**
706  * iwl_dbg_report_frame - dump frame to syslog during debug sessions
707  *
708  * You may hack this function to show different aspects of received frames,
709  * including selective frame dumps.
710  * group100 parameter selects whether to show 1 out of 100 good data frames.
711  *    All beacon and probe response frames are printed.
712  */
713 static void iwl_dbg_report_frame(struct iwl_priv *priv,
714                       struct iwl_rx_phy_res *phy_res, u16 length,
715                       struct ieee80211_hdr *header, int group100)
716 {
717         u32 to_us;
718         u32 print_summary = 0;
719         u32 print_dump = 0;     /* set to 1 to dump all frames' contents */
720         u32 hundred = 0;
721         u32 dataframe = 0;
722         __le16 fc;
723         u16 seq_ctl;
724         u16 channel;
725         u16 phy_flags;
726         u32 rate_n_flags;
727         u32 tsf_low;
728         int rssi;
729
730         if (likely(!(iwl_get_debug_level(priv) & IWL_DL_RX)))
731                 return;
732
733         /* MAC header */
734         fc = header->frame_control;
735         seq_ctl = le16_to_cpu(header->seq_ctrl);
736
737         /* metadata */
738         channel = le16_to_cpu(phy_res->channel);
739         phy_flags = le16_to_cpu(phy_res->phy_flags);
740         rate_n_flags = le32_to_cpu(phy_res->rate_n_flags);
741
742         /* signal statistics */
743         rssi = iwl_calc_rssi(priv, phy_res);
744         tsf_low = le64_to_cpu(phy_res->timestamp) & 0x0ffffffff;
745
746         to_us = !compare_ether_addr(header->addr1, priv->mac_addr);
747
748         /* if data frame is to us and all is good,
749          *   (optionally) print summary for only 1 out of every 100 */
750         if (to_us && (fc & ~cpu_to_le16(IEEE80211_FCTL_PROTECTED)) ==
751             cpu_to_le16(IEEE80211_FCTL_FROMDS | IEEE80211_FTYPE_DATA)) {
752                 dataframe = 1;
753                 if (!group100)
754                         print_summary = 1;      /* print each frame */
755                 else if (priv->framecnt_to_us < 100) {
756                         priv->framecnt_to_us++;
757                         print_summary = 0;
758                 } else {
759                         priv->framecnt_to_us = 0;
760                         print_summary = 1;
761                         hundred = 1;
762                 }
763         } else {
764                 /* print summary for all other frames */
765                 print_summary = 1;
766         }
767
768         if (print_summary) {
769                 char *title;
770                 int rate_idx;
771                 u32 bitrate;
772
773                 if (hundred)
774                         title = "100Frames";
775                 else if (ieee80211_has_retry(fc))
776                         title = "Retry";
777                 else if (ieee80211_is_assoc_resp(fc))
778                         title = "AscRsp";
779                 else if (ieee80211_is_reassoc_resp(fc))
780                         title = "RasRsp";
781                 else if (ieee80211_is_probe_resp(fc)) {
782                         title = "PrbRsp";
783                         print_dump = 1; /* dump frame contents */
784                 } else if (ieee80211_is_beacon(fc)) {
785                         title = "Beacon";
786                         print_dump = 1; /* dump frame contents */
787                 } else if (ieee80211_is_atim(fc))
788                         title = "ATIM";
789                 else if (ieee80211_is_auth(fc))
790                         title = "Auth";
791                 else if (ieee80211_is_deauth(fc))
792                         title = "DeAuth";
793                 else if (ieee80211_is_disassoc(fc))
794                         title = "DisAssoc";
795                 else
796                         title = "Frame";
797
798                 rate_idx = iwl_hwrate_to_plcp_idx(rate_n_flags);
799                 if (unlikely((rate_idx < 0) || (rate_idx >= IWL_RATE_COUNT))) {
800                         bitrate = 0;
801                         WARN_ON_ONCE(1);
802                 } else {
803                         bitrate = iwl_rates[rate_idx].ieee / 2;
804                 }
805
806                 /* print frame summary.
807                  * MAC addresses show just the last byte (for brevity),
808                  *    but you can hack it to show more, if you'd like to. */
809                 if (dataframe)
810                         IWL_DEBUG_RX(priv, "%s: mhd=0x%04x, dst=0x%02x, "
811                                      "len=%u, rssi=%d, chnl=%d, rate=%u, \n",
812                                      title, le16_to_cpu(fc), header->addr1[5],
813                                      length, rssi, channel, bitrate);
814                 else {
815                         /* src/dst addresses assume managed mode */
816                         IWL_DEBUG_RX(priv, "%s: 0x%04x, dst=0x%02x, src=0x%02x, "
817                                      "len=%u, rssi=%d, tim=%lu usec, "
818                                      "phy=0x%02x, chnl=%d\n",
819                                      title, le16_to_cpu(fc), header->addr1[5],
820                                      header->addr3[5], length, rssi,
821                                      tsf_low - priv->scan_start_tsf,
822                                      phy_flags, channel);
823                 }
824         }
825         if (print_dump)
826                 iwl_print_hex_dump(priv, IWL_DL_RX, header, length);
827 }
828 #endif
829
830 /*
831  * returns non-zero if packet should be dropped
832  */
833 int iwl_set_decrypted_flag(struct iwl_priv *priv,
834                            struct ieee80211_hdr *hdr,
835                            u32 decrypt_res,
836                            struct ieee80211_rx_status *stats)
837 {
838         u16 fc = le16_to_cpu(hdr->frame_control);
839
840         if (priv->active_rxon.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK)
841                 return 0;
842
843         if (!(fc & IEEE80211_FCTL_PROTECTED))
844                 return 0;
845
846         IWL_DEBUG_RX(priv, "decrypt_res:0x%x\n", decrypt_res);
847         switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
848         case RX_RES_STATUS_SEC_TYPE_TKIP:
849                 /* The uCode has got a bad phase 1 Key, pushes the packet.
850                  * Decryption will be done in SW. */
851                 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
852                     RX_RES_STATUS_BAD_KEY_TTAK)
853                         break;
854
855         case RX_RES_STATUS_SEC_TYPE_WEP:
856                 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
857                     RX_RES_STATUS_BAD_ICV_MIC) {
858                         /* bad ICV, the packet is destroyed since the
859                          * decryption is inplace, drop it */
860                         IWL_DEBUG_RX(priv, "Packet destroyed\n");
861                         return -1;
862                 }
863         case RX_RES_STATUS_SEC_TYPE_CCMP:
864                 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
865                     RX_RES_STATUS_DECRYPT_OK) {
866                         IWL_DEBUG_RX(priv, "hw decrypt successfully!!!\n");
867                         stats->flag |= RX_FLAG_DECRYPTED;
868                 }
869                 break;
870
871         default:
872                 break;
873         }
874         return 0;
875 }
876 EXPORT_SYMBOL(iwl_set_decrypted_flag);
877
878 static u32 iwl_translate_rx_status(struct iwl_priv *priv, u32 decrypt_in)
879 {
880         u32 decrypt_out = 0;
881
882         if ((decrypt_in & RX_RES_STATUS_STATION_FOUND) ==
883                                         RX_RES_STATUS_STATION_FOUND)
884                 decrypt_out |= (RX_RES_STATUS_STATION_FOUND |
885                                 RX_RES_STATUS_NO_STATION_INFO_MISMATCH);
886
887         decrypt_out |= (decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK);
888
889         /* packet was not encrypted */
890         if ((decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) ==
891                                         RX_RES_STATUS_SEC_TYPE_NONE)
892                 return decrypt_out;
893
894         /* packet was encrypted with unknown alg */
895         if ((decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) ==
896                                         RX_RES_STATUS_SEC_TYPE_ERR)
897                 return decrypt_out;
898
899         /* decryption was not done in HW */
900         if ((decrypt_in & RX_MPDU_RES_STATUS_DEC_DONE_MSK) !=
901                                         RX_MPDU_RES_STATUS_DEC_DONE_MSK)
902                 return decrypt_out;
903
904         switch (decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) {
905
906         case RX_RES_STATUS_SEC_TYPE_CCMP:
907                 /* alg is CCM: check MIC only */
908                 if (!(decrypt_in & RX_MPDU_RES_STATUS_MIC_OK))
909                         /* Bad MIC */
910                         decrypt_out |= RX_RES_STATUS_BAD_ICV_MIC;
911                 else
912                         decrypt_out |= RX_RES_STATUS_DECRYPT_OK;
913
914                 break;
915
916         case RX_RES_STATUS_SEC_TYPE_TKIP:
917                 if (!(decrypt_in & RX_MPDU_RES_STATUS_TTAK_OK)) {
918                         /* Bad TTAK */
919                         decrypt_out |= RX_RES_STATUS_BAD_KEY_TTAK;
920                         break;
921                 }
922                 /* fall through if TTAK OK */
923         default:
924                 if (!(decrypt_in & RX_MPDU_RES_STATUS_ICV_OK))
925                         decrypt_out |= RX_RES_STATUS_BAD_ICV_MIC;
926                 else
927                         decrypt_out |= RX_RES_STATUS_DECRYPT_OK;
928                 break;
929         };
930
931         IWL_DEBUG_RX(priv, "decrypt_in:0x%x  decrypt_out = 0x%x\n",
932                                         decrypt_in, decrypt_out);
933
934         return decrypt_out;
935 }
936
937 static void iwl_pass_packet_to_mac80211(struct iwl_priv *priv,
938                                         struct ieee80211_hdr *hdr,
939                                         u16 len,
940                                         u32 ampdu_status,
941                                         struct iwl_rx_mem_buffer *rxb,
942                                         struct ieee80211_rx_status *stats)
943 {
944         struct sk_buff *skb;
945         int ret = 0;
946         __le16 fc = hdr->frame_control;
947
948         /* We only process data packets if the interface is open */
949         if (unlikely(!priv->is_open)) {
950                 IWL_DEBUG_DROP_LIMIT(priv,
951                     "Dropping packet while interface is not open.\n");
952                 return;
953         }
954
955         /* In case of HW accelerated crypto and bad decryption, drop */
956         if (!priv->cfg->mod_params->sw_crypto &&
957             iwl_set_decrypted_flag(priv, hdr, ampdu_status, stats))
958                 return;
959
960         skb = alloc_skb(IWL_LINK_HDR_MAX * 2, GFP_ATOMIC);
961         if (!skb) {
962                 IWL_ERR(priv, "alloc_skb failed\n");
963                 return;
964         }
965
966         skb_reserve(skb, IWL_LINK_HDR_MAX);
967         skb_add_rx_frag(skb, 0, rxb->page, (void *)hdr - rxb_addr(rxb), len);
968
969         /* mac80211 currently doesn't support paged SKB. Convert it to
970          * linear SKB for management frame and data frame requires
971          * software decryption or software defragementation. */
972         if (ieee80211_is_mgmt(fc) ||
973             ieee80211_has_protected(fc) ||
974             ieee80211_has_morefrags(fc) ||
975             le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_FRAG)
976                 ret = skb_linearize(skb);
977         else
978                 ret = __pskb_pull_tail(skb, min_t(u16, IWL_LINK_HDR_MAX, len)) ?
979                          0 : -ENOMEM;
980
981         if (ret) {
982                 kfree_skb(skb);
983                 goto out;
984         }
985
986         /*
987          * XXX: We cannot touch the page and its virtual memory (hdr) after
988          * here. It might have already been freed by the above skb change.
989          */
990
991         iwl_update_stats(priv, false, fc, len);
992         memcpy(IEEE80211_SKB_RXCB(skb), stats, sizeof(*stats));
993
994         ieee80211_rx(priv->hw, skb);
995  out:
996         priv->alloc_rxb_page--;
997         rxb->page = NULL;
998 }
999
1000 /* This is necessary only for a number of statistics, see the caller. */
1001 static int iwl_is_network_packet(struct iwl_priv *priv,
1002                 struct ieee80211_hdr *header)
1003 {
1004         /* Filter incoming packets to determine if they are targeted toward
1005          * this network, discarding packets coming from ourselves */
1006         switch (priv->iw_mode) {
1007         case NL80211_IFTYPE_ADHOC: /* Header: Dest. | Source    | BSSID */
1008                 /* packets to our IBSS update information */
1009                 return !compare_ether_addr(header->addr3, priv->bssid);
1010         case NL80211_IFTYPE_STATION: /* Header: Dest. | AP{BSSID} | Source */
1011                 /* packets to our IBSS update information */
1012                 return !compare_ether_addr(header->addr2, priv->bssid);
1013         default:
1014                 return 1;
1015         }
1016 }
1017
1018 /* Called for REPLY_RX (legacy ABG frames), or
1019  * REPLY_RX_MPDU_CMD (HT high-throughput N frames). */
1020 void iwl_rx_reply_rx(struct iwl_priv *priv,
1021                                 struct iwl_rx_mem_buffer *rxb)
1022 {
1023         struct ieee80211_hdr *header;
1024         struct ieee80211_rx_status rx_status;
1025         struct iwl_rx_packet *pkt = rxb_addr(rxb);
1026         struct iwl_rx_phy_res *phy_res;
1027         __le32 rx_pkt_status;
1028         struct iwl4965_rx_mpdu_res_start *amsdu;
1029         u32 len;
1030         u32 ampdu_status;
1031         u32 rate_n_flags;
1032
1033         /**
1034          * REPLY_RX and REPLY_RX_MPDU_CMD are handled differently.
1035          *      REPLY_RX: physical layer info is in this buffer
1036          *      REPLY_RX_MPDU_CMD: physical layer info was sent in separate
1037          *              command and cached in priv->last_phy_res
1038          *
1039          * Here we set up local variables depending on which command is
1040          * received.
1041          */
1042         if (pkt->hdr.cmd == REPLY_RX) {
1043                 phy_res = (struct iwl_rx_phy_res *)pkt->u.raw;
1044                 header = (struct ieee80211_hdr *)(pkt->u.raw + sizeof(*phy_res)
1045                                 + phy_res->cfg_phy_cnt);
1046
1047                 len = le16_to_cpu(phy_res->byte_count);
1048                 rx_pkt_status = *(__le32 *)(pkt->u.raw + sizeof(*phy_res) +
1049                                 phy_res->cfg_phy_cnt + len);
1050                 ampdu_status = le32_to_cpu(rx_pkt_status);
1051         } else {
1052                 if (!priv->last_phy_res[0]) {
1053                         IWL_ERR(priv, "MPDU frame without cached PHY data\n");
1054                         return;
1055                 }
1056                 phy_res = (struct iwl_rx_phy_res *)&priv->last_phy_res[1];
1057                 amsdu = (struct iwl4965_rx_mpdu_res_start *)pkt->u.raw;
1058                 header = (struct ieee80211_hdr *)(pkt->u.raw + sizeof(*amsdu));
1059                 len = le16_to_cpu(amsdu->byte_count);
1060                 rx_pkt_status = *(__le32 *)(pkt->u.raw + sizeof(*amsdu) + len);
1061                 ampdu_status = iwl_translate_rx_status(priv,
1062                                 le32_to_cpu(rx_pkt_status));
1063         }
1064
1065         if ((unlikely(phy_res->cfg_phy_cnt > 20))) {
1066                 IWL_DEBUG_DROP(priv, "dsp size out of range [0,20]: %d/n",
1067                                 phy_res->cfg_phy_cnt);
1068                 return;
1069         }
1070
1071         if (!(rx_pkt_status & RX_RES_STATUS_NO_CRC32_ERROR) ||
1072             !(rx_pkt_status & RX_RES_STATUS_NO_RXE_OVERFLOW)) {
1073                 IWL_DEBUG_RX(priv, "Bad CRC or FIFO: 0x%08X.\n",
1074                                 le32_to_cpu(rx_pkt_status));
1075                 return;
1076         }
1077
1078         /* This will be used in several places later */
1079         rate_n_flags = le32_to_cpu(phy_res->rate_n_flags);
1080
1081         /* rx_status carries information about the packet to mac80211 */
1082         rx_status.mactime = le64_to_cpu(phy_res->timestamp);
1083         rx_status.freq =
1084                 ieee80211_channel_to_frequency(le16_to_cpu(phy_res->channel));
1085         rx_status.band = (phy_res->phy_flags & RX_RES_PHY_FLAGS_BAND_24_MSK) ?
1086                                 IEEE80211_BAND_2GHZ : IEEE80211_BAND_5GHZ;
1087         rx_status.rate_idx =
1088                 iwl_hwrate_to_mac80211_idx(rate_n_flags, rx_status.band);
1089         rx_status.flag = 0;
1090
1091         /* TSF isn't reliable. In order to allow smooth user experience,
1092          * this W/A doesn't propagate it to the mac80211 */
1093         /*rx_status.flag |= RX_FLAG_TSFT;*/
1094
1095         priv->ucode_beacon_time = le32_to_cpu(phy_res->beacon_time_stamp);
1096
1097         /* Find max signal strength (dBm) among 3 antenna/receiver chains */
1098         rx_status.signal = iwl_calc_rssi(priv, phy_res);
1099
1100         /* Meaningful noise values are available only from beacon statistics,
1101          *   which are gathered only when associated, and indicate noise
1102          *   only for the associated network channel ...
1103          * Ignore these noise values while scanning (other channels) */
1104         if (iwl_is_associated(priv) &&
1105             !test_bit(STATUS_SCANNING, &priv->status)) {
1106                 rx_status.noise = priv->last_rx_noise;
1107                 rx_status.qual = iwl_calc_sig_qual(rx_status.signal,
1108                                                          rx_status.noise);
1109         } else {
1110                 rx_status.noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
1111                 rx_status.qual = iwl_calc_sig_qual(rx_status.signal, 0);
1112         }
1113
1114         /* Reset beacon noise level if not associated. */
1115         if (!iwl_is_associated(priv))
1116                 priv->last_rx_noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
1117
1118 #ifdef CONFIG_IWLWIFI_DEBUG
1119         /* Set "1" to report good data frames in groups of 100 */
1120         if (unlikely(iwl_get_debug_level(priv) & IWL_DL_RX))
1121                 iwl_dbg_report_frame(priv, phy_res, len, header, 1);
1122 #endif
1123         iwl_dbg_log_rx_data_frame(priv, len, header);
1124         IWL_DEBUG_STATS_LIMIT(priv, "Rssi %d, noise %d, qual %d, TSF %llu\n",
1125                 rx_status.signal, rx_status.noise, rx_status.qual,
1126                 (unsigned long long)rx_status.mactime);
1127
1128         /*
1129          * "antenna number"
1130          *
1131          * It seems that the antenna field in the phy flags value
1132          * is actually a bit field. This is undefined by radiotap,
1133          * it wants an actual antenna number but I always get "7"
1134          * for most legacy frames I receive indicating that the
1135          * same frame was received on all three RX chains.
1136          *
1137          * I think this field should be removed in favor of a
1138          * new 802.11n radiotap field "RX chains" that is defined
1139          * as a bitmask.
1140          */
1141         rx_status.antenna =
1142                 (le16_to_cpu(phy_res->phy_flags) & RX_RES_PHY_FLAGS_ANTENNA_MSK)
1143                 >> RX_RES_PHY_FLAGS_ANTENNA_POS;
1144
1145         /* set the preamble flag if appropriate */
1146         if (phy_res->phy_flags & RX_RES_PHY_FLAGS_SHORT_PREAMBLE_MSK)
1147                 rx_status.flag |= RX_FLAG_SHORTPRE;
1148
1149         /* Set up the HT phy flags */
1150         if (rate_n_flags & RATE_MCS_HT_MSK)
1151                 rx_status.flag |= RX_FLAG_HT;
1152         if (rate_n_flags & RATE_MCS_HT40_MSK)
1153                 rx_status.flag |= RX_FLAG_40MHZ;
1154         if (rate_n_flags & RATE_MCS_SGI_MSK)
1155                 rx_status.flag |= RX_FLAG_SHORT_GI;
1156
1157         if (iwl_is_network_packet(priv, header)) {
1158                 priv->last_rx_rssi = rx_status.signal;
1159                 priv->last_beacon_time =  priv->ucode_beacon_time;
1160                 priv->last_tsf = le64_to_cpu(phy_res->timestamp);
1161         }
1162
1163         iwl_pass_packet_to_mac80211(priv, header, len, ampdu_status,
1164                                     rxb, &rx_status);
1165 }
1166 EXPORT_SYMBOL(iwl_rx_reply_rx);
1167
1168 /* Cache phy data (Rx signal strength, etc) for HT frame (REPLY_RX_PHY_CMD).
1169  * This will be used later in iwl_rx_reply_rx() for REPLY_RX_MPDU_CMD. */
1170 void iwl_rx_reply_rx_phy(struct iwl_priv *priv,
1171                                     struct iwl_rx_mem_buffer *rxb)
1172 {
1173         struct iwl_rx_packet *pkt = rxb_addr(rxb);
1174         priv->last_phy_res[0] = 1;
1175         memcpy(&priv->last_phy_res[1], &(pkt->u.raw[0]),
1176                sizeof(struct iwl_rx_phy_res));
1177 }
1178 EXPORT_SYMBOL(iwl_rx_reply_rx_phy);