2 * Copyright (C) 2016 Felix Fietkau <nbd@nbd.name>
3 * Copyright (C) 2018 Stanislaw Gruszka <stf_xl@wp.pl>
5 * Permission to use, copy, modify, and/or distribute this software for any
6 * purpose with or without fee is hereby granted, provided that the above
7 * copyright notice and this permission notice appear in all copies.
9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
19 #include "mt76x02_regs.h"
20 #include "mt76x02_mac.h"
21 #include "mt76x02_util.h"
23 enum mt76x02_cipher_type
24 mt76x02_mac_get_key_info(struct ieee80211_key_conf *key, u8 *key_data)
26 memset(key_data, 0, 32);
28 return MT_CIPHER_NONE;
31 return MT_CIPHER_NONE;
33 memcpy(key_data, key->key, key->keylen);
35 switch (key->cipher) {
36 case WLAN_CIPHER_SUITE_WEP40:
37 return MT_CIPHER_WEP40;
38 case WLAN_CIPHER_SUITE_WEP104:
39 return MT_CIPHER_WEP104;
40 case WLAN_CIPHER_SUITE_TKIP:
41 return MT_CIPHER_TKIP;
42 case WLAN_CIPHER_SUITE_CCMP:
43 return MT_CIPHER_AES_CCMP;
45 return MT_CIPHER_NONE;
48 EXPORT_SYMBOL_GPL(mt76x02_mac_get_key_info);
50 int mt76x02_mac_shared_key_setup(struct mt76_dev *dev, u8 vif_idx, u8 key_idx,
51 struct ieee80211_key_conf *key)
53 enum mt76x02_cipher_type cipher;
57 cipher = mt76x02_mac_get_key_info(key, key_data);
58 if (cipher == MT_CIPHER_NONE && key)
61 val = __mt76_rr(dev, MT_SKEY_MODE(vif_idx));
62 val &= ~(MT_SKEY_MODE_MASK << MT_SKEY_MODE_SHIFT(vif_idx, key_idx));
63 val |= cipher << MT_SKEY_MODE_SHIFT(vif_idx, key_idx);
64 __mt76_wr(dev, MT_SKEY_MODE(vif_idx), val);
66 __mt76_wr_copy(dev, MT_SKEY(vif_idx, key_idx), key_data,
71 EXPORT_SYMBOL_GPL(mt76x02_mac_shared_key_setup);
73 int mt76x02_mac_wcid_set_key(struct mt76_dev *dev, u8 idx,
74 struct ieee80211_key_conf *key)
76 enum mt76x02_cipher_type cipher;
80 cipher = mt76x02_mac_get_key_info(key, key_data);
81 if (cipher == MT_CIPHER_NONE && key)
84 __mt76_wr_copy(dev, MT_WCID_KEY(idx), key_data, sizeof(key_data));
85 __mt76_rmw_field(dev, MT_WCID_ATTR(idx), MT_WCID_ATTR_PKEY_MODE, cipher);
87 memset(iv_data, 0, sizeof(iv_data));
89 __mt76_rmw_field(dev, MT_WCID_ATTR(idx), MT_WCID_ATTR_PAIRWISE,
90 !!(key->flags & IEEE80211_KEY_FLAG_PAIRWISE));
91 iv_data[3] = key->keyidx << 6;
92 if (cipher >= MT_CIPHER_TKIP)
96 __mt76_wr_copy(dev, MT_WCID_IV(idx), iv_data, sizeof(iv_data));
100 EXPORT_SYMBOL_GPL(mt76x02_mac_wcid_set_key);
102 void mt76x02_mac_wcid_setup(struct mt76_dev *dev, u8 idx, u8 vif_idx, u8 *mac)
104 struct mt76_wcid_addr addr = {};
107 attr = FIELD_PREP(MT_WCID_ATTR_BSS_IDX, vif_idx & 7) |
108 FIELD_PREP(MT_WCID_ATTR_BSS_IDX_EXT, !!(vif_idx & 8));
110 __mt76_wr(dev, MT_WCID_ATTR(idx), attr);
112 __mt76_wr(dev, MT_WCID_TX_RATE(idx), 0);
113 __mt76_wr(dev, MT_WCID_TX_RATE(idx) + 4, 0);
119 memcpy(addr.macaddr, mac, ETH_ALEN);
121 __mt76_wr_copy(dev, MT_WCID_ADDR(idx), &addr, sizeof(addr));
123 EXPORT_SYMBOL_GPL(mt76x02_mac_wcid_setup);
125 void mt76x02_mac_wcid_set_drop(struct mt76_dev *dev, u8 idx, bool drop)
127 u32 val = __mt76_rr(dev, MT_WCID_DROP(idx));
128 u32 bit = MT_WCID_DROP_MASK(idx);
130 /* prevent unnecessary writes */
131 if ((val & bit) != (bit * drop))
132 __mt76_wr(dev, MT_WCID_DROP(idx), (val & ~bit) | (bit * drop));
134 EXPORT_SYMBOL_GPL(mt76x02_mac_wcid_set_drop);
136 void mt76x02_txq_init(struct mt76_dev *dev, struct ieee80211_txq *txq)
138 struct mt76_txq *mtxq;
143 mtxq = (struct mt76_txq *) txq->drv_priv;
145 struct mt76x02_sta *sta;
147 sta = (struct mt76x02_sta *) txq->sta->drv_priv;
148 mtxq->wcid = &sta->wcid;
150 struct mt76x02_vif *mvif;
152 mvif = (struct mt76x02_vif *) txq->vif->drv_priv;
153 mtxq->wcid = &mvif->group_wcid;
156 mt76_txq_init(dev, txq);
158 EXPORT_SYMBOL_GPL(mt76x02_txq_init);
161 mt76x02_mac_fill_txwi(struct mt76x02_txwi *txwi, struct sk_buff *skb,
162 struct ieee80211_sta *sta, int len, u8 nss)
164 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
165 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
168 if (info->flags & IEEE80211_TX_CTL_LDPC)
169 txwi->rate |= cpu_to_le16(MT_RXWI_RATE_LDPC);
170 if ((info->flags & IEEE80211_TX_CTL_STBC) && nss == 1)
171 txwi->rate |= cpu_to_le16(MT_RXWI_RATE_STBC);
172 if (nss > 1 && sta && sta->smps_mode == IEEE80211_SMPS_DYNAMIC)
173 txwi_flags |= MT_TXWI_FLAGS_MMPS;
174 if (!(info->flags & IEEE80211_TX_CTL_NO_ACK))
175 txwi->ack_ctl |= MT_TXWI_ACK_CTL_REQ;
176 if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ)
177 txwi->ack_ctl |= MT_TXWI_ACK_CTL_NSEQ;
178 if (info->flags & IEEE80211_TX_CTL_RATE_CTRL_PROBE)
179 txwi->pktid |= MT_TXWI_PKTID_PROBE;
180 if ((info->flags & IEEE80211_TX_CTL_AMPDU) && sta) {
181 u8 ba_size = IEEE80211_MIN_AMPDU_BUF;
183 ba_size <<= sta->ht_cap.ampdu_factor;
184 ba_size = min_t(int, 63, ba_size - 1);
185 if (info->flags & IEEE80211_TX_CTL_RATE_CTRL_PROBE)
187 txwi->ack_ctl |= FIELD_PREP(MT_TXWI_ACK_CTL_BA_WINDOW, ba_size);
189 txwi_flags |= MT_TXWI_FLAGS_AMPDU |
190 FIELD_PREP(MT_TXWI_FLAGS_MPDU_DENSITY,
191 sta->ht_cap.ampdu_density);
194 if (ieee80211_is_probe_resp(hdr->frame_control) ||
195 ieee80211_is_beacon(hdr->frame_control))
196 txwi_flags |= MT_TXWI_FLAGS_TS;
198 txwi->flags |= cpu_to_le16(txwi_flags);
199 txwi->len_ctl = cpu_to_le16(len);
203 mt76x02_mac_tx_rate_val(struct mt76_dev *dev,
204 const struct ieee80211_tx_rate *rate, u8 *nss_val)
211 if (rate->flags & IEEE80211_TX_RC_VHT_MCS) {
212 rate_idx = rate->idx;
213 nss = 1 + (rate->idx >> 4);
214 phy = MT_PHY_TYPE_VHT;
215 if (rate->flags & IEEE80211_TX_RC_80_MHZ_WIDTH)
217 else if (rate->flags & IEEE80211_TX_RC_40_MHZ_WIDTH)
219 } else if (rate->flags & IEEE80211_TX_RC_MCS) {
220 rate_idx = rate->idx;
221 nss = 1 + (rate->idx >> 3);
222 phy = MT_PHY_TYPE_HT;
223 if (rate->flags & IEEE80211_TX_RC_GREEN_FIELD)
224 phy = MT_PHY_TYPE_HT_GF;
225 if (rate->flags & IEEE80211_TX_RC_40_MHZ_WIDTH)
228 const struct ieee80211_rate *r;
229 int band = dev->chandef.chan->band;
232 r = &dev->hw->wiphy->bands[band]->bitrates[rate->idx];
233 if (rate->flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE)
234 val = r->hw_value_short;
239 rate_idx = val & 0xff;
243 rateval = FIELD_PREP(MT_RXWI_RATE_INDEX, rate_idx);
244 rateval |= FIELD_PREP(MT_RXWI_RATE_PHY, phy);
245 rateval |= FIELD_PREP(MT_RXWI_RATE_BW, bw);
246 if (rate->flags & IEEE80211_TX_RC_SHORT_GI)
247 rateval |= MT_RXWI_RATE_SGI;
250 return cpu_to_le16(rateval);
253 void mt76x02_mac_wcid_set_rate(struct mt76_dev *dev, struct mt76_wcid *wcid,
254 const struct ieee80211_tx_rate *rate)
256 spin_lock_bh(&dev->lock);
257 wcid->tx_rate = mt76x02_mac_tx_rate_val(dev, rate, &wcid->tx_rate_nss);
258 wcid->tx_rate_set = true;
259 spin_unlock_bh(&dev->lock);
262 bool mt76x02_mac_load_tx_status(struct mt76_dev *dev,
263 struct mt76x02_tx_status *stat)
267 stat2 = __mt76_rr(dev, MT_TX_STAT_FIFO_EXT);
268 stat1 = __mt76_rr(dev, MT_TX_STAT_FIFO);
270 stat->valid = !!(stat1 & MT_TX_STAT_FIFO_VALID);
274 stat->success = !!(stat1 & MT_TX_STAT_FIFO_SUCCESS);
275 stat->aggr = !!(stat1 & MT_TX_STAT_FIFO_AGGR);
276 stat->ack_req = !!(stat1 & MT_TX_STAT_FIFO_ACKREQ);
277 stat->wcid = FIELD_GET(MT_TX_STAT_FIFO_WCID, stat1);
278 stat->rate = FIELD_GET(MT_TX_STAT_FIFO_RATE, stat1);
280 stat->retry = FIELD_GET(MT_TX_STAT_FIFO_EXT_RETRY, stat2);
281 stat->pktid = FIELD_GET(MT_TX_STAT_FIFO_EXT_PKTID, stat2);
285 EXPORT_SYMBOL_GPL(mt76x02_mac_load_tx_status);
288 mt76x02_mac_process_tx_rate(struct ieee80211_tx_rate *txrate, u16 rate,
289 enum nl80211_band band)
291 u8 idx = FIELD_GET(MT_RXWI_RATE_INDEX, rate);
297 switch (FIELD_GET(MT_RXWI_RATE_PHY, rate)) {
298 case MT_PHY_TYPE_OFDM:
299 if (band == NL80211_BAND_2GHZ)
304 case MT_PHY_TYPE_CCK:
310 case MT_PHY_TYPE_HT_GF:
311 txrate->flags |= IEEE80211_TX_RC_GREEN_FIELD;
314 txrate->flags |= IEEE80211_TX_RC_MCS;
317 case MT_PHY_TYPE_VHT:
318 txrate->flags |= IEEE80211_TX_RC_VHT_MCS;
325 switch (FIELD_GET(MT_RXWI_RATE_BW, rate)) {
329 txrate->flags |= IEEE80211_TX_RC_40_MHZ_WIDTH;
332 txrate->flags |= IEEE80211_TX_RC_80_MHZ_WIDTH;
338 if (rate & MT_RXWI_RATE_SGI)
339 txrate->flags |= IEEE80211_TX_RC_SHORT_GI;
344 void mt76x02_mac_write_txwi(struct mt76_dev *dev, struct mt76x02_txwi *txwi,
345 struct sk_buff *skb, struct mt76_wcid *wcid,
346 struct ieee80211_sta *sta, int len)
348 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
349 struct ieee80211_tx_rate *rate = &info->control.rates[0];
350 struct ieee80211_key_conf *key = info->control.hw_key;
351 u16 rate_ht_mask = FIELD_PREP(MT_RXWI_RATE_PHY, BIT(1) | BIT(2));
353 s8 txpwr_adj, max_txpwr_adj;
354 u8 ccmp_pn[8], nstreams = dev->chainmask & 0xf;
356 memset(txwi, 0, sizeof(*txwi));
359 txwi->wcid = wcid->idx;
365 if (wcid && wcid->sw_iv && key) {
366 u64 pn = atomic64_inc_return(&key->tx_pn);
368 ccmp_pn[1] = pn >> 8;
370 ccmp_pn[3] = 0x20 | (key->keyidx << 6);
371 ccmp_pn[4] = pn >> 16;
372 ccmp_pn[5] = pn >> 24;
373 ccmp_pn[6] = pn >> 32;
374 ccmp_pn[7] = pn >> 40;
375 txwi->iv = *((__le32 *)&ccmp_pn[0]);
376 txwi->eiv = *((__le32 *)&ccmp_pn[1]);
379 spin_lock_bh(&dev->lock);
380 if (wcid && (rate->idx < 0 || !rate->count)) {
381 txwi->rate = wcid->tx_rate;
382 max_txpwr_adj = wcid->max_txpwr_adj;
383 nss = wcid->tx_rate_nss;
385 txwi->rate = mt76x02_mac_tx_rate_val(dev, rate, &nss);
386 max_txpwr_adj = mt76x02_tx_get_max_txpwr_adj(dev, rate);
388 spin_unlock_bh(&dev->lock);
390 if (dev->drv->get_tx_txpwr_adj) {
391 txpwr_adj = dev->drv->get_tx_txpwr_adj(dev, dev->txpower_conf,
393 txwi->ctl2 = FIELD_PREP(MT_TX_PWR_ADJ, txpwr_adj);
396 if (nstreams > 1 && mt76_rev(dev) >= MT76XX_REV_E4)
397 txwi->txstream = 0x13;
398 else if (nstreams > 1 && mt76_rev(dev) >= MT76XX_REV_E3 &&
399 !(txwi->rate & cpu_to_le16(rate_ht_mask)))
400 txwi->txstream = 0x93;
402 mt76x02_mac_fill_txwi(txwi, skb, sta, len, nss);
404 EXPORT_SYMBOL_GPL(mt76x02_mac_write_txwi);
407 mt76x02_mac_fill_tx_status(struct mt76_dev *dev,
408 struct ieee80211_tx_info *info,
409 struct mt76x02_tx_status *st, int n_frames)
411 struct ieee80211_tx_rate *rate = info->status.rates;
412 int cur_idx, last_rate;
418 last_rate = min_t(int, st->retry, IEEE80211_TX_MAX_RATES - 1);
419 mt76x02_mac_process_tx_rate(&rate[last_rate], st->rate,
420 dev->chandef.chan->band);
421 if (last_rate < IEEE80211_TX_MAX_RATES - 1)
422 rate[last_rate + 1].idx = -1;
424 cur_idx = rate[last_rate].idx + last_rate;
425 for (i = 0; i <= last_rate; i++) {
426 rate[i].flags = rate[last_rate].flags;
427 rate[i].idx = max_t(int, 0, cur_idx - i);
430 rate[last_rate].count = st->retry + 1 - last_rate;
432 info->status.ampdu_len = n_frames;
433 info->status.ampdu_ack_len = st->success ? n_frames : 0;
435 if (st->pktid & MT_TXWI_PKTID_PROBE)
436 info->flags |= IEEE80211_TX_CTL_RATE_CTRL_PROBE;
439 info->flags |= IEEE80211_TX_CTL_AMPDU |
440 IEEE80211_TX_STAT_AMPDU;
443 info->flags |= IEEE80211_TX_CTL_NO_ACK;
444 else if (st->success)
445 info->flags |= IEEE80211_TX_STAT_ACK;
448 void mt76x02_send_tx_status(struct mt76_dev *dev,
449 struct mt76x02_tx_status *stat, u8 *update)
451 struct ieee80211_tx_info info = {};
452 struct ieee80211_sta *sta = NULL;
453 struct mt76_wcid *wcid = NULL;
454 struct mt76x02_sta *msta = NULL;
457 if (stat->wcid < ARRAY_SIZE(dev->wcid))
458 wcid = rcu_dereference(dev->wcid[stat->wcid]);
463 priv = msta = container_of(wcid, struct mt76x02_sta, wcid);
464 sta = container_of(priv, struct ieee80211_sta,
468 if (msta && stat->aggr) {
469 u32 stat_val, stat_cache;
471 stat_val = stat->rate;
472 stat_val |= ((u32) stat->retry) << 16;
473 stat_cache = msta->status.rate;
474 stat_cache |= ((u32) msta->status.retry) << 16;
476 if (*update == 0 && stat_val == stat_cache &&
477 stat->wcid == msta->status.wcid && msta->n_frames < 32) {
482 mt76x02_mac_fill_tx_status(dev, &info, &msta->status,
485 msta->status = *stat;
489 mt76x02_mac_fill_tx_status(dev, &info, stat, 1);
493 ieee80211_tx_status_noskb(dev->hw, sta, &info);
498 EXPORT_SYMBOL_GPL(mt76x02_send_tx_status);
501 mt76x02_mac_process_rate(struct mt76_rx_status *status, u16 rate)
503 u8 idx = FIELD_GET(MT_RXWI_RATE_INDEX, rate);
505 switch (FIELD_GET(MT_RXWI_RATE_PHY, rate)) {
506 case MT_PHY_TYPE_OFDM:
510 if (status->band == NL80211_BAND_2GHZ)
513 status->rate_idx = idx;
515 case MT_PHY_TYPE_CCK:
518 status->enc_flags |= RX_ENC_FLAG_SHORTPRE;
524 status->rate_idx = idx;
526 case MT_PHY_TYPE_HT_GF:
527 status->enc_flags |= RX_ENC_FLAG_HT_GF;
530 status->encoding = RX_ENC_HT;
531 status->rate_idx = idx;
533 case MT_PHY_TYPE_VHT:
534 status->encoding = RX_ENC_VHT;
535 status->rate_idx = FIELD_GET(MT_RATE_INDEX_VHT_IDX, idx);
536 status->nss = FIELD_GET(MT_RATE_INDEX_VHT_NSS, idx) + 1;
542 if (rate & MT_RXWI_RATE_LDPC)
543 status->enc_flags |= RX_ENC_FLAG_LDPC;
545 if (rate & MT_RXWI_RATE_SGI)
546 status->enc_flags |= RX_ENC_FLAG_SHORT_GI;
548 if (rate & MT_RXWI_RATE_STBC)
549 status->enc_flags |= 1 << RX_ENC_FLAG_STBC_SHIFT;
551 switch (FIELD_GET(MT_RXWI_RATE_BW, rate)) {
555 status->bw = RATE_INFO_BW_40;
558 status->bw = RATE_INFO_BW_80;
566 EXPORT_SYMBOL_GPL(mt76x02_mac_process_rate);
568 void mt76x02_mac_setaddr(struct mt76_dev *dev, u8 *addr)
570 ether_addr_copy(dev->macaddr, addr);
572 if (!is_valid_ether_addr(dev->macaddr)) {
573 eth_random_addr(dev->macaddr);
575 "Invalid MAC address, using random address %pM\n",
579 __mt76_wr(dev, MT_MAC_ADDR_DW0, get_unaligned_le32(dev->macaddr));
580 __mt76_wr(dev, MT_MAC_ADDR_DW1,
581 get_unaligned_le16(dev->macaddr + 4) |
582 FIELD_PREP(MT_MAC_ADDR_DW1_U2ME_MASK, 0xff));
584 EXPORT_SYMBOL_GPL(mt76x02_mac_setaddr);