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Merge tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
[uclinux-h8/linux.git] / drivers / net / wireless / realtek / rtw88 / main.c
1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
2 /* Copyright(c) 2018-2019  Realtek Corporation
3  */
4
5 #include "main.h"
6 #include "regd.h"
7 #include "fw.h"
8 #include "ps.h"
9 #include "sec.h"
10 #include "mac.h"
11 #include "phy.h"
12 #include "reg.h"
13 #include "efuse.h"
14 #include "debug.h"
15
16 static bool rtw_fw_support_lps;
17 unsigned int rtw_debug_mask;
18 EXPORT_SYMBOL(rtw_debug_mask);
19
20 module_param_named(support_lps, rtw_fw_support_lps, bool, 0644);
21 module_param_named(debug_mask, rtw_debug_mask, uint, 0644);
22
23 MODULE_PARM_DESC(support_lps, "Set Y to enable LPS support");
24 MODULE_PARM_DESC(debug_mask, "Debugging mask");
25
26 static struct ieee80211_channel rtw_channeltable_2g[] = {
27         {.center_freq = 2412, .hw_value = 1,},
28         {.center_freq = 2417, .hw_value = 2,},
29         {.center_freq = 2422, .hw_value = 3,},
30         {.center_freq = 2427, .hw_value = 4,},
31         {.center_freq = 2432, .hw_value = 5,},
32         {.center_freq = 2437, .hw_value = 6,},
33         {.center_freq = 2442, .hw_value = 7,},
34         {.center_freq = 2447, .hw_value = 8,},
35         {.center_freq = 2452, .hw_value = 9,},
36         {.center_freq = 2457, .hw_value = 10,},
37         {.center_freq = 2462, .hw_value = 11,},
38         {.center_freq = 2467, .hw_value = 12,},
39         {.center_freq = 2472, .hw_value = 13,},
40         {.center_freq = 2484, .hw_value = 14,},
41 };
42
43 static struct ieee80211_channel rtw_channeltable_5g[] = {
44         {.center_freq = 5180, .hw_value = 36,},
45         {.center_freq = 5200, .hw_value = 40,},
46         {.center_freq = 5220, .hw_value = 44,},
47         {.center_freq = 5240, .hw_value = 48,},
48         {.center_freq = 5260, .hw_value = 52,},
49         {.center_freq = 5280, .hw_value = 56,},
50         {.center_freq = 5300, .hw_value = 60,},
51         {.center_freq = 5320, .hw_value = 64,},
52         {.center_freq = 5500, .hw_value = 100,},
53         {.center_freq = 5520, .hw_value = 104,},
54         {.center_freq = 5540, .hw_value = 108,},
55         {.center_freq = 5560, .hw_value = 112,},
56         {.center_freq = 5580, .hw_value = 116,},
57         {.center_freq = 5600, .hw_value = 120,},
58         {.center_freq = 5620, .hw_value = 124,},
59         {.center_freq = 5640, .hw_value = 128,},
60         {.center_freq = 5660, .hw_value = 132,},
61         {.center_freq = 5680, .hw_value = 136,},
62         {.center_freq = 5700, .hw_value = 140,},
63         {.center_freq = 5745, .hw_value = 149,},
64         {.center_freq = 5765, .hw_value = 153,},
65         {.center_freq = 5785, .hw_value = 157,},
66         {.center_freq = 5805, .hw_value = 161,},
67         {.center_freq = 5825, .hw_value = 165,
68          .flags = IEEE80211_CHAN_NO_HT40MINUS},
69 };
70
71 static struct ieee80211_rate rtw_ratetable[] = {
72         {.bitrate = 10, .hw_value = 0x00,},
73         {.bitrate = 20, .hw_value = 0x01,},
74         {.bitrate = 55, .hw_value = 0x02,},
75         {.bitrate = 110, .hw_value = 0x03,},
76         {.bitrate = 60, .hw_value = 0x04,},
77         {.bitrate = 90, .hw_value = 0x05,},
78         {.bitrate = 120, .hw_value = 0x06,},
79         {.bitrate = 180, .hw_value = 0x07,},
80         {.bitrate = 240, .hw_value = 0x08,},
81         {.bitrate = 360, .hw_value = 0x09,},
82         {.bitrate = 480, .hw_value = 0x0a,},
83         {.bitrate = 540, .hw_value = 0x0b,},
84 };
85
86 static struct ieee80211_supported_band rtw_band_2ghz = {
87         .band = NL80211_BAND_2GHZ,
88
89         .channels = rtw_channeltable_2g,
90         .n_channels = ARRAY_SIZE(rtw_channeltable_2g),
91
92         .bitrates = rtw_ratetable,
93         .n_bitrates = ARRAY_SIZE(rtw_ratetable),
94
95         .ht_cap = {0},
96         .vht_cap = {0},
97 };
98
99 static struct ieee80211_supported_band rtw_band_5ghz = {
100         .band = NL80211_BAND_5GHZ,
101
102         .channels = rtw_channeltable_5g,
103         .n_channels = ARRAY_SIZE(rtw_channeltable_5g),
104
105         /* 5G has no CCK rates */
106         .bitrates = rtw_ratetable + 4,
107         .n_bitrates = ARRAY_SIZE(rtw_ratetable) - 4,
108
109         .ht_cap = {0},
110         .vht_cap = {0},
111 };
112
113 struct rtw_watch_dog_iter_data {
114         struct rtw_vif *rtwvif;
115         bool active;
116         u8 assoc_cnt;
117 };
118
119 static void rtw_vif_watch_dog_iter(void *data, u8 *mac,
120                                    struct ieee80211_vif *vif)
121 {
122         struct rtw_watch_dog_iter_data *iter_data = data;
123         struct rtw_vif *rtwvif = (struct rtw_vif *)vif->drv_priv;
124
125         if (vif->type == NL80211_IFTYPE_STATION) {
126                 if (vif->bss_conf.assoc) {
127                         iter_data->assoc_cnt++;
128                         iter_data->rtwvif = rtwvif;
129                 }
130                 if (rtwvif->stats.tx_cnt > RTW_LPS_THRESHOLD ||
131                     rtwvif->stats.rx_cnt > RTW_LPS_THRESHOLD)
132                         iter_data->active = true;
133         } else {
134                 /* only STATION mode can enter lps */
135                 iter_data->active = true;
136         }
137
138         rtwvif->stats.tx_unicast = 0;
139         rtwvif->stats.rx_unicast = 0;
140         rtwvif->stats.tx_cnt = 0;
141         rtwvif->stats.rx_cnt = 0;
142 }
143
144 /* process TX/RX statistics periodically for hardware,
145  * the information helps hardware to enhance performance
146  */
147 static void rtw_watch_dog_work(struct work_struct *work)
148 {
149         struct rtw_dev *rtwdev = container_of(work, struct rtw_dev,
150                                               watch_dog_work.work);
151         struct rtw_watch_dog_iter_data data = {};
152
153         if (!rtw_flag_check(rtwdev, RTW_FLAG_RUNNING))
154                 return;
155
156         ieee80211_queue_delayed_work(rtwdev->hw, &rtwdev->watch_dog_work,
157                                      RTW_WATCH_DOG_DELAY_TIME);
158
159         /* reset tx/rx statictics */
160         rtwdev->stats.tx_unicast = 0;
161         rtwdev->stats.rx_unicast = 0;
162         rtwdev->stats.tx_cnt = 0;
163         rtwdev->stats.rx_cnt = 0;
164
165         /* use atomic version to avoid taking local->iflist_mtx mutex */
166         rtw_iterate_vifs_atomic(rtwdev, rtw_vif_watch_dog_iter, &data);
167
168         /* fw supports only one station associated to enter lps, if there are
169          * more than two stations associated to the AP, then we can not enter
170          * lps, because fw does not handle the overlapped beacon interval
171          */
172         if (rtw_fw_support_lps &&
173             data.rtwvif && !data.active && data.assoc_cnt == 1)
174                 rtw_enter_lps(rtwdev, data.rtwvif);
175
176         if (rtw_flag_check(rtwdev, RTW_FLAG_SCANNING))
177                 return;
178
179         rtw_phy_dynamic_mechanism(rtwdev);
180
181         rtwdev->watch_dog_cnt++;
182 }
183
184 static void rtw_c2h_work(struct work_struct *work)
185 {
186         struct rtw_dev *rtwdev = container_of(work, struct rtw_dev, c2h_work);
187         struct sk_buff *skb, *tmp;
188
189         skb_queue_walk_safe(&rtwdev->c2h_queue, skb, tmp) {
190                 skb_unlink(skb, &rtwdev->c2h_queue);
191                 rtw_fw_c2h_cmd_handle(rtwdev, skb);
192                 dev_kfree_skb_any(skb);
193         }
194 }
195
196 void rtw_get_channel_params(struct cfg80211_chan_def *chandef,
197                             struct rtw_channel_params *chan_params)
198 {
199         struct ieee80211_channel *channel = chandef->chan;
200         enum nl80211_chan_width width = chandef->width;
201         u32 primary_freq, center_freq;
202         u8 center_chan;
203         u8 bandwidth = RTW_CHANNEL_WIDTH_20;
204         u8 primary_chan_idx = 0;
205
206         center_chan = channel->hw_value;
207         primary_freq = channel->center_freq;
208         center_freq = chandef->center_freq1;
209
210         switch (width) {
211         case NL80211_CHAN_WIDTH_20_NOHT:
212         case NL80211_CHAN_WIDTH_20:
213                 bandwidth = RTW_CHANNEL_WIDTH_20;
214                 primary_chan_idx = 0;
215                 break;
216         case NL80211_CHAN_WIDTH_40:
217                 bandwidth = RTW_CHANNEL_WIDTH_40;
218                 if (primary_freq > center_freq) {
219                         primary_chan_idx = 1;
220                         center_chan -= 2;
221                 } else {
222                         primary_chan_idx = 2;
223                         center_chan += 2;
224                 }
225                 break;
226         case NL80211_CHAN_WIDTH_80:
227                 bandwidth = RTW_CHANNEL_WIDTH_80;
228                 if (primary_freq > center_freq) {
229                         if (primary_freq - center_freq == 10) {
230                                 primary_chan_idx = 1;
231                                 center_chan -= 2;
232                         } else {
233                                 primary_chan_idx = 3;
234                                 center_chan -= 6;
235                         }
236                 } else {
237                         if (center_freq - primary_freq == 10) {
238                                 primary_chan_idx = 2;
239                                 center_chan += 2;
240                         } else {
241                                 primary_chan_idx = 4;
242                                 center_chan += 6;
243                         }
244                 }
245                 break;
246         default:
247                 center_chan = 0;
248                 break;
249         }
250
251         chan_params->center_chan = center_chan;
252         chan_params->bandwidth = bandwidth;
253         chan_params->primary_chan_idx = primary_chan_idx;
254 }
255
256 void rtw_set_channel(struct rtw_dev *rtwdev)
257 {
258         struct ieee80211_hw *hw = rtwdev->hw;
259         struct rtw_hal *hal = &rtwdev->hal;
260         struct rtw_chip_info *chip = rtwdev->chip;
261         struct rtw_channel_params ch_param;
262         u8 center_chan, bandwidth, primary_chan_idx;
263
264         rtw_get_channel_params(&hw->conf.chandef, &ch_param);
265         if (WARN(ch_param.center_chan == 0, "Invalid channel\n"))
266                 return;
267
268         center_chan = ch_param.center_chan;
269         bandwidth = ch_param.bandwidth;
270         primary_chan_idx = ch_param.primary_chan_idx;
271
272         hal->current_band_width = bandwidth;
273         hal->current_channel = center_chan;
274         hal->current_band_type = center_chan > 14 ? RTW_BAND_5G : RTW_BAND_2G;
275         chip->ops->set_channel(rtwdev, center_chan, bandwidth, primary_chan_idx);
276
277         rtw_phy_set_tx_power_level(rtwdev, center_chan);
278 }
279
280 static void rtw_vif_write_addr(struct rtw_dev *rtwdev, u32 start, u8 *addr)
281 {
282         int i;
283
284         for (i = 0; i < ETH_ALEN; i++)
285                 rtw_write8(rtwdev, start + i, addr[i]);
286 }
287
288 void rtw_vif_port_config(struct rtw_dev *rtwdev,
289                          struct rtw_vif *rtwvif,
290                          u32 config)
291 {
292         u32 addr, mask;
293
294         if (config & PORT_SET_MAC_ADDR) {
295                 addr = rtwvif->conf->mac_addr.addr;
296                 rtw_vif_write_addr(rtwdev, addr, rtwvif->mac_addr);
297         }
298         if (config & PORT_SET_BSSID) {
299                 addr = rtwvif->conf->bssid.addr;
300                 rtw_vif_write_addr(rtwdev, addr, rtwvif->bssid);
301         }
302         if (config & PORT_SET_NET_TYPE) {
303                 addr = rtwvif->conf->net_type.addr;
304                 mask = rtwvif->conf->net_type.mask;
305                 rtw_write32_mask(rtwdev, addr, mask, rtwvif->net_type);
306         }
307         if (config & PORT_SET_AID) {
308                 addr = rtwvif->conf->aid.addr;
309                 mask = rtwvif->conf->aid.mask;
310                 rtw_write32_mask(rtwdev, addr, mask, rtwvif->aid);
311         }
312 }
313
314 static u8 hw_bw_cap_to_bitamp(u8 bw_cap)
315 {
316         u8 bw = 0;
317
318         switch (bw_cap) {
319         case EFUSE_HW_CAP_IGNORE:
320         case EFUSE_HW_CAP_SUPP_BW80:
321                 bw |= BIT(RTW_CHANNEL_WIDTH_80);
322                 /* fall through */
323         case EFUSE_HW_CAP_SUPP_BW40:
324                 bw |= BIT(RTW_CHANNEL_WIDTH_40);
325                 /* fall through */
326         default:
327                 bw |= BIT(RTW_CHANNEL_WIDTH_20);
328                 break;
329         }
330
331         return bw;
332 }
333
334 static void rtw_hw_config_rf_ant_num(struct rtw_dev *rtwdev, u8 hw_ant_num)
335 {
336         struct rtw_hal *hal = &rtwdev->hal;
337
338         if (hw_ant_num == EFUSE_HW_CAP_IGNORE ||
339             hw_ant_num >= hal->rf_path_num)
340                 return;
341
342         switch (hw_ant_num) {
343         case 1:
344                 hal->rf_type = RF_1T1R;
345                 hal->rf_path_num = 1;
346                 hal->antenna_tx = BB_PATH_A;
347                 hal->antenna_rx = BB_PATH_A;
348                 break;
349         default:
350                 WARN(1, "invalid hw configuration from efuse\n");
351                 break;
352         }
353 }
354
355 static u64 get_vht_ra_mask(struct ieee80211_sta *sta)
356 {
357         u64 ra_mask = 0;
358         u16 mcs_map = le16_to_cpu(sta->vht_cap.vht_mcs.rx_mcs_map);
359         u8 vht_mcs_cap;
360         int i, nss;
361
362         /* 4SS, every two bits for MCS7/8/9 */
363         for (i = 0, nss = 12; i < 4; i++, mcs_map >>= 2, nss += 10) {
364                 vht_mcs_cap = mcs_map & 0x3;
365                 switch (vht_mcs_cap) {
366                 case 2: /* MCS9 */
367                         ra_mask |= 0x3ffULL << nss;
368                         break;
369                 case 1: /* MCS8 */
370                         ra_mask |= 0x1ffULL << nss;
371                         break;
372                 case 0: /* MCS7 */
373                         ra_mask |= 0x0ffULL << nss;
374                         break;
375                 default:
376                         break;
377                 }
378         }
379
380         return ra_mask;
381 }
382
383 static u8 get_rate_id(u8 wireless_set, enum rtw_bandwidth bw_mode, u8 tx_num)
384 {
385         u8 rate_id = 0;
386
387         switch (wireless_set) {
388         case WIRELESS_CCK:
389                 rate_id = RTW_RATEID_B_20M;
390                 break;
391         case WIRELESS_OFDM:
392                 rate_id = RTW_RATEID_G;
393                 break;
394         case WIRELESS_CCK | WIRELESS_OFDM:
395                 rate_id = RTW_RATEID_BG;
396                 break;
397         case WIRELESS_OFDM | WIRELESS_HT:
398                 if (tx_num == 1)
399                         rate_id = RTW_RATEID_GN_N1SS;
400                 else if (tx_num == 2)
401                         rate_id = RTW_RATEID_GN_N2SS;
402                 else if (tx_num == 3)
403                         rate_id = RTW_RATEID_ARFR5_N_3SS;
404                 break;
405         case WIRELESS_CCK | WIRELESS_OFDM | WIRELESS_HT:
406                 if (bw_mode == RTW_CHANNEL_WIDTH_40) {
407                         if (tx_num == 1)
408                                 rate_id = RTW_RATEID_BGN_40M_1SS;
409                         else if (tx_num == 2)
410                                 rate_id = RTW_RATEID_BGN_40M_2SS;
411                         else if (tx_num == 3)
412                                 rate_id = RTW_RATEID_ARFR5_N_3SS;
413                         else if (tx_num == 4)
414                                 rate_id = RTW_RATEID_ARFR7_N_4SS;
415                 } else {
416                         if (tx_num == 1)
417                                 rate_id = RTW_RATEID_BGN_20M_1SS;
418                         else if (tx_num == 2)
419                                 rate_id = RTW_RATEID_BGN_20M_2SS;
420                         else if (tx_num == 3)
421                                 rate_id = RTW_RATEID_ARFR5_N_3SS;
422                         else if (tx_num == 4)
423                                 rate_id = RTW_RATEID_ARFR7_N_4SS;
424                 }
425                 break;
426         case WIRELESS_OFDM | WIRELESS_VHT:
427                 if (tx_num == 1)
428                         rate_id = RTW_RATEID_ARFR1_AC_1SS;
429                 else if (tx_num == 2)
430                         rate_id = RTW_RATEID_ARFR0_AC_2SS;
431                 else if (tx_num == 3)
432                         rate_id = RTW_RATEID_ARFR4_AC_3SS;
433                 else if (tx_num == 4)
434                         rate_id = RTW_RATEID_ARFR6_AC_4SS;
435                 break;
436         case WIRELESS_CCK | WIRELESS_OFDM | WIRELESS_VHT:
437                 if (bw_mode >= RTW_CHANNEL_WIDTH_80) {
438                         if (tx_num == 1)
439                                 rate_id = RTW_RATEID_ARFR1_AC_1SS;
440                         else if (tx_num == 2)
441                                 rate_id = RTW_RATEID_ARFR0_AC_2SS;
442                         else if (tx_num == 3)
443                                 rate_id = RTW_RATEID_ARFR4_AC_3SS;
444                         else if (tx_num == 4)
445                                 rate_id = RTW_RATEID_ARFR6_AC_4SS;
446                 } else {
447                         if (tx_num == 1)
448                                 rate_id = RTW_RATEID_ARFR2_AC_2G_1SS;
449                         else if (tx_num == 2)
450                                 rate_id = RTW_RATEID_ARFR3_AC_2G_2SS;
451                         else if (tx_num == 3)
452                                 rate_id = RTW_RATEID_ARFR4_AC_3SS;
453                         else if (tx_num == 4)
454                                 rate_id = RTW_RATEID_ARFR6_AC_4SS;
455                 }
456                 break;
457         default:
458                 break;
459         }
460
461         return rate_id;
462 }
463
464 #define RA_MASK_CCK_RATES       0x0000f
465 #define RA_MASK_OFDM_RATES      0x00ff0
466 #define RA_MASK_HT_RATES_1SS    (0xff000ULL << 0)
467 #define RA_MASK_HT_RATES_2SS    (0xff000ULL << 8)
468 #define RA_MASK_HT_RATES_3SS    (0xff000ULL << 16)
469 #define RA_MASK_HT_RATES        (RA_MASK_HT_RATES_1SS | \
470                                  RA_MASK_HT_RATES_2SS | \
471                                  RA_MASK_HT_RATES_3SS)
472 #define RA_MASK_VHT_RATES_1SS   (0x3ff000ULL << 0)
473 #define RA_MASK_VHT_RATES_2SS   (0x3ff000ULL << 10)
474 #define RA_MASK_VHT_RATES_3SS   (0x3ff000ULL << 20)
475 #define RA_MASK_VHT_RATES       (RA_MASK_VHT_RATES_1SS | \
476                                  RA_MASK_VHT_RATES_2SS | \
477                                  RA_MASK_VHT_RATES_3SS)
478 #define RA_MASK_CCK_IN_HT       0x00005
479 #define RA_MASK_CCK_IN_VHT      0x00005
480 #define RA_MASK_OFDM_IN_VHT     0x00010
481 #define RA_MASK_OFDM_IN_HT_2G   0x00010
482 #define RA_MASK_OFDM_IN_HT_5G   0x00030
483
484 void rtw_update_sta_info(struct rtw_dev *rtwdev, struct rtw_sta_info *si)
485 {
486         struct ieee80211_sta *sta = si->sta;
487         struct rtw_efuse *efuse = &rtwdev->efuse;
488         struct rtw_hal *hal = &rtwdev->hal;
489         u8 rssi_level;
490         u8 wireless_set;
491         u8 bw_mode;
492         u8 rate_id;
493         u8 rf_type = RF_1T1R;
494         u8 stbc_en = 0;
495         u8 ldpc_en = 0;
496         u8 tx_num = 1;
497         u64 ra_mask = 0;
498         bool is_vht_enable = false;
499         bool is_support_sgi = false;
500
501         if (sta->vht_cap.vht_supported) {
502                 is_vht_enable = true;
503                 ra_mask |= get_vht_ra_mask(sta);
504                 if (sta->vht_cap.cap & IEEE80211_VHT_CAP_RXSTBC_MASK)
505                         stbc_en = VHT_STBC_EN;
506                 if (sta->vht_cap.cap & IEEE80211_VHT_CAP_RXLDPC)
507                         ldpc_en = VHT_LDPC_EN;
508                 if (sta->vht_cap.cap & IEEE80211_VHT_CAP_SHORT_GI_80)
509                         is_support_sgi = true;
510         } else if (sta->ht_cap.ht_supported) {
511                 ra_mask |= (sta->ht_cap.mcs.rx_mask[NL80211_BAND_5GHZ] << 20) |
512                            (sta->ht_cap.mcs.rx_mask[NL80211_BAND_2GHZ] << 12);
513                 if (sta->ht_cap.cap & IEEE80211_HT_CAP_RX_STBC)
514                         stbc_en = HT_STBC_EN;
515                 if (sta->ht_cap.cap & IEEE80211_HT_CAP_LDPC_CODING)
516                         ldpc_en = HT_LDPC_EN;
517                 if (sta->ht_cap.cap & IEEE80211_HT_CAP_SGI_20 ||
518                     sta->ht_cap.cap & IEEE80211_HT_CAP_SGI_40)
519                         is_support_sgi = true;
520         }
521
522         if (hal->current_band_type == RTW_BAND_5G) {
523                 ra_mask |= (u64)sta->supp_rates[NL80211_BAND_5GHZ] << 4;
524                 if (sta->vht_cap.vht_supported) {
525                         ra_mask &= RA_MASK_VHT_RATES | RA_MASK_OFDM_IN_VHT;
526                         wireless_set = WIRELESS_OFDM | WIRELESS_VHT;
527                 } else if (sta->ht_cap.ht_supported) {
528                         ra_mask &= RA_MASK_HT_RATES | RA_MASK_OFDM_IN_HT_5G;
529                         wireless_set = WIRELESS_OFDM | WIRELESS_HT;
530                 } else {
531                         wireless_set = WIRELESS_OFDM;
532                 }
533         } else if (hal->current_band_type == RTW_BAND_2G) {
534                 ra_mask |= sta->supp_rates[NL80211_BAND_2GHZ];
535                 if (sta->vht_cap.vht_supported) {
536                         ra_mask &= RA_MASK_VHT_RATES | RA_MASK_CCK_IN_VHT |
537                                    RA_MASK_OFDM_IN_VHT;
538                         wireless_set = WIRELESS_CCK | WIRELESS_OFDM |
539                                        WIRELESS_HT | WIRELESS_VHT;
540                 } else if (sta->ht_cap.ht_supported) {
541                         ra_mask &= RA_MASK_HT_RATES | RA_MASK_CCK_IN_HT |
542                                    RA_MASK_OFDM_IN_HT_2G;
543                         wireless_set = WIRELESS_CCK | WIRELESS_OFDM |
544                                        WIRELESS_HT;
545                 } else if (sta->supp_rates[0] <= 0xf) {
546                         wireless_set = WIRELESS_CCK;
547                 } else {
548                         wireless_set = WIRELESS_CCK | WIRELESS_OFDM;
549                 }
550         } else {
551                 rtw_err(rtwdev, "Unknown band type\n");
552                 wireless_set = 0;
553         }
554
555         if (efuse->hw_cap.nss == 1) {
556                 ra_mask &= RA_MASK_VHT_RATES_1SS;
557                 ra_mask &= RA_MASK_HT_RATES_1SS;
558         }
559
560         switch (sta->bandwidth) {
561         case IEEE80211_STA_RX_BW_80:
562                 bw_mode = RTW_CHANNEL_WIDTH_80;
563                 break;
564         case IEEE80211_STA_RX_BW_40:
565                 bw_mode = RTW_CHANNEL_WIDTH_40;
566                 break;
567         default:
568                 bw_mode = RTW_CHANNEL_WIDTH_20;
569                 break;
570         }
571
572         if (sta->vht_cap.vht_supported && ra_mask & 0xffc00000) {
573                 tx_num = 2;
574                 rf_type = RF_2T2R;
575         } else if (sta->ht_cap.ht_supported && ra_mask & 0xfff00000) {
576                 tx_num = 2;
577                 rf_type = RF_2T2R;
578         }
579
580         rate_id = get_rate_id(wireless_set, bw_mode, tx_num);
581
582         if (wireless_set != WIRELESS_CCK) {
583                 rssi_level = si->rssi_level;
584                 if (rssi_level == 0)
585                         ra_mask &= 0xffffffffffffffffULL;
586                 else if (rssi_level == 1)
587                         ra_mask &= 0xfffffffffffffff0ULL;
588                 else if (rssi_level == 2)
589                         ra_mask &= 0xffffffffffffefe0ULL;
590                 else if (rssi_level == 3)
591                         ra_mask &= 0xffffffffffffcfc0ULL;
592                 else if (rssi_level == 4)
593                         ra_mask &= 0xffffffffffff8f80ULL;
594                 else if (rssi_level >= 5)
595                         ra_mask &= 0xffffffffffff0f00ULL;
596         }
597
598         si->bw_mode = bw_mode;
599         si->stbc_en = stbc_en;
600         si->ldpc_en = ldpc_en;
601         si->rf_type = rf_type;
602         si->wireless_set = wireless_set;
603         si->sgi_enable = is_support_sgi;
604         si->vht_enable = is_vht_enable;
605         si->ra_mask = ra_mask;
606         si->rate_id = rate_id;
607
608         rtw_fw_send_ra_info(rtwdev, si);
609 }
610
611 static int rtw_power_on(struct rtw_dev *rtwdev)
612 {
613         struct rtw_chip_info *chip = rtwdev->chip;
614         struct rtw_fw_state *fw = &rtwdev->fw;
615         int ret;
616
617         ret = rtw_hci_setup(rtwdev);
618         if (ret) {
619                 rtw_err(rtwdev, "failed to setup hci\n");
620                 goto err;
621         }
622
623         /* power on MAC before firmware downloaded */
624         ret = rtw_mac_power_on(rtwdev);
625         if (ret) {
626                 rtw_err(rtwdev, "failed to power on mac\n");
627                 goto err;
628         }
629
630         wait_for_completion(&fw->completion);
631         if (!fw->firmware) {
632                 ret = -EINVAL;
633                 rtw_err(rtwdev, "failed to load firmware\n");
634                 goto err;
635         }
636
637         ret = rtw_download_firmware(rtwdev, fw);
638         if (ret) {
639                 rtw_err(rtwdev, "failed to download firmware\n");
640                 goto err_off;
641         }
642
643         /* config mac after firmware downloaded */
644         ret = rtw_mac_init(rtwdev);
645         if (ret) {
646                 rtw_err(rtwdev, "failed to configure mac\n");
647                 goto err_off;
648         }
649
650         chip->ops->phy_set_param(rtwdev);
651
652         ret = rtw_hci_start(rtwdev);
653         if (ret) {
654                 rtw_err(rtwdev, "failed to start hci\n");
655                 goto err_off;
656         }
657
658         return 0;
659
660 err_off:
661         rtw_mac_power_off(rtwdev);
662
663 err:
664         return ret;
665 }
666
667 int rtw_core_start(struct rtw_dev *rtwdev)
668 {
669         int ret;
670
671         ret = rtw_power_on(rtwdev);
672         if (ret)
673                 return ret;
674
675         rtw_sec_enable_sec_engine(rtwdev);
676
677         /* rcr reset after powered on */
678         rtw_write32(rtwdev, REG_RCR, rtwdev->hal.rcr);
679
680         ieee80211_queue_delayed_work(rtwdev->hw, &rtwdev->watch_dog_work,
681                                      RTW_WATCH_DOG_DELAY_TIME);
682
683         rtw_flag_set(rtwdev, RTW_FLAG_RUNNING);
684
685         return 0;
686 }
687
688 static void rtw_power_off(struct rtw_dev *rtwdev)
689 {
690         rtwdev->hci.ops->stop(rtwdev);
691         rtw_mac_power_off(rtwdev);
692 }
693
694 void rtw_core_stop(struct rtw_dev *rtwdev)
695 {
696         rtw_flag_clear(rtwdev, RTW_FLAG_RUNNING);
697         rtw_flag_clear(rtwdev, RTW_FLAG_FW_RUNNING);
698
699         cancel_delayed_work_sync(&rtwdev->watch_dog_work);
700
701         rtw_power_off(rtwdev);
702 }
703
704 static void rtw_init_ht_cap(struct rtw_dev *rtwdev,
705                             struct ieee80211_sta_ht_cap *ht_cap)
706 {
707         struct rtw_efuse *efuse = &rtwdev->efuse;
708
709         ht_cap->ht_supported = true;
710         ht_cap->cap = 0;
711         ht_cap->cap |= IEEE80211_HT_CAP_SGI_20 |
712                         IEEE80211_HT_CAP_MAX_AMSDU |
713                         IEEE80211_HT_CAP_LDPC_CODING |
714                         (1 << IEEE80211_HT_CAP_RX_STBC_SHIFT);
715         if (efuse->hw_cap.bw & BIT(RTW_CHANNEL_WIDTH_40))
716                 ht_cap->cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40 |
717                                 IEEE80211_HT_CAP_DSSSCCK40 |
718                                 IEEE80211_HT_CAP_SGI_40;
719         ht_cap->ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K;
720         ht_cap->ampdu_density = IEEE80211_HT_MPDU_DENSITY_16;
721         ht_cap->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
722         if (efuse->hw_cap.nss > 1) {
723                 ht_cap->mcs.rx_mask[0] = 0xFF;
724                 ht_cap->mcs.rx_mask[1] = 0xFF;
725                 ht_cap->mcs.rx_mask[4] = 0x01;
726                 ht_cap->mcs.rx_highest = cpu_to_le16(300);
727         } else {
728                 ht_cap->mcs.rx_mask[0] = 0xFF;
729                 ht_cap->mcs.rx_mask[1] = 0x00;
730                 ht_cap->mcs.rx_mask[4] = 0x01;
731                 ht_cap->mcs.rx_highest = cpu_to_le16(150);
732         }
733 }
734
735 static void rtw_init_vht_cap(struct rtw_dev *rtwdev,
736                              struct ieee80211_sta_vht_cap *vht_cap)
737 {
738         struct rtw_efuse *efuse = &rtwdev->efuse;
739         u16 mcs_map;
740         __le16 highest;
741
742         if (efuse->hw_cap.ptcl != EFUSE_HW_CAP_IGNORE &&
743             efuse->hw_cap.ptcl != EFUSE_HW_CAP_PTCL_VHT)
744                 return;
745
746         vht_cap->vht_supported = true;
747         vht_cap->cap = IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454 |
748                        IEEE80211_VHT_CAP_RXLDPC |
749                        IEEE80211_VHT_CAP_SHORT_GI_80 |
750                        IEEE80211_VHT_CAP_TXSTBC |
751                        IEEE80211_VHT_CAP_RXSTBC_1 |
752                        IEEE80211_VHT_CAP_HTC_VHT |
753                        IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_MASK |
754                        0;
755         mcs_map = IEEE80211_VHT_MCS_SUPPORT_0_9 << 0 |
756                   IEEE80211_VHT_MCS_NOT_SUPPORTED << 4 |
757                   IEEE80211_VHT_MCS_NOT_SUPPORTED << 6 |
758                   IEEE80211_VHT_MCS_NOT_SUPPORTED << 8 |
759                   IEEE80211_VHT_MCS_NOT_SUPPORTED << 10 |
760                   IEEE80211_VHT_MCS_NOT_SUPPORTED << 12 |
761                   IEEE80211_VHT_MCS_NOT_SUPPORTED << 14;
762         if (efuse->hw_cap.nss > 1) {
763                 highest = cpu_to_le16(780);
764                 mcs_map |= IEEE80211_VHT_MCS_SUPPORT_0_9 << 2;
765         } else {
766                 highest = cpu_to_le16(390);
767                 mcs_map |= IEEE80211_VHT_MCS_NOT_SUPPORTED << 2;
768         }
769
770         vht_cap->vht_mcs.rx_mcs_map = cpu_to_le16(mcs_map);
771         vht_cap->vht_mcs.tx_mcs_map = cpu_to_le16(mcs_map);
772         vht_cap->vht_mcs.rx_highest = highest;
773         vht_cap->vht_mcs.tx_highest = highest;
774 }
775
776 static void rtw_set_supported_band(struct ieee80211_hw *hw,
777                                    struct rtw_chip_info *chip)
778 {
779         struct rtw_dev *rtwdev = hw->priv;
780         struct ieee80211_supported_band *sband;
781
782         if (chip->band & RTW_BAND_2G) {
783                 sband = kmemdup(&rtw_band_2ghz, sizeof(*sband), GFP_KERNEL);
784                 if (!sband)
785                         goto err_out;
786                 if (chip->ht_supported)
787                         rtw_init_ht_cap(rtwdev, &sband->ht_cap);
788                 hw->wiphy->bands[NL80211_BAND_2GHZ] = sband;
789         }
790
791         if (chip->band & RTW_BAND_5G) {
792                 sband = kmemdup(&rtw_band_5ghz, sizeof(*sband), GFP_KERNEL);
793                 if (!sband)
794                         goto err_out;
795                 if (chip->ht_supported)
796                         rtw_init_ht_cap(rtwdev, &sband->ht_cap);
797                 if (chip->vht_supported)
798                         rtw_init_vht_cap(rtwdev, &sband->vht_cap);
799                 hw->wiphy->bands[NL80211_BAND_5GHZ] = sband;
800         }
801
802         return;
803
804 err_out:
805         rtw_err(rtwdev, "failed to set supported band\n");
806         kfree(sband);
807 }
808
809 static void rtw_unset_supported_band(struct ieee80211_hw *hw,
810                                      struct rtw_chip_info *chip)
811 {
812         kfree(hw->wiphy->bands[NL80211_BAND_2GHZ]);
813         kfree(hw->wiphy->bands[NL80211_BAND_5GHZ]);
814 }
815
816 static void rtw_load_firmware_cb(const struct firmware *firmware, void *context)
817 {
818         struct rtw_dev *rtwdev = context;
819         struct rtw_fw_state *fw = &rtwdev->fw;
820
821         if (!firmware)
822                 rtw_err(rtwdev, "failed to request firmware\n");
823
824         fw->firmware = firmware;
825         complete_all(&fw->completion);
826 }
827
828 static int rtw_load_firmware(struct rtw_dev *rtwdev, const char *fw_name)
829 {
830         struct rtw_fw_state *fw = &rtwdev->fw;
831         int ret;
832
833         init_completion(&fw->completion);
834
835         ret = request_firmware_nowait(THIS_MODULE, true, fw_name, rtwdev->dev,
836                                       GFP_KERNEL, rtwdev, rtw_load_firmware_cb);
837         if (ret) {
838                 rtw_err(rtwdev, "async firmware request failed\n");
839                 return ret;
840         }
841
842         return 0;
843 }
844
845 static int rtw_chip_parameter_setup(struct rtw_dev *rtwdev)
846 {
847         struct rtw_chip_info *chip = rtwdev->chip;
848         struct rtw_hal *hal = &rtwdev->hal;
849         struct rtw_efuse *efuse = &rtwdev->efuse;
850         u32 wl_bt_pwr_ctrl;
851         int ret = 0;
852
853         switch (rtw_hci_type(rtwdev)) {
854         case RTW_HCI_TYPE_PCIE:
855                 rtwdev->hci.rpwm_addr = 0x03d9;
856                 break;
857         default:
858                 rtw_err(rtwdev, "unsupported hci type\n");
859                 return -EINVAL;
860         }
861
862         wl_bt_pwr_ctrl = rtw_read32(rtwdev, REG_WL_BT_PWR_CTRL);
863         if (wl_bt_pwr_ctrl & BIT_BT_FUNC_EN)
864                 rtwdev->efuse.btcoex = true;
865         hal->chip_version = rtw_read32(rtwdev, REG_SYS_CFG1);
866         hal->fab_version = BIT_GET_VENDOR_ID(hal->chip_version) >> 2;
867         hal->cut_version = BIT_GET_CHIP_VER(hal->chip_version);
868         hal->mp_chip = (hal->chip_version & BIT_RTL_ID) ? 0 : 1;
869         if (hal->chip_version & BIT_RF_TYPE_ID) {
870                 hal->rf_type = RF_2T2R;
871                 hal->rf_path_num = 2;
872                 hal->antenna_tx = BB_PATH_AB;
873                 hal->antenna_rx = BB_PATH_AB;
874         } else {
875                 hal->rf_type = RF_1T1R;
876                 hal->rf_path_num = 1;
877                 hal->antenna_tx = BB_PATH_A;
878                 hal->antenna_rx = BB_PATH_A;
879         }
880
881         if (hal->fab_version == 2)
882                 hal->fab_version = 1;
883         else if (hal->fab_version == 1)
884                 hal->fab_version = 2;
885
886         efuse->physical_size = chip->phy_efuse_size;
887         efuse->logical_size = chip->log_efuse_size;
888         efuse->protect_size = chip->ptct_efuse_size;
889
890         /* default use ack */
891         rtwdev->hal.rcr |= BIT_VHT_DACK;
892
893         return ret;
894 }
895
896 static int rtw_chip_efuse_enable(struct rtw_dev *rtwdev)
897 {
898         struct rtw_fw_state *fw = &rtwdev->fw;
899         int ret;
900
901         ret = rtw_hci_setup(rtwdev);
902         if (ret) {
903                 rtw_err(rtwdev, "failed to setup hci\n");
904                 goto err;
905         }
906
907         ret = rtw_mac_power_on(rtwdev);
908         if (ret) {
909                 rtw_err(rtwdev, "failed to power on mac\n");
910                 goto err;
911         }
912
913         rtw_write8(rtwdev, REG_C2HEVT, C2H_HW_FEATURE_DUMP);
914
915         wait_for_completion(&fw->completion);
916         if (!fw->firmware) {
917                 ret = -EINVAL;
918                 rtw_err(rtwdev, "failed to load firmware\n");
919                 goto err;
920         }
921
922         ret = rtw_download_firmware(rtwdev, fw);
923         if (ret) {
924                 rtw_err(rtwdev, "failed to download firmware\n");
925                 goto err_off;
926         }
927
928         return 0;
929
930 err_off:
931         rtw_mac_power_off(rtwdev);
932
933 err:
934         return ret;
935 }
936
937 static int rtw_dump_hw_feature(struct rtw_dev *rtwdev)
938 {
939         struct rtw_efuse *efuse = &rtwdev->efuse;
940         u8 hw_feature[HW_FEATURE_LEN];
941         u8 id;
942         u8 bw;
943         int i;
944
945         id = rtw_read8(rtwdev, REG_C2HEVT);
946         if (id != C2H_HW_FEATURE_REPORT) {
947                 rtw_err(rtwdev, "failed to read hw feature report\n");
948                 return -EBUSY;
949         }
950
951         for (i = 0; i < HW_FEATURE_LEN; i++)
952                 hw_feature[i] = rtw_read8(rtwdev, REG_C2HEVT + 2 + i);
953
954         rtw_write8(rtwdev, REG_C2HEVT, 0);
955
956         bw = GET_EFUSE_HW_CAP_BW(hw_feature);
957         efuse->hw_cap.bw = hw_bw_cap_to_bitamp(bw);
958         efuse->hw_cap.hci = GET_EFUSE_HW_CAP_HCI(hw_feature);
959         efuse->hw_cap.nss = GET_EFUSE_HW_CAP_NSS(hw_feature);
960         efuse->hw_cap.ptcl = GET_EFUSE_HW_CAP_PTCL(hw_feature);
961         efuse->hw_cap.ant_num = GET_EFUSE_HW_CAP_ANT_NUM(hw_feature);
962
963         rtw_hw_config_rf_ant_num(rtwdev, efuse->hw_cap.ant_num);
964
965         if (efuse->hw_cap.nss == EFUSE_HW_CAP_IGNORE)
966                 efuse->hw_cap.nss = rtwdev->hal.rf_path_num;
967
968         rtw_dbg(rtwdev, RTW_DBG_EFUSE,
969                 "hw cap: hci=0x%02x, bw=0x%02x, ptcl=0x%02x, ant_num=%d, nss=%d\n",
970                 efuse->hw_cap.hci, efuse->hw_cap.bw, efuse->hw_cap.ptcl,
971                 efuse->hw_cap.ant_num, efuse->hw_cap.nss);
972
973         return 0;
974 }
975
976 static void rtw_chip_efuse_disable(struct rtw_dev *rtwdev)
977 {
978         rtw_hci_stop(rtwdev);
979         rtw_mac_power_off(rtwdev);
980 }
981
982 static int rtw_chip_efuse_info_setup(struct rtw_dev *rtwdev)
983 {
984         struct rtw_efuse *efuse = &rtwdev->efuse;
985         int ret;
986
987         mutex_lock(&rtwdev->mutex);
988
989         /* power on mac to read efuse */
990         ret = rtw_chip_efuse_enable(rtwdev);
991         if (ret)
992                 goto out;
993
994         ret = rtw_parse_efuse_map(rtwdev);
995         if (ret)
996                 goto out;
997
998         ret = rtw_dump_hw_feature(rtwdev);
999         if (ret)
1000                 goto out;
1001
1002         ret = rtw_check_supported_rfe(rtwdev);
1003         if (ret)
1004                 goto out;
1005
1006         if (efuse->crystal_cap == 0xff)
1007                 efuse->crystal_cap = 0;
1008         if (efuse->pa_type_2g == 0xff)
1009                 efuse->pa_type_2g = 0;
1010         if (efuse->pa_type_5g == 0xff)
1011                 efuse->pa_type_5g = 0;
1012         if (efuse->lna_type_2g == 0xff)
1013                 efuse->lna_type_2g = 0;
1014         if (efuse->lna_type_5g == 0xff)
1015                 efuse->lna_type_5g = 0;
1016         if (efuse->channel_plan == 0xff)
1017                 efuse->channel_plan = 0x7f;
1018         if (efuse->bt_setting & BIT(0))
1019                 efuse->share_ant = true;
1020         if (efuse->regd == 0xff)
1021                 efuse->regd = 0;
1022
1023         efuse->ext_pa_2g = efuse->pa_type_2g & BIT(4) ? 1 : 0;
1024         efuse->ext_lna_2g = efuse->lna_type_2g & BIT(3) ? 1 : 0;
1025         efuse->ext_pa_5g = efuse->pa_type_5g & BIT(0) ? 1 : 0;
1026         efuse->ext_lna_2g = efuse->lna_type_5g & BIT(3) ? 1 : 0;
1027
1028         rtw_chip_efuse_disable(rtwdev);
1029
1030 out:
1031         mutex_unlock(&rtwdev->mutex);
1032         return ret;
1033 }
1034
1035 static int rtw_chip_board_info_setup(struct rtw_dev *rtwdev)
1036 {
1037         struct rtw_hal *hal = &rtwdev->hal;
1038         const struct rtw_rfe_def *rfe_def = rtw_get_rfe_def(rtwdev);
1039
1040         if (!rfe_def)
1041                 return -ENODEV;
1042
1043         rtw_phy_setup_phy_cond(rtwdev, 0);
1044
1045         rtw_hw_init_tx_power(hal);
1046         rtw_load_table(rtwdev, rfe_def->phy_pg_tbl);
1047         rtw_load_table(rtwdev, rfe_def->txpwr_lmt_tbl);
1048         rtw_phy_tx_power_by_rate_config(hal);
1049         rtw_phy_tx_power_limit_config(hal);
1050
1051         return 0;
1052 }
1053
1054 int rtw_chip_info_setup(struct rtw_dev *rtwdev)
1055 {
1056         int ret;
1057
1058         ret = rtw_chip_parameter_setup(rtwdev);
1059         if (ret) {
1060                 rtw_err(rtwdev, "failed to setup chip parameters\n");
1061                 goto err_out;
1062         }
1063
1064         ret = rtw_chip_efuse_info_setup(rtwdev);
1065         if (ret) {
1066                 rtw_err(rtwdev, "failed to setup chip efuse info\n");
1067                 goto err_out;
1068         }
1069
1070         ret = rtw_chip_board_info_setup(rtwdev);
1071         if (ret) {
1072                 rtw_err(rtwdev, "failed to setup chip board info\n");
1073                 goto err_out;
1074         }
1075
1076         return 0;
1077
1078 err_out:
1079         return ret;
1080 }
1081 EXPORT_SYMBOL(rtw_chip_info_setup);
1082
1083 int rtw_core_init(struct rtw_dev *rtwdev)
1084 {
1085         int ret;
1086
1087         INIT_LIST_HEAD(&rtwdev->rsvd_page_list);
1088
1089         timer_setup(&rtwdev->tx_report.purge_timer,
1090                     rtw_tx_report_purge_timer, 0);
1091
1092         INIT_DELAYED_WORK(&rtwdev->watch_dog_work, rtw_watch_dog_work);
1093         INIT_DELAYED_WORK(&rtwdev->lps_work, rtw_lps_work);
1094         INIT_WORK(&rtwdev->c2h_work, rtw_c2h_work);
1095         skb_queue_head_init(&rtwdev->c2h_queue);
1096         skb_queue_head_init(&rtwdev->tx_report.queue);
1097
1098         spin_lock_init(&rtwdev->dm_lock);
1099         spin_lock_init(&rtwdev->rf_lock);
1100         spin_lock_init(&rtwdev->h2c.lock);
1101         spin_lock_init(&rtwdev->tx_report.q_lock);
1102
1103         mutex_init(&rtwdev->mutex);
1104         mutex_init(&rtwdev->hal.tx_power_mutex);
1105
1106         rtwdev->sec.total_cam_num = 32;
1107         rtwdev->hal.current_channel = 1;
1108         set_bit(RTW_BC_MC_MACID, rtwdev->mac_id_map);
1109
1110         mutex_lock(&rtwdev->mutex);
1111         rtw_add_rsvd_page(rtwdev, RSVD_BEACON, false);
1112         mutex_unlock(&rtwdev->mutex);
1113
1114         /* default rx filter setting */
1115         rtwdev->hal.rcr = BIT_APP_FCS | BIT_APP_MIC | BIT_APP_ICV |
1116                           BIT_HTC_LOC_CTRL | BIT_APP_PHYSTS |
1117                           BIT_AB | BIT_AM | BIT_APM;
1118
1119         ret = rtw_load_firmware(rtwdev, rtwdev->chip->fw_name);
1120         if (ret) {
1121                 rtw_warn(rtwdev, "no firmware loaded\n");
1122                 return ret;
1123         }
1124
1125         return 0;
1126 }
1127 EXPORT_SYMBOL(rtw_core_init);
1128
1129 void rtw_core_deinit(struct rtw_dev *rtwdev)
1130 {
1131         struct rtw_fw_state *fw = &rtwdev->fw;
1132         struct rtw_rsvd_page *rsvd_pkt, *tmp;
1133         unsigned long flags;
1134
1135         if (fw->firmware)
1136                 release_firmware(fw->firmware);
1137
1138         spin_lock_irqsave(&rtwdev->tx_report.q_lock, flags);
1139         skb_queue_purge(&rtwdev->tx_report.queue);
1140         spin_unlock_irqrestore(&rtwdev->tx_report.q_lock, flags);
1141
1142         list_for_each_entry_safe(rsvd_pkt, tmp, &rtwdev->rsvd_page_list, list) {
1143                 list_del(&rsvd_pkt->list);
1144                 kfree(rsvd_pkt);
1145         }
1146
1147         mutex_destroy(&rtwdev->mutex);
1148         mutex_destroy(&rtwdev->hal.tx_power_mutex);
1149 }
1150 EXPORT_SYMBOL(rtw_core_deinit);
1151
1152 int rtw_register_hw(struct rtw_dev *rtwdev, struct ieee80211_hw *hw)
1153 {
1154         int max_tx_headroom = 0;
1155         int ret;
1156
1157         /* TODO: USB & SDIO may need extra room? */
1158         max_tx_headroom = rtwdev->chip->tx_pkt_desc_sz;
1159
1160         hw->extra_tx_headroom = max_tx_headroom;
1161         hw->queues = IEEE80211_NUM_ACS;
1162         hw->sta_data_size = sizeof(struct rtw_sta_info);
1163         hw->vif_data_size = sizeof(struct rtw_vif);
1164
1165         ieee80211_hw_set(hw, SIGNAL_DBM);
1166         ieee80211_hw_set(hw, RX_INCLUDES_FCS);
1167         ieee80211_hw_set(hw, AMPDU_AGGREGATION);
1168         ieee80211_hw_set(hw, MFP_CAPABLE);
1169         ieee80211_hw_set(hw, REPORTS_TX_ACK_STATUS);
1170         ieee80211_hw_set(hw, SUPPORTS_PS);
1171         ieee80211_hw_set(hw, SUPPORTS_DYNAMIC_PS);
1172
1173         hw->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION) |
1174                                      BIT(NL80211_IFTYPE_AP) |
1175                                      BIT(NL80211_IFTYPE_ADHOC) |
1176                                      BIT(NL80211_IFTYPE_MESH_POINT);
1177
1178         hw->wiphy->flags |= WIPHY_FLAG_SUPPORTS_TDLS |
1179                             WIPHY_FLAG_TDLS_EXTERNAL_SETUP;
1180
1181         rtw_set_supported_band(hw, rtwdev->chip);
1182         SET_IEEE80211_PERM_ADDR(hw, rtwdev->efuse.addr);
1183
1184         rtw_regd_init(rtwdev, rtw_regd_notifier);
1185
1186         ret = ieee80211_register_hw(hw);
1187         if (ret) {
1188                 rtw_err(rtwdev, "failed to register hw\n");
1189                 return ret;
1190         }
1191
1192         if (regulatory_hint(hw->wiphy, rtwdev->regd.alpha2))
1193                 rtw_err(rtwdev, "regulatory_hint fail\n");
1194
1195         rtw_debugfs_init(rtwdev);
1196
1197         return 0;
1198 }
1199 EXPORT_SYMBOL(rtw_register_hw);
1200
1201 void rtw_unregister_hw(struct rtw_dev *rtwdev, struct ieee80211_hw *hw)
1202 {
1203         struct rtw_chip_info *chip = rtwdev->chip;
1204
1205         ieee80211_unregister_hw(hw);
1206         rtw_unset_supported_band(hw, chip);
1207 }
1208 EXPORT_SYMBOL(rtw_unregister_hw);
1209
1210 MODULE_AUTHOR("Realtek Corporation");
1211 MODULE_DESCRIPTION("Realtek 802.11ac wireless core module");
1212 MODULE_LICENSE("Dual BSD/GPL");