drivers/net/wireless/wl12xx/wl1271_io.c

   1 /*
   2  * This file is part of wl1271
   3  *
   4  * Copyright (C) 2008-2010 Nokia Corporation
   5  *
   6  * Contact: Luciano Coelho <luciano.coelho@nokia.com>
   7  *
   8  * This program is free software; you can redistribute it and/or
   9  * modify it under the terms of the GNU General Public License
  10  * version 2 as published by the Free Software Foundation.
  11  *
  12  * This program is distributed in the hope that it will be useful, but
  13  * WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  15  * General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU General Public License
  18  * along with this program; if not, write to the Free Software
  19  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
  20  * 02110-1301 USA
  21  *
  22  */
  23
  24 #include <linux/module.h>
  25 #include <linux/platform_device.h>
  26 #include <linux/crc7.h>
  27 #include <linux/spi/spi.h>
  28
  29 #include "wl1271.h"
  30 #include "wl12xx_80211.h"
  31 #include "wl1271_spi.h"
  32 #include "wl1271_io.h"
  33
  34 static int wl1271_translate_addr(struct wl1271 *wl, int addr)
  35 {
  36         /*
  37          * To translate, first check to which window of addresses the
  38          * particular address belongs. Then subtract the starting address
  39          * of that window from the address. Then, add offset of the
  40          * translated region.
  41          *
  42          * The translated regions occur next to each other in physical device
  43          * memory, so just add the sizes of the preceeding address regions to
  44          * get the offset to the new region.
  45          *
  46          * Currently, only the two first regions are addressed, and the
  47          * assumption is that all addresses will fall into either of those
  48          * two.
  49          */
  50         if ((addr >= wl->part.reg.start) &&
  51             (addr < wl->part.reg.start + wl->part.reg.size))
  52                 return addr - wl->part.reg.start + wl->part.mem.size;
  53         else
  54                 return addr - wl->part.mem.start;
  55 }
  56
  57 /* Set the SPI partitions to access the chip addresses
  58  *
  59  * To simplify driver code, a fixed (virtual) memory map is defined for
  60  * register and memory addresses. Because in the chipset, in different stages
  61  * of operation, those addresses will move around, an address translation
  62  * mechanism is required.
  63  *
  64  * There are four partitions (three memory and one register partition),
  65  * which are mapped to two different areas of the hardware memory.
  66  *
  67  *                                Virtual address
  68  *                                     space
  69  *
  70  *                                    |    |
  71  *                                 ...+----+--> mem.start
  72  *          Physical address    ...   |    |
  73  *               space       ...      |    | [PART_0]
  74  *                        ...         |    |
  75  *  00000000  <--+----+...         ...+----+--> mem.start + mem.size
  76  *               |    |         ...   |    |
  77  *               |MEM |      ...      |    |
  78  *               |    |   ...         |    |
  79  *  mem.size  <--+----+...            |    | {unused area)
  80  *               |    |   ...         |    |
  81  *               |REG |      ...      |    |
  82  *  mem.size     |    |         ...   |    |
  83  *      +     <--+----+...         ...+----+--> reg.start
  84  *  reg.size     |    |   ...         |    |
  85  *               |MEM2|      ...      |    | [PART_1]
  86  *               |    |         ...   |    |
  87  *                                 ...+----+--> reg.start + reg.size
  88  *                                    |    |
  89  *
  90  */
  91 int wl1271_set_partition(struct wl1271 *wl,
  92                          struct wl1271_partition_set *p)
  93 {
  94         /* copy partition info */
  95         memcpy(&wl->part, p, sizeof(*p));
  96
  97         wl1271_debug(DEBUG_SPI, "mem_start %08X mem_size %08X",
  98                      p->mem.start, p->mem.size);
  99         wl1271_debug(DEBUG_SPI, "reg_start %08X reg_size %08X",
 100                      p->reg.start, p->reg.size);
 101         wl1271_debug(DEBUG_SPI, "mem2_start %08X mem2_size %08X",
 102                      p->mem2.start, p->mem2.size);
 103         wl1271_debug(DEBUG_SPI, "mem3_start %08X mem3_size %08X",
 104                      p->mem3.start, p->mem3.size);
 105
 106         /* write partition info to the chipset */
 107         wl1271_raw_write32(wl, HW_PART0_START_ADDR, p->mem.start);
 108         wl1271_raw_write32(wl, HW_PART0_SIZE_ADDR, p->mem.size);
 109         wl1271_raw_write32(wl, HW_PART1_START_ADDR, p->reg.start);
 110         wl1271_raw_write32(wl, HW_PART1_SIZE_ADDR, p->reg.size);
 111         wl1271_raw_write32(wl, HW_PART2_START_ADDR, p->mem2.start);
 112         wl1271_raw_write32(wl, HW_PART2_SIZE_ADDR, p->mem2.size);
 113         wl1271_raw_write32(wl, HW_PART3_START_ADDR, p->mem3.start);
 114
 115         return 0;
 116 }
 117
 118 void wl1271_raw_write(struct wl1271 *wl, int addr, void *buf,
 119                       size_t len, bool fixed)
 120 {
 121         wl1271_spi_raw_write(wl, addr, buf, len, fixed);
 122 }
 123
 124 void wl1271_raw_read(struct wl1271 *wl, int addr, void *buf,
 125                      size_t len, bool fixed)
 126 {
 127         wl1271_spi_raw_read(wl, addr, buf, len, fixed);
 128 }
 129
 130 void wl1271_read(struct wl1271 *wl, int addr, void *buf, size_t len,
 131                      bool fixed)
 132 {
 133         int physical;
 134
 135         physical = wl1271_translate_addr(wl, addr);
 136
 137         wl1271_spi_raw_read(wl, physical, buf, len, fixed);
 138 }
 139
 140 void wl1271_write(struct wl1271 *wl, int addr, void *buf, size_t len,
 141                   bool fixed)
 142 {
 143         int physical;
 144
 145         physical = wl1271_translate_addr(wl, addr);
 146
 147         wl1271_spi_raw_write(wl, physical, buf, len, fixed);
 148 }
 149
 150 u32 wl1271_read32(struct wl1271 *wl, int addr)
 151 {
 152         return wl1271_raw_read32(wl, wl1271_translate_addr(wl, addr));
 153 }
 154
 155 void wl1271_write32(struct wl1271 *wl, int addr, u32 val)
 156 {
 157         wl1271_raw_write32(wl, wl1271_translate_addr(wl, addr), val);
 158 }
 159
 160 void wl1271_top_reg_write(struct wl1271 *wl, int addr, u16 val)
 161 {
 162         /* write address >> 1 + 0x30000 to OCP_POR_CTR */
 163         addr = (addr >> 1) + 0x30000;
 164         wl1271_write32(wl, OCP_POR_CTR, addr);
 165
 166         /* write value to OCP_POR_WDATA */
 167         wl1271_write32(wl, OCP_DATA_WRITE, val);
 168
 169         /* write 1 to OCP_CMD */
 170         wl1271_write32(wl, OCP_CMD, OCP_CMD_WRITE);
 171 }
 172
 173 u16 wl1271_top_reg_read(struct wl1271 *wl, int addr)
 174 {
 175         u32 val;
 176         int timeout = OCP_CMD_LOOP;
 177
 178         /* write address >> 1 + 0x30000 to OCP_POR_CTR */
 179         addr = (addr >> 1) + 0x30000;
 180         wl1271_write32(wl, OCP_POR_CTR, addr);
 181
 182         /* write 2 to OCP_CMD */
 183         wl1271_write32(wl, OCP_CMD, OCP_CMD_READ);
 184
 185         /* poll for data ready */
 186         do {
 187                 val = wl1271_read32(wl, OCP_DATA_READ);
 188         } while (!(val & OCP_READY_MASK) && --timeout);
 189
 190         if (!timeout) {
 191                 wl1271_warning("Top register access timed out.");
 192                 return 0xffff;
 193         }
 194
 195         /* check data status and return if OK */
 196         if ((val & OCP_STATUS_MASK) == OCP_STATUS_OK)
 197                 return val & 0xffff;
 198         else {
 199                 wl1271_warning("Top register access returned error.");
 200                 return 0xffff;
 201         }
 202 }
 203