1 // SPDX-License-Identifier: GPL-2.0+
3 * Compaq Hot Plug Controller Driver
5 * Copyright (C) 1995,2001 Compaq Computer Corporation
6 * Copyright (C) 2001 Greg Kroah-Hartman <greg@kroah.com>
7 * Copyright (C) 2001 IBM Corp.
11 * Send feedback to <greg@kroah.com>
13 * Jan 12, 2003 - Added 66/100/133MHz PCI-X support,
14 * Torben Mathiasen <torben.mathiasen@hp.com>
17 #include <linux/module.h>
18 #include <linux/moduleparam.h>
19 #include <linux/kernel.h>
20 #include <linux/types.h>
21 #include <linux/proc_fs.h>
22 #include <linux/slab.h>
23 #include <linux/workqueue.h>
24 #include <linux/pci.h>
25 #include <linux/pci_hotplug.h>
26 #include <linux/init.h>
27 #include <linux/interrupt.h>
29 #include <linux/uaccess.h>
32 #include "cpqphp_nvram.h"
35 /* Global variables */
37 int cpqhp_legacy_mode;
38 struct controller *cpqhp_ctrl_list; /* = NULL */
39 struct pci_func *cpqhp_slot_list[256];
40 struct irq_routing_table *cpqhp_routing_table;
43 static void __iomem *smbios_table;
44 static void __iomem *smbios_start;
45 static void __iomem *cpqhp_rom_start;
46 static bool power_mode;
48 static int initialized;
50 #define DRIVER_VERSION "0.9.8"
51 #define DRIVER_AUTHOR "Dan Zink <dan.zink@compaq.com>, Greg Kroah-Hartman <greg@kroah.com>"
52 #define DRIVER_DESC "Compaq Hot Plug PCI Controller Driver"
54 MODULE_AUTHOR(DRIVER_AUTHOR);
55 MODULE_DESCRIPTION(DRIVER_DESC);
56 MODULE_LICENSE("GPL");
58 module_param(power_mode, bool, 0644);
59 MODULE_PARM_DESC(power_mode, "Power mode enabled or not");
61 module_param(debug, bool, 0644);
62 MODULE_PARM_DESC(debug, "Debugging mode enabled or not");
64 #define CPQHPC_MODULE_MINOR 208
66 static inline int is_slot64bit(struct slot *slot)
68 return (readb(slot->p_sm_slot + SMBIOS_SLOT_WIDTH) == 0x06) ? 1 : 0;
71 static inline int is_slot66mhz(struct slot *slot)
73 return (readb(slot->p_sm_slot + SMBIOS_SLOT_TYPE) == 0x0E) ? 1 : 0;
77 * detect_SMBIOS_pointer - find the System Management BIOS Table in mem region.
78 * @begin: begin pointer for region to be scanned.
79 * @end: end pointer for region to be scanned.
81 * Returns pointer to the head of the SMBIOS tables (or %NULL).
83 static void __iomem *detect_SMBIOS_pointer(void __iomem *begin, void __iomem *end)
87 u8 temp1, temp2, temp3, temp4;
90 endp = (end - sizeof(u32) + 1);
92 for (fp = begin; fp <= endp; fp += 16) {
109 dbg("Discovered SMBIOS Entry point at %p\n", fp);
115 * init_SERR - Initializes the per slot SERR generation.
116 * @ctrl: controller to use
118 * For unexpected switch opens
120 static int init_SERR(struct controller *ctrl)
129 tempdword = ctrl->first_slot;
131 number_of_slots = readb(ctrl->hpc_reg + SLOT_MASK) & 0x0F;
132 /* Loop through slots */
133 while (number_of_slots) {
134 physical_slot = tempdword;
135 writeb(0, ctrl->hpc_reg + SLOT_SERR);
143 static int init_cpqhp_routing_table(void)
147 cpqhp_routing_table = pcibios_get_irq_routing_table();
148 if (cpqhp_routing_table == NULL)
151 len = cpqhp_routing_table_length();
153 kfree(cpqhp_routing_table);
154 cpqhp_routing_table = NULL;
161 /* nice debugging output */
162 static void pci_print_IRQ_route(void)
166 u8 tbus, tdevice, tslot;
168 len = cpqhp_routing_table_length();
170 dbg("bus dev func slot\n");
171 for (loop = 0; loop < len; ++loop) {
172 tbus = cpqhp_routing_table->slots[loop].bus;
173 tdevice = cpqhp_routing_table->slots[loop].devfn;
174 tslot = cpqhp_routing_table->slots[loop].slot;
175 dbg("%d %d %d %d\n", tbus, tdevice >> 3, tdevice & 0x7, tslot);
183 * get_subsequent_smbios_entry: get the next entry from bios table.
184 * @smbios_start: where to start in the SMBIOS table
185 * @smbios_table: location of the SMBIOS table
186 * @curr: %NULL or pointer to previously returned structure
188 * Gets the first entry if previous == NULL;
189 * otherwise, returns the next entry.
190 * Uses global SMBIOS Table pointer.
192 * Returns a pointer to an SMBIOS structure or NULL if none found.
194 static void __iomem *get_subsequent_smbios_entry(void __iomem *smbios_start,
195 void __iomem *smbios_table,
199 u8 previous_byte = 1;
200 void __iomem *p_temp;
203 if (!smbios_table || !curr)
206 /* set p_max to the end of the table */
207 p_max = smbios_start + readw(smbios_table + ST_LENGTH);
210 p_temp += readb(curr + SMBIOS_GENERIC_LENGTH);
212 while ((p_temp < p_max) && !bail) {
213 /* Look for the double NULL terminator
214 * The first condition is the previous byte
215 * and the second is the curr
217 if (!previous_byte && !(readb(p_temp)))
220 previous_byte = readb(p_temp);
232 * get_SMBIOS_entry - return the requested SMBIOS entry or %NULL
233 * @smbios_start: where to start in the SMBIOS table
234 * @smbios_table: location of the SMBIOS table
235 * @type: SMBIOS structure type to be returned
236 * @previous: %NULL or pointer to previously returned structure
238 * Gets the first entry of the specified type if previous == %NULL;
239 * Otherwise, returns the next entry of the given type.
240 * Uses global SMBIOS Table pointer.
241 * Uses get_subsequent_smbios_entry.
243 * Returns a pointer to an SMBIOS structure or %NULL if none found.
245 static void __iomem *get_SMBIOS_entry(void __iomem *smbios_start,
246 void __iomem *smbios_table,
248 void __iomem *previous)
254 previous = smbios_start;
256 previous = get_subsequent_smbios_entry(smbios_start,
257 smbios_table, previous);
260 if (readb(previous + SMBIOS_GENERIC_TYPE) != type)
261 previous = get_subsequent_smbios_entry(smbios_start,
262 smbios_table, previous);
269 static int ctrl_slot_cleanup(struct controller *ctrl)
271 struct slot *old_slot, *next_slot;
273 old_slot = ctrl->slot;
277 next_slot = old_slot->next;
278 pci_hp_deregister(old_slot->hotplug_slot);
279 kfree(old_slot->hotplug_slot);
281 old_slot = next_slot;
284 cpqhp_remove_debugfs_files(ctrl);
286 /* Free IRQ associated with hot plug device */
287 free_irq(ctrl->interrupt, ctrl);
288 /* Unmap the memory */
289 iounmap(ctrl->hpc_reg);
290 /* Finally reclaim PCI mem */
291 release_mem_region(pci_resource_start(ctrl->pci_dev, 0),
292 pci_resource_len(ctrl->pci_dev, 0));
299 * get_slot_mapping - determine logical slot mapping for PCI device
301 * Won't work for more than one PCI-PCI bridge in a slot.
303 * @bus_num - bus number of PCI device
304 * @dev_num - device number of PCI device
305 * @slot - Pointer to u8 where slot number will be returned
307 * Output: SUCCESS or FAILURE
310 get_slot_mapping(struct pci_bus *bus, u8 bus_num, u8 dev_num, u8 *slot)
316 u8 tbus, tdevice, tslot, bridgeSlot;
318 dbg("%s: %p, %d, %d, %p\n", __func__, bus, bus_num, dev_num, slot);
322 len = cpqhp_routing_table_length();
323 for (loop = 0; loop < len; ++loop) {
324 tbus = cpqhp_routing_table->slots[loop].bus;
325 tdevice = cpqhp_routing_table->slots[loop].devfn >> 3;
326 tslot = cpqhp_routing_table->slots[loop].slot;
328 if ((tbus == bus_num) && (tdevice == dev_num)) {
332 /* Did not get a match on the target PCI device. Check
333 * if the current IRQ table entry is a PCI-to-PCI
334 * bridge device. If so, and it's secondary bus
335 * matches the bus number for the target device, I need
336 * to save the bridge's slot number. If I can not find
337 * an entry for the target device, I will have to
338 * assume it's on the other side of the bridge, and
339 * assign it the bridge's slot.
342 pci_bus_read_config_dword(bus, PCI_DEVFN(tdevice, 0),
343 PCI_CLASS_REVISION, &work);
345 if ((work >> 8) == PCI_TO_PCI_BRIDGE_CLASS) {
346 pci_bus_read_config_dword(bus,
347 PCI_DEVFN(tdevice, 0),
348 PCI_PRIMARY_BUS, &work);
349 // See if bridge's secondary bus matches target bus.
350 if (((work >> 8) & 0x000000FF) == (long) bus_num)
357 /* If we got here, we didn't find an entry in the IRQ mapping table for
358 * the target PCI device. If we did determine that the target device
359 * is on the other side of a PCI-to-PCI bridge, return the slot number
362 if (bridgeSlot != 0xFF) {
366 /* Couldn't find an entry in the routing table for this PCI device */
372 * cpqhp_set_attention_status - Turns the Amber LED for a slot on or off
373 * @ctrl: struct controller to use
374 * @func: PCI device/function info
375 * @status: LED control flag: 1 = LED on, 0 = LED off
378 cpqhp_set_attention_status(struct controller *ctrl, struct pci_func *func,
386 hp_slot = func->device - ctrl->slot_device_offset;
388 /* Wait for exclusive access to hardware */
389 mutex_lock(&ctrl->crit_sect);
392 amber_LED_on(ctrl, hp_slot);
393 else if (status == 0)
394 amber_LED_off(ctrl, hp_slot);
396 /* Done with exclusive hardware access */
397 mutex_unlock(&ctrl->crit_sect);
403 /* Wait for SOBS to be unset */
404 wait_for_ctrl_irq(ctrl);
406 /* Done with exclusive hardware access */
407 mutex_unlock(&ctrl->crit_sect);
414 * set_attention_status - Turns the Amber LED for a slot on or off
415 * @hotplug_slot: slot to change LED on
416 * @status: LED control flag
418 static int set_attention_status(struct hotplug_slot *hotplug_slot, u8 status)
420 struct pci_func *slot_func;
421 struct slot *slot = hotplug_slot->private;
422 struct controller *ctrl = slot->ctrl;
428 dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
430 if (cpqhp_get_bus_dev(ctrl, &bus, &devfn, slot->number) == -1)
434 function = devfn & 0x7;
435 dbg("bus, dev, fn = %d, %d, %d\n", bus, device, function);
437 slot_func = cpqhp_slot_find(bus, device, function);
441 return cpqhp_set_attention_status(ctrl, slot_func, status);
445 static int process_SI(struct hotplug_slot *hotplug_slot)
447 struct pci_func *slot_func;
448 struct slot *slot = hotplug_slot->private;
449 struct controller *ctrl = slot->ctrl;
455 dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
457 if (cpqhp_get_bus_dev(ctrl, &bus, &devfn, slot->number) == -1)
461 function = devfn & 0x7;
462 dbg("bus, dev, fn = %d, %d, %d\n", bus, device, function);
464 slot_func = cpqhp_slot_find(bus, device, function);
468 slot_func->bus = bus;
469 slot_func->device = device;
470 slot_func->function = function;
471 slot_func->configured = 0;
472 dbg("board_added(%p, %p)\n", slot_func, ctrl);
473 return cpqhp_process_SI(ctrl, slot_func);
477 static int process_SS(struct hotplug_slot *hotplug_slot)
479 struct pci_func *slot_func;
480 struct slot *slot = hotplug_slot->private;
481 struct controller *ctrl = slot->ctrl;
487 dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
489 if (cpqhp_get_bus_dev(ctrl, &bus, &devfn, slot->number) == -1)
493 function = devfn & 0x7;
494 dbg("bus, dev, fn = %d, %d, %d\n", bus, device, function);
496 slot_func = cpqhp_slot_find(bus, device, function);
500 dbg("In %s, slot_func = %p, ctrl = %p\n", __func__, slot_func, ctrl);
501 return cpqhp_process_SS(ctrl, slot_func);
505 static int hardware_test(struct hotplug_slot *hotplug_slot, u32 value)
507 struct slot *slot = hotplug_slot->private;
508 struct controller *ctrl = slot->ctrl;
510 dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
512 return cpqhp_hardware_test(ctrl, value);
516 static int get_power_status(struct hotplug_slot *hotplug_slot, u8 *value)
518 struct slot *slot = hotplug_slot->private;
519 struct controller *ctrl = slot->ctrl;
521 dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
523 *value = get_slot_enabled(ctrl, slot);
527 static int get_attention_status(struct hotplug_slot *hotplug_slot, u8 *value)
529 struct slot *slot = hotplug_slot->private;
530 struct controller *ctrl = slot->ctrl;
532 dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
534 *value = cpq_get_attention_status(ctrl, slot);
538 static int get_latch_status(struct hotplug_slot *hotplug_slot, u8 *value)
540 struct slot *slot = hotplug_slot->private;
541 struct controller *ctrl = slot->ctrl;
543 dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
545 *value = cpq_get_latch_status(ctrl, slot);
550 static int get_adapter_status(struct hotplug_slot *hotplug_slot, u8 *value)
552 struct slot *slot = hotplug_slot->private;
553 struct controller *ctrl = slot->ctrl;
555 dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
557 *value = get_presence_status(ctrl, slot);
562 static const struct hotplug_slot_ops cpqphp_hotplug_slot_ops = {
563 .set_attention_status = set_attention_status,
564 .enable_slot = process_SI,
565 .disable_slot = process_SS,
566 .hardware_test = hardware_test,
567 .get_power_status = get_power_status,
568 .get_attention_status = get_attention_status,
569 .get_latch_status = get_latch_status,
570 .get_adapter_status = get_adapter_status,
573 #define SLOT_NAME_SIZE 10
575 static int ctrl_slot_setup(struct controller *ctrl,
576 void __iomem *smbios_start,
577 void __iomem *smbios_table)
580 struct hotplug_slot *hotplug_slot;
581 struct pci_bus *bus = ctrl->pci_bus;
587 char name[SLOT_NAME_SIZE];
588 void __iomem *slot_entry = NULL;
591 dbg("%s\n", __func__);
593 tempdword = readl(ctrl->hpc_reg + INT_INPUT_CLEAR);
595 number_of_slots = readb(ctrl->hpc_reg + SLOT_MASK) & 0x0F;
596 slot_device = readb(ctrl->hpc_reg + SLOT_MASK) >> 4;
597 slot_number = ctrl->first_slot;
599 while (number_of_slots) {
600 slot = kzalloc(sizeof(*slot), GFP_KERNEL);
606 slot->hotplug_slot = kzalloc(sizeof(*(slot->hotplug_slot)),
608 if (!slot->hotplug_slot) {
612 hotplug_slot = slot->hotplug_slot;
615 slot->bus = ctrl->bus;
616 slot->device = slot_device;
617 slot->number = slot_number;
618 dbg("slot->number = %u\n", slot->number);
620 slot_entry = get_SMBIOS_entry(smbios_start, smbios_table, 9,
623 while (slot_entry && (readw(slot_entry + SMBIOS_SLOT_NUMBER) !=
625 slot_entry = get_SMBIOS_entry(smbios_start,
626 smbios_table, 9, slot_entry);
629 slot->p_sm_slot = slot_entry;
631 timer_setup(&slot->task_event, cpqhp_pushbutton_thread, 0);
632 slot->task_event.expires = jiffies + 5 * HZ;
634 /*FIXME: these capabilities aren't used but if they are
635 * they need to be correctly implemented
637 slot->capabilities |= PCISLOT_REPLACE_SUPPORTED;
638 slot->capabilities |= PCISLOT_INTERLOCK_SUPPORTED;
640 if (is_slot64bit(slot))
641 slot->capabilities |= PCISLOT_64_BIT_SUPPORTED;
642 if (is_slot66mhz(slot))
643 slot->capabilities |= PCISLOT_66_MHZ_SUPPORTED;
644 if (bus->cur_bus_speed == PCI_SPEED_66MHz)
645 slot->capabilities |= PCISLOT_66_MHZ_OPERATION;
648 slot_device - (readb(ctrl->hpc_reg + SLOT_MASK) >> 4);
651 slot->capabilities |=
652 ((((~tempdword) >> 23) |
653 ((~tempdword) >> 15)) >> ctrl_slot) & 0x02;
654 /* Check the switch state */
655 slot->capabilities |=
656 ((~tempdword & 0xFF) >> ctrl_slot) & 0x01;
657 /* Check the slot enable */
658 slot->capabilities |=
659 ((read_slot_enable(ctrl) << 2) >> ctrl_slot) & 0x04;
661 /* register this slot with the hotplug pci core */
662 hotplug_slot->private = slot;
663 snprintf(name, SLOT_NAME_SIZE, "%u", slot->number);
664 hotplug_slot->ops = &cpqphp_hotplug_slot_ops;
666 dbg("registering bus %d, dev %d, number %d, ctrl->slot_device_offset %d, slot %d\n",
667 slot->bus, slot->device,
668 slot->number, ctrl->slot_device_offset,
670 result = pci_hp_register(hotplug_slot,
675 err("pci_hp_register failed with error %d\n", result);
679 slot->next = ctrl->slot;
696 static int one_time_init(void)
706 retval = init_cpqhp_routing_table();
711 pci_print_IRQ_route();
713 dbg("Initialize + Start the notification mechanism\n");
715 retval = cpqhp_event_start_thread();
719 dbg("Initialize slot lists\n");
720 for (loop = 0; loop < 256; loop++)
721 cpqhp_slot_list[loop] = NULL;
723 /* FIXME: We also need to hook the NMI handler eventually.
724 * this also needs to be worked with Christoph
725 * register_NMI_handler();
727 /* Map rom address */
728 cpqhp_rom_start = ioremap(ROM_PHY_ADDR, ROM_PHY_LEN);
729 if (!cpqhp_rom_start) {
730 err("Could not ioremap memory region for ROM\n");
735 /* Now, map the int15 entry point if we are on compaq specific
738 compaq_nvram_init(cpqhp_rom_start);
740 /* Map smbios table entry point structure */
741 smbios_table = detect_SMBIOS_pointer(cpqhp_rom_start,
742 cpqhp_rom_start + ROM_PHY_LEN);
744 err("Could not find the SMBIOS pointer in memory\n");
746 goto error_rom_start;
749 smbios_start = ioremap(readl(smbios_table + ST_ADDRESS),
750 readw(smbios_table + ST_LENGTH));
752 err("Could not ioremap memory region taken from SMBIOS values\n");
754 goto error_smbios_start;
762 iounmap(smbios_start);
764 iounmap(cpqhp_rom_start);
769 static int cpqhpc_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
778 u16 subsystem_deviceid;
780 struct controller *ctrl;
781 struct pci_func *func;
785 err = pci_enable_device(pdev);
787 printk(KERN_ERR MY_NAME ": cannot enable PCI device %s (%d)\n",
788 pci_name(pdev), err);
792 bus = pdev->subordinate;
794 pci_notice(pdev, "the device is not a bridge, skipping\n");
796 goto err_disable_device;
799 /* Need to read VID early b/c it's used to differentiate CPQ and INTC
802 vendor_id = pdev->vendor;
803 if ((vendor_id != PCI_VENDOR_ID_COMPAQ) &&
804 (vendor_id != PCI_VENDOR_ID_INTEL)) {
805 err(msg_HPC_non_compaq_or_intel);
807 goto err_disable_device;
809 dbg("Vendor ID: %x\n", vendor_id);
811 dbg("revision: %d\n", pdev->revision);
812 if ((vendor_id == PCI_VENDOR_ID_COMPAQ) && (!pdev->revision)) {
813 err(msg_HPC_rev_error);
815 goto err_disable_device;
818 /* Check for the proper subsystem IDs
819 * Intel uses a different SSID programming model than Compaq.
820 * For Intel, each SSID bit identifies a PHP capability.
821 * Also Intel HPCs may have RID=0.
823 if ((pdev->revision <= 2) && (vendor_id != PCI_VENDOR_ID_INTEL)) {
824 err(msg_HPC_not_supported);
826 goto err_disable_device;
829 /* TODO: This code can be made to support non-Compaq or Intel
832 subsystem_vid = pdev->subsystem_vendor;
833 dbg("Subsystem Vendor ID: %x\n", subsystem_vid);
834 if ((subsystem_vid != PCI_VENDOR_ID_COMPAQ) && (subsystem_vid != PCI_VENDOR_ID_INTEL)) {
835 err(msg_HPC_non_compaq_or_intel);
837 goto err_disable_device;
840 ctrl = kzalloc(sizeof(struct controller), GFP_KERNEL);
843 goto err_disable_device;
846 subsystem_deviceid = pdev->subsystem_device;
848 info("Hot Plug Subsystem Device ID: %x\n", subsystem_deviceid);
850 /* Set Vendor ID, so it can be accessed later from other
853 ctrl->vendor_id = vendor_id;
855 switch (subsystem_vid) {
856 case PCI_VENDOR_ID_COMPAQ:
857 if (pdev->revision >= 0x13) { /* CIOBX */
859 ctrl->slot_switch_type = 1;
860 ctrl->push_button = 1;
861 ctrl->pci_config_space = 1;
862 ctrl->defeature_PHP = 1;
863 ctrl->pcix_support = 1;
864 ctrl->pcix_speed_capability = 1;
865 pci_read_config_byte(pdev, 0x41, &bus_cap);
866 if (bus_cap & 0x80) {
867 dbg("bus max supports 133MHz PCI-X\n");
868 bus->max_bus_speed = PCI_SPEED_133MHz_PCIX;
871 if (bus_cap & 0x40) {
872 dbg("bus max supports 100MHz PCI-X\n");
873 bus->max_bus_speed = PCI_SPEED_100MHz_PCIX;
876 if (bus_cap & 0x20) {
877 dbg("bus max supports 66MHz PCI-X\n");
878 bus->max_bus_speed = PCI_SPEED_66MHz_PCIX;
881 if (bus_cap & 0x10) {
882 dbg("bus max supports 66MHz PCI\n");
883 bus->max_bus_speed = PCI_SPEED_66MHz;
890 switch (subsystem_deviceid) {
892 /* Original 6500/7000 implementation */
893 ctrl->slot_switch_type = 1;
894 bus->max_bus_speed = PCI_SPEED_33MHz;
895 ctrl->push_button = 0;
896 ctrl->pci_config_space = 1;
897 ctrl->defeature_PHP = 1;
898 ctrl->pcix_support = 0;
899 ctrl->pcix_speed_capability = 0;
901 case PCI_SUB_HPC_ID2:
902 /* First Pushbutton implementation */
904 ctrl->slot_switch_type = 1;
905 bus->max_bus_speed = PCI_SPEED_33MHz;
906 ctrl->push_button = 1;
907 ctrl->pci_config_space = 1;
908 ctrl->defeature_PHP = 1;
909 ctrl->pcix_support = 0;
910 ctrl->pcix_speed_capability = 0;
912 case PCI_SUB_HPC_ID_INTC:
913 /* Third party (6500/7000) */
914 ctrl->slot_switch_type = 1;
915 bus->max_bus_speed = PCI_SPEED_33MHz;
916 ctrl->push_button = 0;
917 ctrl->pci_config_space = 1;
918 ctrl->defeature_PHP = 1;
919 ctrl->pcix_support = 0;
920 ctrl->pcix_speed_capability = 0;
922 case PCI_SUB_HPC_ID3:
923 /* First 66 Mhz implementation */
925 ctrl->slot_switch_type = 1;
926 bus->max_bus_speed = PCI_SPEED_66MHz;
927 ctrl->push_button = 1;
928 ctrl->pci_config_space = 1;
929 ctrl->defeature_PHP = 1;
930 ctrl->pcix_support = 0;
931 ctrl->pcix_speed_capability = 0;
933 case PCI_SUB_HPC_ID4:
934 /* First PCI-X implementation, 100MHz */
936 ctrl->slot_switch_type = 1;
937 bus->max_bus_speed = PCI_SPEED_100MHz_PCIX;
938 ctrl->push_button = 1;
939 ctrl->pci_config_space = 1;
940 ctrl->defeature_PHP = 1;
941 ctrl->pcix_support = 1;
942 ctrl->pcix_speed_capability = 0;
945 err(msg_HPC_not_supported);
951 case PCI_VENDOR_ID_INTEL:
952 /* Check for speed capability (0=33, 1=66) */
953 if (subsystem_deviceid & 0x0001)
954 bus->max_bus_speed = PCI_SPEED_66MHz;
956 bus->max_bus_speed = PCI_SPEED_33MHz;
958 /* Check for push button */
959 if (subsystem_deviceid & 0x0002)
960 ctrl->push_button = 0;
962 ctrl->push_button = 1;
964 /* Check for slot switch type (0=mechanical, 1=not mechanical) */
965 if (subsystem_deviceid & 0x0004)
966 ctrl->slot_switch_type = 0;
968 ctrl->slot_switch_type = 1;
970 /* PHP Status (0=De-feature PHP, 1=Normal operation) */
971 if (subsystem_deviceid & 0x0008)
972 ctrl->defeature_PHP = 1; /* PHP supported */
974 ctrl->defeature_PHP = 0; /* PHP not supported */
976 /* Alternate Base Address Register Interface
977 * (0=not supported, 1=supported)
979 if (subsystem_deviceid & 0x0010)
980 ctrl->alternate_base_address = 1;
982 ctrl->alternate_base_address = 0;
984 /* PCI Config Space Index (0=not supported, 1=supported) */
985 if (subsystem_deviceid & 0x0020)
986 ctrl->pci_config_space = 1;
988 ctrl->pci_config_space = 0;
991 if (subsystem_deviceid & 0x0080) {
992 ctrl->pcix_support = 1;
993 if (subsystem_deviceid & 0x0040)
994 /* 133MHz PCI-X if bit 7 is 1 */
995 ctrl->pcix_speed_capability = 1;
997 /* 100MHz PCI-X if bit 7 is 1 and bit 0 is 0, */
998 /* 66MHz PCI-X if bit 7 is 1 and bit 0 is 1 */
999 ctrl->pcix_speed_capability = 0;
1001 /* Conventional PCI */
1002 ctrl->pcix_support = 0;
1003 ctrl->pcix_speed_capability = 0;
1008 err(msg_HPC_not_supported);
1013 /* Tell the user that we found one. */
1014 info("Initializing the PCI hot plug controller residing on PCI bus %d\n",
1017 dbg("Hotplug controller capabilities:\n");
1018 dbg(" speed_capability %d\n", bus->max_bus_speed);
1019 dbg(" slot_switch_type %s\n", ctrl->slot_switch_type ?
1020 "switch present" : "no switch");
1021 dbg(" defeature_PHP %s\n", ctrl->defeature_PHP ?
1022 "PHP supported" : "PHP not supported");
1023 dbg(" alternate_base_address %s\n", ctrl->alternate_base_address ?
1024 "supported" : "not supported");
1025 dbg(" pci_config_space %s\n", ctrl->pci_config_space ?
1026 "supported" : "not supported");
1027 dbg(" pcix_speed_capability %s\n", ctrl->pcix_speed_capability ?
1028 "supported" : "not supported");
1029 dbg(" pcix_support %s\n", ctrl->pcix_support ?
1030 "supported" : "not supported");
1032 ctrl->pci_dev = pdev;
1033 pci_set_drvdata(pdev, ctrl);
1035 /* make our own copy of the pci bus structure,
1036 * as we like tweaking it a lot */
1037 ctrl->pci_bus = kmemdup(pdev->bus, sizeof(*ctrl->pci_bus), GFP_KERNEL);
1038 if (!ctrl->pci_bus) {
1039 err("out of memory\n");
1044 ctrl->bus = pdev->bus->number;
1045 ctrl->rev = pdev->revision;
1046 dbg("bus device function rev: %d %d %d %d\n", ctrl->bus,
1047 PCI_SLOT(pdev->devfn), PCI_FUNC(pdev->devfn), ctrl->rev);
1049 mutex_init(&ctrl->crit_sect);
1050 init_waitqueue_head(&ctrl->queue);
1052 /* initialize our threads if they haven't already been started up */
1053 rc = one_time_init();
1057 dbg("pdev = %p\n", pdev);
1058 dbg("pci resource start %llx\n", (unsigned long long)pci_resource_start(pdev, 0));
1059 dbg("pci resource len %llx\n", (unsigned long long)pci_resource_len(pdev, 0));
1061 if (!request_mem_region(pci_resource_start(pdev, 0),
1062 pci_resource_len(pdev, 0), MY_NAME)) {
1063 err("cannot reserve MMIO region\n");
1068 ctrl->hpc_reg = ioremap(pci_resource_start(pdev, 0),
1069 pci_resource_len(pdev, 0));
1070 if (!ctrl->hpc_reg) {
1071 err("cannot remap MMIO region %llx @ %llx\n",
1072 (unsigned long long)pci_resource_len(pdev, 0),
1073 (unsigned long long)pci_resource_start(pdev, 0));
1075 goto err_free_mem_region;
1078 /* Check for 66Mhz operation */
1079 bus->cur_bus_speed = get_controller_speed(ctrl);
1082 /********************************************************
1084 * Save configuration headers for this and
1085 * subordinate PCI buses
1087 ********************************************************/
1089 /* find the physical slot number of the first hot plug slot */
1091 /* Get slot won't work for devices behind bridges, but
1092 * in this case it will always be called for the "base"
1093 * bus/dev/func of a slot.
1094 * CS: this is leveraging the PCIIRQ routing code from the kernel
1095 * (pci-pc.c: get_irq_routing_table) */
1096 rc = get_slot_mapping(ctrl->pci_bus, pdev->bus->number,
1097 (readb(ctrl->hpc_reg + SLOT_MASK) >> 4),
1098 &(ctrl->first_slot));
1099 dbg("get_slot_mapping: first_slot = %d, returned = %d\n",
1100 ctrl->first_slot, rc);
1102 err(msg_initialization_err, rc);
1106 /* Store PCI Config Space for all devices on this bus */
1107 rc = cpqhp_save_config(ctrl, ctrl->bus, readb(ctrl->hpc_reg + SLOT_MASK));
1109 err("%s: unable to save PCI configuration data, error %d\n",
1115 * Get IO, memory, and IRQ resources for new devices
1117 /* The next line is required for cpqhp_find_available_resources */
1118 ctrl->interrupt = pdev->irq;
1119 if (ctrl->interrupt < 0x10) {
1120 cpqhp_legacy_mode = 1;
1121 dbg("System seems to be configured for Full Table Mapped MPS mode\n");
1124 ctrl->cfgspc_irq = 0;
1125 pci_read_config_byte(pdev, PCI_INTERRUPT_LINE, &ctrl->cfgspc_irq);
1127 rc = cpqhp_find_available_resources(ctrl, cpqhp_rom_start);
1128 ctrl->add_support = !rc;
1130 dbg("cpqhp_find_available_resources = 0x%x\n", rc);
1131 err("unable to locate PCI configuration resources for hot plug add.\n");
1136 * Finish setting up the hot plug ctrl device
1138 ctrl->slot_device_offset = readb(ctrl->hpc_reg + SLOT_MASK) >> 4;
1139 dbg("NumSlots %d\n", ctrl->slot_device_offset);
1141 ctrl->next_event = 0;
1143 /* Setup the slot information structures */
1144 rc = ctrl_slot_setup(ctrl, smbios_start, smbios_table);
1146 err(msg_initialization_err, 6);
1147 err("%s: unable to save PCI configuration data, error %d\n",
1152 /* Mask all general input interrupts */
1153 writel(0xFFFFFFFFL, ctrl->hpc_reg + INT_MASK);
1155 /* set up the interrupt */
1156 dbg("HPC interrupt = %d\n", ctrl->interrupt);
1157 if (request_irq(ctrl->interrupt, cpqhp_ctrl_intr,
1158 IRQF_SHARED, MY_NAME, ctrl)) {
1159 err("Can't get irq %d for the hotplug pci controller\n",
1165 /* Enable Shift Out interrupt and clear it, also enable SERR on power
1168 temp_word = readw(ctrl->hpc_reg + MISC);
1169 temp_word |= 0x4006;
1170 writew(temp_word, ctrl->hpc_reg + MISC);
1172 /* Changed 05/05/97 to clear all interrupts at start */
1173 writel(0xFFFFFFFFL, ctrl->hpc_reg + INT_INPUT_CLEAR);
1175 ctrl->ctrl_int_comp = readl(ctrl->hpc_reg + INT_INPUT_CLEAR);
1177 writel(0x0L, ctrl->hpc_reg + INT_MASK);
1179 if (!cpqhp_ctrl_list) {
1180 cpqhp_ctrl_list = ctrl;
1183 ctrl->next = cpqhp_ctrl_list;
1184 cpqhp_ctrl_list = ctrl;
1187 /* turn off empty slots here unless command line option "ON" set
1188 * Wait for exclusive access to hardware
1190 mutex_lock(&ctrl->crit_sect);
1192 num_of_slots = readb(ctrl->hpc_reg + SLOT_MASK) & 0x0F;
1194 /* find first device number for the ctrl */
1195 device = readb(ctrl->hpc_reg + SLOT_MASK) >> 4;
1197 while (num_of_slots) {
1198 dbg("num_of_slots: %d\n", num_of_slots);
1199 func = cpqhp_slot_find(ctrl->bus, device, 0);
1203 hp_slot = func->device - ctrl->slot_device_offset;
1204 dbg("hp_slot: %d\n", hp_slot);
1206 /* We have to save the presence info for these slots */
1207 temp_word = ctrl->ctrl_int_comp >> 16;
1208 func->presence_save = (temp_word >> hp_slot) & 0x01;
1209 func->presence_save |= (temp_word >> (hp_slot + 7)) & 0x02;
1211 if (ctrl->ctrl_int_comp & (0x1L << hp_slot))
1212 func->switch_save = 0;
1214 func->switch_save = 0x10;
1217 if (!func->is_a_board) {
1218 green_LED_off(ctrl, hp_slot);
1219 slot_disable(ctrl, hp_slot);
1228 /* Wait for SOBS to be unset */
1229 wait_for_ctrl_irq(ctrl);
1232 rc = init_SERR(ctrl);
1234 err("init_SERR failed\n");
1235 mutex_unlock(&ctrl->crit_sect);
1239 /* Done with exclusive hardware access */
1240 mutex_unlock(&ctrl->crit_sect);
1242 cpqhp_create_debugfs_files(ctrl);
1247 free_irq(ctrl->interrupt, ctrl);
1249 iounmap(ctrl->hpc_reg);
1250 err_free_mem_region:
1251 release_mem_region(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0));
1253 kfree(ctrl->pci_bus);
1257 pci_disable_device(pdev);
1261 static void __exit unload_cpqphpd(void)
1263 struct pci_func *next;
1264 struct pci_func *TempSlot;
1267 struct controller *ctrl;
1268 struct controller *tctrl;
1269 struct pci_resource *res;
1270 struct pci_resource *tres;
1272 rc = compaq_nvram_store(cpqhp_rom_start);
1274 ctrl = cpqhp_ctrl_list;
1277 if (ctrl->hpc_reg) {
1279 rc = read_slot_enable(ctrl);
1281 writeb(0, ctrl->hpc_reg + SLOT_SERR);
1282 writel(0xFFFFFFC0L | ~rc, ctrl->hpc_reg + INT_MASK);
1284 misc = readw(ctrl->hpc_reg + MISC);
1286 writew(misc, ctrl->hpc_reg + MISC);
1289 ctrl_slot_cleanup(ctrl);
1291 res = ctrl->io_head;
1298 res = ctrl->mem_head;
1305 res = ctrl->p_mem_head;
1312 res = ctrl->bus_head;
1319 kfree(ctrl->pci_bus);
1326 for (loop = 0; loop < 256; loop++) {
1327 next = cpqhp_slot_list[loop];
1328 while (next != NULL) {
1329 res = next->io_head;
1336 res = next->mem_head;
1343 res = next->p_mem_head;
1350 res = next->bus_head;
1363 /* Stop the notification mechanism */
1365 cpqhp_event_stop_thread();
1367 /* unmap the rom address */
1368 if (cpqhp_rom_start)
1369 iounmap(cpqhp_rom_start);
1371 iounmap(smbios_start);
1374 static const struct pci_device_id hpcd_pci_tbl[] = {
1376 /* handle any PCI Hotplug controller */
1377 .class = ((PCI_CLASS_SYSTEM_PCI_HOTPLUG << 8) | 0x00),
1380 /* no matter who makes it */
1381 .vendor = PCI_ANY_ID,
1382 .device = PCI_ANY_ID,
1383 .subvendor = PCI_ANY_ID,
1384 .subdevice = PCI_ANY_ID,
1386 }, { /* end: all zeroes */ }
1389 MODULE_DEVICE_TABLE(pci, hpcd_pci_tbl);
1391 static struct pci_driver cpqhpc_driver = {
1392 .name = "compaq_pci_hotplug",
1393 .id_table = hpcd_pci_tbl,
1394 .probe = cpqhpc_probe,
1395 /* remove: cpqhpc_remove_one, */
1398 static int __init cpqhpc_init(void)
1402 cpqhp_debug = debug;
1404 info(DRIVER_DESC " version: " DRIVER_VERSION "\n");
1405 cpqhp_initialize_debugfs();
1406 result = pci_register_driver(&cpqhpc_driver);
1407 dbg("pci_register_driver = %d\n", result);
1411 static void __exit cpqhpc_cleanup(void)
1413 dbg("unload_cpqphpd()\n");
1416 dbg("pci_unregister_driver\n");
1417 pci_unregister_driver(&cpqhpc_driver);
1418 cpqhp_shutdown_debugfs();
1421 module_init(cpqhpc_init);
1422 module_exit(cpqhpc_cleanup);