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[uclinux-h8/linux.git] / drivers / phy / allwinner / phy-sun4i-usb.c
1 /*
2  * Allwinner sun4i USB phy driver
3  *
4  * Copyright (C) 2014-2015 Hans de Goede <hdegoede@redhat.com>
5  *
6  * Based on code from
7  * Allwinner Technology Co., Ltd. <www.allwinnertech.com>
8  *
9  * Modelled after: Samsung S5P/EXYNOS SoC series MIPI CSIS/DSIM DPHY driver
10  * Copyright (C) 2013 Samsung Electronics Co., Ltd.
11  * Author: Sylwester Nawrocki <s.nawrocki@samsung.com>
12  *
13  * This program is free software; you can redistribute it and/or modify
14  * it under the terms of the GNU General Public License as published by
15  * the Free Software Foundation; either version 2 of the License, or
16  * (at your option) any later version.
17  *
18  * This program is distributed in the hope that it will be useful,
19  * but WITHOUT ANY WARRANTY; without even the implied warranty of
20  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
21  * GNU General Public License for more details.
22  */
23
24 #include <linux/clk.h>
25 #include <linux/delay.h>
26 #include <linux/err.h>
27 #include <linux/extcon-provider.h>
28 #include <linux/io.h>
29 #include <linux/interrupt.h>
30 #include <linux/kernel.h>
31 #include <linux/module.h>
32 #include <linux/mutex.h>
33 #include <linux/of.h>
34 #include <linux/of_address.h>
35 #include <linux/of_device.h>
36 #include <linux/of_gpio.h>
37 #include <linux/phy/phy.h>
38 #include <linux/phy/phy-sun4i-usb.h>
39 #include <linux/platform_device.h>
40 #include <linux/power_supply.h>
41 #include <linux/regulator/consumer.h>
42 #include <linux/reset.h>
43 #include <linux/spinlock.h>
44 #include <linux/usb/of.h>
45 #include <linux/workqueue.h>
46
47 #define REG_ISCR                        0x00
48 #define REG_PHYCTL_A10                  0x04
49 #define REG_PHYBIST                     0x08
50 #define REG_PHYTUNE                     0x0c
51 #define REG_PHYCTL_A33                  0x10
52 #define REG_PHY_OTGCTL                  0x20
53
54 #define REG_PMU_UNK1                    0x10
55
56 #define PHYCTL_DATA                     BIT(7)
57
58 #define OTGCTL_ROUTE_MUSB               BIT(0)
59
60 #define SUNXI_AHB_ICHR8_EN              BIT(10)
61 #define SUNXI_AHB_INCR4_BURST_EN        BIT(9)
62 #define SUNXI_AHB_INCRX_ALIGN_EN        BIT(8)
63 #define SUNXI_ULPI_BYPASS_EN            BIT(0)
64
65 /* ISCR, Interface Status and Control bits */
66 #define ISCR_ID_PULLUP_EN               (1 << 17)
67 #define ISCR_DPDM_PULLUP_EN     (1 << 16)
68 /* sunxi has the phy id/vbus pins not connected, so we use the force bits */
69 #define ISCR_FORCE_ID_MASK      (3 << 14)
70 #define ISCR_FORCE_ID_LOW               (2 << 14)
71 #define ISCR_FORCE_ID_HIGH      (3 << 14)
72 #define ISCR_FORCE_VBUS_MASK    (3 << 12)
73 #define ISCR_FORCE_VBUS_LOW     (2 << 12)
74 #define ISCR_FORCE_VBUS_HIGH    (3 << 12)
75
76 /* Common Control Bits for Both PHYs */
77 #define PHY_PLL_BW                      0x03
78 #define PHY_RES45_CAL_EN                0x0c
79
80 /* Private Control Bits for Each PHY */
81 #define PHY_TX_AMPLITUDE_TUNE           0x20
82 #define PHY_TX_SLEWRATE_TUNE            0x22
83 #define PHY_VBUSVALID_TH_SEL            0x25
84 #define PHY_PULLUP_RES_SEL              0x27
85 #define PHY_OTG_FUNC_EN                 0x28
86 #define PHY_VBUS_DET_EN                 0x29
87 #define PHY_DISCON_TH_SEL               0x2a
88 #define PHY_SQUELCH_DETECT              0x3c
89
90 /* A83T specific control bits for PHY0 */
91 #define PHY_CTL_VBUSVLDEXT              BIT(5)
92 #define PHY_CTL_SIDDQ                   BIT(3)
93
94 /* A83T specific control bits for PHY2 HSIC */
95 #define SUNXI_EHCI_HS_FORCE             BIT(20)
96 #define SUNXI_HSIC_CONNECT_DET          BIT(17)
97 #define SUNXI_HSIC_CONNECT_INT          BIT(16)
98 #define SUNXI_HSIC                      BIT(1)
99
100 #define MAX_PHYS                        4
101
102 /*
103  * Note do not raise the debounce time, we must report Vusb high within 100ms
104  * otherwise we get Vbus errors
105  */
106 #define DEBOUNCE_TIME                   msecs_to_jiffies(50)
107 #define POLL_TIME                       msecs_to_jiffies(250)
108
109 enum sun4i_usb_phy_type {
110         sun4i_a10_phy,
111         sun6i_a31_phy,
112         sun8i_a33_phy,
113         sun8i_a83t_phy,
114         sun8i_h3_phy,
115         sun8i_r40_phy,
116         sun8i_v3s_phy,
117         sun50i_a64_phy,
118         sun50i_h6_phy,
119 };
120
121 struct sun4i_usb_phy_cfg {
122         int num_phys;
123         int hsic_index;
124         enum sun4i_usb_phy_type type;
125         u32 disc_thresh;
126         u8 phyctl_offset;
127         bool dedicated_clocks;
128         bool enable_pmu_unk1;
129         bool phy0_dual_route;
130         int missing_phys;
131 };
132
133 struct sun4i_usb_phy_data {
134         void __iomem *base;
135         const struct sun4i_usb_phy_cfg *cfg;
136         enum usb_dr_mode dr_mode;
137         spinlock_t reg_lock; /* guard access to phyctl reg */
138         struct sun4i_usb_phy {
139                 struct phy *phy;
140                 void __iomem *pmu;
141                 struct regulator *vbus;
142                 struct reset_control *reset;
143                 struct clk *clk;
144                 struct clk *clk2;
145                 bool regulator_on;
146                 int index;
147         } phys[MAX_PHYS];
148         /* phy0 / otg related variables */
149         struct extcon_dev *extcon;
150         bool phy0_init;
151         struct gpio_desc *id_det_gpio;
152         struct gpio_desc *vbus_det_gpio;
153         struct power_supply *vbus_power_supply;
154         struct notifier_block vbus_power_nb;
155         bool vbus_power_nb_registered;
156         bool force_session_end;
157         int id_det_irq;
158         int vbus_det_irq;
159         int id_det;
160         int vbus_det;
161         struct delayed_work detect;
162 };
163
164 #define to_sun4i_usb_phy_data(phy) \
165         container_of((phy), struct sun4i_usb_phy_data, phys[(phy)->index])
166
167 static void sun4i_usb_phy0_update_iscr(struct phy *_phy, u32 clr, u32 set)
168 {
169         struct sun4i_usb_phy *phy = phy_get_drvdata(_phy);
170         struct sun4i_usb_phy_data *data = to_sun4i_usb_phy_data(phy);
171         u32 iscr;
172
173         iscr = readl(data->base + REG_ISCR);
174         iscr &= ~clr;
175         iscr |= set;
176         writel(iscr, data->base + REG_ISCR);
177 }
178
179 static void sun4i_usb_phy0_set_id_detect(struct phy *phy, u32 val)
180 {
181         if (val)
182                 val = ISCR_FORCE_ID_HIGH;
183         else
184                 val = ISCR_FORCE_ID_LOW;
185
186         sun4i_usb_phy0_update_iscr(phy, ISCR_FORCE_ID_MASK, val);
187 }
188
189 static void sun4i_usb_phy0_set_vbus_detect(struct phy *phy, u32 val)
190 {
191         if (val)
192                 val = ISCR_FORCE_VBUS_HIGH;
193         else
194                 val = ISCR_FORCE_VBUS_LOW;
195
196         sun4i_usb_phy0_update_iscr(phy, ISCR_FORCE_VBUS_MASK, val);
197 }
198
199 static void sun4i_usb_phy_write(struct sun4i_usb_phy *phy, u32 addr, u32 data,
200                                 int len)
201 {
202         struct sun4i_usb_phy_data *phy_data = to_sun4i_usb_phy_data(phy);
203         u32 temp, usbc_bit = BIT(phy->index * 2);
204         void __iomem *phyctl = phy_data->base + phy_data->cfg->phyctl_offset;
205         unsigned long flags;
206         int i;
207
208         spin_lock_irqsave(&phy_data->reg_lock, flags);
209
210         if (phy_data->cfg->phyctl_offset == REG_PHYCTL_A33) {
211                 /* SoCs newer than A33 need us to set phyctl to 0 explicitly */
212                 writel(0, phyctl);
213         }
214
215         for (i = 0; i < len; i++) {
216                 temp = readl(phyctl);
217
218                 /* clear the address portion */
219                 temp &= ~(0xff << 8);
220
221                 /* set the address */
222                 temp |= ((addr + i) << 8);
223                 writel(temp, phyctl);
224
225                 /* set the data bit and clear usbc bit*/
226                 temp = readb(phyctl);
227                 if (data & 0x1)
228                         temp |= PHYCTL_DATA;
229                 else
230                         temp &= ~PHYCTL_DATA;
231                 temp &= ~usbc_bit;
232                 writeb(temp, phyctl);
233
234                 /* pulse usbc_bit */
235                 temp = readb(phyctl);
236                 temp |= usbc_bit;
237                 writeb(temp, phyctl);
238
239                 temp = readb(phyctl);
240                 temp &= ~usbc_bit;
241                 writeb(temp, phyctl);
242
243                 data >>= 1;
244         }
245
246         spin_unlock_irqrestore(&phy_data->reg_lock, flags);
247 }
248
249 static void sun4i_usb_phy_passby(struct sun4i_usb_phy *phy, int enable)
250 {
251         struct sun4i_usb_phy_data *phy_data = to_sun4i_usb_phy_data(phy);
252         u32 bits, reg_value;
253
254         if (!phy->pmu)
255                 return;
256
257         bits = SUNXI_AHB_ICHR8_EN | SUNXI_AHB_INCR4_BURST_EN |
258                 SUNXI_AHB_INCRX_ALIGN_EN | SUNXI_ULPI_BYPASS_EN;
259
260         /* A83T USB2 is HSIC */
261         if (phy_data->cfg->type == sun8i_a83t_phy && phy->index == 2)
262                 bits |= SUNXI_EHCI_HS_FORCE | SUNXI_HSIC_CONNECT_INT |
263                         SUNXI_HSIC;
264
265         reg_value = readl(phy->pmu);
266
267         if (enable)
268                 reg_value |= bits;
269         else
270                 reg_value &= ~bits;
271
272         writel(reg_value, phy->pmu);
273 }
274
275 static int sun4i_usb_phy_init(struct phy *_phy)
276 {
277         struct sun4i_usb_phy *phy = phy_get_drvdata(_phy);
278         struct sun4i_usb_phy_data *data = to_sun4i_usb_phy_data(phy);
279         int ret;
280         u32 val;
281
282         ret = clk_prepare_enable(phy->clk);
283         if (ret)
284                 return ret;
285
286         ret = clk_prepare_enable(phy->clk2);
287         if (ret) {
288                 clk_disable_unprepare(phy->clk);
289                 return ret;
290         }
291
292         ret = reset_control_deassert(phy->reset);
293         if (ret) {
294                 clk_disable_unprepare(phy->clk2);
295                 clk_disable_unprepare(phy->clk);
296                 return ret;
297         }
298
299         if (data->cfg->type == sun8i_a83t_phy ||
300             data->cfg->type == sun50i_h6_phy) {
301                 if (phy->index == 0) {
302                         val = readl(data->base + data->cfg->phyctl_offset);
303                         val |= PHY_CTL_VBUSVLDEXT;
304                         val &= ~PHY_CTL_SIDDQ;
305                         writel(val, data->base + data->cfg->phyctl_offset);
306                 }
307         } else {
308                 if (phy->pmu && data->cfg->enable_pmu_unk1) {
309                         val = readl(phy->pmu + REG_PMU_UNK1);
310                         writel(val & ~2, phy->pmu + REG_PMU_UNK1);
311                 }
312
313                 /* Enable USB 45 Ohm resistor calibration */
314                 if (phy->index == 0)
315                         sun4i_usb_phy_write(phy, PHY_RES45_CAL_EN, 0x01, 1);
316
317                 /* Adjust PHY's magnitude and rate */
318                 sun4i_usb_phy_write(phy, PHY_TX_AMPLITUDE_TUNE, 0x14, 5);
319
320                 /* Disconnect threshold adjustment */
321                 sun4i_usb_phy_write(phy, PHY_DISCON_TH_SEL,
322                                     data->cfg->disc_thresh, 2);
323         }
324
325         sun4i_usb_phy_passby(phy, 1);
326
327         if (phy->index == 0) {
328                 data->phy0_init = true;
329
330                 /* Enable pull-ups */
331                 sun4i_usb_phy0_update_iscr(_phy, 0, ISCR_DPDM_PULLUP_EN);
332                 sun4i_usb_phy0_update_iscr(_phy, 0, ISCR_ID_PULLUP_EN);
333
334                 /* Force ISCR and cable state updates */
335                 data->id_det = -1;
336                 data->vbus_det = -1;
337                 queue_delayed_work(system_wq, &data->detect, 0);
338         }
339
340         return 0;
341 }
342
343 static int sun4i_usb_phy_exit(struct phy *_phy)
344 {
345         struct sun4i_usb_phy *phy = phy_get_drvdata(_phy);
346         struct sun4i_usb_phy_data *data = to_sun4i_usb_phy_data(phy);
347
348         if (phy->index == 0) {
349                 if (data->cfg->type == sun8i_a83t_phy ||
350                     data->cfg->type == sun50i_h6_phy) {
351                         void __iomem *phyctl = data->base +
352                                 data->cfg->phyctl_offset;
353
354                         writel(readl(phyctl) | PHY_CTL_SIDDQ, phyctl);
355                 }
356
357                 /* Disable pull-ups */
358                 sun4i_usb_phy0_update_iscr(_phy, ISCR_DPDM_PULLUP_EN, 0);
359                 sun4i_usb_phy0_update_iscr(_phy, ISCR_ID_PULLUP_EN, 0);
360                 data->phy0_init = false;
361         }
362
363         sun4i_usb_phy_passby(phy, 0);
364         reset_control_assert(phy->reset);
365         clk_disable_unprepare(phy->clk2);
366         clk_disable_unprepare(phy->clk);
367
368         return 0;
369 }
370
371 static int sun4i_usb_phy0_get_id_det(struct sun4i_usb_phy_data *data)
372 {
373         switch (data->dr_mode) {
374         case USB_DR_MODE_OTG:
375                 if (data->id_det_gpio)
376                         return gpiod_get_value_cansleep(data->id_det_gpio);
377                 else
378                         return 1; /* Fallback to peripheral mode */
379         case USB_DR_MODE_HOST:
380                 return 0;
381         case USB_DR_MODE_PERIPHERAL:
382         default:
383                 return 1;
384         }
385 }
386
387 static int sun4i_usb_phy0_get_vbus_det(struct sun4i_usb_phy_data *data)
388 {
389         if (data->vbus_det_gpio)
390                 return gpiod_get_value_cansleep(data->vbus_det_gpio);
391
392         if (data->vbus_power_supply) {
393                 union power_supply_propval val;
394                 int r;
395
396                 r = power_supply_get_property(data->vbus_power_supply,
397                                               POWER_SUPPLY_PROP_PRESENT, &val);
398                 if (r == 0)
399                         return val.intval;
400         }
401
402         /* Fallback: report vbus as high */
403         return 1;
404 }
405
406 static bool sun4i_usb_phy0_have_vbus_det(struct sun4i_usb_phy_data *data)
407 {
408         return data->vbus_det_gpio || data->vbus_power_supply;
409 }
410
411 static bool sun4i_usb_phy0_poll(struct sun4i_usb_phy_data *data)
412 {
413         if ((data->id_det_gpio && data->id_det_irq <= 0) ||
414             (data->vbus_det_gpio && data->vbus_det_irq <= 0))
415                 return true;
416
417         /*
418          * The A31/A23/A33 companion pmics (AXP221/AXP223) do not
419          * generate vbus change interrupts when the board is driving
420          * vbus using the N_VBUSEN pin on the pmic, so we must poll
421          * when using the pmic for vbus-det _and_ we're driving vbus.
422          */
423         if ((data->cfg->type == sun6i_a31_phy ||
424              data->cfg->type == sun8i_a33_phy) &&
425             data->vbus_power_supply && data->phys[0].regulator_on)
426                 return true;
427
428         return false;
429 }
430
431 static int sun4i_usb_phy_power_on(struct phy *_phy)
432 {
433         struct sun4i_usb_phy *phy = phy_get_drvdata(_phy);
434         struct sun4i_usb_phy_data *data = to_sun4i_usb_phy_data(phy);
435         int ret;
436
437         if (!phy->vbus || phy->regulator_on)
438                 return 0;
439
440         /* For phy0 only turn on Vbus if we don't have an ext. Vbus */
441         if (phy->index == 0 && sun4i_usb_phy0_have_vbus_det(data) &&
442                                 data->vbus_det) {
443                 dev_warn(&_phy->dev, "External vbus detected, not enabling our own vbus\n");
444                 return 0;
445         }
446
447         ret = regulator_enable(phy->vbus);
448         if (ret)
449                 return ret;
450
451         phy->regulator_on = true;
452
453         /* We must report Vbus high within OTG_TIME_A_WAIT_VRISE msec. */
454         if (phy->index == 0 && sun4i_usb_phy0_poll(data))
455                 mod_delayed_work(system_wq, &data->detect, DEBOUNCE_TIME);
456
457         return 0;
458 }
459
460 static int sun4i_usb_phy_power_off(struct phy *_phy)
461 {
462         struct sun4i_usb_phy *phy = phy_get_drvdata(_phy);
463         struct sun4i_usb_phy_data *data = to_sun4i_usb_phy_data(phy);
464
465         if (!phy->vbus || !phy->regulator_on)
466                 return 0;
467
468         regulator_disable(phy->vbus);
469         phy->regulator_on = false;
470
471         /*
472          * phy0 vbus typically slowly discharges, sometimes this causes the
473          * Vbus gpio to not trigger an edge irq on Vbus off, so force a rescan.
474          */
475         if (phy->index == 0 && !sun4i_usb_phy0_poll(data))
476                 mod_delayed_work(system_wq, &data->detect, POLL_TIME);
477
478         return 0;
479 }
480
481 static int sun4i_usb_phy_set_mode(struct phy *_phy,
482                                   enum phy_mode mode, int submode)
483 {
484         struct sun4i_usb_phy *phy = phy_get_drvdata(_phy);
485         struct sun4i_usb_phy_data *data = to_sun4i_usb_phy_data(phy);
486         int new_mode;
487
488         if (phy->index != 0)
489                 return -EINVAL;
490
491         switch (mode) {
492         case PHY_MODE_USB_HOST:
493                 new_mode = USB_DR_MODE_HOST;
494                 break;
495         case PHY_MODE_USB_DEVICE:
496                 new_mode = USB_DR_MODE_PERIPHERAL;
497                 break;
498         case PHY_MODE_USB_OTG:
499                 new_mode = USB_DR_MODE_OTG;
500                 break;
501         default:
502                 return -EINVAL;
503         }
504
505         if (new_mode != data->dr_mode) {
506                 dev_info(&_phy->dev, "Changing dr_mode to %d\n", new_mode);
507                 data->dr_mode = new_mode;
508         }
509
510         data->id_det = -1; /* Force reprocessing of id */
511         data->force_session_end = true;
512         queue_delayed_work(system_wq, &data->detect, 0);
513
514         return 0;
515 }
516
517 void sun4i_usb_phy_set_squelch_detect(struct phy *_phy, bool enabled)
518 {
519         struct sun4i_usb_phy *phy = phy_get_drvdata(_phy);
520
521         sun4i_usb_phy_write(phy, PHY_SQUELCH_DETECT, enabled ? 0 : 2, 2);
522 }
523 EXPORT_SYMBOL_GPL(sun4i_usb_phy_set_squelch_detect);
524
525 static const struct phy_ops sun4i_usb_phy_ops = {
526         .init           = sun4i_usb_phy_init,
527         .exit           = sun4i_usb_phy_exit,
528         .power_on       = sun4i_usb_phy_power_on,
529         .power_off      = sun4i_usb_phy_power_off,
530         .set_mode       = sun4i_usb_phy_set_mode,
531         .owner          = THIS_MODULE,
532 };
533
534 static void sun4i_usb_phy0_reroute(struct sun4i_usb_phy_data *data, int id_det)
535 {
536         u32 regval;
537
538         regval = readl(data->base + REG_PHY_OTGCTL);
539         if (id_det == 0) {
540                 /* Host mode. Route phy0 to EHCI/OHCI */
541                 regval &= ~OTGCTL_ROUTE_MUSB;
542         } else {
543                 /* Peripheral mode. Route phy0 to MUSB */
544                 regval |= OTGCTL_ROUTE_MUSB;
545         }
546         writel(regval, data->base + REG_PHY_OTGCTL);
547 }
548
549 static void sun4i_usb_phy0_id_vbus_det_scan(struct work_struct *work)
550 {
551         struct sun4i_usb_phy_data *data =
552                 container_of(work, struct sun4i_usb_phy_data, detect.work);
553         struct phy *phy0 = data->phys[0].phy;
554         bool force_session_end, id_notify = false, vbus_notify = false;
555         int id_det, vbus_det;
556
557         if (phy0 == NULL)
558                 return;
559
560         id_det = sun4i_usb_phy0_get_id_det(data);
561         vbus_det = sun4i_usb_phy0_get_vbus_det(data);
562
563         mutex_lock(&phy0->mutex);
564
565         if (!data->phy0_init) {
566                 mutex_unlock(&phy0->mutex);
567                 return;
568         }
569
570         force_session_end = data->force_session_end;
571         data->force_session_end = false;
572
573         if (id_det != data->id_det) {
574                 /* id-change, force session end if we've no vbus detection */
575                 if (data->dr_mode == USB_DR_MODE_OTG &&
576                     !sun4i_usb_phy0_have_vbus_det(data))
577                         force_session_end = true;
578
579                 /* When entering host mode (id = 0) force end the session now */
580                 if (force_session_end && id_det == 0) {
581                         sun4i_usb_phy0_set_vbus_detect(phy0, 0);
582                         msleep(200);
583                         sun4i_usb_phy0_set_vbus_detect(phy0, 1);
584                 }
585                 sun4i_usb_phy0_set_id_detect(phy0, id_det);
586                 data->id_det = id_det;
587                 id_notify = true;
588         }
589
590         if (vbus_det != data->vbus_det) {
591                 sun4i_usb_phy0_set_vbus_detect(phy0, vbus_det);
592                 data->vbus_det = vbus_det;
593                 vbus_notify = true;
594         }
595
596         mutex_unlock(&phy0->mutex);
597
598         if (id_notify) {
599                 extcon_set_state_sync(data->extcon, EXTCON_USB_HOST,
600                                         !id_det);
601                 /* When leaving host mode force end the session here */
602                 if (force_session_end && id_det == 1) {
603                         mutex_lock(&phy0->mutex);
604                         sun4i_usb_phy0_set_vbus_detect(phy0, 0);
605                         msleep(1000);
606                         sun4i_usb_phy0_set_vbus_detect(phy0, 1);
607                         mutex_unlock(&phy0->mutex);
608                 }
609
610                 /* Re-route PHY0 if necessary */
611                 if (data->cfg->phy0_dual_route)
612                         sun4i_usb_phy0_reroute(data, id_det);
613         }
614
615         if (vbus_notify)
616                 extcon_set_state_sync(data->extcon, EXTCON_USB, vbus_det);
617
618         if (sun4i_usb_phy0_poll(data))
619                 queue_delayed_work(system_wq, &data->detect, POLL_TIME);
620 }
621
622 static irqreturn_t sun4i_usb_phy0_id_vbus_det_irq(int irq, void *dev_id)
623 {
624         struct sun4i_usb_phy_data *data = dev_id;
625
626         /* vbus or id changed, let the pins settle and then scan them */
627         mod_delayed_work(system_wq, &data->detect, DEBOUNCE_TIME);
628
629         return IRQ_HANDLED;
630 }
631
632 static int sun4i_usb_phy0_vbus_notify(struct notifier_block *nb,
633                                       unsigned long val, void *v)
634 {
635         struct sun4i_usb_phy_data *data =
636                 container_of(nb, struct sun4i_usb_phy_data, vbus_power_nb);
637         struct power_supply *psy = v;
638
639         /* Properties on the vbus_power_supply changed, scan vbus_det */
640         if (val == PSY_EVENT_PROP_CHANGED && psy == data->vbus_power_supply)
641                 mod_delayed_work(system_wq, &data->detect, DEBOUNCE_TIME);
642
643         return NOTIFY_OK;
644 }
645
646 static struct phy *sun4i_usb_phy_xlate(struct device *dev,
647                                         struct of_phandle_args *args)
648 {
649         struct sun4i_usb_phy_data *data = dev_get_drvdata(dev);
650
651         if (args->args[0] >= data->cfg->num_phys)
652                 return ERR_PTR(-ENODEV);
653
654         if (data->cfg->missing_phys & BIT(args->args[0]))
655                 return ERR_PTR(-ENODEV);
656
657         return data->phys[args->args[0]].phy;
658 }
659
660 static int sun4i_usb_phy_remove(struct platform_device *pdev)
661 {
662         struct device *dev = &pdev->dev;
663         struct sun4i_usb_phy_data *data = dev_get_drvdata(dev);
664
665         if (data->vbus_power_nb_registered)
666                 power_supply_unreg_notifier(&data->vbus_power_nb);
667         if (data->id_det_irq > 0)
668                 devm_free_irq(dev, data->id_det_irq, data);
669         if (data->vbus_det_irq > 0)
670                 devm_free_irq(dev, data->vbus_det_irq, data);
671
672         cancel_delayed_work_sync(&data->detect);
673
674         return 0;
675 }
676
677 static const unsigned int sun4i_usb_phy0_cable[] = {
678         EXTCON_USB,
679         EXTCON_USB_HOST,
680         EXTCON_NONE,
681 };
682
683 static int sun4i_usb_phy_probe(struct platform_device *pdev)
684 {
685         struct sun4i_usb_phy_data *data;
686         struct device *dev = &pdev->dev;
687         struct device_node *np = dev->of_node;
688         struct phy_provider *phy_provider;
689         struct resource *res;
690         int i, ret;
691
692         data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL);
693         if (!data)
694                 return -ENOMEM;
695
696         spin_lock_init(&data->reg_lock);
697         INIT_DELAYED_WORK(&data->detect, sun4i_usb_phy0_id_vbus_det_scan);
698         dev_set_drvdata(dev, data);
699         data->cfg = of_device_get_match_data(dev);
700         if (!data->cfg)
701                 return -EINVAL;
702
703         res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "phy_ctrl");
704         data->base = devm_ioremap_resource(dev, res);
705         if (IS_ERR(data->base))
706                 return PTR_ERR(data->base);
707
708         data->id_det_gpio = devm_gpiod_get_optional(dev, "usb0_id_det",
709                                                     GPIOD_IN);
710         if (IS_ERR(data->id_det_gpio)) {
711                 dev_err(dev, "Couldn't request ID GPIO\n");
712                 return PTR_ERR(data->id_det_gpio);
713         }
714
715         data->vbus_det_gpio = devm_gpiod_get_optional(dev, "usb0_vbus_det",
716                                                       GPIOD_IN);
717         if (IS_ERR(data->vbus_det_gpio)) {
718                 dev_err(dev, "Couldn't request VBUS detect GPIO\n");
719                 return PTR_ERR(data->vbus_det_gpio);
720         }
721
722         if (of_find_property(np, "usb0_vbus_power-supply", NULL)) {
723                 data->vbus_power_supply = devm_power_supply_get_by_phandle(dev,
724                                                      "usb0_vbus_power-supply");
725                 if (IS_ERR(data->vbus_power_supply)) {
726                         dev_err(dev, "Couldn't get the VBUS power supply\n");
727                         return PTR_ERR(data->vbus_power_supply);
728                 }
729
730                 if (!data->vbus_power_supply)
731                         return -EPROBE_DEFER;
732         }
733
734         data->dr_mode = of_usb_get_dr_mode_by_phy(np, 0);
735
736         data->extcon = devm_extcon_dev_allocate(dev, sun4i_usb_phy0_cable);
737         if (IS_ERR(data->extcon)) {
738                 dev_err(dev, "Couldn't allocate our extcon device\n");
739                 return PTR_ERR(data->extcon);
740         }
741
742         ret = devm_extcon_dev_register(dev, data->extcon);
743         if (ret) {
744                 dev_err(dev, "failed to register extcon: %d\n", ret);
745                 return ret;
746         }
747
748         for (i = 0; i < data->cfg->num_phys; i++) {
749                 struct sun4i_usb_phy *phy = data->phys + i;
750                 char name[16];
751
752                 if (data->cfg->missing_phys & BIT(i))
753                         continue;
754
755                 snprintf(name, sizeof(name), "usb%d_vbus", i);
756                 phy->vbus = devm_regulator_get_optional(dev, name);
757                 if (IS_ERR(phy->vbus)) {
758                         if (PTR_ERR(phy->vbus) == -EPROBE_DEFER) {
759                                 dev_err(dev,
760                                         "Couldn't get regulator %s... Deferring probe\n",
761                                         name);
762                                 return -EPROBE_DEFER;
763                         }
764
765                         phy->vbus = NULL;
766                 }
767
768                 if (data->cfg->dedicated_clocks)
769                         snprintf(name, sizeof(name), "usb%d_phy", i);
770                 else
771                         strlcpy(name, "usb_phy", sizeof(name));
772
773                 phy->clk = devm_clk_get(dev, name);
774                 if (IS_ERR(phy->clk)) {
775                         dev_err(dev, "failed to get clock %s\n", name);
776                         return PTR_ERR(phy->clk);
777                 }
778
779                 /* The first PHY is always tied to OTG, and never HSIC */
780                 if (data->cfg->hsic_index && i == data->cfg->hsic_index) {
781                         /* HSIC needs secondary clock */
782                         snprintf(name, sizeof(name), "usb%d_hsic_12M", i);
783                         phy->clk2 = devm_clk_get(dev, name);
784                         if (IS_ERR(phy->clk2)) {
785                                 dev_err(dev, "failed to get clock %s\n", name);
786                                 return PTR_ERR(phy->clk2);
787                         }
788                 }
789
790                 snprintf(name, sizeof(name), "usb%d_reset", i);
791                 phy->reset = devm_reset_control_get(dev, name);
792                 if (IS_ERR(phy->reset)) {
793                         dev_err(dev, "failed to get reset %s\n", name);
794                         return PTR_ERR(phy->reset);
795                 }
796
797                 if (i || data->cfg->phy0_dual_route) { /* No pmu for musb */
798                         snprintf(name, sizeof(name), "pmu%d", i);
799                         res = platform_get_resource_byname(pdev,
800                                                         IORESOURCE_MEM, name);
801                         phy->pmu = devm_ioremap_resource(dev, res);
802                         if (IS_ERR(phy->pmu))
803                                 return PTR_ERR(phy->pmu);
804                 }
805
806                 phy->phy = devm_phy_create(dev, NULL, &sun4i_usb_phy_ops);
807                 if (IS_ERR(phy->phy)) {
808                         dev_err(dev, "failed to create PHY %d\n", i);
809                         return PTR_ERR(phy->phy);
810                 }
811
812                 phy->index = i;
813                 phy_set_drvdata(phy->phy, &data->phys[i]);
814         }
815
816         data->id_det_irq = gpiod_to_irq(data->id_det_gpio);
817         if (data->id_det_irq > 0) {
818                 ret = devm_request_irq(dev, data->id_det_irq,
819                                 sun4i_usb_phy0_id_vbus_det_irq,
820                                 IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
821                                 "usb0-id-det", data);
822                 if (ret) {
823                         dev_err(dev, "Err requesting id-det-irq: %d\n", ret);
824                         return ret;
825                 }
826         }
827
828         data->vbus_det_irq = gpiod_to_irq(data->vbus_det_gpio);
829         if (data->vbus_det_irq > 0) {
830                 ret = devm_request_irq(dev, data->vbus_det_irq,
831                                 sun4i_usb_phy0_id_vbus_det_irq,
832                                 IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
833                                 "usb0-vbus-det", data);
834                 if (ret) {
835                         dev_err(dev, "Err requesting vbus-det-irq: %d\n", ret);
836                         data->vbus_det_irq = -1;
837                         sun4i_usb_phy_remove(pdev); /* Stop detect work */
838                         return ret;
839                 }
840         }
841
842         if (data->vbus_power_supply) {
843                 data->vbus_power_nb.notifier_call = sun4i_usb_phy0_vbus_notify;
844                 data->vbus_power_nb.priority = 0;
845                 ret = power_supply_reg_notifier(&data->vbus_power_nb);
846                 if (ret) {
847                         sun4i_usb_phy_remove(pdev); /* Stop detect work */
848                         return ret;
849                 }
850                 data->vbus_power_nb_registered = true;
851         }
852
853         phy_provider = devm_of_phy_provider_register(dev, sun4i_usb_phy_xlate);
854         if (IS_ERR(phy_provider)) {
855                 sun4i_usb_phy_remove(pdev); /* Stop detect work */
856                 return PTR_ERR(phy_provider);
857         }
858
859         dev_dbg(dev, "successfully loaded\n");
860
861         return 0;
862 }
863
864 static const struct sun4i_usb_phy_cfg sun4i_a10_cfg = {
865         .num_phys = 3,
866         .type = sun4i_a10_phy,
867         .disc_thresh = 3,
868         .phyctl_offset = REG_PHYCTL_A10,
869         .dedicated_clocks = false,
870         .enable_pmu_unk1 = false,
871 };
872
873 static const struct sun4i_usb_phy_cfg sun5i_a13_cfg = {
874         .num_phys = 2,
875         .type = sun4i_a10_phy,
876         .disc_thresh = 2,
877         .phyctl_offset = REG_PHYCTL_A10,
878         .dedicated_clocks = false,
879         .enable_pmu_unk1 = false,
880 };
881
882 static const struct sun4i_usb_phy_cfg sun6i_a31_cfg = {
883         .num_phys = 3,
884         .type = sun6i_a31_phy,
885         .disc_thresh = 3,
886         .phyctl_offset = REG_PHYCTL_A10,
887         .dedicated_clocks = true,
888         .enable_pmu_unk1 = false,
889 };
890
891 static const struct sun4i_usb_phy_cfg sun7i_a20_cfg = {
892         .num_phys = 3,
893         .type = sun4i_a10_phy,
894         .disc_thresh = 2,
895         .phyctl_offset = REG_PHYCTL_A10,
896         .dedicated_clocks = false,
897         .enable_pmu_unk1 = false,
898 };
899
900 static const struct sun4i_usb_phy_cfg sun8i_a23_cfg = {
901         .num_phys = 2,
902         .type = sun6i_a31_phy,
903         .disc_thresh = 3,
904         .phyctl_offset = REG_PHYCTL_A10,
905         .dedicated_clocks = true,
906         .enable_pmu_unk1 = false,
907 };
908
909 static const struct sun4i_usb_phy_cfg sun8i_a33_cfg = {
910         .num_phys = 2,
911         .type = sun8i_a33_phy,
912         .disc_thresh = 3,
913         .phyctl_offset = REG_PHYCTL_A33,
914         .dedicated_clocks = true,
915         .enable_pmu_unk1 = false,
916 };
917
918 static const struct sun4i_usb_phy_cfg sun8i_a83t_cfg = {
919         .num_phys = 3,
920         .hsic_index = 2,
921         .type = sun8i_a83t_phy,
922         .phyctl_offset = REG_PHYCTL_A33,
923         .dedicated_clocks = true,
924 };
925
926 static const struct sun4i_usb_phy_cfg sun8i_h3_cfg = {
927         .num_phys = 4,
928         .type = sun8i_h3_phy,
929         .disc_thresh = 3,
930         .phyctl_offset = REG_PHYCTL_A33,
931         .dedicated_clocks = true,
932         .enable_pmu_unk1 = true,
933         .phy0_dual_route = true,
934 };
935
936 static const struct sun4i_usb_phy_cfg sun8i_r40_cfg = {
937         .num_phys = 3,
938         .type = sun8i_r40_phy,
939         .disc_thresh = 3,
940         .phyctl_offset = REG_PHYCTL_A33,
941         .dedicated_clocks = true,
942         .enable_pmu_unk1 = true,
943         .phy0_dual_route = true,
944 };
945
946 static const struct sun4i_usb_phy_cfg sun8i_v3s_cfg = {
947         .num_phys = 1,
948         .type = sun8i_v3s_phy,
949         .disc_thresh = 3,
950         .phyctl_offset = REG_PHYCTL_A33,
951         .dedicated_clocks = true,
952         .enable_pmu_unk1 = true,
953         .phy0_dual_route = true,
954 };
955
956 static const struct sun4i_usb_phy_cfg sun50i_a64_cfg = {
957         .num_phys = 2,
958         .type = sun50i_a64_phy,
959         .disc_thresh = 3,
960         .phyctl_offset = REG_PHYCTL_A33,
961         .dedicated_clocks = true,
962         .enable_pmu_unk1 = true,
963         .phy0_dual_route = true,
964 };
965
966 static const struct sun4i_usb_phy_cfg sun50i_h6_cfg = {
967         .num_phys = 4,
968         .type = sun50i_h6_phy,
969         .disc_thresh = 3,
970         .phyctl_offset = REG_PHYCTL_A33,
971         .dedicated_clocks = true,
972         .enable_pmu_unk1 = true,
973         .phy0_dual_route = true,
974         .missing_phys = BIT(1) | BIT(2),
975 };
976
977 static const struct of_device_id sun4i_usb_phy_of_match[] = {
978         { .compatible = "allwinner,sun4i-a10-usb-phy", .data = &sun4i_a10_cfg },
979         { .compatible = "allwinner,sun5i-a13-usb-phy", .data = &sun5i_a13_cfg },
980         { .compatible = "allwinner,sun6i-a31-usb-phy", .data = &sun6i_a31_cfg },
981         { .compatible = "allwinner,sun7i-a20-usb-phy", .data = &sun7i_a20_cfg },
982         { .compatible = "allwinner,sun8i-a23-usb-phy", .data = &sun8i_a23_cfg },
983         { .compatible = "allwinner,sun8i-a33-usb-phy", .data = &sun8i_a33_cfg },
984         { .compatible = "allwinner,sun8i-a83t-usb-phy", .data = &sun8i_a83t_cfg },
985         { .compatible = "allwinner,sun8i-h3-usb-phy", .data = &sun8i_h3_cfg },
986         { .compatible = "allwinner,sun8i-r40-usb-phy", .data = &sun8i_r40_cfg },
987         { .compatible = "allwinner,sun8i-v3s-usb-phy", .data = &sun8i_v3s_cfg },
988         { .compatible = "allwinner,sun50i-a64-usb-phy",
989           .data = &sun50i_a64_cfg},
990         { .compatible = "allwinner,sun50i-h6-usb-phy", .data = &sun50i_h6_cfg },
991         { },
992 };
993 MODULE_DEVICE_TABLE(of, sun4i_usb_phy_of_match);
994
995 static struct platform_driver sun4i_usb_phy_driver = {
996         .probe  = sun4i_usb_phy_probe,
997         .remove = sun4i_usb_phy_remove,
998         .driver = {
999                 .of_match_table = sun4i_usb_phy_of_match,
1000                 .name  = "sun4i-usb-phy",
1001         }
1002 };
1003 module_platform_driver(sun4i_usb_phy_driver);
1004
1005 MODULE_DESCRIPTION("Allwinner sun4i USB phy driver");
1006 MODULE_AUTHOR("Hans de Goede <hdegoede@redhat.com>");
1007 MODULE_LICENSE("GPL v2");