1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * PTP 1588 clock for Freescale QorIQ 1588 timer
5 * Copyright (C) 2010 OMICRON electronics GmbH
8 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
10 #include <linux/device.h>
11 #include <linux/hrtimer.h>
12 #include <linux/kernel.h>
13 #include <linux/module.h>
15 #include <linux/of_platform.h>
16 #include <linux/timex.h>
17 #include <linux/slab.h>
18 #include <linux/clk.h>
20 #include <linux/fsl/ptp_qoriq.h>
23 * Register access functions
26 /* Caller must hold ptp_qoriq->lock. */
27 static u64 tmr_cnt_read(struct ptp_qoriq *ptp_qoriq)
29 struct ptp_qoriq_registers *regs = &ptp_qoriq->regs;
33 lo = ptp_qoriq->read(®s->ctrl_regs->tmr_cnt_l);
34 hi = ptp_qoriq->read(®s->ctrl_regs->tmr_cnt_h);
35 ns = ((u64) hi) << 32;
40 /* Caller must hold ptp_qoriq->lock. */
41 static void tmr_cnt_write(struct ptp_qoriq *ptp_qoriq, u64 ns)
43 struct ptp_qoriq_registers *regs = &ptp_qoriq->regs;
45 u32 lo = ns & 0xffffffff;
47 ptp_qoriq->write(®s->ctrl_regs->tmr_cnt_l, lo);
48 ptp_qoriq->write(®s->ctrl_regs->tmr_cnt_h, hi);
51 static u64 tmr_offset_read(struct ptp_qoriq *ptp_qoriq)
53 struct ptp_qoriq_registers *regs = &ptp_qoriq->regs;
57 lo = ptp_qoriq->read(®s->ctrl_regs->tmroff_l);
58 hi = ptp_qoriq->read(®s->ctrl_regs->tmroff_h);
59 ns = ((u64) hi) << 32;
64 static void tmr_offset_write(struct ptp_qoriq *ptp_qoriq, u64 delta_ns)
66 struct ptp_qoriq_registers *regs = &ptp_qoriq->regs;
67 u32 lo = delta_ns & 0xffffffff;
68 u32 hi = delta_ns >> 32;
70 ptp_qoriq->write(®s->ctrl_regs->tmroff_l, lo);
71 ptp_qoriq->write(®s->ctrl_regs->tmroff_h, hi);
74 /* Caller must hold ptp_qoriq->lock. */
75 static void set_alarm(struct ptp_qoriq *ptp_qoriq)
77 struct ptp_qoriq_registers *regs = &ptp_qoriq->regs;
81 ns = tmr_cnt_read(ptp_qoriq) + tmr_offset_read(ptp_qoriq)
84 ns = div_u64(ns, 1000000000UL) * 1000000000ULL;
85 ns -= ptp_qoriq->tclk_period;
88 ptp_qoriq->write(®s->alarm_regs->tmr_alarm1_l, lo);
89 ptp_qoriq->write(®s->alarm_regs->tmr_alarm1_h, hi);
92 /* Caller must hold ptp_qoriq->lock. */
93 static void set_fipers(struct ptp_qoriq *ptp_qoriq)
95 struct ptp_qoriq_registers *regs = &ptp_qoriq->regs;
98 ptp_qoriq->write(®s->fiper_regs->tmr_fiper1, ptp_qoriq->tmr_fiper1);
99 ptp_qoriq->write(®s->fiper_regs->tmr_fiper2, ptp_qoriq->tmr_fiper2);
101 if (ptp_qoriq->fiper3_support)
102 ptp_qoriq->write(®s->fiper_regs->tmr_fiper3,
103 ptp_qoriq->tmr_fiper3);
106 int extts_clean_up(struct ptp_qoriq *ptp_qoriq, int index, bool update_event)
108 struct ptp_qoriq_registers *regs = &ptp_qoriq->regs;
109 struct ptp_clock_event event;
110 void __iomem *reg_etts_l;
111 void __iomem *reg_etts_h;
117 reg_etts_l = ®s->etts_regs->tmr_etts1_l;
118 reg_etts_h = ®s->etts_regs->tmr_etts1_h;
122 reg_etts_l = ®s->etts_regs->tmr_etts2_l;
123 reg_etts_h = ®s->etts_regs->tmr_etts2_h;
129 event.type = PTP_CLOCK_EXTTS;
132 if (ptp_qoriq->extts_fifo_support)
133 if (!(ptp_qoriq->read(®s->ctrl_regs->tmr_stat) & valid))
137 lo = ptp_qoriq->read(reg_etts_l);
138 hi = ptp_qoriq->read(reg_etts_h);
141 event.timestamp = ((u64) hi) << 32;
142 event.timestamp |= lo;
143 ptp_clock_event(ptp_qoriq->clock, &event);
146 if (!ptp_qoriq->extts_fifo_support)
148 } while (ptp_qoriq->read(®s->ctrl_regs->tmr_stat) & valid);
152 EXPORT_SYMBOL_GPL(extts_clean_up);
155 * Interrupt service routine
158 irqreturn_t ptp_qoriq_isr(int irq, void *priv)
160 struct ptp_qoriq *ptp_qoriq = priv;
161 struct ptp_qoriq_registers *regs = &ptp_qoriq->regs;
162 struct ptp_clock_event event;
163 u32 ack = 0, mask, val, irqs;
165 spin_lock(&ptp_qoriq->lock);
167 val = ptp_qoriq->read(®s->ctrl_regs->tmr_tevent);
168 mask = ptp_qoriq->read(®s->ctrl_regs->tmr_temask);
170 spin_unlock(&ptp_qoriq->lock);
176 extts_clean_up(ptp_qoriq, 0, true);
181 extts_clean_up(ptp_qoriq, 1, true);
186 event.type = PTP_CLOCK_PPS;
187 ptp_clock_event(ptp_qoriq->clock, &event);
191 ptp_qoriq->write(®s->ctrl_regs->tmr_tevent, ack);
196 EXPORT_SYMBOL_GPL(ptp_qoriq_isr);
199 * PTP clock operations
202 int ptp_qoriq_adjfine(struct ptp_clock_info *ptp, long scaled_ppm)
207 struct ptp_qoriq *ptp_qoriq = container_of(ptp, struct ptp_qoriq, caps);
208 struct ptp_qoriq_registers *regs = &ptp_qoriq->regs;
210 if (scaled_ppm < 0) {
212 scaled_ppm = -scaled_ppm;
214 tmr_add = ptp_qoriq->tmr_add;
218 * Calculate diff and round() to the nearest integer
220 * diff = adj * (ppb / 1000000000)
221 * = adj * scaled_ppm / 65536000000
223 diff = mul_u64_u64_div_u64(adj, scaled_ppm, 32768000000);
224 diff = DIV64_U64_ROUND_UP(diff, 2);
226 tmr_add = neg_adj ? tmr_add - diff : tmr_add + diff;
227 ptp_qoriq->write(®s->ctrl_regs->tmr_add, tmr_add);
231 EXPORT_SYMBOL_GPL(ptp_qoriq_adjfine);
233 int ptp_qoriq_adjtime(struct ptp_clock_info *ptp, s64 delta)
235 struct ptp_qoriq *ptp_qoriq = container_of(ptp, struct ptp_qoriq, caps);
239 spin_lock_irqsave(&ptp_qoriq->lock, flags);
241 /* On LS1021A, eTSEC2 and eTSEC3 do not take into account the TMR_OFF
244 if (ptp_qoriq->etsec) {
245 now = tmr_cnt_read(ptp_qoriq);
247 tmr_cnt_write(ptp_qoriq, now);
249 curr_delta = tmr_offset_read(ptp_qoriq);
251 tmr_offset_write(ptp_qoriq, curr_delta);
253 set_fipers(ptp_qoriq);
255 spin_unlock_irqrestore(&ptp_qoriq->lock, flags);
259 EXPORT_SYMBOL_GPL(ptp_qoriq_adjtime);
261 int ptp_qoriq_gettime(struct ptp_clock_info *ptp, struct timespec64 *ts)
265 struct ptp_qoriq *ptp_qoriq = container_of(ptp, struct ptp_qoriq, caps);
267 spin_lock_irqsave(&ptp_qoriq->lock, flags);
269 ns = tmr_cnt_read(ptp_qoriq) + tmr_offset_read(ptp_qoriq);
271 spin_unlock_irqrestore(&ptp_qoriq->lock, flags);
273 *ts = ns_to_timespec64(ns);
277 EXPORT_SYMBOL_GPL(ptp_qoriq_gettime);
279 int ptp_qoriq_settime(struct ptp_clock_info *ptp,
280 const struct timespec64 *ts)
284 struct ptp_qoriq *ptp_qoriq = container_of(ptp, struct ptp_qoriq, caps);
286 ns = timespec64_to_ns(ts);
288 spin_lock_irqsave(&ptp_qoriq->lock, flags);
290 tmr_offset_write(ptp_qoriq, 0);
291 tmr_cnt_write(ptp_qoriq, ns);
292 set_fipers(ptp_qoriq);
294 spin_unlock_irqrestore(&ptp_qoriq->lock, flags);
298 EXPORT_SYMBOL_GPL(ptp_qoriq_settime);
300 int ptp_qoriq_enable(struct ptp_clock_info *ptp,
301 struct ptp_clock_request *rq, int on)
303 struct ptp_qoriq *ptp_qoriq = container_of(ptp, struct ptp_qoriq, caps);
304 struct ptp_qoriq_registers *regs = &ptp_qoriq->regs;
309 case PTP_CLK_REQ_EXTTS:
310 switch (rq->extts.index) {
322 extts_clean_up(ptp_qoriq, rq->extts.index, false);
325 case PTP_CLK_REQ_PPS:
332 spin_lock_irqsave(&ptp_qoriq->lock, flags);
334 mask = ptp_qoriq->read(®s->ctrl_regs->tmr_temask);
337 ptp_qoriq->write(®s->ctrl_regs->tmr_tevent, bit);
342 ptp_qoriq->write(®s->ctrl_regs->tmr_temask, mask);
344 spin_unlock_irqrestore(&ptp_qoriq->lock, flags);
347 EXPORT_SYMBOL_GPL(ptp_qoriq_enable);
349 static const struct ptp_clock_info ptp_qoriq_caps = {
350 .owner = THIS_MODULE,
351 .name = "qoriq ptp clock",
354 .n_ext_ts = N_EXT_TS,
358 .adjfine = ptp_qoriq_adjfine,
359 .adjtime = ptp_qoriq_adjtime,
360 .gettime64 = ptp_qoriq_gettime,
361 .settime64 = ptp_qoriq_settime,
362 .enable = ptp_qoriq_enable,
366 * ptp_qoriq_nominal_freq - calculate nominal frequency according to
367 * reference clock frequency
369 * @clk_src: reference clock frequency
371 * The nominal frequency is the desired clock frequency.
372 * It should be less than the reference clock frequency.
373 * It should be a factor of 1000MHz.
375 * Return the nominal frequency
377 static u32 ptp_qoriq_nominal_freq(u32 clk_src)
382 remainder = clk_src % 100;
384 clk_src -= remainder;
391 } while (1000 % clk_src);
393 return clk_src * 1000000;
397 * ptp_qoriq_auto_config - calculate a set of default configurations
399 * @ptp_qoriq: pointer to ptp_qoriq
400 * @node: pointer to device_node
402 * If below dts properties are not provided, this function will be
403 * called to calculate a set of default configurations for them.
409 * "fsl,tmr-fiper3" (required only for DPAA2 and ENETC hardware)
412 * Return 0 if success
414 static int ptp_qoriq_auto_config(struct ptp_qoriq *ptp_qoriq,
415 struct device_node *node)
424 ptp_qoriq->cksel = DEFAULT_CKSEL;
426 clk = of_clk_get(node, 0);
428 clk_src = clk_get_rate(clk);
432 if (clk_src <= 100000000UL) {
433 pr_err("error reference clock value, or lower than 100MHz\n");
437 nominal_freq = ptp_qoriq_nominal_freq(clk_src);
441 ptp_qoriq->tclk_period = 1000000000UL / nominal_freq;
442 ptp_qoriq->tmr_prsc = DEFAULT_TMR_PRSC;
444 /* Calculate initial frequency compensation value for TMR_ADD register.
445 * freq_comp = ceil(2^32 / freq_ratio)
446 * freq_ratio = reference_clock_freq / nominal_freq
448 freq_comp = ((u64)1 << 32) * nominal_freq;
449 freq_comp = div_u64_rem(freq_comp, clk_src, &remainder);
453 ptp_qoriq->tmr_add = freq_comp;
454 ptp_qoriq->tmr_fiper1 = DEFAULT_FIPER1_PERIOD - ptp_qoriq->tclk_period;
455 ptp_qoriq->tmr_fiper2 = DEFAULT_FIPER2_PERIOD - ptp_qoriq->tclk_period;
456 ptp_qoriq->tmr_fiper3 = DEFAULT_FIPER3_PERIOD - ptp_qoriq->tclk_period;
458 /* max_adj = 1000000000 * (freq_ratio - 1.0) - 1
459 * freq_ratio = reference_clock_freq / nominal_freq
461 max_adj = 1000000000ULL * (clk_src - nominal_freq);
462 max_adj = div_u64(max_adj, nominal_freq) - 1;
463 ptp_qoriq->caps.max_adj = max_adj;
468 int ptp_qoriq_init(struct ptp_qoriq *ptp_qoriq, void __iomem *base,
469 const struct ptp_clock_info *caps)
471 struct device_node *node = ptp_qoriq->dev->of_node;
472 struct ptp_qoriq_registers *regs;
473 struct timespec64 now;
480 ptp_qoriq->base = base;
481 ptp_qoriq->caps = *caps;
483 if (of_property_read_u32(node, "fsl,cksel", &ptp_qoriq->cksel))
484 ptp_qoriq->cksel = DEFAULT_CKSEL;
486 if (of_property_read_bool(node, "fsl,extts-fifo"))
487 ptp_qoriq->extts_fifo_support = true;
489 ptp_qoriq->extts_fifo_support = false;
491 if (of_device_is_compatible(node, "fsl,dpaa2-ptp") ||
492 of_device_is_compatible(node, "fsl,enetc-ptp"))
493 ptp_qoriq->fiper3_support = true;
495 if (of_property_read_u32(node,
496 "fsl,tclk-period", &ptp_qoriq->tclk_period) ||
497 of_property_read_u32(node,
498 "fsl,tmr-prsc", &ptp_qoriq->tmr_prsc) ||
499 of_property_read_u32(node,
500 "fsl,tmr-add", &ptp_qoriq->tmr_add) ||
501 of_property_read_u32(node,
502 "fsl,tmr-fiper1", &ptp_qoriq->tmr_fiper1) ||
503 of_property_read_u32(node,
504 "fsl,tmr-fiper2", &ptp_qoriq->tmr_fiper2) ||
505 of_property_read_u32(node,
506 "fsl,max-adj", &ptp_qoriq->caps.max_adj) ||
507 (ptp_qoriq->fiper3_support &&
508 of_property_read_u32(node, "fsl,tmr-fiper3",
509 &ptp_qoriq->tmr_fiper3))) {
510 pr_warn("device tree node missing required elements, try automatic configuration\n");
512 if (ptp_qoriq_auto_config(ptp_qoriq, node))
516 if (of_property_read_bool(node, "little-endian")) {
517 ptp_qoriq->read = qoriq_read_le;
518 ptp_qoriq->write = qoriq_write_le;
520 ptp_qoriq->read = qoriq_read_be;
521 ptp_qoriq->write = qoriq_write_be;
524 /* The eTSEC uses differnt memory map with DPAA/ENETC */
525 if (of_device_is_compatible(node, "fsl,etsec-ptp")) {
526 ptp_qoriq->etsec = true;
527 ptp_qoriq->regs.ctrl_regs = base + ETSEC_CTRL_REGS_OFFSET;
528 ptp_qoriq->regs.alarm_regs = base + ETSEC_ALARM_REGS_OFFSET;
529 ptp_qoriq->regs.fiper_regs = base + ETSEC_FIPER_REGS_OFFSET;
530 ptp_qoriq->regs.etts_regs = base + ETSEC_ETTS_REGS_OFFSET;
532 ptp_qoriq->regs.ctrl_regs = base + CTRL_REGS_OFFSET;
533 ptp_qoriq->regs.alarm_regs = base + ALARM_REGS_OFFSET;
534 ptp_qoriq->regs.fiper_regs = base + FIPER_REGS_OFFSET;
535 ptp_qoriq->regs.etts_regs = base + ETTS_REGS_OFFSET;
538 spin_lock_init(&ptp_qoriq->lock);
540 ktime_get_real_ts64(&now);
541 ptp_qoriq_settime(&ptp_qoriq->caps, &now);
544 (ptp_qoriq->tclk_period & TCLK_PERIOD_MASK) << TCLK_PERIOD_SHIFT |
545 (ptp_qoriq->cksel & CKSEL_MASK) << CKSEL_SHIFT;
547 spin_lock_irqsave(&ptp_qoriq->lock, flags);
549 regs = &ptp_qoriq->regs;
550 ptp_qoriq->write(®s->ctrl_regs->tmr_ctrl, tmr_ctrl);
551 ptp_qoriq->write(®s->ctrl_regs->tmr_add, ptp_qoriq->tmr_add);
552 ptp_qoriq->write(®s->ctrl_regs->tmr_prsc, ptp_qoriq->tmr_prsc);
553 ptp_qoriq->write(®s->fiper_regs->tmr_fiper1, ptp_qoriq->tmr_fiper1);
554 ptp_qoriq->write(®s->fiper_regs->tmr_fiper2, ptp_qoriq->tmr_fiper2);
556 if (ptp_qoriq->fiper3_support)
557 ptp_qoriq->write(®s->fiper_regs->tmr_fiper3,
558 ptp_qoriq->tmr_fiper3);
560 set_alarm(ptp_qoriq);
561 ptp_qoriq->write(®s->ctrl_regs->tmr_ctrl,
562 tmr_ctrl|FIPERST|RTPE|TE|FRD);
564 spin_unlock_irqrestore(&ptp_qoriq->lock, flags);
566 ptp_qoriq->clock = ptp_clock_register(&ptp_qoriq->caps, ptp_qoriq->dev);
567 if (IS_ERR(ptp_qoriq->clock))
568 return PTR_ERR(ptp_qoriq->clock);
570 ptp_qoriq->phc_index = ptp_clock_index(ptp_qoriq->clock);
571 ptp_qoriq_create_debugfs(ptp_qoriq);
574 EXPORT_SYMBOL_GPL(ptp_qoriq_init);
576 void ptp_qoriq_free(struct ptp_qoriq *ptp_qoriq)
578 struct ptp_qoriq_registers *regs = &ptp_qoriq->regs;
580 ptp_qoriq->write(®s->ctrl_regs->tmr_temask, 0);
581 ptp_qoriq->write(®s->ctrl_regs->tmr_ctrl, 0);
583 ptp_qoriq_remove_debugfs(ptp_qoriq);
584 ptp_clock_unregister(ptp_qoriq->clock);
585 iounmap(ptp_qoriq->base);
586 free_irq(ptp_qoriq->irq, ptp_qoriq);
588 EXPORT_SYMBOL_GPL(ptp_qoriq_free);
590 static int ptp_qoriq_probe(struct platform_device *dev)
592 struct ptp_qoriq *ptp_qoriq;
596 ptp_qoriq = kzalloc(sizeof(*ptp_qoriq), GFP_KERNEL);
600 ptp_qoriq->dev = &dev->dev;
604 ptp_qoriq->irq = platform_get_irq(dev, 0);
605 if (ptp_qoriq->irq < 0) {
606 pr_err("irq not in device tree\n");
609 if (request_irq(ptp_qoriq->irq, ptp_qoriq_isr, IRQF_SHARED,
610 DRIVER, ptp_qoriq)) {
611 pr_err("request_irq failed\n");
615 ptp_qoriq->rsrc = platform_get_resource(dev, IORESOURCE_MEM, 0);
616 if (!ptp_qoriq->rsrc) {
617 pr_err("no resource\n");
620 if (request_resource(&iomem_resource, ptp_qoriq->rsrc)) {
621 pr_err("resource busy\n");
625 base = ioremap(ptp_qoriq->rsrc->start,
626 resource_size(ptp_qoriq->rsrc));
628 pr_err("ioremap ptp registers failed\n");
632 err = ptp_qoriq_init(ptp_qoriq, base, &ptp_qoriq_caps);
636 platform_set_drvdata(dev, ptp_qoriq);
640 iounmap(ptp_qoriq->base);
642 release_resource(ptp_qoriq->rsrc);
644 free_irq(ptp_qoriq->irq, ptp_qoriq);
651 static int ptp_qoriq_remove(struct platform_device *dev)
653 struct ptp_qoriq *ptp_qoriq = platform_get_drvdata(dev);
655 ptp_qoriq_free(ptp_qoriq);
656 release_resource(ptp_qoriq->rsrc);
661 static const struct of_device_id match_table[] = {
662 { .compatible = "fsl,etsec-ptp" },
663 { .compatible = "fsl,fman-ptp-timer" },
666 MODULE_DEVICE_TABLE(of, match_table);
668 static struct platform_driver ptp_qoriq_driver = {
671 .of_match_table = match_table,
673 .probe = ptp_qoriq_probe,
674 .remove = ptp_qoriq_remove,
677 module_platform_driver(ptp_qoriq_driver);
679 MODULE_AUTHOR("Richard Cochran <richardcochran@gmail.com>");
680 MODULE_DESCRIPTION("PTP clock for Freescale QorIQ 1588 timer");
681 MODULE_LICENSE("GPL");